diff --git a/components/soc/include/hal/rtc_hal.h b/components/soc/include/hal/rtc_hal.h
new file mode 100644
index 000000000000..a700c90a9392
--- /dev/null
+++ b/components/soc/include/hal/rtc_hal.h
@@ -0,0 +1,33 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "hal/gpio_types.h"
+#include "hal/rtc_io_ll.h"
+#include "hal/rtc_cntl_ll.h"
+
+#define rtc_hal_ext1_get_wakeup_pins()                    rtc_cntl_ll_ext1_get_wakeup_pins()
+
+#define rtc_hal_ext1_set_wakeup_pins(mask, mode)          rtc_cntl_ll_ext1_set_wakeup_pins(mask, mode)
+
+#define rtc_hal_ext1_clear_wakeup_pins()                  rtc_cntl_ll_ext1_clear_wakeup_pins()
+
+#define rtc_hal_set_wakeup_timer(ticks)                   rtc_cntl_ll_set_wakeup_timer(ticks)
+
+/*
+ * Enable wakeup from ULP coprocessor.
+ */
+#define rtc_hal_ulp_wakeup_enable()                       rtc_cntl_ll_ulp_wakeup_enable()
+
diff --git a/components/soc/include/hal/rtc_io_hal.h b/components/soc/include/hal/rtc_io_hal.h
index d1a8b1178416..8bf0d64c0064 100644
--- a/components/soc/include/hal/rtc_io_hal.h
+++ b/components/soc/include/hal/rtc_io_hal.h
@@ -219,6 +219,13 @@ void rtcio_hal_set_direction_in_sleep(int rtcio_num, rtc_gpio_mode_t mode);
  */
 #define rtcio_hal_wakeup_disable(rtcio_num) rtcio_ll_wakeup_disable(rtcio_num)
 
+/**
+ * Disable wakeup function from light sleep status for rtcio.
+ *
+ * @param rtcio_num The index of rtcio. 0 ~ SOC_RTC_IO_PIN_COUNT.
+ */
+#define rtcio_hal_ext0_set_wakeup_pin(rtcio_num, level)     rtcio_ll_ext0_set_wakeup_pin(rtcio_num, level)
+
 /**
  * Helper function to disconnect internal circuits from an RTC IO
  * This function disables input, output, pullup, pulldown, and enables
diff --git a/components/soc/include/hal/soc_hal.h b/components/soc/include/hal/soc_hal.h
index 6a4ab30c0a7b..e4400d0e0757 100644
--- a/components/soc/include/hal/soc_hal.h
+++ b/components/soc/include/hal/soc_hal.h
@@ -17,12 +17,12 @@
 #include <stdint.h>
 #include <stdbool.h>
 
+#include "esp_err.h"
+
 #include "soc/soc_caps.h"
 #include "hal/cpu_hal.h"
 #include "hal/soc_ll.h"
 
-#include "esp_err.h"
-
 #ifdef __cplusplus
 extern "C" {
 #endif
diff --git a/components/soc/include/hal/touch_sensor_types.h b/components/soc/include/hal/touch_sensor_types.h
index cbadc1eade95..d2ddf33e2094 100644
--- a/components/soc/include/hal/touch_sensor_types.h
+++ b/components/soc/include/hal/touch_sensor_types.h
@@ -14,6 +14,9 @@
 
 #pragma once
 
+#include <stdbool.h>
+
+#include "soc/soc.h"
 #include "soc/touch_sensor_caps.h"
 #include "sdkconfig.h"
 #include "esp_attr.h"
diff --git a/components/soc/soc/esp32s2/include/soc/rtc.h b/components/soc/soc/esp32s2/include/soc/rtc.h
index a69be3326600..d90804e312aa 100644
--- a/components/soc/soc/esp32s2/include/soc/rtc.h
+++ b/components/soc/soc/esp32s2/include/soc/rtc.h
@@ -687,14 +687,6 @@ typedef struct {
 void rtc_sleep_init(rtc_sleep_config_t cfg);
 
 
-/**
- * @brief Set target value of RTC counter for RTC_TIMER_TRIG_EN wakeup source
- * @param t value of RTC counter at which wakeup from sleep will happen;
- *          only the lower 48 bits are used
- */
-void rtc_sleep_set_wakeup_time(uint64_t t);
-
-
 #define RTC_EXT0_TRIG_EN    BIT(0)  //!< EXT0 GPIO wakeup
 #define RTC_EXT1_TRIG_EN    BIT(1)  //!< EXT1 GPIO wakeup
 #define RTC_GPIO_TRIG_EN    BIT(2)  //!< GPIO wakeup (light sleep only)
diff --git a/components/soc/src/esp32/include/hal/rtc_cntl_ll.h b/components/soc/src/esp32/include/hal/rtc_cntl_ll.h
new file mode 100644
index 000000000000..3c77d4c0cb8c
--- /dev/null
+++ b/components/soc/src/esp32/include/hal/rtc_cntl_ll.h
@@ -0,0 +1,55 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/rtc.h"
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t)
+{
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX);
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
+}
+
+static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void)
+{
+    REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
+}
+
+static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void)
+{
+    return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
+}
+
+static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
+{
+    REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask);
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
+}
+
+static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
+{
+    SET_PERI_REG_MASK(RTC_CNTL_STATE0_REG, RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN);
+}
+
+#ifdef __cplusplus
+}
+#endif
\ No newline at end of file
diff --git a/components/soc/src/esp32/include/hal/rtc_io_ll.h b/components/soc/src/esp32/include/hal/rtc_io_ll.h
index 07ecad564753..3a404299b67c 100644
--- a/components/soc/src/esp32/include/hal/rtc_io_ll.h
+++ b/components/soc/src/esp32/include/hal/rtc_io_ll.h
@@ -353,6 +353,14 @@ static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
     CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
 }
 
+static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtcio_num);
+    // Set level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            level , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
 #ifdef __cplusplus
 }
 #endif
\ No newline at end of file
diff --git a/components/soc/src/esp32/include/hal/soc_ll.h b/components/soc/src/esp32/include/hal/soc_ll.h
index b83a0756bcaf..93f4bbf640c0 100644
--- a/components/soc/src/esp32/include/hal/soc_ll.h
+++ b/components/soc/src/esp32/include/hal/soc_ll.h
@@ -16,6 +16,7 @@
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/rtc.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/soc/src/esp32s2/include/hal/rtc_cntl_ll.h b/components/soc/src/esp32s2/include/hal/rtc_cntl_ll.h
new file mode 100644
index 000000000000..47bb21953eb6
--- /dev/null
+++ b/components/soc/src/esp32s2/include/hal/rtc_cntl_ll.h
@@ -0,0 +1,58 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/rtc.h"
+#include "soc/rtc_cntl_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t)
+{
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX);
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
+
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+    SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+}
+
+static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void)
+{
+    return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
+}
+
+static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
+{
+    REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask);
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
+}
+
+static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void)
+{
+    REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
+}
+
+static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
+{
+    SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S);
+}
+
+#ifdef __cplusplus
+}
+#endif
\ No newline at end of file
diff --git a/components/soc/src/esp32s2/include/hal/rtc_io_ll.h b/components/soc/src/esp32s2/include/hal/rtc_io_ll.h
index bce105496b29..c687915ec013 100644
--- a/components/soc/src/esp32s2/include/hal/rtc_io_ll.h
+++ b/components/soc/src/esp32s2/include/hal/rtc_io_ll.h
@@ -354,6 +354,14 @@ static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
     CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
 }
 
+static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtcio_num);
+    // Set level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            level , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
 #ifdef __cplusplus
 }
 #endif
\ No newline at end of file
diff --git a/components/soc/src/esp32s2/include/hal/soc_ll.h b/components/soc/src/esp32s2/include/hal/soc_ll.h
index e61651581e60..e195c93574fa 100644
--- a/components/soc/src/esp32s2/include/hal/soc_ll.h
+++ b/components/soc/src/esp32s2/include/hal/soc_ll.h
@@ -16,6 +16,7 @@
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/rtc.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/soc/src/esp32s3/include/hal/rtc_cntl_ll.h b/components/soc/src/esp32s3/include/hal/rtc_cntl_ll.h
new file mode 100644
index 000000000000..47bb21953eb6
--- /dev/null
+++ b/components/soc/src/esp32s3/include/hal/rtc_cntl_ll.h
@@ -0,0 +1,58 @@
+// Copyright 2020 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#pragma once
+
+#include "soc/soc.h"
+#include "soc/rtc.h"
+#include "soc/rtc_cntl_reg.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void rtc_cntl_ll_set_wakeup_timer(uint64_t t)
+{
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER0_REG, t & UINT32_MAX);
+    WRITE_PERI_REG(RTC_CNTL_SLP_TIMER1_REG, t >> 32);
+
+    SET_PERI_REG_MASK(RTC_CNTL_INT_CLR_REG, RTC_CNTL_MAIN_TIMER_INT_CLR_M);
+    SET_PERI_REG_MASK(RTC_CNTL_SLP_TIMER1_REG, RTC_CNTL_MAIN_TIMER_ALARM_EN_M);
+}
+
+static inline uint32_t rtc_cntl_ll_ext1_get_wakeup_pins(void)
+{
+    return REG_GET_FIELD(RTC_CNTL_EXT_WAKEUP1_STATUS_REG, RTC_CNTL_EXT_WAKEUP1_STATUS);
+}
+
+static inline void rtc_cntl_ll_ext1_set_wakeup_pins(uint32_t mask, int mode)
+{
+    REG_SET_FIELD(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_SEL, mask);
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            mode, RTC_CNTL_EXT_WAKEUP1_LV_S);
+}
+
+static inline void rtc_cntl_ll_ext1_clear_wakeup_pins(void)
+{
+    REG_SET_BIT(RTC_CNTL_EXT_WAKEUP1_REG, RTC_CNTL_EXT_WAKEUP1_STATUS_CLR);
+}
+
+static inline void rtc_cntl_ll_ulp_wakeup_enable(void)
+{
+    SET_PERI_REG_BITS(RTC_CNTL_STATE0_REG, RTC_CNTL_WAKEUP_ENA_V, 0x800, RTC_CNTL_WAKEUP_ENA_S);
+}
+
+#ifdef __cplusplus
+}
+#endif
\ No newline at end of file
diff --git a/components/soc/src/esp32s3/include/hal/rtc_io_ll.h b/components/soc/src/esp32s3/include/hal/rtc_io_ll.h
index 04de23eb4903..ebb83ba65970 100644
--- a/components/soc/src/esp32s3/include/hal/rtc_io_ll.h
+++ b/components/soc/src/esp32s3/include/hal/rtc_io_ll.h
@@ -55,12 +55,14 @@ typedef enum {
 static inline void rtcio_ll_function_select(int rtcio_num, rtcio_ll_func_t func)
 {
     if (func == RTCIO_FUNC_RTC) {
+        SENS.sar_io_mux_conf.iomux_clk_gate_en = 1;
         // 0: GPIO connected to digital GPIO module. 1: GPIO connected to analog RTC module.
         SET_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
         //0:RTC FUNCTION 1,2,3:Reserved
         SET_PERI_REG_BITS(rtc_io_desc[rtcio_num].reg, RTC_IO_TOUCH_PAD1_FUN_SEL_V, SOC_PIN_FUNC_RTC_IO, rtc_io_desc[rtcio_num].func);
     } else if (func == RTCIO_FUNC_DIGITAL) {
         CLEAR_PERI_REG_MASK(rtc_io_desc[rtcio_num].reg, (rtc_io_desc[rtcio_num].mux));
+        SENS.sar_io_mux_conf.iomux_clk_gate_en = 0;
     }
 }
 
@@ -352,6 +354,14 @@ static inline void rtcio_ll_disable_sleep_setting(gpio_num_t gpio_num)
     CLEAR_PERI_REG_MASK(rtc_io_desc[gpio_num].reg, rtc_io_desc[gpio_num].slpsel);
 }
 
+static inline void rtcio_ll_ext0_set_wakeup_pin(int rtcio_num, int level)
+{
+    REG_SET_FIELD(RTC_IO_EXT_WAKEUP0_REG, RTC_IO_EXT_WAKEUP0_SEL, rtcio_num);
+    // Set level which will trigger wakeup
+    SET_PERI_REG_BITS(RTC_CNTL_EXT_WAKEUP_CONF_REG, 0x1,
+            level , RTC_CNTL_EXT_WAKEUP0_LV_S);
+}
+
 #ifdef __cplusplus
 }
 #endif
\ No newline at end of file
diff --git a/components/soc/src/esp32s3/include/hal/soc_ll.h b/components/soc/src/esp32s3/include/hal/soc_ll.h
index b83a0756bcaf..93f4bbf640c0 100644
--- a/components/soc/src/esp32s3/include/hal/soc_ll.h
+++ b/components/soc/src/esp32s3/include/hal/soc_ll.h
@@ -16,6 +16,7 @@
 #include "soc/soc.h"
 #include "soc/rtc_cntl_reg.h"
 #include "soc/soc_caps.h"
+#include "soc/rtc.h"
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/components/soc/src/hal/soc_hal.c b/components/soc/src/hal/soc_hal.c
index c01ab3e628ce..b0c6304fafe2 100644
--- a/components/soc/src/hal/soc_hal.c
+++ b/components/soc/src/hal/soc_hal.c
@@ -19,7 +19,9 @@
 
 #include "hal/soc_hal.h"
 #include "hal/soc_ll.h"
+#include "hal/rtc_cntl_ll.h"
 #include "soc/soc_caps.h"
+#include "soc/rtc.h"
 
 #if SOC_CPU_CORES_NUM > 1
 void soc_hal_stall_core(int core)