-
Notifications
You must be signed in to change notification settings - Fork 23
/
Copy pathsolos-pci.c
1495 lines (1242 loc) · 38.9 KB
/
solos-pci.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Driver for the Solos PCI ADSL2+ card, designed to support Linux by
* Traverse Technologies -- http://www.traverse.com.au/
* Xrio Limited -- http://www.xrio.com/
*
*
* Copyright © 2008 Traverse Technologies
* Copyright © 2008 Intel Corporation
*
* Authors: Nathan Williams <[email protected]>
* David Woodhouse <[email protected]>
* Treker Chen <[email protected]>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#define DEBUG
#define VERBOSE_DEBUG
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/atm.h>
#include <linux/atmdev.h>
#include <linux/skbuff.h>
#include <linux/sysfs.h>
#include <linux/device.h>
#include <linux/kobject.h>
#include <linux/firmware.h>
#include <linux/ctype.h>
#include <linux/swab.h>
#include <linux/slab.h>
#define VERSION "1.04"
#define DRIVER_VERSION 0x01
#define PTAG "solos-pci"
#define CONFIG_RAM_SIZE 128
#define FLAGS_ADDR 0x7C
#define IRQ_EN_ADDR 0x78
#define FPGA_VER 0x74
#define IRQ_CLEAR 0x70
#define WRITE_FLASH 0x6C
#define PORTS 0x68
#define FLASH_BLOCK 0x64
#define FLASH_BUSY 0x60
#define FPGA_MODE 0x5C
#define FLASH_MODE 0x58
#define GPIO_STATUS 0x54
#define DRIVER_VER 0x50
#define TX_DMA_ADDR(port) (0x40 + (4 * (port)))
#define RX_DMA_ADDR(port) (0x30 + (4 * (port)))
#define DATA_RAM_SIZE 32768
#define BUF_SIZE 2048
#define OLD_BUF_SIZE 4096 /* For FPGA versions <= 2*/
/* Old boards use ATMEL AD45DB161D flash */
#define ATMEL_FPGA_PAGE 528 /* FPGA flash page size*/
#define ATMEL_SOLOS_PAGE 512 /* Solos flash page size*/
#define ATMEL_FPGA_BLOCK (ATMEL_FPGA_PAGE * 8) /* FPGA block size*/
#define ATMEL_SOLOS_BLOCK (ATMEL_SOLOS_PAGE * 8) /* Solos block size*/
/* Current boards use M25P/M25PE SPI flash */
#define SPI_FLASH_BLOCK (256 * 64)
#define RX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2)
#define TX_BUF(card, nr) ((card->buffers) + (nr)*(card->buffer_size)*2 + (card->buffer_size))
#define FLASH_BUF ((card->buffers) + 4*(card->buffer_size)*2)
#define RX_DMA_SIZE 2048
#define FPGA_VERSION(a,b) (((a) << 8) + (b))
#define LEGACY_BUFFERS 2
#define DMA_SUPPORTED 4
static int reset = 0;
static int atmdebug = 0;
static int firmware_upgrade = 0;
static int fpga_upgrade = 0;
static int db_firmware_upgrade = 0;
static int db_fpga_upgrade = 0;
struct pkt_hdr {
__le16 size;
__le16 vpi;
__le16 vci;
__le16 type;
};
struct solos_skb_cb {
struct atm_vcc *vcc;
uint32_t dma_addr;
};
#define SKB_CB(skb) ((struct solos_skb_cb *)skb->cb)
#define PKT_DATA 0
#define PKT_COMMAND 1
#define PKT_POPEN 3
#define PKT_PCLOSE 4
#define PKT_STATUS 5
struct solos_card {
void __iomem *config_regs;
void __iomem *buffers;
int nr_ports;
int tx_mask;
struct pci_dev *dev;
struct atm_dev *atmdev[4];
struct tasklet_struct tlet;
spinlock_t tx_lock;
spinlock_t tx_queue_lock;
spinlock_t cli_queue_lock;
spinlock_t param_queue_lock;
struct list_head param_queue;
struct sk_buff_head tx_queue[4];
struct sk_buff_head cli_queue[4];
struct sk_buff *tx_skb[4];
struct sk_buff *rx_skb[4];
unsigned char *dma_bounce;
wait_queue_head_t param_wq;
wait_queue_head_t fw_wq;
int using_dma;
int dma_alignment;
int fpga_version;
int buffer_size;
int atmel_flash;
};
struct solos_param {
struct list_head list;
pid_t pid;
int port;
struct sk_buff *response;
};
#define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
MODULE_AUTHOR("Traverse Technologies <[email protected]>");
MODULE_DESCRIPTION("Solos PCI driver");
MODULE_VERSION(VERSION);
MODULE_LICENSE("GPL");
MODULE_FIRMWARE("solos-FPGA.bin");
MODULE_FIRMWARE("solos-Firmware.bin");
MODULE_FIRMWARE("solos-db-FPGA.bin");
MODULE_PARM_DESC(reset, "Reset Solos chips on startup");
MODULE_PARM_DESC(atmdebug, "Print ATM data");
MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
MODULE_PARM_DESC(db_firmware_upgrade, "Initiate daughter board Solos firmware upgrade");
MODULE_PARM_DESC(db_fpga_upgrade, "Initiate daughter board FPGA upgrade");
module_param(reset, int, 0444);
module_param(atmdebug, int, 0644);
module_param(firmware_upgrade, int, 0444);
module_param(fpga_upgrade, int, 0444);
module_param(db_firmware_upgrade, int, 0444);
module_param(db_fpga_upgrade, int, 0444);
static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
struct atm_vcc *vcc);
static uint32_t fpga_tx(struct solos_card *);
static irqreturn_t solos_irq(int irq, void *dev_id);
static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
static int atm_init(struct solos_card *, struct device *);
static void atm_remove(struct solos_card *);
static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
static void solos_bh(unsigned long);
static int print_buffer(struct sk_buff *buf);
static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
{
if (vcc->pop)
vcc->pop(vcc, skb);
else
dev_kfree_skb_any(skb);
}
static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
struct solos_card *card = atmdev->dev_data;
struct solos_param prm;
struct sk_buff *skb;
struct pkt_hdr *header;
int buflen;
buflen = strlen(attr->attr.name) + 10;
skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
if (!skb) {
dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
return -ENOMEM;
}
header = (void *)skb_put(skb, sizeof(*header));
buflen = snprintf((void *)&header[1], buflen - 1,
"L%05d\n%s\n", current->pid, attr->attr.name);
skb_put(skb, buflen);
header->size = cpu_to_le16(buflen);
header->vpi = cpu_to_le16(0);
header->vci = cpu_to_le16(0);
header->type = cpu_to_le16(PKT_COMMAND);
prm.pid = current->pid;
prm.response = NULL;
prm.port = SOLOS_CHAN(atmdev);
spin_lock_irq(&card->param_queue_lock);
list_add(&prm.list, &card->param_queue);
spin_unlock_irq(&card->param_queue_lock);
fpga_queue(card, prm.port, skb, NULL);
wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
spin_lock_irq(&card->param_queue_lock);
list_del(&prm.list);
spin_unlock_irq(&card->param_queue_lock);
if (!prm.response)
return -EIO;
buflen = prm.response->len;
memcpy(buf, prm.response->data, buflen);
kfree_skb(prm.response);
return buflen;
}
static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
struct solos_card *card = atmdev->dev_data;
struct solos_param prm;
struct sk_buff *skb;
struct pkt_hdr *header;
int buflen;
ssize_t ret;
buflen = strlen(attr->attr.name) + 11 + count;
skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
if (!skb) {
dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
return -ENOMEM;
}
header = (void *)skb_put(skb, sizeof(*header));
buflen = snprintf((void *)&header[1], buflen - 1,
"L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
skb_put(skb, buflen);
header->size = cpu_to_le16(buflen);
header->vpi = cpu_to_le16(0);
header->vci = cpu_to_le16(0);
header->type = cpu_to_le16(PKT_COMMAND);
prm.pid = current->pid;
prm.response = NULL;
prm.port = SOLOS_CHAN(atmdev);
spin_lock_irq(&card->param_queue_lock);
list_add(&prm.list, &card->param_queue);
spin_unlock_irq(&card->param_queue_lock);
fpga_queue(card, prm.port, skb, NULL);
wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
spin_lock_irq(&card->param_queue_lock);
list_del(&prm.list);
spin_unlock_irq(&card->param_queue_lock);
skb = prm.response;
if (!skb)
return -EIO;
buflen = skb->len;
/* Sometimes it has a newline, sometimes it doesn't. */
if (skb->data[buflen - 1] == '\n')
buflen--;
if (buflen == 2 && !strncmp(skb->data, "OK", 2))
ret = count;
else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
ret = -EIO;
else {
/* We know we have enough space allocated for this; we allocated
it ourselves */
skb->data[buflen] = 0;
dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
skb->data);
ret = -EIO;
}
kfree_skb(skb);
return ret;
}
static char *next_string(struct sk_buff *skb)
{
int i = 0;
char *this = skb->data;
for (i = 0; i < skb->len; i++) {
if (this[i] == '\n') {
this[i] = 0;
skb_pull(skb, i + 1);
return this;
}
if (!isprint(this[i]))
return NULL;
}
return NULL;
}
/*
* Status packet has fields separated by \n, starting with a version number
* for the information therein. Fields are....
*
* packet version
* RxBitRate (version >= 1)
* TxBitRate (version >= 1)
* State (version >= 1)
* LocalSNRMargin (version >= 1)
* LocalLineAttn (version >= 1)
*/
static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
{
char *str, *end, *state_str, *snr, *attn;
int ver, rate_up, rate_down;
if (!card->atmdev[port])
return -ENODEV;
str = next_string(skb);
if (!str)
return -EIO;
ver = simple_strtol(str, NULL, 10);
if (ver < 1) {
dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
ver);
return -EIO;
}
str = next_string(skb);
if (!str)
return -EIO;
if (!strcmp(str, "ERROR")) {
dev_dbg(&card->dev->dev, "Status packet indicated Solos error on port %d (starting up?)\n",
port);
return 0;
}
rate_down = simple_strtol(str, &end, 10);
if (*end)
return -EIO;
str = next_string(skb);
if (!str)
return -EIO;
rate_up = simple_strtol(str, &end, 10);
if (*end)
return -EIO;
state_str = next_string(skb);
if (!state_str)
return -EIO;
/* Anything but 'Showtime' is down */
if (strcmp(state_str, "Showtime")) {
atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_LOST);
dev_info(&card->dev->dev, "Port %d: %s\n", port, state_str);
return 0;
}
snr = next_string(skb);
if (!snr)
return -EIO;
attn = next_string(skb);
if (!attn)
return -EIO;
dev_info(&card->dev->dev, "Port %d: %s @%d/%d kb/s%s%s%s%s\n",
port, state_str, rate_down/1000, rate_up/1000,
snr[0]?", SNR ":"", snr, attn[0]?", Attn ":"", attn);
card->atmdev[port]->link_rate = rate_down / 424;
atm_dev_signal_change(card->atmdev[port], ATM_PHY_SIG_FOUND);
return 0;
}
static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
{
struct solos_param *prm;
unsigned long flags;
int cmdpid;
int found = 0;
if (skb->len < 7)
return 0;
if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
!isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
!isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
skb->data[6] != '\n')
return 0;
cmdpid = simple_strtol(&skb->data[1], NULL, 10);
spin_lock_irqsave(&card->param_queue_lock, flags);
list_for_each_entry(prm, &card->param_queue, list) {
if (prm->port == port && prm->pid == cmdpid) {
prm->response = skb;
skb_pull(skb, 7);
wake_up(&card->param_wq);
found = 1;
break;
}
}
spin_unlock_irqrestore(&card->param_queue_lock, flags);
return found;
}
static ssize_t console_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
struct solos_card *card = atmdev->dev_data;
struct sk_buff *skb;
unsigned int len;
spin_lock(&card->cli_queue_lock);
skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
spin_unlock(&card->cli_queue_lock);
if(skb == NULL)
return sprintf(buf, "No data.\n");
len = skb->len;
memcpy(buf, skb->data, len);
kfree_skb(skb);
return len;
}
static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
{
struct sk_buff *skb;
struct pkt_hdr *header;
if (size > (BUF_SIZE - sizeof(*header))) {
dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
return 0;
}
skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
if (!skb) {
dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
return 0;
}
header = (void *)skb_put(skb, sizeof(*header));
header->size = cpu_to_le16(size);
header->vpi = cpu_to_le16(0);
header->vci = cpu_to_le16(0);
header->type = cpu_to_le16(PKT_COMMAND);
memcpy(skb_put(skb, size), buf, size);
fpga_queue(card, dev, skb, NULL);
return 0;
}
static ssize_t console_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
struct solos_card *card = atmdev->dev_data;
int err;
err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
return err?:count;
}
struct geos_gpio_attr {
struct device_attribute attr;
int offset;
};
#define SOLOS_GPIO_ATTR(_name, _mode, _show, _store, _offset) \
struct geos_gpio_attr gpio_attr_##_name = { \
.attr = __ATTR(_name, _mode, _show, _store), \
.offset = _offset }
static ssize_t geos_gpio_store(struct device *dev, struct device_attribute *attr,
const char *buf, size_t count)
{
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
struct solos_card *card = pci_get_drvdata(pdev);
uint32_t data32;
if (count != 1 && (count != 2 || buf[1] != '\n'))
return -EINVAL;
spin_lock_irq(&card->param_queue_lock);
data32 = ioread32(card->config_regs + GPIO_STATUS);
if (buf[0] == '1') {
data32 |= 1 << gattr->offset;
iowrite32(data32, card->config_regs + GPIO_STATUS);
} else if (buf[0] == '0') {
data32 &= ~(1 << gattr->offset);
iowrite32(data32, card->config_regs + GPIO_STATUS);
} else {
count = -EINVAL;
}
spin_unlock_irq(&card->param_queue_lock);
return count;
}
static ssize_t geos_gpio_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
struct solos_card *card = pci_get_drvdata(pdev);
uint32_t data32;
data32 = ioread32(card->config_regs + GPIO_STATUS);
data32 = (data32 >> gattr->offset) & 1;
return sprintf(buf, "%d\n", data32);
}
static ssize_t hardware_show(struct device *dev, struct device_attribute *attr,
char *buf)
{
struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
struct geos_gpio_attr *gattr = container_of(attr, struct geos_gpio_attr, attr);
struct solos_card *card = pci_get_drvdata(pdev);
uint32_t data32;
data32 = ioread32(card->config_regs + GPIO_STATUS);
switch (gattr->offset) {
case 0:
/* HardwareVersion */
data32 = data32 & 0x1F;
break;
case 1:
/* HardwareVariant */
data32 = (data32 >> 5) & 0x0F;
break;
}
return sprintf(buf, "%d\n", data32);
}
static DEVICE_ATTR(console, 0644, console_show, console_store);
#define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
#define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
#include "solos-attrlist.c"
static SOLOS_GPIO_ATTR(GPIO1, 0644, geos_gpio_show, geos_gpio_store, 9);
static SOLOS_GPIO_ATTR(GPIO2, 0644, geos_gpio_show, geos_gpio_store, 10);
static SOLOS_GPIO_ATTR(GPIO3, 0644, geos_gpio_show, geos_gpio_store, 11);
static SOLOS_GPIO_ATTR(GPIO4, 0644, geos_gpio_show, geos_gpio_store, 12);
static SOLOS_GPIO_ATTR(GPIO5, 0644, geos_gpio_show, geos_gpio_store, 13);
static SOLOS_GPIO_ATTR(PushButton, 0444, geos_gpio_show, NULL, 14);
static SOLOS_GPIO_ATTR(HardwareVersion, 0444, hardware_show, NULL, 0);
static SOLOS_GPIO_ATTR(HardwareVariant, 0444, hardware_show, NULL, 1);
#undef SOLOS_ATTR_RO
#undef SOLOS_ATTR_RW
#define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
#define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
static struct attribute *solos_attrs[] = {
#include "solos-attrlist.c"
NULL
};
static struct attribute_group solos_attr_group = {
.attrs = solos_attrs,
.name = "parameters",
};
static struct attribute *gpio_attrs[] = {
&gpio_attr_GPIO1.attr.attr,
&gpio_attr_GPIO2.attr.attr,
&gpio_attr_GPIO3.attr.attr,
&gpio_attr_GPIO4.attr.attr,
&gpio_attr_GPIO5.attr.attr,
&gpio_attr_PushButton.attr.attr,
&gpio_attr_HardwareVersion.attr.attr,
&gpio_attr_HardwareVariant.attr.attr,
NULL
};
static struct attribute_group gpio_attr_group = {
.attrs = gpio_attrs,
.name = "gpio",
};
static int flash_upgrade(struct solos_card *card, int chip)
{
const struct firmware *fw;
const char *fw_name;
int blocksize = 0;
int numblocks = 0;
int offset;
switch (chip) {
case 0:
fw_name = "solos-FPGA.bin";
if (card->atmel_flash)
blocksize = ATMEL_FPGA_BLOCK;
else
blocksize = SPI_FLASH_BLOCK;
break;
case 1:
fw_name = "solos-Firmware.bin";
if (card->atmel_flash)
blocksize = ATMEL_SOLOS_BLOCK;
else
blocksize = SPI_FLASH_BLOCK;
break;
case 2:
if (card->fpga_version > LEGACY_BUFFERS){
fw_name = "solos-db-FPGA.bin";
if (card->atmel_flash)
blocksize = ATMEL_FPGA_BLOCK;
else
blocksize = SPI_FLASH_BLOCK;
} else {
dev_info(&card->dev->dev, "FPGA version doesn't support"
" daughter board upgrades\n");
return -EPERM;
}
break;
case 3:
if (card->fpga_version > LEGACY_BUFFERS){
fw_name = "solos-Firmware.bin";
if (card->atmel_flash)
blocksize = ATMEL_SOLOS_BLOCK;
else
blocksize = SPI_FLASH_BLOCK;
} else {
dev_info(&card->dev->dev, "FPGA version doesn't support"
" daughter board upgrades\n");
return -EPERM;
}
break;
default:
return -ENODEV;
}
if (request_firmware(&fw, fw_name, &card->dev->dev))
return -ENOENT;
dev_info(&card->dev->dev, "Flash upgrade starting\n");
/* New FPGAs require driver version before permitting flash upgrades */
iowrite32(DRIVER_VERSION, card->config_regs + DRIVER_VER);
numblocks = fw->size / blocksize;
dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
iowrite32(1, card->config_regs + FPGA_MODE);
(void) ioread32(card->config_regs + FPGA_MODE);
/* Set mode to Chip Erase */
if(chip == 0 || chip == 2)
dev_info(&card->dev->dev, "Set FPGA Flash mode to FPGA Chip Erase\n");
if(chip == 1 || chip == 3)
dev_info(&card->dev->dev, "Set FPGA Flash mode to Solos Chip Erase\n");
iowrite32((chip * 2), card->config_regs + FLASH_MODE);
iowrite32(1, card->config_regs + WRITE_FLASH);
wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
for (offset = 0; offset < fw->size; offset += blocksize) {
int i;
/* Clear write flag */
iowrite32(0, card->config_regs + WRITE_FLASH);
/* Set mode to Block Write */
/* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
/* Copy block to buffer, swapping each 16 bits for Atmel flash */
for(i = 0; i < blocksize; i += 4) {
uint32_t word;
if (card->atmel_flash)
word = swahb32p((uint32_t *)(fw->data + offset + i));
else
word = *(uint32_t *)(fw->data + offset + i);
if(card->fpga_version > LEGACY_BUFFERS)
iowrite32(word, FLASH_BUF + i);
else
iowrite32(word, RX_BUF(card, 3) + i);
}
/* Specify block number and then trigger flash write */
iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
iowrite32(1, card->config_regs + WRITE_FLASH);
wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
}
release_firmware(fw);
iowrite32(0, card->config_regs + WRITE_FLASH);
iowrite32(0, card->config_regs + FPGA_MODE);
iowrite32(0, card->config_regs + FLASH_MODE);
dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
return 0;
}
static irqreturn_t solos_irq(int irq, void *dev_id)
{
struct solos_card *card = dev_id;
int handled = 1;
iowrite32(0, card->config_regs + IRQ_CLEAR);
/* If we're up and running, just kick the tasklet to process TX/RX */
if (card->atmdev[0])
tasklet_schedule(&card->tlet);
else
wake_up(&card->fw_wq);
return IRQ_RETVAL(handled);
}
static void solos_bh(unsigned long card_arg)
{
struct solos_card *card = (void *)card_arg;
uint32_t card_flags;
uint32_t rx_done = 0;
int port;
/*
* Since fpga_tx() is going to need to read the flags under its lock,
* it can return them to us so that we don't have to hit PCI MMIO
* again for the same information
*/
card_flags = fpga_tx(card);
for (port = 0; port < card->nr_ports; port++) {
if (card_flags & (0x10 << port)) {
struct pkt_hdr _hdr, *header;
struct sk_buff *skb;
struct atm_vcc *vcc;
int size;
if (card->using_dma) {
skb = card->rx_skb[port];
card->rx_skb[port] = NULL;
pci_unmap_single(card->dev, SKB_CB(skb)->dma_addr,
RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
header = (void *)skb->data;
size = le16_to_cpu(header->size);
skb_put(skb, size + sizeof(*header));
skb_pull(skb, sizeof(*header));
} else {
header = &_hdr;
rx_done |= 0x10 << port;
memcpy_fromio(header, RX_BUF(card, port), sizeof(*header));
size = le16_to_cpu(header->size);
if (size > (card->buffer_size - sizeof(*header))){
dev_warn(&card->dev->dev, "Invalid buffer size\n");
continue;
}
skb = alloc_skb(size + 1, GFP_ATOMIC);
if (!skb) {
if (net_ratelimit())
dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
continue;
}
memcpy_fromio(skb_put(skb, size),
RX_BUF(card, port) + sizeof(*header),
size);
}
if (atmdebug) {
dev_info(&card->dev->dev, "Received: port %d\n", port);
dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
size, le16_to_cpu(header->vpi),
le16_to_cpu(header->vci));
print_buffer(skb);
}
switch (le16_to_cpu(header->type)) {
case PKT_DATA:
vcc = find_vcc(card->atmdev[port], le16_to_cpu(header->vpi),
le16_to_cpu(header->vci));
if (!vcc) {
if (net_ratelimit())
dev_warn(&card->dev->dev, "Received packet for unknown VPI.VCI %d.%d on port %d\n",
le16_to_cpu(header->vpi), le16_to_cpu(header->vci),
port);
dev_kfree_skb_any(skb);
break;
}
atm_charge(vcc, skb->truesize);
vcc->push(vcc, skb);
atomic_inc(&vcc->stats->rx);
break;
case PKT_STATUS:
if (process_status(card, port, skb) &&
net_ratelimit()) {
dev_warn(&card->dev->dev, "Bad status packet of %d bytes on port %d:\n", skb->len, port);
print_buffer(skb);
}
dev_kfree_skb_any(skb);
break;
case PKT_COMMAND:
default: /* FIXME: Not really, surely? */
if (process_command(card, port, skb))
break;
spin_lock(&card->cli_queue_lock);
if (skb_queue_len(&card->cli_queue[port]) > 10) {
if (net_ratelimit())
dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
port);
dev_kfree_skb_any(skb);
} else
skb_queue_tail(&card->cli_queue[port], skb);
spin_unlock(&card->cli_queue_lock);
break;
}
}
/* Allocate RX skbs for any ports which need them */
if (card->using_dma && card->atmdev[port] &&
!card->rx_skb[port]) {
struct sk_buff *skb = alloc_skb(RX_DMA_SIZE, GFP_ATOMIC);
if (skb) {
SKB_CB(skb)->dma_addr =
pci_map_single(card->dev, skb->data,
RX_DMA_SIZE, PCI_DMA_FROMDEVICE);
iowrite32(SKB_CB(skb)->dma_addr,
card->config_regs + RX_DMA_ADDR(port));
card->rx_skb[port] = skb;
} else {
if (net_ratelimit())
dev_warn(&card->dev->dev, "Failed to allocate RX skb");
/* We'll have to try again later */
tasklet_schedule(&card->tlet);
}
}
}
if (rx_done)
iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
return;
}
static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
{
struct hlist_head *head;
struct atm_vcc *vcc = NULL;
struct sock *s;
read_lock(&vcc_sklist_lock);
head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
sk_for_each(s, head) {
vcc = atm_sk(s);
if (vcc->dev == dev && vcc->vci == vci &&
vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE &&
test_bit(ATM_VF_READY, &vcc->flags))
goto out;
}
vcc = NULL;
out:
read_unlock(&vcc_sklist_lock);
return vcc;
}
static int popen(struct atm_vcc *vcc)
{
struct solos_card *card = vcc->dev->dev_data;
struct sk_buff *skb;
struct pkt_hdr *header;
if (vcc->qos.aal != ATM_AAL5) {
dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
vcc->qos.aal);
return -EINVAL;
}
skb = alloc_skb(sizeof(*header), GFP_KERNEL);
if (!skb) {
if (net_ratelimit())
dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
return -ENOMEM;
}
header = (void *)skb_put(skb, sizeof(*header));
header->size = cpu_to_le16(0);
header->vpi = cpu_to_le16(vcc->vpi);
header->vci = cpu_to_le16(vcc->vci);
header->type = cpu_to_le16(PKT_POPEN);
fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
set_bit(ATM_VF_ADDR, &vcc->flags);
set_bit(ATM_VF_READY, &vcc->flags);
return 0;
}
static void pclose(struct atm_vcc *vcc)
{
struct solos_card *card = vcc->dev->dev_data;
unsigned char port = SOLOS_CHAN(vcc->dev);
struct sk_buff *skb, *tmpskb;
struct pkt_hdr *header;
/* Remove any yet-to-be-transmitted packets from the pending queue */
spin_lock(&card->tx_queue_lock);
skb_queue_walk_safe(&card->tx_queue[port], skb, tmpskb) {
if (SKB_CB(skb)->vcc == vcc) {
skb_unlink(skb, &card->tx_queue[port]);
solos_pop(vcc, skb);
}
}
spin_unlock(&card->tx_queue_lock);
skb = alloc_skb(sizeof(*header), GFP_KERNEL);
if (!skb) {
dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
return;
}
header = (void *)skb_put(skb, sizeof(*header));
header->size = cpu_to_le16(0);
header->vpi = cpu_to_le16(vcc->vpi);
header->vci = cpu_to_le16(vcc->vci);
header->type = cpu_to_le16(PKT_PCLOSE);
skb_get(skb);
fpga_queue(card, port, skb, NULL);
if (!wait_event_timeout(card->param_wq, !skb_shared(skb), 5 * HZ))
dev_warn(&card->dev->dev,
"Timeout waiting for VCC close on port %d\n", port);
dev_kfree_skb(skb);
/* Hold up vcc_destroy_socket() (our caller) until solos_bh() in the
tasklet has finished processing any incoming packets (and, more to
the point, using the vcc pointer). */
tasklet_unlock_wait(&card->tlet);
clear_bit(ATM_VF_ADDR, &vcc->flags);
return;
}
static int print_buffer(struct sk_buff *buf)
{
int len,i;
char msg[500];