IOPadIOVss and IOPadVss don't have strong TopMetal2 connections.

[smunaut]

If you look at the Vdd pads, they have very strong connection to the rings through TopMetal2.

For instance here's IOPadIOVdd, you can see the direct connection on the bottom pad.

But the top pad is a IOPadIOVss which should connect to the IOVss ring which is right next to it, but instead of having a strong connection through the thick TopMetal2, it goes all the way down to Metal2, through quite the via stack ...

What I think it should be doing is something like:

(this is just an edited image, I haven't implemented it).

Same issue is present for IOPadVss. The IOPadVdd has a strong connection cutting the through IO ring on TopMetal2 to directly reach the Vdd ring, but the Vss one does not and again goes through a lot of via and down to a thin lower metal layer.

[sergeiandreyev]

Hi @stafverhaegen-chipflow, FYI

[stafverhaegen-chipflow]

I have a quick fix in my code for IOPadIOVss. I can provide gds but this is without the ptap changes that have been done at IHP.
For IOPadVss I am holding off for more analysis and the change is a little more involved. I did use top metal for IOPadVdd as there Metal2 was used for internal routing.
Also weak is I think an exaggeration, I would call it non-ideal :) IOPadVss is meant for digital core ground and I expect IR-drop problems on the logic before electromigration problem due to current density. Said otherwise if the number of IOPadVss/IOPadVdd pairs would be so low that one would have electromigration problems due to the high current I would also expect IR-drop problems in the core.