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3 stars written in Verilog
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HDLBits website practices & solutions

Verilog 697 178 Updated Dec 27, 2023

Implementation of CNN on ZYNQ FPGA to classify handwritten numbers using MNIST database

Verilog 420 97 Updated Feb 19, 2021

You can run it on pynq z1. The repository contains the relevant Verilog code, Vivado configuration and C code for sdk testing. The size of the systolic array can be changed, now it is 16X16.

Verilog 136 11 Updated Mar 24, 2024