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Commits on Mar 25, 2015

• Add new API and start to provide access information for instruction operands

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  aquynh

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Commits on Mar 23, 2015

• Merge branch 'next' into newapi

  aquynh

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Commits on Mar 22, 2015

• arm: fix some instructions in insn_ops[] where GPRwithAPSR & addr_offset_non should be considered for register access. issue reported by @derrekr

  aquynh

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• arm: fix some instructions in insn_ops[] where GPRwithAPSR & addr_offset_non should be considered for register access. issue reported by @derrekr

  aquynh

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• core: rename operand access symbols from CS_OP_* to CS_AC_*

  aquynh

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• core: rename operand access symbols from CS_OP_* to CS_AC_*

  aquynh

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• arm: some fixes for insn_ops[] where some registers should be considered for accessing. issue reported by @derrek

  aquynh

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• arm: fix lots of issues with insn_op[], and move it to a separate file ARMMappingInsnOp.inc

  aquynh

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Commits on Mar 21, 2015

• README: add Lua to the list of binding languages

  aquynh

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Commits on Mar 20, 2015

• x86: more fix for lots of OP_NOREG in insn_ops[]. also renamed it to OP_IGNORE

  aquynh

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• x86: print interrupt number of INT instruction in positive form. bug reported by @pancake

  aquynh

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• x86: fix lots of issues with insn_op[], and move it to a separate file X86MappingInsnOp.inc

  aquynh

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Commits on Mar 19, 2015

• python: simplify setup.py

  aquynh

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• python: properly build the core in Cygwin environment for setup.py

  

  tacoxnguyen

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  aquynh

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Commits on Mar 18, 2015

• Fixed capstone-engine#289

  

  MarioVilas

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  aquynh

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Commits on Mar 16, 2015

• bindings: add ARM64_GRP_CALL & ARM64_GRP_RET groups after the related change in the core

  aquynh

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• arm64: use symbol rather than constant (128) for calculating group name in AArch64_group_name()

  aquynh

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• Merge branch 'AArch64Details' of https://github.com/DavidCallahan/capstone into test3

  aquynh

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• Change AArch64 GRP_JUMP to use a static table implementation

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  DavidCallahan

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Commits on Mar 14, 2015

• x86: fix Immediate operand size when first register operand is embedded in mnemonic (CMP8i8). bug reported by @joelpx

  aquynh

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Commits on Mar 12, 2015

• bindings: add {ARM|ARM6}GRP_PRIVILEGE

  aquynh

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• Merge branch 'next' of https://github.com/aquynh/capstone into next

  aquynh

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• Merge pull request capstone-engine#279 from radare/arm64-priv

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  aquynh

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• Merge pull request capstone-engine#278 from radare/arm-priv

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• bindings: support QPX mode & QPX alias instructions

  aquynh

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• ppc: fix a bug in QPX mode & add some QPX alias instructions.

  aquynh

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Commits on Mar 11, 2015

• ppc: add missing groups to group_name_maps[]. bug reported by Coverity

  aquynh

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• arm: add the missing Virtualization group to group_name_maps[]. bug reported by Coverity

  aquynh

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• RELEASE_NOTES

  aquynh

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• update ChangeLog for 3.0.2

  aquynh

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• TODO

  aquynh

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• x86: remove unsed field @prefixLocations of InternalInstruction struct

  aquynh

  committed
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• x86: F2 can be a part of instruction encoding, but not a prefix

  aquynh

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• Fix ARM64_GRP_PRIVILEGE

  radare

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• Fix ARM_GRP_PRIVILEGE

  radare

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