From bc46dfac2f21756642e549b05689e03db538639f Mon Sep 17 00:00:00 2001 From: Jayachandran Chandrasekharan Nair Date: Tue, 10 Jul 2012 11:48:54 +0530 Subject: [PATCH 01/17] net: tftp: fix type of block arg to store_block The block argument for store_block can be -1 when the tftp sequence number rolls over (i.e TftpBlock == 0), so the first argument to store_block has to be of type 'int' instead of 'unsigned'. In our environment (gcc 4.4.5 mips toolchain), this causes incorrect 'offset' to be generated for storing the block, and the tftp block with number 0 will be written elsewhere, resulting in a bad block in the downloaded file and a memory corruption. Signed-off-by: Jayachandran Chandrasekharan Nair --- net/tftp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/tftp.c b/net/tftp.c index b2e08b4bfb3d..59a8ebb3cf33 100644 --- a/net/tftp.c +++ b/net/tftp.c @@ -156,7 +156,7 @@ mcast_cleanup(void) #endif /* CONFIG_MCAST_TFTP */ static inline void -store_block(unsigned block, uchar *src, unsigned len) +store_block(int block, uchar *src, unsigned len) { ulong offset = block * TftpBlkSize + TftpBlockWrapOffset; ulong newsize = offset + len; From 6e5b9ac097689e96d53f638842823fb1d1bf4223 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Thu, 5 Jul 2012 10:33:18 +0000 Subject: [PATCH 02/17] phylib: phy_startup() should return an error code on failure phy_startup() calls the PHY driver's startup function, but it ignores the return code from that function, and so it never returns any failures. Signed-off-by: Timur Tabi --- drivers/net/phy/phy.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 7d327f766a2c..baef60f82746 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -723,10 +723,13 @@ struct phy_device *phy_connect(struct mii_dev *bus, int addr, return phydev; } +/* + * Start the PHY. Returns 0 on success, or a negative error code. + */ int phy_startup(struct phy_device *phydev) { if (phydev->drv->startup) - phydev->drv->startup(phydev); + return phydev->drv->startup(phydev); return 0; } From 11af8d65274df736deeb651d12e0763eec527ea5 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Mon, 9 Jul 2012 08:52:43 +0000 Subject: [PATCH 03/17] net: abort network initialization if the PHY driver fails Now that phy_startup() can return an actual error code, check for that error code and abort network initialization if the PHY fails. Signed-off-by: Timur Tabi Acked-by: Nobuhiro Iwamamatsu (sh_eth part) Acked-by: Stephan Linz (Xilinx part, xilinx_axi_emac and xilinx_ll_temac) Reviewed-by: Marek Vasut (FEC part) --- drivers/net/fec_mxc.c | 8 +++++++- drivers/net/fm/eth.c | 9 ++++++++- drivers/net/sh_eth.c | 6 +++++- drivers/net/tsec.c | 8 +++++++- drivers/net/xilinx_axi_emac.c | 6 +++++- drivers/net/xilinx_ll_temac.c | 8 +++++++- 6 files changed, 39 insertions(+), 6 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index eee41d7c8b77..57005521899e 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -510,7 +510,13 @@ static int fec_open(struct eth_device *edev) fec_eth_phy_config(edev); if (fec->phydev) { /* Start up the PHY */ - phy_startup(fec->phydev); + int ret = phy_startup(fec->phydev); + + if (ret) { + printf("Could not initialize PHY %s\n", + fec->phydev->dev->name); + return ret; + } speed = fec->phydev->speed; } else { speed = _100BASET; diff --git a/drivers/net/fm/eth.c b/drivers/net/fm/eth.c index f34f4db6b605..2b616adb6e54 100644 --- a/drivers/net/fm/eth.c +++ b/drivers/net/fm/eth.c @@ -363,6 +363,9 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) { struct fm_eth *fm_eth; struct fsl_enet_mac *mac; +#ifdef CONFIG_PHYLIB + int ret; +#endif fm_eth = (struct fm_eth *)dev->priv; mac = fm_eth->mac; @@ -384,7 +387,11 @@ static int fm_eth_open(struct eth_device *dev, bd_t *bd) fmc_tx_port_graceful_stop_disable(fm_eth); #ifdef CONFIG_PHYLIB - phy_startup(fm_eth->phydev); + ret = phy_startup(fm_eth->phydev); + if (ret) { + printf("%s: Could not initialize\n", fm_eth->phydev->dev->name); + return ret; + } #else fm_eth->phydev->speed = SPEED_1000; fm_eth->phydev->link = 1; diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index bb57e4d53a03..268d88428c02 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -415,7 +415,11 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) goto err_phy_cfg; } phy = port_info->phydev; - phy_startup(phy); + ret = phy_startup(phy); + if (ret) { + printf(SHETHER_NAME ": phy startup failure\n"); + return ret; + } val = 0; diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c index 3c1c8f0799c4..f5e314b9ee06 100644 --- a/drivers/net/tsec.c +++ b/drivers/net/tsec.c @@ -480,6 +480,7 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) int i; struct tsec_private *priv = (struct tsec_private *)dev->priv; tsec_t *regs = priv->regs; + int ret; /* Make sure the controller is stopped */ tsec_halt(dev); @@ -511,7 +512,12 @@ static int tsec_init(struct eth_device *dev, bd_t * bd) startup_tsec(dev); /* Start up the PHY */ - phy_startup(priv->phydev); + ret = phy_startup(priv->phydev); + if (ret) { + printf("Could not initialize PHY %s\n", + priv->phydev->dev->name); + return ret; + } adjust_link(priv, priv->phydev); diff --git a/drivers/net/xilinx_axi_emac.c b/drivers/net/xilinx_axi_emac.c index 7854a04cae1b..d77714440ad4 100644 --- a/drivers/net/xilinx_axi_emac.c +++ b/drivers/net/xilinx_axi_emac.c @@ -272,7 +272,11 @@ static int setup_phy(struct eth_device *dev) phydev->advertising = phydev->supported; priv->phydev = phydev; phy_config(phydev); - phy_startup(phydev); + if (phy_startup(phydev)) { + printf("axiemac: could not initialize PHY %s\n", + phydev->dev->name); + return 0; + } switch (phydev->speed) { case 1000: diff --git a/drivers/net/xilinx_ll_temac.c b/drivers/net/xilinx_ll_temac.c index 27dafc15c00e..b67153bec89d 100644 --- a/drivers/net/xilinx_ll_temac.c +++ b/drivers/net/xilinx_ll_temac.c @@ -232,6 +232,7 @@ static void ll_temac_halt(struct eth_device *dev) static int ll_temac_init(struct eth_device *dev, bd_t *bis) { struct ll_temac *ll_temac = dev->priv; + int ret; printf("%s: Xilinx XPS LocalLink Tri-Mode Ether MAC #%d at 0x%08X.\n", dev->name, dev->index, dev->iobase); @@ -240,7 +241,12 @@ static int ll_temac_init(struct eth_device *dev, bd_t *bis) return -1; /* Start up the PHY */ - phy_startup(ll_temac->phydev); + ret = phy_startup(ll_temac->phydev); + if (ret) { + printf("%s: Could not initialize PHY %s\n", + dev->name, ll_temac->phydev->dev->name); + return ret; + } if (!ll_temac_adjust_link(dev)) { ll_temac_halt(dev); From cc5f552283eceb08bc614dfb6cfbcdd155be35b0 Mon Sep 17 00:00:00 2001 From: Troy Kisky Date: Thu, 28 Jun 2012 08:00:28 +0000 Subject: [PATCH 04/17] net: phy: micrel: make ksz9021 phy accessible Micrel accidentally used the same part number for the KS8721 and KSZ9021. So, both cannot be in the same build of u-boot. Add a config option to handle this. Signed-off-by: Troy Kisky Acked-by: Vladimir Zapolskiy --- drivers/net/phy/micrel.c | 15 +++++++++++++-- include/configs/mx6qsabrelite.h | 1 + 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c index e3043dfa207c..30f326489747 100644 --- a/drivers/net/phy/micrel.c +++ b/drivers/net/phy/micrel.c @@ -35,6 +35,12 @@ static struct phy_driver KSZ804_driver = { .shutdown = &genphy_shutdown, }; +#ifndef CONFIG_PHY_MICREL_KSZ9021 +/* + * I can't believe Micrel used the exact same part number + * for the KSZ9021 + * Shame Micrel, Shame!!!!! + */ static struct phy_driver KS8721_driver = { .name = "Micrel KS8721BL", .uid = 0x221610, @@ -44,7 +50,9 @@ static struct phy_driver KS8721_driver = { .startup = &genphy_startup, .shutdown = &genphy_shutdown, }; +#endif +#ifdef CONFIG_PHY_MICREL_KSZ9021 /* ksz9021 PHY Registers */ #define MII_KSZ9021_EXTENDED_CTRL 0x0b #define MII_KSZ9021_EXTENDED_DATAW 0x0c @@ -127,12 +135,15 @@ static struct phy_driver ksz9021_driver = { .startup = &ksz9021_startup, .shutdown = &genphy_shutdown, }; +#endif int phy_micrel_init(void) { phy_register(&KSZ804_driver); - phy_register(&KS8721_driver); +#ifdef CONFIG_PHY_MICREL_KSZ9021 phy_register(&ksz9021_driver); - +#else + phy_register(&KS8721_driver); +#endif return 0; } diff --git a/include/configs/mx6qsabrelite.h b/include/configs/mx6qsabrelite.h index fd25fafeabd3..c66229c8024c 100644 --- a/include/configs/mx6qsabrelite.h +++ b/include/configs/mx6qsabrelite.h @@ -96,6 +96,7 @@ #define CONFIG_FEC_MXC_PHYADDR 6 #define CONFIG_PHYLIB #define CONFIG_PHY_MICREL +#define CONFIG_PHY_MICREL_KSZ9021 /* USB Configs */ #define CONFIG_CMD_USB From c59ab0921fcc99db87efa02022f4ca39dad975b2 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 24 Jun 2012 14:17:56 +0000 Subject: [PATCH 05/17] CACHE: net: asix: Fix asix driver to work with data cache on The asix driver did not align buffers, therefore it didn't work with data cache enabled. Fix this. Signed-off-by: Marek Vasut Cc: Joe Hershberger Acked-by: Joe Hershberger --- drivers/usb/eth/asix.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) diff --git a/drivers/usb/eth/asix.c b/drivers/usb/eth/asix.c index a3bf51a64d71..8fb7fc8c90e5 100644 --- a/drivers/usb/eth/asix.c +++ b/drivers/usb/eth/asix.c @@ -168,27 +168,28 @@ static inline int asix_set_hw_mii(struct ueth_data *dev) static int asix_mdio_read(struct ueth_data *dev, int phy_id, int loc) { - __le16 res; + ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1); asix_set_sw_mii(dev); - asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, &res); + asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, res); asix_set_hw_mii(dev); debug("asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", - phy_id, loc, le16_to_cpu(res)); + phy_id, loc, le16_to_cpu(*res)); - return le16_to_cpu(res); + return le16_to_cpu(*res); } static void asix_mdio_write(struct ueth_data *dev, int phy_id, int loc, int val) { - __le16 res = cpu_to_le16(val); + ALLOC_CACHE_ALIGN_BUFFER(__le16, res, 1); + *res = cpu_to_le16(val); debug("asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", phy_id, loc, val); asix_set_sw_mii(dev); - asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res); + asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, res); asix_set_hw_mii(dev); } @@ -210,7 +211,8 @@ static int asix_sw_reset(struct ueth_data *dev, u8 flags) static inline int asix_get_phy_addr(struct ueth_data *dev) { - u8 buf[2]; + ALLOC_CACHE_ALIGN_BUFFER(u8, buf, 2); + int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf); debug("asix_get_phy_addr()\n"); @@ -242,13 +244,14 @@ static int asix_write_medium_mode(struct ueth_data *dev, u16 mode) static u16 asix_read_rx_ctl(struct ueth_data *dev) { - __le16 v; - int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v); + ALLOC_CACHE_ALIGN_BUFFER(__le16, v, 1); + + int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, v); if (ret < 0) debug("Error reading RX_CTL register: %02x\n", ret); else - ret = le16_to_cpu(v); + ret = le16_to_cpu(*v); return ret; } @@ -313,7 +316,7 @@ static int mii_nway_restart(struct ueth_data *dev) static int asix_init(struct eth_device *eth, bd_t *bd) { int embd_phy; - unsigned char buf[ETH_ALEN]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, buf, ETH_ALEN); u16 rx_ctl; struct ueth_data *dev = (struct ueth_data *)eth->priv; int timeout = 0; @@ -425,7 +428,8 @@ static int asix_send(struct eth_device *eth, void *packet, int length) int err; u32 packet_len; int actual_len; - unsigned char msg[PKTSIZE + sizeof(packet_len)]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, msg, + PKTSIZE + sizeof(packet_len)); debug("** %s(), len %d\n", __func__, length); @@ -452,7 +456,7 @@ static int asix_send(struct eth_device *eth, void *packet, int length) static int asix_recv(struct eth_device *eth) { struct ueth_data *dev = (struct ueth_data *)eth->priv; - static unsigned char recv_buf[AX_RX_URB_SIZE]; + ALLOC_CACHE_ALIGN_BUFFER(unsigned char, recv_buf, AX_RX_URB_SIZE); unsigned char *buf_ptr; int err; int actual_len; From 66f119e50cc854695a3709c67bf6a6c8ef60f6bc Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Fri, 8 Jun 2012 05:26:52 +0000 Subject: [PATCH 06/17] net/designware: Consecutive writes to the same register to be avoided This commit is an add-on to f6c4191f. There are a few registers where consecutive writes to the same location should be avoided or have a delay. According to Synopsys, here is a list of the registers and bit(s) where consecutive writes should be avoided or a delay is required: DMA Registers: Register 0 Bit 7 Register 6 All bits except for 24, 16-13, 2-1. GMAC Registers: Registers 0-3 All bits Registers 6-7 All bits Register 10 All bits Register 11 All bits except for 5-6. Registers 16-47 All bits Register 48 All bits except for 18-16, 14. Register 448 Bit 4. Register 459 Bits 0-3. Signed-off-by: Dinh Nguyen Reviewed-by: Matthew Gerlach Acked-by: Amit Virdi --- drivers/net/designware.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 326d550c1f26..bf21a08bdf47 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -171,8 +171,8 @@ static int dw_eth_init(struct eth_device *dev, bd_t *bis) writel(FIXEDBURST | PRIORXTX_41 | BURST_16, &dma_p->busmode); - writel(FLUSHTXFIFO | readl(&dma_p->opmode), &dma_p->opmode); - writel(STOREFORWARD | TXSECONDFRAME, &dma_p->opmode); + writel(readl(&dma_p->opmode) | FLUSHTXFIFO | STOREFORWARD | + TXSECONDFRAME, &dma_p->opmode); conf = FRAMEBURSTENABLE | DISABLERXOWN; From c88ef3c12dcf8596433d52a2631982d9d3a478dd Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Sat, 14 Apr 2012 18:06:49 +0000 Subject: [PATCH 07/17] net: allow setting env enetaddr from net device setting If the net driver has setup a valid ethernet address and an ethernet address is not set in the environment already, then set the environment variables from the net driver setting. This enables pxe booting on boards which don't set ethaddr env variable. Signed-off-by: Rob Herring --- doc/README.enetaddr | 6 +++++- net/eth.c | 14 ++++++++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/doc/README.enetaddr b/doc/README.enetaddr index 2d8e24f5cb4d..1eaeaf9416ef 100644 --- a/doc/README.enetaddr +++ b/doc/README.enetaddr @@ -32,7 +32,11 @@ Correct flow of setting up the MAC address (summarized): 1. Read from hardware in initialize() function 2. Read from environment in net/eth.c after initialize() -3. Give priority to the value in the environment if a conflict +3. The environment variable will be compared to the driver initialized + struct eth_device->enetaddr. If they differ, a warning is printed, and the + environment variable will be used unchanged. + If the environment variable is not set, it will be initialized from + eth_device->enetaddr, and a warning will be printed. 4. Program the address into hardware if the following conditions are met: a) The relevant driver has a 'write_addr' function b) The user hasn't set an 'ethmacskip' environment variable diff --git a/net/eth.c b/net/eth.c index d526264fa659..6290b332fd37 100644 --- a/net/eth.c +++ b/net/eth.c @@ -62,6 +62,15 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index, return eth_getenv_enetaddr(enetvar, enetaddr); } +int eth_setenv_enetaddr_by_index(const char *base_name, int index, + uchar *enetaddr) +{ + char enetvar[32]; + sprintf(enetvar, index ? "%s%daddr" : "%saddr", base_name, index); + return eth_setenv_enetaddr(enetvar, enetaddr); +} + + static int eth_mac_skip(int index) { char enetvar[15]; @@ -205,6 +214,11 @@ int eth_write_hwaddr(struct eth_device *dev, const char *base_name, } memcpy(dev->enetaddr, env_enetaddr, 6); + } else if (is_valid_ether_addr(dev->enetaddr)) { + eth_setenv_enetaddr_by_index(base_name, eth_number, + dev->enetaddr); + printf("\nWarning: %s using MAC address from net device\n", + dev->name); } if (dev->write_hwaddr && From 154177e14a141468374f438ed3096ab097b79976 Mon Sep 17 00:00:00 2001 From: Joe Hershberger Date: Tue, 10 Jul 2012 16:23:22 -0500 Subject: [PATCH 08/17] net: Inline the new eth_setenv_enetaddr_by_index function This function is currently only used in one case. Inline for now. Signed-off-by: Joe Hershberger --- net/eth.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/net/eth.c b/net/eth.c index 6290b332fd37..1a11ce10277e 100644 --- a/net/eth.c +++ b/net/eth.c @@ -62,7 +62,7 @@ int eth_getenv_enetaddr_by_index(const char *base_name, int index, return eth_getenv_enetaddr(enetvar, enetaddr); } -int eth_setenv_enetaddr_by_index(const char *base_name, int index, +static inline int eth_setenv_enetaddr_by_index(const char *base_name, int index, uchar *enetaddr) { char enetvar[32]; From 48a3e999c86e7e6033133152b07a308def559d46 Mon Sep 17 00:00:00 2001 From: Tetsuyuki Kobayashi Date: Tue, 3 Jul 2012 22:25:21 +0000 Subject: [PATCH 09/17] net: nfs: make NFS_TIMEOUT configurable NFS_TIMEOUT is constant value defined in net/nfs.c. But sometimes it needs to adjust. This patch enables to override NFS_TIMEOUT by defining CONFIG_NFS_TIMEOUT in a board specific config file. Signed-off-by: Tetsuyuki Kobayashi --- README | 7 +++++++ net/nfs.c | 6 +++++- 2 files changed, 12 insertions(+), 1 deletion(-) diff --git a/README b/README index dac46f35b2e3..fb9d904a2eab 100644 --- a/README +++ b/README @@ -2149,6 +2149,13 @@ The following options need to be configured: Timeout waiting for an ARP reply in milliseconds. + CONFIG_NFS_TIMEOUT + + Timeout in milliseconds used in NFS protocol. + If you encounter "ERROR: Cannot umount" in nfs command, + try longer timeout such as + #define CONFIG_NFS_TIMEOUT 10000UL + - Command Interpreter: CONFIG_AUTO_COMPLETE diff --git a/net/nfs.c b/net/nfs.c index 5b9976354cc1..7f2393f6064c 100644 --- a/net/nfs.c +++ b/net/nfs.c @@ -31,7 +31,11 @@ #define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */ #define NFS_RETRY_COUNT 30 -#define NFS_TIMEOUT 2000UL +#ifndef CONFIG_NFS_TIMEOUT +# define NFS_TIMEOUT 2000UL +#else +# define NFS_TIMEOUT CONFIG_NFS_TIMEOUT +#endif static int fs_mounted; static unsigned long rpc_id; From 9d2d924a0a728a4f852a3e9de7aa6cc72c4b460d Mon Sep 17 00:00:00 2001 From: "benoit.thebaudeau@advans" Date: Thu, 19 Jul 2012 02:12:46 +0000 Subject: [PATCH 10/17] net: fec_mxc: Fix setting of RCR for xMII MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit At least on i.MX25, the RMII mode did not work, which is fixed by this patch. The MII_MODE bit of the FEC RCR register means xMII, i.e. 'not 7-wire', so set it accordingly. According to the xMII and 7-wire (aka GPSI) standards, full duplex should be available on xMII, but not on 7-wire, so set FCE accordingly. The FEC may support full duplex for 7-wire too, but the reference manual does not say that, so avoid an invalid assumption. Actually, the choice between half and full duplex also depends on the endpoint/switch/repeater configuration, so a config option could be added for that, but there has been no need for it so far. Signed-off-by: Benoît Thébaudeau Cc: Joe Hershberger Cc: Stefano Babic --- drivers/net/fec_mxc.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index 57005521899e..ddbdd3336f96 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -424,14 +424,12 @@ static void fec_reg_setup(struct fec_priv *fec) /* Start with frame length = 1518, common for all modes. */ rcntrl = PKTSIZE << FEC_RCNTRL_MAX_FL_SHIFT; - if (fec->xcv_type == SEVENWIRE) - rcntrl |= FEC_RCNTRL_FCE; - else if (fec->xcv_type == RGMII) + if (fec->xcv_type != SEVENWIRE) /* xMII modes */ + rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE; + if (fec->xcv_type == RGMII) rcntrl |= FEC_RCNTRL_RGMII; else if (fec->xcv_type == RMII) rcntrl |= FEC_RCNTRL_RMII; - else /* MII mode */ - rcntrl |= FEC_RCNTRL_FCE | FEC_RCNTRL_MII_MODE; writel(rcntrl, &fec->eth->r_cntrl); } From f41471e6a36e70e53bf4cbe4247ff4c0ba87e56f Mon Sep 17 00:00:00 2001 From: "benoit.thebaudeau@advans" Date: Thu, 19 Jul 2012 02:12:58 +0000 Subject: [PATCH 11/17] net: fec_mxc: Fix MDC for xMII MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The MDC signal is available on all xMII (i.e. 'not 7-wire') interfaces, so mii_speed has to be set for all these interfaces, and not only for MII. Signed-off-by: Benoît Thébaudeau Cc: Joe Hershberger Cc: Stefano Babic --- drivers/net/fec_mxc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index ddbdd3336f96..fbfc842aca05 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -603,7 +603,7 @@ static int fec_init(struct eth_device *dev, bd_t* bd) fec_reg_setup(fec); - if (fec->xcv_type == MII10 || fec->xcv_type == MII100) + if (fec->xcv_type != SEVENWIRE) fec_mii_setspeed(fec); /* From 58bef2a5e3833895559a963d6b0c12a73767b2dd Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 26 Jun 2012 16:38:02 +0000 Subject: [PATCH 12/17] net: sh_eth: clean up for the SH7757's code The SH7757's ETHER can work using the SH7724's setting. So, the patch modifies it. Signed-off-by: Yoshihiro Shimoda Acked-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 9 +-------- drivers/net/sh_eth.h | 14 ++------------ 2 files changed, 3 insertions(+), 20 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 268d88428c02..0e8cacbd4109 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -376,12 +376,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port)); /* Configure e-mac registers */ -#if defined(CONFIG_CPU_SH7757) - outl(ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | - ECSIPR_MPDIP | ECSIPR_ICDIP, ECSIPR(port)); -#else outl(0, ECSIPR(port)); -#endif /* Set Mac address */ val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 | @@ -395,14 +390,12 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) outl(0, PIPR(port)); #endif -#if !defined(CONFIG_CPU_SH7724) +#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757) outl(APR_AP, APR(port)); outl(MPR_MP, MPR(port)); #endif #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) outl(TPAUSER_TPAUSE, TPAUSER(port)); -#elif defined(CONFIG_CPU_SH7757) - outl(TPAUSER_UNLIMITED, TPAUSER(port)); #endif #if defined(CONFIG_CPU_SH7734) diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 50f4b69cd312..5276be32838d 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -319,7 +319,7 @@ enum EESR_BIT { EESR_FTC = 0x00200000, EESR_TDE = 0x00100000, EESR_TFE = 0x00080000, EESR_FRC = 0x00040000, EESR_RDE = 0x00020000, EESR_RFE = 0x00010000, -#if defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757) +#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) EESR_CND = 0x00000800, #endif EESR_DLC = 0x00000400, @@ -426,9 +426,7 @@ enum FELIC_MODE_BIT { #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \ ECMR_TXF | ECMR_MCT) -#elif CONFIG_CPU_SH7757 -#define ECMR_CHG_DM (ECMR_ZPF) -#elif CONFIG_CPU_SH7724 +#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757 #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF) #else #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) @@ -473,20 +471,12 @@ enum ECSIPR_STATUS_MASK_BIT { /* APR */ enum APR_BIT { -#ifdef CONFIG_CPU_SH7757 - APR_AP = 0x00000001, -#else APR_AP = 0x00000004, -#endif }; /* MPR */ enum MPR_BIT { -#ifdef CONFIG_CPU_SH7757 - MPR_MP = 0x00000001, -#else MPR_MP = 0x00000006, -#endif }; /* TRSCER */ From 262350932c0e6ffcf67d4c6791a4743c0e1f5c1b Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 26 Jun 2012 16:38:06 +0000 Subject: [PATCH 13/17] net: sh_eth: add SH_ETH_TYPE_ condition At the moment, the driver supports the following CPUs: - GETHER (Gigabit Ethernet) : SH7763, SH7734 - ETHER (Fast Ethernet) : SH7724, SH7757 And the driver had the following "#if": #if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) - Those are for GETHER #if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) - This is for ETHER So, for clean up the code, this patch adds SH_ETH_TYPE_GETHER and SH_ETH_TYPE_ETHER. And then, the patch modifies the above "#if". Signed-off-by: Yoshihiro Shimoda Acked-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 22 +++++++++------------- drivers/net/sh_eth.h | 43 +++++++++++++++++++++++-------------------- 2 files changed, 32 insertions(+), 33 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 0e8cacbd4109..e6ab662ecad4 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1,5 +1,5 @@ /* - * sh_eth.c - Driver for Renesas SH7763's ethernet controler. + * sh_eth.c - Driver for Renesas ethernet controler. * * Copyright (C) 2008, 2011 Renesas Solutions Corp. * Copyright (c) 2008, 2011 Nobuhiro Iwamatsu @@ -138,7 +138,7 @@ int sh_eth_recv(struct eth_device *dev) static int sh_eth_reset(struct sh_eth_dev *eth) { int port = eth->port; -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) int ret = 0, i; /* Start e-dmac transmitter and receiver */ @@ -208,7 +208,7 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth) /* Point the controller to the tx descriptor list. Must use physical addresses */ outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port)); -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port)); outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port)); outl(0x01, TDFFR(port));/* Last discriptor bit */ @@ -276,7 +276,7 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth) /* Point the controller to the rx descriptor list */ outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port)); -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port)); outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port)); outl(RDFFR_RDLF, RDFFR(port)); @@ -370,7 +370,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(0, TFTR(port)); outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port)); outl(RMCR_RST, RMCR(port)); -#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) +#if defined(SH_ETH_TYPE_GETHER) outl(0, RPADIR(port)); #endif outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port)); @@ -387,14 +387,10 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) outl(val, MALR(port)); outl(RFLR_RFL_MIN, RFLR(port)); -#if !defined(CONFIG_CPU_SH7757) && !defined(CONFIG_CPU_SH7724) +#if defined(SH_ETH_TYPE_GETHER) outl(0, PIPR(port)); -#endif -#if !defined(CONFIG_CPU_SH7724) && !defined(CONFIG_CPU_SH7757) outl(APR_AP, APR(port)); outl(MPR_MP, MPR(port)); -#endif -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) outl(TPAUSER_TPAUSE, TPAUSER(port)); #endif @@ -419,7 +415,7 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) /* Set the transfer speed */ if (phy->speed == 100) { printf(SHETHER_NAME ": 100Base/"); -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) outl(GECMR_100B, GECMR(port)); #elif defined(CONFIG_CPU_SH7757) outl(1, RTRATE(port)); @@ -428,13 +424,13 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) #endif } else if (phy->speed == 10) { printf(SHETHER_NAME ": 10Base/"); -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) outl(GECMR_10B, GECMR(port)); #elif defined(CONFIG_CPU_SH7757) outl(0, RTRATE(port)); #endif } -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) else if (phy->speed == 1000) { printf(SHETHER_NAME ": 1000Base/"); outl(GECMR_1000B, GECMR(port)); diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 5276be32838d..401ef6968aa1 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -99,6 +99,7 @@ struct sh_eth_dev { /* Register Address */ #ifdef CONFIG_CPU_SH7763 +#define SH_ETH_TYPE_GETHER #define BASE_IO_ADDR 0xfee00000 #define EDSR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0000) @@ -137,6 +138,7 @@ struct sh_eth_dev { #define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c0) #elif defined(CONFIG_CPU_SH7757) +#define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xfef00000 #define TDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0018) @@ -164,6 +166,7 @@ struct sh_eth_dev { #define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc) #elif defined(CONFIG_CPU_SH7724) +#define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xA4600000 #define TDLAR(port) (BASE_IO_ADDR + 0x0018) @@ -190,6 +193,7 @@ struct sh_eth_dev { #define MALR(port) (BASE_IO_ADDR + 0x01c8) #elif defined(CONFIG_CPU_SH7734) +#define SH_ETH_TYPE_GETHER #define BASE_IO_ADDR 0xFEE00000 #define EDSR(port) (BASE_IO_ADDR) @@ -233,7 +237,7 @@ struct sh_eth_dev { * Register's bits * Copy from Linux driver source code */ -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) /* EDSR */ enum EDSR_BIT { EDSR_ENT = 0x01, EDSR_ENR = 0x02, @@ -244,15 +248,15 @@ enum EDSR_BIT { /* EDMR */ enum DMAC_M_BIT { EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) EDMR_SRST = 0x03, /* Receive/Send reset */ EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ -#elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7724) +#elif defined(SH_ETH_TYPE_ETHER) EDMR_SRST = 0x01, EMDR_DESC_R = 0x30, /* Descriptor reserve size */ EDMR_EL = 0x40, /* Litte endian */ -#else /* CONFIG_CPU_SH7763 */ +#else EDMR_SRST = 0x01, #endif }; @@ -262,7 +266,7 @@ enum DMAC_M_BIT { /* EDTRR */ enum DMAC_T_BIT { -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) EDTRR_TRNS = 0x03, #else EDTRR_TRNS = 0x01, @@ -302,7 +306,7 @@ enum PHY_STATUS_BIT { PHY_ST_LINK = 0x01, }; /* EESR */ enum EESR_BIT { -#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) +#if defined(SH_ETH_TYPE_ETHER) EESR_TWB = 0x40000000, #else EESR_TWB = 0xC0000000, @@ -312,14 +316,14 @@ enum EESR_BIT { #endif EESR_TABT = 0x04000000, EESR_RABT = 0x02000000, EESR_RFRMER = 0x01000000, -#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) +#if defined(SH_ETH_TYPE_ETHER) EESR_ADE = 0x00800000, #endif EESR_ECI = 0x00400000, EESR_FTC = 0x00200000, EESR_TDE = 0x00100000, EESR_TFE = 0x00080000, EESR_FRC = 0x00040000, EESR_RDE = 0x00020000, EESR_RFE = 0x00010000, -#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) +#if defined(SH_ETH_TYPE_ETHER) EESR_CND = 0x00000800, #endif EESR_DLC = 0x00000400, @@ -331,7 +335,7 @@ enum EESR_BIT { }; -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) # define TX_CHECK (EESR_TC1 | EESR_FTC) # define EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RDE \ | EESR_RFRMER | EESR_TFE | EESR_TDE | EESR_ECI) @@ -391,8 +395,7 @@ enum FCFTR_BIT { /* Transfer descriptor bit */ enum TD_STS_BIT { -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7757) \ - || defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_ETHER) TD_TACT = 0x80000000, #else TD_TACT = 0x7fffffff, @@ -408,7 +411,7 @@ enum TD_STS_BIT { enum RECV_RST_BIT { RMCR_RST = 0x01, }; /* ECMR */ enum FELIC_MODE_BIT { -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) ECMR_TRCCM=0x04000000, ECMR_RCSC= 0x00800000, ECMR_DPAD= 0x00200000, ECMR_RZPF = 0x00100000, #endif @@ -423,10 +426,10 @@ enum FELIC_MODE_BIT { }; -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) #define ECMR_CHG_DM (ECMR_TRCCM | ECMR_RZPF | ECMR_ZPF | ECMR_PFR | ECMR_RXF | \ ECMR_TXF | ECMR_MCT) -#elif CONFIG_CPU_SH7724 || CONFIG_CPU_SH7757 +#elif defined(SH_ETH_TYPE_ETHER) #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF) #else #define ECMR_CHG_DM (ECMR_ZPF | ECMR_PFR | ECMR_RXF | ECMR_TXF | ECMR_MCT) @@ -434,14 +437,14 @@ enum FELIC_MODE_BIT { /* ECSR */ enum ECSR_STATUS_BIT { -#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) +#if defined(SH_ETH_TYPE_ETHER) ECSR_BRCRX = 0x20, ECSR_PSRTO = 0x10, #endif ECSR_LCHNG = 0x04, ECSR_MPD = 0x02, ECSR_ICD = 0x01, }; -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) # define ECSR_INIT (ECSR_ICD | ECSIPR_MPDIP) #else # define ECSR_INIT (ECSR_BRCRX | ECSR_PSRTO | \ @@ -450,10 +453,10 @@ enum ECSR_STATUS_BIT { /* ECSIPR */ enum ECSIPR_STATUS_MASK_BIT { -#if defined(CONFIG_CPU_SH7724) || defined(CONFIG_CPU_SH7757) +#if defined(SH_ETH_TYPE_ETHER) ECSIPR_BRCRXIP = 0x20, ECSIPR_PSRTOIP = 0x10, -#elif defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#elif defined(SH_ETY_TYPE_GETHER) ECSIPR_PSRTOIP = 0x10, ECSIPR_PHYIP = 0x08, #endif @@ -462,7 +465,7 @@ enum ECSIPR_STATUS_MASK_BIT { ECSIPR_ICDIP = 0x01, }; -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) # define ECSIPR_INIT (ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP) #else # define ECSIPR_INIT (ECSIPR_BRCRXIP | ECSIPR_PSRTOIP | ECSIPR_LCHNGIP | \ @@ -493,7 +496,7 @@ enum RPADIR_BIT { RPADIR_PADR = 0x0003f, }; -#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) +#if defined(SH_ETH_TYPE_GETHER) # define RPADIR_INIT (0x00) #else # define RPADIR_INIT (RPADIR_PADS1) From 49afb8cafc5179f35a2ac44da59400b050102703 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 26 Jun 2012 16:38:09 +0000 Subject: [PATCH 14/17] net: sh_eth: modify the definitions of regsiter The previous code had many similar definitions in each CPU. This patch borrows from the sh_eth driver of Linux kernel. Signed-off-by: Yoshihiro Shimoda Acked-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.c | 108 +++++++------- drivers/net/sh_eth.h | 331 +++++++++++++++++++++++++++---------------- 2 files changed, 258 insertions(+), 181 deletions(-) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index e6ab662ecad4..09af8606dbcb 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -76,8 +76,8 @@ int sh_eth_send(struct eth_device *dev, void *packet, int len) port_info->tx_desc_cur->td0 = TD_TACT | TD_TFP; /* Restart the transmitter if disabled */ - if (!(inl(EDTRR(port)) & EDTRR_TRNS)) - outl(EDTRR_TRNS, EDTRR(port)); + if (!(sh_eth_read(eth, EDTRR) & EDTRR_TRNS)) + sh_eth_write(eth, EDTRR_TRNS, EDTRR); /* Wait until packet is transmitted */ timeout = TIMEOUT_CNT; @@ -129,25 +129,24 @@ int sh_eth_recv(struct eth_device *dev) } /* Restart the receiver if disabled */ - if (!(inl(EDRRR(port)) & EDRRR_R)) - outl(EDRRR_R, EDRRR(port)); + if (!(sh_eth_read(eth, EDRRR) & EDRRR_R)) + sh_eth_write(eth, EDRRR_R, EDRRR); return len; } static int sh_eth_reset(struct sh_eth_dev *eth) { - int port = eth->port; #if defined(SH_ETH_TYPE_GETHER) int ret = 0, i; /* Start e-dmac transmitter and receiver */ - outl(EDSR_ENALL, EDSR(port)); + sh_eth_write(eth, EDSR_ENALL, EDSR); /* Perform a software reset and wait for it to complete */ - outl(EDMR_SRST, EDMR(port)); + sh_eth_write(eth, EDMR_SRST, EDMR); for (i = 0; i < TIMEOUT_CNT ; i++) { - if (!(inl(EDMR(port)) & EDMR_SRST)) + if (!(sh_eth_read(eth, EDMR) & EDMR_SRST)) break; udelay(1000); } @@ -159,9 +158,9 @@ static int sh_eth_reset(struct sh_eth_dev *eth) return ret; #else - outl(inl(EDMR(port)) | EDMR_SRST, EDMR(port)); + sh_eth_write(eth, sh_eth_read(eth, EDMR) | EDMR_SRST, EDMR); udelay(3000); - outl(inl(EDMR(port)) & ~EDMR_SRST, EDMR(port)); + sh_eth_write(eth, sh_eth_read(eth, EDMR) & ~EDMR_SRST, EDMR); return 0; #endif @@ -207,11 +206,11 @@ static int sh_eth_tx_desc_init(struct sh_eth_dev *eth) /* Point the controller to the tx descriptor list. Must use physical addresses */ - outl(ADDR_TO_PHY(port_info->tx_desc_base), TDLAR(port)); + sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDLAR); #if defined(SH_ETH_TYPE_GETHER) - outl(ADDR_TO_PHY(port_info->tx_desc_base), TDFAR(port)); - outl(ADDR_TO_PHY(cur_tx_desc), TDFXR(port)); - outl(0x01, TDFFR(port));/* Last discriptor bit */ + sh_eth_write(eth, ADDR_TO_PHY(port_info->tx_desc_base), TDFAR); + sh_eth_write(eth, ADDR_TO_PHY(cur_tx_desc), TDFXR); + sh_eth_write(eth, 0x01, TDFFR);/* Last discriptor bit */ #endif err: @@ -275,11 +274,11 @@ static int sh_eth_rx_desc_init(struct sh_eth_dev *eth) cur_rx_desc->rd0 |= RD_RDLE; /* Point the controller to the rx descriptor list */ - outl(ADDR_TO_PHY(port_info->rx_desc_base), RDLAR(port)); + sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDLAR); #if defined(SH_ETH_TYPE_GETHER) - outl(ADDR_TO_PHY(port_info->rx_desc_base), RDFAR(port)); - outl(ADDR_TO_PHY(cur_rx_desc), RDFXR(port)); - outl(RDFFR_RDLF, RDFFR(port)); + sh_eth_write(eth, ADDR_TO_PHY(port_info->rx_desc_base), RDFAR); + sh_eth_write(eth, ADDR_TO_PHY(cur_rx_desc), RDFXR); + sh_eth_write(eth, RDFFR_RDLF, RDFFR); #endif return ret; @@ -364,38 +363,39 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) struct phy_device *phy; /* Configure e-dmac registers */ - outl((inl(EDMR(port)) & ~EMDR_DESC_R) | EDMR_EL, EDMR(port)); - outl(0, EESIPR(port)); - outl(0, TRSCER(port)); - outl(0, TFTR(port)); - outl((FIFO_SIZE_T | FIFO_SIZE_R), FDR(port)); - outl(RMCR_RST, RMCR(port)); + sh_eth_write(eth, (sh_eth_read(eth, EDMR) & ~EMDR_DESC_R) | EDMR_EL, + EDMR); + sh_eth_write(eth, 0, EESIPR); + sh_eth_write(eth, 0, TRSCER); + sh_eth_write(eth, 0, TFTR); + sh_eth_write(eth, (FIFO_SIZE_T | FIFO_SIZE_R), FDR); + sh_eth_write(eth, RMCR_RST, RMCR); #if defined(SH_ETH_TYPE_GETHER) - outl(0, RPADIR(port)); + sh_eth_write(eth, 0, RPADIR); #endif - outl((FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR(port)); + sh_eth_write(eth, (FIFO_F_D_RFF | FIFO_F_D_RFD), FCFTR); /* Configure e-mac registers */ - outl(0, ECSIPR(port)); + sh_eth_write(eth, 0, ECSIPR); /* Set Mac address */ val = dev->enetaddr[0] << 24 | dev->enetaddr[1] << 16 | dev->enetaddr[2] << 8 | dev->enetaddr[3]; - outl(val, MAHR(port)); + sh_eth_write(eth, val, MAHR); val = dev->enetaddr[4] << 8 | dev->enetaddr[5]; - outl(val, MALR(port)); + sh_eth_write(eth, val, MALR); - outl(RFLR_RFL_MIN, RFLR(port)); + sh_eth_write(eth, RFLR_RFL_MIN, RFLR); #if defined(SH_ETH_TYPE_GETHER) - outl(0, PIPR(port)); - outl(APR_AP, APR(port)); - outl(MPR_MP, MPR(port)); - outl(TPAUSER_TPAUSE, TPAUSER(port)); + sh_eth_write(eth, 0, PIPR); + sh_eth_write(eth, APR_AP, APR); + sh_eth_write(eth, MPR_MP, MPR); + sh_eth_write(eth, TPAUSER_TPAUSE, TPAUSER); #endif #if defined(CONFIG_CPU_SH7734) - outl(CONFIG_SH_ETHER_SH7734_MII, RMII_MII(port)); + sh_eth_write(eth, CONFIG_SH_ETHER_SH7734_MII, RMII_MII); #endif /* Configure phy */ ret = sh_eth_phy_config(eth); @@ -416,34 +416,35 @@ static int sh_eth_config(struct sh_eth_dev *eth, bd_t *bd) if (phy->speed == 100) { printf(SHETHER_NAME ": 100Base/"); #if defined(SH_ETH_TYPE_GETHER) - outl(GECMR_100B, GECMR(port)); + sh_eth_write(eth, GECMR_100B, GECMR); #elif defined(CONFIG_CPU_SH7757) - outl(1, RTRATE(port)); + sh_eth_write(eth, 1, RTRATE); #elif defined(CONFIG_CPU_SH7724) val = ECMR_RTM; #endif } else if (phy->speed == 10) { printf(SHETHER_NAME ": 10Base/"); #if defined(SH_ETH_TYPE_GETHER) - outl(GECMR_10B, GECMR(port)); + sh_eth_write(eth, GECMR_10B, GECMR); #elif defined(CONFIG_CPU_SH7757) - outl(0, RTRATE(port)); + sh_eth_write(eth, 0, RTRATE); #endif } #if defined(SH_ETH_TYPE_GETHER) else if (phy->speed == 1000) { printf(SHETHER_NAME ": 1000Base/"); - outl(GECMR_1000B, GECMR(port)); + sh_eth_write(eth, GECMR_1000B, GECMR); } #endif /* Check if full duplex mode is supported by the phy */ if (phy->duplex) { printf("Full\n"); - outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), ECMR(port)); + sh_eth_write(eth, val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE|ECMR_DM), + ECMR); } else { printf("Half\n"); - outl(val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR(port)); + sh_eth_write(eth, val | (ECMR_CHG_DM|ECMR_RE|ECMR_TE), ECMR); } return ret; @@ -458,12 +459,12 @@ static void sh_eth_start(struct sh_eth_dev *eth) * Enable the e-dmac receiver only. The transmitter will be enabled when * we have something to transmit */ - outl(EDRRR_R, EDRRR(eth->port)); + sh_eth_write(eth, EDRRR_R, EDRRR); } static void sh_eth_stop(struct sh_eth_dev *eth) { - outl(~EDRRR_R, EDRRR(eth->port)); + sh_eth_write(eth, ~EDRRR_R, EDRRR); } int sh_eth_init(struct eth_device *dev, bd_t *bd) @@ -567,9 +568,8 @@ static int sh_eth_bb_init(struct bb_miiphy_bus *bus) static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus) { struct sh_eth_dev *eth = bus->priv; - int port = eth->port; - outl(inl(PIR(port)) | PIR_MMD, PIR(port)); + sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MMD, PIR); return 0; } @@ -577,9 +577,8 @@ static int sh_eth_bb_mdio_active(struct bb_miiphy_bus *bus) static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) { struct sh_eth_dev *eth = bus->priv; - int port = eth->port; - outl(inl(PIR(port)) & ~PIR_MMD, PIR(port)); + sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MMD, PIR); return 0; } @@ -587,12 +586,11 @@ static int sh_eth_bb_mdio_tristate(struct bb_miiphy_bus *bus) static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) { struct sh_eth_dev *eth = bus->priv; - int port = eth->port; if (v) - outl(inl(PIR(port)) | PIR_MDO, PIR(port)); + sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MDO, PIR); else - outl(inl(PIR(port)) & ~PIR_MDO, PIR(port)); + sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MDO, PIR); return 0; } @@ -600,9 +598,8 @@ static int sh_eth_bb_set_mdio(struct bb_miiphy_bus *bus, int v) static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) { struct sh_eth_dev *eth = bus->priv; - int port = eth->port; - *v = (inl(PIR(port)) & PIR_MDI) >> 3; + *v = (sh_eth_read(eth, PIR) & PIR_MDI) >> 3; return 0; } @@ -610,12 +607,11 @@ static int sh_eth_bb_get_mdio(struct bb_miiphy_bus *bus, int *v) static int sh_eth_bb_set_mdc(struct bb_miiphy_bus *bus, int v) { struct sh_eth_dev *eth = bus->priv; - int port = eth->port; if (v) - outl(inl(PIR(port)) | PIR_MDC, PIR(port)); + sh_eth_write(eth, sh_eth_read(eth, PIR) | PIR_MDC, PIR); else - outl(inl(PIR(port)) & ~PIR_MDC, PIR(port)); + sh_eth_write(eth, sh_eth_read(eth, PIR) & ~PIR_MDC, PIR); return 0; } diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 401ef6968aa1..13003ec8a281 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -97,140 +97,196 @@ struct sh_eth_dev { struct sh_eth_info port_info[MAX_PORT_NUM]; }; +/* from linux/drivers/net/ethernet/renesas/sh_eth.h */ +enum { + /* E-DMAC registers */ + EDSR = 0, + EDMR, + EDTRR, + EDRRR, + EESR, + EESIPR, + TDLAR, + TDFAR, + TDFXR, + TDFFR, + RDLAR, + RDFAR, + RDFXR, + RDFFR, + TRSCER, + RMFCR, + TFTR, + FDR, + RMCR, + EDOCR, + TFUCR, + RFOCR, + FCFTR, + RPADIR, + TRIMD, + RBWAR, + TBRAR, + + /* Ether registers */ + ECMR, + ECSR, + ECSIPR, + PIR, + PSR, + RDMLR, + PIPR, + RFLR, + IPGR, + APR, + MPR, + PFTCR, + PFRCR, + RFCR, + RFCF, + TPAUSER, + TPAUSECR, + BCFR, + BCFRR, + GECMR, + BCULR, + MAHR, + MALR, + TROCR, + CDCR, + LCCR, + CNDCR, + CEFCR, + FRECR, + TSFRCR, + TLFRCR, + CERCR, + CEECR, + MAFCR, + RTRATE, + CSMR, + RMII_MII, + + /* This value must be written at last. */ + SH_ETH_MAX_REGISTER_OFFSET, +}; + +static const u16 sh_eth_offset_gigabit[SH_ETH_MAX_REGISTER_OFFSET] = { + [EDSR] = 0x0000, + [EDMR] = 0x0400, + [EDTRR] = 0x0408, + [EDRRR] = 0x0410, + [EESR] = 0x0428, + [EESIPR] = 0x0430, + [TDLAR] = 0x0010, + [TDFAR] = 0x0014, + [TDFXR] = 0x0018, + [TDFFR] = 0x001c, + [RDLAR] = 0x0030, + [RDFAR] = 0x0034, + [RDFXR] = 0x0038, + [RDFFR] = 0x003c, + [TRSCER] = 0x0438, + [RMFCR] = 0x0440, + [TFTR] = 0x0448, + [FDR] = 0x0450, + [RMCR] = 0x0458, + [RPADIR] = 0x0460, + [FCFTR] = 0x0468, + [CSMR] = 0x04E4, + + [ECMR] = 0x0500, + [ECSR] = 0x0510, + [ECSIPR] = 0x0518, + [PIR] = 0x0520, + [PSR] = 0x0528, + [PIPR] = 0x052c, + [RFLR] = 0x0508, + [APR] = 0x0554, + [MPR] = 0x0558, + [PFTCR] = 0x055c, + [PFRCR] = 0x0560, + [TPAUSER] = 0x0564, + [GECMR] = 0x05b0, + [BCULR] = 0x05b4, + [MAHR] = 0x05c0, + [MALR] = 0x05c8, + [TROCR] = 0x0700, + [CDCR] = 0x0708, + [LCCR] = 0x0710, + [CEFCR] = 0x0740, + [FRECR] = 0x0748, + [TSFRCR] = 0x0750, + [TLFRCR] = 0x0758, + [RFCR] = 0x0760, + [CERCR] = 0x0768, + [CEECR] = 0x0770, + [MAFCR] = 0x0778, + [RMII_MII] = 0x0790, +}; + +static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = { + [ECMR] = 0x0100, + [RFLR] = 0x0108, + [ECSR] = 0x0110, + [ECSIPR] = 0x0118, + [PIR] = 0x0120, + [PSR] = 0x0128, + [RDMLR] = 0x0140, + [IPGR] = 0x0150, + [APR] = 0x0154, + [MPR] = 0x0158, + [TPAUSER] = 0x0164, + [RFCF] = 0x0160, + [TPAUSECR] = 0x0168, + [BCFRR] = 0x016c, + [MAHR] = 0x01c0, + [MALR] = 0x01c8, + [TROCR] = 0x01d0, + [CDCR] = 0x01d4, + [LCCR] = 0x01d8, + [CNDCR] = 0x01dc, + [CEFCR] = 0x01e4, + [FRECR] = 0x01e8, + [TSFRCR] = 0x01ec, + [TLFRCR] = 0x01f0, + [RFCR] = 0x01f4, + [MAFCR] = 0x01f8, + [RTRATE] = 0x01fc, + + [EDMR] = 0x0000, + [EDTRR] = 0x0008, + [EDRRR] = 0x0010, + [TDLAR] = 0x0018, + [RDLAR] = 0x0020, + [EESR] = 0x0028, + [EESIPR] = 0x0030, + [TRSCER] = 0x0038, + [RMFCR] = 0x0040, + [TFTR] = 0x0048, + [FDR] = 0x0050, + [RMCR] = 0x0058, + [TFUCR] = 0x0064, + [RFOCR] = 0x0068, + [FCFTR] = 0x0070, + [RPADIR] = 0x0078, + [TRIMD] = 0x007c, + [RBWAR] = 0x00c8, + [RDFAR] = 0x00cc, + [TBRAR] = 0x00d4, + [TDFAR] = 0x00d8, +}; + /* Register Address */ -#ifdef CONFIG_CPU_SH7763 +#if defined(CONFIG_CPU_SH7763) || defined(CONFIG_CPU_SH7734) #define SH_ETH_TYPE_GETHER #define BASE_IO_ADDR 0xfee00000 - -#define EDSR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0000) - -#define TDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0010) -#define TDFAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0014) -#define TDFXR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0018) -#define TDFFR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x001c) - -#define RDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0030) -#define RDFAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0034) -#define RDFXR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0038) -#define RDFFR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x003c) - -#define EDMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0400) -#define EDTRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0408) -#define EDRRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0410) -#define EESR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0428) -#define EESIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0430) -#define TRSCER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0438) -#define TFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0448) -#define FDR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0450) -#define RMCR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0458) -#define RPADIR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0460) -#define FCFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0468) -#define ECMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0500) -#define RFLR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0508) -#define ECSIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0518) -#define PIR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0520) -#define PIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x052c) -#define APR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0554) -#define MPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0558) -#define TPAUSER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0564) -#define GECMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05b0) -#define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c8) -#define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x05c0) - #elif defined(CONFIG_CPU_SH7757) #define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xfef00000 - -#define TDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0018) -#define RDLAR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0020) - -#define EDMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0000) -#define EDTRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0008) -#define EDRRR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0010) -#define EESR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0028) -#define EESIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0030) -#define TRSCER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0038) -#define TFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0048) -#define FDR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0050) -#define RMCR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0058) -#define FCFTR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0070) -#define ECMR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0100) -#define RFLR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0108) -#define ECSIPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0118) -#define PIR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0120) -#define APR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0154) -#define MPR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0158) -#define TPAUSER(port) (BASE_IO_ADDR + 0x800 * (port) + 0x0164) -#define MAHR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c0) -#define MALR(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01c8) -#define RTRATE(port) (BASE_IO_ADDR + 0x800 * (port) + 0x01fc) - #elif defined(CONFIG_CPU_SH7724) #define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xA4600000 - -#define TDLAR(port) (BASE_IO_ADDR + 0x0018) -#define RDLAR(port) (BASE_IO_ADDR + 0x0020) - -#define EDMR(port) (BASE_IO_ADDR + 0x0000) -#define EDTRR(port) (BASE_IO_ADDR + 0x0008) -#define EDRRR(port) (BASE_IO_ADDR + 0x0010) -#define EESR(port) (BASE_IO_ADDR + 0x0028) -#define EESIPR(port) (BASE_IO_ADDR + 0x0030) -#define TRSCER(port) (BASE_IO_ADDR + 0x0038) -#define TFTR(port) (BASE_IO_ADDR + 0x0048) -#define FDR(port) (BASE_IO_ADDR + 0x0050) -#define RMCR(port) (BASE_IO_ADDR + 0x0058) -#define FCFTR(port) (BASE_IO_ADDR + 0x0070) -#define ECMR(port) (BASE_IO_ADDR + 0x0100) -#define RFLR(port) (BASE_IO_ADDR + 0x0108) -#define ECSIPR(port) (BASE_IO_ADDR + 0x0118) -#define PIR(port) (BASE_IO_ADDR + 0x0120) -#define APR(port) (BASE_IO_ADDR + 0x0154) -#define MPR(port) (BASE_IO_ADDR + 0x0158) -#define TPAUSER(port) (BASE_IO_ADDR + 0x0164) -#define MAHR(port) (BASE_IO_ADDR + 0x01c0) -#define MALR(port) (BASE_IO_ADDR + 0x01c8) - -#elif defined(CONFIG_CPU_SH7734) -#define SH_ETH_TYPE_GETHER -#define BASE_IO_ADDR 0xFEE00000 - -#define EDSR(port) (BASE_IO_ADDR) - -#define TDLAR(port) (BASE_IO_ADDR + 0x0010) -#define TDFAR(port) (BASE_IO_ADDR + 0x0014) -#define TDFXR(port) (BASE_IO_ADDR + 0x0018) -#define TDFFR(port) (BASE_IO_ADDR + 0x001c) -#define RDLAR(port) (BASE_IO_ADDR + 0x0030) -#define RDFAR(port) (BASE_IO_ADDR + 0x0034) -#define RDFXR(port) (BASE_IO_ADDR + 0x0038) -#define RDFFR(port) (BASE_IO_ADDR + 0x003c) - -#define EDMR(port) (BASE_IO_ADDR + 0x0400) -#define EDTRR(port) (BASE_IO_ADDR + 0x0408) -#define EDRRR(port) (BASE_IO_ADDR + 0x0410) -#define EESR(port) (BASE_IO_ADDR + 0x0428) -#define EESIPR(port) (BASE_IO_ADDR + 0x0430) -#define TRSCER(port) (BASE_IO_ADDR + 0x0438) -#define TFTR(port) (BASE_IO_ADDR + 0x0448) -#define FDR(port) (BASE_IO_ADDR + 0x0450) -#define RMCR(port) (BASE_IO_ADDR + 0x0458) -#define RPADIR(port) (BASE_IO_ADDR + 0x0460) -#define FCFTR(port) (BASE_IO_ADDR + 0x0468) -#define ECMR(port) (BASE_IO_ADDR + 0x0500) -#define RFLR(port) (BASE_IO_ADDR + 0x0508) -#define ECSIPR(port) (BASE_IO_ADDR + 0x0518) -#define PIR(port) (BASE_IO_ADDR + 0x0520) -#define PIPR(port) (BASE_IO_ADDR + 0x052c) -#define APR(port) (BASE_IO_ADDR + 0x0554) -#define MPR(port) (BASE_IO_ADDR + 0x0558) -#define TPAUSER(port) (BASE_IO_ADDR + 0x0564) -#define GECMR(port) (BASE_IO_ADDR + 0x05b0) -#define MAHR(port) (BASE_IO_ADDR + 0x05C0) -#define MALR(port) (BASE_IO_ADDR + 0x05C8) -#define RMII_MII(port) (BASE_IO_ADDR + 0x0790) - #endif /* @@ -506,3 +562,28 @@ enum RPADIR_BIT { enum FIFO_SIZE_BIT { FIFO_SIZE_T = 0x00000700, FIFO_SIZE_R = 0x00000007, }; + +static inline unsigned long sh_eth_reg_addr(struct sh_eth_dev *eth, + int enum_index) +{ +#if defined(SH_ETH_TYPE_GETHER) + const u16 *reg_offset = sh_eth_offset_gigabit; +#elif defined(SH_ETH_TYPE_ETHER) + const u16 *reg_offset = sh_eth_offset_fast_sh4; +#else +#error +#endif + return BASE_IO_ADDR + reg_offset[enum_index] + 0x800 * eth->port; +} + +static inline void sh_eth_write(struct sh_eth_dev *eth, unsigned long data, + int enum_index) +{ + outl(data, sh_eth_reg_addr(eth, enum_index)); +} + +static inline unsigned long sh_eth_read(struct sh_eth_dev *eth, + int enum_index) +{ + return inl(sh_eth_reg_addr(eth, enum_index)); +} From 631fea8f2d70aa5eb7c49b33039971dfc61bba88 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 26 Jun 2012 16:38:11 +0000 Subject: [PATCH 15/17] net: sh_eth: add support for SH7757's GETHER SH7757 has 2 ETHERs and 2 GETHERs. This patch supports the SH7757's GETHER. If CONFIG_SH_ETHER_USE_GETHER is defined using SH7757, the driver handles the GETHER. Signed-off-by: Yoshihiro Shimoda Acked-by: Nobuhiro Iwamatsu --- drivers/net/sh_eth.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 13003ec8a281..3703c55a7455 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -282,8 +282,13 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = { #define SH_ETH_TYPE_GETHER #define BASE_IO_ADDR 0xfee00000 #elif defined(CONFIG_CPU_SH7757) +#if defined(CONFIG_SH_ETHER_USE_GETHER) +#define SH_ETH_TYPE_GETHER +#define BASE_IO_ADDR 0xfee00000 +#else #define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xfef00000 +#endif #elif defined(CONFIG_CPU_SH7724) #define SH_ETH_TYPE_ETHER #define BASE_IO_ADDR 0xA4600000 @@ -331,7 +336,11 @@ enum DMAC_T_BIT { /* GECMR */ enum GECMR_BIT { +#if defined(CONFIG_CPU_SH7757) + GECMR_1000B = 0x20, GECMR_100B = 0x01, GECMR_10B = 0x00, +#else GECMR_1000B = 0x01, GECMR_100B = 0x04, GECMR_10B = 0x00, +#endif }; /* EDRRR*/ From 702e6014f15b307f144fa03ecaf83a8446c6802a Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Sun, 29 Apr 2012 23:57:39 +0000 Subject: [PATCH 16/17] doc: cleanup - move board READMEs into respective board directories Also drop a few files referring to no longer / not yet supported boards. Signed-off-by: Wolfgang Denk Cc: Prafulla Wadaskar Cc: Stefan Roese Cc: Kim Phillips Cc: Andy Fleming Cc: Jason Jin Cc: Stefano Babic Cc: Daniel Schwierzeck Acked-by: Stefano Babic Acked-by: Daniel Schwierzeck --- .../AndesTech/adp-ag101/README | 0 .../Marvell/db64360/README | 0 .../Marvell/db64460/README | 0 .../RPXClassic/README | 0 doc/README.RPXlite => board/RPXlite/README | 0 {doc => board/RPXlite}/README.PlanetCore | 0 doc/README.alaska8220 => board/alaska/README | 0 doc/README.bamboo => board/amcc/bamboo/README | 0 doc/README.ebony => board/amcc/ebony/README | 0 {doc => board/amcc/ocotea}/README.ocotea | 0 .../amcc/ocotea}/README.ocotea-PIBS-to-U-Boot | 0 .../armltd/integrator/README | 0 doc/README.cmi => board/cmi/README | 0 .../cobra5272/README | 0 .../davinci/da8xxevm}/README.hawkboard | 0 doc/README.dnp5370 => board/dnp5370/README | 0 doc/README.evb64260 => board/evb64260/README | 0 .../evb64260}/README.EVB-64260-750CX | 0 doc/README.fads => board/fads/README | 0 .../freescale/m52277evb/README | 0 .../freescale/m5253evbe/README | 0 .../freescale/m53017evb/README | 0 .../freescale/m5373evb/README | 0 .../freescale/m54455evb/README | 0 .../freescale/m547xevb/README | 0 .../freescale/mpc7448hpc2/README | 0 .../freescale/mpc8313erdb/README | 0 .../freescale/mpc8315erdb/README | 0 .../freescale/mpc8323erdb/README | 0 .../freescale/mpc832xemds/README | 0 .../freescale/mpc8349itx/README | 0 .../freescale/mpc8360emds/README | 0 .../freescale/mpc837xemds/README | 0 .../freescale/mpc837xerdb/README | 0 .../freescale/mpc8536ds/README | 0 .../freescale/mpc8544ds/README | 0 .../freescale/mpc8569mds/README | 0 .../freescale/mpc8572ds/README | 0 .../freescale/mpc8610hpcd/README | 0 .../freescale/mpc8641hpcn/README | 0 .../freescale/mx35pdk/README | 0 .../freescale/mx6qsabrelite/README | 0 .../freescale/p1022ds/README | 0 .../freescale/p1023rds/README | 0 .../freescale/p1_p2_rdb/README | 0 .../freescale/p1_p2_rdb_pc/README | 0 .../freescale/p2041rdb/README | 0 .../freescale/p3060qds/README | 0 doc/README.IceCube => board/icecube/README | 0 .../icecube}/README.Lite5200B_low_power | 0 doc/README.INCA-IP => board/incaip/README | 0 .../iphase4539/README | 0 {doc => board/keymile/km83xx}/README.kmeter1 | 0 doc/README.korat => board/korat/README | 0 .../matrix_vision/mergerbox/README | 0 .../matrix_vision/mvbc_p}/README.mvbc_p | 0 .../matrix_vision/mvblm7}/README.mvblm7 | 0 .../matrix_vision/mvsmr}/README.mvsmr | 0 doc/README.MBX => board/mbx8xx/README | 0 doc/README.PIP405 => board/mpl/pip405/README | 0 .../phytec/pcm030/README | 0 board/qemu-mips/README | 167 ++++++++ .../renesas/sh7757lcr}/README.sh7757lcr | 0 .../renesas/sh7785lcr}/README.sh7785lcr | 0 {doc => board/sandbox/sandbox}/README.sandbox | 0 board/sandpoint/README | 398 ++++++++++++++++++ doc/README.sbc8349 => board/sbc8349/README | 0 doc/README.sbc8548 => board/sbc8548/README | 0 doc/README.SBC8560 => board/sbc8560/README | 0 doc/README.sbc8641d => board/sbc8641d/README | 0 .../sheldon/simpc8313}/README.simpc8313 | 0 {doc => board/st/nhk8815}/README.nhk8815 | 0 {doc => board/stx/stxxtc}/README.stxxtc | 0 {doc => board/ti/omap730p2}/README.omap730p2 | 0 .../timll/devkit8000/README | 0 .../tqc/tqm8260/README | 0 .../xes/xpedite1000/README | 0 doc/README.zeus => board/zeus/README | 0 doc/README.OXC | 24 -- doc/README.Sandpoint8240 | 394 ----------------- doc/README.amigaone | 12 - doc/README.p4080ds | 32 -- doc/README.qemu_mips | 164 -------- 83 files changed, 565 insertions(+), 626 deletions(-) rename doc/README.ag101 => board/AndesTech/adp-ag101/README (100%) rename doc/README.db64360 => board/Marvell/db64360/README (100%) rename doc/README.db64460 => board/Marvell/db64460/README (100%) rename doc/README.RPXClassic => board/RPXClassic/README (100%) rename doc/README.RPXlite => board/RPXlite/README (100%) rename {doc => board/RPXlite}/README.PlanetCore (100%) rename doc/README.alaska8220 => board/alaska/README (100%) rename doc/README.bamboo => board/amcc/bamboo/README (100%) rename doc/README.ebony => board/amcc/ebony/README (100%) rename {doc => board/amcc/ocotea}/README.ocotea (100%) rename {doc => board/amcc/ocotea}/README.ocotea-PIBS-to-U-Boot (100%) rename doc/README-integrator => board/armltd/integrator/README (100%) rename doc/README.cmi => board/cmi/README (100%) rename doc/README.COBRA5272 => board/cobra5272/README (100%) rename {doc => board/davinci/da8xxevm}/README.hawkboard (100%) rename doc/README.dnp5370 => board/dnp5370/README (100%) rename doc/README.evb64260 => board/evb64260/README (100%) rename {doc => board/evb64260}/README.EVB-64260-750CX (100%) rename doc/README.fads => board/fads/README (100%) rename doc/README.m52277evb => board/freescale/m52277evb/README (100%) rename doc/README.m5253evbe => board/freescale/m5253evbe/README (100%) rename doc/README.m53017evb => board/freescale/m53017evb/README (100%) rename doc/README.m5373evb => board/freescale/m5373evb/README (100%) rename doc/README.m54455evb => board/freescale/m54455evb/README (100%) rename doc/README.m5475evb => board/freescale/m547xevb/README (100%) rename doc/README.mpc7448hpc2 => board/freescale/mpc7448hpc2/README (100%) rename doc/README.mpc8313erdb => board/freescale/mpc8313erdb/README (100%) rename doc/README.mpc8315erdb => board/freescale/mpc8315erdb/README (100%) rename doc/README.mpc8323erdb => board/freescale/mpc8323erdb/README (100%) rename doc/README.mpc832xemds => board/freescale/mpc832xemds/README (100%) rename doc/README.mpc8349itx => board/freescale/mpc8349itx/README (100%) rename doc/README.mpc8360emds => board/freescale/mpc8360emds/README (100%) rename doc/README.mpc837xemds => board/freescale/mpc837xemds/README (100%) rename doc/README.mpc837xerdb => board/freescale/mpc837xerdb/README (100%) rename doc/README.mpc8536ds => board/freescale/mpc8536ds/README (100%) rename doc/README.mpc8544ds => board/freescale/mpc8544ds/README (100%) rename doc/README.mpc8569mds => board/freescale/mpc8569mds/README (100%) rename doc/README.mpc8572ds => board/freescale/mpc8572ds/README (100%) rename doc/README.mpc8610hpcd => board/freescale/mpc8610hpcd/README (100%) rename doc/README.mpc8641hpcn => board/freescale/mpc8641hpcn/README (100%) rename doc/README.mx35pdk => board/freescale/mx35pdk/README (100%) rename doc/README.mx6qsabrelite => board/freescale/mx6qsabrelite/README (100%) rename doc/README.p1022ds => board/freescale/p1022ds/README (100%) rename doc/README.p1023rds => board/freescale/p1023rds/README (100%) rename doc/README.p2020rdb => board/freescale/p1_p2_rdb/README (100%) rename doc/README.p1_p2_rdb_pc => board/freescale/p1_p2_rdb_pc/README (100%) rename doc/README.p2041rdb => board/freescale/p2041rdb/README (100%) rename doc/README.p3060qds => board/freescale/p3060qds/README (100%) rename doc/README.IceCube => board/icecube/README (100%) rename {doc => board/icecube}/README.Lite5200B_low_power (100%) rename doc/README.INCA-IP => board/incaip/README (100%) rename doc/README.IPHASE4539 => board/iphase4539/README (100%) rename {doc => board/keymile/km83xx}/README.kmeter1 (100%) rename doc/README.korat => board/korat/README (100%) rename doc/README.mergerbox => board/matrix_vision/mergerbox/README (100%) rename {doc => board/matrix_vision/mvbc_p}/README.mvbc_p (100%) rename {doc => board/matrix_vision/mvblm7}/README.mvblm7 (100%) rename {doc => board/matrix_vision/mvsmr}/README.mvsmr (100%) rename doc/README.MBX => board/mbx8xx/README (100%) rename doc/README.PIP405 => board/mpl/pip405/README (100%) rename doc/README.phytec.pcm030 => board/phytec/pcm030/README (100%) rename {doc => board/renesas/sh7757lcr}/README.sh7757lcr (100%) rename {doc => board/renesas/sh7785lcr}/README.sh7785lcr (100%) rename {doc => board/sandbox/sandbox}/README.sandbox (100%) rename doc/README.sbc8349 => board/sbc8349/README (100%) rename doc/README.sbc8548 => board/sbc8548/README (100%) rename doc/README.SBC8560 => board/sbc8560/README (100%) rename doc/README.sbc8641d => board/sbc8641d/README (100%) rename {doc => board/sheldon/simpc8313}/README.simpc8313 (100%) rename {doc => board/st/nhk8815}/README.nhk8815 (100%) rename {doc => board/stx/stxxtc}/README.stxxtc (100%) rename {doc => board/ti/omap730p2}/README.omap730p2 (100%) rename doc/README.timll => board/timll/devkit8000/README (100%) rename doc/README.TQM8260 => board/tqc/tqm8260/README (100%) rename doc/README.xpedite1k => board/xes/xpedite1000/README (100%) rename doc/README.zeus => board/zeus/README (100%) delete mode 100644 doc/README.OXC delete mode 100644 doc/README.Sandpoint8240 delete mode 100644 doc/README.amigaone delete mode 100644 doc/README.p4080ds delete mode 100644 doc/README.qemu_mips diff --git a/doc/README.ag101 b/board/AndesTech/adp-ag101/README similarity index 100% rename from doc/README.ag101 rename to board/AndesTech/adp-ag101/README diff --git a/doc/README.db64360 b/board/Marvell/db64360/README similarity index 100% rename from doc/README.db64360 rename to board/Marvell/db64360/README diff --git a/doc/README.db64460 b/board/Marvell/db64460/README similarity index 100% rename from doc/README.db64460 rename to board/Marvell/db64460/README diff --git a/doc/README.RPXClassic b/board/RPXClassic/README similarity index 100% rename from doc/README.RPXClassic rename to board/RPXClassic/README diff --git a/doc/README.RPXlite b/board/RPXlite/README similarity index 100% rename from doc/README.RPXlite rename to board/RPXlite/README diff --git a/doc/README.PlanetCore b/board/RPXlite/README.PlanetCore similarity index 100% rename from doc/README.PlanetCore rename to board/RPXlite/README.PlanetCore diff --git a/doc/README.alaska8220 b/board/alaska/README similarity index 100% rename from doc/README.alaska8220 rename to board/alaska/README diff --git a/doc/README.bamboo b/board/amcc/bamboo/README similarity index 100% rename from doc/README.bamboo rename to board/amcc/bamboo/README diff --git a/doc/README.ebony b/board/amcc/ebony/README similarity index 100% rename from doc/README.ebony rename to board/amcc/ebony/README diff --git a/doc/README.ocotea b/board/amcc/ocotea/README.ocotea similarity index 100% rename from doc/README.ocotea rename to board/amcc/ocotea/README.ocotea diff --git a/doc/README.ocotea-PIBS-to-U-Boot b/board/amcc/ocotea/README.ocotea-PIBS-to-U-Boot similarity index 100% rename from doc/README.ocotea-PIBS-to-U-Boot rename to board/amcc/ocotea/README.ocotea-PIBS-to-U-Boot diff --git a/doc/README-integrator b/board/armltd/integrator/README similarity index 100% rename from doc/README-integrator rename to board/armltd/integrator/README diff --git a/doc/README.cmi b/board/cmi/README similarity index 100% rename from doc/README.cmi rename to board/cmi/README diff --git a/doc/README.COBRA5272 b/board/cobra5272/README similarity index 100% rename from doc/README.COBRA5272 rename to board/cobra5272/README diff --git a/doc/README.hawkboard b/board/davinci/da8xxevm/README.hawkboard similarity index 100% rename from doc/README.hawkboard rename to board/davinci/da8xxevm/README.hawkboard diff --git a/doc/README.dnp5370 b/board/dnp5370/README similarity index 100% rename from doc/README.dnp5370 rename to board/dnp5370/README diff --git a/doc/README.evb64260 b/board/evb64260/README similarity index 100% rename from doc/README.evb64260 rename to board/evb64260/README diff --git a/doc/README.EVB-64260-750CX b/board/evb64260/README.EVB-64260-750CX similarity index 100% rename from doc/README.EVB-64260-750CX rename to board/evb64260/README.EVB-64260-750CX diff --git a/doc/README.fads b/board/fads/README similarity index 100% rename from doc/README.fads rename to board/fads/README diff --git a/doc/README.m52277evb b/board/freescale/m52277evb/README similarity index 100% rename from doc/README.m52277evb rename to board/freescale/m52277evb/README diff --git a/doc/README.m5253evbe b/board/freescale/m5253evbe/README similarity index 100% rename from doc/README.m5253evbe rename to board/freescale/m5253evbe/README diff --git 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diff --git a/doc/README.mpc8315erdb b/board/freescale/mpc8315erdb/README similarity index 100% rename from doc/README.mpc8315erdb rename to board/freescale/mpc8315erdb/README diff --git a/doc/README.mpc8323erdb b/board/freescale/mpc8323erdb/README similarity index 100% rename from doc/README.mpc8323erdb rename to board/freescale/mpc8323erdb/README diff --git a/doc/README.mpc832xemds b/board/freescale/mpc832xemds/README similarity index 100% rename from doc/README.mpc832xemds rename to board/freescale/mpc832xemds/README diff --git a/doc/README.mpc8349itx b/board/freescale/mpc8349itx/README similarity index 100% rename from doc/README.mpc8349itx rename to board/freescale/mpc8349itx/README diff --git a/doc/README.mpc8360emds b/board/freescale/mpc8360emds/README similarity index 100% rename from doc/README.mpc8360emds rename to board/freescale/mpc8360emds/README diff --git a/doc/README.mpc837xemds b/board/freescale/mpc837xemds/README similarity index 100% rename from doc/README.mpc837xemds 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rename from doc/README.p2020rdb rename to board/freescale/p1_p2_rdb/README diff --git a/doc/README.p1_p2_rdb_pc b/board/freescale/p1_p2_rdb_pc/README similarity index 100% rename from doc/README.p1_p2_rdb_pc rename to board/freescale/p1_p2_rdb_pc/README diff --git a/doc/README.p2041rdb b/board/freescale/p2041rdb/README similarity index 100% rename from doc/README.p2041rdb rename to board/freescale/p2041rdb/README diff --git a/doc/README.p3060qds b/board/freescale/p3060qds/README similarity index 100% rename from doc/README.p3060qds rename to board/freescale/p3060qds/README diff --git a/doc/README.IceCube b/board/icecube/README similarity index 100% rename from doc/README.IceCube rename to board/icecube/README diff --git a/doc/README.Lite5200B_low_power b/board/icecube/README.Lite5200B_low_power similarity index 100% rename from doc/README.Lite5200B_low_power rename to board/icecube/README.Lite5200B_low_power diff --git a/doc/README.INCA-IP b/board/incaip/README similarity index 100% rename from doc/README.INCA-IP rename to board/incaip/README diff --git a/doc/README.IPHASE4539 b/board/iphase4539/README similarity index 100% rename from doc/README.IPHASE4539 rename to board/iphase4539/README diff --git a/doc/README.kmeter1 b/board/keymile/km83xx/README.kmeter1 similarity index 100% rename from doc/README.kmeter1 rename to board/keymile/km83xx/README.kmeter1 diff --git a/doc/README.korat b/board/korat/README similarity index 100% rename from doc/README.korat rename to board/korat/README diff --git a/doc/README.mergerbox b/board/matrix_vision/mergerbox/README similarity index 100% rename from doc/README.mergerbox rename to board/matrix_vision/mergerbox/README diff --git a/doc/README.mvbc_p b/board/matrix_vision/mvbc_p/README.mvbc_p similarity index 100% rename from doc/README.mvbc_p rename to board/matrix_vision/mvbc_p/README.mvbc_p diff --git a/doc/README.mvblm7 b/board/matrix_vision/mvblm7/README.mvblm7 similarity index 100% rename from doc/README.mvblm7 rename to board/matrix_vision/mvblm7/README.mvblm7 diff --git a/doc/README.mvsmr b/board/matrix_vision/mvsmr/README.mvsmr similarity index 100% rename from doc/README.mvsmr rename to board/matrix_vision/mvsmr/README.mvsmr diff --git a/doc/README.MBX b/board/mbx8xx/README similarity index 100% rename from doc/README.MBX rename to board/mbx8xx/README diff --git a/doc/README.PIP405 b/board/mpl/pip405/README similarity index 100% rename from doc/README.PIP405 rename to board/mpl/pip405/README diff --git a/doc/README.phytec.pcm030 b/board/phytec/pcm030/README similarity index 100% rename from doc/README.phytec.pcm030 rename to board/phytec/pcm030/README diff --git a/board/qemu-mips/README b/board/qemu-mips/README index 565241b58783..9fd97e1249a9 100644 --- a/board/qemu-mips/README +++ b/board/qemu-mips/README @@ -13,3 +13,170 @@ Derived from au1x00 with a lot of things cut out. Supports emulated flash (patch Jean-Christophe PLAGNIOL-VILLARD) with recent qemu versions. When using emulated flash, launch with -pflash and erase mips_bios.bin. + + + +Notes for the Qemu MIPS port +---------------------------- + +I) Example usage: + +# ln -s u-boot.bin mips_bios.bin +start it: +qemu-system-mips -L . /dev/null -nographic + +or + +if you use a qemu version after commit 4224 + +create image: +# dd of=flash bs=1k count=4k if=/dev/zero +# dd of=flash bs=1k conv=notrunc if=u-boot.bin +start it: +# qemu-system-mips -M mips -pflash flash -monitor null -nographic + +2) Download kernel + initrd + +On ftp://ftp.denx.de/pub/contrib/Jean-Christophe_Plagniol-Villard/qemu_mips/ +you can downland + +#config to build the kernel +qemu_mips_defconfig +#patch to fix mips interrupt init on 2.6.24.y kernel +qemu_mips_kernel.patch +initrd.gz +vmlinux +vmlinux.bin +System.map + +4) Generate uImage + +# tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage + +5) Copy uImage to Flash +# dd if=uImage bs=1k conv=notrunc seek=224 of=flash + +6) Generate Ide Disk + +# dd of=ide bs=1k cout=100k if=/dev/zero + +# sfdisk -C 261 -d ide +# partition table of ide +unit: sectors + + ide1 : start= 63, size= 32067, Id=83 + ide2 : start= 32130, size= 32130, Id=83 + ide3 : start= 64260, size= 4128705, Id=83 + ide4 : start= 0, size= 0, Id= 0 + +7) Copy to ide + +# dd if=uImage bs=512 conv=notrunc seek=63 of=ide + +8) Generate ext2 on part 2 on Copy uImage and initrd.gz + +# Attached as loop device ide offset = 32130 * 512 +# losetup -o 16450560 -f ide +# Format as ext2 ( arg2 : nb blocks) +# mke2fs /dev/loop0 16065 +# losetup -d /dev/loop0 +# Mount and copy uImage and initrd.gz to it +# mount -o loop,offset=16450560 -t ext2 ide /mnt +# mkdir /mnt/boot +# cp {initrd.gz,uImage} /mnt/boot/ +# Umount it +# umount /mnt + +9) Set Environment + +setenv rd_start 0x80800000 +setenv rd_size 2663940 +setenv kernel BFC38000 +setenv oad_addr 80500000 +setenv load_addr2 80F00000 +setenv kernel_flash BFC38000 +setenv load_addr_hello 80200000 +setenv bootargs 'root=/dev/ram0 init=/bin/sh' +setenv load_rd_ext2 'ide res; ext2load ide 0:2 ${rd_start} /boot/initrd.gz' +setenv load_rd_tftp 'tftp ${rd_start} /initrd.gz' +setenv load_kernel_hda 'ide res; diskboot ${load_addr} 0:2' +setenv load_kernel_ext2 'ide res; ext2load ide 0:2 ${load_addr} /boot/uImage' +setenv load_kernel_tftp 'tftp ${load_addr} /qemu_mips/uImage' +setenv boot_ext2_ext2 'run load_rd_ext2; run load_kernel_ext2; run addmisc; bootm ${load_addr}' +setenv boot_ext2_flash 'run load_rd_ext2; run addmisc; bootm ${kernel_flash}' +setenv boot_ext2_hda 'run load_rd_ext2; run load_kernel_hda; run addmisc; bootm ${load_addr}' +setenv boot_ext2_tftp 'run load_rd_ext2; run load_kernel_tftp; run addmisc; bootm ${load_addr}' +setenv boot_tftp_hda 'run load_rd_tftp; run load_kernel_hda; run addmisc; bootm ${load_addr}' +setenv boot_tftp_ext2 'run load_rd_tftp; run load_kernel_ext2; run addmisc; bootm ${load_addr}' +setenv boot_tftp_flash 'run load_rd_tftp; run addmisc; bootm ${kernel_flash}' +setenv boot_tftp_tftp 'run load_rd_tftp; run load_kernel_tftp; run addmisc; bootm ${load_addr}' +setenv load_hello_tftp 'tftp ${load_addr_hello} /examples/hello_world.bin' +setenv go_tftp 'run load_hello_tftp; go ${load_addr_hello}' +setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}' +setenv bootcmd 'run boot_tftp_flash' + +10) Now you can boot from flash, ide, ide+ext2 and tfp + +# qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide + +II) How to debug U-Boot + +In order to debug U-Boot you need to start qemu with gdb server support (-s) +and waiting the connection to start the CPU (-S) + +# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide + +in an other console you start gdb + +1) Debugging of U-Boot Before Relocation + +Before relocation, the addresses in the ELF file can be used without any problems +by connecting to the gdb server localhost:1234 + +# mipsel-unknown-linux-gnu-gdb u-boot +GNU gdb 6.6 +Copyright (C) 2006 Free Software Foundation, Inc. +GDB is free software, covered by the GNU General Public License, and you are +welcome to change it and/or distribute copies of it under certain conditions. +Type "show copying" to see the conditions. +There is absolutely no warranty for GDB. Type "show warranty" for details. +This GDB was configured as "--host=i486-linux-gnu --target=mipsel-unknown-linux-gnu"... +(gdb) target remote localhost:1234 +Remote debugging using localhost:1234 +_start () at start.S:64 +64 RVECENT(reset,0) /* U-boot entry point */ +Current language: auto; currently asm +(gdb) b board.c:289 +Breakpoint 1 at 0xbfc00cc8: file board.c, line 289. +(gdb) c +Continuing. + +Breakpoint 1, board_init_f (bootflag=) at board.c:290 +290 relocate_code (addr_sp, id, addr); +Current language: auto; currently c +(gdb) p/x addr +$1 = 0x87fa0000 + +2) Debugging of U-Boot After Relocation + +For debugging U-Boot after relocation we need to know the address to which +U-Boot relocates itself to 0x87fa0000 by default. +And replace the symbol table to this offset. + +(gdb) symbol-file +Discard symbol table from `/private/u-boot-arm/u-boot'? (y or n) y +Error in re-setting breakpoint 1: +No symbol table is loaded. Use the "file" command. +No symbol file now. +(gdb) add-symbol-file u-boot 0x87fa0000 +add symbol table from file "u-boot" at + .text_addr = 0x87fa0000 +(y or n) y +Reading symbols from /private/u-boot-arm/u-boot...done. +Breakpoint 1 at 0x87fa0cc8: file board.c, line 289. +(gdb) c +Continuing. + +Program received signal SIGINT, Interrupt. +0xffffffff87fa0de4 in udelay (usec=) at time.c:78 +78 while ((tmo - read_c0_count()) < 0x7fffffff) diff --git a/doc/README.sh7757lcr b/board/renesas/sh7757lcr/README.sh7757lcr similarity index 100% rename from doc/README.sh7757lcr rename to board/renesas/sh7757lcr/README.sh7757lcr diff --git a/doc/README.sh7785lcr b/board/renesas/sh7785lcr/README.sh7785lcr similarity index 100% rename from doc/README.sh7785lcr rename to board/renesas/sh7785lcr/README.sh7785lcr diff --git a/doc/README.sandbox b/board/sandbox/sandbox/README.sandbox similarity index 100% rename from doc/README.sandbox rename to board/sandbox/sandbox/README.sandbox diff --git a/board/sandpoint/README b/board/sandpoint/README index 9e48168a24c1..a2e0831f33bf 100644 --- a/board/sandpoint/README +++ b/board/sandpoint/README @@ -13,3 +13,401 @@ seem to maintain it any more. I can be reached by mail as tkoeller@gmx.net. Thomas Koeller + + + + +The port was tested on a Sandpoint 8240 X3 board, with U-Boot +installed in the flash memory of the CPU card. Please use the +following DIP switch settings: + +Motherboard: + +SW1.1: on SW1.2: on SW1.3: on SW1.4: on +SW1.5: on SW1.6: on SW1.7: on SW1.8: on + +SW2.1: on SW2.2: on SW2.3: on SW2.4: on +SW2.5: on SW2.6: on SW2.7: on SW2.8: on + + +CPU Card: + +SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on +SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF + +SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF +SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on + + +The followind detailed description of installation and initial steps +with U-Boot and QNX was provided by Jim Sandoz : + + +Directions for installing U-Boot on Sandpoint+Unity8240 +using the Abatron BDI2000 BDM/JTAG debugger ... + +Background and Reference info: +http://u-boot.sourceforge.net/ +http://www.abatron.ch/ +http://www.abatron.ch/BDI/bdihw.html +http://www.abatron.ch/DataSheets/BDI2000.pdf +http://www.abatron.ch/Manuals/ManGdbCOP-2000C.pdf +http://e-www.motorola.com/collateral/SPX3UM.pdf +http://e-www.motorola.com/collateral/UNITYX4CONFIG.pdf + + +Connection Diagram: + =========== + === ===== |----- | +| | <---------------> | | | | | +|PC | rs232 | BDI |=============[] | | +| | |2000 | BDM probe | | | +| | <---------------> | | |----- | + === ethernet ===== | | + | | + =========== + Sandpoint X3 with + Unity 8240 proc + + +PART 1) + DIP Switch Settings: + +Sandpoint X3 8240 processor board DIP switch settings, with +U-Boot to be installed in the flash memory of the CPU card: + +Motorola Sandpoint X3 Motherboard: +SW1.1: on SW1.2: on SW1.3: on SW1.4: on +SW1.5: on SW1.6: on SW1.7: on SW1.8: on +SW2.1: on SW2.2: on SW2.3: on SW2.4: on +SW2.5: on SW2.6: on SW2.7: on SW2.8: on + +Motorola Unity 8240 CPU Card: +SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on +SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF +SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF +SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on + + +PART 2) + Connect the BDI2000 Cable to the Sandpoint/Unity 8240: + +BDM Pin 1 on the Unity 8240 processor board is towards the +PCI PMC connectors, or away from the socketed SDRAM, i.e.: + + ==================== + | ---------------- | + | | SDRAM | | + | | | | + | ---------------- | + | |~| | + | |B| ++++++ | + | |D| + uP + | + | |M| +8240+ | + | ~ 1 ++++++ | + | | + | | + | | + | PMC conn ====== | + | ===== ====== | + | | + ==================== + + +PART 3) + Setting up the BDI2000, and preparing for TCP/IP network comms: + +Connect the BDI2000 to the PC using the supplied serial cable. +Download the BDI2000 software and install it using setup.exe. + +[Note: of course you can also use the Linux command line tool +"bdisetup" to configure your BDI2000 - the sources are included on +the floppy disk that comes with your BDI2000. Just in case you don't +have any Windows PC's - like me :-) -- wd ] + +Power up the BDI2000; then follow directions to assign the IP +address and related network information. Note that U-Boot +will be loaded to the Sandpoint via tftp. You need to either +use the Abatron-provided tftp application or provide a tftp +server (e.g. Linux/Solaris/*BSD) somewhere on your network. +Once the IP address etc are assigned via the RS232 port, +further communication with the BDI2000 will happen via the +ethernet connection. + +PART 4) + Making a TCP/IP network connection to the Abatron BDI2000: + +Telnet to the Abatron BDI2000. Assuming that all of the +networking info was loaded via RS232 correctly, you will see +the following (scrolling): + +- TARGET: waiting for target Vcc +- TARGET: waiting for target Vcc + + +PART 5) + Power up the target Sandpoint: +If the BDM connections are correct, the following will now appear: + +- TARGET: waiting for target Vcc +- TARGET: waiting for target Vcc +- TARGET: processing power-up delay +- TARGET: processing user reset request +- BDI asserts HRESET +- Reset JTAG controller passed +- Bypass check: 0x55 => 0xAA +- Bypass check: 0x55 => 0xAA +- JTAG exists check passed +- Target PVR is 0x00810101 +- COP status is 0x01 +- Check running state passed +- BDI scans COP freeze command +- BDI removes HRESET +- COP status is 0x05 +- Check stopped state passed +- Check LSRL length passed +- BDI sets breakpoint at 0xFFF00100 +- BDI resumes program execution +- Waiting for target stop passed +- TARGET: Target PVR is 0x00810101 +- TARGET: reseting target passed +- TARGET: processing target startup .... +- TARGET: processing target startup passed +BDI> + + +PART 6) + Erase the current contents of the flash memory: + +BDI>era 0xFFF00000 + Erasing flash at 0xfff00000 + Erasing flash passed +BDI>era 0xFFF04000 + Erasing flash at 0xfff04000 + Erasing flash passed +BDI>era 0xFFF06000 + Erasing flash at 0xfff06000 + Erasing flash passed +BDI>era 0xFFF08000 + Erasing flash at 0xfff08000 + Erasing flash passed +BDI>era 0xFFF10000 + Erasing flash at 0xfff10000 + Erasing flash passed +BDI>era 0xFFF20000 + Erasing flash at 0xfff20000 + Erasing flash passed + + +PART 7) + Program the flash memory with the U-Boot image: + +BDI>prog 0xFFF00000 u-boot.bin bin + Programming u-boot.bin , please wait .... + Programming flash passed + + +PART 8) + Connect PC to Sandpoint: +Using a crossover serial cable, attach the PC serial port to the +Sandpoint's COM1. Set communications parameters to 8N1 / 9600 baud. + + +PART 9) + Reset the Unity and begin U-Boot execution: + +BDI>reset +- TARGET: processing user reset request +- TARGET: Target PVR is 0x00810101 +- TARGET: reseting target passed +- TARGET: processing target init list .... +- TARGET: processing target init list passed + +BDI>go + +Now see output from U-Boot running, sent via serial port: + +U-Boot 1.1.4 (Jan 23 2002 - 18:29:19) + +CPU: MPC8240 Revision 1.1 at 264 MHz: 16 kB I-Cache 16 kB D-Cache +Board: Sandpoint 8240 Unity +DRAM: 64 MB +FLASH: 2 MB +PCI: scanning bus0 ... + bus dev fn venID devID class rev MBAR0 MBAR1 IPIN ILINE + 00 00 00 1057 0003 060000 13 00000008 00000000 01 00 + 00 0b 00 10ad 0565 060100 10 00000000 00000000 00 00 + 00 0f 00 8086 1229 020000 08 80000000 80000001 01 00 +In: serial +Out: serial +Err: serial +=> + + +PART 10) + Set and save any required environmental variables, examples of some: + +=> setenv ethaddr 00:03:47:97:D0:79 +=> setenv bootfile your_qnx_image_here +=> setenv hostname sandpointX +=> setenv netmask 255.255.255.0 +=> setenv ipaddr 192.168.0.11 +=> setenv serverip 192.168.0.10 +=> setenv gatewayip=192.168.0.1 +=> saveenv +Saving Environment to Flash... +Un-Protected 1 sectors +Erasing Flash... + done +Erased 1 sectors +Writing to Flash... done +Protected 1 sectors +=> + +**** Example environment: **** + +=> printenv +baudrate=9600 +bootfile=telemetry +hostname=sp1 +ethaddr=00:03:47:97:E4:6B +load=tftp 100000 u-boot.bin +update=protect off all;era FFF00000 FFF3FFFF;cp.b 100000 FFF00000 ${filesize};saveenv +filesize=1f304 +gatewayip=145.17.228.1 +netmask=255.255.255.0 +ipaddr=145.17.228.42 +serverip=145.17.242.46 +stdin=serial +stdout=serial +stderr=serial + +Environment size: 332/8188 bytes +=> + +here's some text useful stuff for cut-n-paste: +setenv hostname sandpoint1 +setenv netmask 255.255.255.0 +setenv ipaddr 145.17.228.81 +setenv serverip 145.17.242.46 +setenv gatewayip 145.17.228.1 +saveenv + +PART 11) + Test U-Boot by tftp'ing new U-Boot, overwriting current: + +=> protect off all +Un-Protect Flash Bank # 1 +=> tftp 100000 u-boot.bin +eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0) +ARP broadcast 1 +TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through + gateway 145.17.228.1 +Filename 'u-boot.bin'. +Load address: 0x100000 +Loading: ######################### +done +Bytes transferred = 127628 (1f28c hex) +=> era all +Erase Flash Bank # 1 + done +Erase Flash Bank # 2 - missing +=> cp.b 0x100000 FFF00000 1f28c +Copy to Flash... done +=> saveenv +Saving Environment to Flash... +Un-Protected 1 sectors +Erasing Flash... + done +Erased 1 sectors +Writing to Flash... done +Protected 1 sectors +=> reset + +You can put these commands into some environment variables; + +=> setenv load tftp 100000 u-boot.bin +=> setenv update protect off all\;era FFF00000 FFF3FFFF\;cp.b 100000 FFF00000 \${filesize}\;saveenv +=> saveenv + +Then you just have to type "run load" then "run update" + +=> run load +eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0) +ARP broadcast 1 +TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through + gateway 145.17.228.1 +Filename 'u-boot.bin'. +Load address: 0x100000 +Loading: ######################### +done +Bytes transferred = 127748 (1f304 hex) +=> run update +Un-Protect Flash Bank # 1 +Un-Protect Flash Bank # 2 +Erase Flash from 0xfff00000 to 0xfff3ffff + done +Erased 7 sectors +Copy to Flash... done +Saving Environment to Flash... +Un-Protected 1 sectors +Erasing Flash... + done +Erased 1 sectors +Writing to Flash... done +Protected 1 sectors +=> + + +PART 12) + Load OS image (ELF format) via U-Boot using tftp + + +=> tftp 800000 sandpoint-simple.elf +eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0) +ARP broadcast 1 +TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through + gateway 145.17.228.1 +Filename 'sandpoint-simple.elf'. +Load address: 0x800000 +Loading: ################################################################# + ################################################################# + ################################################################# + ######################## +done +Bytes transferred = 1120284 (11181c hex) +==> + +PART 13) + Begin OS image execution: (note that unless you have the +serial parameters of your OS image set to 9600 (i.e. same as +the U-Boot binary) you will get garbage here until you change +the serial communications speed. + +=> bootelf 800000 +Loading @ 0x001f0100 (1120028 bytes) +## Starting application at 0x001f1d28 ... +Replace init_hwinfo() with a board specific version + +Loading QNX6.... + +Header size=0x0000009c, Total Size=0x000005c0, #Cpu=1, Type=1 +<...loader and kernel messages snipped...> + +Welcome to Neutrino on the Sandpoint +# + + +other information: + +CVS Retrieval Notes: + +U-Boot's SourceForge CVS repository can be checked out +through anonymous (pserver) CVS with the following +instruction set. The module you wish to check out must +be specified as the modulename. When prompted for a +password for anonymous, simply press the Enter key. + +cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login + +cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot diff --git a/doc/README.sbc8349 b/board/sbc8349/README similarity index 100% rename from doc/README.sbc8349 rename to board/sbc8349/README diff --git a/doc/README.sbc8548 b/board/sbc8548/README similarity index 100% rename from doc/README.sbc8548 rename to board/sbc8548/README diff --git a/doc/README.SBC8560 b/board/sbc8560/README similarity index 100% rename from doc/README.SBC8560 rename to board/sbc8560/README diff --git a/doc/README.sbc8641d b/board/sbc8641d/README similarity index 100% rename from doc/README.sbc8641d rename to board/sbc8641d/README diff --git a/doc/README.simpc8313 b/board/sheldon/simpc8313/README.simpc8313 similarity index 100% rename from doc/README.simpc8313 rename to board/sheldon/simpc8313/README.simpc8313 diff --git a/doc/README.nhk8815 b/board/st/nhk8815/README.nhk8815 similarity index 100% rename from doc/README.nhk8815 rename to board/st/nhk8815/README.nhk8815 diff --git a/doc/README.stxxtc b/board/stx/stxxtc/README.stxxtc similarity index 100% rename from doc/README.stxxtc rename to board/stx/stxxtc/README.stxxtc diff --git a/doc/README.omap730p2 b/board/ti/omap730p2/README.omap730p2 similarity index 100% rename from doc/README.omap730p2 rename to board/ti/omap730p2/README.omap730p2 diff --git a/doc/README.timll b/board/timll/devkit8000/README similarity index 100% rename from doc/README.timll rename to board/timll/devkit8000/README diff --git a/doc/README.TQM8260 b/board/tqc/tqm8260/README similarity index 100% rename from doc/README.TQM8260 rename to board/tqc/tqm8260/README diff --git a/doc/README.xpedite1k b/board/xes/xpedite1000/README similarity index 100% rename from doc/README.xpedite1k rename to board/xes/xpedite1000/README diff --git a/doc/README.zeus b/board/zeus/README similarity index 100% rename from doc/README.zeus rename to board/zeus/README diff --git a/doc/README.OXC b/doc/README.OXC deleted file mode 100644 index c5db5f885965..000000000000 --- a/doc/README.OXC +++ /dev/null @@ -1,24 +0,0 @@ -This document contains different information about the port -of U-Boot for the OXC board designed by Lucent Technologies, -Inc. - -1. Showing activity - -U-Boot for the OXC board can show its current status using -the Active LED. This feature is configured by the following -options: - -CONFIG_SHOW_ACTIVITY - - When this option is on, the Active LED is blinking fast -when U-Boot runs in the idle loop (i.e. waits for user -commands from serial console) and blinking slow when it -downloads an image over network. When U-Boot loads an image -over serial line the Active LED does not blink and its state -is random (i.e. either constant on or constant off). - -CONFIG_SHOW_BOOT_PROGRESS - - When this option is on, U-Boot switches the Active LED -off before booting an image and switches it on if booting -failed due to some reasons. diff --git a/doc/README.Sandpoint8240 b/doc/README.Sandpoint8240 deleted file mode 100644 index fa846dc33e13..000000000000 --- a/doc/README.Sandpoint8240 +++ /dev/null @@ -1,394 +0,0 @@ -The port was tested on a Sandpoint 8240 X3 board, with U-Boot -installed in the flash memory of the CPU card. Please use the -following DIP switch settings: - -Motherboard: - -SW1.1: on SW1.2: on SW1.3: on SW1.4: on -SW1.5: on SW1.6: on SW1.7: on SW1.8: on - -SW2.1: on SW2.2: on SW2.3: on SW2.4: on -SW2.5: on SW2.6: on SW2.7: on SW2.8: on - - -CPU Card: - -SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on -SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF - -SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF -SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on - - -The followind detailed description of installation and initial steps -with U-Boot and QNX was provided by Jim Sandoz : - - -Directions for installing U-Boot on Sandpoint+Unity8240 -using the Abatron BDI2000 BDM/JTAG debugger ... - -Background and Reference info: -http://u-boot.sourceforge.net/ -http://www.abatron.ch/ -http://www.abatron.ch/BDI/bdihw.html -http://www.abatron.ch/DataSheets/BDI2000.pdf -http://www.abatron.ch/Manuals/ManGdbCOP-2000C.pdf -http://e-www.motorola.com/collateral/SPX3UM.pdf -http://e-www.motorola.com/collateral/UNITYX4CONFIG.pdf - - -Connection Diagram: - =========== - === ===== |----- | -| | <---------------> | | | | | -|PC | rs232 | BDI |=============[] | | -| | |2000 | BDM probe | | | -| | <---------------> | | |----- | - === ethernet ===== | | - | | - =========== - Sandpoint X3 with - Unity 8240 proc - - -PART 1) - DIP Switch Settings: - -Sandpoint X3 8240 processor board DIP switch settings, with -U-Boot to be installed in the flash memory of the CPU card: - -Motorola Sandpoint X3 Motherboard: -SW1.1: on SW1.2: on SW1.3: on SW1.4: on -SW1.5: on SW1.6: on SW1.7: on SW1.8: on -SW2.1: on SW2.2: on SW2.3: on SW2.4: on -SW2.5: on SW2.6: on SW2.7: on SW2.8: on - -Motorola Unity 8240 CPU Card: -SW2.1: OFF SW2.2: OFF SW2.3: on SW2.4: on -SW2.5: OFF SW2.6: OFF SW2.7: OFF SW2.8: OFF -SW3.1: OFF SW3.2: on SW3.3: OFF SW3.4: OFF -SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on - - -PART 2) - Connect the BDI2000 Cable to the Sandpoint/Unity 8240: - -BDM Pin 1 on the Unity 8240 processor board is towards the -PCI PMC connectors, or away from the socketed SDRAM, i.e.: - - ==================== - | ---------------- | - | | SDRAM | | - | | | | - | ---------------- | - | |~| | - | |B| ++++++ | - | |D| + uP + | - | |M| +8240+ | - | ~ 1 ++++++ | - | | - | | - | | - | PMC conn ====== | - | ===== ====== | - | | - ==================== - - -PART 3) - Setting up the BDI2000, and preparing for TCP/IP network comms: - -Connect the BDI2000 to the PC using the supplied serial cable. -Download the BDI2000 software and install it using setup.exe. - -[Note: of course you can also use the Linux command line tool -"bdisetup" to configure your BDI2000 - the sources are included on -the floppy disk that comes with your BDI2000. Just in case you don't -have any Windows PC's - like me :-) -- wd ] - -Power up the BDI2000; then follow directions to assign the IP -address and related network information. Note that U-Boot -will be loaded to the Sandpoint via tftp. You need to either -use the Abatron-provided tftp application or provide a tftp -server (e.g. Linux/Solaris/*BSD) somewhere on your network. -Once the IP address etc are assigned via the RS232 port, -further communication with the BDI2000 will happen via the -ethernet connection. - -PART 4) - Making a TCP/IP network connection to the Abatron BDI2000: - -Telnet to the Abatron BDI2000. Assuming that all of the -networking info was loaded via RS232 correctly, you will see -the following (scrolling): - -- TARGET: waiting for target Vcc -- TARGET: waiting for target Vcc - - -PART 5) - Power up the target Sandpoint: -If the BDM connections are correct, the following will now appear: - -- TARGET: waiting for target Vcc -- TARGET: waiting for target Vcc -- TARGET: processing power-up delay -- TARGET: processing user reset request -- BDI asserts HRESET -- Reset JTAG controller passed -- Bypass check: 0x55 => 0xAA -- Bypass check: 0x55 => 0xAA -- JTAG exists check passed -- Target PVR is 0x00810101 -- COP status is 0x01 -- Check running state passed -- BDI scans COP freeze command -- BDI removes HRESET -- COP status is 0x05 -- Check stopped state passed -- Check LSRL length passed -- BDI sets breakpoint at 0xFFF00100 -- BDI resumes program execution -- Waiting for target stop passed -- TARGET: Target PVR is 0x00810101 -- TARGET: reseting target passed -- TARGET: processing target startup .... -- TARGET: processing target startup passed -BDI> - - -PART 6) - Erase the current contents of the flash memory: - -BDI>era 0xFFF00000 - Erasing flash at 0xfff00000 - Erasing flash passed -BDI>era 0xFFF04000 - Erasing flash at 0xfff04000 - Erasing flash passed -BDI>era 0xFFF06000 - Erasing flash at 0xfff06000 - Erasing flash passed -BDI>era 0xFFF08000 - Erasing flash at 0xfff08000 - Erasing flash passed -BDI>era 0xFFF10000 - Erasing flash at 0xfff10000 - Erasing flash passed -BDI>era 0xFFF20000 - Erasing flash at 0xfff20000 - Erasing flash passed - - -PART 7) - Program the flash memory with the U-Boot image: - -BDI>prog 0xFFF00000 u-boot.bin bin - Programming u-boot.bin , please wait .... - Programming flash passed - - -PART 8) - Connect PC to Sandpoint: -Using a crossover serial cable, attach the PC serial port to the -Sandpoint's COM1. Set communications parameters to 8N1 / 9600 baud. - - -PART 9) - Reset the Unity and begin U-Boot execution: - -BDI>reset -- TARGET: processing user reset request -- TARGET: Target PVR is 0x00810101 -- TARGET: reseting target passed -- TARGET: processing target init list .... -- TARGET: processing target init list passed - -BDI>go - -Now see output from U-Boot running, sent via serial port: - -U-Boot 1.1.4 (Jan 23 2002 - 18:29:19) - -CPU: MPC8240 Revision 1.1 at 264 MHz: 16 kB I-Cache 16 kB D-Cache -Board: Sandpoint 8240 Unity -DRAM: 64 MB -FLASH: 2 MB -PCI: scanning bus0 ... - bus dev fn venID devID class rev MBAR0 MBAR1 IPIN ILINE - 00 00 00 1057 0003 060000 13 00000008 00000000 01 00 - 00 0b 00 10ad 0565 060100 10 00000000 00000000 00 00 - 00 0f 00 8086 1229 020000 08 80000000 80000001 01 00 -In: serial -Out: serial -Err: serial -=> - - -PART 10) - Set and save any required environmental variables, examples of some: - -=> setenv ethaddr 00:03:47:97:D0:79 -=> setenv bootfile your_qnx_image_here -=> setenv hostname sandpointX -=> setenv netmask 255.255.255.0 -=> setenv ipaddr 192.168.0.11 -=> setenv serverip 192.168.0.10 -=> setenv gatewayip=192.168.0.1 -=> saveenv -Saving Environment to Flash... -Un-Protected 1 sectors -Erasing Flash... - done -Erased 1 sectors -Writing to Flash... done -Protected 1 sectors -=> - -**** Example environment: **** - -=> printenv -baudrate=9600 -bootfile=telemetry -hostname=sp1 -ethaddr=00:03:47:97:E4:6B -load=tftp 100000 u-boot.bin -update=protect off all;era FFF00000 FFF3FFFF;cp.b 100000 FFF00000 ${filesize};saveenv -filesize=1f304 -gatewayip=145.17.228.1 -netmask=255.255.255.0 -ipaddr=145.17.228.42 -serverip=145.17.242.46 -stdin=serial -stdout=serial -stderr=serial - -Environment size: 332/8188 bytes -=> - -here's some text useful stuff for cut-n-paste: -setenv hostname sandpoint1 -setenv netmask 255.255.255.0 -setenv ipaddr 145.17.228.81 -setenv serverip 145.17.242.46 -setenv gatewayip 145.17.228.1 -saveenv - -PART 11) - Test U-Boot by tftp'ing new U-Boot, overwriting current: - -=> protect off all -Un-Protect Flash Bank # 1 -=> tftp 100000 u-boot.bin -eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0) -ARP broadcast 1 -TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through - gateway 145.17.228.1 -Filename 'u-boot.bin'. -Load address: 0x100000 -Loading: ######################### -done -Bytes transferred = 127628 (1f28c hex) -=> era all -Erase Flash Bank # 1 - done -Erase Flash Bank # 2 - missing -=> cp.b 0x100000 FFF00000 1f28c -Copy to Flash... done -=> saveenv -Saving Environment to Flash... -Un-Protected 1 sectors -Erasing Flash... - done -Erased 1 sectors -Writing to Flash... done -Protected 1 sectors -=> reset - -You can put these commands into some environment variables; - -=> setenv load tftp 100000 u-boot.bin -=> setenv update protect off all\;era FFF00000 FFF3FFFF\;cp.b 100000 FFF00000 \${filesize}\;saveenv -=> saveenv - -Then you just have to type "run load" then "run update" - -=> run load -eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0) -ARP broadcast 1 -TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through - gateway 145.17.228.1 -Filename 'u-boot.bin'. -Load address: 0x100000 -Loading: ######################### -done -Bytes transferred = 127748 (1f304 hex) -=> run update -Un-Protect Flash Bank # 1 -Un-Protect Flash Bank # 2 -Erase Flash from 0xfff00000 to 0xfff3ffff - done -Erased 7 sectors -Copy to Flash... done -Saving Environment to Flash... -Un-Protected 1 sectors -Erasing Flash... - done -Erased 1 sectors -Writing to Flash... done -Protected 1 sectors -=> - - -PART 12) - Load OS image (ELF format) via U-Boot using tftp - - -=> tftp 800000 sandpoint-simple.elf -eth: Intel i82559 PCI EtherExpressPro @0x80000000(bus=0, device=15, func=0) -ARP broadcast 1 -TFTP from server 145.17.242.46; our IP address is 145.17.228.42; sending through - gateway 145.17.228.1 -Filename 'sandpoint-simple.elf'. -Load address: 0x800000 -Loading: ################################################################# - ################################################################# - ################################################################# - ######################## -done -Bytes transferred = 1120284 (11181c hex) -==> - -PART 13) - Begin OS image execution: (note that unless you have the -serial parameters of your OS image set to 9600 (i.e. same as -the U-Boot binary) you will get garbage here until you change -the serial communications speed. - -=> bootelf 800000 -Loading @ 0x001f0100 (1120028 bytes) -## Starting application at 0x001f1d28 ... -Replace init_hwinfo() with a board specific version - -Loading QNX6.... - -Header size=0x0000009c, Total Size=0x000005c0, #Cpu=1, Type=1 -<...loader and kernel messages snipped...> - -Welcome to Neutrino on the Sandpoint -# - - -other information: - -CVS Retrieval Notes: - -U-Boot's SourceForge CVS repository can be checked out -through anonymous (pserver) CVS with the following -instruction set. The module you wish to check out must -be specified as the modulename. When prompted for a -password for anonymous, simply press the Enter key. - -cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login - -cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot diff --git a/doc/README.amigaone b/doc/README.amigaone deleted file mode 100644 index 99759779171b..000000000000 --- a/doc/README.amigaone +++ /dev/null @@ -1,12 +0,0 @@ -AmigaOne U-Boot and the SciTech emulator - -The directory board/MAI/bios_emulator contains the source code -of the SciTech x86 emulator. This emulator is normally available -under a BSD license. However, SciTech kindly gave us permission -to use their emulator in PPCBoot for the AmigaOne. It's available -in this form only under GPL. - -Thanks to Kendall Bennett and the rest of the team at SciTech. -See http://www.scitechsoft.com for their web site - -The GPL license can be found at http://www.gnu.org/licenses/gpl.html diff --git a/doc/README.p4080ds b/doc/README.p4080ds deleted file mode 100644 index 3ed59a8cffe3..000000000000 --- a/doc/README.p4080ds +++ /dev/null @@ -1,32 +0,0 @@ -Overview --------- -The P4080DS is a Freescale reference board that hosts the eight-core P4080 SOC. - -SerDes hwconfig configuration ------------------------------ -The P4080 RCW includes three sets of bits the specify which SerDes lanes -should be powered down: SRDS_LPD_B1 (for bank one), SRDS_LPD_B2 (for bank two), -and SRDS_LPD_B3 (for bank three). Each of these contains four bits, one for -each lane in the bank. SerDes Erratum SERDES8 requires that SRDS_LPD_B2 and -SRDS_LPD_B3 be set to 0b1111. This forces banks two and three to be powered -down at reset. - -To re-enable these banks in U-Boot, two hwconfig are available: -"fsl_srds_lpd_b2" and "fsl_srds_lpd_b3". The value passed via fsl_srds_lpd_b2 -is written into SRDS_LPD_B2, and the value passed via fsl_srds_lpd_b3 is into -SRDS_LPD_B3. Each bit represents one of each bank, and a value of '1' -indicates that the lane should be powered down. - -For example, to indicate that both SerDes banks 2 and 3 are powered down, add -the following to hwconfig: - - serdes:fsl_srds_lpd_b2=0xf,fsl_srds_lpd_b3=0xf - -The "0xf" is a mask that corresponds to the 4 lanes A-D. The most significant -bit corresponds to lane A. To indicate that just lane A of bank 3 is to be -powered down, use: - - serdes:fsl_srds_lpd_b3=8 - -These options should be specified only if U-Boot does not automatically power -on the correct lanes. diff --git a/doc/README.qemu_mips b/doc/README.qemu_mips deleted file mode 100644 index e6a3855738b7..000000000000 --- a/doc/README.qemu_mips +++ /dev/null @@ -1,164 +0,0 @@ - -Notes for the Qemu MIPS port - -I) Example usage: - -# ln -s u-boot.bin mips_bios.bin -start it: -qemu-system-mips -L . /dev/null -nographic - -or - -if you use a qemu version after commit 4224 - -create image: -# dd of=flash bs=1k count=4k if=/dev/zero -# dd of=flash bs=1k conv=notrunc if=u-boot.bin -start it: -# qemu-system-mips -M mips -pflash flash -monitor null -nographic - -2) Download kernel + initrd - -On ftp://ftp.denx.de/pub/contrib/Jean-Christophe_Plagniol-Villard/qemu_mips/ -you can downland - -#config to build the kernel -qemu_mips_defconfig -#patch to fix mips interrupt init on 2.6.24.y kernel -qemu_mips_kernel.patch -initrd.gz -vmlinux -vmlinux.bin -System.map - -4) Generate uImage - -# tools/mkimage -A mips -O linux -T kernel -C gzip -a 0x80010000 -e 0x80245650 -n "Linux 2.6.24.y" -d vmlinux.bin.gz uImage - -5) Copy uImage to Flash -# dd if=uImage bs=1k conv=notrunc seek=224 of=flash - -6) Generate Ide Disk - -# dd of=ide bs=1k cout=100k if=/dev/zero - -# sfdisk -C 261 -d ide -# partition table of ide -unit: sectors - - ide1 : start= 63, size= 32067, Id=83 - ide2 : start= 32130, size= 32130, Id=83 - ide3 : start= 64260, size= 4128705, Id=83 - ide4 : start= 0, size= 0, Id= 0 - -7) Copy to ide - -# dd if=uImage bs=512 conv=notrunc seek=63 of=ide - -8) Generate ext2 on part 2 on Copy uImage and initrd.gz - -# Attached as loop device ide offset = 32130 * 512 -# losetup -o 16450560 -f ide -# Format as ext2 ( arg2 : nb blocks) -# mke2fs /dev/loop0 16065 -# losetup -d /dev/loop0 -# Mount and copy uImage and initrd.gz to it -# mount -o loop,offset=16450560 -t ext2 ide /mnt -# mkdir /mnt/boot -# cp {initrd.gz,uImage} /mnt/boot/ -# Umount it -# umount /mnt - -9) Set Environment - -setenv rd_start 0x80800000 -setenv rd_size 2663940 -setenv kernel BFC38000 -setenv oad_addr 80500000 -setenv load_addr2 80F00000 -setenv kernel_flash BFC38000 -setenv load_addr_hello 80200000 -setenv bootargs 'root=/dev/ram0 init=/bin/sh' -setenv load_rd_ext2 'ide res; ext2load ide 0:2 ${rd_start} /boot/initrd.gz' -setenv load_rd_tftp 'tftp ${rd_start} /initrd.gz' -setenv load_kernel_hda 'ide res; diskboot ${load_addr} 0:2' -setenv load_kernel_ext2 'ide res; ext2load ide 0:2 ${load_addr} /boot/uImage' -setenv load_kernel_tftp 'tftp ${load_addr} /qemu_mips/uImage' -setenv boot_ext2_ext2 'run load_rd_ext2; run load_kernel_ext2; run addmisc; bootm ${load_addr}' -setenv boot_ext2_flash 'run load_rd_ext2; run addmisc; bootm ${kernel_flash}' -setenv boot_ext2_hda 'run load_rd_ext2; run load_kernel_hda; run addmisc; bootm ${load_addr}' -setenv boot_ext2_tftp 'run load_rd_ext2; run load_kernel_tftp; run addmisc; bootm ${load_addr}' -setenv boot_tftp_hda 'run load_rd_tftp; run load_kernel_hda; run addmisc; bootm ${load_addr}' -setenv boot_tftp_ext2 'run load_rd_tftp; run load_kernel_ext2; run addmisc; bootm ${load_addr}' -setenv boot_tftp_flash 'run load_rd_tftp; run addmisc; bootm ${kernel_flash}' -setenv boot_tftp_tftp 'run load_rd_tftp; run load_kernel_tftp; run addmisc; bootm ${load_addr}' -setenv load_hello_tftp 'tftp ${load_addr_hello} /examples/hello_world.bin' -setenv go_tftp 'run load_hello_tftp; go ${load_addr_hello}' -setenv addmisc 'setenv bootargs ${bootargs} console=ttyS0,${baudrate} rd_start=${rd_start} rd_size=${rd_size} ethaddr=${ethaddr}' -setenv bootcmd 'run boot_tftp_flash' - -10) Now you can boot from flash, ide, ide+ext2 and tfp - -# qemu-system-mips -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide - -II) How to debug U-Boot - -In order to debug U-Boot you need to start qemu with gdb server support (-s) -and waiting the connection to start the CPU (-S) - -# qemu-system-mips -S -s -M mips -pflash flash -monitor null -nographic -net nic -net user -tftp `pwd` -hda ide - -in an other console you start gdb - -1) Debugging of U-Boot Before Relocation - -Before relocation, the addresses in the ELF file can be used without any problems -by connecting to the gdb server localhost:1234 - -# mipsel-unknown-linux-gnu-gdb u-boot -GNU gdb 6.6 -Copyright (C) 2006 Free Software Foundation, Inc. -GDB is free software, covered by the GNU General Public License, and you are -welcome to change it and/or distribute copies of it under certain conditions. -Type "show copying" to see the conditions. -There is absolutely no warranty for GDB. Type "show warranty" for details. -This GDB was configured as "--host=i486-linux-gnu --target=mipsel-unknown-linux-gnu"... -(gdb) target remote localhost:1234 -Remote debugging using localhost:1234 -_start () at start.S:64 -64 RVECENT(reset,0) /* U-boot entry point */ -Current language: auto; currently asm -(gdb) b board.c:289 -Breakpoint 1 at 0xbfc00cc8: file board.c, line 289. -(gdb) c -Continuing. - -Breakpoint 1, board_init_f (bootflag=) at board.c:290 -290 relocate_code (addr_sp, id, addr); -Current language: auto; currently c -(gdb) p/x addr -$1 = 0x87fa0000 - -2) Debugging of U-Boot After Relocation - -For debugging U-Boot after relocation we need to know the address to which -U-Boot relocates itself to 0x87fa0000 by default. -And replace the symbol table to this offset. - -(gdb) symbol-file -Discard symbol table from `/private/u-boot-arm/u-boot'? (y or n) y -Error in re-setting breakpoint 1: -No symbol table is loaded. Use the "file" command. -No symbol file now. -(gdb) add-symbol-file u-boot 0x87fa0000 -add symbol table from file "u-boot" at - .text_addr = 0x87fa0000 -(y or n) y -Reading symbols from /private/u-boot-arm/u-boot...done. -Breakpoint 1 at 0x87fa0cc8: file board.c, line 289. -(gdb) c -Continuing. - -Program received signal SIGINT, Interrupt. -0xffffffff87fa0de4 in udelay (usec=) at time.c:78 -78 while ((tmo - read_c0_count()) < 0x7fffffff) From 15ae8a31ca5d3860b0957edec4fca373daff6bb5 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sat, 28 Jul 2012 00:57:12 +0200 Subject: [PATCH 17/17] MPC8xx: Fixup warning in arch/powerpc/cpu/mpc8xx/cpu.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit cpu.c: In function ‘check_CPU’: cpu.c:256:2: warning: dereferencing type-punned pointer will break strict-aliasing rules [-Wstrict-aliasing] Signed-off-by: Marek Vasut Cc: Wolfgang Denk Subject slightly changed. Signed-off-by: Wolfgang Denk Tested on TQM855MDCBAB7-T66.102 (MPC855T at 66 MHz) and TQM860LDB0A3-T50.202 (MPC860T at 50MHz). Tested-by: Wolfgang Denk Acked-by: Wolfgang Denk --- arch/powerpc/cpu/mpc8xx/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/cpu/mpc8xx/cpu.c b/arch/powerpc/cpu/mpc8xx/cpu.c index 5cbf9a688eda..b3fcfe5626a5 100644 --- a/arch/powerpc/cpu/mpc8xx/cpu.c +++ b/arch/powerpc/cpu/mpc8xx/cpu.c @@ -41,6 +41,7 @@ #include #include #include +#include #if defined(CONFIG_OF_LIBFDT) #include @@ -253,7 +254,7 @@ static int check_CPU (long clock, uint pvr, uint immr) if ((pvr >> 16) != 0x0050) return -1; - k = (immr << 16) | *((ushort *) & immap->im_cpm.cp_dparam[0xB0]); + k = (immr << 16) | in_be16((ushort *)&immap->im_cpm.cp_dparam[0xB0]); m = 0; switch (k) {