Note
This document is a work-in-progress. Additions and clarifications are welcome.
- ARMv8-A Architecture Reference Manual This document covers both AArch64 and ARM instructions
- ARMv7-A Architecture Reference Manual This has some useful info on what is supported by older architecture versions.
- ARMv7-M Architecture Reference Manual This covers the Thumb2-only microcontrollers
- ARMv6-M Architecture Reference Manual This covers the Thumb1-only microcontrollers
- ARM C Language Extensions
- ARM NEON Intrinsics Reference
- AArch32 ABI Addenda and Errata
- Cortex-A57 Software Optimization Guide
- Run-time ABI for the ARM Architecture This documents the __aeabi_* helper functions.
- Power Instruction Set Architecture, Versions 2.03 through 2.06 (authentication required, free sign-up)
- PowerPC Compiler Writer's Guide
- Intro to PowerPC Architecture
- PowerPC Processor Manuals (embedded)
- Various IBM specifications and white papers
- IBM AIX/5L for POWER Assembly Reference
- PowerPC ABI documents
- PowerPC64 alignment of long doubles (from GCC)
- Long branch stubs for powerpc64-linux (from binutils)
Refer to :doc:`AMDGPUUsage` for additional documentation.
- AMD processor manuals
- Intel 64 and IA-32 manuals
- Intel Itanium documentation
- X86 and X86-64 SysV psABI
- Calling conventions for different C++ compilers and operating systems
- System V Application Binary Interface
- Itanium C++ ABI (This is used for all non-Windows targets.)
- Linux extensions to gabi
- PowerPC 64-bit ELF ABI Supplement
- Procedure Call Standard for the AArch64 Architecture
- Procedure Call Standard for the ARM Architecture
- ELF for the ARM Architecture
- ELF for the ARM 64-bit Architecture (AArch64)
- System z ELF ABI Supplement
- Microsoft PE/COFF Specification
- ARM64 exception handling
- ARM exception handling
- Overview of ARM64 ABI conventions
- Overview of ARM32 ABI Conventions
- CUDA Documentation includes the PTX ISA and Driver API documentation
- Executable File Format library
- GCC prefetch project page has a good survey of the prefetching capabilities of a variety of modern processors.