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CYFS3Rbb666
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[bsp][stm32][artpi]:fix artpi eth
1 parent ccd7978 commit 7ec1d82

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9 files changed

+118
-13
lines changed

9 files changed

+118
-13
lines changed

bsp/stm32/libraries/HAL_Drivers/drivers/SConscript

+1-1
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ if GetDepend(['RT_USING_I2C']):
4040
if GetDepend('BSP_USING_HARD_I2C1') or GetDepend('BSP_USING_HARD_I2C2') or GetDepend('BSP_USING_HARD_I2C3') or GetDepend('BSP_USING_HARD_I2C4'):
4141
src += ['drv_hard_i2c.c']
4242

43-
if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']):
43+
if GetDepend(['BSP_USING_ETH', 'RT_USING_LWIP']) and not GetDepend(['SOC_STM32H750_ARTPI']):
4444
src += ['drv_eth.c']
4545

4646
if GetDepend(['RT_USING_ADC']):

bsp/stm32/libraries/STM32H7xx_HAL/SConscript

+9-2
Original file line numberDiff line numberDiff line change
@@ -57,8 +57,12 @@ if GetDepend(['RT_USING_HWTIMER']) or GetDepend(['RT_USING_PWM']):
5757
src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_lptim.c']
5858

5959
if GetDepend(['BSP_USING_ETH']) or GetDepend(['BSP_USING_ETH_H750']):
60-
src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.c']
61-
src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c']
60+
if not GetDepend(['SOC_STM32H750_ARTPI']):
61+
src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth.c']
62+
src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_eth_ex.c']
63+
else :
64+
src += ['STM32H7xx_HAL_Driver/Src/Legacy/stm32h7xx_hal_eth.c']
65+
src += ['STM32H7xx_HAL_Driver/Src/Legacy/stm32h7xx_hal_eth_ex.c']
6266

6367
if GetDepend(['RT_USING_ADC']):
6468
src += ['STM32H7xx_HAL_Driver/Src/stm32h7xx_hal_adc.c']
@@ -111,6 +115,9 @@ if GetDepend(['BSP_USING_DCMI']):
111115
path = [cwd + '/STM32H7xx_HAL_Driver/Inc',
112116
cwd + '/CMSIS/Device/ST/STM32H7xx/Include']
113117

118+
if GetDepend(['SOC_STM32H750_ARTPI']):
119+
path += [cwd + '/STM32H7xx_HAL_Driver/Inc/Legacy']
120+
114121
CPPDEFINES = ['USE_HAL_DRIVER']
115122
group = DefineGroup('Libraries', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
116123

bsp/stm32/libraries/STM32H7xx_HAL/STM32H7xx_HAL_Driver/Inc/Legacy/stm32h7xx_hal_eth_legacy.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -1558,7 +1558,7 @@ typedef struct{
15581558
*/
15591559

15601560
/* Include ETH HAL Extension module */
1561-
#include "stm32h7xx_hal_eth_ex.h"
1561+
#include "stm32h7xx_hal_eth_ex_legacy.h"
15621562

15631563
/* Exported functions --------------------------------------------------------*/
15641564

bsp/stm32/stm32h750-artpi/board/CubeMX_Config/Core/Inc/stm32h7xx_hal_conf.h

+3-3
Original file line numberDiff line numberDiff line change
@@ -45,8 +45,8 @@
4545
/* #define HAL_DAC_MODULE_ENABLED */
4646
/* #define HAL_DCMI_MODULE_ENABLED */
4747
/* #define HAL_DMA2D_MODULE_ENABLED */
48-
#define HAL_ETH_MODULE_ENABLED
49-
/* #define HAL_ETH_LEGACY_MODULE_ENABLED */
48+
/* #define HAL_ETH_MODULE_ENABLED */
49+
#define HAL_ETH_LEGACY_MODULE_ENABLED
5050
/* #define HAL_NAND_MODULE_ENABLED */
5151
/* #define HAL_NOR_MODULE_ENABLED */
5252
/* #define HAL_OTFDEC_MODULE_ENABLED */
@@ -169,7 +169,7 @@
169169
#define TICK_INT_PRIORITY (0UL) /*!< tick interrupt priority */
170170
#define USE_RTOS 0
171171
#define USE_SD_TRANSCEIVER 0U /*!< use uSD Transceiver */
172-
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
172+
#define USE_SPI_CRC 0U /*!< use CRC in SPI */
173173

174174
#define USE_HAL_ADC_REGISTER_CALLBACKS 0U /* ADC register callback disabled */
175175
#define USE_HAL_CEC_REGISTER_CALLBACKS 0U /* CEC register callback disabled */

bsp/stm32/stm32h750-artpi/board/Kconfig

+4-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
menu "Hardware Drivers Config"
2-
2+
config SOC_STM32H750_ARTPI
3+
bool
4+
default y
5+
36
menu "Board extended module"
47

58
menuconfig ART_PI_USING_MEDIA_IO

bsp/stm32/stm32h750-artpi/board/SConscript

+1-1
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@ list = os.listdir(cwd)
1111
# add the general drivers.
1212
src = Glob('board.c')
1313
src += Glob('CubeMX_Config/Core/Src/stm32h7xx_hal_msp.c')
14-
14+
src += Glob('port/drv_mpu.c')
1515
if GetDepend(['BSP_USING_QSPI_FLASH']):
1616
src += Glob('port/drv_qspi_flash.c')
1717

bsp/stm32/stm32h750-artpi/board/port/drv_eth.c

+3-3
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2022, RT-Thread Development Team
2+
* Copyright (c) 2006-2025 RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
@@ -117,7 +117,7 @@ static rt_err_t rt_stm32_eth_init(rt_device_t dev)
117117
{
118118
ETH_MACConfigTypeDef MACConf;
119119
uint32_t regvalue = 0;
120-
uint8_t status = RT_EOK;
120+
rt_err_t status = RT_EOK;
121121

122122
__HAL_RCC_D2SRAM3_CLK_ENABLE();
123123

@@ -357,7 +357,7 @@ struct pbuf *rt_stm32_eth_rx(rt_device_t dev)
357357
{
358358
for (q = p, l = 0; q != NULL; q = q->next)
359359
{
360-
memcpy((rt_uint8_t *)q->payload, (rt_uint8_t *)&RxBuff.buffer[l], q->len);
360+
rt_memcpy((rt_uint8_t *)q->payload, (rt_uint8_t *)&RxBuff.buffer[l], q->len);
361361
l = l + q->len;
362362
}
363363
}

bsp/stm32/stm32h750-artpi/board/port/drv_eth.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 2006-2022, RT-Thread Development Team
2+
* Copyright (c) 2006-2025 RT-Thread Development Team
33
*
44
* SPDX-License-Identifier: Apache-2.0
55
*
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,95 @@
1+
/*
2+
* Copyright (c) 2006-2025 RT-Thread Development Team
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*
6+
* Change Logs:
7+
* Date Author Notes
8+
* 2019-04-14 whj4674672 first version
9+
*/
10+
#include <rtthread.h>
11+
#include "stm32h7xx.h"
12+
#include "board.h"
13+
int mpu_init(void)
14+
{
15+
MPU_Region_InitTypeDef MPU_InitStruct;
16+
17+
/* Disable the MPU */
18+
HAL_MPU_Disable();
19+
20+
/* Configure the MPU attributes as WT for AXI SRAM */
21+
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
22+
MPU_InitStruct.BaseAddress = 0x24000000;
23+
MPU_InitStruct.Size = MPU_REGION_SIZE_512KB;
24+
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
25+
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
26+
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
27+
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
28+
MPU_InitStruct.Number = MPU_REGION_NUMBER0;
29+
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
30+
MPU_InitStruct.SubRegionDisable = 0X00;
31+
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
32+
33+
HAL_MPU_ConfigRegion(&MPU_InitStruct);
34+
35+
#ifdef BSP_USING_SDRAM
36+
/* Configure the MPU attributes as WT for SDRAM */
37+
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
38+
MPU_InitStruct.BaseAddress = 0xC0000000;
39+
MPU_InitStruct.Size = MPU_REGION_SIZE_32MB;
40+
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
41+
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
42+
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
43+
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
44+
MPU_InitStruct.Number = MPU_REGION_NUMBER1;
45+
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
46+
MPU_InitStruct.SubRegionDisable = 0x00;
47+
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
48+
49+
HAL_MPU_ConfigRegion(&MPU_InitStruct);
50+
#endif
51+
52+
#ifdef BSP_USING_ETH_H750
53+
/* Configure the MPU attributes as Device not cacheable
54+
for ETH DMA descriptors and RX Buffers*/
55+
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
56+
MPU_InitStruct.BaseAddress = 0x30040000;
57+
MPU_InitStruct.Size = MPU_REGION_SIZE_32KB;
58+
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
59+
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
60+
MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
61+
MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
62+
MPU_InitStruct.Number = MPU_REGION_NUMBER2;
63+
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1;
64+
MPU_InitStruct.SubRegionDisable = 0x00;
65+
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
66+
67+
HAL_MPU_ConfigRegion(&MPU_InitStruct);
68+
#endif
69+
70+
/* Configure the MPU attributes as WT for QSPI */
71+
MPU_InitStruct.Enable = MPU_REGION_ENABLE;
72+
MPU_InitStruct.BaseAddress = 0x90000000;
73+
MPU_InitStruct.Size = MPU_REGION_SIZE_8MB;
74+
MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
75+
MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;
76+
MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;
77+
MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
78+
MPU_InitStruct.Number = MPU_REGION_NUMBER3;
79+
MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
80+
MPU_InitStruct.SubRegionDisable = 0X00;
81+
MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
82+
83+
HAL_MPU_ConfigRegion(&MPU_InitStruct);
84+
85+
/* Enable the MPU */
86+
HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
87+
88+
/* Enable CACHE */
89+
SCB_EnableICache();
90+
SCB_EnableDCache();
91+
92+
return RT_EOK;
93+
94+
}
95+
INIT_BOARD_EXPORT(mpu_init);

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