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Commits on Mar 17, 2015

• drm/fourcc: 64 #defines need ULL postfix

  Show description for 8c4f83f
  danvet

  committed
  8c4f83f

• drm/i915: Don't assume primary & cursor are always on for wm calculation (v4)

  Show description for c9f038a
  

  mattrope

  authored and

  danvet

  committed
  c9f038a

• drm/i915: Move drm_framebuffer_unreference out of struct_mutex for flips

  Show description for 89ed88b
  

  ickle

  authored and

  danvet

  committed
  89ed88b

• drm/i915: Disable DDR DVFS on CHV

  Show description for fc1ac8d
  

  vsyrjala

  authored and

  danvet

  committed
  fc1ac8d

• drm/i915: Enable the maxfifo PM5 mode when appropriate on CHV

  Show description for cfb4141
  

  vsyrjala

  authored and

  danvet

  committed
  cfb4141

• drm/i915: Program PFI credits for VLV

  Show description for 1e69cd7
  

  vsrini4

  authored and

  danvet

  committed
  1e69cd7

• drm/i915: Rewrite VLV/CHV watermark code

  Show description for ae80152
  

  vsyrjala

  authored and

  danvet

  committed
  ae80152

• drm/i915: Make sure we invalidate frontbuffer on fbcon.

  Show description for 03e515f
  

  rodrigovivi

  authored and

  danvet

  committed
  03e515f

• drm/i915: Update prop, int co-eff and gain threshold for CHV

  Show description for 9cbe40c
  

  Vijay Purushothaman

  authored and

  danvet

  committed
  9cbe40c

• drm/i915: Initialize CHV digital lock detect threshold

  Show description for de3a0fd
  

  Vijay Purushothaman

  authored and

  danvet

  committed
  de3a0fd

• drm/i915: Disable M2 frac division for integer case

  Show description for a945ce7
  

  Vijay Purushothaman

  authored and

  danvet

  committed
  a945ce7

• drm/i915: Spelling s/auxilliary/auxiliary/

  Show description for ca2b140
  

  geertu

  authored and

  danvet

  committed
  ca2b140

• drm/i915: Use crtc->state->active in ilk/skl watermark calculations (v3)

  Show description for 3ef0028
  

  mattrope

  authored and

  danvet

  committed
  3ef0028

• drm/i915: Update intel_crtc_active() to use state values (v2)

  Show description for c3d1f43
  

  mattrope

  authored and

  danvet

  committed
  c3d1f43

• drm/i915: Exit early from psr_status if PSR is not supported by the device

  Show description for 3553a8e
  

  Damien Lespiau

  authored and

  danvet

  committed
  3553a8e

• drm/i915: Fix chv cdclk support

  Show description for 9d0d3fd
  

  vsyrjala

  authored and

  danvet

  committed
  9d0d3fd

• drm/i915: Allow pixel clock up to 95% of cdclk on CHV

  Show description for 6cca319
  

  vsyrjala

  authored and

  danvet

  committed
  6cca319

• drm/i915/skl: port A fuse straps don't work on early SKL steppings

  Show description for de31fac
  

  jbarnes993

  authored and

  danvet

  committed
  de31fac

• drm/i915/skl: Restore the DDI translation tables when enabling PW1

  Show description for 1d2b952
  

  Damien Lespiau

  authored and

  danvet

  committed
  1d2b952

• drm/i915: Remove unused condition in hsw_power_well_post_enable()

  Show description for 2540039
  

  Damien Lespiau

  authored and

  danvet

  committed
  2540039

• drm/i915/skl: Restore pipe interrupt registers after power well enabling

  Show description for d14c034
  

  Damien Lespiau

  authored and

  danvet

  committed
  d14c034

• drm/i915/skl: Mirror what we do on HSW for the power well enable log message

  Show description for 510e6fd
  

  Damien Lespiau

  authored and

  danvet

  committed
  510e6fd

• drm/i915/skl: Introduce enable_requested and is_enabled in the power well code

  Show description for 2a51835
  

  Damien Lespiau

  authored and

  danvet

  committed
  2a51835

• drm/i915/skl: Make gen8_irq_power_well_post_enable() take a pipe mask

  Show description for 4c6c03b
  

  Damien Lespiau

  authored and

  danvet

  committed
  4c6c03b

• drm/i915/chv: Add CHV HW status to SSEU status

  Show description for 5575f03
  

  jmcgee4

  authored and

  danvet

  committed
  5575f03

• drm/i915/chv: Determine CHV slice/subslice/EU info

  Show description for c93043a
  

  jmcgee4

  authored and

  danvet

  committed
  c93043a

• drm/i915: Make sure PND deadline mode is enabled on VLV/CHV

  Show description for c6beb13
  

  vsyrjala

  authored and

  danvet

  committed
  c6beb13

• drm/i915: Read out display FIFO size on VLV/CHV

  Show description for b500472
  

  vsyrjala

  authored and

  danvet

  committed
  b500472

• drm/i915: Pass plane to vlv_compute_drain_latency()

  Show description for 883a3d2
  

  vsyrjala

  authored and

  danvet

  committed
  883a3d2

• drm/i915: Reorganize VLV DDL setup

  Show description for 0018fda
  

  vsyrjala

  authored and

  danvet

  committed
  0018fda

• drm/i915: Hide VLV DDL precision handling

  Show description for 341c526
  

  vsyrjala

  authored and

  danvet

  committed
  341c526

• drm/i915: Simplify VLV drain latency computation

  Show description for abfc00b
  

  vsyrjala

  authored and

  danvet

  committed
  abfc00b

• drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines

  Show description for 1203051
  

  vsyrjala

  authored and

  danvet

  committed
  1203051

• drm/i915: Reduce CHV DDL multiplier to 16/8

  Show description for edf6056
  

  vsyrjala

  authored and

  danvet

  committed
  edf6056

• drm/i915: Disable the mmio.debug WARN after it fires

  Show description for 48572ed
  

  ickle

  authored and

  danvet

  committed
  48572ed

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