| title | weight | description |
|---|---|---|
Tiny Tapeout 02 |
10 |
Overview |
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- Launched: 9 November 2023
- Submission closed: 2 December 2023
- Submitted to Efabless 2211Q chipIgnite shuttle using Skywater 130nm open source PDK
- 165 projects submitted. Each project is 150 x 170um
- Youngest submitter: 4 years old
- 64 used Wokwi graphical editor, 82 Verilog, 5 Amaranth, 1 Chisel
- 39935 standard cells used across all projects.
- Most cells used in a design was 1105, the least was 8.
- Max utilisation was 52%
- Total wire length 2024 mm.
- Avalon Semiconductors 'TBB1143' Programmable Sound Generator
- Pi (π) to 1000+ decimal places
- FPGA test
- RV8U - 8-bit RISC-V Microcore Processor
- 8-bit CPU
An educational chip development workflow entirely in-browser, from graphic entry to GDSII output for #sky130! Stunning work by @matthewvenn to make an opaque area of technology accessible.
Last week I designed an integrated circuit for #tinytapeout, my first digital circuit design not to include any kind of cpu.
I still can't get over how smooth the ASIC design workflow of the #tinytapeout is
Thank you @matthewvenn and everyone who made #tinytapeout happen! I made a simple counter FSM based on a UTexas presentation (linked below), but I made it all on my new Steamdeck!
Created a 128-Bit Memory (8 x 16-Bit Blocks) custom ASIC. I hope it will be manufactured in next shuttle run. Aside from that, It was amazing how seamless and easy was the whole process.
More on Twitter.