Ara

Ara is a vector unit working as a coprocessor for the CVA6 core. It supports the RISC-V Vector Extension, version 0.9.

Get started

Make sure you clone this repository recursively to get all the necessary submodules:

git submodule update --init --recursive

If the repository path of any submodule changes, run the following command to change your submodule's pointer to the remote repository:

git submodule sync --recursive

Toolchain

Ara requires a RISC-V GCC toolchain capable of understanding the vector extension, version 0.9.x.

To build this toolchain, run the following command in the project's root directory.

# Build the GCC toolchain
make toolchain

Configuration

Ara's parameters are centralized in the config folder, in the config.mk file. Please check config/README.md for more details.

Software

Build Applications

The apps folder contains example applications that work on Ara. Run the following command to build an application. E.g., hello_world:

cd apps
make bin/hello_world

RISC-V Tests

The apps folder also contains the RISC-V tests repository, including a few unit tests for the vector instructions. Run the following command to build the unit tests:

cd apps
make riscv_tests

RTL Simulation

To simulate the Ara system with ModelSim, go to the hardware folder, which contains all the SystemVerilog files. Use the following command to run your simulation:

# Go to the hardware folder
cd hardware
# Only compile the hardware without running the simulation.
make build
# Run the simulation with the *hello_world* binary loaded
app=hello_world make sim
# Run the simulation with the *some_binary* binary. This allows specifying the full path to the binary
preload=/some_path/some_binary make sim
# Run the simulation without starting the gui
app=hello_world make simc

It is also possible to simulate the unit tests compiled in the apps folder. Use the following command to run the simulation:

# Go to the hardware folder
cd hardware
# Run the tests
make riscv_tests_simc

Alternatively, you can also use the riscv_tests target at Ara's top-level Makefile to both compile the RISC-V tests and run their simulation.