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Stars

3 results for source starred repositories written in Verilog
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rejunity / z80-open-silicon

Z80 open-source silicon clone. Goal is to become a silicon proven, pin compatible, open-source replacement for classic Z80.

Verilog 624 25 Updated Nov 8, 2024

ZipCPU / sdr

A basic Soft(Gate)ware Defined Radio architecture

Verilog 76 15 Updated Jan 18, 2024

juj / gowin_flipflop_drainer

A test case for stress testing Tang Nano 4K and 9K and Primer 20K (Gowin FPGAs)

Verilog 33 2 Updated Dec 6, 2024