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fix compile errors
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Wolfgang Rönninger committed Dec 16, 2019
1 parent 6eb65a6 commit 6843cdd
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Showing 5 changed files with 15 additions and 15 deletions.
18 changes: 9 additions & 9 deletions include/axi/assign.svh
Original file line number Diff line number Diff line change
Expand Up @@ -388,14 +388,14 @@
`define AXI_LITE_FROM_R(opt_as, axi_lite_if, r_lite_struct) \
opt_as axi_lite_if.r_data = r_lite_struct.data; \
opt_as axi_lite_if.r_resp = r_lite_struct.resp;
`define AXI_LITE_FROM_REQ(axi_lite_if, req_lite_struct) \
`AXI_LITE_FROM_AW(opt_as, axi_lite_if, req_lite_struct.aw); \
opt_as axi_lite_if.aw_valid = req_lite_struct.aw_valid; \
`AXI_LITE_FROM_W(opt_as, axi_lite_if, req_lite_struct.w); \
opt_as axi_lite_if.w_valid = req_lite_struct.w_valid; \
opt_as axi_lite_if.b_ready = req_lite_struct.b_ready; \
`AXI_LITE_FROM_AR(opt_as, axi_lite_if, req_lite_struct.ar); \
opt_as axi_lite_if.ar_valid = req_lite_struct.ar_valid; \
`define AXI_LITE_FROM_REQ(opt_as, axi_lite_if, req_lite_struct) \
`AXI_LITE_FROM_AW(opt_as, axi_lite_if, req_lite_struct.aw); \
opt_as axi_lite_if.aw_valid = req_lite_struct.aw_valid; \
`AXI_LITE_FROM_W(opt_as, axi_lite_if, req_lite_struct.w); \
opt_as axi_lite_if.w_valid = req_lite_struct.w_valid; \
opt_as axi_lite_if.b_ready = req_lite_struct.b_ready; \
`AXI_LITE_FROM_AR(opt_as, axi_lite_if, req_lite_struct.ar); \
opt_as axi_lite_if.ar_valid = req_lite_struct.ar_valid; \
opt_as axi_lite_if.r_ready = req_lite_struct.r_ready;
`define AXI_LITE_FROM_RESP(opt_as, axi_lite_if, resp_lite_struct) \
opt_as axi_lite_if.aw_ready = resp_lite_struct.aw_ready; \
Expand Down Expand Up @@ -485,7 +485,7 @@
`define AXI_LITE_TO_R(opt_as, r_lite_struct, axi_lite_if) \
opt_as r_lite_struct = '{ \
data: axi_lite_if.r_data, \
resp: axi_lite_if.r_resp, \
resp: axi_lite_if.r_resp \
};
`define AXI_LITE_TO_REQ(opt_as, req_lite_struct, axi_lite_if) \
`AXI_LITE_TO_AW(opt_as, req_lite_struct.aw, axi_lite_if); \
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6 changes: 3 additions & 3 deletions src/axi_cut.sv
Original file line number Diff line number Diff line change
Expand Up @@ -211,9 +211,9 @@ module axi_lite_cut_intf #(
AXI_LITE.Master out
);

typedef logic [AXI_ADDR_WIDTH-1:0] addr_t;
typedef logic [AXI_DATA_WIDTH-1:0] data_t;
typedef logic [AXI_DATA_WIDTH/8-1:0] strb_t;
typedef logic [ADDR_WIDTH-1:0] addr_t;
typedef logic [DATA_WIDTH-1:0] data_t;
typedef logic [DATA_WIDTH/8-1:0] strb_t;

`AXI_LITE_TYPEDEF_AW_CHAN_T ( aw_chan_t, addr_t )
`AXI_LITE_TYPEDEF_W_CHAN_T ( w_chan_t, data_t, strb_t)
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2 changes: 1 addition & 1 deletion src/axi_modify_address.sv
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ module axi_modify_address #(
parameter type slv_resp_t = logic, // response type slave port
parameter type mst_addr_t = logic, // address type of master port
parameter type mst_req_t = logic, // request type master port
parameter type mst_resp_t = logic, // response type master port
parameter type mst_resp_t = logic // response type master port
) (
// slave port
input slv_req_t slv_req_i,
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2 changes: 1 addition & 1 deletion src/axi_multicut.sv
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
//
// These can be used to relax timing pressure on very long AXI busses.
module axi_multicut #(
parameter int unsigned NoCuts = 32'd1 // Number of cuts. Must be >= 0.
parameter int unsigned NoCuts = 32'd1, // Number of cuts. Must be >= 0.
// AXI channel structs
parameter type aw_chan_t = logic,
parameter type w_chan_t = logic,
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2 changes: 1 addition & 1 deletion src/axi_to_axi_lite.sv
Original file line number Diff line number Diff line change
Expand Up @@ -23,7 +23,7 @@ module axi_to_axi_lite #(
parameter int NUM_PENDING_RD = 1,
/// Maximum number of outstanding writes.
parameter int NUM_PENDING_WR = 1
)(
) (
input logic clk_i,
input logic rst_ni,
input logic testmode_i,
Expand Down

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