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hreintkeme-no-dev
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Minimize HardwareSerial Receive and Transmit delays (espressif#3664)
* Minimize HardwareSerial Receive and Transmit delays * Remove uartRxFifoToQueue from esp-hal-uart.h Co-authored-by: Me No Dev <[email protected]>
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cores/esp32/esp32-hal-uart.c

+25-1
Original file line numberDiff line numberDiff line change
@@ -208,6 +208,11 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
208208
uart->dev->conf0.stop_bit_num = ONE_STOP_BITS_CONF;
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uart->dev->rs485_conf.dl1_en = 1;
210210
}
211+
212+
// tx_idle_num : idle interval after tx FIFO is empty(unit: the time it takes to send one bit under current baudrate)
213+
// Setting it to 0 prevents line idle time/delays when sending messages with small intervals
214+
uart->dev->idle_conf.tx_idle_num = 0; //
215+
211216
UART_MUTEX_UNLOCK();
212217

213218
if(rxPin != -1) {
@@ -265,7 +270,7 @@ uint32_t uartAvailable(uart_t* uart)
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if(uart == NULL || uart->queue == NULL) {
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return 0;
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}
268-
return uxQueueMessagesWaiting(uart->queue);
273+
return (uxQueueMessagesWaiting(uart->queue) + uart->dev->status.rxfifo_cnt) ;
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}
270275

271276
uint32_t uartAvailableForWrite(uart_t* uart)
@@ -276,12 +281,27 @@ uint32_t uartAvailableForWrite(uart_t* uart)
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return 0x7f - uart->dev->status.txfifo_cnt;
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}
278283

284+
void uartRxFifoToQueue(uart_t* uart)
285+
{
286+
uint8_t c;
287+
UART_MUTEX_LOCK();
288+
while(uart->dev->status.rxfifo_cnt || (uart->dev->mem_rx_status.wr_addr != uart->dev->mem_rx_status.rd_addr)) {
289+
c = uart->dev->fifo.rw_byte;
290+
xQueueSend(uart->queue, &c, 0);
291+
}
292+
UART_MUTEX_UNLOCK();
293+
}
294+
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uint8_t uartRead(uart_t* uart)
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{
281297
if(uart == NULL || uart->queue == NULL) {
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return 0;
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}
284300
uint8_t c;
301+
if ((uxQueueMessagesWaiting(uart->queue) == 0) && (uart->dev->status.rxfifo_cnt > 0))
302+
{
303+
uartRxFifoToQueue(uart);
304+
}
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if(xQueueReceive(uart->queue, &c, 0)) {
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return c;
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}
@@ -294,6 +314,10 @@ uint8_t uartPeek(uart_t* uart)
294314
return 0;
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}
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uint8_t c;
317+
if ((uxQueueMessagesWaiting(uart->queue) == 0) && (uart->dev->status.rxfifo_cnt > 0))
318+
{
319+
uartRxFifoToQueue(uart);
320+
}
297321
if(xQueuePeek(uart->queue, &c, 0)) {
298322
return c;
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}

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