The Memory End (ME) comprises the Cache Coherence Engines (CCEs), Coherence Network, and L2 Memory in a BlackParrot multicore processor. It can be configured to support one or more CCEs that connect via the Coherence Network to one or more Local Cache Engines (LCEs), which are the L1 entities that participate in coherence.
Refer to the Interface Specification document in repo/docs for more information.
The Cache Coherence Engine (CCE) is the coherence controller for BlackParrot systems. It implements a directory-based coherence protocol. The file bp_cce.v defines the Cache Coherence Engine.