From 5a2d99b18450282daff66ec273dc011e2ea5ef37 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Thu, 2 Jun 2016 21:01:46 +0000 Subject: [PATCH] Merging r259558: ------------------------------------------------------------------------ r259558 | Matthew.Arsenault | 2016-02-02 12:28:10 -0800 (Tue, 02 Feb 2016) | 4 lines AMDGPU: Handle promoting memmove Also add missing tests for the others. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@271593 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 24 +++++++ .../AMDGPU/promote-alloca-mem-intrinsics.ll | 65 +++++++++++++++++++ 2 files changed, 89 insertions(+) create mode 100644 test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll diff --git a/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp index 257f92abfeb7..6fe653c4ee21 100644 --- a/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp +++ b/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp @@ -268,12 +268,14 @@ static bool isCallPromotable(CallInst *CI) { switch (II->getIntrinsicID()) { case Intrinsic::memcpy: + case Intrinsic::memmove: case Intrinsic::memset: case Intrinsic::lifetime_start: case Intrinsic::lifetime_end: case Intrinsic::invariant_start: case Intrinsic::invariant_end: case Intrinsic::invariant_group_barrier: + case Intrinsic::objectsize: return true; default: return false; @@ -450,6 +452,14 @@ void AMDGPUPromoteAlloca::visitAlloca(AllocaInst &I) { Intr->eraseFromParent(); continue; } + case Intrinsic::memmove: { + MemMoveInst *MemMove = cast(Intr); + Builder.CreateMemMove(MemMove->getRawDest(), MemMove->getRawSource(), + MemMove->getLength(), MemMove->getAlignment(), + MemMove->isVolatile()); + Intr->eraseFromParent(); + continue; + } case Intrinsic::memset: { MemSetInst *MemSet = cast(Intr); Builder.CreateMemSet(MemSet->getRawDest(), MemSet->getValue(), @@ -466,6 +476,20 @@ void AMDGPUPromoteAlloca::visitAlloca(AllocaInst &I) { // but the intrinsics need to be changed to accept pointers with any // address space. continue; + case Intrinsic::objectsize: { + Value *Src = Intr->getOperand(0); + Type *SrcTy = Src->getType()->getPointerElementType(); + Function *ObjectSize = Intrinsic::getDeclaration(Mod, + Intrinsic::objectsize, + { Intr->getType(), PointerType::get(SrcTy, AMDGPUAS::LOCAL_ADDRESS) } + ); + + CallInst *NewCall + = Builder.CreateCall(ObjectSize, { Src, Intr->getOperand(1) }); + Intr->replaceAllUsesWith(NewCall); + Intr->eraseFromParent(); + continue; + } default: Intr->dump(); llvm_unreachable("Don't know how to promote alloca intrinsic use."); diff --git a/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll b/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll new file mode 100644 index 000000000000..ab12b69f8959 --- /dev/null +++ b/test/CodeGen/AMDGPU/promote-alloca-mem-intrinsics.ll @@ -0,0 +1,65 @@ +; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-promote-alloca < %s | FileCheck %s + +declare void @llvm.memcpy.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) #0 +declare void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i32, i1) #0 + +declare void @llvm.memmove.p0i8.p1i8.i32(i8* nocapture, i8 addrspace(1)* nocapture, i32, i32, i1) #0 +declare void @llvm.memmove.p1i8.p0i8.i32(i8 addrspace(1)* nocapture, i8* nocapture, i32, i32, i1) #0 + +declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i32, i1) #0 + +declare i32 @llvm.objectsize.i32.p0i8(i8*, i1) #1 + +; CHECK-LABEL: @promote_with_memcpy( +; CHECK: getelementptr [256 x [17 x i32]], [256 x [17 x i32]] addrspace(3)* @alloca, i32 0, i32 %{{[0-9]+}} +; CHECK: call void @llvm.memcpy.p3i8.p1i8.i32(i8 addrspace(3)* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) +; CHECK: call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* %out.bc, i8 addrspace(3)* %alloca.bc, i32 68, i32 4, i1 false) +define void @promote_with_memcpy(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 { + %alloca = alloca [17 x i32], align 16 + %alloca.bc = bitcast [17 x i32]* %alloca to i8* + %in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)* + %out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)* + call void @llvm.memcpy.p0i8.p1i8.i32(i8* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) + call void @llvm.memcpy.p1i8.p0i8.i32(i8 addrspace(1)* %out.bc, i8* %alloca.bc, i32 68, i32 4, i1 false) + ret void +} + +; CHECK-LABEL: @promote_with_memmove( +; CHECK: getelementptr [256 x [17 x i32]], [256 x [17 x i32]] addrspace(3)* @alloca.1, i32 0, i32 %{{[0-9]+}} +; CHECK: call void @llvm.memmove.p3i8.p1i8.i32(i8 addrspace(3)* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) +; CHECK: call void @llvm.memmove.p1i8.p3i8.i32(i8 addrspace(1)* %out.bc, i8 addrspace(3)* %alloca.bc, i32 68, i32 4, i1 false) +define void @promote_with_memmove(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 { + %alloca = alloca [17 x i32], align 16 + %alloca.bc = bitcast [17 x i32]* %alloca to i8* + %in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)* + %out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)* + call void @llvm.memmove.p0i8.p1i8.i32(i8* %alloca.bc, i8 addrspace(1)* %in.bc, i32 68, i32 4, i1 false) + call void @llvm.memmove.p1i8.p0i8.i32(i8 addrspace(1)* %out.bc, i8* %alloca.bc, i32 68, i32 4, i1 false) + ret void +} + +; CHECK-LABEL: @promote_with_memset( +; CHECK: getelementptr [256 x [17 x i32]], [256 x [17 x i32]] addrspace(3)* @alloca.2, i32 0, i32 %{{[0-9]+}} +; CHECK: call void @llvm.memset.p3i8.i32(i8 addrspace(3)* %alloca.bc, i8 7, i32 68, i32 4, i1 false) +define void @promote_with_memset(i32 addrspace(1)* %out, i32 addrspace(1)* %in) #0 { + %alloca = alloca [17 x i32], align 16 + %alloca.bc = bitcast [17 x i32]* %alloca to i8* + %in.bc = bitcast i32 addrspace(1)* %in to i8 addrspace(1)* + %out.bc = bitcast i32 addrspace(1)* %out to i8 addrspace(1)* + call void @llvm.memset.p0i8.i32(i8* %alloca.bc, i8 7, i32 68, i32 4, i1 false) + ret void +} + +; CHECK-LABEL: @promote_with_objectsize( +; CHECK: [[PTR:%[0-9]+]] = getelementptr [256 x [17 x i32]], [256 x [17 x i32]] addrspace(3)* @alloca.3, i32 0, i32 %{{[0-9]+}} +; CHECK: call i32 @llvm.objectsize.i32.p3i8(i8 addrspace(3)* %alloca.bc, i1 false) +define void @promote_with_objectsize(i32 addrspace(1)* %out) #0 { + %alloca = alloca [17 x i32], align 16 + %alloca.bc = bitcast [17 x i32]* %alloca to i8* + %size = call i32 @llvm.objectsize.i32.p0i8(i8* %alloca.bc, i1 false) + store i32 %size, i32 addrspace(1)* %out + ret void +} + +attributes #0 = { nounwind } +attributes #1 = { nounwind readnone }