forked from torvalds/linux
-
Notifications
You must be signed in to change notification settings - Fork 0
/
sahara.c
1582 lines (1310 loc) · 40.4 KB
/
sahara.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Cryptographic API.
*
* Support for SAHARA cryptographic accelerator.
*
* Copyright (c) 2014 Steffen Trumtrar <[email protected]>
* Copyright (c) 2013 Vista Silicon S.L.
* Author: Javier Martin <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
* Based on omap-aes.c and tegra-aes.c
*/
#include <crypto/aes.h>
#include <crypto/internal/hash.h>
#include <crypto/internal/skcipher.h>
#include <crypto/scatterwalk.h>
#include <crypto/sha.h>
#include <linux/clk.h>
#include <linux/crypto.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/kthread.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#define SHA_BUFFER_LEN PAGE_SIZE
#define SAHARA_MAX_SHA_BLOCK_SIZE SHA256_BLOCK_SIZE
#define SAHARA_NAME "sahara"
#define SAHARA_VERSION_3 3
#define SAHARA_VERSION_4 4
#define SAHARA_TIMEOUT_MS 1000
#define SAHARA_MAX_HW_DESC 2
#define SAHARA_MAX_HW_LINK 20
#define FLAGS_MODE_MASK 0x000f
#define FLAGS_ENCRYPT BIT(0)
#define FLAGS_CBC BIT(1)
#define FLAGS_NEW_KEY BIT(3)
#define SAHARA_HDR_BASE 0x00800000
#define SAHARA_HDR_SKHA_ALG_AES 0
#define SAHARA_HDR_SKHA_OP_ENC (1 << 2)
#define SAHARA_HDR_SKHA_MODE_ECB (0 << 3)
#define SAHARA_HDR_SKHA_MODE_CBC (1 << 3)
#define SAHARA_HDR_FORM_DATA (5 << 16)
#define SAHARA_HDR_FORM_KEY (8 << 16)
#define SAHARA_HDR_LLO (1 << 24)
#define SAHARA_HDR_CHA_SKHA (1 << 28)
#define SAHARA_HDR_CHA_MDHA (2 << 28)
#define SAHARA_HDR_PARITY_BIT (1 << 31)
#define SAHARA_HDR_MDHA_SET_MODE_MD_KEY 0x20880000
#define SAHARA_HDR_MDHA_SET_MODE_HASH 0x208D0000
#define SAHARA_HDR_MDHA_HASH 0xA0850000
#define SAHARA_HDR_MDHA_STORE_DIGEST 0x20820000
#define SAHARA_HDR_MDHA_ALG_SHA1 0
#define SAHARA_HDR_MDHA_ALG_MD5 1
#define SAHARA_HDR_MDHA_ALG_SHA256 2
#define SAHARA_HDR_MDHA_ALG_SHA224 3
#define SAHARA_HDR_MDHA_PDATA (1 << 2)
#define SAHARA_HDR_MDHA_HMAC (1 << 3)
#define SAHARA_HDR_MDHA_INIT (1 << 5)
#define SAHARA_HDR_MDHA_IPAD (1 << 6)
#define SAHARA_HDR_MDHA_OPAD (1 << 7)
#define SAHARA_HDR_MDHA_SWAP (1 << 8)
#define SAHARA_HDR_MDHA_MAC_FULL (1 << 9)
#define SAHARA_HDR_MDHA_SSL (1 << 10)
/* SAHARA can only process one request at a time */
#define SAHARA_QUEUE_LENGTH 1
#define SAHARA_REG_VERSION 0x00
#define SAHARA_REG_DAR 0x04
#define SAHARA_REG_CONTROL 0x08
#define SAHARA_CONTROL_SET_THROTTLE(x) (((x) & 0xff) << 24)
#define SAHARA_CONTROL_SET_MAXBURST(x) (((x) & 0xff) << 16)
#define SAHARA_CONTROL_RNG_AUTORSD (1 << 7)
#define SAHARA_CONTROL_ENABLE_INT (1 << 4)
#define SAHARA_REG_CMD 0x0C
#define SAHARA_CMD_RESET (1 << 0)
#define SAHARA_CMD_CLEAR_INT (1 << 8)
#define SAHARA_CMD_CLEAR_ERR (1 << 9)
#define SAHARA_CMD_SINGLE_STEP (1 << 10)
#define SAHARA_CMD_MODE_BATCH (1 << 16)
#define SAHARA_CMD_MODE_DEBUG (1 << 18)
#define SAHARA_REG_STATUS 0x10
#define SAHARA_STATUS_GET_STATE(x) ((x) & 0x7)
#define SAHARA_STATE_IDLE 0
#define SAHARA_STATE_BUSY 1
#define SAHARA_STATE_ERR 2
#define SAHARA_STATE_FAULT 3
#define SAHARA_STATE_COMPLETE 4
#define SAHARA_STATE_COMP_FLAG (1 << 2)
#define SAHARA_STATUS_DAR_FULL (1 << 3)
#define SAHARA_STATUS_ERROR (1 << 4)
#define SAHARA_STATUS_SECURE (1 << 5)
#define SAHARA_STATUS_FAIL (1 << 6)
#define SAHARA_STATUS_INIT (1 << 7)
#define SAHARA_STATUS_RNG_RESEED (1 << 8)
#define SAHARA_STATUS_ACTIVE_RNG (1 << 9)
#define SAHARA_STATUS_ACTIVE_MDHA (1 << 10)
#define SAHARA_STATUS_ACTIVE_SKHA (1 << 11)
#define SAHARA_STATUS_MODE_BATCH (1 << 16)
#define SAHARA_STATUS_MODE_DEDICATED (1 << 17)
#define SAHARA_STATUS_MODE_DEBUG (1 << 18)
#define SAHARA_STATUS_GET_ISTATE(x) (((x) >> 24) & 0xff)
#define SAHARA_REG_ERRSTATUS 0x14
#define SAHARA_ERRSTATUS_GET_SOURCE(x) ((x) & 0xf)
#define SAHARA_ERRSOURCE_CHA 14
#define SAHARA_ERRSOURCE_DMA 15
#define SAHARA_ERRSTATUS_DMA_DIR (1 << 8)
#define SAHARA_ERRSTATUS_GET_DMASZ(x)(((x) >> 9) & 0x3)
#define SAHARA_ERRSTATUS_GET_DMASRC(x) (((x) >> 13) & 0x7)
#define SAHARA_ERRSTATUS_GET_CHASRC(x) (((x) >> 16) & 0xfff)
#define SAHARA_ERRSTATUS_GET_CHAERR(x) (((x) >> 28) & 0x3)
#define SAHARA_REG_FADDR 0x18
#define SAHARA_REG_CDAR 0x1C
#define SAHARA_REG_IDAR 0x20
struct sahara_hw_desc {
u32 hdr;
u32 len1;
u32 p1;
u32 len2;
u32 p2;
u32 next;
};
struct sahara_hw_link {
u32 len;
u32 p;
u32 next;
};
struct sahara_ctx {
unsigned long flags;
/* AES-specific context */
int keylen;
u8 key[AES_KEYSIZE_128];
struct crypto_skcipher *fallback;
};
struct sahara_aes_reqctx {
unsigned long mode;
};
/*
* struct sahara_sha_reqctx - private data per request
* @buf: holds data for requests smaller than block_size
* @rembuf: used to prepare one block_size-aligned request
* @context: hw-specific context for request. Digest is extracted from this
* @mode: specifies what type of hw-descriptor needs to be built
* @digest_size: length of digest for this request
* @context_size: length of hw-context for this request.
* Always digest_size + 4
* @buf_cnt: number of bytes saved in buf
* @sg_in_idx: number of hw links
* @in_sg: scatterlist for input data
* @in_sg_chain: scatterlists for chained input data
* @total: total number of bytes for transfer
* @last: is this the last block
* @first: is this the first block
* @active: inside a transfer
*/
struct sahara_sha_reqctx {
u8 buf[SAHARA_MAX_SHA_BLOCK_SIZE];
u8 rembuf[SAHARA_MAX_SHA_BLOCK_SIZE];
u8 context[SHA256_DIGEST_SIZE + 4];
unsigned int mode;
unsigned int digest_size;
unsigned int context_size;
unsigned int buf_cnt;
unsigned int sg_in_idx;
struct scatterlist *in_sg;
struct scatterlist in_sg_chain[2];
size_t total;
unsigned int last;
unsigned int first;
unsigned int active;
};
struct sahara_dev {
struct device *device;
unsigned int version;
void __iomem *regs_base;
struct clk *clk_ipg;
struct clk *clk_ahb;
struct mutex queue_mutex;
struct task_struct *kthread;
struct completion dma_completion;
struct sahara_ctx *ctx;
struct crypto_queue queue;
unsigned long flags;
struct sahara_hw_desc *hw_desc[SAHARA_MAX_HW_DESC];
dma_addr_t hw_phys_desc[SAHARA_MAX_HW_DESC];
u8 *key_base;
dma_addr_t key_phys_base;
u8 *iv_base;
dma_addr_t iv_phys_base;
u8 *context_base;
dma_addr_t context_phys_base;
struct sahara_hw_link *hw_link[SAHARA_MAX_HW_LINK];
dma_addr_t hw_phys_link[SAHARA_MAX_HW_LINK];
size_t total;
struct scatterlist *in_sg;
int nb_in_sg;
struct scatterlist *out_sg;
int nb_out_sg;
u32 error;
};
static struct sahara_dev *dev_ptr;
static inline void sahara_write(struct sahara_dev *dev, u32 data, u32 reg)
{
writel(data, dev->regs_base + reg);
}
static inline unsigned int sahara_read(struct sahara_dev *dev, u32 reg)
{
return readl(dev->regs_base + reg);
}
static u32 sahara_aes_key_hdr(struct sahara_dev *dev)
{
u32 hdr = SAHARA_HDR_BASE | SAHARA_HDR_SKHA_ALG_AES |
SAHARA_HDR_FORM_KEY | SAHARA_HDR_LLO |
SAHARA_HDR_CHA_SKHA | SAHARA_HDR_PARITY_BIT;
if (dev->flags & FLAGS_CBC) {
hdr |= SAHARA_HDR_SKHA_MODE_CBC;
hdr ^= SAHARA_HDR_PARITY_BIT;
}
if (dev->flags & FLAGS_ENCRYPT) {
hdr |= SAHARA_HDR_SKHA_OP_ENC;
hdr ^= SAHARA_HDR_PARITY_BIT;
}
return hdr;
}
static u32 sahara_aes_data_link_hdr(struct sahara_dev *dev)
{
return SAHARA_HDR_BASE | SAHARA_HDR_FORM_DATA |
SAHARA_HDR_CHA_SKHA | SAHARA_HDR_PARITY_BIT;
}
static const char *sahara_err_src[16] = {
"No error",
"Header error",
"Descriptor length error",
"Descriptor length or pointer error",
"Link length error",
"Link pointer error",
"Input buffer error",
"Output buffer error",
"Output buffer starvation",
"Internal state fault",
"General descriptor problem",
"Reserved",
"Descriptor address error",
"Link address error",
"CHA error",
"DMA error"
};
static const char *sahara_err_dmasize[4] = {
"Byte transfer",
"Half-word transfer",
"Word transfer",
"Reserved"
};
static const char *sahara_err_dmasrc[8] = {
"No error",
"AHB bus error",
"Internal IP bus error",
"Parity error",
"DMA crosses 256 byte boundary",
"DMA is busy",
"Reserved",
"DMA HW error"
};
static const char *sahara_cha_errsrc[12] = {
"Input buffer non-empty",
"Illegal address",
"Illegal mode",
"Illegal data size",
"Illegal key size",
"Write during processing",
"CTX read during processing",
"HW error",
"Input buffer disabled/underflow",
"Output buffer disabled/overflow",
"DES key parity error",
"Reserved"
};
static const char *sahara_cha_err[4] = { "No error", "SKHA", "MDHA", "RNG" };
static void sahara_decode_error(struct sahara_dev *dev, unsigned int error)
{
u8 source = SAHARA_ERRSTATUS_GET_SOURCE(error);
u16 chasrc = ffs(SAHARA_ERRSTATUS_GET_CHASRC(error));
dev_err(dev->device, "%s: Error Register = 0x%08x\n", __func__, error);
dev_err(dev->device, " - %s.\n", sahara_err_src[source]);
if (source == SAHARA_ERRSOURCE_DMA) {
if (error & SAHARA_ERRSTATUS_DMA_DIR)
dev_err(dev->device, " * DMA read.\n");
else
dev_err(dev->device, " * DMA write.\n");
dev_err(dev->device, " * %s.\n",
sahara_err_dmasize[SAHARA_ERRSTATUS_GET_DMASZ(error)]);
dev_err(dev->device, " * %s.\n",
sahara_err_dmasrc[SAHARA_ERRSTATUS_GET_DMASRC(error)]);
} else if (source == SAHARA_ERRSOURCE_CHA) {
dev_err(dev->device, " * %s.\n",
sahara_cha_errsrc[chasrc]);
dev_err(dev->device, " * %s.\n",
sahara_cha_err[SAHARA_ERRSTATUS_GET_CHAERR(error)]);
}
dev_err(dev->device, "\n");
}
static const char *sahara_state[4] = { "Idle", "Busy", "Error", "HW Fault" };
static void sahara_decode_status(struct sahara_dev *dev, unsigned int status)
{
u8 state;
if (!IS_ENABLED(DEBUG))
return;
state = SAHARA_STATUS_GET_STATE(status);
dev_dbg(dev->device, "%s: Status Register = 0x%08x\n",
__func__, status);
dev_dbg(dev->device, " - State = %d:\n", state);
if (state & SAHARA_STATE_COMP_FLAG)
dev_dbg(dev->device, " * Descriptor completed. IRQ pending.\n");
dev_dbg(dev->device, " * %s.\n",
sahara_state[state & ~SAHARA_STATE_COMP_FLAG]);
if (status & SAHARA_STATUS_DAR_FULL)
dev_dbg(dev->device, " - DAR Full.\n");
if (status & SAHARA_STATUS_ERROR)
dev_dbg(dev->device, " - Error.\n");
if (status & SAHARA_STATUS_SECURE)
dev_dbg(dev->device, " - Secure.\n");
if (status & SAHARA_STATUS_FAIL)
dev_dbg(dev->device, " - Fail.\n");
if (status & SAHARA_STATUS_RNG_RESEED)
dev_dbg(dev->device, " - RNG Reseed Request.\n");
if (status & SAHARA_STATUS_ACTIVE_RNG)
dev_dbg(dev->device, " - RNG Active.\n");
if (status & SAHARA_STATUS_ACTIVE_MDHA)
dev_dbg(dev->device, " - MDHA Active.\n");
if (status & SAHARA_STATUS_ACTIVE_SKHA)
dev_dbg(dev->device, " - SKHA Active.\n");
if (status & SAHARA_STATUS_MODE_BATCH)
dev_dbg(dev->device, " - Batch Mode.\n");
else if (status & SAHARA_STATUS_MODE_DEDICATED)
dev_dbg(dev->device, " - Dedicated Mode.\n");
else if (status & SAHARA_STATUS_MODE_DEBUG)
dev_dbg(dev->device, " - Debug Mode.\n");
dev_dbg(dev->device, " - Internal state = 0x%02x\n",
SAHARA_STATUS_GET_ISTATE(status));
dev_dbg(dev->device, "Current DAR: 0x%08x\n",
sahara_read(dev, SAHARA_REG_CDAR));
dev_dbg(dev->device, "Initial DAR: 0x%08x\n\n",
sahara_read(dev, SAHARA_REG_IDAR));
}
static void sahara_dump_descriptors(struct sahara_dev *dev)
{
int i;
if (!IS_ENABLED(DEBUG))
return;
for (i = 0; i < SAHARA_MAX_HW_DESC; i++) {
dev_dbg(dev->device, "Descriptor (%d) (%pad):\n",
i, &dev->hw_phys_desc[i]);
dev_dbg(dev->device, "\thdr = 0x%08x\n", dev->hw_desc[i]->hdr);
dev_dbg(dev->device, "\tlen1 = %u\n", dev->hw_desc[i]->len1);
dev_dbg(dev->device, "\tp1 = 0x%08x\n", dev->hw_desc[i]->p1);
dev_dbg(dev->device, "\tlen2 = %u\n", dev->hw_desc[i]->len2);
dev_dbg(dev->device, "\tp2 = 0x%08x\n", dev->hw_desc[i]->p2);
dev_dbg(dev->device, "\tnext = 0x%08x\n",
dev->hw_desc[i]->next);
}
dev_dbg(dev->device, "\n");
}
static void sahara_dump_links(struct sahara_dev *dev)
{
int i;
if (!IS_ENABLED(DEBUG))
return;
for (i = 0; i < SAHARA_MAX_HW_LINK; i++) {
dev_dbg(dev->device, "Link (%d) (%pad):\n",
i, &dev->hw_phys_link[i]);
dev_dbg(dev->device, "\tlen = %u\n", dev->hw_link[i]->len);
dev_dbg(dev->device, "\tp = 0x%08x\n", dev->hw_link[i]->p);
dev_dbg(dev->device, "\tnext = 0x%08x\n",
dev->hw_link[i]->next);
}
dev_dbg(dev->device, "\n");
}
static int sahara_hw_descriptor_create(struct sahara_dev *dev)
{
struct sahara_ctx *ctx = dev->ctx;
struct scatterlist *sg;
int ret;
int i, j;
int idx = 0;
/* Copy new key if necessary */
if (ctx->flags & FLAGS_NEW_KEY) {
memcpy(dev->key_base, ctx->key, ctx->keylen);
ctx->flags &= ~FLAGS_NEW_KEY;
if (dev->flags & FLAGS_CBC) {
dev->hw_desc[idx]->len1 = AES_BLOCK_SIZE;
dev->hw_desc[idx]->p1 = dev->iv_phys_base;
} else {
dev->hw_desc[idx]->len1 = 0;
dev->hw_desc[idx]->p1 = 0;
}
dev->hw_desc[idx]->len2 = ctx->keylen;
dev->hw_desc[idx]->p2 = dev->key_phys_base;
dev->hw_desc[idx]->next = dev->hw_phys_desc[1];
dev->hw_desc[idx]->hdr = sahara_aes_key_hdr(dev);
idx++;
}
dev->nb_in_sg = sg_nents_for_len(dev->in_sg, dev->total);
if (dev->nb_in_sg < 0) {
dev_err(dev->device, "Invalid numbers of src SG.\n");
return dev->nb_in_sg;
}
dev->nb_out_sg = sg_nents_for_len(dev->out_sg, dev->total);
if (dev->nb_out_sg < 0) {
dev_err(dev->device, "Invalid numbers of dst SG.\n");
return dev->nb_out_sg;
}
if ((dev->nb_in_sg + dev->nb_out_sg) > SAHARA_MAX_HW_LINK) {
dev_err(dev->device, "not enough hw links (%d)\n",
dev->nb_in_sg + dev->nb_out_sg);
return -EINVAL;
}
ret = dma_map_sg(dev->device, dev->in_sg, dev->nb_in_sg,
DMA_TO_DEVICE);
if (ret != dev->nb_in_sg) {
dev_err(dev->device, "couldn't map in sg\n");
goto unmap_in;
}
ret = dma_map_sg(dev->device, dev->out_sg, dev->nb_out_sg,
DMA_FROM_DEVICE);
if (ret != dev->nb_out_sg) {
dev_err(dev->device, "couldn't map out sg\n");
goto unmap_out;
}
/* Create input links */
dev->hw_desc[idx]->p1 = dev->hw_phys_link[0];
sg = dev->in_sg;
for (i = 0; i < dev->nb_in_sg; i++) {
dev->hw_link[i]->len = sg->length;
dev->hw_link[i]->p = sg->dma_address;
if (i == (dev->nb_in_sg - 1)) {
dev->hw_link[i]->next = 0;
} else {
dev->hw_link[i]->next = dev->hw_phys_link[i + 1];
sg = sg_next(sg);
}
}
/* Create output links */
dev->hw_desc[idx]->p2 = dev->hw_phys_link[i];
sg = dev->out_sg;
for (j = i; j < dev->nb_out_sg + i; j++) {
dev->hw_link[j]->len = sg->length;
dev->hw_link[j]->p = sg->dma_address;
if (j == (dev->nb_out_sg + i - 1)) {
dev->hw_link[j]->next = 0;
} else {
dev->hw_link[j]->next = dev->hw_phys_link[j + 1];
sg = sg_next(sg);
}
}
/* Fill remaining fields of hw_desc[1] */
dev->hw_desc[idx]->hdr = sahara_aes_data_link_hdr(dev);
dev->hw_desc[idx]->len1 = dev->total;
dev->hw_desc[idx]->len2 = dev->total;
dev->hw_desc[idx]->next = 0;
sahara_dump_descriptors(dev);
sahara_dump_links(dev);
sahara_write(dev, dev->hw_phys_desc[0], SAHARA_REG_DAR);
return 0;
unmap_out:
dma_unmap_sg(dev->device, dev->out_sg, dev->nb_out_sg,
DMA_FROM_DEVICE);
unmap_in:
dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg,
DMA_TO_DEVICE);
return -EINVAL;
}
static int sahara_aes_process(struct ablkcipher_request *req)
{
struct sahara_dev *dev = dev_ptr;
struct sahara_ctx *ctx;
struct sahara_aes_reqctx *rctx;
int ret;
unsigned long timeout;
/* Request is ready to be dispatched by the device */
dev_dbg(dev->device,
"dispatch request (nbytes=%d, src=%p, dst=%p)\n",
req->nbytes, req->src, req->dst);
/* assign new request to device */
dev->total = req->nbytes;
dev->in_sg = req->src;
dev->out_sg = req->dst;
rctx = ablkcipher_request_ctx(req);
ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
rctx->mode &= FLAGS_MODE_MASK;
dev->flags = (dev->flags & ~FLAGS_MODE_MASK) | rctx->mode;
if ((dev->flags & FLAGS_CBC) && req->info)
memcpy(dev->iv_base, req->info, AES_KEYSIZE_128);
/* assign new context to device */
dev->ctx = ctx;
reinit_completion(&dev->dma_completion);
ret = sahara_hw_descriptor_create(dev);
if (ret)
return -EINVAL;
timeout = wait_for_completion_timeout(&dev->dma_completion,
msecs_to_jiffies(SAHARA_TIMEOUT_MS));
if (!timeout) {
dev_err(dev->device, "AES timeout\n");
return -ETIMEDOUT;
}
dma_unmap_sg(dev->device, dev->out_sg, dev->nb_out_sg,
DMA_FROM_DEVICE);
dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg,
DMA_TO_DEVICE);
return 0;
}
static int sahara_aes_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
unsigned int keylen)
{
struct sahara_ctx *ctx = crypto_ablkcipher_ctx(tfm);
int ret;
ctx->keylen = keylen;
/* SAHARA only supports 128bit keys */
if (keylen == AES_KEYSIZE_128) {
memcpy(ctx->key, key, keylen);
ctx->flags |= FLAGS_NEW_KEY;
return 0;
}
if (keylen != AES_KEYSIZE_192 && keylen != AES_KEYSIZE_256)
return -EINVAL;
/*
* The requested key size is not supported by HW, do a fallback.
*/
crypto_skcipher_clear_flags(ctx->fallback, CRYPTO_TFM_REQ_MASK);
crypto_skcipher_set_flags(ctx->fallback, tfm->base.crt_flags &
CRYPTO_TFM_REQ_MASK);
ret = crypto_skcipher_setkey(ctx->fallback, key, keylen);
tfm->base.crt_flags &= ~CRYPTO_TFM_RES_MASK;
tfm->base.crt_flags |= crypto_skcipher_get_flags(ctx->fallback) &
CRYPTO_TFM_RES_MASK;
return ret;
}
static int sahara_aes_crypt(struct ablkcipher_request *req, unsigned long mode)
{
struct sahara_aes_reqctx *rctx = ablkcipher_request_ctx(req);
struct sahara_dev *dev = dev_ptr;
int err = 0;
dev_dbg(dev->device, "nbytes: %d, enc: %d, cbc: %d\n",
req->nbytes, !!(mode & FLAGS_ENCRYPT), !!(mode & FLAGS_CBC));
if (!IS_ALIGNED(req->nbytes, AES_BLOCK_SIZE)) {
dev_err(dev->device,
"request size is not exact amount of AES blocks\n");
return -EINVAL;
}
rctx->mode = mode;
mutex_lock(&dev->queue_mutex);
err = ablkcipher_enqueue_request(&dev->queue, req);
mutex_unlock(&dev->queue_mutex);
wake_up_process(dev->kthread);
return err;
}
static int sahara_aes_ecb_encrypt(struct ablkcipher_request *req)
{
struct sahara_ctx *ctx = crypto_ablkcipher_ctx(
crypto_ablkcipher_reqtfm(req));
int err;
if (unlikely(ctx->keylen != AES_KEYSIZE_128)) {
SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
skcipher_request_set_tfm(subreq, ctx->fallback);
skcipher_request_set_callback(subreq, req->base.flags,
NULL, NULL);
skcipher_request_set_crypt(subreq, req->src, req->dst,
req->nbytes, req->info);
err = crypto_skcipher_encrypt(subreq);
skcipher_request_zero(subreq);
return err;
}
return sahara_aes_crypt(req, FLAGS_ENCRYPT);
}
static int sahara_aes_ecb_decrypt(struct ablkcipher_request *req)
{
struct sahara_ctx *ctx = crypto_ablkcipher_ctx(
crypto_ablkcipher_reqtfm(req));
int err;
if (unlikely(ctx->keylen != AES_KEYSIZE_128)) {
SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
skcipher_request_set_tfm(subreq, ctx->fallback);
skcipher_request_set_callback(subreq, req->base.flags,
NULL, NULL);
skcipher_request_set_crypt(subreq, req->src, req->dst,
req->nbytes, req->info);
err = crypto_skcipher_decrypt(subreq);
skcipher_request_zero(subreq);
return err;
}
return sahara_aes_crypt(req, 0);
}
static int sahara_aes_cbc_encrypt(struct ablkcipher_request *req)
{
struct sahara_ctx *ctx = crypto_ablkcipher_ctx(
crypto_ablkcipher_reqtfm(req));
int err;
if (unlikely(ctx->keylen != AES_KEYSIZE_128)) {
SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
skcipher_request_set_tfm(subreq, ctx->fallback);
skcipher_request_set_callback(subreq, req->base.flags,
NULL, NULL);
skcipher_request_set_crypt(subreq, req->src, req->dst,
req->nbytes, req->info);
err = crypto_skcipher_encrypt(subreq);
skcipher_request_zero(subreq);
return err;
}
return sahara_aes_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
}
static int sahara_aes_cbc_decrypt(struct ablkcipher_request *req)
{
struct sahara_ctx *ctx = crypto_ablkcipher_ctx(
crypto_ablkcipher_reqtfm(req));
int err;
if (unlikely(ctx->keylen != AES_KEYSIZE_128)) {
SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
skcipher_request_set_tfm(subreq, ctx->fallback);
skcipher_request_set_callback(subreq, req->base.flags,
NULL, NULL);
skcipher_request_set_crypt(subreq, req->src, req->dst,
req->nbytes, req->info);
err = crypto_skcipher_decrypt(subreq);
skcipher_request_zero(subreq);
return err;
}
return sahara_aes_crypt(req, FLAGS_CBC);
}
static int sahara_aes_cra_init(struct crypto_tfm *tfm)
{
const char *name = crypto_tfm_alg_name(tfm);
struct sahara_ctx *ctx = crypto_tfm_ctx(tfm);
ctx->fallback = crypto_alloc_skcipher(name, 0,
CRYPTO_ALG_ASYNC |
CRYPTO_ALG_NEED_FALLBACK);
if (IS_ERR(ctx->fallback)) {
pr_err("Error allocating fallback algo %s\n", name);
return PTR_ERR(ctx->fallback);
}
tfm->crt_ablkcipher.reqsize = sizeof(struct sahara_aes_reqctx);
return 0;
}
static void sahara_aes_cra_exit(struct crypto_tfm *tfm)
{
struct sahara_ctx *ctx = crypto_tfm_ctx(tfm);
crypto_free_skcipher(ctx->fallback);
}
static u32 sahara_sha_init_hdr(struct sahara_dev *dev,
struct sahara_sha_reqctx *rctx)
{
u32 hdr = 0;
hdr = rctx->mode;
if (rctx->first) {
hdr |= SAHARA_HDR_MDHA_SET_MODE_HASH;
hdr |= SAHARA_HDR_MDHA_INIT;
} else {
hdr |= SAHARA_HDR_MDHA_SET_MODE_MD_KEY;
}
if (rctx->last)
hdr |= SAHARA_HDR_MDHA_PDATA;
if (hweight_long(hdr) % 2 == 0)
hdr |= SAHARA_HDR_PARITY_BIT;
return hdr;
}
static int sahara_sha_hw_links_create(struct sahara_dev *dev,
struct sahara_sha_reqctx *rctx,
int start)
{
struct scatterlist *sg;
unsigned int i;
int ret;
dev->in_sg = rctx->in_sg;
dev->nb_in_sg = sg_nents_for_len(dev->in_sg, rctx->total);
if (dev->nb_in_sg < 0) {
dev_err(dev->device, "Invalid numbers of src SG.\n");
return dev->nb_in_sg;
}
if ((dev->nb_in_sg) > SAHARA_MAX_HW_LINK) {
dev_err(dev->device, "not enough hw links (%d)\n",
dev->nb_in_sg + dev->nb_out_sg);
return -EINVAL;
}
sg = dev->in_sg;
ret = dma_map_sg(dev->device, dev->in_sg, dev->nb_in_sg, DMA_TO_DEVICE);
if (!ret)
return -EFAULT;
for (i = start; i < dev->nb_in_sg + start; i++) {
dev->hw_link[i]->len = sg->length;
dev->hw_link[i]->p = sg->dma_address;
if (i == (dev->nb_in_sg + start - 1)) {
dev->hw_link[i]->next = 0;
} else {
dev->hw_link[i]->next = dev->hw_phys_link[i + 1];
sg = sg_next(sg);
}
}
return i;
}
static int sahara_sha_hw_data_descriptor_create(struct sahara_dev *dev,
struct sahara_sha_reqctx *rctx,
struct ahash_request *req,
int index)
{
unsigned result_len;
int i = index;
if (rctx->first)
/* Create initial descriptor: #8*/
dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx);
else
/* Create hash descriptor: #10. Must follow #6. */
dev->hw_desc[index]->hdr = SAHARA_HDR_MDHA_HASH;
dev->hw_desc[index]->len1 = rctx->total;
if (dev->hw_desc[index]->len1 == 0) {
/* if len1 is 0, p1 must be 0, too */
dev->hw_desc[index]->p1 = 0;
rctx->sg_in_idx = 0;
} else {
/* Create input links */
dev->hw_desc[index]->p1 = dev->hw_phys_link[index];
i = sahara_sha_hw_links_create(dev, rctx, index);
rctx->sg_in_idx = index;
if (i < 0)
return i;
}
dev->hw_desc[index]->p2 = dev->hw_phys_link[i];
/* Save the context for the next operation */
result_len = rctx->context_size;
dev->hw_link[i]->p = dev->context_phys_base;
dev->hw_link[i]->len = result_len;
dev->hw_desc[index]->len2 = result_len;
dev->hw_link[i]->next = 0;
return 0;
}
/*
* Load descriptor aka #6
*
* To load a previously saved context back to the MDHA unit
*
* p1: Saved Context
* p2: NULL
*
*/
static int sahara_sha_hw_context_descriptor_create(struct sahara_dev *dev,
struct sahara_sha_reqctx *rctx,
struct ahash_request *req,
int index)
{
dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx);
dev->hw_desc[index]->len1 = rctx->context_size;
dev->hw_desc[index]->p1 = dev->hw_phys_link[index];
dev->hw_desc[index]->len2 = 0;
dev->hw_desc[index]->p2 = 0;
dev->hw_link[index]->len = rctx->context_size;
dev->hw_link[index]->p = dev->context_phys_base;
dev->hw_link[index]->next = 0;
return 0;
}
static int sahara_walk_and_recalc(struct scatterlist *sg, unsigned int nbytes)
{
if (!sg || !sg->length)
return nbytes;
while (nbytes && sg) {
if (nbytes <= sg->length) {
sg->length = nbytes;
sg_mark_end(sg);
break;
}
nbytes -= sg->length;
sg = sg_next(sg);
}
return nbytes;
}
static int sahara_sha_prepare_request(struct ahash_request *req)
{
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
struct sahara_sha_reqctx *rctx = ahash_request_ctx(req);
unsigned int hash_later;
unsigned int block_size;
unsigned int len;
block_size = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
/* append bytes from previous operation */
len = rctx->buf_cnt + req->nbytes;
/* only the last transfer can be padded in hardware */
if (!rctx->last && (len < block_size)) {
/* to few data, save for next operation */
scatterwalk_map_and_copy(rctx->buf + rctx->buf_cnt, req->src,
0, req->nbytes, 0);
rctx->buf_cnt += req->nbytes;
return 0;
}
/* add data from previous operation first */
if (rctx->buf_cnt)
memcpy(rctx->rembuf, rctx->buf, rctx->buf_cnt);
/* data must always be a multiple of block_size */
hash_later = rctx->last ? 0 : len & (block_size - 1);
if (hash_later) {
unsigned int offset = req->nbytes - hash_later;
/* Save remaining bytes for later use */
scatterwalk_map_and_copy(rctx->buf, req->src, offset,
hash_later, 0);
}
/* nbytes should now be multiple of blocksize */
req->nbytes = req->nbytes - hash_later;
sahara_walk_and_recalc(req->src, req->nbytes);
/* have data from previous operation and current */
if (rctx->buf_cnt && req->nbytes) {
sg_init_table(rctx->in_sg_chain, 2);
sg_set_buf(rctx->in_sg_chain, rctx->rembuf, rctx->buf_cnt);
sg_chain(rctx->in_sg_chain, 2, req->src);
rctx->total = req->nbytes + rctx->buf_cnt;
rctx->in_sg = rctx->in_sg_chain;
req->src = rctx->in_sg_chain;
/* only data from previous operation */
} else if (rctx->buf_cnt) {
if (req->src)
rctx->in_sg = req->src;
else
rctx->in_sg = rctx->in_sg_chain;
/* buf was copied into rembuf above */
sg_init_one(rctx->in_sg, rctx->rembuf, rctx->buf_cnt);
rctx->total = rctx->buf_cnt;
/* no data from previous operation */
} else {
rctx->in_sg = req->src;
rctx->total = req->nbytes;
req->src = rctx->in_sg;
}
/* on next call, we only have the remaining data in the buffer */
rctx->buf_cnt = hash_later;
return -EINPROGRESS;
}