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rt5645.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* rt5645.c -- RT5645 ALSA SoC audio codec driver
*
* Copyright 2013 Realtek Semiconductor Corp.
* Author: Bard Liao <[email protected]>
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/gpio.h>
#include <linux/gpio/consumer.h>
#include <linux/acpi.h>
#include <linux/dmi.h>
#include <linux/regulator/consumer.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/jack.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include "rl6231.h"
#include "rt5645.h"
#define QUIRK_INV_JD1_1(q) ((q) & 1)
#define QUIRK_LEVEL_IRQ(q) (((q) >> 1) & 1)
#define QUIRK_IN2_DIFF(q) (((q) >> 2) & 1)
#define QUIRK_JD_MODE(q) (((q) >> 4) & 7)
#define QUIRK_DMIC1_DATA_PIN(q) (((q) >> 8) & 3)
#define QUIRK_DMIC2_DATA_PIN(q) (((q) >> 12) & 3)
static unsigned int quirk = -1;
module_param(quirk, uint, 0444);
MODULE_PARM_DESC(quirk, "RT5645 pdata quirk override");
#define RT5645_DEVICE_ID 0x6308
#define RT5650_DEVICE_ID 0x6419
#define RT5645_PR_RANGE_BASE (0xff + 1)
#define RT5645_PR_SPACING 0x100
#define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
#define RT5645_HWEQ_NUM 57
#define TIME_TO_POWER_MS 400
static const struct regmap_range_cfg rt5645_ranges[] = {
{
.name = "PR",
.range_min = RT5645_PR_BASE,
.range_max = RT5645_PR_BASE + 0xf8,
.selector_reg = RT5645_PRIV_INDEX,
.selector_mask = 0xff,
.selector_shift = 0x0,
.window_start = RT5645_PRIV_DATA,
.window_len = 0x1,
},
};
static const struct reg_sequence init_list[] = {
{RT5645_PR_BASE + 0x3d, 0x3600},
{RT5645_PR_BASE + 0x1c, 0xfd70},
{RT5645_PR_BASE + 0x20, 0x611f},
{RT5645_PR_BASE + 0x21, 0x4040},
{RT5645_PR_BASE + 0x23, 0x0004},
{RT5645_ASRC_4, 0x0120},
};
static const struct reg_sequence rt5650_init_list[] = {
{0xf6, 0x0100},
};
static const struct reg_default rt5645_reg[] = {
{ 0x00, 0x0000 },
{ 0x01, 0xc8c8 },
{ 0x02, 0xc8c8 },
{ 0x03, 0xc8c8 },
{ 0x0a, 0x0002 },
{ 0x0b, 0x2827 },
{ 0x0c, 0xe000 },
{ 0x0d, 0x0000 },
{ 0x0e, 0x0000 },
{ 0x0f, 0x0808 },
{ 0x14, 0x3333 },
{ 0x16, 0x4b00 },
{ 0x18, 0x018b },
{ 0x19, 0xafaf },
{ 0x1a, 0xafaf },
{ 0x1b, 0x0001 },
{ 0x1c, 0x2f2f },
{ 0x1d, 0x2f2f },
{ 0x1e, 0x0000 },
{ 0x20, 0x0000 },
{ 0x27, 0x7060 },
{ 0x28, 0x7070 },
{ 0x29, 0x8080 },
{ 0x2a, 0x5656 },
{ 0x2b, 0x5454 },
{ 0x2c, 0xaaa0 },
{ 0x2d, 0x0000 },
{ 0x2f, 0x1002 },
{ 0x31, 0x5000 },
{ 0x32, 0x0000 },
{ 0x33, 0x0000 },
{ 0x34, 0x0000 },
{ 0x35, 0x0000 },
{ 0x3b, 0x0000 },
{ 0x3c, 0x007f },
{ 0x3d, 0x0000 },
{ 0x3e, 0x007f },
{ 0x3f, 0x0000 },
{ 0x40, 0x001f },
{ 0x41, 0x0000 },
{ 0x42, 0x001f },
{ 0x45, 0x6000 },
{ 0x46, 0x003e },
{ 0x47, 0x003e },
{ 0x48, 0xf807 },
{ 0x4a, 0x0004 },
{ 0x4d, 0x0000 },
{ 0x4e, 0x0000 },
{ 0x4f, 0x01ff },
{ 0x50, 0x0000 },
{ 0x51, 0x0000 },
{ 0x52, 0x01ff },
{ 0x53, 0xf000 },
{ 0x56, 0x0111 },
{ 0x57, 0x0064 },
{ 0x58, 0xef0e },
{ 0x59, 0xf0f0 },
{ 0x5a, 0xef0e },
{ 0x5b, 0xf0f0 },
{ 0x5c, 0xef0e },
{ 0x5d, 0xf0f0 },
{ 0x5e, 0xf000 },
{ 0x5f, 0x0000 },
{ 0x61, 0x0300 },
{ 0x62, 0x0000 },
{ 0x63, 0x00c2 },
{ 0x64, 0x0000 },
{ 0x65, 0x0000 },
{ 0x66, 0x0000 },
{ 0x6a, 0x0000 },
{ 0x6c, 0x0aaa },
{ 0x70, 0x8000 },
{ 0x71, 0x8000 },
{ 0x72, 0x8000 },
{ 0x73, 0x7770 },
{ 0x74, 0x3e00 },
{ 0x75, 0x2409 },
{ 0x76, 0x000a },
{ 0x77, 0x0c00 },
{ 0x78, 0x0000 },
{ 0x79, 0x0123 },
{ 0x80, 0x0000 },
{ 0x81, 0x0000 },
{ 0x82, 0x0000 },
{ 0x83, 0x0000 },
{ 0x84, 0x0000 },
{ 0x85, 0x0000 },
{ 0x8a, 0x0120 },
{ 0x8e, 0x0004 },
{ 0x8f, 0x1100 },
{ 0x90, 0x0646 },
{ 0x91, 0x0c06 },
{ 0x93, 0x0000 },
{ 0x94, 0x0200 },
{ 0x95, 0x0000 },
{ 0x9a, 0x2184 },
{ 0x9b, 0x010a },
{ 0x9c, 0x0aea },
{ 0x9d, 0x000c },
{ 0x9e, 0x0400 },
{ 0xa0, 0xa0a8 },
{ 0xa1, 0x0059 },
{ 0xa2, 0x0001 },
{ 0xae, 0x6000 },
{ 0xaf, 0x0000 },
{ 0xb0, 0x6000 },
{ 0xb1, 0x0000 },
{ 0xb2, 0x0000 },
{ 0xb3, 0x001f },
{ 0xb4, 0x020c },
{ 0xb5, 0x1f00 },
{ 0xb6, 0x0000 },
{ 0xbb, 0x0000 },
{ 0xbc, 0x0000 },
{ 0xbd, 0x0000 },
{ 0xbe, 0x0000 },
{ 0xbf, 0x3100 },
{ 0xc0, 0x0000 },
{ 0xc1, 0x0000 },
{ 0xc2, 0x0000 },
{ 0xc3, 0x2000 },
{ 0xcd, 0x0000 },
{ 0xce, 0x0000 },
{ 0xcf, 0x1813 },
{ 0xd0, 0x0690 },
{ 0xd1, 0x1c17 },
{ 0xd3, 0xb320 },
{ 0xd4, 0x0000 },
{ 0xd6, 0x0400 },
{ 0xd9, 0x0809 },
{ 0xda, 0x0000 },
{ 0xdb, 0x0003 },
{ 0xdc, 0x0049 },
{ 0xdd, 0x001b },
{ 0xdf, 0x0008 },
{ 0xe0, 0x4000 },
{ 0xe6, 0x8000 },
{ 0xe7, 0x0200 },
{ 0xec, 0xb300 },
{ 0xed, 0x0000 },
{ 0xf0, 0x001f },
{ 0xf1, 0x020c },
{ 0xf2, 0x1f00 },
{ 0xf3, 0x0000 },
{ 0xf4, 0x4000 },
{ 0xf8, 0x0000 },
{ 0xf9, 0x0000 },
{ 0xfa, 0x2060 },
{ 0xfb, 0x4040 },
{ 0xfc, 0x0000 },
{ 0xfd, 0x0002 },
{ 0xfe, 0x10ec },
{ 0xff, 0x6308 },
};
static const struct reg_default rt5650_reg[] = {
{ 0x00, 0x0000 },
{ 0x01, 0xc8c8 },
{ 0x02, 0xc8c8 },
{ 0x03, 0xc8c8 },
{ 0x0a, 0x0002 },
{ 0x0b, 0x2827 },
{ 0x0c, 0xe000 },
{ 0x0d, 0x0000 },
{ 0x0e, 0x0000 },
{ 0x0f, 0x0808 },
{ 0x14, 0x3333 },
{ 0x16, 0x4b00 },
{ 0x18, 0x018b },
{ 0x19, 0xafaf },
{ 0x1a, 0xafaf },
{ 0x1b, 0x0001 },
{ 0x1c, 0x2f2f },
{ 0x1d, 0x2f2f },
{ 0x1e, 0x0000 },
{ 0x20, 0x0000 },
{ 0x27, 0x7060 },
{ 0x28, 0x7070 },
{ 0x29, 0x8080 },
{ 0x2a, 0x5656 },
{ 0x2b, 0x5454 },
{ 0x2c, 0xaaa0 },
{ 0x2d, 0x0000 },
{ 0x2f, 0x5002 },
{ 0x31, 0x5000 },
{ 0x32, 0x0000 },
{ 0x33, 0x0000 },
{ 0x34, 0x0000 },
{ 0x35, 0x0000 },
{ 0x3b, 0x0000 },
{ 0x3c, 0x007f },
{ 0x3d, 0x0000 },
{ 0x3e, 0x007f },
{ 0x3f, 0x0000 },
{ 0x40, 0x001f },
{ 0x41, 0x0000 },
{ 0x42, 0x001f },
{ 0x45, 0x6000 },
{ 0x46, 0x003e },
{ 0x47, 0x003e },
{ 0x48, 0xf807 },
{ 0x4a, 0x0004 },
{ 0x4d, 0x0000 },
{ 0x4e, 0x0000 },
{ 0x4f, 0x01ff },
{ 0x50, 0x0000 },
{ 0x51, 0x0000 },
{ 0x52, 0x01ff },
{ 0x53, 0xf000 },
{ 0x56, 0x0111 },
{ 0x57, 0x0064 },
{ 0x58, 0xef0e },
{ 0x59, 0xf0f0 },
{ 0x5a, 0xef0e },
{ 0x5b, 0xf0f0 },
{ 0x5c, 0xef0e },
{ 0x5d, 0xf0f0 },
{ 0x5e, 0xf000 },
{ 0x5f, 0x0000 },
{ 0x61, 0x0300 },
{ 0x62, 0x0000 },
{ 0x63, 0x00c2 },
{ 0x64, 0x0000 },
{ 0x65, 0x0000 },
{ 0x66, 0x0000 },
{ 0x6a, 0x0000 },
{ 0x6c, 0x0aaa },
{ 0x70, 0x8000 },
{ 0x71, 0x8000 },
{ 0x72, 0x8000 },
{ 0x73, 0x7770 },
{ 0x74, 0x3e00 },
{ 0x75, 0x2409 },
{ 0x76, 0x000a },
{ 0x77, 0x0c00 },
{ 0x78, 0x0000 },
{ 0x79, 0x0123 },
{ 0x7a, 0x0123 },
{ 0x80, 0x0000 },
{ 0x81, 0x0000 },
{ 0x82, 0x0000 },
{ 0x83, 0x0000 },
{ 0x84, 0x0000 },
{ 0x85, 0x0000 },
{ 0x8a, 0x0120 },
{ 0x8e, 0x0004 },
{ 0x8f, 0x1100 },
{ 0x90, 0x0646 },
{ 0x91, 0x0c06 },
{ 0x93, 0x0000 },
{ 0x94, 0x0200 },
{ 0x95, 0x0000 },
{ 0x9a, 0x2184 },
{ 0x9b, 0x010a },
{ 0x9c, 0x0aea },
{ 0x9d, 0x000c },
{ 0x9e, 0x0400 },
{ 0xa0, 0xa0a8 },
{ 0xa1, 0x0059 },
{ 0xa2, 0x0001 },
{ 0xae, 0x6000 },
{ 0xaf, 0x0000 },
{ 0xb0, 0x6000 },
{ 0xb1, 0x0000 },
{ 0xb2, 0x0000 },
{ 0xb3, 0x001f },
{ 0xb4, 0x020c },
{ 0xb5, 0x1f00 },
{ 0xb6, 0x0000 },
{ 0xbb, 0x0000 },
{ 0xbc, 0x0000 },
{ 0xbd, 0x0000 },
{ 0xbe, 0x0000 },
{ 0xbf, 0x3100 },
{ 0xc0, 0x0000 },
{ 0xc1, 0x0000 },
{ 0xc2, 0x0000 },
{ 0xc3, 0x2000 },
{ 0xcd, 0x0000 },
{ 0xce, 0x0000 },
{ 0xcf, 0x1813 },
{ 0xd0, 0x0690 },
{ 0xd1, 0x1c17 },
{ 0xd3, 0xb320 },
{ 0xd4, 0x0000 },
{ 0xd6, 0x0400 },
{ 0xd9, 0x0809 },
{ 0xda, 0x0000 },
{ 0xdb, 0x0003 },
{ 0xdc, 0x0049 },
{ 0xdd, 0x001b },
{ 0xdf, 0x0008 },
{ 0xe0, 0x4000 },
{ 0xe6, 0x8000 },
{ 0xe7, 0x0200 },
{ 0xec, 0xb300 },
{ 0xed, 0x0000 },
{ 0xf0, 0x001f },
{ 0xf1, 0x020c },
{ 0xf2, 0x1f00 },
{ 0xf3, 0x0000 },
{ 0xf4, 0x4000 },
{ 0xf8, 0x0000 },
{ 0xf9, 0x0000 },
{ 0xfa, 0x2060 },
{ 0xfb, 0x4040 },
{ 0xfc, 0x0000 },
{ 0xfd, 0x0002 },
{ 0xfe, 0x10ec },
{ 0xff, 0x6308 },
};
struct rt5645_eq_param_s {
unsigned short reg;
unsigned short val;
};
struct rt5645_eq_param_s_be16 {
__be16 reg;
__be16 val;
};
static const char *const rt5645_supply_names[] = {
"avdd",
"cpvdd",
};
struct rt5645_priv {
struct snd_soc_component *component;
struct rt5645_platform_data pdata;
struct regmap *regmap;
struct i2c_client *i2c;
struct gpio_desc *gpiod_hp_det;
struct snd_soc_jack *hp_jack;
struct snd_soc_jack *mic_jack;
struct snd_soc_jack *btn_jack;
struct delayed_work jack_detect_work, rcclock_work;
struct regulator_bulk_data supplies[ARRAY_SIZE(rt5645_supply_names)];
struct rt5645_eq_param_s *eq_param;
struct timer_list btn_check_timer;
int codec_type;
int sysclk;
int sysclk_src;
int lrck[RT5645_AIFS];
int bclk[RT5645_AIFS];
int master[RT5645_AIFS];
int pll_src;
int pll_in;
int pll_out;
int jack_type;
bool en_button_func;
bool hp_on;
int v_id;
};
static int rt5645_reset(struct snd_soc_component *component)
{
return snd_soc_component_write(component, RT5645_RESET, 0);
}
static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
{
int i;
for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
if (reg >= rt5645_ranges[i].range_min &&
reg <= rt5645_ranges[i].range_max) {
return true;
}
}
switch (reg) {
case RT5645_RESET:
case RT5645_PRIV_INDEX:
case RT5645_PRIV_DATA:
case RT5645_IN1_CTRL1:
case RT5645_IN1_CTRL2:
case RT5645_IN1_CTRL3:
case RT5645_A_JD_CTRL1:
case RT5645_ADC_EQ_CTRL1:
case RT5645_EQ_CTRL1:
case RT5645_ALC_CTRL_1:
case RT5645_IRQ_CTRL2:
case RT5645_IRQ_CTRL3:
case RT5645_INT_IRQ_ST:
case RT5645_IL_CMD:
case RT5650_4BTN_IL_CMD1:
case RT5645_VENDOR_ID:
case RT5645_VENDOR_ID1:
case RT5645_VENDOR_ID2:
return true;
default:
return false;
}
}
static bool rt5645_readable_register(struct device *dev, unsigned int reg)
{
int i;
for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
if (reg >= rt5645_ranges[i].range_min &&
reg <= rt5645_ranges[i].range_max) {
return true;
}
}
switch (reg) {
case RT5645_RESET:
case RT5645_SPK_VOL:
case RT5645_HP_VOL:
case RT5645_LOUT1:
case RT5645_IN1_CTRL1:
case RT5645_IN1_CTRL2:
case RT5645_IN1_CTRL3:
case RT5645_IN2_CTRL:
case RT5645_INL1_INR1_VOL:
case RT5645_SPK_FUNC_LIM:
case RT5645_ADJ_HPF_CTRL:
case RT5645_DAC1_DIG_VOL:
case RT5645_DAC2_DIG_VOL:
case RT5645_DAC_CTRL:
case RT5645_STO1_ADC_DIG_VOL:
case RT5645_MONO_ADC_DIG_VOL:
case RT5645_ADC_BST_VOL1:
case RT5645_ADC_BST_VOL2:
case RT5645_STO1_ADC_MIXER:
case RT5645_MONO_ADC_MIXER:
case RT5645_AD_DA_MIXER:
case RT5645_STO_DAC_MIXER:
case RT5645_MONO_DAC_MIXER:
case RT5645_DIG_MIXER:
case RT5650_A_DAC_SOUR:
case RT5645_DIG_INF1_DATA:
case RT5645_PDM_OUT_CTRL:
case RT5645_REC_L1_MIXER:
case RT5645_REC_L2_MIXER:
case RT5645_REC_R1_MIXER:
case RT5645_REC_R2_MIXER:
case RT5645_HPMIXL_CTRL:
case RT5645_HPOMIXL_CTRL:
case RT5645_HPMIXR_CTRL:
case RT5645_HPOMIXR_CTRL:
case RT5645_HPO_MIXER:
case RT5645_SPK_L_MIXER:
case RT5645_SPK_R_MIXER:
case RT5645_SPO_MIXER:
case RT5645_SPO_CLSD_RATIO:
case RT5645_OUT_L1_MIXER:
case RT5645_OUT_R1_MIXER:
case RT5645_OUT_L_GAIN1:
case RT5645_OUT_L_GAIN2:
case RT5645_OUT_R_GAIN1:
case RT5645_OUT_R_GAIN2:
case RT5645_LOUT_MIXER:
case RT5645_HAPTIC_CTRL1:
case RT5645_HAPTIC_CTRL2:
case RT5645_HAPTIC_CTRL3:
case RT5645_HAPTIC_CTRL4:
case RT5645_HAPTIC_CTRL5:
case RT5645_HAPTIC_CTRL6:
case RT5645_HAPTIC_CTRL7:
case RT5645_HAPTIC_CTRL8:
case RT5645_HAPTIC_CTRL9:
case RT5645_HAPTIC_CTRL10:
case RT5645_PWR_DIG1:
case RT5645_PWR_DIG2:
case RT5645_PWR_ANLG1:
case RT5645_PWR_ANLG2:
case RT5645_PWR_MIXER:
case RT5645_PWR_VOL:
case RT5645_PRIV_INDEX:
case RT5645_PRIV_DATA:
case RT5645_I2S1_SDP:
case RT5645_I2S2_SDP:
case RT5645_ADDA_CLK1:
case RT5645_ADDA_CLK2:
case RT5645_DMIC_CTRL1:
case RT5645_DMIC_CTRL2:
case RT5645_TDM_CTRL_1:
case RT5645_TDM_CTRL_2:
case RT5645_TDM_CTRL_3:
case RT5650_TDM_CTRL_4:
case RT5645_GLB_CLK:
case RT5645_PLL_CTRL1:
case RT5645_PLL_CTRL2:
case RT5645_ASRC_1:
case RT5645_ASRC_2:
case RT5645_ASRC_3:
case RT5645_ASRC_4:
case RT5645_DEPOP_M1:
case RT5645_DEPOP_M2:
case RT5645_DEPOP_M3:
case RT5645_CHARGE_PUMP:
case RT5645_MICBIAS:
case RT5645_A_JD_CTRL1:
case RT5645_VAD_CTRL4:
case RT5645_CLSD_OUT_CTRL:
case RT5645_ADC_EQ_CTRL1:
case RT5645_ADC_EQ_CTRL2:
case RT5645_EQ_CTRL1:
case RT5645_EQ_CTRL2:
case RT5645_ALC_CTRL_1:
case RT5645_ALC_CTRL_2:
case RT5645_ALC_CTRL_3:
case RT5645_ALC_CTRL_4:
case RT5645_ALC_CTRL_5:
case RT5645_JD_CTRL:
case RT5645_IRQ_CTRL1:
case RT5645_IRQ_CTRL2:
case RT5645_IRQ_CTRL3:
case RT5645_INT_IRQ_ST:
case RT5645_GPIO_CTRL1:
case RT5645_GPIO_CTRL2:
case RT5645_GPIO_CTRL3:
case RT5645_BASS_BACK:
case RT5645_MP3_PLUS1:
case RT5645_MP3_PLUS2:
case RT5645_ADJ_HPF1:
case RT5645_ADJ_HPF2:
case RT5645_HP_CALIB_AMP_DET:
case RT5645_SV_ZCD1:
case RT5645_SV_ZCD2:
case RT5645_IL_CMD:
case RT5645_IL_CMD2:
case RT5645_IL_CMD3:
case RT5650_4BTN_IL_CMD1:
case RT5650_4BTN_IL_CMD2:
case RT5645_DRC1_HL_CTRL1:
case RT5645_DRC2_HL_CTRL1:
case RT5645_ADC_MONO_HP_CTRL1:
case RT5645_ADC_MONO_HP_CTRL2:
case RT5645_DRC2_CTRL1:
case RT5645_DRC2_CTRL2:
case RT5645_DRC2_CTRL3:
case RT5645_DRC2_CTRL4:
case RT5645_DRC2_CTRL5:
case RT5645_JD_CTRL3:
case RT5645_JD_CTRL4:
case RT5645_GEN_CTRL1:
case RT5645_GEN_CTRL2:
case RT5645_GEN_CTRL3:
case RT5645_VENDOR_ID:
case RT5645_VENDOR_ID1:
case RT5645_VENDOR_ID2:
return true;
default:
return false;
}
}
static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
static const DECLARE_TLV_DB_RANGE(bst_tlv,
0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
);
/* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv,
0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
);
static int rt5645_hweq_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
uinfo->count = RT5645_HWEQ_NUM * sizeof(struct rt5645_eq_param_s);
return 0;
}
static int rt5645_hweq_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
struct rt5645_eq_param_s_be16 *eq_param =
(struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
int i;
for (i = 0; i < RT5645_HWEQ_NUM; i++) {
eq_param[i].reg = cpu_to_be16(rt5645->eq_param[i].reg);
eq_param[i].val = cpu_to_be16(rt5645->eq_param[i].val);
}
return 0;
}
static bool rt5645_validate_hweq(unsigned short reg)
{
if ((reg >= 0x1a4 && reg <= 0x1cd) | (reg >= 0x1e5 && reg <= 0x1f8) |
(reg == RT5645_EQ_CTRL2))
return true;
return false;
}
static int rt5645_hweq_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
struct rt5645_eq_param_s_be16 *eq_param =
(struct rt5645_eq_param_s_be16 *)ucontrol->value.bytes.data;
int i;
for (i = 0; i < RT5645_HWEQ_NUM; i++) {
rt5645->eq_param[i].reg = be16_to_cpu(eq_param[i].reg);
rt5645->eq_param[i].val = be16_to_cpu(eq_param[i].val);
}
/* The final setting of the table should be RT5645_EQ_CTRL2 */
for (i = RT5645_HWEQ_NUM - 1; i >= 0; i--) {
if (rt5645->eq_param[i].reg == 0)
continue;
else if (rt5645->eq_param[i].reg != RT5645_EQ_CTRL2)
return 0;
else
break;
}
for (i = 0; i < RT5645_HWEQ_NUM; i++) {
if (!rt5645_validate_hweq(rt5645->eq_param[i].reg) &&
rt5645->eq_param[i].reg != 0)
return 0;
else if (rt5645->eq_param[i].reg == 0)
break;
}
return 0;
}
#define RT5645_HWEQ(xname) \
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
.info = rt5645_hweq_info, \
.get = rt5645_hweq_get, \
.put = rt5645_hweq_put \
}
static int rt5645_spk_put_volsw(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
int ret;
regmap_update_bits(rt5645->regmap, RT5645_MICBIAS,
RT5645_PWR_CLK25M_MASK, RT5645_PWR_CLK25M_PU);
ret = snd_soc_put_volsw(kcontrol, ucontrol);
mod_delayed_work(system_power_efficient_wq, &rt5645->rcclock_work,
msecs_to_jiffies(200));
return ret;
}
static const char * const rt5645_dac1_vol_ctrl_mode_text[] = {
"immediately", "zero crossing", "soft ramp"
};
static SOC_ENUM_SINGLE_DECL(
rt5645_dac1_vol_ctrl_mode, RT5645_PR_BASE,
RT5645_DA1_ZDET_SFT, rt5645_dac1_vol_ctrl_mode_text);
static const struct snd_kcontrol_new rt5645_snd_controls[] = {
/* Speaker Output Volume */
SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, snd_soc_get_volsw,
rt5645_spk_put_volsw, out_vol_tlv),
/* ClassD modulator Speaker Gain Ratio */
SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO,
RT5645_SPK_G_CLSD_SFT, 7, 0, spk_clsd_tlv),
/* Headphone Output Volume */
SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL,
RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL,
RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
/* OUTPUT Control */
SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
/* DAC Digital Volume */
SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 87, 0, dac_vol_tlv),
/* IN1/IN2 Control */
SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
RT5645_BST_SFT1, 12, 0, bst_tlv),
SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
RT5645_BST_SFT2, 8, 0, bst_tlv),
/* INL/INR Volume Control */
SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
/* ADC Digital Volume Control */
SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
RT5645_L_VOL_SFT + 1, RT5645_R_VOL_SFT + 1, 63, 0, adc_vol_tlv),
/* ADC Boost Volume Control */
SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1,
RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
adc_bst_tlv),
SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2,
RT5645_MONO_ADC_L_BST_SFT, RT5645_MONO_ADC_R_BST_SFT, 3, 0,
adc_bst_tlv),
/* I2S2 function select */
SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
1, 1),
RT5645_HWEQ("Speaker HWEQ"),
/* Digital Soft Volume Control */
SOC_ENUM("DAC1 Digital Volume Control Func", rt5645_dac1_vol_ctrl_mode),
};
/**
* set_dmic_clk - Set parameter of dmic.
*
* @w: DAPM widget.
* @kcontrol: The kcontrol of this widget.
* @event: Event id.
*
*/
static int set_dmic_clk(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
int idx, rate;
rate = rt5645->sysclk / rl6231_get_pre_div(rt5645->regmap,
RT5645_ADDA_CLK1, RT5645_I2S_PD1_SFT);
idx = rl6231_calc_dmic_clk(rate);
if (idx < 0)
dev_err(component->dev, "Failed to set DMIC clock\n");
else
snd_soc_component_update_bits(component, RT5645_DMIC_CTRL1,
RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
return idx;
}
static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
unsigned int val;
val = snd_soc_component_read(component, RT5645_GLB_CLK);
val &= RT5645_SCLK_SRC_MASK;
if (val == RT5645_SCLK_SRC_PLL1)
return 1;
else
return 0;
}
static int is_using_asrc(struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
unsigned int reg, shift, val;
switch (source->shift) {
case 0:
reg = RT5645_ASRC_3;
shift = 0;
break;
case 1:
reg = RT5645_ASRC_3;
shift = 4;
break;
case 3:
reg = RT5645_ASRC_2;
shift = 0;
break;
case 8:
reg = RT5645_ASRC_2;
shift = 4;
break;
case 9:
reg = RT5645_ASRC_2;
shift = 8;
break;
case 10:
reg = RT5645_ASRC_2;
shift = 12;
break;
default:
return 0;
}
val = (snd_soc_component_read(component, reg) >> shift) & 0xf;
switch (val) {
case 1:
case 2:
case 3:
case 4:
return 1;
default:
return 0;
}
}
static int rt5645_enable_hweq(struct snd_soc_component *component)
{
struct rt5645_priv *rt5645 = snd_soc_component_get_drvdata(component);
int i;
for (i = 0; i < RT5645_HWEQ_NUM; i++) {
if (rt5645_validate_hweq(rt5645->eq_param[i].reg))
regmap_write(rt5645->regmap, rt5645->eq_param[i].reg,
rt5645->eq_param[i].val);
else
break;
}
return 0;
}
/**
* rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
* @component: SoC audio component device.
* @filter_mask: mask of filters.
* @clk_src: clock source
*
* The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
* only support standard 32fs or 64fs i2s format, ASRC should be enabled to
* support special i2s clock format such as Intel's 100fs(100 * sampling rate).
* ASRC function will track i2s clock and generate a corresponding system clock
* for codec. This function provides an API to select the clock source for a
* set of filters specified by the mask. And the codec driver will turn on ASRC
* for these filters if ASRC is selected as their clock source.
*/
int rt5645_sel_asrc_clk_src(struct snd_soc_component *component,
unsigned int filter_mask, unsigned int clk_src)
{
unsigned int asrc2_mask = 0;
unsigned int asrc2_value = 0;
unsigned int asrc3_mask = 0;
unsigned int asrc3_value = 0;
switch (clk_src) {
case RT5645_CLK_SEL_SYS:
case RT5645_CLK_SEL_I2S1_ASRC:
case RT5645_CLK_SEL_I2S2_ASRC:
case RT5645_CLK_SEL_SYS2:
break;
default:
return -EINVAL;
}
if (filter_mask & RT5645_DA_STEREO_FILTER) {
asrc2_mask |= RT5645_DA_STO_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5645_DA_STO_CLK_SEL_MASK)
| (clk_src << RT5645_DA_STO_CLK_SEL_SFT);
}
if (filter_mask & RT5645_DA_MONO_L_FILTER) {
asrc2_mask |= RT5645_DA_MONOL_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5645_DA_MONOL_CLK_SEL_MASK)
| (clk_src << RT5645_DA_MONOL_CLK_SEL_SFT);
}
if (filter_mask & RT5645_DA_MONO_R_FILTER) {
asrc2_mask |= RT5645_DA_MONOR_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5645_DA_MONOR_CLK_SEL_MASK)
| (clk_src << RT5645_DA_MONOR_CLK_SEL_SFT);
}
if (filter_mask & RT5645_AD_STEREO_FILTER) {
asrc2_mask |= RT5645_AD_STO1_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5645_AD_STO1_CLK_SEL_MASK)
| (clk_src << RT5645_AD_STO1_CLK_SEL_SFT);
}
if (filter_mask & RT5645_AD_MONO_L_FILTER) {
asrc3_mask |= RT5645_AD_MONOL_CLK_SEL_MASK;
asrc3_value = (asrc3_value & ~RT5645_AD_MONOL_CLK_SEL_MASK)