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wm8995.c
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// SPDX-License-Identifier: GPL-2.0-only
/*
* wm8995.c -- WM8995 ALSA SoC Audio driver
*
* Copyright 2010 Wolfson Microelectronics plc
*
* Author: Dimitris Papastamos <[email protected]>
*
* Based on wm8994.c and wm_hubs.c by Mark Brown
*/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/spi/spi.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/soc-dapm.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include "wm8995.h"
#define WM8995_NUM_SUPPLIES 8
static const char *wm8995_supply_names[WM8995_NUM_SUPPLIES] = {
"DCVDD",
"DBVDD1",
"DBVDD2",
"DBVDD3",
"AVDD1",
"AVDD2",
"CPVDD",
"MICVDD"
};
static const struct reg_default wm8995_reg_defaults[] = {
{ 0, 0x8995 },
{ 5, 0x0100 },
{ 16, 0x000b },
{ 17, 0x000b },
{ 24, 0x02c0 },
{ 25, 0x02c0 },
{ 26, 0x02c0 },
{ 27, 0x02c0 },
{ 28, 0x000f },
{ 32, 0x0005 },
{ 33, 0x0005 },
{ 40, 0x0003 },
{ 41, 0x0013 },
{ 48, 0x0004 },
{ 56, 0x09f8 },
{ 64, 0x1f25 },
{ 69, 0x0004 },
{ 82, 0xaaaa },
{ 84, 0x2a2a },
{ 146, 0x0060 },
{ 256, 0x0002 },
{ 257, 0x8004 },
{ 520, 0x0010 },
{ 528, 0x0083 },
{ 529, 0x0083 },
{ 548, 0x0c80 },
{ 580, 0x0c80 },
{ 768, 0x4050 },
{ 769, 0x4000 },
{ 771, 0x0040 },
{ 772, 0x0040 },
{ 773, 0x0040 },
{ 774, 0x0004 },
{ 775, 0x0100 },
{ 784, 0x4050 },
{ 785, 0x4000 },
{ 787, 0x0040 },
{ 788, 0x0040 },
{ 789, 0x0040 },
{ 1024, 0x00c0 },
{ 1025, 0x00c0 },
{ 1026, 0x00c0 },
{ 1027, 0x00c0 },
{ 1028, 0x00c0 },
{ 1029, 0x00c0 },
{ 1030, 0x00c0 },
{ 1031, 0x00c0 },
{ 1056, 0x0200 },
{ 1057, 0x0010 },
{ 1058, 0x0200 },
{ 1059, 0x0010 },
{ 1088, 0x0098 },
{ 1089, 0x0845 },
{ 1104, 0x0098 },
{ 1105, 0x0845 },
{ 1152, 0x6318 },
{ 1153, 0x6300 },
{ 1154, 0x0fca },
{ 1155, 0x0400 },
{ 1156, 0x00d8 },
{ 1157, 0x1eb5 },
{ 1158, 0xf145 },
{ 1159, 0x0b75 },
{ 1160, 0x01c5 },
{ 1161, 0x1c58 },
{ 1162, 0xf373 },
{ 1163, 0x0a54 },
{ 1164, 0x0558 },
{ 1165, 0x168e },
{ 1166, 0xf829 },
{ 1167, 0x07ad },
{ 1168, 0x1103 },
{ 1169, 0x0564 },
{ 1170, 0x0559 },
{ 1171, 0x4000 },
{ 1184, 0x6318 },
{ 1185, 0x6300 },
{ 1186, 0x0fca },
{ 1187, 0x0400 },
{ 1188, 0x00d8 },
{ 1189, 0x1eb5 },
{ 1190, 0xf145 },
{ 1191, 0x0b75 },
{ 1192, 0x01c5 },
{ 1193, 0x1c58 },
{ 1194, 0xf373 },
{ 1195, 0x0a54 },
{ 1196, 0x0558 },
{ 1197, 0x168e },
{ 1198, 0xf829 },
{ 1199, 0x07ad },
{ 1200, 0x1103 },
{ 1201, 0x0564 },
{ 1202, 0x0559 },
{ 1203, 0x4000 },
{ 1280, 0x00c0 },
{ 1281, 0x00c0 },
{ 1282, 0x00c0 },
{ 1283, 0x00c0 },
{ 1312, 0x0200 },
{ 1313, 0x0010 },
{ 1344, 0x0098 },
{ 1345, 0x0845 },
{ 1408, 0x6318 },
{ 1409, 0x6300 },
{ 1410, 0x0fca },
{ 1411, 0x0400 },
{ 1412, 0x00d8 },
{ 1413, 0x1eb5 },
{ 1414, 0xf145 },
{ 1415, 0x0b75 },
{ 1416, 0x01c5 },
{ 1417, 0x1c58 },
{ 1418, 0xf373 },
{ 1419, 0x0a54 },
{ 1420, 0x0558 },
{ 1421, 0x168e },
{ 1422, 0xf829 },
{ 1423, 0x07ad },
{ 1424, 0x1103 },
{ 1425, 0x0564 },
{ 1426, 0x0559 },
{ 1427, 0x4000 },
{ 1568, 0x0002 },
{ 1792, 0xa100 },
{ 1793, 0xa101 },
{ 1794, 0xa101 },
{ 1795, 0xa101 },
{ 1796, 0xa101 },
{ 1797, 0xa101 },
{ 1798, 0xa101 },
{ 1799, 0xa101 },
{ 1800, 0xa101 },
{ 1801, 0xa101 },
{ 1802, 0xa101 },
{ 1803, 0xa101 },
{ 1804, 0xa101 },
{ 1805, 0xa101 },
{ 1825, 0x0055 },
{ 1848, 0x3fff },
{ 1849, 0x1fff },
{ 2049, 0x0001 },
{ 2050, 0x0069 },
{ 2056, 0x0002 },
{ 2057, 0x0003 },
{ 2058, 0x0069 },
{ 12288, 0x0001 },
{ 12289, 0x0001 },
{ 12291, 0x0006 },
{ 12292, 0x0040 },
{ 12293, 0x0001 },
{ 12294, 0x000f },
{ 12295, 0x0006 },
{ 12296, 0x0001 },
{ 12297, 0x0003 },
{ 12298, 0x0104 },
{ 12300, 0x0060 },
{ 12301, 0x0011 },
{ 12302, 0x0401 },
{ 12304, 0x0050 },
{ 12305, 0x0003 },
{ 12306, 0x0100 },
{ 12308, 0x0051 },
{ 12309, 0x0003 },
{ 12310, 0x0104 },
{ 12311, 0x000a },
{ 12312, 0x0060 },
{ 12313, 0x003b },
{ 12314, 0x0502 },
{ 12315, 0x0100 },
{ 12316, 0x2fff },
{ 12320, 0x2fff },
{ 12324, 0x2fff },
{ 12328, 0x2fff },
{ 12332, 0x2fff },
{ 12336, 0x2fff },
{ 12340, 0x2fff },
{ 12344, 0x2fff },
{ 12348, 0x2fff },
{ 12352, 0x0001 },
{ 12353, 0x0001 },
{ 12355, 0x0006 },
{ 12356, 0x0040 },
{ 12357, 0x0001 },
{ 12358, 0x000f },
{ 12359, 0x0006 },
{ 12360, 0x0001 },
{ 12361, 0x0003 },
{ 12362, 0x0104 },
{ 12364, 0x0060 },
{ 12365, 0x0011 },
{ 12366, 0x0401 },
{ 12368, 0x0050 },
{ 12369, 0x0003 },
{ 12370, 0x0100 },
{ 12372, 0x0060 },
{ 12373, 0x003b },
{ 12374, 0x0502 },
{ 12375, 0x0100 },
{ 12376, 0x2fff },
{ 12380, 0x2fff },
{ 12384, 0x2fff },
{ 12388, 0x2fff },
{ 12392, 0x2fff },
{ 12396, 0x2fff },
{ 12400, 0x2fff },
{ 12404, 0x2fff },
{ 12408, 0x2fff },
{ 12412, 0x2fff },
{ 12416, 0x0001 },
{ 12417, 0x0001 },
{ 12419, 0x0006 },
{ 12420, 0x0040 },
{ 12421, 0x0001 },
{ 12422, 0x000f },
{ 12423, 0x0006 },
{ 12424, 0x0001 },
{ 12425, 0x0003 },
{ 12426, 0x0106 },
{ 12428, 0x0061 },
{ 12429, 0x0011 },
{ 12430, 0x0401 },
{ 12432, 0x0050 },
{ 12433, 0x0003 },
{ 12434, 0x0102 },
{ 12436, 0x0051 },
{ 12437, 0x0003 },
{ 12438, 0x0106 },
{ 12439, 0x000a },
{ 12440, 0x0061 },
{ 12441, 0x003b },
{ 12442, 0x0502 },
{ 12443, 0x0100 },
{ 12444, 0x2fff },
{ 12448, 0x2fff },
{ 12452, 0x2fff },
{ 12456, 0x2fff },
{ 12460, 0x2fff },
{ 12464, 0x2fff },
{ 12468, 0x2fff },
{ 12472, 0x2fff },
{ 12476, 0x2fff },
{ 12480, 0x0001 },
{ 12481, 0x0001 },
{ 12483, 0x0006 },
{ 12484, 0x0040 },
{ 12485, 0x0001 },
{ 12486, 0x000f },
{ 12487, 0x0006 },
{ 12488, 0x0001 },
{ 12489, 0x0003 },
{ 12490, 0x0106 },
{ 12492, 0x0061 },
{ 12493, 0x0011 },
{ 12494, 0x0401 },
{ 12496, 0x0050 },
{ 12497, 0x0003 },
{ 12498, 0x0102 },
{ 12500, 0x0061 },
{ 12501, 0x003b },
{ 12502, 0x0502 },
{ 12503, 0x0100 },
{ 12504, 0x2fff },
{ 12508, 0x2fff },
{ 12512, 0x2fff },
{ 12516, 0x2fff },
{ 12520, 0x2fff },
{ 12524, 0x2fff },
{ 12528, 0x2fff },
{ 12532, 0x2fff },
{ 12536, 0x2fff },
{ 12540, 0x2fff },
{ 12544, 0x0060 },
{ 12546, 0x0601 },
{ 12548, 0x0050 },
{ 12550, 0x0100 },
{ 12552, 0x0001 },
{ 12554, 0x0104 },
{ 12555, 0x0100 },
{ 12556, 0x2fff },
{ 12560, 0x2fff },
{ 12564, 0x2fff },
{ 12568, 0x2fff },
{ 12572, 0x2fff },
{ 12576, 0x2fff },
{ 12580, 0x2fff },
{ 12584, 0x2fff },
{ 12588, 0x2fff },
{ 12592, 0x2fff },
{ 12596, 0x2fff },
{ 12600, 0x2fff },
{ 12604, 0x2fff },
{ 12608, 0x0061 },
{ 12610, 0x0601 },
{ 12612, 0x0050 },
{ 12614, 0x0102 },
{ 12616, 0x0001 },
{ 12618, 0x0106 },
{ 12619, 0x0100 },
{ 12620, 0x2fff },
{ 12624, 0x2fff },
{ 12628, 0x2fff },
{ 12632, 0x2fff },
{ 12636, 0x2fff },
{ 12640, 0x2fff },
{ 12644, 0x2fff },
{ 12648, 0x2fff },
{ 12652, 0x2fff },
{ 12656, 0x2fff },
{ 12660, 0x2fff },
{ 12664, 0x2fff },
{ 12668, 0x2fff },
{ 12672, 0x0060 },
{ 12674, 0x0601 },
{ 12676, 0x0061 },
{ 12678, 0x0601 },
{ 12680, 0x0050 },
{ 12682, 0x0300 },
{ 12684, 0x0001 },
{ 12686, 0x0304 },
{ 12688, 0x0040 },
{ 12690, 0x000f },
{ 12692, 0x0001 },
{ 12695, 0x0100 },
};
struct fll_config {
int src;
int in;
int out;
};
struct wm8995_priv {
struct regmap *regmap;
int sysclk[2];
int mclk[2];
int aifclk[2];
struct fll_config fll[2], fll_suspend[2];
struct regulator_bulk_data supplies[WM8995_NUM_SUPPLIES];
struct notifier_block disable_nb[WM8995_NUM_SUPPLIES];
struct snd_soc_component *component;
};
/*
* We can't use the same notifier block for more than one supply and
* there's no way I can see to get from a callback to the caller
* except container_of().
*/
#define WM8995_REGULATOR_EVENT(n) \
static int wm8995_regulator_event_##n(struct notifier_block *nb, \
unsigned long event, void *data) \
{ \
struct wm8995_priv *wm8995 = container_of(nb, struct wm8995_priv, \
disable_nb[n]); \
if (event & REGULATOR_EVENT_DISABLE) { \
regcache_mark_dirty(wm8995->regmap); \
} \
return 0; \
}
WM8995_REGULATOR_EVENT(0)
WM8995_REGULATOR_EVENT(1)
WM8995_REGULATOR_EVENT(2)
WM8995_REGULATOR_EVENT(3)
WM8995_REGULATOR_EVENT(4)
WM8995_REGULATOR_EVENT(5)
WM8995_REGULATOR_EVENT(6)
WM8995_REGULATOR_EVENT(7)
static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
static const DECLARE_TLV_DB_SCALE(in1lr_pga_tlv, -1650, 150, 0);
static const DECLARE_TLV_DB_SCALE(in1l_boost_tlv, 0, 600, 0);
static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 150, 0);
static const char *in1l_text[] = {
"Differential", "Single-ended IN1LN", "Single-ended IN1LP"
};
static SOC_ENUM_SINGLE_DECL(in1l_enum, WM8995_LEFT_LINE_INPUT_CONTROL,
2, in1l_text);
static const char *in1r_text[] = {
"Differential", "Single-ended IN1RN", "Single-ended IN1RP"
};
static SOC_ENUM_SINGLE_DECL(in1r_enum, WM8995_LEFT_LINE_INPUT_CONTROL,
0, in1r_text);
static const char *dmic_src_text[] = {
"DMICDAT1", "DMICDAT2", "DMICDAT3"
};
static SOC_ENUM_SINGLE_DECL(dmic_src1_enum, WM8995_POWER_MANAGEMENT_5,
8, dmic_src_text);
static SOC_ENUM_SINGLE_DECL(dmic_src2_enum, WM8995_POWER_MANAGEMENT_5,
6, dmic_src_text);
static const struct snd_kcontrol_new wm8995_snd_controls[] = {
SOC_DOUBLE_R_TLV("DAC1 Volume", WM8995_DAC1_LEFT_VOLUME,
WM8995_DAC1_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R("DAC1 Switch", WM8995_DAC1_LEFT_VOLUME,
WM8995_DAC1_RIGHT_VOLUME, 9, 1, 1),
SOC_DOUBLE_R_TLV("DAC2 Volume", WM8995_DAC2_LEFT_VOLUME,
WM8995_DAC2_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R("DAC2 Switch", WM8995_DAC2_LEFT_VOLUME,
WM8995_DAC2_RIGHT_VOLUME, 9, 1, 1),
SOC_DOUBLE_R_TLV("AIF1DAC1 Volume", WM8995_AIF1_DAC1_LEFT_VOLUME,
WM8995_AIF1_DAC1_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("AIF1DAC2 Volume", WM8995_AIF1_DAC2_LEFT_VOLUME,
WM8995_AIF1_DAC2_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("AIF2DAC Volume", WM8995_AIF2_DAC_LEFT_VOLUME,
WM8995_AIF2_DAC_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("IN1LR Volume", WM8995_LEFT_LINE_INPUT_1_VOLUME,
WM8995_RIGHT_LINE_INPUT_1_VOLUME, 0, 31, 0, in1lr_pga_tlv),
SOC_SINGLE_TLV("IN1L Boost", WM8995_LEFT_LINE_INPUT_CONTROL,
4, 3, 0, in1l_boost_tlv),
SOC_ENUM("IN1L Mode", in1l_enum),
SOC_ENUM("IN1R Mode", in1r_enum),
SOC_ENUM("DMIC1 SRC", dmic_src1_enum),
SOC_ENUM("DMIC2 SRC", dmic_src2_enum),
SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8995_DAC1_MIXER_VOLUMES, 0, 5,
24, 0, sidetone_tlv),
SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8995_DAC2_MIXER_VOLUMES, 0, 5,
24, 0, sidetone_tlv),
SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8995_AIF1_ADC1_LEFT_VOLUME,
WM8995_AIF1_ADC1_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8995_AIF1_ADC2_LEFT_VOLUME,
WM8995_AIF1_ADC2_RIGHT_VOLUME, 0, 96, 0, digital_tlv),
SOC_DOUBLE_R_TLV("AIF2ADC Volume", WM8995_AIF2_ADC_LEFT_VOLUME,
WM8995_AIF2_ADC_RIGHT_VOLUME, 0, 96, 0, digital_tlv)
};
static void wm8995_update_class_w(struct snd_soc_component *component)
{
int enable = 1;
int source = 0; /* GCC flow analysis can't track enable */
int reg, reg_r;
/* We also need the same setting for L/R and only one path */
reg = snd_soc_component_read(component, WM8995_DAC1_LEFT_MIXER_ROUTING);
switch (reg) {
case WM8995_AIF2DACL_TO_DAC1L:
dev_dbg(component->dev, "Class W source AIF2DAC\n");
source = 2 << WM8995_CP_DYN_SRC_SEL_SHIFT;
break;
case WM8995_AIF1DAC2L_TO_DAC1L:
dev_dbg(component->dev, "Class W source AIF1DAC2\n");
source = 1 << WM8995_CP_DYN_SRC_SEL_SHIFT;
break;
case WM8995_AIF1DAC1L_TO_DAC1L:
dev_dbg(component->dev, "Class W source AIF1DAC1\n");
source = 0 << WM8995_CP_DYN_SRC_SEL_SHIFT;
break;
default:
dev_dbg(component->dev, "DAC mixer setting: %x\n", reg);
enable = 0;
break;
}
reg_r = snd_soc_component_read(component, WM8995_DAC1_RIGHT_MIXER_ROUTING);
if (reg_r != reg) {
dev_dbg(component->dev, "Left and right DAC mixers different\n");
enable = 0;
}
if (enable) {
dev_dbg(component->dev, "Class W enabled\n");
snd_soc_component_update_bits(component, WM8995_CLASS_W_1,
WM8995_CP_DYN_PWR_MASK |
WM8995_CP_DYN_SRC_SEL_MASK,
source | WM8995_CP_DYN_PWR);
} else {
dev_dbg(component->dev, "Class W disabled\n");
snd_soc_component_update_bits(component, WM8995_CLASS_W_1,
WM8995_CP_DYN_PWR_MASK, 0);
}
}
static int check_clk_sys(struct snd_soc_dapm_widget *source,
struct snd_soc_dapm_widget *sink)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
unsigned int reg;
const char *clk;
reg = snd_soc_component_read(component, WM8995_CLOCKING_1);
/* Check what we're currently using for CLK_SYS */
if (reg & WM8995_SYSCLK_SRC)
clk = "AIF2CLK";
else
clk = "AIF1CLK";
return !strcmp(source->name, clk);
}
static int wm8995_put_class_w(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_component *component = snd_soc_dapm_kcontrol_component(kcontrol);
int ret;
ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
wm8995_update_class_w(component);
return ret;
}
static int hp_supply_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
/* Enable the headphone amp */
snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
WM8995_HPOUT1L_ENA_MASK |
WM8995_HPOUT1R_ENA_MASK,
WM8995_HPOUT1L_ENA |
WM8995_HPOUT1R_ENA);
/* Enable the second stage */
snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1,
WM8995_HPOUT1L_DLY_MASK |
WM8995_HPOUT1R_DLY_MASK,
WM8995_HPOUT1L_DLY |
WM8995_HPOUT1R_DLY);
break;
case SND_SOC_DAPM_PRE_PMD:
snd_soc_component_update_bits(component, WM8995_CHARGE_PUMP_1,
WM8995_CP_ENA_MASK, 0);
break;
}
return 0;
}
static void dc_servo_cmd(struct snd_soc_component *component,
unsigned int reg, unsigned int val, unsigned int mask)
{
int timeout = 10;
dev_dbg(component->dev, "%s: reg = %#x, val = %#x, mask = %#x\n",
__func__, reg, val, mask);
snd_soc_component_write(component, reg, val);
while (timeout--) {
msleep(10);
val = snd_soc_component_read(component, WM8995_DC_SERVO_READBACK_0);
if ((val & mask) == mask)
return;
}
dev_err(component->dev, "Timed out waiting for DC Servo\n");
}
static int hp_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
unsigned int reg;
reg = snd_soc_component_read(component, WM8995_ANALOGUE_HP_1);
switch (event) {
case SND_SOC_DAPM_POST_PMU:
snd_soc_component_update_bits(component, WM8995_CHARGE_PUMP_1,
WM8995_CP_ENA_MASK, WM8995_CP_ENA);
msleep(5);
snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
WM8995_HPOUT1L_ENA_MASK |
WM8995_HPOUT1R_ENA_MASK,
WM8995_HPOUT1L_ENA | WM8995_HPOUT1R_ENA);
udelay(20);
reg |= WM8995_HPOUT1L_DLY | WM8995_HPOUT1R_DLY;
snd_soc_component_write(component, WM8995_ANALOGUE_HP_1, reg);
snd_soc_component_write(component, WM8995_DC_SERVO_1, WM8995_DCS_ENA_CHAN_0 |
WM8995_DCS_ENA_CHAN_1);
dc_servo_cmd(component, WM8995_DC_SERVO_2,
WM8995_DCS_TRIG_STARTUP_0 |
WM8995_DCS_TRIG_STARTUP_1,
WM8995_DCS_TRIG_DAC_WR_0 |
WM8995_DCS_TRIG_DAC_WR_1);
reg |= WM8995_HPOUT1R_OUTP | WM8995_HPOUT1R_RMV_SHORT |
WM8995_HPOUT1L_OUTP | WM8995_HPOUT1L_RMV_SHORT;
snd_soc_component_write(component, WM8995_ANALOGUE_HP_1, reg);
break;
case SND_SOC_DAPM_PRE_PMD:
snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1,
WM8995_HPOUT1L_OUTP_MASK |
WM8995_HPOUT1R_OUTP_MASK |
WM8995_HPOUT1L_RMV_SHORT_MASK |
WM8995_HPOUT1R_RMV_SHORT_MASK, 0);
snd_soc_component_update_bits(component, WM8995_ANALOGUE_HP_1,
WM8995_HPOUT1L_DLY_MASK |
WM8995_HPOUT1R_DLY_MASK, 0);
snd_soc_component_write(component, WM8995_DC_SERVO_1, 0);
snd_soc_component_update_bits(component, WM8995_POWER_MANAGEMENT_1,
WM8995_HPOUT1L_ENA_MASK |
WM8995_HPOUT1R_ENA_MASK,
0);
break;
}
return 0;
}
static int configure_aif_clock(struct snd_soc_component *component, int aif)
{
struct wm8995_priv *wm8995;
int rate;
int reg1 = 0;
int offset;
wm8995 = snd_soc_component_get_drvdata(component);
if (aif)
offset = 4;
else
offset = 0;
switch (wm8995->sysclk[aif]) {
case WM8995_SYSCLK_MCLK1:
rate = wm8995->mclk[0];
break;
case WM8995_SYSCLK_MCLK2:
reg1 |= 0x8;
rate = wm8995->mclk[1];
break;
case WM8995_SYSCLK_FLL1:
reg1 |= 0x10;
rate = wm8995->fll[0].out;
break;
case WM8995_SYSCLK_FLL2:
reg1 |= 0x18;
rate = wm8995->fll[1].out;
break;
default:
return -EINVAL;
}
if (rate >= 13500000) {
rate /= 2;
reg1 |= WM8995_AIF1CLK_DIV;
dev_dbg(component->dev, "Dividing AIF%d clock to %dHz\n",
aif + 1, rate);
}
wm8995->aifclk[aif] = rate;
snd_soc_component_update_bits(component, WM8995_AIF1_CLOCKING_1 + offset,
WM8995_AIF1CLK_SRC_MASK | WM8995_AIF1CLK_DIV_MASK,
reg1);
return 0;
}
static int configure_clock(struct snd_soc_component *component)
{
struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
struct wm8995_priv *wm8995;
int change, new;
wm8995 = snd_soc_component_get_drvdata(component);
/* Bring up the AIF clocks first */
configure_aif_clock(component, 0);
configure_aif_clock(component, 1);
/*
* Then switch CLK_SYS over to the higher of them; a change
* can only happen as a result of a clocking change which can
* only be made outside of DAPM so we can safely redo the
* clocking.
*/
/* If they're equal it doesn't matter which is used */
if (wm8995->aifclk[0] == wm8995->aifclk[1])
return 0;
if (wm8995->aifclk[0] < wm8995->aifclk[1])
new = WM8995_SYSCLK_SRC;
else
new = 0;
change = snd_soc_component_update_bits(component, WM8995_CLOCKING_1,
WM8995_SYSCLK_SRC_MASK, new);
if (!change)
return 0;
snd_soc_dapm_sync(dapm);
return 0;
}
static int clk_sys_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol, int event)
{
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
return configure_clock(component);
case SND_SOC_DAPM_POST_PMD:
configure_clock(component);
break;
}
return 0;
}
static const char *sidetone_text[] = {
"ADC/DMIC1", "DMIC2",
};
static SOC_ENUM_SINGLE_DECL(sidetone1_enum, WM8995_SIDETONE, 0, sidetone_text);
static const struct snd_kcontrol_new sidetone1_mux =
SOC_DAPM_ENUM("Left Sidetone Mux", sidetone1_enum);
static SOC_ENUM_SINGLE_DECL(sidetone2_enum, WM8995_SIDETONE, 1, sidetone_text);
static const struct snd_kcontrol_new sidetone2_mux =
SOC_DAPM_ENUM("Right Sidetone Mux", sidetone2_enum);
static const struct snd_kcontrol_new aif1adc1l_mix[] = {
SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8995_AIF1_ADC1_LEFT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC1_LEFT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new aif1adc1r_mix[] = {
SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8995_AIF1_ADC1_RIGHT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC1_RIGHT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new aif1adc2l_mix[] = {
SOC_DAPM_SINGLE("DMIC Switch", WM8995_AIF1_ADC2_LEFT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC2_LEFT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new aif1adc2r_mix[] = {
SOC_DAPM_SINGLE("DMIC Switch", WM8995_AIF1_ADC2_RIGHT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC2_RIGHT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new dac1l_mix[] = {
WM8995_CLASS_W_SWITCH("Right Sidetone Switch", WM8995_DAC1_LEFT_MIXER_ROUTING,
5, 1, 0),
WM8995_CLASS_W_SWITCH("Left Sidetone Switch", WM8995_DAC1_LEFT_MIXER_ROUTING,
4, 1, 0),
WM8995_CLASS_W_SWITCH("AIF2 Switch", WM8995_DAC1_LEFT_MIXER_ROUTING,
2, 1, 0),
WM8995_CLASS_W_SWITCH("AIF1.2 Switch", WM8995_DAC1_LEFT_MIXER_ROUTING,
1, 1, 0),
WM8995_CLASS_W_SWITCH("AIF1.1 Switch", WM8995_DAC1_LEFT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new dac1r_mix[] = {
WM8995_CLASS_W_SWITCH("Right Sidetone Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING,
5, 1, 0),
WM8995_CLASS_W_SWITCH("Left Sidetone Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING,
4, 1, 0),
WM8995_CLASS_W_SWITCH("AIF2 Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING,
2, 1, 0),
WM8995_CLASS_W_SWITCH("AIF1.2 Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING,
1, 1, 0),
WM8995_CLASS_W_SWITCH("AIF1.1 Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new aif2dac2l_mix[] = {
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8995_DAC2_LEFT_MIXER_ROUTING,
5, 1, 0),
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8995_DAC2_LEFT_MIXER_ROUTING,
4, 1, 0),
SOC_DAPM_SINGLE("AIF2 Switch", WM8995_DAC2_LEFT_MIXER_ROUTING,
2, 1, 0),
SOC_DAPM_SINGLE("AIF1.2 Switch", WM8995_DAC2_LEFT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("AIF1.1 Switch", WM8995_DAC2_LEFT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new aif2dac2r_mix[] = {
SOC_DAPM_SINGLE("Right Sidetone Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING,
5, 1, 0),
SOC_DAPM_SINGLE("Left Sidetone Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING,
4, 1, 0),
SOC_DAPM_SINGLE("AIF2 Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING,
2, 1, 0),
SOC_DAPM_SINGLE("AIF1.2 Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING,
1, 1, 0),
SOC_DAPM_SINGLE("AIF1.1 Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING,
0, 1, 0),
};
static const struct snd_kcontrol_new in1l_pga =
SOC_DAPM_SINGLE("IN1L Switch", WM8995_POWER_MANAGEMENT_2, 5, 1, 0);
static const struct snd_kcontrol_new in1r_pga =
SOC_DAPM_SINGLE("IN1R Switch", WM8995_POWER_MANAGEMENT_2, 4, 1, 0);
static const char *adc_mux_text[] = {
"ADC",
"DMIC",
};
static SOC_ENUM_SINGLE_VIRT_DECL(adc_enum, adc_mux_text);
static const struct snd_kcontrol_new adcl_mux =
SOC_DAPM_ENUM("ADCL Mux", adc_enum);
static const struct snd_kcontrol_new adcr_mux =
SOC_DAPM_ENUM("ADCR Mux", adc_enum);
static const char *spk_src_text[] = {
"DAC1L", "DAC1R", "DAC2L", "DAC2R"
};
static SOC_ENUM_SINGLE_DECL(spk1l_src_enum, WM8995_LEFT_PDM_SPEAKER_1,
0, spk_src_text);
static SOC_ENUM_SINGLE_DECL(spk1r_src_enum, WM8995_RIGHT_PDM_SPEAKER_1,
0, spk_src_text);
static SOC_ENUM_SINGLE_DECL(spk2l_src_enum, WM8995_LEFT_PDM_SPEAKER_2,
0, spk_src_text);
static SOC_ENUM_SINGLE_DECL(spk2r_src_enum, WM8995_RIGHT_PDM_SPEAKER_2,
0, spk_src_text);
static const struct snd_kcontrol_new spk1l_mux =
SOC_DAPM_ENUM("SPK1L SRC", spk1l_src_enum);
static const struct snd_kcontrol_new spk1r_mux =
SOC_DAPM_ENUM("SPK1R SRC", spk1r_src_enum);
static const struct snd_kcontrol_new spk2l_mux =
SOC_DAPM_ENUM("SPK2L SRC", spk2l_src_enum);
static const struct snd_kcontrol_new spk2r_mux =
SOC_DAPM_ENUM("SPK2R SRC", spk2r_src_enum);
static const struct snd_soc_dapm_widget wm8995_dapm_widgets[] = {
SND_SOC_DAPM_INPUT("DMIC1DAT"),
SND_SOC_DAPM_INPUT("DMIC2DAT"),
SND_SOC_DAPM_INPUT("IN1L"),
SND_SOC_DAPM_INPUT("IN1R"),
SND_SOC_DAPM_MIXER("IN1L PGA", SND_SOC_NOPM, 0, 0,
&in1l_pga, 1),
SND_SOC_DAPM_MIXER("IN1R PGA", SND_SOC_NOPM, 0, 0,
&in1r_pga, 1),
SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8995_POWER_MANAGEMENT_1, 8, 0,
NULL, 0),
SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8995_POWER_MANAGEMENT_1, 9, 0,
NULL, 0),
SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8995_AIF1_CLOCKING_1, 0, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8995_AIF2_CLOCKING_1, 0, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8995_CLOCKING_1, 3, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8995_CLOCKING_1, 2, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("SYSDSPCLK", WM8995_CLOCKING_1, 1, 0, NULL, 0),
SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,
SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", "AIF1 Capture", 0,
WM8995_POWER_MANAGEMENT_3, 9, 0),
SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", "AIF1 Capture", 0,
WM8995_POWER_MANAGEMENT_3, 8, 0),
SND_SOC_DAPM_AIF_OUT("AIF1ADCDAT", "AIF1 Capture", 0,
SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", "AIF1 Capture",
0, WM8995_POWER_MANAGEMENT_3, 11, 0),
SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", "AIF1 Capture",
0, WM8995_POWER_MANAGEMENT_3, 10, 0),
SND_SOC_DAPM_MUX("ADCL Mux", SND_SOC_NOPM, 1, 0, &adcl_mux),
SND_SOC_DAPM_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0, &adcr_mux),
SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8995_POWER_MANAGEMENT_3, 5, 0),
SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8995_POWER_MANAGEMENT_3, 4, 0),
SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8995_POWER_MANAGEMENT_3, 3, 0),
SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8995_POWER_MANAGEMENT_3, 2, 0),
SND_SOC_DAPM_ADC("ADCL", NULL, WM8995_POWER_MANAGEMENT_3, 1, 0),
SND_SOC_DAPM_ADC("ADCR", NULL, WM8995_POWER_MANAGEMENT_3, 0, 0),
SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0,
aif1adc1l_mix, ARRAY_SIZE(aif1adc1l_mix)),
SND_SOC_DAPM_MIXER("AIF1ADC1R Mixer", SND_SOC_NOPM, 0, 0,
aif1adc1r_mix, ARRAY_SIZE(aif1adc1r_mix)),
SND_SOC_DAPM_MIXER("AIF1ADC2L Mixer", SND_SOC_NOPM, 0, 0,
aif1adc2l_mix, ARRAY_SIZE(aif1adc2l_mix)),
SND_SOC_DAPM_MIXER("AIF1ADC2R Mixer", SND_SOC_NOPM, 0, 0,
aif1adc2r_mix, ARRAY_SIZE(aif1adc2r_mix)),
SND_SOC_DAPM_AIF_IN("AIF1DAC1L", NULL, 0, WM8995_POWER_MANAGEMENT_4,
9, 0),
SND_SOC_DAPM_AIF_IN("AIF1DAC1R", NULL, 0, WM8995_POWER_MANAGEMENT_4,
8, 0),
SND_SOC_DAPM_AIF_IN("AIF1DACDAT", "AIF1 Playback", 0, SND_SOC_NOPM,
0, 0),
SND_SOC_DAPM_AIF_IN("AIF1DAC2L", NULL, 0, WM8995_POWER_MANAGEMENT_4,
11, 0),
SND_SOC_DAPM_AIF_IN("AIF1DAC2R", NULL, 0, WM8995_POWER_MANAGEMENT_4,
10, 0),
SND_SOC_DAPM_MIXER("AIF2DAC2L Mixer", SND_SOC_NOPM, 0, 0,
aif2dac2l_mix, ARRAY_SIZE(aif2dac2l_mix)),
SND_SOC_DAPM_MIXER("AIF2DAC2R Mixer", SND_SOC_NOPM, 0, 0,
aif2dac2r_mix, ARRAY_SIZE(aif2dac2r_mix)),
SND_SOC_DAPM_DAC("DAC2L", NULL, WM8995_POWER_MANAGEMENT_4, 3, 0),
SND_SOC_DAPM_DAC("DAC2R", NULL, WM8995_POWER_MANAGEMENT_4, 2, 0),
SND_SOC_DAPM_DAC("DAC1L", NULL, WM8995_POWER_MANAGEMENT_4, 1, 0),
SND_SOC_DAPM_DAC("DAC1R", NULL, WM8995_POWER_MANAGEMENT_4, 0, 0),
SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0, dac1l_mix,
ARRAY_SIZE(dac1l_mix)),
SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0, dac1r_mix,
ARRAY_SIZE(dac1r_mix)),
SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &sidetone1_mux),
SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &sidetone2_mux),
SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0,
hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0,
hp_supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),