soc: Rename reserved function names

pfl · nashif · commit fd42bf7443cb · 2019-04-03T17:31:00.000-04:00
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt &lt;patrik.flykt@intel.com&gt;
diff --git a/arch/arm/include/cortex_m/exc.h b/arch/arm/include/cortex_m/exc.h
@@ -144,7 +144,7 @@ static ALWAYS_INLINE void z_ExcSetup(void)
  *
  * @return N/A
  */
-static ALWAYS_INLINE void _ClearFaults(void)
+static ALWAYS_INLINE void z_clearfaults(void)
 {
 #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)
 #elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)
diff --git a/drivers/pinmux/pinmux_esp32.c b/drivers/pinmux/pinmux_esp32.c
@@ -112,7 +112,7 @@ static int pinmux_pullup(struct device *dev, u32_t pin, u8_t func)
 	return -EINVAL;
 }
 
-#define CFG(id)   ((GPIO_ ## id ## _REG) & 0xff)
+#define CFG(id)   ((GPIO_ ## id ## Z_REG) & 0xff)
 static int pinmux_input(struct device *dev, u32_t pin, u8_t func)
 {
 	static const u8_t offs[2][3] = {
diff --git a/soc/arc/quark_se_c1000_ss/power.c b/soc/arc/quark_se_c1000_ss/power.c
@@ -18,20 +18,20 @@
 #include "vreg.h"
 
 #if (defined(CONFIG_SYS_POWER_DEEP_SLEEP_STATES))
-extern void _power_soc_sleep(void);
-extern void _power_soc_deep_sleep(void);
-extern void _power_soc_lpss_mode(void);
+extern void z_power_soc_sleep(void);
+extern void z_power_soc_deep_sleep(void);
+extern void z_power_soc_lpss_mode(void);
 
-static void _deep_sleep(enum power_states state)
+static void deep_sleep(enum power_states state)
 {
 	qm_power_soc_set_ss_restore_flag();
 
 	switch (state) {
 	case SYS_POWER_STATE_DEEP_SLEEP_2:
-		_power_soc_sleep();
+		z_power_soc_sleep();
 		break;
 	case SYS_POWER_STATE_DEEP_SLEEP_3:
-		_power_soc_deep_sleep();
+		z_power_soc_deep_sleep();
 		break;
 	default:
 		break;
@@ -54,11 +54,11 @@ void sys_set_power_state(enum power_states state)
 	case SYS_POWER_STATE_DEEP_SLEEP_1:
 		qm_ss_power_soc_lpss_enable();
 		qm_power_soc_set_ss_restore_flag();
-		_power_soc_lpss_mode();
+		z_power_soc_lpss_mode();
 		break;
 	case SYS_POWER_STATE_DEEP_SLEEP_2:
 	case SYS_POWER_STATE_DEEP_SLEEP_3:
-		_deep_sleep(state);
+		deep_sleep(state);
 		break;
 #endif
 	default:
@@ -90,7 +90,7 @@ void _sys_pm_power_state_exit_post_ops(enum power_states state)
 		 * its execution.
 		 */
 		if ((QM_SCSS_GP->gp0 & GP0_BIT_SLEEP_READY) == 0) {
-			_quark_se_ss_ready();
+			z_quark_se_ss_ready();
 			__builtin_arc_seti(0);
 		} else {
 			QM_SCSS_GP->gp0 &= ~GP0_BIT_SLEEP_READY;
diff --git a/soc/arc/quark_se_c1000_ss/soc.c b/soc/arc/quark_se_c1000_ss/soc.c
@@ -24,7 +24,7 @@ static int quark_se_arc_init(struct device *arg)
 {
 	ARG_UNUSED(arg);
 
-	_quark_se_ss_ready();
+	quark_se_ss_ready();
 
 	return 0;
 }
diff --git a/soc/arc/quark_se_c1000_ss/soc.h b/soc/arc/quark_se_c1000_ss/soc.h
@@ -201,7 +201,7 @@
 #define DT_RTC_0_IRQ_FLAGS			(IOAPIC_EDGE | IOAPIC_HIGH)
 
 
-static inline void _quark_se_ss_ready(void)
+static inline void quark_se_ss_ready(void)
 {
 	shared_data->flags |= ARC_READY;
 }
diff --git a/soc/arc/quark_se_c1000_ss/soc_power.S b/soc/arc/quark_se_c1000_ss/soc_power.S
@@ -11,11 +11,11 @@
 #ifdef CONFIG_SYS_POWER_DEEP_SLEEP_STATES
 GDATA(_pm_arc_context)
 
-GTEXT(_sys_resume_from_deep_sleep)
-GTEXT(_power_restore_cpu_context)
-GTEXT(_power_soc_sleep)
-GTEXT(_power_soc_deep_sleep)
-GTEXT(_power_soc_lpss_mode)
+GTEXT(sys_resume_from_deep_sleep)
+GTEXT(z_power_restore_cpu_context)
+GTEXT(z_power_soc_sleep)
+GTEXT(z_power_soc_deep_sleep)
+GTEXT(z_power_soc_lpss_mode)
 
 #define GPS0_REGISTER  0xb0800100
 #define GP0_REGISTER 0xb0800114
@@ -47,7 +47,7 @@ SECTION_FUNC(TEXT, save_cpu_context)
 
 	j_s [blink] /* Jump to context of BLINK register. */
 
-SECTION_FUNC(TEXT, _power_soc_sleep)
+SECTION_FUNC(TEXT, z_power_soc_sleep)
 	/*
 	 * Save the return address.
 	 * The restore function will pop this and jump
@@ -60,7 +60,7 @@ SECTION_FUNC(TEXT, _power_soc_sleep)
 	j @qm_power_soc_sleep
 	/* Does not return */
 
-SECTION_FUNC(TEXT, _power_soc_deep_sleep)
+SECTION_FUNC(TEXT, z_power_soc_deep_sleep)
 	/*
 	 * Save the return address.
 	 * The restore function will pop this and jump
@@ -73,7 +73,7 @@ SECTION_FUNC(TEXT, _power_soc_deep_sleep)
 	j @qm_power_soc_deep_sleep
 	/* Does not return */
 
-SECTION_FUNC(TEXT, _power_soc_lpss_mode)
+SECTION_FUNC(TEXT, z_power_soc_lpss_mode)
 	/*
 	 * Setup 'sleep' instruction operand.
 	 */
diff --git a/soc/arm/atmel_sam/sam3x/soc.c b/soc/arm/atmel_sam/sam3x/soc.c
@@ -209,7 +209,7 @@ static int atmel_sam3x_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/*
 	 * Set FWS (Flash Wait State) value before increasing Master Clock
diff --git a/soc/arm/atmel_sam/sam4s/soc.c b/soc/arm/atmel_sam/sam4s/soc.c
@@ -197,7 +197,7 @@ static int atmel_sam4s_init(struct device *arg)
 	key = irq_lock();
 
 	/* Clear all faults. */
-	_ClearFaults();
+	z_clearfaults();
 
 	/*
 	 * Set FWS (Flash Wait State) value before increasing Master Clock
diff --git a/soc/arm/atmel_sam/same70/soc.c b/soc/arm/atmel_sam/same70/soc.c
@@ -234,7 +234,7 @@ static int atmel_same70_init(struct device *arg)
 	}
 
 	/* Clear all faults */
-	_ClearFaults();
+	z_clearfaults();
 
 	/*
 	 * Set FWS (Flash Wait State) value before increasing Master Clock
diff --git a/soc/arm/atmel_sam0/samd20/soc.c b/soc/arm/atmel_sam0/samd20/soc.c
@@ -172,7 +172,7 @@ static int atmel_samd_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	flash_waitstates_init();
 	osc8m_init();
diff --git a/soc/arm/atmel_sam0/samd21/soc.c b/soc/arm/atmel_sam0/samd21/soc.c
@@ -173,7 +173,7 @@ static int atmel_samd_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	flash_waitstates_init();
 	osc8m_init();
diff --git a/soc/arm/nordic_nrf/nrf52/soc.c b/soc/arm/nordic_nrf/nrf52/soc.c
@@ -69,7 +69,7 @@ static int nordicsemi_nrf52_init(struct device *arg)
 	nrf_power_dcdcen_set(true);
 #endif
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	* if configured in the kernel, NOP otherwise
diff --git a/soc/arm/nordic_nrf/nrf91/soc.c b/soc/arm/nordic_nrf/nrf91/soc.c
@@ -50,7 +50,7 @@ static int nordicsemi_nrf91_init(struct device *arg)
 	NRF_NVMC->ICACHECNF = NVMC_ICACHECNF_CACHEEN_Msk;
 #endif
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	* if configured in the kernel, NOP otherwise
diff --git a/soc/arm/nxp_imx/mcimx6x_m4/soc.c b/soc/arm/nxp_imx/mcimx6x_m4/soc.c
@@ -187,7 +187,7 @@ static int mcimx6x_m4_init(struct device *arg)
 	/* Initialize Cache */
 	SOC_CacheInit();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Initialize clock */
 	SOC_ClockInit();
diff --git a/soc/arm/nxp_imx/rt/soc.c b/soc/arm/nxp_imx/rt/soc.c
@@ -210,7 +210,7 @@ static int imxrt_init(struct device *arg)
 		SCB_EnableDCache();
 	}
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Initialize system clock */
 	clkInit();
diff --git a/soc/arm/nxp_kinetis/k6x/soc.c b/soc/arm/nxp_kinetis/k6x/soc.c
@@ -180,7 +180,7 @@ static int fsl_frdm_k64f_init(struct device *arg)
 	SYSMPU->CESR = temp_reg;
 #endif /* !CONFIG_ARM_MPU */
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Initialize PLL/system clock to 120 MHz */
 	clkInit();
diff --git a/soc/arm/nxp_kinetis/kwx/soc_kw2xd.c b/soc/arm/nxp_kinetis/kwx/soc_kw2xd.c
@@ -189,7 +189,7 @@ static int kw2xd_init(struct device *arg)
 	/* release I/O power hold to allow normal run state */
 	PMC->REGSC |= PMC_REGSC_ACKISO_MASK;
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Initialize PLL/system clock to 48 MHz */
 	clkInit();
diff --git a/soc/arm/nxp_lpc/lpc54xxx/soc.c b/soc/arm/nxp_lpc/lpc54xxx/soc.c
@@ -87,7 +87,7 @@ static int nxp_lpc54114_init(struct device *arg)
 	/* disable interrupts */
 	oldLevel = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Initialize FRO/system clock to 48 MHz */
 	clkInit();
diff --git a/soc/arm/silabs_exx32/common/soc.c b/soc/arm/silabs_exx32/common/soc.c
@@ -119,7 +119,7 @@ static int silabs_exx32_init(struct device *arg)
 	/* handle chip errata */
 	CHIP_Init();
 
-	_ClearFaults();
+	z_clearfaults();
 
 #ifdef CONFIG_SOC_GECKO_EMU_DCDC
 	dcdc_init();
diff --git a/soc/arm/st_stm32/stm32f0/soc.c b/soc/arm/st_stm32/stm32f0/soc.c
@@ -62,7 +62,7 @@ static int stm32f0_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32f1/soc.c b/soc/arm/st_stm32/stm32f1/soc.c
@@ -30,7 +30,7 @@ static int stm32f1_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32f2/soc.c b/soc/arm/st_stm32/stm32f2/soc.c
@@ -34,7 +34,7 @@ static int stm32f2_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32f3/soc.c b/soc/arm/st_stm32/stm32f3/soc.c
@@ -30,7 +30,7 @@ static int stm32f3_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32f4/soc.c b/soc/arm/st_stm32/stm32f4/soc.c
@@ -31,7 +31,7 @@ static int st_stm32f4_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32f7/soc.c b/soc/arm/st_stm32/stm32f7/soc.c
@@ -37,7 +37,7 @@ static int st_stm32f7_init(struct device *arg)
 		SCB_EnableDCache();
 	}
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32l0/soc.c b/soc/arm/st_stm32/stm32l0/soc.c
@@ -32,7 +32,7 @@ static int stm32l0_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/st_stm32/stm32l4/soc.c b/soc/arm/st_stm32/stm32l4/soc.c
@@ -31,7 +31,7 @@ static int stm32l4_init(struct device *arg)
 
 	key = irq_lock();
 
-	_ClearFaults();
+	z_clearfaults();
 
 	/* Install default handler that simply resets the CPU
 	 * if configured in the kernel, NOP otherwise
diff --git a/soc/arm/ti_lm3s6965/reboot.S b/soc/arm/ti_lm3s6965/reboot.S
@@ -13,8 +13,8 @@ _ASM_FILE_PROLOGUE
 
 GDATA(_interrupt_stack)
 
-GTEXT(_do_software_reboot)
-SECTION_FUNC(TEXT,_do_software_reboot)
+GTEXT(z_do_software_reboot)
+SECTION_FUNC(TEXT,z_do_software_reboot)
 
 	eors r0, r0
 
@@ -26,8 +26,8 @@ SECTION_FUNC(TEXT,_do_software_reboot)
 	bx r0
 
 
-GTEXT(_force_exit_one_nested_irq)
-SECTION_FUNC(TEXT,_force_exit_one_nested_irq)
+GTEXT(z_force_exit_one_nested_irq)
+SECTION_FUNC(TEXT,z_force_exit_one_nested_irq)
 
 	ldr r0, =_SCS_ICSR_RETTOBASE
 	ldr r1, =_SCS_ICSR
@@ -41,9 +41,9 @@ SECTION_FUNC(TEXT,_force_exit_one_nested_irq)
 	*/
 	ittee eq
 		ldreq lr, =0xfffffff1
-		ldreq r2, =_force_exit_one_nested_irq
+		ldreq r2, =z_force_exit_one_nested_irq
 		ldrne lr, =0xfffffffd
-		ldrne r2, =_do_software_reboot
+		ldrne r2, =z_do_software_reboot
 
 	ldr ip, =_interrupt_stack
 	add.w ip, ip, #(___esf_t_SIZEOF * 2) /* enough for a stack frame */
diff --git a/soc/arm/ti_lm3s6965/sys_arch_reboot.c b/soc/arm/ti_lm3s6965/sys_arch_reboot.c
@@ -28,19 +28,19 @@ void sys_arch_reboot(int type)
      * which address can _always_ be found in the vector table reset slot
      * located at address 0x4.
      */
-	extern void _do_software_reboot(void);
-	extern void _force_exit_one_nested_irq(void);
+	extern void z_do_software_reboot(void);
+	extern void z_force_exit_one_nested_irq(void);
 	/*
 	 * force enable interrupts locked via PRIMASK if somehow disabled: the
 	 * boot code does not enable them
 	 */
 	__asm__ volatile("cpsie i" :::);
 
 	if ((SCB->ICSR & SCB_ICSR_VECTACTIVE_Msk) == 0) {
-		_do_software_reboot();
+		z_do_software_reboot();
 	} else {
 		__asm__ volatile(
-			"ldr r0,  =_force_exit_one_nested_irq\n\t"
+			"ldr r0,  =z_force_exit_one_nested_irq\n\t"
 			"bx r0\n\t"
 			:::);
 	}
diff --git a/soc/x86/intel_quark/quark_se/power.c b/soc/x86/intel_quark/quark_se/power.c
diff --git a/soc/x86/intel_quark/quark_se/soc.c b/soc/x86/intel_quark/quark_se/soc.c
diff --git a/soc/x86/intel_quark/quark_se/soc.h b/soc/x86/intel_quark/quark_se/soc.h
diff --git a/soc/x86/intel_quark/quark_se/soc_power.S b/soc/x86/intel_quark/quark_se/soc_power.S
diff --git a/soc/xtensa/esp32/esp32-mp.c b/soc/xtensa/esp32/esp32-mp.c

Original file line number	Diff line number	Diff line change
`@@ -144,7 +144,7 @@ static ALWAYS_INLINE void z_ExcSetup(void)`
`144`	`144`	`*`
`145`	`145`	`* @return N/A`
`146`	`146`	`*/`
`147`		`-static ALWAYS_INLINE void _ClearFaults(void)`
	`147`	`+static ALWAYS_INLINE void z_clearfaults(void)`
`148`	`148`	`{`
`149`	`149`	`#if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE)`
`150`	`150`	`#elif defined(CONFIG_ARMV7_M_ARMV8_M_MAINLINE)`
Original file line number	Diff line number	Diff line change
`@@ -112,7 +112,7 @@ static int pinmux_pullup(struct device *dev, u32_t pin, u8_t func)`
`112`	`112`	`return -EINVAL;`
`113`	`113`	`}`
`114`	`114`
`115`		`-#define CFG(id) ((GPIO_ ## id ## _REG) & 0xff)`
	`115`	`+#define CFG(id) ((GPIO_ ## id ## Z_REG) & 0xff)`
`116`	`116`	`static int pinmux_input(struct device *dev, u32_t pin, u8_t func)`
`117`	`117`	`{`
`118`	`118`	`static const u8_t offs[2][3] = {`
Original file line number	Diff line number	Diff line change
`@@ -24,7 +24,7 @@ static int quark_se_arc_init(struct device *arg)`
`24`	`24`	`{`
`25`	`25`	`ARG_UNUSED(arg);`
`26`	`26`
`27`		`- _quark_se_ss_ready();`
	`27`	`+ quark_se_ss_ready();`
`28`	`28`
`29`	`29`	`return 0;`
`30`	`30`	`}`
Original file line number	Diff line number	Diff line change
`@@ -201,7 +201,7 @@`
`201`	`201`	`#define DT_RTC_0_IRQ_FLAGS (IOAPIC_EDGE \| IOAPIC_HIGH)`
`202`	`202`
`203`	`203`
`204`		`-static inline void _quark_se_ss_ready(void)`
	`204`	`+static inline void quark_se_ss_ready(void)`
`205`	`205`	`{`
`206`	`206`	`shared_data->flags \|= ARC_READY;`
`207`	`207`	`}`
Original file line number	Diff line number	Diff line change
`@@ -234,7 +234,7 @@ static int atmel_same70_init(struct device *arg)`
`234`	`234`	`}`
`235`	`235`
`236`	`236`	`/* Clear all faults */`
`237`		`- _ClearFaults();`
	`237`	`+ z_clearfaults();`
`238`	`238`
`239`	`239`	`/*`
`240`	`240`	`* Set FWS (Flash Wait State) value before increasing Master Clock`
Original file line number	Diff line number	Diff line change
`@@ -210,7 +210,7 @@ static int imxrt_init(struct device *arg)`
`210`	`210`	`SCB_EnableDCache();`
`211`	`211`	`}`
`212`	`212`
`213`		`- _ClearFaults();`
	`213`	`+ z_clearfaults();`
`214`	`214`
`215`	`215`	`/* Initialize system clock */`
`216`	`216`	`clkInit();`
Original file line number	Diff line number	Diff line change
`@@ -37,7 +37,7 @@ static int st_stm32f7_init(struct device *arg)`
`37`	`37`	`SCB_EnableDCache();`
`38`	`38`	`}`
`39`	`39`
`40`		`- _ClearFaults();`
	`40`	`+ z_clearfaults();`
`41`	`41`
`42`	`42`	`/* Install default handler that simply resets the CPU`
`43`	`43`	`* if configured in the kernel, NOP otherwise`