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jianghc724jianghc724
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x86: Remove AVX10.2 256 bit rounding support
Since we will support 512 bit on both P-core and E-core for AVX10, 256 bit rounding is not that useful because we currently have rounding feature directly on E-core now and no need to use 256-bit rounding as somehow a workaround. This patch will remove all the support and backport to Binutils 2.44. gas/ChangeLog: * NEWS: Mention support removal. * config/tc-i386.c (build_evex_prefix): Remove U bit encode. (check_VecOperands): Remove ymm check for rounding. (s_insn): Revise .insn comment. * testsuite/gas/i386/avx10_2-256-cvt-intel.d: Remove ymm rounding related test. * testsuite/gas/i386/avx10_2-256-cvt.d: Ditto. * testsuite/gas/i386/avx10_2-256-cvt.s: Ditto. * testsuite/gas/i386/avx10_2-256-miscs-intel.d: Ditto. * testsuite/gas/i386/avx10_2-256-miscs.d: Ditto. * testsuite/gas/i386/avx10_2-256-miscs.s: Ditto. * testsuite/gas/i386/avx10_2-256-satcvt-intel.d: Ditto. * testsuite/gas/i386/avx10_2-256-satcvt.d: Ditto. * testsuite/gas/i386/avx10_2-256-satcvt.s: Ditto. * testsuite/gas/i386/evex.d: Ditto. * testsuite/gas/i386/evex.s: Ditto. * testsuite/gas/i386/i386.exp: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-cvt-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-cvt.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-cvt.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-satcvt-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-satcvt.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-satcvt.s: Ditto. * testsuite/gas/i386/x86-64-evex.d: Ditto. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/avx10_2-rounding-intel.d: Removed. * testsuite/gas/i386/avx10_2-rounding-inval.l: Removed. * testsuite/gas/i386/avx10_2-rounding-inval.s: Removed. * testsuite/gas/i386/avx10_2-rounding.d: Removed. * testsuite/gas/i386/avx10_2-rounding.s: Removed. * testsuite/gas/i386/x86-64-avx10_2-rounding-intel.d: Removed. * testsuite/gas/i386/x86-64-avx10_2-rounding.d: Removed. * testsuite/gas/i386/x86-64-avx10_2-rounding.s: Removed. opcodes/ChangeLog: * i386-dis.c (struct instr_info): Remove U bit. (get_valid_dis386): Roll back to APX condition. * i386-opc.tbl: Remove ymm rounding support. * i386-tbl.h: Regenerated.
1 parent d7940ce commit fdb44fc

36 files changed

+93
-2826
lines changed

‎gas/NEWS

+3
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,8 @@
11
-*- text -*-
22

3+
* Support for x86 AVX10.2 256 bit rounding has been dropped, as all the
4+
hardware would directly support 512 bit vecotr width.
5+
36
* For RISC-V, stop generating mapping symbols $x and replace with $x<isa>. The
47
$x was defined to have the same ISA as previous $x<isa>, but now is defined
58
to have the same ISA as elf architecture attribute. Once used .option arch

‎gas/config/tc-i386.c

+8-15
Original file line numberDiff line numberDiff line change
@@ -4422,7 +4422,7 @@ static void
44224422
build_evex_prefix (void)
44234423
{
44244424
unsigned int register_specifier;
4425-
bool w, u;
4425+
bool w;
44264426
rex_byte vrex_used = 0;
44274427

44284428
/* Check register specifier. */
@@ -4545,12 +4545,10 @@ build_evex_prefix (void)
45454545
abort ();
45464546
}
45474547

4548-
u = i.rounding.type == rc_none || i.tm.opcode_modifier.evex != EVEX256;
4549-
45504548
/* The third byte of the EVEX prefix. */
45514549
i.vex.bytes[2] = ((w << 7)
45524550
| (register_specifier << 3)
4553-
| (u << 2)
4551+
| 4 /* Encode the U bit. */
45544552
| i.tm.opcode_modifier.opcodeprefix);
45554553

45564554
/* The fourth byte of the EVEX prefix. */
@@ -8824,19 +8822,14 @@ check_VecOperands (const insn_template *t)
88248822
return 1;
88258823
}
88268824

8827-
/* Non-EVEX.{LIG,512,256} forms need to have a ZMM or YMM register as at
8828-
least one operand. For YMM register or EVEX256, we will need AVX10.2
8829-
enabled. There's no need to check all operands, though: Either of the
8830-
last two operands will be of the right size in all relevant templates. */
8825+
/* Non-EVEX.{LIG,512} forms need to have a ZMM or YMM register as at
8826+
least one operand. There's no need to check all operands, though:
8827+
Either of the last two operands will be of the right size in all
8828+
relevant templates. */
88318829
if (t->opcode_modifier.evex != EVEXLIG
88328830
&& t->opcode_modifier.evex != EVEX512
8833-
&& (t->opcode_modifier.evex != EVEX256
8834-
|| !cpu_arch_flags.bitfield.cpuavx10_2)
88358831
&& !i.types[t->operands - 1].bitfield.zmmword
8836-
&& !i.types[t->operands - 2].bitfield.zmmword
8837-
&& ((!i.types[t->operands - 1].bitfield.ymmword
8838-
&& !i.types[t->operands - 2].bitfield.ymmword)
8839-
|| !cpu_arch_flags.bitfield.cpuavx10_2))
8832+
&& !i.types[t->operands - 2].bitfield.zmmword)
88408833
{
88418834
i.error = operand_size_mismatch;
88428835
return 1;
@@ -14032,7 +14025,7 @@ s_insn (int dummy ATTRIBUTE_UNUSED)
1403214025
{
1403314026
if (!i.tm.opcode_modifier.evex)
1403414027
{
14035-
/* Do _not_ consider AVX512VL / AVX10.2 here. */
14028+
/* Do _not_ consider AVX512VL here. */
1403614029
if (combined.bitfield.zmmword)
1403714030
i.tm.opcode_modifier.evex = EVEX512;
1403814031
else if (combined.bitfield.ymmword)

‎gas/testsuite/gas/i386/avx10_2-256-cvt-intel.d

-1
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,6 @@ Disassembly of section \.text:
1010
[a-f0-9]+ <_intel>:
1111
\s*[a-f0-9]+:\s*62 f2 55 08 67 f4\s+vcvt2ps2phx xmm6,xmm5,xmm4
1212
\s*[a-f0-9]+:\s*62 f2 55 28 67 f4\s+vcvt2ps2phx ymm6,ymm5,ymm4
13-
\s*[a-f0-9]+:\s*62 f2 51 18 67 f4\s+vcvt2ps2phx ymm6,ymm5,ymm4\{rn-sae\}
1413
\s*[a-f0-9]+:\s*62 f2 55 0f 67 b4 f4 00 00 00 10\s+vcvt2ps2phx xmm6\{k7\},xmm5,XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
1514
\s*[a-f0-9]+:\s*62 f2 55 18 67 31\s+vcvt2ps2phx xmm6,xmm5,DWORD BCST \[ecx\]
1615
\s*[a-f0-9]+:\s*62 f2 55 08 67 71 7f\s+vcvt2ps2phx xmm6,xmm5,XMMWORD PTR \[ecx\+0x7f0\]

‎gas/testsuite/gas/i386/avx10_2-256-cvt.d

-1
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,6 @@ Disassembly of section \.text:
88
0+ <_start>:
99
\s*[a-f0-9]+:\s*62 f2 55 08 67 f4\s+vcvt2ps2phx\s+%xmm4,%xmm5,%xmm6
1010
\s*[a-f0-9]+:\s*62 f2 55 28 67 f4\s+vcvt2ps2phx\s+%ymm4,%ymm5,%ymm6
11-
\s*[a-f0-9]+:\s*62 f2 51 18 67 f4\s+vcvt2ps2phx\s+\{rn-sae\},%ymm4,%ymm5,%ymm6
1211
\s*[a-f0-9]+:\s*62 f2 55 0f 67 b4 f4 00 00 00 10\s+vcvt2ps2phx\s+0x10000000\(%esp,%esi,8\),%xmm5,%xmm6\{%k7\}
1312
\s*[a-f0-9]+:\s*62 f2 55 18 67 31\s+vcvt2ps2phx\s+\(%ecx\)\{1to4\},%xmm5,%xmm6
1413
\s*[a-f0-9]+:\s*62 f2 55 08 67 71 7f\s+vcvt2ps2phx\s+0x7f0\(%ecx\),%xmm5,%xmm6

‎gas/testsuite/gas/i386/avx10_2-256-cvt.s

-2
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,6 @@
66
_start:
77
vcvt2ps2phx %xmm4, %xmm5, %xmm6
88
vcvt2ps2phx %ymm4, %ymm5, %ymm6
9-
vcvt2ps2phx {rn-sae}, %ymm4, %ymm5, %ymm6
109
vcvt2ps2phx 0x10000000(%esp, %esi, 8), %xmm5, %xmm6{%k7}
1110
vcvt2ps2phx (%ecx){1to4}, %xmm5, %xmm6
1211
vcvt2ps2phx 2032(%ecx), %xmm5, %xmm6
@@ -63,7 +62,6 @@ _intel:
6362
.intel_syntax noprefix
6463
vcvt2ps2phx xmm6, xmm5, xmm4
6564
vcvt2ps2phx ymm6, ymm5, ymm4
66-
vcvt2ps2phx ymm6, ymm5, ymm4, {rn-sae}
6765
vcvt2ps2phx xmm6{k7}, xmm5, XMMWORD PTR [esp+esi*8+0x10000000]
6866
vcvt2ps2phx xmm6, xmm5, DWORD PTR [ecx]{1to4}
6967
vcvt2ps2phx xmm6, xmm5, XMMWORD PTR [ecx+2032]

‎gas/testsuite/gas/i386/avx10_2-256-miscs-intel.d

-3
Original file line numberDiff line numberDiff line change
@@ -36,17 +36,14 @@ Disassembly of section \.text:
3636
\s*[a-f0-9]+:\s*62 f3 57 bf 52 72 80 7b\s+vminmaxbf16 ymm6\{k7\}\{z\},ymm5,WORD BCST \[edx-0x100\],0x7b
3737
\s*[a-f0-9]+:\s*62 f3 57 18 52 31 7b\s+vminmaxbf16 xmm6,xmm5,WORD BCST \[ecx\],0x7b
3838
\s*[a-f0-9]+:\s*62 f3 57 9f 52 72 80 7b\s+vminmaxbf16 xmm6\{k7\}\{z\},xmm5,WORD BCST \[edx-0x100\],0x7b
39-
\s*[a-f0-9]+:\s*62 f3 d1 18 52 f4 7b\s+vminmaxpd ymm6,ymm5,ymm4\{sae\},0x7b
4039
\s*[a-f0-9]+:\s*62 f3 d5 38 52 31 7b\s+vminmaxpd ymm6,ymm5,QWORD BCST \[ecx\],0x7b
4140
\s*[a-f0-9]+:\s*62 f3 d5 bf 52 72 80 7b\s+vminmaxpd ymm6\{k7\}\{z\},ymm5,QWORD BCST \[edx-0x400\],0x7b
4241
\s*[a-f0-9]+:\s*62 f3 d5 18 52 31 7b\s+vminmaxpd xmm6,xmm5,QWORD BCST \[ecx\],0x7b
4342
\s*[a-f0-9]+:\s*62 f3 d5 9f 52 72 80 7b\s+vminmaxpd xmm6\{k7\}\{z\},xmm5,QWORD BCST \[edx-0x400\],0x7b
44-
\s*[a-f0-9]+:\s*62 f3 50 18 52 f4 7b\s+vminmaxph ymm6,ymm5,ymm4\{sae\},0x7b
4543
\s*[a-f0-9]+:\s*62 f3 54 38 52 31 7b\s+vminmaxph ymm6,ymm5,WORD BCST \[ecx\],0x7b
4644
\s*[a-f0-9]+:\s*62 f3 54 bf 52 72 80 7b\s+vminmaxph ymm6\{k7\}\{z\},ymm5,WORD BCST \[edx-0x100\],0x7b
4745
\s*[a-f0-9]+:\s*62 f3 54 18 52 31 7b\s+vminmaxph xmm6,xmm5,WORD BCST \[ecx\],0x7b
4846
\s*[a-f0-9]+:\s*62 f3 54 9f 52 72 80 7b\s+vminmaxph xmm6\{k7\}\{z\},xmm5,WORD BCST \[edx-0x100\],0x7b
49-
\s*[a-f0-9]+:\s*62 f3 51 18 52 f4 7b\s+vminmaxps ymm6,ymm5,ymm4\{sae\},0x7b
5047
\s*[a-f0-9]+:\s*62 f3 55 38 52 31 7b\s+vminmaxps ymm6,ymm5,DWORD BCST \[ecx\],0x7b
5148
\s*[a-f0-9]+:\s*62 f3 55 bf 52 72 80 7b\s+vminmaxps ymm6\{k7\}\{z\},ymm5,DWORD BCST \[edx-0x200\],0x7b
5249
\s*[a-f0-9]+:\s*62 f3 55 18 52 31 7b\s+vminmaxps xmm6,xmm5,DWORD BCST \[ecx\],0x7b

‎gas/testsuite/gas/i386/avx10_2-256-miscs.d

-3
Original file line numberDiff line numberDiff line change
@@ -34,17 +34,14 @@ Disassembly of section \.text:
3434
\s*[a-f0-9]+:\s*62 f3 57 bf 52 72 80 7b\s+vminmaxbf16\s\$0x7b,-0x100\(%edx\)\{1to16\},%ymm5,%ymm6\{%k7\}\{z\}
3535
\s*[a-f0-9]+:\s*62 f3 57 18 52 31 7b\s+vminmaxbf16\s\$0x7b,\(%ecx\)\{1to8\},%xmm5,%xmm6
3636
\s*[a-f0-9]+:\s*62 f3 57 9f 52 72 80 7b\s+vminmaxbf16\s\$0x7b,-0x100\(%edx\)\{1to8\},%xmm5,%xmm6\{%k7\}\{z\}
37-
\s*[a-f0-9]+:\s*62 f3 d1 18 52 f4 7b\s+vminmaxpd\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
3837
\s*[a-f0-9]+:\s*62 f3 d5 38 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to4\},%ymm5,%ymm6
3938
\s*[a-f0-9]+:\s*62 f3 d5 bf 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\}\{z\}
4039
\s*[a-f0-9]+:\s*62 f3 d5 18 52 31 7b\s+vminmaxpd\s\$0x7b,\(%ecx\)\{1to2\},%xmm5,%xmm6
4140
\s*[a-f0-9]+:\s*62 f3 d5 9f 52 72 80 7b\s+vminmaxpd\s\$0x7b,-0x400\(%edx\)\{1to2\},%xmm5,%xmm6\{%k7\}\{z\}
42-
\s*[a-f0-9]+:\s*62 f3 50 18 52 f4 7b\s+vminmaxph\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
4341
\s*[a-f0-9]+:\s*62 f3 54 38 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to16\},%ymm5,%ymm6
4442
\s*[a-f0-9]+:\s*62 f3 54 bf 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to16\},%ymm5,%ymm6\{%k7\}\{z\}
4543
\s*[a-f0-9]+:\s*62 f3 54 18 52 31 7b\s+vminmaxph\s\$0x7b,\(%ecx\)\{1to8\},%xmm5,%xmm6
4644
\s*[a-f0-9]+:\s*62 f3 54 9f 52 72 80 7b\s+vminmaxph\s\$0x7b,-0x100\(%edx\)\{1to8\},%xmm5,%xmm6\{%k7\}\{z\}
47-
\s*[a-f0-9]+:\s*62 f3 51 18 52 f4 7b\s+vminmaxps\s\$0x7b,\{sae\},%ymm4,%ymm5,%ymm6
4845
\s*[a-f0-9]+:\s*62 f3 55 38 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to8\},%ymm5,%ymm6
4946
\s*[a-f0-9]+:\s*62 f3 55 bf 52 72 80 7b\s+vminmaxps\s\$0x7b,-0x200\(%edx\)\{1to8\},%ymm5,%ymm6\{%k7\}\{z\}
5047
\s*[a-f0-9]+:\s*62 f3 55 18 52 31 7b\s+vminmaxps\s\$0x7b,\(%ecx\)\{1to4\},%xmm5,%xmm6

‎gas/testsuite/gas/i386/avx10_2-256-miscs.s

-6
Original file line numberDiff line numberDiff line change
@@ -17,17 +17,14 @@ _start:
1717
vminmaxbf16 $123, -256(%edx){1to16}, %ymm5, %ymm6{%k7}{z}
1818
vminmaxbf16 $123, (%ecx){1to8}, %xmm5, %xmm6
1919
vminmaxbf16 $123, -256(%edx){1to8}, %xmm5, %xmm6{%k7}{z}
20-
vminmaxpd $123, {sae}, %ymm4, %ymm5, %ymm6
2120
vminmaxpd $123, (%ecx){1to4}, %ymm5, %ymm6
2221
vminmaxpd $123, -1024(%edx){1to4}, %ymm5, %ymm6{%k7}{z}
2322
vminmaxpd $123, (%ecx){1to2}, %xmm5, %xmm6
2423
vminmaxpd $123, -1024(%edx){1to2}, %xmm5, %xmm6{%k7}{z}
25-
vminmaxph $123, {sae}, %ymm4, %ymm5, %ymm6
2624
vminmaxph $123, (%ecx){1to16}, %ymm5, %ymm6
2725
vminmaxph $123, -256(%edx){1to16}, %ymm5, %ymm6{%k7}{z}
2826
vminmaxph $123, (%ecx){1to8}, %xmm5, %xmm6
2927
vminmaxph $123, -256(%edx){1to8}, %xmm5, %xmm6{%k7}{z}
30-
vminmaxps $123, {sae}, %ymm4, %ymm5, %ymm6
3128
vminmaxps $123, (%ecx){1to8}, %ymm5, %ymm6
3229
vminmaxps $123, -512(%edx){1to8}, %ymm5, %ymm6{%k7}{z}
3330
vminmaxps $123, (%ecx){1to4}, %xmm5, %xmm6
@@ -83,17 +80,14 @@ _intel:
8380
vminmaxbf16 ymm6{k7}{z}, ymm5, WORD PTR [edx-256]{1to16}, 123
8481
vminmaxbf16 xmm6, xmm5, [ecx]{1to8}, 123
8582
vminmaxbf16 xmm6{k7}{z}, xmm5, WORD PTR [edx-256]{1to8}, 123
86-
vminmaxpd ymm6, ymm5, ymm4, {sae}, 123
8783
vminmaxpd ymm6, ymm5, QWORD PTR [ecx]{1to4}, 123
8884
vminmaxpd ymm6{k7}{z}, ymm5, [edx-1024]{1to4}, 123
8985
vminmaxpd xmm6, xmm5, QWORD PTR [ecx]{1to2}, 123
9086
vminmaxpd xmm6{k7}{z}, xmm5, [edx-1024]{1to2}, 123
91-
vminmaxph ymm6, ymm5, ymm4, {sae}, 123
9287
vminmaxph ymm6, ymm5, [ecx]{1to16}, 123
9388
vminmaxph ymm6{k7}{z}, ymm5, WORD PTR [edx-256]{1to16}, 123
9489
vminmaxph xmm6, xmm5, WORD PTR [ecx]{1to8}, 123
9590
vminmaxph xmm6{k7}{z}, xmm5, [edx-256]{1to8}, 123
96-
vminmaxps ymm6, ymm5, ymm4, {sae}, 123
9791
vminmaxps ymm6, ymm5, DWORD PTR [ecx]{1to8}, 123
9892
vminmaxps ymm6{k7}{z}, ymm5, [edx-512]{1to8}, 123
9993
vminmaxps xmm6, xmm5, [ecx]{1to4}, 123

‎gas/testsuite/gas/i386/avx10_2-256-satcvt-intel.d

-16
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,6 @@ Disassembly of section \.text:
2020
\s*[a-f0-9]+:\s*62 f5 7f bf 69 72 80\s+vcvtbf162ibs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
2121
\s*[a-f0-9]+:\s*62 f5 7c 08 69 f5\s+vcvtph2ibs xmm6,xmm5
2222
\s*[a-f0-9]+:\s*62 f5 7c 28 69 f5\s+vcvtph2ibs ymm6,ymm5
23-
\s*[a-f0-9]+:\s*62 f5 78 18 69 f5\s+vcvtph2ibs ymm6,ymm5\{rn-sae\}
2423
\s*[a-f0-9]+:\s*62 f5 7c 0f 69 b4 f4 00 00 00 10\s+vcvtph2ibs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
2524
\s*[a-f0-9]+:\s*62 f5 7c 18 69 31\s+vcvtph2ibs xmm6,WORD BCST \[ecx\]
2625
\s*[a-f0-9]+:\s*62 f5 7c 08 69 71 7f\s+vcvtph2ibs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -31,7 +30,6 @@ Disassembly of section \.text:
3130
\s*[a-f0-9]+:\s*62 f5 7c bf 69 72 80\s+vcvtph2ibs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
3231
\s*[a-f0-9]+:\s*62 f5 7d 08 69 f5\s+vcvtps2ibs xmm6,xmm5
3332
\s*[a-f0-9]+:\s*62 f5 7d 28 69 f5\s+vcvtps2ibs ymm6,ymm5
34-
\s*[a-f0-9]+:\s*62 f5 79 18 69 f5\s+vcvtps2ibs ymm6,ymm5\{rn-sae\}
3533
\s*[a-f0-9]+:\s*62 f5 7d 0f 69 b4 f4 00 00 00 10\s+vcvtps2ibs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
3634
\s*[a-f0-9]+:\s*62 f5 7d 18 69 31\s+vcvtps2ibs xmm6,DWORD BCST \[ecx\]
3735
\s*[a-f0-9]+:\s*62 f5 7d 08 69 71 7f\s+vcvtps2ibs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -52,7 +50,6 @@ Disassembly of section \.text:
5250
\s*[a-f0-9]+:\s*62 f5 7f bf 68 72 80\s+vcvttbf162ibs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
5351
\s*[a-f0-9]+:\s*62 f5 7c 08 68 f5\s+vcvttph2ibs xmm6,xmm5
5452
\s*[a-f0-9]+:\s*62 f5 7c 28 68 f5\s+vcvttph2ibs ymm6,ymm5
55-
\s*[a-f0-9]+:\s*62 f5 78 18 68 f5\s+vcvttph2ibs ymm6,ymm5\{sae\}
5653
\s*[a-f0-9]+:\s*62 f5 7c 0f 68 b4 f4 00 00 00 10\s+vcvttph2ibs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
5754
\s*[a-f0-9]+:\s*62 f5 7c 18 68 31\s+vcvttph2ibs xmm6,WORD BCST \[ecx\]
5855
\s*[a-f0-9]+:\s*62 f5 7c 08 68 71 7f\s+vcvttph2ibs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -63,7 +60,6 @@ Disassembly of section \.text:
6360
\s*[a-f0-9]+:\s*62 f5 7c bf 68 72 80\s+vcvttph2ibs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
6461
\s*[a-f0-9]+:\s*62 f5 7d 08 68 f5\s+vcvttps2ibs xmm6,xmm5
6562
\s*[a-f0-9]+:\s*62 f5 7d 28 68 f5\s+vcvttps2ibs ymm6,ymm5
66-
\s*[a-f0-9]+:\s*62 f5 79 18 68 f5\s+vcvttps2ibs ymm6,ymm5\{sae\}
6763
\s*[a-f0-9]+:\s*62 f5 7d 0f 68 b4 f4 00 00 00 10\s+vcvttps2ibs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
6864
\s*[a-f0-9]+:\s*62 f5 7d 18 68 31\s+vcvttps2ibs xmm6,DWORD BCST \[ecx\]
6965
\s*[a-f0-9]+:\s*62 f5 7d 08 68 71 7f\s+vcvttps2ibs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -74,7 +70,6 @@ Disassembly of section \.text:
7470
\s*[a-f0-9]+:\s*62 f5 7d bf 68 72 80\s+vcvttps2ibs ymm6\{k7\}\{z\},DWORD BCST \[edx-0x200\]
7571
\s*[a-f0-9]+:\s*62 f5 fc 08 6d f5\s+vcvttpd2dqs xmm6,xmm5
7672
\s*[a-f0-9]+:\s*62 f5 fc 28 6d f5\s+vcvttpd2dqs xmm6,ymm5
77-
\s*[a-f0-9]+:\s*62 f5 f8 18 6d f5\s+vcvttpd2dqs xmm6,ymm5\{sae\}
7873
\s*[a-f0-9]+:\s*62 f5 fc 0f 6d b4 f4 00 00 00 10\s+vcvttpd2dqs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
7974
\s*[a-f0-9]+:\s*62 f5 fc 18 6d 31\s+vcvttpd2dqs xmm6,QWORD BCST \[ecx\]\{1to2\}
8075
\s*[a-f0-9]+:\s*62 f5 fc 08 6d 71 7f\s+vcvttpd2dqs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -84,7 +79,6 @@ Disassembly of section \.text:
8479
\s*[a-f0-9]+:\s*62 f5 fc bf 6d 72 80\s+vcvttpd2dqs xmm6\{k7\}\{z\},QWORD BCST \[edx-0x400\]\{1to4\}
8580
\s*[a-f0-9]+:\s*62 f5 fd 08 6d f5\s+vcvttpd2qqs xmm6,xmm5
8681
\s*[a-f0-9]+:\s*62 f5 fd 28 6d f5\s+vcvttpd2qqs ymm6,ymm5
87-
\s*[a-f0-9]+:\s*62 f5 f9 18 6d f5\s+vcvttpd2qqs ymm6,ymm5\{sae\}
8882
\s*[a-f0-9]+:\s*62 f5 fd 0f 6d b4 f4 00 00 00 10\s+vcvttpd2qqs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
8983
\s*[a-f0-9]+:\s*62 f5 fd 18 6d 31\s+vcvttpd2qqs xmm6,QWORD BCST \[ecx\]
9084
\s*[a-f0-9]+:\s*62 f5 fd 08 6d 71 7f\s+vcvttpd2qqs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -95,7 +89,6 @@ Disassembly of section \.text:
9589
\s*[a-f0-9]+:\s*62 f5 fd bf 6d 72 80\s+vcvttpd2qqs ymm6\{k7\}\{z\},QWORD BCST \[edx-0x400\]
9690
\s*[a-f0-9]+:\s*62 f5 7c 08 6d f5\s+vcvttps2dqs xmm6,xmm5
9791
\s*[a-f0-9]+:\s*62 f5 7c 28 6d f5\s+vcvttps2dqs ymm6,ymm5
98-
\s*[a-f0-9]+:\s*62 f5 78 18 6d f5\s+vcvttps2dqs ymm6,ymm5\{sae\}
9992
\s*[a-f0-9]+:\s*62 f5 7c 0f 6d b4 f4 00 00 00 10\s+vcvttps2dqs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
10093
\s*[a-f0-9]+:\s*62 f5 7c 18 6d 31\s+vcvttps2dqs xmm6,DWORD BCST \[ecx\]
10194
\s*[a-f0-9]+:\s*62 f5 7c 08 6d 71 7f\s+vcvttps2dqs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -106,7 +99,6 @@ Disassembly of section \.text:
10699
\s*[a-f0-9]+:\s*62 f5 7c bf 6d 72 80\s+vcvttps2dqs ymm6\{k7\}\{z\},DWORD BCST \[edx-0x200\]
107100
\s*[a-f0-9]+:\s*62 f5 7d 08 6d f5\s+vcvttps2qqs xmm6,xmm5
108101
\s*[a-f0-9]+:\s*62 f5 7d 28 6d f5\s+vcvttps2qqs ymm6,xmm5
109-
\s*[a-f0-9]+:\s*62 f5 79 18 6d f5\s+vcvttps2qqs ymm6,xmm5\{sae\}
110102
\s*[a-f0-9]+:\s*62 f5 7d 0f 6d b4 f4 00 00 00 10\s+vcvttps2qqs xmm6\{k7\},QWORD PTR \[esp\+esi\*8\+0x10000000\]
111103
\s*[a-f0-9]+:\s*62 f5 7d 18 6d 31\s+vcvttps2qqs xmm6,DWORD BCST \[ecx\]
112104
\s*[a-f0-9]+:\s*62 f5 7d 08 6d 71 7f\s+vcvttps2qqs xmm6,QWORD PTR \[ecx\+0x3f8\]
@@ -139,7 +131,6 @@ Disassembly of section \.text:
139131
\s*[a-f0-9]+:\s*62 f5 7f bf 6b 72 80\s+vcvtbf162iubs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
140132
\s*[a-f0-9]+:\s*62 f5 7c 08 6b f5\s+vcvtph2iubs xmm6,xmm5
141133
\s*[a-f0-9]+:\s*62 f5 7c 28 6b f5\s+vcvtph2iubs ymm6,ymm5
142-
\s*[a-f0-9]+:\s*62 f5 78 18 6b f5\s+vcvtph2iubs ymm6,ymm5\{rn-sae\}
143134
\s*[a-f0-9]+:\s*62 f5 7c 0f 6b b4 f4 00 00 00 10\s+vcvtph2iubs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
144135
\s*[a-f0-9]+:\s*62 f5 7c 18 6b 31\s+vcvtph2iubs xmm6,WORD BCST \[ecx\]
145136
\s*[a-f0-9]+:\s*62 f5 7c 08 6b 71 7f\s+vcvtph2iubs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -150,7 +141,6 @@ Disassembly of section \.text:
150141
\s*[a-f0-9]+:\s*62 f5 7c bf 6b 72 80\s+vcvtph2iubs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
151142
\s*[a-f0-9]+:\s*62 f5 7d 08 6b f5\s+vcvtps2iubs xmm6,xmm5
152143
\s*[a-f0-9]+:\s*62 f5 7d 28 6b f5\s+vcvtps2iubs ymm6,ymm5
153-
\s*[a-f0-9]+:\s*62 f5 79 18 6b f5\s+vcvtps2iubs ymm6,ymm5\{rn-sae\}
154144
\s*[a-f0-9]+:\s*62 f5 7d 0f 6b b4 f4 00 00 00 10\s+vcvtps2iubs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
155145
\s*[a-f0-9]+:\s*62 f5 7d 18 6b 31\s+vcvtps2iubs xmm6,DWORD BCST \[ecx\]
156146
\s*[a-f0-9]+:\s*62 f5 7d 08 6b 71 7f\s+vcvtps2iubs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -171,7 +161,6 @@ Disassembly of section \.text:
171161
\s*[a-f0-9]+:\s*62 f5 7f bf 6a 72 80\s+vcvttbf162iubs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
172162
\s*[a-f0-9]+:\s*62 f5 7c 08 6a f5\s+vcvttph2iubs xmm6,xmm5
173163
\s*[a-f0-9]+:\s*62 f5 7c 28 6a f5\s+vcvttph2iubs ymm6,ymm5
174-
\s*[a-f0-9]+:\s*62 f5 78 18 6a f5\s+vcvttph2iubs ymm6,ymm5\{sae\}
175164
\s*[a-f0-9]+:\s*62 f5 7c 0f 6a b4 f4 00 00 00 10\s+vcvttph2iubs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
176165
\s*[a-f0-9]+:\s*62 f5 7c 18 6a 31\s+vcvttph2iubs xmm6,WORD BCST \[ecx\]
177166
\s*[a-f0-9]+:\s*62 f5 7c 08 6a 71 7f\s+vcvttph2iubs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -182,7 +171,6 @@ Disassembly of section \.text:
182171
\s*[a-f0-9]+:\s*62 f5 7c bf 6a 72 80\s+vcvttph2iubs ymm6\{k7\}\{z\},WORD BCST \[edx-0x100\]
183172
\s*[a-f0-9]+:\s*62 f5 7d 08 6a f5\s+vcvttps2iubs xmm6,xmm5
184173
\s*[a-f0-9]+:\s*62 f5 7d 28 6a f5\s+vcvttps2iubs ymm6,ymm5
185-
\s*[a-f0-9]+:\s*62 f5 79 18 6a f5\s+vcvttps2iubs ymm6,ymm5\{sae\}
186174
\s*[a-f0-9]+:\s*62 f5 7d 0f 6a b4 f4 00 00 00 10\s+vcvttps2iubs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
187175
\s*[a-f0-9]+:\s*62 f5 7d 18 6a 31\s+vcvttps2iubs xmm6,DWORD BCST \[ecx\]
188176
\s*[a-f0-9]+:\s*62 f5 7d 08 6a 71 7f\s+vcvttps2iubs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -193,7 +181,6 @@ Disassembly of section \.text:
193181
\s*[a-f0-9]+:\s*62 f5 7d bf 6a 72 80\s+vcvttps2iubs ymm6\{k7\}\{z\},DWORD BCST \[edx-0x200\]
194182
\s*[a-f0-9]+:\s*62 f5 fc 08 6c f5\s+vcvttpd2udqs xmm6,xmm5
195183
\s*[a-f0-9]+:\s*62 f5 fc 28 6c f5\s+vcvttpd2udqs xmm6,ymm5
196-
\s*[a-f0-9]+:\s*62 f5 f8 18 6c f5\s+vcvttpd2udqs xmm6,ymm5\{sae\}
197184
\s*[a-f0-9]+:\s*62 f5 fc 0f 6c b4 f4 00 00 00 10\s+vcvttpd2udqs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
198185
\s*[a-f0-9]+:\s*62 f5 fc 18 6c 31\s+vcvttpd2udqs xmm6,QWORD BCST \[ecx\]\{1to2\}
199186
\s*[a-f0-9]+:\s*62 f5 fc 08 6c 71 7f\s+vcvttpd2udqs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -203,7 +190,6 @@ Disassembly of section \.text:
203190
\s*[a-f0-9]+:\s*62 f5 fc bf 6c 72 80\s+vcvttpd2udqs xmm6\{k7\}\{z\},QWORD BCST \[edx-0x400\]\{1to4\}
204191
\s*[a-f0-9]+:\s*62 f5 fd 08 6c f5\s+vcvttpd2uqqs xmm6,xmm5
205192
\s*[a-f0-9]+:\s*62 f5 fd 28 6c f5\s+vcvttpd2uqqs ymm6,ymm5
206-
\s*[a-f0-9]+:\s*62 f5 f9 18 6c f5\s+vcvttpd2uqqs ymm6,ymm5\{sae\}
207193
\s*[a-f0-9]+:\s*62 f5 fd 0f 6c b4 f4 00 00 00 10\s+vcvttpd2uqqs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
208194
\s*[a-f0-9]+:\s*62 f5 fd 18 6c 31\s+vcvttpd2uqqs xmm6,QWORD BCST \[ecx\]
209195
\s*[a-f0-9]+:\s*62 f5 fd 08 6c 71 7f\s+vcvttpd2uqqs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -214,7 +200,6 @@ Disassembly of section \.text:
214200
\s*[a-f0-9]+:\s*62 f5 fd bf 6c 72 80\s+vcvttpd2uqqs ymm6\{k7\}\{z\},QWORD BCST \[edx-0x400\]
215201
\s*[a-f0-9]+:\s*62 f5 7c 08 6c f5\s+vcvttps2udqs xmm6,xmm5
216202
\s*[a-f0-9]+:\s*62 f5 7c 28 6c f5\s+vcvttps2udqs ymm6,ymm5
217-
\s*[a-f0-9]+:\s*62 f5 78 18 6c f5\s+vcvttps2udqs ymm6,ymm5\{sae\}
218203
\s*[a-f0-9]+:\s*62 f5 7c 0f 6c b4 f4 00 00 00 10\s+vcvttps2udqs xmm6\{k7\},XMMWORD PTR \[esp\+esi\*8\+0x10000000\]
219204
\s*[a-f0-9]+:\s*62 f5 7c 18 6c 31\s+vcvttps2udqs xmm6,DWORD BCST \[ecx\]
220205
\s*[a-f0-9]+:\s*62 f5 7c 08 6c 71 7f\s+vcvttps2udqs xmm6,XMMWORD PTR \[ecx\+0x7f0\]
@@ -225,7 +210,6 @@ Disassembly of section \.text:
225210
\s*[a-f0-9]+:\s*62 f5 7c bf 6c 72 80\s+vcvttps2udqs ymm6\{k7\}\{z\},DWORD BCST \[edx-0x200\]
226211
\s*[a-f0-9]+:\s*62 f5 7d 08 6c f5\s+vcvttps2uqqs xmm6,xmm5
227212
\s*[a-f0-9]+:\s*62 f5 7d 28 6c f5\s+vcvttps2uqqs ymm6,xmm5
228-
\s*[a-f0-9]+:\s*62 f5 79 18 6c f5\s+vcvttps2uqqs ymm6,xmm5\{sae\}
229213
\s*[a-f0-9]+:\s*62 f5 7d 0f 6c b4 f4 00 00 00 10\s+vcvttps2uqqs xmm6\{k7\},QWORD PTR \[esp\+esi\*8\+0x10000000\]
230214
\s*[a-f0-9]+:\s*62 f5 7d 18 6c 31\s+vcvttps2uqqs xmm6,DWORD BCST \[ecx\]
231215
\s*[a-f0-9]+:\s*62 f5 7d 08 6c 71 7f\s+vcvttps2uqqs xmm6,QWORD PTR \[ecx\+0x3f8\]

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