-
Notifications
You must be signed in to change notification settings - Fork 0
/
Copy pathindex.html
56 lines (55 loc) · 6.58 KB
/
index.html
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
<html>
<style>
H5 {
FONT-SIZE: 32px; BACKGROUND: steelblue; COLOR: white; FONT-FAMILY: Arial, helvetica, sans-serif
}
H1 {
FONT-SIZE: 24px; BACKGROUND: steelblue; COLOR: white; FONT-FAMILY: Arial, helvetica, sans-serif
}
H2 {
FONT-SIZE: 16px; STRONG
}
</style>
<h5><strong>Buğra Önal</strong></h5>
<p><img src="profile_cropped.png" height=278 width=271 align=left hspace="10"></p>
<br>
<br>
<br>
<br>
<p>Cellphone: +90 532-272-7232<br />Email: </p><a href="[email protected]">[email protected]</a><br /> <a href="https://www.linkedin.com/in/bugra-onal-a00492b9/">LinkedIn</a>
<br><br>
<br><br>
<br><br>
<br><br>
<h1><strong>SUMMARY</strong></h1>
<p>Experience in SoC and FPGA development and verification <strong>· </strong>RTL design with Verilog and VHDL <strong>· </strong>Proficient in Modelsim, Verilator Xilinx tools (ISE, Vivado, Vivado HLS, Vivado SDK)<strong> · </strong>Coding skills in C, modern C++, Python, Java, MATLAB, UNIX scripting<strong>, </strong>Qt Framework <strong>· </strong> Experience in Raspberry Pi development<strong>, </strong>OpenCV, Boost, Django libraries <strong>· </strong>TAship experience</p>
<h1>EDUCATION</h1>
<p><strong>PhD in CSE, September 2021 - Present, University of California Santa Cruz, Santa Cruz, USA </strong></p>
<p><strong>MS in EE, September 2019 - Present, Özyegin University, Istanbul, Turkey </strong>(GPA: 3.88/4.00)</p>
<p>Thesis involves implementing an area efficient static memory allocation/synthesis method within a compiler of a synthesized soft-core CPU. Funded by TÜBITAK.</p>
<p><strong>BS in EE & CS (double major), August 2019, Özyegin University, Istanbul, Turkey</strong> (GPA: 3.56/4.00)</p>
<p>Senior Project on Parametrized FPGA Video Flow Design.</p>
<h1>EMPLOYMENT</h1>
<h2>Graduate Assistant at Özyegin University, Istanbul, Turkey, September 2019 - Septmeber 2021</h2>
<p>TA‘ed the following courses: Python for Engineers, Digital Electronics and FPGA Design, Computer Architecture</p>
<h2>Software Development and Testing Engineer at SemiMobility, Istanbul, Turkey, October 2019 - Present</h2>
<p>Developed FPGA IPs for Electric Motor Drives. Did RTL design, verification, and synthesis. Also helped other team members in bring-up.</p>
<h2>Intern Hardware Designer at Matriks Data, July 2019 - August 2019</h2>
<p>Implemented “Limit Order Book” algorithms on FPGA using High Level Synthesis as part of a High Frequency Trading (HFT) hardware/software solution.</p>
<h2>Intern Hardware Designer at Yonga Technology Microelectronics R&D, June 2018 - June 2019</h2>
<p>Worked in tandem with the company for my senior project on parametrized video flow algorithm implementations on FPGA.</p>
<h1>PROJECTS</h1>
<p><strong>Static Memory Allocation for a Synthesized Soft-Core CPU (April 2020 - Present):</strong> Improving a Clang based C compiler for a custom CPU called VerySimpleCPU (VSCPU). This project is funded by TÜBITAK (Turkish NSF). VSCPU was designed by Prof. H. Fatih Ugurdag's team. It has a small instruction set, which has "instruction set completeness". The improvement to the compiler involves adding a static memory allocation instead of emulating a stack. Since VSCPU does not have stack-based instructions, a statically memory mapped application has smaller program and data memory footprint.</p>
<p><strong>Virtual FPGA Board (September 2020 - Present):</strong> An FPGA board simulator intended to be used in distance education, developed using Verilator. A GUI was designed using Qt framework. The GUI replicates a typical FPGA board with virtual LEDs, push buttons, switches, and a seven-segment display. The GUI and the Verilator model communicate through UDP packets.</p>
<p><strong>High Frequency Electric Motor Control IP (August 2019 - Present):</strong> The IP controls BLDC motors on Xilinx Zynq SoCs. This project was funded by TÜBITAK. Designed RTL modules running on Zynq PL. Conducted component level simulation tests and system level FPGA-in-the-Loop verification in MATLAB. Wrote a software for monitoring/controlling the motors, running on the Zynq PS. Developed Qt based desktop application, communicating with the Zynq FPGA.</p>
<p><strong>Automatic Door Locking System (February 2020 - June 2020):</strong> A web application with scheduled and on-request locking/unlocking system using a Raspberry Pi. The application supports a calendar view showing the schedule of a door. The app. supports multiple doors. The doors can be opened manually utilizing face recognition or automatically when the scheduled time arrives. The app. utilizes a database for keeping track of the schedules and users. </p>
<p><strong>High Frequency Trading on FPGA using HLS (July 2019 - August 2019):</strong> This is an implementation of the “Limit Order Book” algorithm for HFT on an FPGA equipped NIC using HLS. The program using Xilinx Vivado HLS. The algorithm utilizes a heap structure for keeping track of orders. Buyer and seller orders are matched as fast as possible according to their prices.</p>
<p><strong>Parametrized FPGA Video Flow (September 2018 - June 2019):</strong> A set of parametrized video processing algorithms implemented on an FPGA. The algorithms include histogram equalization, median filter, and fish-eye lens distortion correction. Project was done in cooperation with Yonga Technology Microelectronics R&D and Prof. H. Fatih Ugurdag.</p>
<p><strong>Laser Object Tracking (February 2018 - June 2018):</strong> A Raspberry Pi application that tracks an object and points a laser pointer at it. The project utilized OpenCV library and was written in Python.</p>
<h1>PUBLICATIONS</h1>
<p>B. Tufekci, B. Onal, H. Dere, and H. F. Ugurdag, " Hardware Implementation of Field Oriented Control for Three Phase Machine Drives," 28<sup>th</sup> IEEE Signal Processing and Communications Applications Conference (SIU), Gaziantep, Turkey, October 2020.</p>
<p>B. Tufekci, B. Onal, H. Dere, and H. F. Ugurdag, "Efficient FPGA Implementation of Field Oriented Control for 3-Phase Machine Drives," 18<sup>th</sup> IEEE East-West Design & Test Symposium (EWDTS), Varna, Bulgaria, September 2020.</p>
<h1>MISCELLANEOUS</h1>
<p>Ranked 3<sup>rd</sup> in IEEEXtreme 14.0 programming competition (October 2020) among contestants from Turkey<br /> TOEFL iBT score of 111 out of 120 (August 2019)<br /> Top ranking student in the class of 2019 within BSEE and BSCS majors<br /> Ranked 9<sup>th</sup> in IEEEXtreme 12.0 programming competition (October 2018) among contestants from Turkey</p>
<p> </p>
</html>