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tcg.c
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/*
* Tiny Code Generator for QEMU
*
* Copyright (c) 2008 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/* define it to use liveness analysis (better code) */
#define USE_LIVENESS_ANALYSIS
#define USE_TCG_OPTIMIZATIONS
#include "config.h"
/* Define to jump the ELF file used to communicate with GDB. */
#undef DEBUG_JIT
#if !defined(CONFIG_DEBUG_TCG) && !defined(NDEBUG)
/* define it to suppress various consistency checks (faster) */
#define NDEBUG
#endif
#include "qemu-common.h"
#include "qemu/host-utils.h"
#include "qemu/timer.h"
/* Note: the long term plan is to reduce the dependencies on the QEMU
CPU definitions. Currently they are used for qemu_ld/st
instructions */
#define NO_CPU_IO_DEFS
#include "cpu.h"
#include "tcg-op.h"
#if UINTPTR_MAX == UINT32_MAX
# define ELF_CLASS ELFCLASS32
#else
# define ELF_CLASS ELFCLASS64
#endif
#ifdef HOST_WORDS_BIGENDIAN
# define ELF_DATA ELFDATA2MSB
#else
# define ELF_DATA ELFDATA2LSB
#endif
#include "elf.h"
/* Forward declarations for functions declared in tcg-target.c and used here. */
static void tcg_target_init(TCGContext *s);
static void tcg_target_qemu_prologue(TCGContext *s);
static void patch_reloc(tcg_insn_unit *code_ptr, int type,
intptr_t value, intptr_t addend);
/* The CIE and FDE header definitions will be common to all hosts. */
typedef struct {
uint32_t len __attribute__((aligned((sizeof(void *)))));
uint32_t id;
uint8_t version;
char augmentation[1];
uint8_t code_align;
uint8_t data_align;
uint8_t return_column;
} DebugFrameCIE;
typedef struct QEMU_PACKED {
uint32_t len __attribute__((aligned((sizeof(void *)))));
uint32_t cie_offset;
uintptr_t func_start;
uintptr_t func_len;
} DebugFrameFDEHeader;
typedef struct QEMU_PACKED {
DebugFrameCIE cie;
DebugFrameFDEHeader fde;
} DebugFrameHeader;
static void tcg_register_jit_int(void *buf, size_t size,
const void *debug_frame,
size_t debug_frame_size)
__attribute__((unused));
/* Forward declarations for functions declared and used in tcg-target.c. */
static int target_parse_constraint(TCGArgConstraint *ct, const char **pct_str);
static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1,
intptr_t arg2);
static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg);
static void tcg_out_movi(TCGContext *s, TCGType type,
TCGReg ret, tcg_target_long arg);
static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args,
const int *const_args);
static void tcg_out_st(TCGContext *s, TCGType type, TCGReg arg, TCGReg arg1,
intptr_t arg2);
static void tcg_out_call(TCGContext *s, tcg_insn_unit *target);
static int tcg_target_const_match(tcg_target_long val, TCGType type,
const TCGArgConstraint *arg_ct);
static void tcg_out_tb_init(TCGContext *s);
static void tcg_out_tb_finalize(TCGContext *s);
TCGOpDef tcg_op_defs[] = {
#define DEF(s, oargs, iargs, cargs, flags) { #s, oargs, iargs, cargs, iargs + oargs + cargs, flags },
#include "tcg-opc.h"
#undef DEF
};
const size_t tcg_op_defs_max = ARRAY_SIZE(tcg_op_defs);
static TCGRegSet tcg_target_available_regs[2];
static TCGRegSet tcg_target_call_clobber_regs;
#if TCG_TARGET_INSN_UNIT_SIZE == 1
static __attribute__((unused)) inline void tcg_out8(TCGContext *s, uint8_t v)
{
*s->code_ptr++ = v;
}
static __attribute__((unused)) inline void tcg_patch8(tcg_insn_unit *p,
uint8_t v)
{
*p = v;
}
#endif
#if TCG_TARGET_INSN_UNIT_SIZE <= 2
static __attribute__((unused)) inline void tcg_out16(TCGContext *s, uint16_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 2) {
*s->code_ptr++ = v;
} else {
tcg_insn_unit *p = s->code_ptr;
memcpy(p, &v, sizeof(v));
s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE);
}
}
static __attribute__((unused)) inline void tcg_patch16(tcg_insn_unit *p,
uint16_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 2) {
*p = v;
} else {
memcpy(p, &v, sizeof(v));
}
}
#endif
#if TCG_TARGET_INSN_UNIT_SIZE <= 4
static __attribute__((unused)) inline void tcg_out32(TCGContext *s, uint32_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 4) {
*s->code_ptr++ = v;
} else {
tcg_insn_unit *p = s->code_ptr;
memcpy(p, &v, sizeof(v));
s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE);
}
}
static __attribute__((unused)) inline void tcg_patch32(tcg_insn_unit *p,
uint32_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 4) {
*p = v;
} else {
memcpy(p, &v, sizeof(v));
}
}
#endif
#if TCG_TARGET_INSN_UNIT_SIZE <= 8
static __attribute__((unused)) inline void tcg_out64(TCGContext *s, uint64_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 8) {
*s->code_ptr++ = v;
} else {
tcg_insn_unit *p = s->code_ptr;
memcpy(p, &v, sizeof(v));
s->code_ptr = p + (8 / TCG_TARGET_INSN_UNIT_SIZE);
}
}
static __attribute__((unused)) inline void tcg_patch64(tcg_insn_unit *p,
uint64_t v)
{
if (TCG_TARGET_INSN_UNIT_SIZE == 8) {
*p = v;
} else {
memcpy(p, &v, sizeof(v));
}
}
#endif
/* label relocation processing */
static void tcg_out_reloc(TCGContext *s, tcg_insn_unit *code_ptr, int type,
int label_index, intptr_t addend)
{
TCGLabel *l;
TCGRelocation *r;
l = &s->labels[label_index];
if (l->has_value) {
/* FIXME: This may break relocations on RISC targets that
modify instruction fields in place. The caller may not have
written the initial value. */
patch_reloc(code_ptr, type, l->u.value, addend);
} else {
/* add a new relocation entry */
r = tcg_malloc(sizeof(TCGRelocation));
r->type = type;
r->ptr = code_ptr;
r->addend = addend;
r->next = l->u.first_reloc;
l->u.first_reloc = r;
}
}
static void tcg_out_label(TCGContext *s, int label_index, tcg_insn_unit *ptr)
{
TCGLabel *l = &s->labels[label_index];
intptr_t value = (intptr_t)ptr;
TCGRelocation *r;
assert(!l->has_value);
for (r = l->u.first_reloc; r != NULL; r = r->next) {
patch_reloc(r->ptr, r->type, value, r->addend);
}
l->has_value = 1;
l->u.value_ptr = ptr;
}
int gen_new_label(void)
{
TCGContext *s = &tcg_ctx;
int idx;
TCGLabel *l;
if (s->nb_labels >= TCG_MAX_LABELS)
tcg_abort();
idx = s->nb_labels++;
l = &s->labels[idx];
l->has_value = 0;
l->u.first_reloc = NULL;
return idx;
}
#include "tcg-target.c"
/* pool based memory allocation */
void *tcg_malloc_internal(TCGContext *s, int size)
{
TCGPool *p;
int pool_size;
if (size > TCG_POOL_CHUNK_SIZE) {
/* big malloc: insert a new pool (XXX: could optimize) */
p = g_malloc(sizeof(TCGPool) + size);
p->size = size;
p->next = s->pool_first_large;
s->pool_first_large = p;
return p->data;
} else {
p = s->pool_current;
if (!p) {
p = s->pool_first;
if (!p)
goto new_pool;
} else {
if (!p->next) {
new_pool:
pool_size = TCG_POOL_CHUNK_SIZE;
p = g_malloc(sizeof(TCGPool) + pool_size);
p->size = pool_size;
p->next = NULL;
if (s->pool_current)
s->pool_current->next = p;
else
s->pool_first = p;
} else {
p = p->next;
}
}
}
s->pool_current = p;
s->pool_cur = p->data + size;
s->pool_end = p->data + p->size;
return p->data;
}
void tcg_pool_reset(TCGContext *s)
{
TCGPool *p, *t;
for (p = s->pool_first_large; p; p = t) {
t = p->next;
g_free(p);
}
s->pool_first_large = NULL;
s->pool_cur = s->pool_end = NULL;
s->pool_current = NULL;
}
typedef struct TCGHelperInfo {
void *func;
const char *name;
unsigned flags;
unsigned sizemask;
} TCGHelperInfo;
#include "exec/helper-proto.h"
static const TCGHelperInfo all_helpers[] = {
#include "exec/helper-tcg.h"
};
void tcg_context_init(TCGContext *s)
{
int op, total_args, n, i;
TCGOpDef *def;
TCGArgConstraint *args_ct;
int *sorted_args;
GHashTable *helper_table;
memset(s, 0, sizeof(*s));
s->nb_globals = 0;
/* Count total number of arguments and allocate the corresponding
space */
total_args = 0;
for(op = 0; op < NB_OPS; op++) {
def = &tcg_op_defs[op];
n = def->nb_iargs + def->nb_oargs;
total_args += n;
}
args_ct = g_malloc(sizeof(TCGArgConstraint) * total_args);
sorted_args = g_malloc(sizeof(int) * total_args);
for(op = 0; op < NB_OPS; op++) {
def = &tcg_op_defs[op];
def->args_ct = args_ct;
def->sorted_args = sorted_args;
n = def->nb_iargs + def->nb_oargs;
sorted_args += n;
args_ct += n;
}
/* Register helpers. */
/* Use g_direct_hash/equal for direct pointer comparisons on func. */
s->helpers = helper_table = g_hash_table_new(NULL, NULL);
for (i = 0; i < ARRAY_SIZE(all_helpers); ++i) {
g_hash_table_insert(helper_table, (gpointer)all_helpers[i].func,
(gpointer)&all_helpers[i]);
}
tcg_target_init(s);
}
void tcg_prologue_init(TCGContext *s)
{
/* init global prologue and epilogue */
s->code_buf = s->code_gen_prologue;
s->code_ptr = s->code_buf;
tcg_target_qemu_prologue(s);
flush_icache_range((uintptr_t)s->code_buf, (uintptr_t)s->code_ptr);
#ifdef DEBUG_DISAS
if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
size_t size = tcg_current_code_size(s);
qemu_log("PROLOGUE: [size=%zu]\n", size);
log_disas(s->code_buf, size);
qemu_log("\n");
qemu_log_flush();
}
#endif
}
void tcg_set_frame(TCGContext *s, int reg, intptr_t start, intptr_t size)
{
s->frame_start = start;
s->frame_end = start + size;
s->frame_reg = reg;
}
void tcg_func_start(TCGContext *s)
{
tcg_pool_reset(s);
s->nb_temps = s->nb_globals;
/* No temps have been previously allocated for size or locality. */
memset(s->free_temps, 0, sizeof(s->free_temps));
s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
s->nb_labels = 0;
s->current_frame_offset = s->frame_start;
#ifdef CONFIG_DEBUG_TCG
s->goto_tb_issue_mask = 0;
#endif
s->gen_opc_ptr = s->gen_opc_buf;
s->gen_opparam_ptr = s->gen_opparam_buf;
s->be = tcg_malloc(sizeof(TCGBackendData));
}
static inline void tcg_temp_alloc(TCGContext *s, int n)
{
if (n > TCG_MAX_TEMPS)
tcg_abort();
}
static inline int tcg_global_reg_new_internal(TCGType type, int reg,
const char *name)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
int idx;
#if TCG_TARGET_REG_BITS == 32
if (type != TCG_TYPE_I32)
tcg_abort();
#endif
if (tcg_regset_test_reg(s->reserved_regs, reg))
tcg_abort();
idx = s->nb_globals;
tcg_temp_alloc(s, s->nb_globals + 1);
ts = &s->temps[s->nb_globals];
ts->base_type = type;
ts->type = type;
ts->fixed_reg = 1;
ts->reg = reg;
ts->name = name;
s->nb_globals++;
tcg_regset_set_reg(s->reserved_regs, reg);
return idx;
}
TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
{
int idx;
idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
{
int idx;
idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
return MAKE_TCGV_I64(idx);
}
static inline int tcg_global_mem_new_internal(TCGType type, int reg,
intptr_t offset,
const char *name)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
int idx;
idx = s->nb_globals;
#if TCG_TARGET_REG_BITS == 32
if (type == TCG_TYPE_I64) {
char buf[64];
tcg_temp_alloc(s, s->nb_globals + 2);
ts = &s->temps[s->nb_globals];
ts->base_type = type;
ts->type = TCG_TYPE_I32;
ts->fixed_reg = 0;
ts->mem_allocated = 1;
ts->mem_reg = reg;
#ifdef HOST_WORDS_BIGENDIAN
ts->mem_offset = offset + 4;
#else
ts->mem_offset = offset;
#endif
pstrcpy(buf, sizeof(buf), name);
pstrcat(buf, sizeof(buf), "_0");
ts->name = strdup(buf);
ts++;
ts->base_type = type;
ts->type = TCG_TYPE_I32;
ts->fixed_reg = 0;
ts->mem_allocated = 1;
ts->mem_reg = reg;
#ifdef HOST_WORDS_BIGENDIAN
ts->mem_offset = offset;
#else
ts->mem_offset = offset + 4;
#endif
pstrcpy(buf, sizeof(buf), name);
pstrcat(buf, sizeof(buf), "_1");
ts->name = strdup(buf);
s->nb_globals += 2;
} else
#endif
{
tcg_temp_alloc(s, s->nb_globals + 1);
ts = &s->temps[s->nb_globals];
ts->base_type = type;
ts->type = type;
ts->fixed_reg = 0;
ts->mem_allocated = 1;
ts->mem_reg = reg;
ts->mem_offset = offset;
ts->name = name;
s->nb_globals++;
}
return idx;
}
TCGv_i32 tcg_global_mem_new_i32(int reg, intptr_t offset, const char *name)
{
int idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_global_mem_new_i64(int reg, intptr_t offset, const char *name)
{
int idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
return MAKE_TCGV_I64(idx);
}
static inline int tcg_temp_new_internal(TCGType type, int temp_local)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
int idx, k;
k = type + (temp_local ? TCG_TYPE_COUNT : 0);
idx = find_first_bit(s->free_temps[k].l, TCG_MAX_TEMPS);
if (idx < TCG_MAX_TEMPS) {
/* There is already an available temp with the right type. */
clear_bit(idx, s->free_temps[k].l);
ts = &s->temps[idx];
ts->temp_allocated = 1;
assert(ts->base_type == type);
assert(ts->temp_local == temp_local);
} else {
idx = s->nb_temps;
#if TCG_TARGET_REG_BITS == 32
if (type == TCG_TYPE_I64) {
tcg_temp_alloc(s, s->nb_temps + 2);
ts = &s->temps[s->nb_temps];
ts->base_type = type;
ts->type = TCG_TYPE_I32;
ts->temp_allocated = 1;
ts->temp_local = temp_local;
ts->name = NULL;
ts++;
ts->base_type = type;
ts->type = TCG_TYPE_I32;
ts->temp_allocated = 1;
ts->temp_local = temp_local;
ts->name = NULL;
s->nb_temps += 2;
} else
#endif
{
tcg_temp_alloc(s, s->nb_temps + 1);
ts = &s->temps[s->nb_temps];
ts->base_type = type;
ts->type = type;
ts->temp_allocated = 1;
ts->temp_local = temp_local;
ts->name = NULL;
s->nb_temps++;
}
}
#if defined(CONFIG_DEBUG_TCG)
s->temps_in_use++;
#endif
return idx;
}
TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
{
int idx;
idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
return MAKE_TCGV_I32(idx);
}
TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
{
int idx;
idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
return MAKE_TCGV_I64(idx);
}
static void tcg_temp_free_internal(int idx)
{
TCGContext *s = &tcg_ctx;
TCGTemp *ts;
int k;
#if defined(CONFIG_DEBUG_TCG)
s->temps_in_use--;
if (s->temps_in_use < 0) {
fprintf(stderr, "More temporaries freed than allocated!\n");
}
#endif
assert(idx >= s->nb_globals && idx < s->nb_temps);
ts = &s->temps[idx];
assert(ts->temp_allocated != 0);
ts->temp_allocated = 0;
k = ts->base_type + (ts->temp_local ? TCG_TYPE_COUNT : 0);
set_bit(idx, s->free_temps[k].l);
}
void tcg_temp_free_i32(TCGv_i32 arg)
{
tcg_temp_free_internal(GET_TCGV_I32(arg));
}
void tcg_temp_free_i64(TCGv_i64 arg)
{
tcg_temp_free_internal(GET_TCGV_I64(arg));
}
TCGv_i32 tcg_const_i32(int32_t val)
{
TCGv_i32 t0;
t0 = tcg_temp_new_i32();
tcg_gen_movi_i32(t0, val);
return t0;
}
TCGv_i64 tcg_const_i64(int64_t val)
{
TCGv_i64 t0;
t0 = tcg_temp_new_i64();
tcg_gen_movi_i64(t0, val);
return t0;
}
TCGv_i32 tcg_const_local_i32(int32_t val)
{
TCGv_i32 t0;
t0 = tcg_temp_local_new_i32();
tcg_gen_movi_i32(t0, val);
return t0;
}
TCGv_i64 tcg_const_local_i64(int64_t val)
{
TCGv_i64 t0;
t0 = tcg_temp_local_new_i64();
tcg_gen_movi_i64(t0, val);
return t0;
}
#if defined(CONFIG_DEBUG_TCG)
void tcg_clear_temp_count(void)
{
TCGContext *s = &tcg_ctx;
s->temps_in_use = 0;
}
int tcg_check_temp_count(void)
{
TCGContext *s = &tcg_ctx;
if (s->temps_in_use) {
/* Clear the count so that we don't give another
* warning immediately next time around.
*/
s->temps_in_use = 0;
return 1;
}
return 0;
}
#endif
/* Note: we convert the 64 bit args to 32 bit and do some alignment
and endian swap. Maybe it would be better to do the alignment
and endian swap in tcg_reg_alloc_call(). */
void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret,
int nargs, TCGArg *args)
{
int i, real_args, nb_rets;
unsigned sizemask, flags;
TCGArg *nparam;
TCGHelperInfo *info;
info = g_hash_table_lookup(s->helpers, (gpointer)func);
flags = info->flags;
sizemask = info->sizemask;
#if defined(__sparc__) && !defined(__arch64__) \
&& !defined(CONFIG_TCG_INTERPRETER)
/* We have 64-bit values in one register, but need to pass as two
separate parameters. Split them. */
int orig_sizemask = sizemask;
int orig_nargs = nargs;
TCGv_i64 retl, reth;
TCGV_UNUSED_I64(retl);
TCGV_UNUSED_I64(reth);
if (sizemask != 0) {
TCGArg *split_args = __builtin_alloca(sizeof(TCGArg) * nargs * 2);
for (i = real_args = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
if (is_64bit) {
TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
TCGv_i32 h = tcg_temp_new_i32();
TCGv_i32 l = tcg_temp_new_i32();
tcg_gen_extr_i64_i32(l, h, orig);
split_args[real_args++] = GET_TCGV_I32(h);
split_args[real_args++] = GET_TCGV_I32(l);
} else {
split_args[real_args++] = args[i];
}
}
nargs = real_args;
args = split_args;
sizemask = 0;
}
#elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
for (i = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
int is_signed = sizemask & (2 << (i+1)*2);
if (!is_64bit) {
TCGv_i64 temp = tcg_temp_new_i64();
TCGv_i64 orig = MAKE_TCGV_I64(args[i]);
if (is_signed) {
tcg_gen_ext32s_i64(temp, orig);
} else {
tcg_gen_ext32u_i64(temp, orig);
}
args[i] = GET_TCGV_I64(temp);
}
}
#endif /* TCG_TARGET_EXTEND_ARGS */
*s->gen_opc_ptr++ = INDEX_op_call;
nparam = s->gen_opparam_ptr++;
if (ret != TCG_CALL_DUMMY_ARG) {
#if defined(__sparc__) && !defined(__arch64__) \
&& !defined(CONFIG_TCG_INTERPRETER)
if (orig_sizemask & 1) {
/* The 32-bit ABI is going to return the 64-bit value in
the %o0/%o1 register pair. Prepare for this by using
two return temporaries, and reassemble below. */
retl = tcg_temp_new_i64();
reth = tcg_temp_new_i64();
*s->gen_opparam_ptr++ = GET_TCGV_I64(reth);
*s->gen_opparam_ptr++ = GET_TCGV_I64(retl);
nb_rets = 2;
} else {
*s->gen_opparam_ptr++ = ret;
nb_rets = 1;
}
#else
if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) {
#ifdef HOST_WORDS_BIGENDIAN
*s->gen_opparam_ptr++ = ret + 1;
*s->gen_opparam_ptr++ = ret;
#else
*s->gen_opparam_ptr++ = ret;
*s->gen_opparam_ptr++ = ret + 1;
#endif
nb_rets = 2;
} else {
*s->gen_opparam_ptr++ = ret;
nb_rets = 1;
}
#endif
} else {
nb_rets = 0;
}
real_args = 0;
for (i = 0; i < nargs; i++) {
int is_64bit = sizemask & (1 << (i+1)*2);
if (TCG_TARGET_REG_BITS < 64 && is_64bit) {
#ifdef TCG_TARGET_CALL_ALIGN_ARGS
/* some targets want aligned 64 bit args */
if (real_args & 1) {
*s->gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
real_args++;
}
#endif
/* If stack grows up, then we will be placing successive
arguments at lower addresses, which means we need to
reverse the order compared to how we would normally
treat either big or little-endian. For those arguments
that will wind up in registers, this still works for
HPPA (the only current STACK_GROWSUP target) since the
argument registers are *also* allocated in decreasing
order. If another such target is added, this logic may
have to get more complicated to differentiate between
stack arguments and register arguments. */
#if defined(HOST_WORDS_BIGENDIAN) != defined(TCG_TARGET_STACK_GROWSUP)
*s->gen_opparam_ptr++ = args[i] + 1;
*s->gen_opparam_ptr++ = args[i];
#else
*s->gen_opparam_ptr++ = args[i];
*s->gen_opparam_ptr++ = args[i] + 1;
#endif
real_args += 2;
continue;
}
*s->gen_opparam_ptr++ = args[i];
real_args++;
}
*s->gen_opparam_ptr++ = (uintptr_t)func;
*s->gen_opparam_ptr++ = flags;
*nparam = (nb_rets << 16) | real_args;
/* total parameters, needed to go backward in the instruction stream */
*s->gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
#if defined(__sparc__) && !defined(__arch64__) \
&& !defined(CONFIG_TCG_INTERPRETER)
/* Free all of the parts we allocated above. */
for (i = real_args = 0; i < orig_nargs; ++i) {
int is_64bit = orig_sizemask & (1 << (i+1)*2);
if (is_64bit) {
TCGv_i32 h = MAKE_TCGV_I32(args[real_args++]);
TCGv_i32 l = MAKE_TCGV_I32(args[real_args++]);
tcg_temp_free_i32(h);
tcg_temp_free_i32(l);
} else {
real_args++;
}
}
if (orig_sizemask & 1) {
/* The 32-bit ABI returned two 32-bit pieces. Re-assemble them.
Note that describing these as TCGv_i64 eliminates an unnecessary
zero-extension that tcg_gen_concat_i32_i64 would create. */
tcg_gen_concat32_i64(MAKE_TCGV_I64(ret), retl, reth);
tcg_temp_free_i64(retl);
tcg_temp_free_i64(reth);
}
#elif defined(TCG_TARGET_EXTEND_ARGS) && TCG_TARGET_REG_BITS == 64
for (i = 0; i < nargs; ++i) {
int is_64bit = sizemask & (1 << (i+1)*2);
if (!is_64bit) {
TCGv_i64 temp = MAKE_TCGV_I64(args[i]);
tcg_temp_free_i64(temp);
}
}
#endif /* TCG_TARGET_EXTEND_ARGS */
}
#if TCG_TARGET_REG_BITS == 32
void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
int c, int right, int arith)
{
if (c == 0) {
tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
} else if (c >= 32) {
c -= 32;
if (right) {
if (arith) {
tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
} else {
tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
}
} else {
tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
tcg_gen_movi_i32(TCGV_LOW(ret), 0);
}
} else {
TCGv_i32 t0, t1;
t0 = tcg_temp_new_i32();
t1 = tcg_temp_new_i32();
if (right) {
tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
if (arith)
tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
else
tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
} else {
tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
/* Note: ret can be the same as arg1, so we use t1 */
tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
tcg_gen_mov_i32(TCGV_LOW(ret), t1);
}
tcg_temp_free_i32(t0);
tcg_temp_free_i32(t1);
}
}
#endif
static inline TCGMemOp tcg_canonicalize_memop(TCGMemOp op, bool is64, bool st)
{
switch (op & MO_SIZE) {
case MO_8:
op &= ~MO_BSWAP;
break;
case MO_16:
break;
case MO_32:
if (!is64) {
op &= ~MO_SIGN;
}
break;
case MO_64:
if (!is64) {
tcg_abort();
}
break;
}
if (st) {
op &= ~MO_SIGN;
}
return op;
}
void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop)
{
memop = tcg_canonicalize_memop(memop, 0, 0);
*tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_ld_i32;
tcg_add_param_i32(val);
tcg_add_param_tl(addr);
*tcg_ctx.gen_opparam_ptr++ = memop;
*tcg_ctx.gen_opparam_ptr++ = idx;
}
void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, TCGMemOp memop)
{
memop = tcg_canonicalize_memop(memop, 0, 1);
*tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_st_i32;
tcg_add_param_i32(val);
tcg_add_param_tl(addr);
*tcg_ctx.gen_opparam_ptr++ = memop;
*tcg_ctx.gen_opparam_ptr++ = idx;
}
void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop)
{
memop = tcg_canonicalize_memop(memop, 1, 0);
#if TCG_TARGET_REG_BITS == 32
if ((memop & MO_SIZE) < MO_64) {
tcg_gen_qemu_ld_i32(TCGV_LOW(val), addr, idx, memop);
if (memop & MO_SIGN) {
tcg_gen_sari_i32(TCGV_HIGH(val), TCGV_LOW(val), 31);
} else {
tcg_gen_movi_i32(TCGV_HIGH(val), 0);
}
return;
}
#endif
*tcg_ctx.gen_opc_ptr++ = INDEX_op_qemu_ld_i64;
tcg_add_param_i64(val);
tcg_add_param_tl(addr);
*tcg_ctx.gen_opparam_ptr++ = memop;
*tcg_ctx.gen_opparam_ptr++ = idx;
}
void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, TCGMemOp memop)
{
memop = tcg_canonicalize_memop(memop, 1, 1);
#if TCG_TARGET_REG_BITS == 32
if ((memop & MO_SIZE) < MO_64) {
tcg_gen_qemu_st_i32(TCGV_LOW(val), addr, idx, memop);
return;
}