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Commits on Jun 16, 2014

• target-ppc: Refactor class init for POWER7/8

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• target-ppc: Switch POWER7/8 classes to use correct PMU SPRs

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• target-ppc: Make use of gen_spr_power5p_lpar() for POWER7/8

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• target-ppc: Make use of gen_spr_book3s_altivec() for POWER7/8

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• target-ppc: Move POWER7/8 CFAR/DSCR/CTRL/PPR/PCR SPR registration to helpers

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• target-ppc: Move POWER8 TCE Address control (TAR) to a helper

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• target-ppc: Move POWER7/8 PIR/PURR/SPURR SPR registration to helpers

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• target-ppc: Enable PMU SPRs migration

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• target-ppc: Remove check_pow_970FX

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• target-ppc: Introduce and reuse generalized init_proc_book3s_64()

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• target-ppc: Add HID4 SPR for PPC970

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• target-ppc: Add PMC7/8 to 970 class

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• target-ppc: Add PMC5/6, SDAR and MMCRA to 970 family

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• target-ppc: Add "POWER" prefix to MMCRA PMU registers

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• target-ppc: Copy and split gen_spr_7xx() for 970

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• target-ppc: Make UCTRL a mirror of CTRL

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• target-ppc: Refactor PPC970

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• target-ppc: Merge 970FX and 970MP into a single 970 class

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• target-ppc: Rename 7XX/60x/74XX/e600 PMU SPRs

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• target-ppc: Fix Temporary Variable Leak in bctar

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  Tom Musta

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• PPC: e500: Merge 32 and 64 bit SPE emulation

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• PPC: spapr: Expose /hypervisor node in device tree

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• KVM: PPC: Expose fixup hcall capability

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• linux-headers: update linux headers to kvm/next

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• linux-headers: include psci.h

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• PPC: SPE: Fix high-bits bitmask

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• PPC: e500: Fix TLB lookup for 32bit CPUs

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• hw/pci-host/ppce500: Fix typo in vmstate definition

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• target-ppc: Store Quadword Conditional Drops Size Bit

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  Tom Musta

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• target-ppc: Confirm That .bss Pages Are Valid

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  Tom Musta

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• target-ppc: Support VSX in PPC User Mode

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  Tom Musta

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• target-ppc: Add a new user mode target for little-endian PPC64.

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• target-ppc: Allow little-endian user mode.

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• target-ppc: Support little-endian PPC64 in user mode.

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• PPC: e500: Fix MMUCSR0 emulation

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  Alex Zuepke

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