Revert "[FastISel][AArch64] Add custom lowering for GEPs."

This breaks our internal build bots. Reverting it to get the bots green again.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@219776 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64FastISel.cpp

@@ -134,7 +134,6 @@ class AArch64FastISel final : public FastISel {
   bool selectBitCast(const Instruction *I);
   bool selectFRem(const Instruction *I);
   bool selectSDiv(const Instruction *I);
-  bool selectGetElementPtr(const Instruction *I);
 
   // Utility helper routines.
   bool isTypeLegal(Type *Ty, MVT &VT);
@@ -4542,88 +4541,6 @@ bool AArch64FastISel::selectSDiv(const Instruction *I) {
   return true;
 }
 
-bool AArch64FastISel::selectGetElementPtr(const Instruction *I) {
-  unsigned N = getRegForValue(I->getOperand(0));
-  if (!N)
-    return false;
-  bool NIsKill = hasTrivialKill(I->getOperand(0));
-
-  // Keep a running tab of the total offset to coalesce multiple N = N + Offset
-  // into a single N = N + TotalOffset.
-  uint64_t TotalOffs = 0;
-  Type *Ty = I->getOperand(0)->getType();
-  MVT VT = TLI.getPointerTy();
-  for (auto OI = std::next(I->op_begin()), E = I->op_end(); OI != E; ++OI) {
-    const Value *Idx = *OI;
-    if (auto *StTy = dyn_cast<StructType>(Ty)) {
-      unsigned Field = cast<ConstantInt>(Idx)->getZExtValue();
-      // N = N + Offset
-      if (Field)
-        TotalOffs += DL.getStructLayout(StTy)->getElementOffset(Field);
-      Ty = StTy->getElementType(Field);
-    } else {
-      Ty = cast<SequentialType>(Ty)->getElementType();
-      // If this is a constant subscript, handle it quickly.
-      if (const auto *CI = dyn_cast<ConstantInt>(Idx)) {
-        if (CI->isZero())
-          continue;
-        // N = N + Offset
-        TotalOffs +=
-            DL.getTypeAllocSize(Ty) * cast<ConstantInt>(CI)->getSExtValue();
-        continue;
-      }
-      if (TotalOffs) {
-        N = emitAddSub_ri(/*UseAdd=*/true, VT, N, NIsKill, TotalOffs);
-        if (!N) {
-          unsigned C = fastEmit_i(VT, VT, ISD::Constant, TotalOffs);
-          if (!C)
-            return false;
-          N = emitAddSub_rr(/*UseAdd=*/true, VT, N, NIsKill, C, true);
-          if (!N)
-            return false;
-        }
-        NIsKill = true;
-        TotalOffs = 0;
-      }
-
-      // N = N + Idx * ElementSize;
-      uint64_t ElementSize = DL.getTypeAllocSize(Ty);
-      std::pair<unsigned, bool> Pair = getRegForGEPIndex(Idx);
-      unsigned IdxN = Pair.first;
-      bool IdxNIsKill = Pair.second;
-      if (!IdxN)
-        return false;
-
-      if (ElementSize != 1) {
-        unsigned C = fastEmit_i(VT, VT, ISD::Constant, ElementSize);
-        if (!C)
-          return false;
-        IdxN = emitMul_rr(VT, IdxN, IdxNIsKill, C, true);
-        if (!IdxN)
-          return false;
-        IdxNIsKill = true;
-      }
-      N = fastEmit_rr(VT, VT, ISD::ADD, N, NIsKill, IdxN, IdxNIsKill);
-      if (!N)
-        return false;
-    }
-  }
-  if (TotalOffs) {
-    N = emitAddSub_ri(/*UseAdd=*/true, VT, N, NIsKill, TotalOffs);
-    if (!N) {
-      unsigned C = fastEmit_i(VT, VT, ISD::Constant, TotalOffs);
-      if (!C)
-        return false;
-      N = emitAddSub_rr(/*UseAdd=*/true, VT, N, NIsKill, C, true);
-      if (!N)
-        return false;
-    }
-  }
-
-  updateValueMap(I, N);
-  return true;
-}
-
 bool AArch64FastISel::fastSelectInstruction(const Instruction *I) {
   switch (I->getOpcode()) {
   default:
@@ -4695,8 +4612,6 @@ bool AArch64FastISel::fastSelectInstruction(const Instruction *I) {
     return selectRet(I);
   case Instruction::FRem:
     return selectFRem(I);
-  case Instruction::GetElementPtr:
-    return selectGetElementPtr(I);
   }
 
   // fall-back to target-independent instruction selection.

test/CodeGen/AArch64/arm64-fast-isel-alloca.ll

@@ -15,8 +15,9 @@ define void @main() nounwind {
 entry:
 ; CHECK: main
 ; CHECK: mov x29, sp
-; CHECK: mov [[REG:x[0-9]+]], sp
-; CHECK-NEXT: add x0, [[REG]], #8
+; CHECK: mov x[[REG:[0-9]+]], sp
+; CHECK-NEXT: orr x[[REG1:[0-9]+]], xzr, #0x8
+; CHECK-NEXT: add x0, x[[REG]], x[[REG1]]
   %E = alloca %struct.S2Ty, align 4
   %B = getelementptr inbounds %struct.S2Ty* %E, i32 0, i32 1
   call void @takeS1(%struct.S1Ty* %B)