diff --git a/.github/scripts/protex.py b/.github/scripts/protex.py new file mode 100644 index 00000000..d4380ce0 --- /dev/null +++ b/.github/scripts/protex.py @@ -0,0 +1,72 @@ +#!/usr/bin/env python +# -*- python -*- +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +import sys +import argparse +import utils +from pathlib import Path + +def setup(): + """This function sets up the script env according to cmd line knobs.""" + parser = argparse.ArgumentParser(description='Protex scan argument parser') + parser.add_argument("--project-id", + action="store", + dest="project_id", + help="Protex project ID") + parser.add_argument("--user", + action="store", + dest="user", + help="Protex username") + parser.add_argument("--pass", + action="store", + dest="pass", + help="Protex password") + parser.add_argument('--tool-path', + dest='bdstool', + help='bdstool path', + type=Path) + parser.add_argument("--url", + action="store", + dest="url", + help="Protex server url") + env = vars(parser.parse_args()) + return env + +if __name__ == '__main__': + + env = setup() + + # login + login_cmd = login_cmd = '{bdstool} --server {url} --user {user} --password {pass} login'.format(**env) + utils.run_subprocess(login_cmd) + + # set XED project (basically chooses which project to analyze and create a new workflow for) + set_project_cmd = '{bdstool} new-project {project_id}'.format(**env) + utils.run_subprocess(set_project_cmd) + + # analyze XED + analyze_cmd = f'{env["bdstool"]} analyze --verbose --path .' + utils.run_subprocess(analyze_cmd) + + # logout + logout_cmd = f'{env["bdstool"]} logout' + utils.run_subprocess(logout_cmd) + + sys.exit(0) diff --git a/.github/scripts/sanity_external.py b/.github/scripts/sanity_external.py index 9c8c15f6..b3b7f085 100644 --- a/.github/scripts/sanity_external.py +++ b/.github/scripts/sanity_external.py @@ -47,17 +47,22 @@ def main(env): commands.append(cmd) # do a build with asserts enabled - host = 'x86-64' - dir = f'obj-assert-{env["pyver"]}-{host}' + host64 = 'x86-64' + dir = f'obj-assert-{env["pyver"]}-{host64}' build_dir = Path(kits_dir, utils.KIT_PREFIX_PATT + dir) - cmd = utils.gen_build_cmd(env, xed_builder, '', build_dir, host, flags + ' --assert') + cmd = utils.gen_build_cmd(env, xed_builder, '', build_dir, host64, flags + ' --assert') + commands.append(cmd) + + # No-future build (For no-APX validation) + dir = f'obj-no-future-{env["pyver"]}-{host64}' + build_dir = Path(kits_dir, utils.KIT_PREFIX_PATT + dir) + cmd = utils.gen_build_cmd(env, xed_builder, '', build_dir, host64, flags + ' --no-future --assert') commands.append(cmd) # Test opt=3 build - host = 'x86-64' - dir = f'obj-opt3-{env["pyver"]}-{host}' + dir = f'obj-opt3-{env["pyver"]}-{host64}' build_dir = Path(kits_dir, utils.KIT_PREFIX_PATT + dir) - cmd = utils.gen_build_cmd(env, xed_builder, '', build_dir, host, flags + ' --opt=3') + cmd = utils.gen_build_cmd(env, xed_builder, '', build_dir, host64, flags + ' --opt=3') commands.append(cmd) # enc2test - test encode-decode path of all instructions diff --git a/.github/workflows/sanity_external.yml b/.github/workflows/sanity_external.yml index c025b8e6..6d128f47 100644 --- a/.github/workflows/sanity_external.yml +++ b/.github/workflows/sanity_external.yml @@ -110,16 +110,15 @@ jobs: env: AV_SCAN_PATH: ${{ secrets.AV_SCAN_PATH }} steps: - - name: Checkout + - name: Checkout xed uses: actions/checkout@v3 with: path: xed - fetch-depth: 0 - name: Checkout mbuild uses: actions/checkout@v3 with: - repository: intel-innersource/libraries.isa.xed.mbuild - ref: ${{ needs.init.outputs.mbuild_branch }} + repository: intelxed/mbuild + ref: main path: mbuild token: ${{ secrets.PAT }} - name: anti-virus check @@ -145,3 +144,46 @@ jobs: repo: context.repo.repo, body: "Anti-virus scan summary: " + antivirusSummary }) + + protex_scan: + needs: init + runs-on: + - self-hosted + - xed-runners + - Linux + env: + PROTEX_BDSTOOL: ${{ secrets.PROTEX_BDSTOOL }} + PROTEX_USERNAME: ${{ secrets.PROTEX_USERNAME }} + PROTEX_PASSWORD: ${{ secrets.PROTEX_PASSWORD }} + PROTEX_SERVER: ${{ secrets.PROTEX_SERVER }} + PROTEX_PROJ_ID: ${{ secrets.PROTEX_PROJECT_ID }} + steps: + - name: Checkout xed + uses: actions/checkout@v3 + with: + path: xed + - name: Checkout mbuild + uses: actions/checkout@v3 + with: + repository: intelxed/mbuild + ref: main + path: mbuild + token: ${{ secrets.PAT }} + - name: protex scan + run: | + cd xed + python3 .github/scripts/protex.py --project-id "${PROTEX_PROJ_ID}" --url "${PROTEX_SERVER}" \ + --user "${PROTEX_USERNAME}" --pass "${PROTEX_PASSWORD}" --tool-path "${PROTEX_BDSTOOL}" + - name: add comment # uploads protex guidance as pull-request comment + uses: actions/github-script@v6 + if: github.event_name == 'pull_request' # add scan summary as comment only if there is a PR + with: + script: | + github.rest.issues.createComment({ + issue_number: context.issue.number, + owner: context.repo.owner, + repo: context.repo.repo, + body: "Protex scan finished; view results at ${{env.PROTEX_SERVER}}" + }) + + diff --git a/VERSION b/VERSION index 0acf299d..29e16554 100644 --- a/VERSION +++ b/VERSION @@ -1 +1 @@ -v2023.07.09 +v2023.08.21 diff --git a/datafiles/apx-f/README.md b/datafiles/apx-f/README.md new file mode 100644 index 00000000..da85ec3e --- /dev/null +++ b/datafiles/apx-f/README.md @@ -0,0 +1,117 @@ +# General +Intel® Advanced Performance Extensions (Intel® APX) expands the Intel® 64 instruction set architecture with +access to more registers and adds various new features that improve general-purpose performance. The +extensions are designed to provide efficient performance gains across a variety of workloads without +significantly increasing silicon area or power consumption of the core. +The main features of Intel® APX include: +• 16 additional general-purpose registers (GPRs) R16–R31, also referred to as Extended GPRs (EGPRs) +in this document; +• Three-operand instruction formats with a new data destination (NDD) register for many integer +instructions; +• Conditional ISA improvements: New conditional load, store and compare instructions, combined +with an option for the compiler to suppress the status flags writes of common instructions; +• Optimized register state save/restore operations; +• A new 64-bit absolute direct jump instruction + +This file describes XED's support status and comments for APX + +## APX instructions definition by XED +#### Legacy +- Instructions with REX2 prefix are not defined with new iforms or new ISA-SETs +#### EVEX +- Existing (non-APX) EVEX instructions with EGPRs are not defined with new iforms or new ISA-SETs +- Promoted and new instructions are defined with new iforms, using the `_apx` suffix +- Introduce new `APX_NDD` XED attribute For NDD (new data destination) instructions with 3 operands +- Introduce new `APX_NF` XED attribute For No-Flags instructions + +# XED support status +## Decoder support +XED decoder currently supports: +#### Legacy +- REX2 prefix and APX extended GPRs (EGPRs) +#### EVEX +- EGPRs decoding for existing instructions +- All APX-Promoted instructions +- All APX new instructions + +## Encoder support +XED encoder supports status: +#### Legacy +- :x: No REX2 support +#### EVEX +- :x: No EGPRs support +- All APX-Promoted instructions +- All APX new instructions. Note: + - {CF,}CMOVcc - Partial support, need to set the NF XED operand for forms with EVEX.NF=1 +#### ENC2 XED module +- :x: No ENC2 support for APX. Users should not use this module for APX encoding + + +## APX CPUID support +XED defines only the Foundational APX CPUID bit for promoted/new EVEX instructions. +APX-Promoted instructions require the equivalent Legacy CPUID as well - Those Legacy +CPUIDs are not listed by XED yet (TBD) + + +## Chip-Check support +XED's chip-check supports the detection of all APX instructions and flavors. +APX instruction can be: +- New APX instruction +- Legacy instruction with REX2 prefix +- EVEX instruction with EGPR as one of its operands (register or memory) +- EVEX instruction with ignored EGPR encoding (EVEX.B4 or EVEX.X4 bit is set but ignored). Such encoding causes illegal instruction on non-APX chips. + + +# Useful APIs +Numerous examples and vivid explanations regarding APX features can be found in the xed-ex1 example tool. + +## Decoder +1. Users can dynamically disable APX support using the `NO_APX` API: + ```c + void xed3_operand_set_no_apx(xed_decoded_inst_t* d, 1) + ``` + The API disables support for all APX architecture, including: + - EGPRs for Legacy instructions (actually disables REX2 support) + - EGPRs for EVEX instructions (for both APX and no-APX instructions). It means no support for the reinterpreted EVEX bits (EGPRs, NDD/NF and more...) + - APX new/promoted EVEX instructions + + + ## Encoder + 1. The `MUST_USE_EVEX` API forces encoding request to the EVEX space. Use it for APX promoted instructions: + + C Library API + ```c + void xed3_operand_set_must_use_evex(xed_decoded_inst_t* d, 1) + ``` + + XED command-line tool + ```bash + $ xed.exe -set MUST_USE_EVEX 1 .... + ``` + +2. Encode request for promoted No-Flags instruction should be built with the `NF` operand: + + C Library API + ```c + void xed3_operand_set_nf(xed_decoded_inst_t* d, 1) + ``` + + XED command-line tool + ```bash + $ xed.exe -set NF 1 .... + ``` + +## CCMPcc/CTESTcc (Encode/Decode) +- Introduce new `DFV` 4-bit pseudo-register for "Default Flags Values" (EVEX.[OF, SF, ZF, CF]) +- The register index represents the default flags bits. For example: `DFV10.index == 10 == 0b1010 -> OF=1, SF=0, ZF=1, CF=0` +- The DFV pseudo-register should be explicitly defined in an encoder request. For example: + ```bash + $ xed -64 -e CCMPB r8b r9b dfv14 + Request: CCMPB MODE:2, REG0:R8B, REG1:R9B, REG2:DFV14, SMODE:2 + OPERAND ORDER: REG0 REG1 REG2 + Encodable! 6254740238C8 + .byte 0x62,0x54,0x74,0x02,0x38,0xc8 + ``` +- the official APX assembly syntax is not support yet. +Current XED syntax is: ` , , ` + diff --git a/datafiles/apx-f/apx-amx-evex-reg-tables.txt b/datafiles/apx-f/apx-amx-evex-reg-tables.txt new file mode 100644 index 00000000..af997300 --- /dev/null +++ b/datafiles/apx-f/apx-amx-evex-reg-tables.txt @@ -0,0 +1,28 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +xed_reg_enum_t TMM_R3():: +REXR4=0 REXR=0 REG=0 | OUTREG=XED_REG_TMM0 +REXR4=0 REXR=0 REG=1 | OUTREG=XED_REG_TMM1 +REXR4=0 REXR=0 REG=2 | OUTREG=XED_REG_TMM2 +REXR4=0 REXR=0 REG=3 | OUTREG=XED_REG_TMM3 +REXR4=0 REXR=0 REG=4 | OUTREG=XED_REG_TMM4 +REXR4=0 REXR=0 REG=5 | OUTREG=XED_REG_TMM5 +REXR4=0 REXR=0 REG=6 | OUTREG=XED_REG_TMM6 +REXR4=0 REXR=0 REG=7 | OUTREG=XED_REG_TMM7 + diff --git a/datafiles/apx-f/apx-error-enum.txt b/datafiles/apx-f/apx-error-enum.txt new file mode 100644 index 00000000..788e5648 --- /dev/null +++ b/datafiles/apx-f/apx-error-enum.txt @@ -0,0 +1,19 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +BAD_REX2_PREFIX ///< A REX2 prefix was found where none is allowed. \ No newline at end of file diff --git a/datafiles/apx-f/apx-evex-dec.txt b/datafiles/apx-f/apx-evex-dec.txt new file mode 100644 index 00000000..6ea8b149 --- /dev/null +++ b/datafiles/apx-f/apx-evex-dec.txt @@ -0,0 +1,48 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +################################################### +# Extends avx512-evex-dec.txt XED NT +# This NT enables EGPRs encoding using the EVEX.R4 bit when APX enabled. +# We're using NT in order to imply #UD on non-apx mode with EGPRs EVEX.R4 instructions + +EVEXR4_ONE():: + ### Extend an existing NT ### + ############# New rules: ############# + NO_APX=0 REXR4=1 | + NO_APX=1 REXR4=1 | error # Not mandatory, but easy to understand + ##### Origin NT will expends to: ##### + # NO_APX=0 REXR4=0 | + # NO_APX=1 REXR4=0 | + # Default: otherwise | error + +################################################### + +EVAPX():: + # 1. Clean legacy-EVEX operands which reinterpreted with APX-promoted instructions. + # 2. Set the EVVSPACE to APX so the encoder will choose the right EVEX path + # 3. Check that the lower MASK bits are zeroed. + # + # (MASK[0-1] == 0) & (MASK[2] == NF) & (APX Enabled) + NO_APX=0 NF=0 MASK=0 | EVEX_APX SCC=0 BCRC=0 + NO_APX=0 NF=1 MASK=4 | EVEX_APX MASK=0 SCC=0 BCRC=0 + # Default: otherwise | error + +EVAPX_SCC():: + # Clear Legacy reinterpreted bits by the SCC field and set EVEX sub-encoding space + true | EVEX_APX_SCC MASK=0 VEXDEST4=0 NF=0 BCRC=0 diff --git a/datafiles/apx-f/apx-evex-enc.txt b/datafiles/apx-f/apx-evex-enc.txt new file mode 100644 index 00000000..257b7f94 --- /dev/null +++ b/datafiles/apx-f/apx-evex-enc.txt @@ -0,0 +1,116 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + + +# This overrides EVEX_ENC_BIND/EMIT SEQUENCE defined by the AVX512F layer +################################################# +SEQUENCE EVEX_ENC_BIND + # R,X,B R map(mmm) (byte 1) + # W, vvvv, U, pp (byte 2) + # AVX512 -> z, LL/RC, b V', aaa ( byte 3) + # APX -> 0, LL , nd V', nf, 00 ( byte 3) + # EVEX_APX_SCC -> 0, 00 , nd ssss ( byte 3) + EVEX_62_REXR_ENC_BIND + EVEX_REXX_ENC_BIND + EVEX_REXB_ENC_BIND + EVEX_REXR4_ENC_BIND + EVEX_MAP_ENC_BIND + EVEX_REXW_VVVV_ENC_BIND + EVEX_U_ENC_BIND + EVEX_PP_ENC_BIND + EVEX_LL_ENC_BIND + EVEX_BYTE3_ENC_BIND + + +SEQUENCE EVEX_ENC_EMIT + EVEX_62_REXR_ENC_EMIT + EVEX_REXX_ENC_EMIT + EVEX_REXB_ENC_EMIT + EVEX_REXR4_ENC_EMIT + EVEX_MAP_ENC_EMIT + EVEX_REXW_VVVV_ENC_EMIT + EVEX_U_ENC_EMIT + EVEX_PP_ENC_EMIT + EVEX_LL_ENC_EMIT + EVEX_BYTE3_ENC_EMIT + + +EVEX_BYTE3_ENC():: +EVVSPACE=0 -> AVX512_EVEX_BYTE3_ENC() # NON-APX instructions +EVEX_APX -> APX_EVEX_BYTE3_ENC() # Default APX EVEX instructions +EVEX_APX_SCC -> APX_CC_EVEX_BYTE3_ENC() # APX CCMP/CTEST instructions + + +APX_EVEX_BYTE3_ENC():: +# New EVEX interpretation for APX instructions +# EVEX.B -> APX.ND +# EVEX.aaa[2] -> APX.NF +VL[ll] ND[d] VEXDEST4=0 NF[f] -> 0b0 ll_d 0b1 f 0b00 +VL[ll] ND[d] VEXDEST4=1 NF[f] -> 0b0 ll_d 0b0 f 0b00 + +APX_CC_EVEX_BYTE3_ENC():: +# New EVEX interpretation for APX CCMP/CTESTinstructions +# EVEX.V4 + EVEX.aaa -> APX.SCC +true ND[d] SCC[ssss] -> 0b000 d ssss + + +EVEX_MAP_ENC():: +### Extend an existing NT ### +MAP=4 -> 0b0100 + + +################ Pattern NTs ################ + +OSZ_NONTERM_ENC():: +### Extend an existing NT ### +# EVEX.W can be used as an opcode extension (mandatory) OR as EOSZ var (scalable +# operand size instructions). SKIP_OSZ=1 means that Wbit is handled as opcode extension. +EVV mode64 EOSZ=3 SKIP_OSZ=1 -> nothing +EVV mode64 EOSZ=3 SKIP_OSZ=0 -> REXW=1 + + +###################################################### +# Mark APX instructions with a spacial APX-EVEX sub-encoding space +# +# The encoder uses it to choose the right EVEX bind/emit +# path (Mainly for Payload #3). + +EVAPX():: + true -> EVEX_APX + +EVAPX_SCC():: + # SSC reinterprets the original EVEX encoding bits (VEXDEST4(V4) and MASK(aaaa)). + # Note the ILD store the inverted VEXDEST4 value, just like the encoded bit. + # -> SCC EVEX encoding sub-space Clear original interpretation + VEXDEST4=1 MASK=0 -> SCC=0 EVEX_APX_SCC VEXDEST4=0 + VEXDEST4=1 MASK=1 -> SCC=1 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=1 MASK=2 -> SCC=2 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=1 MASK=3 -> SCC=3 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=1 MASK=4 -> SCC=4 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=1 MASK=5 -> SCC=5 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=1 MASK=6 -> SCC=6 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=1 MASK=7 -> SCC=7 EVEX_APX_SCC MASK=0 VEXDEST4=0 + VEXDEST4=0 MASK=0 -> SCC=8 EVEX_APX_SCC + VEXDEST4=0 MASK=1 -> SCC=9 EVEX_APX_SCC MASK=0 + VEXDEST4=0 MASK=2 -> SCC=10 EVEX_APX_SCC MASK=0 + VEXDEST4=0 MASK=3 -> SCC=11 EVEX_APX_SCC MASK=0 + VEXDEST4=0 MASK=4 -> SCC=12 EVEX_APX_SCC MASK=0 + VEXDEST4=0 MASK=5 -> SCC=13 EVEX_APX_SCC MASK=0 + VEXDEST4=0 MASK=6 -> SCC=14 EVEX_APX_SCC MASK=0 + VEXDEST4=0 MASK=7 -> SCC=15 EVEX_APX_SCC MASK=0 +###################################################### diff --git a/datafiles/apx-f/apx-evex-maps.txt b/datafiles/apx-f/apx-evex-maps.txt new file mode 100644 index 00000000..b0c93671 --- /dev/null +++ b/datafiles/apx-f/apx-evex-maps.txt @@ -0,0 +1,21 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +# name space esc mapopc mapno modrm disp imm opcpos pattern +evex-map4 evex N/A N/A 4 yes no var 1 'MAP4' + diff --git a/datafiles/apx-f/apx-evgpr-reg-tables.txt b/datafiles/apx-f/apx-evgpr-reg-tables.txt new file mode 100644 index 00000000..22de6c49 --- /dev/null +++ b/datafiles/apx-f/apx-evgpr-reg-tables.txt @@ -0,0 +1,300 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + + +############################################################### +# Support APX EGPRs with the EVEX.vvvvv encoding field +############################################################### +############################################################### +# Historicity, we use VGPR*_N() NT for both VEX and EVEX instructions as the fifth +# EVEX.v bit was not in use (max 16 GPRs). +# Now, with EGPRs support, we should check all five EVEX.vvvvv bits. +# Create a new operand NT and separates the *GPR*_N NT to VEX and EVEX +# versions. +############################################################### +# GPRs/EGPRs encoded with EVEX.vvvvv. Available only with APX mode64 + +xed_reg_enum_t VGPRv_N3():: +EOSZ=1 | OUTREG=VGPR16_N3() +EOSZ=2 | OUTREG=VGPR32_N3() +EOSZ=3 | OUTREG=VGPR64_N3() + + +xed_reg_enum_t VGPR8_N3():: +mode64 | OUTREG=VGPR8_N3_64() + +xed_reg_enum_t VGPR16_N3():: +mode64 | OUTREG=VGPR16_N3_64() + +xed_reg_enum_t VGPR32_N3():: +mode64 | OUTREG=VGPR32_N3_64() + +xed_reg_enum_t VGPR64_N3():: +mode64 | OUTREG=VGPR64_N3_64() + + +# It's odd but XED ILD stores the exact bits values of VEXDEST[0-3] and inverts +# the VEXDEST4 bit. +xed_reg_enum_t VGPR64_N3_64():: +VEXDEST4=0 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_RAX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_RCX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_RDX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_RBX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_RSP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_RBP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_RSI +VEXDEST4=0 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_RDI +VEXDEST4=0 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R8 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R9 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R10 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R11 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R12 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R13 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R14 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R15 + +VEXDEST4=1 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_R16 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_R17 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_R18 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_R19 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_R20 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_R21 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_R22 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_R23 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R24 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R25 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R26 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R27 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R28 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R29 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R30 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R31 HAS_EGPR=1 + + + +xed_reg_enum_t VGPR32_N3_64():: +VEXDEST4=0 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_EAX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_ECX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_EDX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_EBX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_ESP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_EBP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_ESI +VEXDEST4=0 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_EDI +VEXDEST4=0 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R8D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R9D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R10D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R11D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R12D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R13D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R14D +VEXDEST4=0 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R15D + +VEXDEST4=1 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_R16D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_R17D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_R18D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_R19D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_R20D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_R21D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_R22D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_R23D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R24D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R25D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R26D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R27D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R28D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R29D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R30D HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R31D HAS_EGPR=1 + + + +xed_reg_enum_t VGPR16_N3_64():: +VEXDEST4=0 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_AX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_CX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_DX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_BX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_SP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_BP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_SI +VEXDEST4=0 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_DI +VEXDEST4=0 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R8W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R9W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R10W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R11W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R12W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R13W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R14W +VEXDEST4=0 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R15W + +VEXDEST4=1 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_R16W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_R17W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_R18W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_R19W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_R20W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_R21W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_R22W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_R23W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R24W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R25W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R26W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R27W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R28W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R29W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R30W HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R31W HAS_EGPR=1 + + + +xed_reg_enum_t VGPR8_N3_64():: +VEXDEST4=0 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_AL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_CL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_DL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_BL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_SPL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_BPL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_SIL +VEXDEST4=0 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_DIL + +VEXDEST4=0 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R8B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R9B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R10B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R11B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R12B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R13B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R14B +VEXDEST4=0 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R15B + +VEXDEST4=1 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_R16B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_R17B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_R18B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_R19B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_R20B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_R21B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_R22B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_R23B HAS_EGPR=1 + +VEXDEST4=1 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R24B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R25B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R26B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R27B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R28B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R29B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R30B HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R31B HAS_EGPR=1 + + + +########## APX POP2/PUSH2 ########## + +xed_reg_enum_t VGPR64_N3_NORSP():: +VEXDEST4=0 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_RAX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_RCX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_RDX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_RBX +VEXDEST4=0 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_ERROR # NO RSP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_RBP +VEXDEST4=0 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_RSI +VEXDEST4=0 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_RDI +VEXDEST4=0 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R8 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R9 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R10 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R11 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R12 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R13 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R14 +VEXDEST4=0 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R15 +#EGPRs +VEXDEST4=1 VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_R16 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_R17 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_R18 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_R19 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_R20 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_R21 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_R22 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_R23 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_R24 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_R25 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_R26 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_R27 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_R28 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_R29 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_R30 HAS_EGPR=1 +VEXDEST4=1 VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_R31 HAS_EGPR=1 + + +xed_reg_enum_t GPR64_B_NORSP():: +REXB4=0 REXB=0 RM=0x0 | OUTREG=XED_REG_RAX +REXB4=0 REXB=0 RM=0x1 | OUTREG=XED_REG_RCX +REXB4=0 REXB=0 RM=0x2 | OUTREG=XED_REG_RDX +REXB4=0 REXB=0 RM=0x3 | OUTREG=XED_REG_RBX +REXB4=0 REXB=0 RM=0x4 | OUTREG=XED_REG_ERROR # No RSP +REXB4=0 REXB=0 RM=0x5 | OUTREG=XED_REG_RBP +REXB4=0 REXB=0 RM=0x6 | OUTREG=XED_REG_RSI +REXB4=0 REXB=0 RM=0x7 | OUTREG=XED_REG_RDI +REXB4=0 REXB=1 RM=0x0 | OUTREG=XED_REG_R8 +REXB4=0 REXB=1 RM=0x1 | OUTREG=XED_REG_R9 +REXB4=0 REXB=1 RM=0x2 | OUTREG=XED_REG_R10 +REXB4=0 REXB=1 RM=0x3 | OUTREG=XED_REG_R11 +REXB4=0 REXB=1 RM=0x4 | OUTREG=XED_REG_R12 +REXB4=0 REXB=1 RM=0x5 | OUTREG=XED_REG_R13 +REXB4=0 REXB=1 RM=0x6 | OUTREG=XED_REG_R14 +REXB4=0 REXB=1 RM=0x7 | OUTREG=XED_REG_R15 +#EGPRs +REXB4=1 REXB=0 RM=0x0 | OUTREG=XED_REG_R16 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x1 | OUTREG=XED_REG_R17 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x2 | OUTREG=XED_REG_R18 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x3 | OUTREG=XED_REG_R19 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x4 | OUTREG=XED_REG_R20 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x5 | OUTREG=XED_REG_R21 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x6 | OUTREG=XED_REG_R22 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x7 | OUTREG=XED_REG_R23 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x0 | OUTREG=XED_REG_R24 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x1 | OUTREG=XED_REG_R25 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x2 | OUTREG=XED_REG_R26 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x3 | OUTREG=XED_REG_R27 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x4 | OUTREG=XED_REG_R28 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x5 | OUTREG=XED_REG_R29 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x6 | OUTREG=XED_REG_R30 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x7 | OUTREG=XED_REG_R31 HAS_EGPR=1 + + + +######################################################## + +xed_reg_enum_t DFV():: +# Enumeration for EVEX.[OF, SF, ZF, CF] default flags. +# The register index represents the default flags values. For example: +# DFV10.index == 10 == 0b1010 -> OF=1, SF=0, ZF=1, CF=0 +VEXDEST3=0 VEXDEST210=0 | OUTREG=XED_REG_DFV0 +VEXDEST3=0 VEXDEST210=1 | OUTREG=XED_REG_DFV1 +VEXDEST3=0 VEXDEST210=2 | OUTREG=XED_REG_DFV2 +VEXDEST3=0 VEXDEST210=3 | OUTREG=XED_REG_DFV3 +VEXDEST3=0 VEXDEST210=4 | OUTREG=XED_REG_DFV4 +VEXDEST3=0 VEXDEST210=5 | OUTREG=XED_REG_DFV5 +VEXDEST3=0 VEXDEST210=6 | OUTREG=XED_REG_DFV6 +VEXDEST3=0 VEXDEST210=7 | OUTREG=XED_REG_DFV7 + +VEXDEST3=1 VEXDEST210=0 | OUTREG=XED_REG_DFV8 +VEXDEST3=1 VEXDEST210=1 | OUTREG=XED_REG_DFV9 +VEXDEST3=1 VEXDEST210=2 | OUTREG=XED_REG_DFV10 +VEXDEST3=1 VEXDEST210=3 | OUTREG=XED_REG_DFV11 +VEXDEST3=1 VEXDEST210=4 | OUTREG=XED_REG_DFV12 +VEXDEST3=1 VEXDEST210=5 | OUTREG=XED_REG_DFV13 +VEXDEST3=1 VEXDEST210=6 | OUTREG=XED_REG_DFV14 +VEXDEST3=1 VEXDEST210=7 | OUTREG=XED_REG_DFV15 diff --git a/datafiles/apx-f/apx-f-amx-isa.xed.txt b/datafiles/apx-f/apx-f-amx-isa.xed.txt new file mode 100644 index 00000000..2fc343d5 --- /dev/null +++ b/datafiles/apx-f/apx-f-amx-isa.xed.txt @@ -0,0 +1,107 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL +# +# +# +# ***** GENERATED FILE -- DO NOT EDIT! ***** +# ***** GENERATED FILE -- DO NOT EDIT! ***** +# ***** GENERATED FILE -- DO NOT EDIT! ***** +# +# +# +EVEX_INSTRUCTIONS():: +# EMITTING LDTILECFG (LDTILECFG-128-2) +{ +ICLASS: LDTILECFG +CPL: 3 +CATEGORY: AMX_TILE +EXTENSION: AMX_TILE +ISA_SET: APX_F_AMX +EXCEPTIONS: AMX-E1-EVEX +REAL_OPCODE: Y +ATTRIBUTES: NOTSX +PATTERN: EVV 0x49 VNP V0F38 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 VL128 mode64 NOEVSR ZEROING=0 MASK=0 +OPERANDS: MEM0:r:zd +IFORM: LDTILECFG_MEM_APX +} + + +# EMITTING STTILECFG (STTILECFG-128-2) +{ +ICLASS: STTILECFG +CPL: 3 +CATEGORY: AMX_TILE +EXTENSION: AMX_TILE +ISA_SET: APX_F_AMX +EXCEPTIONS: AMX-E2-EVEX +REAL_OPCODE: Y +ATTRIBUTES: NOTSX +PATTERN: EVV 0x49 V66 V0F38 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() BCRC=0 UBIT=1 W0 VL128 mode64 NOEVSR ZEROING=0 MASK=0 +OPERANDS: MEM0:w:zd +IFORM: STTILECFG_MEM_APX +} + + +# EMITTING TILELOADD (TILELOADD-128-2) +{ +ICLASS: TILELOADD +CPL: 3 +CATEGORY: AMX_TILE +EXTENSION: AMX_TILE +ISA_SET: APX_F_AMX +EXCEPTIONS: AMX-E3-EVEX +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE NOTSX SPECIAL_AGEN_REQUIRED +PATTERN: EVV 0x4B VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] MODRM() BCRC=0 UBIT=1 W0 VL128 mode64 NOEVSR ZEROING=0 MASK=0 +OPERANDS: REG0=TMM_R3():w:tv:u32 MEM0:r:ptr:u32 +IFORM: TILELOADD_TMMu32_MEMu32_APX +} + + +# EMITTING TILELOADDT1 (TILELOADDT1-128-2) +{ +ICLASS: TILELOADDT1 +CPL: 3 +CATEGORY: AMX_TILE +EXTENSION: AMX_TILE +ISA_SET: APX_F_AMX +EXCEPTIONS: AMX-E3-EVEX +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE NOTSX SPECIAL_AGEN_REQUIRED +PATTERN: EVV 0x4B V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] MODRM() BCRC=0 UBIT=1 W0 VL128 mode64 NOEVSR ZEROING=0 MASK=0 +OPERANDS: REG0=TMM_R3():w:tv:u32 MEM0:r:ptr:u32 +IFORM: TILELOADDT1_TMMu32_MEMu32_APX +} + + +# EMITTING TILESTORED (TILESTORED-128-2) +{ +ICLASS: TILESTORED +CPL: 3 +CATEGORY: AMX_TILE +EXTENSION: AMX_TILE +ISA_SET: APX_F_AMX +EXCEPTIONS: AMX-E3-EVEX +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE NOTSX SPECIAL_AGEN_REQUIRED +PATTERN: EVV 0x4B VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[0b100] MODRM() BCRC=0 UBIT=1 W0 VL128 mode64 NOEVSR ZEROING=0 MASK=0 +OPERANDS: MEM0:w:ptr:u32 REG0=TMM_R3():r:tv:u32 +IFORM: TILESTORED_MEMu32_TMMu32_APX +} + + diff --git a/datafiles/apx-f/apx-f-isa.xed.txt b/datafiles/apx-f/apx-f-isa.xed.txt new file mode 100644 index 00000000..641eb17e --- /dev/null +++ b/datafiles/apx-f/apx-f-isa.xed.txt @@ -0,0 +1,37583 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL +# +# +# +# ***** GENERATED FILE -- DO NOT EDIT! ***** +# ***** GENERATED FILE -- DO NOT EDIT! ***** +# ***** GENERATED FILE -- DO NOT EDIT! ***** +# +# +# +EVEX_INSTRUCTIONS():: +# EMITTING ADC (ADC-128-1) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x10 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: ADC_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x10 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: ADC_MEMi8_GPR8i8_APX +} + + +# EMITTING ADC (ADC-128-10) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: ADC_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: ADC_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ADC (ADC-128-11) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x10 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: ADC_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x10 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: ADC_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING ADC (ADC-128-12) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x11 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: ADC_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x11 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: ADC_MEMv_GPRv_APX +} + + +# EMITTING ADC (ADC-128-13) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x11 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: ADC_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x11 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: ADC_MEMv_GPRv_APX +} + + +# EMITTING ADC (ADC-128-14) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x11 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: ADC_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x11 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: ADC_GPRv_MEMv_GPRv_APX +} + + +# EMITTING ADC (ADC-128-15) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x11 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: ADC_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x11 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: ADC_GPRv_MEMv_GPRv_APX +} + + +# EMITTING ADC (ADC-128-16) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x12 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: ADC_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x12 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: ADC_GPR8i8_MEMi8_APX +} + + +# EMITTING ADC (ADC-128-17) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x12 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: ADC_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x12 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: ADC_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING ADC (ADC-128-18) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x13 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: ADC_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x13 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: ADC_GPRv_MEMv_APX +} + + +# EMITTING ADC (ADC-128-19) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x13 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: ADC_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x13 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: ADC_GPRv_MEMv_APX +} + + +# EMITTING ADC (ADC-128-2) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: ADC_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: ADC_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ADC (ADC-128-20) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x13 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: ADC_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x13 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: ADC_GPRv_GPRv_MEMv_APX +} + + +# EMITTING ADC (ADC-128-21) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x13 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: ADC_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x13 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: ADC_GPRv_GPRv_MEMv_APX +} + + +# EMITTING ADC (ADC-128-22) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: ADC_GPR8i8_IMM8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: ADC_MEMi8_IMM8_APX +} + + +# EMITTING ADC (ADC-128-3) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: ADC_GPRv_IMMz_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: ADC_MEMv_IMMz_APX +} + + +# EMITTING ADC (ADC-128-4) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: ADC_GPRv_IMMz_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: ADC_MEMv_IMMz_APX +} + + +# EMITTING ADC (ADC-128-5) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: ADC_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: ADC_GPRv_MEMv_IMMz_APX +} + + +# EMITTING ADC (ADC-128-6) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: ADC_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: ADC_GPRv_MEMv_IMMz_APX +} + + +# EMITTING ADC (ADC-128-7) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: ADC_GPRv_IMM8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: ADC_MEMv_IMM8_APX +} + + +# EMITTING ADC (ADC-128-8) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: ADC_GPRv_IMM8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: ADC_MEMv_IMM8_APX +} + + +# EMITTING ADC (ADC-128-9) +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: ADC_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ADC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: ADC_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ADCX (ADCX-128-1) +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +PATTERN: EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():rw:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: ADCX_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():rw:d:i32 MEM0:r:d:i32 +IFORM: ADCX_GPR32i32_MEMi32_APX +} + + +# EMITTING ADCX (ADCX-128-2) +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +PATTERN: EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():rw:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: ADCX_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():rw:q:i64 MEM0:r:q:i64 +IFORM: ADCX_GPR64i64_MEMi64_APX +} + + +# EMITTING ADCX (ADCX-128-3) +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 REG2=GPR32_B():r:d:i32 +IFORM: ADCX_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 MEM0:r:d:i32 +IFORM: ADCX_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING ADCX (ADCX-128-4) +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x66 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 REG2=GPR64_B():r:q:i64 +IFORM: ADCX_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: ADCX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x66 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 MEM0:r:q:i64 +IFORM: ADCX_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING ADD (ADD-128-1-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: ADD_MEMi8_GPR8i8_APX +} + + +# EMITTING ADD (ADD-128-1-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: ADD_MEMi8_GPR8i8_APX +} + + +# EMITTING ADD (ADD-128-10-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-10-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-11-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: ADD_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING ADD (ADD-128-11-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x00 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x00 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: ADD_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING ADD (ADD-128-12-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: ADD_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-12-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: ADD_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-13-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: ADD_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-13-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: ADD_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-14-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-14-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x01 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x01 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-15-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-15-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x01 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x01 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: ADD_GPRv_MEMv_GPRv_APX +} + + +# EMITTING ADD (ADD-128-16-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: ADD_GPR8i8_MEMi8_APX +} + + +# EMITTING ADD (ADD-128-16-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: ADD_GPR8i8_MEMi8_APX +} + + +# EMITTING ADD (ADD-128-17-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING ADD (ADD-128-17-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x02 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x02 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING ADD (ADD-128-18-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: ADD_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-18-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: ADD_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-19-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: ADD_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-19-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: ADD_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-2-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: ADD_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ADD (ADD-128-2-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: ADD_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: ADD_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ADD (ADD-128-20-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: ADD_GPRv_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-20-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x03 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x03 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: ADD_GPRv_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-21-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: ADD_GPRv_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-21-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x03 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: ADD_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x03 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: ADD_GPRv_GPRv_MEMv_APX +} + + +# EMITTING ADD (ADD-128-22-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: ADD_GPR8i8_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: ADD_MEMi8_IMM8_APX +} + + +# EMITTING ADD (ADD-128-22-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: ADD_GPR8i8_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: ADD_MEMi8_IMM8_APX +} + + +# EMITTING ADD (ADD-128-3-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: ADD_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: ADD_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-3-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: ADD_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: ADD_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-4-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: ADD_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: ADD_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-4-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: ADD_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: ADD_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-5-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: ADD_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: ADD_GPRv_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-5-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: ADD_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: ADD_GPRv_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-6-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: ADD_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: ADD_GPRv_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-6-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: ADD_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: ADD_GPRv_MEMv_IMMz_APX +} + + +# EMITTING ADD (ADD-128-7-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: ADD_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: ADD_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-7-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: ADD_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: ADD_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-8-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: ADD_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: ADD_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-8-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: ADD_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: ADD_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-9-nf0) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ADD (ADD-128-9-nf1) +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ADD +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: ADD_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ADOX (ADOX-128-1) +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +PATTERN: EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():rw:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: ADOX_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():rw:d:i32 MEM0:r:d:i32 +IFORM: ADOX_GPR32i32_MEMi32_APX +} + + +# EMITTING ADOX (ADOX-128-2) +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +PATTERN: EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():rw:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: ADOX_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():rw:q:i64 MEM0:r:q:i64 +IFORM: ADOX_GPR64i64_MEMi64_APX +} + + +# EMITTING ADOX (ADOX-128-3) +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 REG2=GPR32_B():r:d:i32 +IFORM: ADOX_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_R():r:d:i32 MEM0:r:d:i32 +IFORM: ADOX_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING ADOX (ADOX-128-4) +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x66 VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 REG2=GPR64_B():r:q:i64 +IFORM: ADOX_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: ADOX +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-TST OF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x66 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_R():r:q:i64 MEM0:r:q:i64 +IFORM: ADOX_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING AESDEC128KL (AESDEC128KL-128-1) +{ +ICLASS: AESDEC128KL +CPL: 3 +CATEGORY: KEYLOCKER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xDD VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:u8 MEM0:r:m384:u8 +IFORM: AESDEC128KL_XMMu8_MEMu8_APX +} + + +# EMITTING AESDEC256KL (AESDEC256KL-128-1) +{ +ICLASS: AESDEC256KL +CPL: 3 +CATEGORY: KEYLOCKER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xDF VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:u8 MEM0:r:zd0:u8 +IFORM: AESDEC256KL_XMMu8_MEMu8_APX +} + + +# EMITTING AESDECWIDE128KL (AESDECWIDE128KL-128-1) +{ +ICLASS: AESDECWIDE128KL +CPL: 3 +CATEGORY: KEYLOCKER_WIDE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:m384:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8 +IFORM: AESDECWIDE128KL_MEMu8_APX +} + + +# EMITTING AESDECWIDE256KL (AESDECWIDE256KL-128-1) +{ +ICLASS: AESDECWIDE256KL +CPL: 3 +CATEGORY: KEYLOCKER_WIDE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:zd0:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8 +IFORM: AESDECWIDE256KL_MEMu8_APX +} + + +# EMITTING AESENC128KL (AESENC128KL-128-1) +{ +ICLASS: AESENC128KL +CPL: 3 +CATEGORY: KEYLOCKER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xDC VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:u8 MEM0:r:m384:u8 +IFORM: AESENC128KL_XMMu8_MEMu8_APX +} + + +# EMITTING AESENC256KL (AESENC256KL-128-1) +{ +ICLASS: AESENC256KL +CPL: 3 +CATEGORY: KEYLOCKER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xDE VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:u8 MEM0:r:zd0:u8 +IFORM: AESENC256KL_XMMu8_MEMu8_APX +} + + +# EMITTING AESENCWIDE128KL (AESENCWIDE128KL-128-1) +{ +ICLASS: AESENCWIDE128KL +CPL: 3 +CATEGORY: KEYLOCKER_WIDE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:m384:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8 +IFORM: AESENCWIDE128KL_MEMu8_APX +} + + +# EMITTING AESENCWIDE256KL (AESENCWIDE256KL-128-1) +{ +ICLASS: AESENCWIDE256KL +CPL: 3 +CATEGORY: KEYLOCKER_WIDE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod of-0 sf-0 af-0 pf-0 cf-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD8 VF3 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:zd0:u8 REG0=XED_REG_XMM0:rw:SUPP:dq:u8 REG1=XED_REG_XMM1:rw:SUPP:dq:u8 REG2=XED_REG_XMM2:rw:SUPP:dq:u8 REG3=XED_REG_XMM3:rw:SUPP:dq:u8 REG4=XED_REG_XMM4:rw:SUPP:dq:u8 REG5=XED_REG_XMM5:rw:SUPP:dq:u8 REG6=XED_REG_XMM6:rw:SUPP:dq:u8 REG7=XED_REG_XMM7:rw:SUPP:dq:u8 +IFORM: AESENCWIDE256KL_MEMu8_APX +} + + +# EMITTING AND (AND-128-1-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: AND_MEMi8_GPR8i8_APX +} + + +# EMITTING AND (AND-128-1-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: AND_MEMi8_GPR8i8_APX +} + + +# EMITTING AND (AND-128-10-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: AND_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: AND_GPRv_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-10-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: AND_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: AND_GPRv_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-11-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: AND_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING AND (AND-128-11-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x20 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x20 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: AND_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING AND (AND-128-12-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: AND_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-12-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: AND_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-13-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: AND_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-13-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: AND_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-14-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-14-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x21 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x21 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-15-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-15-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x21 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x21 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: AND_GPRv_MEMv_GPRv_APX +} + + +# EMITTING AND (AND-128-16-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: AND_GPR8i8_MEMi8_APX +} + + +# EMITTING AND (AND-128-16-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: AND_GPR8i8_MEMi8_APX +} + + +# EMITTING AND (AND-128-17-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING AND (AND-128-17-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x22 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x22 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING AND (AND-128-18-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: AND_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-18-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: AND_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-19-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: AND_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-19-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: AND_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-2-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: AND_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING AND (AND-128-2-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: AND_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: AND_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING AND (AND-128-20-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: AND_GPRv_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-20-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x23 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x23 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: AND_GPRv_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-21-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: AND_GPRv_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-21-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x23 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: AND_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x23 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: AND_GPRv_GPRv_MEMv_APX +} + + +# EMITTING AND (AND-128-22-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: AND_GPR8i8_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: AND_MEMi8_IMM8_APX +} + + +# EMITTING AND (AND-128-22-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: AND_GPR8i8_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: AND_MEMi8_IMM8_APX +} + + +# EMITTING AND (AND-128-3-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: AND_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: AND_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-3-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: AND_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: AND_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-4-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: AND_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: AND_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-4-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: AND_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: AND_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-5-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: AND_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: AND_GPRv_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-5-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: AND_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: AND_GPRv_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-6-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: AND_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: AND_GPRv_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-6-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: AND_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: AND_GPRv_MEMv_IMMz_APX +} + + +# EMITTING AND (AND-128-7-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: AND_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: AND_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-7-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: AND_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: AND_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-8-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: AND_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: AND_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-8-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: AND_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: AND_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-9-nf0) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: AND_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: AND_GPRv_MEMv_IMM8_APX +} + + +# EMITTING AND (AND-128-9-nf1) +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: AND_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: AND +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: AND_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ANDN (ANDN-128-1-nf0) +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +PATTERN: EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32 +IFORM: ANDN_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32 +IFORM: ANDN_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING ANDN (ANDN-128-1-nf1) +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32 +IFORM: ANDN_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32 +IFORM: ANDN_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING ANDN (ANDN-128-2-nf0) +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +PATTERN: EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64 +IFORM: ANDN_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64 +IFORM: ANDN_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING ANDN (ANDN-128-2-nf1) +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF2 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64 +IFORM: ANDN_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: ANDN +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF2 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64 +IFORM: ANDN_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING BEXTR (BEXTR-128-1-nf0) +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ] +PATTERN: EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: BEXTR_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: BEXTR_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING BEXTR (BEXTR-128-1-nf1) +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: BEXTR_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: BEXTR_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING BEXTR (BEXTR-128-2-nf0) +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ] +PATTERN: EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: BEXTR_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: BEXTR_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING BEXTR (BEXTR-128-2-nf1) +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: BEXTR_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BEXTR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: BEXTR_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING BLSI (BLSI-128-1-nf0) +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: BLSI_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32 +IFORM: BLSI_GPR32i32_MEMi32_APX +} + + +# EMITTING BLSI (BLSI-128-1-nf1) +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: BLSI_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32 +IFORM: BLSI_GPR32i32_MEMi32_APX +} + + +# EMITTING BLSI (BLSI-128-2-nf0) +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: BLSI_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64 +IFORM: BLSI_GPR64i64_MEMi64_APX +} + + +# EMITTING BLSI (BLSI-128-2-nf1) +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: BLSI_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BLSI +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64 +IFORM: BLSI_GPR64i64_MEMi64_APX +} + + +# EMITTING BLSMSK (BLSMSK-128-1-nf0) +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: BLSMSK_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32 +IFORM: BLSMSK_GPR32i32_MEMi32_APX +} + + +# EMITTING BLSMSK (BLSMSK-128-1-nf1) +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: BLSMSK_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32 +IFORM: BLSMSK_GPR32i32_MEMi32_APX +} + + +# EMITTING BLSMSK (BLSMSK-128-2-nf0) +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: BLSMSK_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-0 AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64 +IFORM: BLSMSK_GPR64i64_MEMi64_APX +} + + +# EMITTING BLSMSK (BLSMSK-128-2-nf1) +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: BLSMSK_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BLSMSK +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64 +IFORM: BLSMSK_GPR64i64_MEMi64_APX +} + + +# EMITTING BLSR (BLSR-128-1-nf0) +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: BLSR_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32 +IFORM: BLSR_GPR32i32_MEMi32_APX +} + + +# EMITTING BLSR (BLSR-128-1-nf1) +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 REG1=GPR32_B():r:d:i32 +IFORM: BLSR_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR32_N3():w:d:i32 MEM0:r:d:i32 +IFORM: BLSR_GPR32i32_MEMi32_APX +} + + +# EMITTING BLSR (BLSR-128-2-nf0) +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: BLSR_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64 +IFORM: BLSR_GPR64i64_MEMi64_APX +} + + +# EMITTING BLSR (BLSR-128-2-nf1) +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF3 VNP V0F38 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 REG1=GPR64_B():r:q:i64 +IFORM: BLSR_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BLSR +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF3 VNP V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3():w:q:i64 MEM0:r:q:i64 +IFORM: BLSR_GPR64i64_MEMi64_APX +} + + +# EMITTING BZHI (BZHI-128-1-nf0) +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: BZHI_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: BZHI_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING BZHI (BZHI-128-1-nf1) +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: BZHI_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: BZHI_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING BZHI (BZHI-128-2-nf0) +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: BZHI_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: BZHI_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING BZHI (BZHI-128-2-nf1) +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF5 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: BZHI_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: BZHI +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF5 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: BZHI_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING CCMPB (CCMPB-128-1) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPB_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPB_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-10) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPB_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPB_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-11) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPB_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPB_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-2) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-3) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-4) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPB_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPB_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-5) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPB_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-6) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPB_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-7) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPB_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPB_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-8) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPB (CCMPB-128-9) +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-1) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPBE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPBE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-10) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPBE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPBE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-11) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPBE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPBE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-2) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-3) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-4) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPBE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPBE_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-5) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPBE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-6) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPBE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-7) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPBE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPBE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-8) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPBE (CCMPBE-128-9) +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-1) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPF_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPF_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-10) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPF_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPF_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-11) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPF_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPF_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-2) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPF_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPF_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-3) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPF_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPF_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-4) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPF_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPF_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-5) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPF_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPF_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-6) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPF_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPF_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-7) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPF_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPF_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-8) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPF_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPF_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPF (CCMPF-128-9) +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPF_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPF_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-1) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPL_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPL_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-10) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPL_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPL_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-11) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPL_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPL_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-2) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-3) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-4) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPL_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPL_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-5) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPL_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-6) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPL_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-7) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPL_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPL_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-8) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPL (CCMPL-128-9) +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-1) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPLE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPLE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-10) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPLE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPLE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-11) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPLE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPLE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-2) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-3) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-4) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPLE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPLE_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-5) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPLE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-6) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPLE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-7) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPLE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPLE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-8) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPLE (CCMPLE-128-9) +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-1) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNB_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNB_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-10) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNB_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNB_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-11) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNB_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNB_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-2) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-3) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-4) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNB_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNB_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-5) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNB_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-6) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNB_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-7) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNB_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNB_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-8) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNB (CCMPNB-128-9) +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-1) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNBE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNBE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-10) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNBE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNBE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-11) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNBE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNBE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-2) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-3) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-4) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNBE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNBE_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-5) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNBE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-6) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNBE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-7) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNBE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNBE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-8) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNBE (CCMPNBE-128-9) +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-1) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNL_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNL_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-10) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNL_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNL_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-11) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNL_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNL_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-2) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-3) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-4) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNL_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNL_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-5) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNL_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-6) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNL_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-7) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNL_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNL_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-8) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNL (CCMPNL-128-9) +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-1) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNLE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNLE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-10) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNLE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNLE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-11) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNLE_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNLE_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-2) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-3) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-4) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNLE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNLE_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-5) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNLE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-6) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNLE_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-7) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNLE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNLE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-8) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNLE (CCMPNLE-128-9) +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-1) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNO_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNO_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-10) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNO_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNO_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-11) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNO_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNO_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-2) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-3) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-4) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNO_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNO_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-5) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNO_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-6) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNO_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-7) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNO_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNO_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-8) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNO (CCMPNO-128-9) +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-1) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNS_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNS_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-10) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNS_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNS_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-11) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNS_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNS_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-2) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-3) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-4) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNS_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNS_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-5) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNS_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-6) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNS_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-7) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNS_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNS_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-8) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNS (CCMPNS-128-9) +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-1) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPNZ_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPNZ_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-10) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNZ_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNZ_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-11) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNZ_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNZ_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-2) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-3) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPNZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPNZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-4) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPNZ_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNZ_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-5) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNZ_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-6) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPNZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPNZ_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-7) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPNZ_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPNZ_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-8) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPNZ (CCMPNZ-128-9) +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPNZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPNZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-1) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPO_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPO_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-10) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPO_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPO_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-11) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPO_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPO_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-2) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-3) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-4) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPO_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPO_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-5) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPO_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-6) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPO_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-7) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPO_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPO_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-8) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPO (CCMPO-128-9) +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-1) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPS_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPS_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-10) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPS_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPS_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-11) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPS_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPS_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-2) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-3) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-4) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPS_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPS_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-5) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPS_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-6) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPS_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-7) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPS_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPS_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-8) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPS (CCMPS-128-9) +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-1) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPT_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPT_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-10) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPT_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPT_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-11) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPT_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPT_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-2) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPT_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPT_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-3) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPT_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPT_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-4) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPT_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPT_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-5) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPT_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPT_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-6) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPT_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPT_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-7) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPT_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPT_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-8) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPT_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPT_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPT (CCMPT-128-9) +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPT_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPT_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-1) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x38 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CCMPZ_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x38 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CCMPZ_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-10) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPZ_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPZ_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-11) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPZ_GPRv_IMM8_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:v IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPZ_MEMv_IMM8_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-2) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-3) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x39 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CCMPZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x39 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CCMPZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-4) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x3A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 REG1=GPR8_B():r:b:i8 REG2=DFV():r +IFORM: CCMPZ_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x3A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_R():r:b:i8 MEM0:r:b:i8 REG1=DFV():r +IFORM: CCMPZ_GPR8i8_MEMi8_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-5) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPZ_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-6) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x3B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v REG1=GPRv_B():r:v REG2=DFV():r +IFORM: CCMPZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x3B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_R():r:v MEM0:r:v REG1=DFV():r +IFORM: CCMPZ_GPRv_MEMv_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-7) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CCMPZ_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CCMPZ_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-8) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CCMPZ (CCMPZ-128-9) +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CCMPZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CCMPZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CCMPZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-1) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVB_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVB_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-2) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVB_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVB_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-3) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVB_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-4) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVB_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-5) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVB_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-6) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVB_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-7) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVB (CFCMOVB-128-8) +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-1) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVBE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVBE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-2) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVBE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVBE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-3) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVBE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-4) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVBE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-5) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVBE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-6) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVBE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-7) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVBE (CFCMOVBE-128-8) +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-1) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVL_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVL_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-2) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVL_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVL_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-3) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVL_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-4) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVL_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-5) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVL_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-6) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVL_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-7) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVL (CFCMOVL-128-8) +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-1) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVLE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVLE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-2) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVLE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVLE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-3) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVLE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-4) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVLE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-5) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVLE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-6) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVLE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-7) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVLE (CFCMOVLE-128-8) +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-1) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNB_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNB_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-2) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNB_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNB_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-3) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNB_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-4) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +PATTERN: EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNB_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-5) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNB_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-6) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNB_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-7) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNB (CFCMOVNB-128-8) +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-1) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNBE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNBE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-2) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNBE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNBE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-3) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNBE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-4) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +PATTERN: EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNBE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-5) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNBE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-6) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNBE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-7) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNBE (CFCMOVNBE-128-8) +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-1) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNL_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNL_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-2) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNL_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNL_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-3) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNL_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-4) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +PATTERN: EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNL_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-5) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNL_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-6) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNL_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-7) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNL (CFCMOVNL-128-8) +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-1) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNLE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNLE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-2) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNLE_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNLE_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-3) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNLE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-4) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +PATTERN: EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNLE_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-5) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNLE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-6) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNLE_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-7) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNLE (CFCMOVNLE-128-8) +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-1) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNO_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNO_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-2) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNO_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNO_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-3) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNO_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-4) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNO_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-5) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNO_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-6) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNO_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-7) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNO (CFCMOVNO-128-8) +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-1) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNP_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNP_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-2) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNP_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNP_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-3) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNP_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-4) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNP_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-5) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNP_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-6) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNP_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-7) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNP (CFCMOVNP-128-8) +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-1) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNS_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNS_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-2) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNS_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNS_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-3) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNS_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-4) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNS_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-5) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNS_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-6) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNS_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-7) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNS (CFCMOVNS-128-8) +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-1) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNZ_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNZ_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-2) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVNZ_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVNZ_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-3) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNZ_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-4) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVNZ_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-5) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNZ_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-6) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVNZ_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-7) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVNZ (CFCMOVNZ-128-8) +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVNZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVNZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-1) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVO_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVO_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-2) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVO_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVO_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-3) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVO_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-4) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +PATTERN: EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVO_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-5) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVO_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-6) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVO_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-7) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVO (CFCMOVO-128-8) +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-1) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVP_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVP_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-2) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVP_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVP_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-3) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVP_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-4) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +PATTERN: EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVP_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-5) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVP_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-6) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVP_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-7) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVP (CFCMOVP-128-8) +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-1) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVS_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVS_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-2) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVS_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVS_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-3) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVS_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-4) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +PATTERN: EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVS_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-5) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVS_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-6) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVS_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-7) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVS (CFCMOVS-128-8) +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-1) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVZ_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVZ_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-2) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: CFCMOVZ_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: CFCMOVZ_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-3) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVZ_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-4) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +PATTERN: EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: CFCMOVZ_GPRv_GPRv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-5) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVZ_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-6) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:cw:v REG0=GPRv_R():r:v +IFORM: CFCMOVZ_MEMv_GPRv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-7) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CFCMOVZ (CFCMOVZ-128-8) +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CFCMOVZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CFCMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CFCMOV +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE MEMORY_FAULT_SUPPRESSION +PATTERN: EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CFCMOVZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVB (CMOVB-128-1) +{ +ICLASS: CMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x42 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x42 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVB (CMOVB-128-2) +{ +ICLASS: CMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x42 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x42 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVBE (CMOVBE-128-1) +{ +ICLASS: CMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x46 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x46 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVBE (CMOVBE-128-2) +{ +ICLASS: CMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x46 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x46 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVL (CMOVL-128-1) +{ +ICLASS: CMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVL (CMOVL-128-2) +{ +ICLASS: CMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVLE (CMOVLE-128-1) +{ +ICLASS: CMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4E VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4E VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVLE (CMOVLE-128-2) +{ +ICLASS: CMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4E V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4E V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNB (CMOVNB-128-1) +{ +ICLASS: CMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x43 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x43 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNB (CMOVNB-128-2) +{ +ICLASS: CMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x43 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x43 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNBE (CMOVNBE-128-1) +{ +ICLASS: CMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x47 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x47 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNBE (CMOVNBE-128-2) +{ +ICLASS: CMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x47 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNBE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x47 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNBE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNL (CMOVNL-128-1) +{ +ICLASS: CMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4D VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4D VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNL (CMOVNL-128-2) +{ +ICLASS: CMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4D V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4D V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNLE (CMOVNLE-128-1) +{ +ICLASS: CMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4F VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4F VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNLE (CMOVNLE-128-2) +{ +ICLASS: CMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4F V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNLE_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4F V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNLE_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNO (CMOVNO-128-1) +{ +ICLASS: CMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x41 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x41 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNO (CMOVNO-128-2) +{ +ICLASS: CMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x41 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x41 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNP (CMOVNP-128-1) +{ +ICLASS: CMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNP (CMOVNP-128-2) +{ +ICLASS: CMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNS (CMOVNS-128-1) +{ +ICLASS: CMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x49 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x49 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNS (CMOVNS-128-2) +{ +ICLASS: CMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x49 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x49 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNZ (CMOVNZ-128-1) +{ +ICLASS: CMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x45 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x45 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVNZ (CMOVNZ-128-2) +{ +ICLASS: CMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x45 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVNZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x45 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVNZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVO (CMOVO-128-1) +{ +ICLASS: CMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x40 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x40 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVO (CMOVO-128-2) +{ +ICLASS: CMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x40 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVO_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x40 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVO_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVP (CMOVP-128-1) +{ +ICLASS: CMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVP (CMOVP-128-2) +{ +ICLASS: CMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x4A V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVP_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVP +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x4A V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVP_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVS (CMOVS-128-1) +{ +ICLASS: CMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x48 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x48 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVS (CMOVS-128-2) +{ +ICLASS: CMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x48 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVS_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x48 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVS_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVZ (CMOVZ-128-1) +{ +ICLASS: CMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x44 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x44 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMOVZ (CMOVZ-128-2) +{ +ICLASS: CMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x44 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: CMOVZ_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: CMOVZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x44 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: CMOVZ_GPRv_GPRv_MEMv_APX +} + + +# EMITTING CMPBEXADD (CMPBEXADD-128-3) +{ +ICLASS: CMPBEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPBEXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPBEXADD (CMPBEXADD-128-4) +{ +ICLASS: CMPBEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE6 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPBEXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPBXADD (CMPBXADD-128-3) +{ +ICLASS: CMPBXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPBXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPBXADD (CMPBXADD-128-4) +{ +ICLASS: CMPBXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE2 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPBXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPLEXADD (CMPLEXADD-128-3) +{ +ICLASS: CMPLEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xEE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPLEXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPLEXADD (CMPLEXADD-128-4) +{ +ICLASS: CMPLEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xEE V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPLEXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPLXADD (CMPLXADD-128-3) +{ +ICLASS: CMPLXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xEC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPLXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPLXADD (CMPLXADD-128-4) +{ +ICLASS: CMPLXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xEC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPLXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNBEXADD (CMPNBEXADD-128-3) +{ +ICLASS: CMPNBEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNBEXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNBEXADD (CMPNBEXADD-128-4) +{ +ICLASS: CMPNBEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNBEXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNBXADD (CMPNBXADD-128-3) +{ +ICLASS: CMPNBXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNBXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNBXADD (CMPNBXADD-128-4) +{ +ICLASS: CMPNBXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE3 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNBXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNLEXADD (CMPNLEXADD-128-3) +{ +ICLASS: CMPNLEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xEF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNLEXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNLEXADD (CMPNLEXADD-128-4) +{ +ICLASS: CMPNLEXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xEF V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNLEXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNLXADD (CMPNLXADD-128-3) +{ +ICLASS: CMPNLXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xED V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNLXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNLXADD (CMPNLXADD-128-4) +{ +ICLASS: CMPNLXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xED V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNLXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNOXADD (CMPNOXADD-128-3) +{ +ICLASS: CMPNOXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNOXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNOXADD (CMPNOXADD-128-4) +{ +ICLASS: CMPNOXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE1 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNOXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNPXADD (CMPNPXADD-128-3) +{ +ICLASS: CMPNPXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xEB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNPXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNPXADD (CMPNPXADD-128-4) +{ +ICLASS: CMPNPXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xEB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNPXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNSXADD (CMPNSXADD-128-3) +{ +ICLASS: CMPNSXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNSXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNSXADD (CMPNSXADD-128-4) +{ +ICLASS: CMPNSXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE9 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNSXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPNZXADD (CMPNZXADD-128-3) +{ +ICLASS: CMPNZXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPNZXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPNZXADD (CMPNZXADD-128-4) +{ +ICLASS: CMPNZXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE5 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPNZXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPOXADD (CMPOXADD-128-3) +{ +ICLASS: CMPOXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPOXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPOXADD (CMPOXADD-128-4) +{ +ICLASS: CMPOXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE0 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPOXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPPXADD (CMPPXADD-128-3) +{ +ICLASS: CMPPXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xEA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPPXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPPXADD (CMPPXADD-128-4) +{ +ICLASS: CMPPXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xEA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPPXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPSXADD (CMPSXADD-128-3) +{ +ICLASS: CMPSXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPSXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPSXADD (CMPSXADD-128-4) +{ +ICLASS: CMPSXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPSXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CMPZXADD (CMPZXADD-128-3) +{ +ICLASS: CMPZXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_4B +PATTERN: EVV 0xE4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:d:u32 REG0=GPR32_R():rw:d:u32 REG1=VGPR32_N3():r:d:u32 +IFORM: CMPZXADD_MEMu32_GPR32u32_GPR32u32_APX +} + + +# EMITTING CMPZXADD (CMPZXADD-128-4) +{ +ICLASS: CMPZXADD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CMPCCXADD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-mod pf-mod of-mod sf-mod af-mod ] +ATTRIBUTES: ATOMIC DISP8_NO_SCALE REQUIRES_ALIGNMENT_8B +PATTERN: EVV 0xE4 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:q:u64 REG0=GPR64_R():rw:q:u64 REG1=VGPR64_N3():r:q:u64 +IFORM: CMPZXADD_MEMu64_GPR64u64_GPR64u64_APX +} + + +# EMITTING CRC32 (CRC32-128-1) +{ +ICLASS: CRC32 +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0xF0 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRy_R():rw:y REG1=GPR8_B():r:b:i8 +IFORM: CRC32_GPRy_GPR8i8_APX +} + +{ +ICLASS: CRC32 +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF0 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRy_R():rw:y MEM0:r:b:i8 +IFORM: CRC32_GPRy_MEMi8_APX +} + + +# EMITTING CRC32 (CRC32-128-2) +{ +ICLASS: CRC32 +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0xF1 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRy_R():rw:y REG1=GPRv_B():r:v +IFORM: CRC32_GPRy_GPRv_APX +} + +{ +ICLASS: CRC32 +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF1 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRy_R():rw:y MEM0:r:v +IFORM: CRC32_GPRy_MEMv_APX +} + + +# EMITTING CRC32 (CRC32-128-3) +{ +ICLASS: CRC32 +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0xF1 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRy_R():rw:y REG1=GPRv_B():r:v +IFORM: CRC32_GPRy_GPRv_APX +} + +{ +ICLASS: CRC32 +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF1 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRy_R():rw:y MEM0:r:v +IFORM: CRC32_GPRy_MEMv_APX +} + + +# EMITTING CTESTB (CTESTB-128-1) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTB_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTB_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-2) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-3) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-4) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTB_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTB_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-5) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTB_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTB_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-6) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-7) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-8) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTB (CTESTB-128-9) +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC2 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-1) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTBE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTBE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-2) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-3) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-4) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTBE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTBE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-5) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTBE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTBE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-6) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-7) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-8) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTBE (CTESTBE-128-9) +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC6 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-1) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTF_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTF_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-2) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTF_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTF_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-3) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTF_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTF_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-4) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTF_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTF_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-5) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTF_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTF_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-6) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTF_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTF_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-7) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTF_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTF_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-8) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTF_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTF_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTF (CTESTF-128-9) +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTF_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTF +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC11 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTF_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-1) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTL_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTL_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-2) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-3) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-4) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTL_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTL_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-5) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTL_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTL_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-6) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-7) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-8) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTL (CTESTL-128-9) +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC12 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-1) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTLE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTLE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-2) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-3) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-4) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTLE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTLE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-5) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTLE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTLE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-6) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-7) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-8) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTLE (CTESTLE-128-9) +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC14 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-1) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNB_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNB_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-2) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-3) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNB_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNB_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-4) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNB_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNB_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-5) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNB_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNB_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-6) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-7) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-8) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNB (CTESTNB-128-9) +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNB_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNB +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC3 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNB_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-1) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNBE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNBE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-2) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-3) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNBE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNBE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-4) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNBE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNBE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-5) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNBE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNBE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-6) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-7) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-8) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNBE (CTESTNBE-128-9) +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNBE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNBE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC7 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNBE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-1) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNL_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNL_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-2) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-3) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNL_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNL_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-4) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNL_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNL_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-5) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNL_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNL_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-6) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-7) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-8) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNL (CTESTNL-128-9) +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNL_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNL +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC13 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNL_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-1) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNLE_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNLE_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-2) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-3) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNLE_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNLE_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-4) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNLE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNLE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-5) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNLE_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNLE_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-6) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-7) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-8) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNLE (CTESTNLE-128-9) +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNLE_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNLE +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC15 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNLE_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-1) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNO_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNO_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-2) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-3) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-4) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNO_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNO_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-5) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNO_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNO_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-6) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-7) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-8) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNO (CTESTNO-128-9) +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC1 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-1) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNS_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNS_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-2) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-3) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-4) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNS_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNS_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-5) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNS_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNS_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-6) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-7) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-8) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNS (CTESTNS-128-9) +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC9 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-1) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTNZ_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTNZ_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-2) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-3) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTNZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTNZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-4) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNZ_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNZ_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-5) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTNZ_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTNZ_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-6) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-7) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-8) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTNZ (CTESTNZ-128-9) +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTNZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTNZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC5 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTNZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-1) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTO_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTO_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-2) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-3) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTO_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTO_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-4) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTO_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTO_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-5) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTO_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTO_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-6) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-7) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-8) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTO (CTESTO-128-9) +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTO_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTO +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC0 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTO_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-1) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTS_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTS_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-2) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-3) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTS_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTS_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-4) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTS_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTS_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-5) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTS_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTS_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-6) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-7) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-8) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTS (CTESTS-128-9) +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTS_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC8 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTS_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-1) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTT_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTT_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-2) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTT_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTT_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-3) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTT_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTT_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-4) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTT_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTT_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-5) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTT_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTT_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-6) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTT_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTT_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-7) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTT_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTT_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-8) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTT_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTT_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTT (CTESTT-128-9) +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTT_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC10 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTT_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-1) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x84 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=GPR8_R():r:b:i8 REG2=DFV():r +IFORM: CTESTZ_GPR8i8_GPR8i8_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x84 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:b:i8 REG0=GPR8_R():r:b:i8 REG1=DFV():r +IFORM: CTESTZ_MEMi8_GPR8i8_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-2) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-3) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x85 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: REG0=GPRv_B():r:v REG1=GPRv_R():r:v REG2=DFV():r +IFORM: CTESTZ_GPRv_GPRv_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x85 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() +OPERANDS: MEM0:r:v REG0=GPRv_R():r:v REG1=DFV():r +IFORM: CTESTZ_MEMv_GPRv_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-4) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTZ_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTZ_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-5) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: REG0=GPR8_B():r:b:i8 IMM0:r:b:i8 REG1=DFV():r +IFORM: CTESTZ_GPR8i8_IMM8_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMM8() +OPERANDS: MEM0:r:b:i8 IMM0:r:b:i8 REG0=DFV():r +IFORM: CTESTZ_MEMi8_IMM8_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-6) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-7) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-8) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING CTESTZ (CTESTZ-128-9) +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: REG0=GPRv_B():r:v IMM0:r:z REG1=DFV():r +IFORM: CTESTZ_GPRv_IMMz_DFV_APX +} + +{ +ICLASS: CTESTZ +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CCMP +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 SCC4 VL128 mode64 ZEROING=0 EVAPX_SCC() SIMMz() +OPERANDS: MEM0:r:v IMM0:r:z REG0=DFV():r +IFORM: CTESTZ_MEMv_IMMz_DFV_APX +} + + +# EMITTING DEC (DEC-128-1-nf0) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: DEC_GPR8i8_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: DEC_MEMi8_APX +} + + +# EMITTING DEC (DEC-128-1-nf1) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: DEC_GPR8i8_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: DEC_MEMi8_APX +} + + +# EMITTING DEC (DEC-128-2-nf0) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: DEC_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: DEC_GPR8i8_MEMi8_APX +} + + +# EMITTING DEC (DEC-128-2-nf1) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: DEC_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: DEC_GPR8i8_MEMi8_APX +} + + +# EMITTING DEC (DEC-128-3-nf0) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: DEC_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: DEC_MEMv_APX +} + + +# EMITTING DEC (DEC-128-3-nf1) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: DEC_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: DEC_MEMv_APX +} + + +# EMITTING DEC (DEC-128-4-nf0) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: DEC_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: DEC_MEMv_APX +} + + +# EMITTING DEC (DEC-128-4-nf1) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: DEC_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: DEC_MEMv_APX +} + + +# EMITTING DEC (DEC-128-5-nf0) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: DEC_GPRv_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: DEC_GPRv_MEMv_APX +} + + +# EMITTING DEC (DEC-128-5-nf1) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: DEC_GPRv_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: DEC_GPRv_MEMv_APX +} + + +# EMITTING DEC (DEC-128-6-nf0) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: DEC_GPRv_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: DEC_GPRv_MEMv_APX +} + + +# EMITTING DEC (DEC-128-6-nf1) +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: DEC_GPRv_GPRv_APX +} + +{ +ICLASS: DEC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: DEC_GPRv_MEMv_APX +} + + +# EMITTING DIV (DIV-128-1-nf0) +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP +IFORM: DIV_GPR8i8_APX +} + +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP +IFORM: DIV_MEMi8_APX +} + + +# EMITTING DIV (DIV-128-1-nf1) +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP +IFORM: DIV_GPR8i8_APX +} + +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP +IFORM: DIV_MEMi8_APX +} + + +# EMITTING DIV (DIV-128-2-nf0) +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: DIV_GPRv_APX +} + +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: DIV_MEMv_APX +} + + +# EMITTING DIV (DIV-128-2-nf1) +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: DIV_GPRv_APX +} + +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: DIV_MEMv_APX +} + + +# EMITTING DIV (DIV-128-3-nf0) +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: DIV_GPRv_APX +} + +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: DIV_MEMv_APX +} + + +# EMITTING DIV (DIV-128-3-nf1) +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: DIV_GPRv_APX +} + +{ +ICLASS: DIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: DIV_MEMv_APX +} + + +# EMITTING ENCODEKEY128 (ENCODEKEY128-128-1) +{ +ICLASS: ENCODEKEY128 +CPL: 3 +CATEGORY: KEYLOCKER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-0 of-0 sf-0 af-0 pf-0 cf-0 ] +PATTERN: EVV 0xDA VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:u8 REG1=GPR32_B():r:d:u8 REG2=XED_REG_XMM0:rw:SUPP:dq:u8 REG3=XED_REG_XMM1:w:SUPP:dq:u8 REG4=XED_REG_XMM2:w:SUPP:dq:u8 REG5=XED_REG_XMM4:w:SUPP:dq:u8 REG6=XED_REG_XMM5:w:SUPP:dq:u8 REG7=XED_REG_XMM6:w:SUPP:dq:u8 +IFORM: ENCODEKEY128_GPR32u8_GPR32u8_APX +} + + +# EMITTING ENCODEKEY256 (ENCODEKEY256-128-1) +{ +ICLASS: ENCODEKEY256 +CPL: 3 +CATEGORY: KEYLOCKER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-KEYLOCKER +REAL_OPCODE: Y +FLAGS: MUST [ zf-0 of-0 sf-0 af-0 pf-0 cf-0 ] +PATTERN: EVV 0xDB VF3 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:u8 REG1=GPR32_B():r:d:u8 REG2=XED_REG_XMM0:rw:SUPP:dq:u8 REG3=XED_REG_XMM1:rw:SUPP:dq:u8 REG4=XED_REG_XMM2:w:SUPP:dq:u8 REG5=XED_REG_XMM3:w:SUPP:dq:u8 REG6=XED_REG_XMM4:w:SUPP:dq:u8 REG7=XED_REG_XMM5:w:SUPP:dq:u8 REG8=XED_REG_XMM6:w:SUPP:dq:u8 +IFORM: ENCODEKEY256_GPR32u8_GPR32u8_APX +} + + +# EMITTING ENQCMD (ENQCMD-128-1) +{ +ICLASS: ENQCMD +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-ENQCMD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-0 pf-0 of-0 sf-0 af-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF8 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=A_GPR_R():r MEM0:r:zd:u32 +IFORM: ENQCMD_GPRav_MEMu32_APX +} + + +# EMITTING ENQCMDS (ENQCMDS-128-1) +{ +ICLASS: ENQCMDS +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-ENQCMD +REAL_OPCODE: Y +FLAGS: MUST [ zf-mod cf-0 pf-0 of-0 sf-0 af-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF8 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=A_GPR_R():r MEM0:r:zd:u32 +IFORM: ENQCMDS_GPRav_MEMu32_APX +} + + +# EMITTING IDIV (IDIV-128-1-nf0) +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP +IFORM: IDIV_GPR8i8_APX +} + +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP +IFORM: IDIV_MEMi8_APX +} + + +# EMITTING IDIV (IDIV-128-1-nf1) +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AX:rw:SUPP +IFORM: IDIV_GPR8i8_APX +} + +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AX:rw:SUPP +IFORM: IDIV_MEMi8_APX +} + + +# EMITTING IDIV (IDIV-128-2-nf0) +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: IDIV_GPRv_APX +} + +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: IDIV_MEMv_APX +} + + +# EMITTING IDIV (IDIV-128-2-nf1) +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: IDIV_GPRv_APX +} + +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: IDIV_MEMv_APX +} + + +# EMITTING IDIV (IDIV-128-3-nf0) +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: IDIV_GPRv_APX +} + +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-U AF-U PF-U CF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: IDIV_MEMv_APX +} + + +# EMITTING IDIV (IDIV-128-3-nf1) +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():rw:SUPP +IFORM: IDIV_GPRv_APX +} + +{ +ICLASS: IDIV +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():rw:SUPP +IFORM: IDIV_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-1-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0x69 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: IMUL_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x69 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z +IFORM: IMUL_GPRv_MEMv_IMMz_APX +} + + +# EMITTING IMUL (IMUL-128-1-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x69 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: IMUL_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x69 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z +IFORM: IMUL_GPRv_MEMv_IMMz_APX +} + + +# EMITTING IMUL (IMUL-128-10-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: IMUL_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: IMUL_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-10-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: IMUL_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: IMUL_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-11-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: IMUL_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: IMUL_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-11-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: IMUL_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: IMUL_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-2-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0x69 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: IMUL_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x69 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z +IFORM: IMUL_GPRv_MEMv_IMMz_APX +} + + +# EMITTING IMUL (IMUL-128-2-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x69 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: IMUL_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x69 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:z +IFORM: IMUL_GPRv_MEMv_IMMz_APX +} + + +# EMITTING IMUL (IMUL-128-3-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0x6B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x6B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING IMUL (IMUL-128-3-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x6B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x6B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING IMUL (IMUL-128-4-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0x6B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x6B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING IMUL (IMUL-128-4-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x6B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x6B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: IMUL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING IMUL (IMUL-128-5-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: IMUL_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-5-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: IMUL_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-6-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: IMUL_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-6-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: IMUL_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-7-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: IMUL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-7-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xAF VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAF VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: IMUL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-8-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: IMUL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-8-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xAF V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: IMUL_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAF V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: IMUL_GPRv_GPRv_MEMv_APX +} + + +# EMITTING IMUL (IMUL-128-9-nf0) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP +IFORM: IMUL_GPR8i8_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP +IFORM: IMUL_MEMi8_APX +} + + +# EMITTING IMUL (IMUL-128-9-nf1) +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP +IFORM: IMUL_GPR8i8_APX +} + +{ +ICLASS: IMUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP +IFORM: IMUL_MEMi8_APX +} + + +# EMITTING INC (INC-128-1-nf0) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: INC_GPR8i8_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: INC_MEMi8_APX +} + + +# EMITTING INC (INC-128-1-nf1) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: INC_GPR8i8_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: INC_MEMi8_APX +} + + +# EMITTING INC (INC-128-2-nf0) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: INC_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: INC_GPR8i8_MEMi8_APX +} + + +# EMITTING INC (INC-128-2-nf1) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xFE VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: INC_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xFE VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: INC_GPR8i8_MEMi8_APX +} + + +# EMITTING INC (INC-128-3-nf0) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: INC_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: INC_MEMv_APX +} + + +# EMITTING INC (INC-128-3-nf1) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: INC_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: INC_MEMv_APX +} + + +# EMITTING INC (INC-128-4-nf0) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: INC_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: INC_MEMv_APX +} + + +# EMITTING INC (INC-128-4-nf1) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: INC_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: INC_MEMv_APX +} + + +# EMITTING INC (INC-128-5-nf0) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: INC_GPRv_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: INC_GPRv_MEMv_APX +} + + +# EMITTING INC (INC-128-5-nf1) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: INC_GPRv_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: INC_GPRv_MEMv_APX +} + + +# EMITTING INC (INC-128-6-nf0) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: INC_GPRv_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: INC_GPRv_MEMv_APX +} + + +# EMITTING INC (INC-128-6-nf1) +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xFF V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: INC_GPRv_GPRv_APX +} + +{ +ICLASS: INC +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xFF V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: INC_GPRv_MEMv_APX +} + + +# EMITTING INVEPT (INVEPT-128-1) +{ +ICLASS: INVEPT +CPL: 0 +CATEGORY: VTX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INVEPT +REAL_OPCODE: Y +FLAGS: MUST [ CF-MOD ZF-MOD SF-0 OF-0 AF-0 PF-0 ] +ATTRIBUTES: DISP8_NO_SCALE NOTSX +PATTERN: EVV 0xF0 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():r:q:i64 MEM0:r:dq:i128 +IFORM: INVEPT_GPR64i64_MEMi128_APX +} + + +# EMITTING INVPCID (INVPCID-128-1) +{ +ICLASS: INVPCID +CPL: 0 +CATEGORY: MISC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INVPCID +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE NOTSX +PATTERN: EVV 0xF2 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():r:q:i64 MEM0:r:dq:i128 +IFORM: INVPCID_GPR64i64_MEMi128_APX +} + + +# EMITTING INVVPID (INVVPID-128-1) +{ +ICLASS: INVVPID +CPL: 0 +CATEGORY: VTX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INVVPID +REAL_OPCODE: Y +FLAGS: MUST [ CF-MOD ZF-MOD SF-0 OF-0 AF-0 PF-0 ] +ATTRIBUTES: DISP8_NO_SCALE NOTSX +PATTERN: EVV 0xF1 VF3 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():r:q:i64 MEM0:r:dq:i128 +IFORM: INVVPID_GPR64i64_MEMi128_APX +} + + +# EMITTING KMOVB (KMOVB-128-5) +{ +ICLASS: KMOVB +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPB +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x90 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u8 +IFORM: KMOVB_MASKmskw_MASKu8_APX +} + +{ +ICLASS: KMOVB +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPB +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x90 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw MEM0:r:b:u8 +IFORM: KMOVB_MASKmskw_MEMu8_APX +} + + +# EMITTING KMOVB (KMOVB-128-6) +{ +ICLASS: KMOVB +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPB +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x92 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32 +IFORM: KMOVB_MASKmskw_GPR32u32_APX +} + + +# EMITTING KMOVB (KMOVB-128-7) +{ +ICLASS: KMOVB +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPB +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x93 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw +IFORM: KMOVB_GPR32u32_MASKmskw_APX +} + + +# EMITTING KMOVB (KMOVB-128-8) +{ +ICLASS: KMOVB +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPB +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x91 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:u8 REG0=MASK_R():r:mskw +IFORM: KMOVB_MEMu8_MASKmskw_APX +} + + +# EMITTING KMOVD (KMOVD-128-2) +{ +ICLASS: KMOVD +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPD +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x93 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw +IFORM: KMOVD_GPR32u32_MASKmskw_APX +} + + +# EMITTING KMOVD (KMOVD-128-3) +{ +ICLASS: KMOVD +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPD +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x91 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:d:u32 REG0=MASK_R():r:mskw +IFORM: KMOVD_MEMu32_MASKmskw_APX +} + + +# EMITTING KMOVD (KMOVD-128-7) +{ +ICLASS: KMOVD +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPD +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x90 V66 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u32 +IFORM: KMOVD_MASKmskw_MASKu32_APX +} + +{ +ICLASS: KMOVD +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPD +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x90 V66 V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw MEM0:r:d:u32 +IFORM: KMOVD_MASKmskw_MEMu32_APX +} + + +# EMITTING KMOVD (KMOVD-128-8) +{ +ICLASS: KMOVD +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPD +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x92 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32 +IFORM: KMOVD_MASKmskw_GPR32u32_APX +} + + +# EMITTING KMOVQ (KMOVQ-128-2) +{ +ICLASS: KMOVQ +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPQ +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x90 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u64 +IFORM: KMOVQ_MASKmskw_MASKu64_APX +} + +{ +ICLASS: KMOVQ +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPQ +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x90 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw MEM0:r:q:u64 +IFORM: KMOVQ_MASKmskw_MEMu64_APX +} + + +# EMITTING KMOVQ (KMOVQ-128-3) +{ +ICLASS: KMOVQ +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPQ +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x92 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=GPR64_B():r:q:u64 +IFORM: KMOVQ_MASKmskw_GPR64u64_APX +} + + +# EMITTING KMOVQ (KMOVQ-128-4) +{ +ICLASS: KMOVQ +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPQ +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x93 VF2 V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:u64 REG1=MASK_B():r:mskw +IFORM: KMOVQ_GPR64u64_MASKmskw_APX +} + + +# EMITTING KMOVQ (KMOVQ-128-5) +{ +ICLASS: KMOVQ +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPQ +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x91 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:q:u64 REG0=MASK_R():r:mskw +IFORM: KMOVQ_MEMu64_MASKmskw_APX +} + + +# EMITTING KMOVW (KMOVW-128-5) +{ +ICLASS: KMOVW +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPW +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x90 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=MASK_B():r:mskw:u16 +IFORM: KMOVW_MASKmskw_MASKu16_APX +} + +{ +ICLASS: KMOVW +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPW +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x90 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw MEM0:r:wrd:u16 +IFORM: KMOVW_MASKmskw_MEMu16_APX +} + + +# EMITTING KMOVW (KMOVW-128-6) +{ +ICLASS: KMOVW +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPW +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x92 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=MASK_R():w:mskw REG1=GPR32_B():r:d:u32 +IFORM: KMOVW_MASKmskw_GPR32u32_APX +} + + +# EMITTING KMOVW (KMOVW-128-7) +{ +ICLASS: KMOVW +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPW +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: KMASK +PATTERN: EVV 0x93 VNP V0F MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:u32 REG1=MASK_B():r:mskw +IFORM: KMOVW_GPR32u32_MASKmskw_APX +} + + +# EMITTING KMOVW (KMOVW-128-8) +{ +ICLASS: KMOVW +CPL: 3 +CATEGORY: KMASK +EXTENSION: APXEVEX +ISA_SET: APX_F_KOPW +EXCEPTIONS: APX-EVEX-KMOV +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE KMASK +PATTERN: EVV 0x91 VNP V0F MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:wrd:u16 REG0=MASK_R():r:mskw +IFORM: KMOVW_MEMu16_MASKmskw_APX +} + + +# EMITTING LZCNT (LZCNT-128-1-nf0) +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ] +PATTERN: EVV 0xF5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: LZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: LZCNT_GPRv_MEMv_APX +} + + +# EMITTING LZCNT (LZCNT-128-1-nf1) +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: LZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: LZCNT_GPRv_MEMv_APX +} + + +# EMITTING LZCNT (LZCNT-128-2-nf0) +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ] +PATTERN: EVV 0xF5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: LZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-MOD ZF-MOD OF-U AF-U PF-U SF-U ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: LZCNT_GPRv_MEMv_APX +} + + +# EMITTING LZCNT (LZCNT-128-2-nf1) +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: LZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: LZCNT +CPL: 3 +CATEGORY: LZCNT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: LZCNT_GPRv_MEMv_APX +} + + +# EMITTING MOVBE (MOVBE-128-1) +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0x60 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: MOVBE_GPRv_GPRv_APX +} + +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x60 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: MOVBE_GPRv_MEMv_APX +} + + +# EMITTING MOVBE (MOVBE-128-2) +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0x60 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: MOVBE_GPRv_GPRv_APX +} + +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x60 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: MOVBE_GPRv_MEMv_APX +} + + +# EMITTING MOVBE (MOVBE-128-3) +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0x61 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: MOVBE_GPRv_GPRv_APX +} + +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x61 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:v REG0=GPRv_R():r:v +IFORM: MOVBE_MEMv_GPRv_APX +} + + +# EMITTING MOVBE (MOVBE-128-4) +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0x61 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():w:v REG1=GPRv_R():r:v +IFORM: MOVBE_GPRv_GPRv_APX +} + +{ +ICLASS: MOVBE +CPL: 3 +CATEGORY: DATAXFER +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x61 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:v REG0=GPRv_R():r:v +IFORM: MOVBE_MEMv_GPRv_APX +} + + +# EMITTING MOVDIR64B (MOVDIR64B-128-1) +{ +ICLASS: MOVDIR64B +CPL: 3 +CATEGORY: MOVDIR +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xF8 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=A_GPR_R():r MEM0:r:zd:u32 +IFORM: MOVDIR64B_GPRav_MEMu32_APX +} + + +# EMITTING MOVDIRI (MOVDIRI-128-1) +{ +ICLASS: MOVDIRI +CPL: 3 +CATEGORY: MOVDIR +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF9 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:yu REG0=GPRy_R():r:yu +IFORM: MOVDIRI_MEMyu_GPRyu_APX +} + + +# EMITTING MUL (MUL-128-1-nf0) +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP +IFORM: MUL_GPR8i8_APX +} + +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP +IFORM: MUL_MEMi8_APX +} + + +# EMITTING MUL (MUL-128-1-nf1) +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():r:b:i8 REG1=XED_REG_AL:r:SUPP REG2=XED_REG_AX:w:SUPP +IFORM: MUL_GPR8i8_APX +} + +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:b:i8 REG0=XED_REG_AL:r:SUPP REG1=XED_REG_AX:w:SUPP +IFORM: MUL_MEMi8_APX +} + + +# EMITTING MUL (MUL-128-2-nf0) +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: MUL_GPRv_APX +} + +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: MUL_MEMv_APX +} + + +# EMITTING MUL (MUL-128-2-nf1) +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: MUL_GPRv_APX +} + +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: MUL_MEMv_APX +} + + +# EMITTING MUL (MUL-128-3-nf0) +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: MUL_GPRv_APX +} + +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-U ZF-U AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: MUL_MEMv_APX +} + + +# EMITTING MUL (MUL-128-3-nf1) +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():r:v REG1=OrAX():rw:SUPP REG2=OrDX():w:SUPP +IFORM: MUL_GPRv_APX +} + +{ +ICLASS: MUL +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:r:v REG0=OrAX():rw:SUPP REG1=OrDX():w:SUPP +IFORM: MUL_MEMv_APX +} + + +# EMITTING MULX (MULX-128-1) +{ +ICLASS: MULX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF6 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():w:d:i32 REG2=GPR32_B():r:d:i32 REG3=XED_REG_EDX:r:SUPP:d:u32 +IFORM: MULX_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: MULX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF6 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():w:d:i32 MEM0:r:d:i32 REG2=XED_REG_EDX:r:SUPP:d:u32 +IFORM: MULX_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING MULX (MULX-128-2) +{ +ICLASS: MULX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF6 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():w:q:i64 REG2=GPR64_B():r:q:i64 REG3=XED_REG_RDX:r:SUPP:q:i64 +IFORM: MULX_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: MULX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF6 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():w:q:i64 MEM0:r:q:i64 REG2=XED_REG_RDX:r:SUPP:q:i64 +IFORM: MULX_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING NEG (NEG-128-1-nf0) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: NEG_GPR8i8_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: NEG_MEMi8_APX +} + + +# EMITTING NEG (NEG-128-1-nf1) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: NEG_GPR8i8_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: NEG_MEMi8_APX +} + + +# EMITTING NEG (NEG-128-2-nf0) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: NEG_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: NEG_GPR8i8_MEMi8_APX +} + + +# EMITTING NEG (NEG-128-2-nf1) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: NEG_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: NEG_GPR8i8_MEMi8_APX +} + + +# EMITTING NEG (NEG-128-3-nf0) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: NEG_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: NEG_MEMv_APX +} + + +# EMITTING NEG (NEG-128-3-nf1) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: NEG_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: NEG_MEMv_APX +} + + +# EMITTING NEG (NEG-128-4-nf0) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: NEG_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: NEG_MEMv_APX +} + + +# EMITTING NEG (NEG-128-4-nf1) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: NEG_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: NEG_MEMv_APX +} + + +# EMITTING NEG (NEG-128-5-nf0) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: NEG_GPRv_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: NEG_GPRv_MEMv_APX +} + + +# EMITTING NEG (NEG-128-5-nf1) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: NEG_GPRv_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: NEG_GPRv_MEMv_APX +} + + +# EMITTING NEG (NEG-128-6-nf0) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: NEG_GPRv_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: NEG_GPRv_MEMv_APX +} + + +# EMITTING NEG (NEG-128-6-nf1) +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: NEG_GPRv_GPRv_APX +} + +{ +ICLASS: NEG +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: NEG_GPRv_MEMv_APX +} + + +# EMITTING NOT (NOT-128-1) +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 +IFORM: NOT_GPR8i8_APX +} + +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 +IFORM: NOT_MEMi8_APX +} + + +# EMITTING NOT (NOT-128-2) +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xF6 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: NOT_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xF6 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 +IFORM: NOT_GPR8i8_MEMi8_APX +} + + +# EMITTING NOT (NOT-128-3) +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: NOT_GPRv_APX +} + +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: NOT_MEMv_APX +} + + +# EMITTING NOT (NOT-128-4) +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v +IFORM: NOT_GPRv_APX +} + +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v +IFORM: NOT_MEMv_APX +} + + +# EMITTING NOT (NOT-128-5) +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xF7 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: NOT_GPRv_GPRv_APX +} + +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xF7 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: NOT_GPRv_MEMv_APX +} + + +# EMITTING NOT (NOT-128-6) +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xF7 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v +IFORM: NOT_GPRv_GPRv_APX +} + +{ +ICLASS: NOT +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v +IFORM: NOT_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-1-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: OR_MEMi8_GPR8i8_APX +} + + +# EMITTING OR (OR-128-1-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: OR_MEMi8_GPR8i8_APX +} + + +# EMITTING OR (OR-128-10-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: OR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: OR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-10-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: OR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: OR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-11-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: OR_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING OR (OR-128-11-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x08 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x08 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: OR_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING OR (OR-128-12-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: OR_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-12-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: OR_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-13-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: OR_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-13-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: OR_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-14-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-14-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x09 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x09 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-15-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-15-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x09 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x09 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: OR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING OR (OR-128-16-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: OR_GPR8i8_MEMi8_APX +} + + +# EMITTING OR (OR-128-16-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: OR_GPR8i8_MEMi8_APX +} + + +# EMITTING OR (OR-128-17-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING OR (OR-128-17-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x0A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x0A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING OR (OR-128-18-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: OR_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-18-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: OR_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-19-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: OR_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-19-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: OR_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-2-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: OR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING OR (OR-128-2-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: OR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: OR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING OR (OR-128-20-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: OR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-20-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x0B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x0B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: OR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-21-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: OR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-21-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x0B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: OR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x0B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: OR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING OR (OR-128-22-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: OR_GPR8i8_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: OR_MEMi8_IMM8_APX +} + + +# EMITTING OR (OR-128-22-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: OR_GPR8i8_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: OR_MEMi8_IMM8_APX +} + + +# EMITTING OR (OR-128-3-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: OR_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: OR_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-3-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: OR_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: OR_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-4-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: OR_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: OR_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-4-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: OR_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: OR_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-5-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: OR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: OR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-5-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: OR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: OR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-6-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: OR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: OR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-6-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: OR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: OR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING OR (OR-128-7-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: OR_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: OR_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-7-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: OR_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: OR_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-8-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: OR_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: OR_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-8-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: OR_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: OR_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-9-nf0) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: OR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: OR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING OR (OR-128-9-nf1) +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: OR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: OR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: OR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING PDEP (PDEP-128-1) +{ +ICLASS: PDEP +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF5 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32 +IFORM: PDEP_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: PDEP +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32 +IFORM: PDEP_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING PDEP (PDEP-128-2) +{ +ICLASS: PDEP +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF5 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64 +IFORM: PDEP_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: PDEP +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64 +IFORM: PDEP_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING PEXT (PEXT-128-1) +{ +ICLASS: PEXT +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF5 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 REG2=GPR32_B():r:d:i32 +IFORM: PEXT_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: PEXT +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=VGPR32_N3():r:d:i32 MEM0:r:d:i32 +IFORM: PEXT_GPR32i32_GPR32i32_MEMi32_APX +} + + +# EMITTING PEXT (PEXT-128-2) +{ +ICLASS: PEXT +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF5 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 REG2=GPR64_B():r:q:i64 +IFORM: PEXT_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: PEXT +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF5 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=VGPR64_N3():r:q:i64 MEM0:r:q:i64 +IFORM: PEXT_GPR64i64_GPR64i64_MEMi64_APX +} + + +# EMITTING POP2 (POP2-128-1) +{ +ICLASS: POP2 +CPL: 3 +CATEGORY: POP +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-PP2 +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x8F VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3_NORSP():w:q:u64 REG1=GPR64_B_NORSP():w:q:u64 REG2=XED_REG_STACKPOP:rw:SUPP:spw2 +IFORM: POP2_GPR64u64_GPR64u64_APX +} + + +# EMITTING POP2P (POP2P-128-1) +{ +ICLASS: POP2P +CPL: 3 +CATEGORY: POP +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-PP2 +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x8F VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3_NORSP():w:q:u64 REG1=GPR64_B_NORSP():w:q:u64 REG2=XED_REG_STACKPOP:rw:SUPP:spw2 +IFORM: POP2P_GPR64u64_GPR64u64_APX +} + + +# EMITTING POPCNT (POPCNT-128-1-nf0) +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ] +PATTERN: EVV 0x88 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: POPCNT_GPRv_GPRv_APX +} + +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x88 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: POPCNT_GPRv_MEMv_APX +} + + +# EMITTING POPCNT (POPCNT-128-1-nf1) +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x88 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: POPCNT_GPRv_GPRv_APX +} + +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x88 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: POPCNT_GPRv_MEMv_APX +} + + +# EMITTING POPCNT (POPCNT-128-2-nf0) +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ] +PATTERN: EVV 0x88 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: POPCNT_GPRv_GPRv_APX +} + +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ CF-0 ZF-MOD OF-0 AF-0 PF-0 SF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x88 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: POPCNT_GPRv_MEMv_APX +} + + +# EMITTING POPCNT (POPCNT-128-2-nf1) +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x88 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: POPCNT_GPRv_GPRv_APX +} + +{ +ICLASS: POPCNT +CPL: 3 +CATEGORY: APX +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x88 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: POPCNT_GPRv_MEMv_APX +} + + +# EMITTING PUSH2 (PUSH2-128-1) +{ +ICLASS: PUSH2 +CPL: 3 +CATEGORY: PUSH +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-PP2 +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3_NORSP():r:q:u64 REG1=GPR64_B_NORSP():r:q:u64 REG2=XED_REG_STACKPUSH:rw:SUPP:spw2 +IFORM: PUSH2_GPR64u64_GPR64u64_APX +} + + +# EMITTING PUSH2P (PUSH2P-128-1) +{ +ICLASS: PUSH2P +CPL: 3 +CATEGORY: PUSH +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-PP2 +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xFF VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR64_N3_NORSP():r:q:u64 REG1=GPR64_B_NORSP():r:q:u64 REG2=XED_REG_STACKPUSH:rw:SUPP:spw2 +IFORM: PUSH2P_GPR64u64_GPR64u64_APX +} + + +# EMITTING RCL (RCL-128-1) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: RCL_GPR8i8_IMM8_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: RCL_MEMi8_IMM8_APX +} + + +# EMITTING RCL (RCL-128-10) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: RCL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: RCL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING RCL (RCL-128-11) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: RCL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: RCL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING RCL (RCL-128-12) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: RCL_GPR8i8_ONE_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: RCL_MEMi8_ONE_APX +} + + +# EMITTING RCL (RCL-128-13) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: RCL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: RCL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING RCL (RCL-128-14) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: RCL_GPRv_ONE_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: RCL_MEMv_ONE_APX +} + + +# EMITTING RCL (RCL-128-15) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: RCL_GPRv_ONE_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: RCL_MEMv_ONE_APX +} + + +# EMITTING RCL (RCL-128-16) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: RCL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: RCL_GPRv_MEMv_ONE_APX +} + + +# EMITTING RCL (RCL-128-17) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: RCL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: RCL_GPRv_MEMv_ONE_APX +} + + +# EMITTING RCL (RCL-128-18) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: RCL_GPR8i8_CL_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: RCL_MEMi8_CL_APX +} + + +# EMITTING RCL (RCL-128-2) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: RCL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: RCL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING RCL (RCL-128-3) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: RCL_GPRv_CL_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: RCL_MEMv_CL_APX +} + + +# EMITTING RCL (RCL-128-4) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: RCL_GPRv_CL_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: RCL_MEMv_CL_APX +} + + +# EMITTING RCL (RCL-128-5) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: RCL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: RCL_GPRv_MEMv_CL_APX +} + + +# EMITTING RCL (RCL-128-6) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: RCL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: RCL_GPRv_MEMv_CL_APX +} + + +# EMITTING RCL (RCL-128-7) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: RCL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: RCL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING RCL (RCL-128-8) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: RCL_GPRv_IMM8_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: RCL_MEMv_IMM8_APX +} + + +# EMITTING RCL (RCL-128-9) +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b010] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: RCL_GPRv_IMM8_APX +} + +{ +ICLASS: RCL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: RCL_MEMv_IMM8_APX +} + + +# EMITTING RCR (RCR-128-1) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: RCR_GPR8i8_IMM8_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: RCR_MEMi8_IMM8_APX +} + + +# EMITTING RCR (RCR-128-10) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: RCR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: RCR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING RCR (RCR-128-11) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: RCR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: RCR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING RCR (RCR-128-12) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: RCR_GPR8i8_ONE_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: RCR_MEMi8_ONE_APX +} + + +# EMITTING RCR (RCR-128-13) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: RCR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: RCR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING RCR (RCR-128-14) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: RCR_GPRv_ONE_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: RCR_MEMv_ONE_APX +} + + +# EMITTING RCR (RCR-128-15) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: RCR_GPRv_ONE_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: RCR_MEMv_ONE_APX +} + + +# EMITTING RCR (RCR-128-16) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: RCR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: RCR_GPRv_MEMv_ONE_APX +} + + +# EMITTING RCR (RCR-128-17) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: RCR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: RCR_GPRv_MEMv_ONE_APX +} + + +# EMITTING RCR (RCR-128-18) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: RCR_GPR8i8_CL_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: RCR_MEMi8_CL_APX +} + + +# EMITTING RCR (RCR-128-2) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: RCR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: RCR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING RCR (RCR-128-3) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: RCR_GPRv_CL_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: RCR_MEMv_CL_APX +} + + +# EMITTING RCR (RCR-128-4) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: RCR_GPRv_CL_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: RCR_MEMv_CL_APX +} + + +# EMITTING RCR (RCR-128-5) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: RCR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: RCR_GPRv_MEMv_CL_APX +} + + +# EMITTING RCR (RCR-128-6) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: RCR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: RCR_GPRv_MEMv_CL_APX +} + + +# EMITTING RCR (RCR-128-7) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: RCR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: RCR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING RCR (RCR-128-8) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: RCR_GPRv_IMM8_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: RCR_MEMv_IMM8_APX +} + + +# EMITTING RCR (RCR-128-9) +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: RCR_GPRv_IMM8_APX +} + +{ +ICLASS: RCR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-TST CF-MOD ], IMMx MUST [ OF-U CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: RCR_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-1-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: ROL_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: ROL_MEMi8_IMM8_APX +} + + +# EMITTING ROL (ROL-128-1-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: ROL_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: ROL_MEMi8_IMM8_APX +} + + +# EMITTING ROL (ROL-128-10-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-10-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-11-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-11-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-12-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: ROL_GPR8i8_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: ROL_MEMi8_ONE_APX +} + + +# EMITTING ROL (ROL-128-12-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: ROL_GPR8i8_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: ROL_MEMi8_ONE_APX +} + + +# EMITTING ROL (ROL-128-13-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: ROL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: ROL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING ROL (ROL-128-13-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: ROL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: ROL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING ROL (ROL-128-14-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROL_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-14-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROL_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-15-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROL_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-15-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROL_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-16-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-16-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-17-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-17-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROL_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROL (ROL-128-18-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPR8i8_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: ROL_MEMi8_CL_APX +} + + +# EMITTING ROL (ROL-128-18-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPR8i8_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: ROL_MEMi8_CL_APX +} + + +# EMITTING ROL (ROL-128-2-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: ROL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING ROL (ROL-128-2-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: ROL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING ROL (ROL-128-3-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROL_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-3-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROL_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-4-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROL_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-4-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROL_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-5-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-5-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-6-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-6-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROL_GPRv_MEMv_CL_APX +} + + +# EMITTING ROL (ROL-128-7-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: ROL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: ROL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ROL (ROL-128-7-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: ROL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: ROL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ROL (ROL-128-8-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROL_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROL_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-8-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROL_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROL_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-9-nf0) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROL_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROL_MEMv_IMM8_APX +} + + +# EMITTING ROL (ROL-128-9-nf1) +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b000] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROL_GPRv_IMM8_APX +} + +{ +ICLASS: ROL +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b000] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROL_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-1-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: ROR_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: ROR_MEMi8_IMM8_APX +} + + +# EMITTING ROR (ROR-128-1-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: ROR_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: ROR_MEMi8_IMM8_APX +} + + +# EMITTING ROR (ROR-128-10-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-10-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-11-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-11-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: ROR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: ROR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-12-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: ROR_GPR8i8_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: ROR_MEMi8_ONE_APX +} + + +# EMITTING ROR (ROR-128-12-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: ROR_GPR8i8_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: ROR_MEMi8_ONE_APX +} + + +# EMITTING ROR (ROR-128-13-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: ROR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: ROR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING ROR (ROR-128-13-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: ROR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: ROR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING ROR (ROR-128-14-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROR_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-14-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROR_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-15-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROR_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-15-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: ROR_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-16-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-16-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-17-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-17-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: ROR_GPRv_MEMv_ONE_APX +} + + +# EMITTING ROR (ROR-128-18-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPR8i8_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: ROR_MEMi8_CL_APX +} + + +# EMITTING ROR (ROR-128-18-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPR8i8_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: ROR_MEMi8_CL_APX +} + + +# EMITTING ROR (ROR-128-2-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: ROR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING ROR (ROR-128-2-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: ROR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING ROR (ROR-128-3-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROR_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-3-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROR_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-4-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROR_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-4-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: ROR_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-5-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-5-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-6-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-6-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: ROR_GPRv_MEMv_CL_APX +} + + +# EMITTING ROR (ROR-128-7-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: ROR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: ROR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ROR (ROR-128-7-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: ROR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: ROR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING ROR (ROR-128-8-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROR_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROR_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-8-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROR_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROR_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-9-nf0) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROR_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD CF-MOD ], IMMx MUST [ OF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROR_MEMv_IMM8_APX +} + + +# EMITTING ROR (ROR-128-9-nf1) +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b001] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: ROR_GPRv_IMM8_APX +} + +{ +ICLASS: ROR +CPL: 3 +CATEGORY: ROTATE +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b001] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: ROR_MEMv_IMM8_APX +} + + +# EMITTING RORX (RORX-128-1) +{ +ICLASS: RORX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF0 VF2 V0F3A MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 IMM0:r:b:i8 +IFORM: RORX_GPR32i32_GPR32i32_IMM8_APX +} + +{ +ICLASS: RORX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF0 VF2 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 IMM0:r:b:i8 +IFORM: RORX_GPR32i32_MEMi32_IMM8_APX +} + + +# EMITTING RORX (RORX-128-2) +{ +ICLASS: RORX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF0 VF2 V0F3A MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 IMM0:r:b:i8 +IFORM: RORX_GPR64i64_GPR64i64_IMM8_APX +} + +{ +ICLASS: RORX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF0 VF2 V0F3A MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 IMM0:r:b:i8 +IFORM: RORX_GPR64i64_MEMi64_IMM8_APX +} + + +# EMITTING SAR (SAR-128-1-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SAR_GPR8i8_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SAR_MEMi8_IMM8_APX +} + + +# EMITTING SAR (SAR-128-1-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SAR_GPR8i8_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SAR_MEMi8_IMM8_APX +} + + +# EMITTING SAR (SAR-128-10-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SAR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SAR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-10-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SAR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SAR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-11-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SAR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SAR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-11-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SAR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SAR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-12-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SAR_GPR8i8_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SAR_MEMi8_ONE_APX +} + + +# EMITTING SAR (SAR-128-12-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SAR_GPR8i8_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SAR_MEMi8_ONE_APX +} + + +# EMITTING SAR (SAR-128-13-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SAR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SAR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SAR (SAR-128-13-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SAR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SAR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SAR (SAR-128-14-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SAR_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-14-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SAR_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-15-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SAR_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-15-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SAR_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-16-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-16-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-17-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-17-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SAR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SAR (SAR-128-18-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPR8i8_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SAR_MEMi8_CL_APX +} + + +# EMITTING SAR (SAR-128-18-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPR8i8_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SAR_MEMi8_CL_APX +} + + +# EMITTING SAR (SAR-128-2-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SAR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SAR (SAR-128-2-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SAR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SAR (SAR-128-3-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SAR_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-3-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SAR_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-4-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SAR_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-4-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SAR_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-5-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-5-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-6-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-6-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SAR_GPRv_MEMv_CL_APX +} + + +# EMITTING SAR (SAR-128-7-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SAR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SAR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SAR (SAR-128-7-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SAR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SAR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SAR (SAR-128-8-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SAR_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SAR_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-8-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SAR_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SAR_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-9-nf0) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SAR_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SAR_MEMv_IMM8_APX +} + + +# EMITTING SAR (SAR-128-9-nf1) +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b111] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SAR_GPRv_IMM8_APX +} + +{ +ICLASS: SAR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b111] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SAR_MEMv_IMM8_APX +} + + +# EMITTING SARX (SARX-128-1) +{ +ICLASS: SARX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF7 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: SARX_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: SARX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: SARX_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING SARX (SARX-128-2) +{ +ICLASS: SARX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF7 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: SARX_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: SARX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: SARX_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING SBB (SBB-128-1) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x18 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: SBB_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x18 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: SBB_MEMi8_GPR8i8_APX +} + + +# EMITTING SBB (SBB-128-10) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: SBB_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: SBB_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SBB (SBB-128-11) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x18 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: SBB_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x18 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: SBB_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING SBB (SBB-128-12) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x19 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: SBB_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x19 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: SBB_MEMv_GPRv_APX +} + + +# EMITTING SBB (SBB-128-13) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x19 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: SBB_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x19 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: SBB_MEMv_GPRv_APX +} + + +# EMITTING SBB (SBB-128-14) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x19 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: SBB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x19 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: SBB_GPRv_MEMv_GPRv_APX +} + + +# EMITTING SBB (SBB-128-15) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x19 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: SBB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x19 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: SBB_GPRv_MEMv_GPRv_APX +} + + +# EMITTING SBB (SBB-128-16) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x1A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: SBB_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x1A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: SBB_GPR8i8_MEMi8_APX +} + + +# EMITTING SBB (SBB-128-17) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x1A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: SBB_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x1A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: SBB_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING SBB (SBB-128-18) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x1B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: SBB_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x1B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: SBB_GPRv_MEMv_APX +} + + +# EMITTING SBB (SBB-128-19) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x1B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: SBB_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x1B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: SBB_GPRv_MEMv_APX +} + + +# EMITTING SBB (SBB-128-2) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: SBB_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: SBB_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SBB (SBB-128-20) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x1B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: SBB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x1B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: SBB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING SBB (SBB-128-21) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x1B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: SBB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x1B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: SBB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING SBB (SBB-128-22) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: SBB_GPR8i8_IMM8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: SBB_MEMi8_IMM8_APX +} + + +# EMITTING SBB (SBB-128-3) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: SBB_GPRv_IMMz_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: SBB_MEMv_IMMz_APX +} + + +# EMITTING SBB (SBB-128-4) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: SBB_GPRv_IMMz_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: SBB_MEMv_IMMz_APX +} + + +# EMITTING SBB (SBB-128-5) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: SBB_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: SBB_GPRv_MEMv_IMMz_APX +} + + +# EMITTING SBB (SBB-128-6) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: SBB_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: SBB_GPRv_MEMv_IMMz_APX +} + + +# EMITTING SBB (SBB-128-7) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: SBB_GPRv_IMM8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: SBB_MEMv_IMM8_APX +} + + +# EMITTING SBB (SBB-128-8) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: SBB_GPRv_IMM8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: SBB_MEMv_IMM8_APX +} + + +# EMITTING SBB (SBB-128-9) +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b011] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: SBB_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SBB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-TST CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: SBB_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SETB (SETB-128-1) +{ +ICLASS: SETB +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x42 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETB_GPR8i8_APX +} + +{ +ICLASS: SETB +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x42 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETB_MEMi8_APX +} + + +# EMITTING SETBE (SETBE-128-1) +{ +ICLASS: SETBE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x46 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETBE_GPR8i8_APX +} + +{ +ICLASS: SETBE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x46 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETBE_MEMi8_APX +} + + +# EMITTING SETL (SETL-128-1) +{ +ICLASS: SETL +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x4C VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETL_GPR8i8_APX +} + +{ +ICLASS: SETL +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x4C VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETL_MEMi8_APX +} + + +# EMITTING SETLE (SETLE-128-1) +{ +ICLASS: SETLE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x4E VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETLE_GPR8i8_APX +} + +{ +ICLASS: SETLE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x4E VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETLE_MEMi8_APX +} + + +# EMITTING SETNB (SETNB-128-1) +{ +ICLASS: SETNB +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x43 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNB_GPR8i8_APX +} + +{ +ICLASS: SETNB +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x43 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNB_MEMi8_APX +} + + +# EMITTING SETNBE (SETNBE-128-1) +{ +ICLASS: SETNBE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x47 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNBE_GPR8i8_APX +} + +{ +ICLASS: SETNBE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ CF-TST ZF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x47 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNBE_MEMi8_APX +} + + +# EMITTING SETNL (SETNL-128-1) +{ +ICLASS: SETNL +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x4D VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNL_GPR8i8_APX +} + +{ +ICLASS: SETNL +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x4D VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNL_MEMi8_APX +} + + +# EMITTING SETNLE (SETNLE-128-1) +{ +ICLASS: SETNLE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x4F VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNLE_GPR8i8_APX +} + +{ +ICLASS: SETNLE +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST OF-TST ZF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x4F VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNLE_MEMi8_APX +} + + +# EMITTING SETNO (SETNO-128-1) +{ +ICLASS: SETNO +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x41 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNO_GPR8i8_APX +} + +{ +ICLASS: SETNO +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x41 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNO_MEMi8_APX +} + + +# EMITTING SETNP (SETNP-128-1) +{ +ICLASS: SETNP +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x4B VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNP_GPR8i8_APX +} + +{ +ICLASS: SETNP +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x4B VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNP_MEMi8_APX +} + + +# EMITTING SETNS (SETNS-128-1) +{ +ICLASS: SETNS +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x49 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNS_GPR8i8_APX +} + +{ +ICLASS: SETNS +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x49 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNS_MEMi8_APX +} + + +# EMITTING SETNZ (SETNZ-128-1) +{ +ICLASS: SETNZ +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x45 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETNZ_GPR8i8_APX +} + +{ +ICLASS: SETNZ +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x45 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETNZ_MEMi8_APX +} + + +# EMITTING SETO (SETO-128-1) +{ +ICLASS: SETO +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x40 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETO_GPR8i8_APX +} + +{ +ICLASS: SETO +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ OF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x40 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETO_MEMi8_APX +} + + +# EMITTING SETP (SETP-128-1) +{ +ICLASS: SETP +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x4A VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETP_GPR8i8_APX +} + +{ +ICLASS: SETP +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ PF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x4A VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETP_MEMi8_APX +} + + +# EMITTING SETS (SETS-128-1) +{ +ICLASS: SETS +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x48 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETS_GPR8i8_APX +} + +{ +ICLASS: SETS +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ SF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x48 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETS_MEMi8_APX +} + + +# EMITTING SETZ (SETZ-128-1) +{ +ICLASS: SETZ +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x44 VF2 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():w:b:i8 +IFORM: SETZ_GPR8i8_APX +} + +{ +ICLASS: SETZ +CPL: 3 +CATEGORY: SETCC +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: READONLY [ ZF-TST ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x44 VF2 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:b:i8 +IFORM: SETZ_MEMi8_APX +} + + +# EMITTING SHA1MSG1 (SHA1MSG1-128-1) +{ +ICLASS: SHA1MSG1 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xD9 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 +IFORM: SHA1MSG1_XMMi32_XMMi32_APX +} + +{ +ICLASS: SHA1MSG1 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xD9 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 +IFORM: SHA1MSG1_XMMi32_MEMi32_APX +} + + +# EMITTING SHA1MSG2 (SHA1MSG2-128-1) +{ +ICLASS: SHA1MSG2 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xDA VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 +IFORM: SHA1MSG2_XMMi32_XMMi32_APX +} + +{ +ICLASS: SHA1MSG2 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xDA VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 +IFORM: SHA1MSG2_XMMi32_MEMi32_APX +} + + +# EMITTING SHA1NEXTE (SHA1NEXTE-128-1) +{ +ICLASS: SHA1NEXTE +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xD8 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 +IFORM: SHA1NEXTE_XMMi32_XMMi32_APX +} + +{ +ICLASS: SHA1NEXTE +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xD8 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 +IFORM: SHA1NEXTE_XMMi32_MEMi32_APX +} + + +# EMITTING SHA1RNDS4 (SHA1RNDS4-128-1) +{ +ICLASS: SHA1RNDS4 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xD4 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 IMM0:r:b:i8 +IFORM: SHA1RNDS4_XMMi32_XMMi32_IMM8_APX +} + +{ +ICLASS: SHA1RNDS4 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xD4 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 IMM0:r:b:i8 +IFORM: SHA1RNDS4_XMMi32_MEMi32_IMM8_APX +} + + +# EMITTING SHA256MSG1 (SHA256MSG1-128-1) +{ +ICLASS: SHA256MSG1 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xDC VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 +IFORM: SHA256MSG1_XMMi32_XMMi32_APX +} + +{ +ICLASS: SHA256MSG1 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xDC VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 +IFORM: SHA256MSG1_XMMi32_MEMi32_APX +} + + +# EMITTING SHA256MSG2 (SHA256MSG2-128-1) +{ +ICLASS: SHA256MSG2 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xDD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 +IFORM: SHA256MSG2_XMMi32_XMMi32_APX +} + +{ +ICLASS: SHA256MSG2 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xDD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 +IFORM: SHA256MSG2_XMMi32_MEMi32_APX +} + + +# EMITTING SHA256RNDS2 (SHA256RNDS2-128-1) +{ +ICLASS: SHA256RNDS2 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +PATTERN: EVV 0xDB VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 REG1=XMM_L_B3():r:dq:i32 REG2=XED_REG_XMM0:r:SUPP:dq:u8 +IFORM: SHA256RNDS2_XMMi32_XMMi32_APX +} + +{ +ICLASS: SHA256RNDS2 +CPL: 3 +CATEGORY: SHA +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-SHA +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE REQUIRES_ALIGNMENT +PATTERN: EVV 0xDB VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=XMM_L_R3():rw:dq:i32 MEM0:r:dq:i32 REG1=XED_REG_XMM0:r:SUPP:dq:u8 +IFORM: SHA256RNDS2_XMMi32_MEMi32_APX +} + + +# EMITTING SHL (SHL-128-1-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SHL_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-1-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SHL_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-10-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-10-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-11-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-11-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-12-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-12-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-13-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-13-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-14-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-14-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-15-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-15-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-16-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SHL_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-16-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SHL_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-17-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-17-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SHL (SHL-128-18-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-18-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-19-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-19-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-2-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-2-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-20-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-20-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-21-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-21-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHL_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-22-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-22-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-23-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-23-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-24-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-24-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-25-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-25-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHL_GPRv_MEMv_CL_APX +} + + +# EMITTING SHL (SHL-128-26-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-26-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-27-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-27-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SHL_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SHL (SHL-128-28-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-28-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-29-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-29-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-3-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-3-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-30-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-30-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-31-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-31-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHL_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHL_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-32-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-32-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-33-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-33-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-34-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-34-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-35-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-35-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHL_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHL_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHL (SHL-128-36-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-36-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SHL_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-4-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-4-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SHL_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SHL (SHL-128-5-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-5-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-6-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-6-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-7-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-7-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-8-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-8-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHL_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-9-nf0) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHL (SHL-128-9-nf1) +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b100] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHL +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHL_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHLD (SHLD-128-1-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-1-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-2-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-2-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-3-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-3-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x24 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x24 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-4-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-4-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x24 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x24 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHLD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHLD (SHLD-128-5-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHLD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-5-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHLD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-6-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHLD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-6-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHLD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-7-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-7-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xA5 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xA5 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-8-nf0) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLD (SHLD-128-8-nf1) +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xA5 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHLD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xA5 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHLD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHLX (SHLX-128-1) +{ +ICLASS: SHLX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF7 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: SHLX_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: SHLX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: SHLX_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING SHLX (SHLX-128-2) +{ +ICLASS: SHLX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF7 V66 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: SHLX_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: SHLX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: SHLX_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING SHR (SHR-128-1-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SHR_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SHR_MEMi8_IMM8_APX +} + + +# EMITTING SHR (SHR-128-1-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b +IFORM: SHR_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b +IFORM: SHR_MEMi8_IMM8_APX +} + + +# EMITTING SHR (SHR-128-10-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-10-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-11-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-11-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b +IFORM: SHR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b +IFORM: SHR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-12-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SHR_GPR8i8_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SHR_MEMi8_ONE_APX +} + + +# EMITTING SHR (SHR-128-12-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:IMPL:b +IFORM: SHR_GPR8i8_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:b:i8 IMM0:r:IMPL:b +IFORM: SHR_MEMi8_ONE_APX +} + + +# EMITTING SHR (SHR-128-13-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SHR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SHR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SHR (SHR-128-13-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:IMPL:b +IFORM: SHR_GPR8i8_GPR8i8_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:IMPL:b +IFORM: SHR_GPR8i8_MEMi8_ONE_APX +} + + +# EMITTING SHR (SHR-128-14-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHR_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-14-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHR_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-15-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHR_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-15-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() ONE() +OPERANDS: MEM0:rw:v IMM0:r:IMPL:b +IFORM: SHR_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-16-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-16-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-17-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-17-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_GPRv_ONE_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE IMPLICIT_ONE +PATTERN: EVV 0xD1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() ONE() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:IMPL:b +IFORM: SHR_GPRv_MEMv_ONE_APX +} + + +# EMITTING SHR (SHR-128-18-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPR8i8_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SHR_MEMi8_CL_APX +} + + +# EMITTING SHR (SHR-128-18-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPR8i8_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=XED_REG_CL:r:IMPL +IFORM: SHR_MEMi8_CL_APX +} + + +# EMITTING SHR (SHR-128-2-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SHR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SHR (SHR-128-2-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xD2 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=XED_REG_CL:r:IMPL +IFORM: SHR_GPR8i8_GPR8i8_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xD2 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPR8i8_MEMi8_CL_APX +} + + +# EMITTING SHR (SHR-128-3-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHR_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-3-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHR_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-4-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHR_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-4-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=XED_REG_CL:r:IMPL +IFORM: SHR_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-5-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-5-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-6-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-6-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xD3 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xD3 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHR_GPRv_MEMv_CL_APX +} + + +# EMITTING SHR (SHR-128-7-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SHR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SHR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SHR (SHR-128-7-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0xC0 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b +IFORM: SHR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0xC0 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b +IFORM: SHR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SHR (SHR-128-8-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHR_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHR_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-8-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHR_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHR_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-9-nf0) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHR_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHR_MEMv_IMM8_APX +} + + +# EMITTING SHR (SHR-128-9-nf1) +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xC1 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b +IFORM: SHR_GPRv_IMM8_APX +} + +{ +ICLASS: SHR +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xC1 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b +IFORM: SHR_MEMv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-1-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-1-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-2-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-2-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() UIMM8() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-3-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-3-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x2C VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2C VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-4-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: IMM1 MUST [ OF-MOD SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ], IMMx MUST [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-4-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x2C V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2C V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() UIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v IMM0:r:b +IFORM: SHRD_GPRv_MEMv_GPRv_IMM8_APX +} + + +# EMITTING SHRD (SHRD-128-5-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHRD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-5-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHRD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-6-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +PATTERN: EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHRD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-6-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rcw:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rcw:v REG0=GPRv_R():r:v REG1=XED_REG_CL:r:IMPL +IFORM: SHRD_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-7-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-7-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xAD VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAD VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-8-nf0) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MAY [ OF-U SF-MOD ZF-MOD AF-U PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRD (SHRD-128-8-nf1) +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0xAD V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v REG3=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_GPRv_GPRv_CL_APX +} + +{ +ICLASS: SHRD +CPL: 3 +CATEGORY: SHIFT +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xAD V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v REG2=XED_REG_CL:r:IMPL +IFORM: SHRD_GPRv_MEMv_GPRv_CL_APX +} + + +# EMITTING SHRX (SHRX-128-1) +{ +ICLASS: SHRX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF7 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 REG1=GPR32_B():r:d:i32 REG2=VGPR32_N3():r:d:i32 +IFORM: SHRX_GPR32i32_GPR32i32_GPR32i32_APX +} + +{ +ICLASS: SHRX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR32_R():w:d:i32 MEM0:r:d:i32 REG1=VGPR32_N3():r:d:i32 +IFORM: SHRX_GPR32i32_MEMi32_GPR32i32_APX +} + + +# EMITTING SHRX (SHRX-128-2) +{ +ICLASS: SHRX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +PATTERN: EVV 0xF7 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 REG1=GPR64_B():r:q:i64 REG2=VGPR64_N3():r:q:i64 +IFORM: SHRX_GPR64i64_GPR64i64_GPR64i64_APX +} + +{ +ICLASS: SHRX +CPL: 3 +CATEGORY: BMI2 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-BMI +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF7 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=GPR64_R():w:q:i64 MEM0:r:q:i64 REG1=VGPR64_N3():r:q:i64 +IFORM: SHRX_GPR64i64_MEMi64_GPR64i64_APX +} + + +# EMITTING SUB (SUB-128-1-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: SUB_MEMi8_GPR8i8_APX +} + + +# EMITTING SUB (SUB-128-1-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: SUB_MEMi8_GPR8i8_APX +} + + +# EMITTING SUB (SUB-128-10-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-10-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-11-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: SUB_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING SUB (SUB-128-11-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x28 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x28 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: SUB_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING SUB (SUB-128-12-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: SUB_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-12-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: SUB_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-13-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: SUB_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-13-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: SUB_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-14-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-14-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x29 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x29 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-15-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-15-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x29 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x29 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: SUB_GPRv_MEMv_GPRv_APX +} + + +# EMITTING SUB (SUB-128-16-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: SUB_GPR8i8_MEMi8_APX +} + + +# EMITTING SUB (SUB-128-16-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: SUB_GPR8i8_MEMi8_APX +} + + +# EMITTING SUB (SUB-128-17-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING SUB (SUB-128-17-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x2A VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x2A VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING SUB (SUB-128-18-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: SUB_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-18-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: SUB_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-19-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: SUB_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-19-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: SUB_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-2-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: SUB_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SUB (SUB-128-2-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: SUB_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: SUB_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING SUB (SUB-128-20-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: SUB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-20-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x2B VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2B VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: SUB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-21-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: SUB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-21-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x2B V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: SUB_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x2B V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: SUB_GPRv_GPRv_MEMv_APX +} + + +# EMITTING SUB (SUB-128-22-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: SUB_GPR8i8_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: SUB_MEMi8_IMM8_APX +} + + +# EMITTING SUB (SUB-128-22-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: SUB_GPR8i8_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: SUB_MEMi8_IMM8_APX +} + + +# EMITTING SUB (SUB-128-3-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: SUB_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: SUB_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-3-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: SUB_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: SUB_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-4-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: SUB_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: SUB_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-4-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: SUB_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: SUB_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-5-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: SUB_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: SUB_GPRv_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-5-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: SUB_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: SUB_GPRv_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-6-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: SUB_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: SUB_GPRv_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-6-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: SUB_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: SUB_GPRv_MEMv_IMMz_APX +} + + +# EMITTING SUB (SUB-128-7-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: SUB_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: SUB_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-7-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: SUB_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: SUB_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-8-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: SUB_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: SUB_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-8-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: SUB_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: SUB_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-9-nf0) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-MOD SF-MOD ZF-MOD AF-MOD PF-MOD CF-MOD ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_MEMv_IMM8_APX +} + + +# EMITTING SUB (SUB-128-9-nf1) +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b101] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: SUB +CPL: 3 +CATEGORY: BINARY +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: SUB_GPRv_MEMv_IMM8_APX +} + + +# EMITTING TZCNT (TZCNT-128-1-nf0) +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF4 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: TZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF4 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: TZCNT_GPRv_MEMv_APX +} + + +# EMITTING TZCNT (TZCNT-128-1-nf1) +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF4 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: TZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF4 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: TZCNT_GPRv_MEMv_APX +} + + +# EMITTING TZCNT (TZCNT-128-2-nf0) +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ] +PATTERN: EVV 0xF4 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: TZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-U SF-U ZF-MOD AF-U PF-U CF-MOD ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0xF4 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: TZCNT_GPRv_MEMv_APX +} + + +# EMITTING TZCNT (TZCNT-128-2-nf1) +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0xF4 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v REG1=GPRv_B():r:v +IFORM: TZCNT_GPRv_GPRv_APX +} + +{ +ICLASS: TZCNT +CPL: 3 +CATEGORY: BMI1 +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0xF4 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():w:v MEM0:r:v +IFORM: TZCNT_GPRv_MEMv_APX +} + + +# EMITTING WRSSD (WRSSD-128-1) +{ +ICLASS: WRSSD +CPL: 3 +CATEGORY: CET +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CET-WRSS +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x66 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:d:u32 REG0=GPR32_R():r:d:u32 +IFORM: WRSSD_MEMu32_GPR32u32_APX +} + + +# EMITTING WRSSQ (WRSSQ-128-1) +{ +ICLASS: WRSSQ +CPL: 3 +CATEGORY: CET +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CET-WRSS +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x66 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:q:u64 REG0=GPR64_R():r:q:u64 +IFORM: WRSSQ_MEMu64_GPR64u64_APX +} + + +# EMITTING WRUSSD (WRUSSD-128-1) +{ +ICLASS: WRUSSD +CPL: 0 +CATEGORY: CET +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CET-WRUSS +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x65 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:d:u32 REG0=GPR32_R():r:d:u32 +IFORM: WRUSSD_MEMu32_GPR32u32_APX +} + + +# EMITTING WRUSSQ (WRUSSQ-128-1) +{ +ICLASS: WRUSSQ +CPL: 0 +CATEGORY: CET +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-CET-WRUSS +REAL_OPCODE: Y +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x65 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 W1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:w:q:u64 REG0=GPR64_R():r:q:u64 +IFORM: WRUSSQ_MEMu64_GPR64u64_APX +} + + +# EMITTING XOR (XOR-128-1-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: XOR_MEMi8_GPR8i8_APX +} + + +# EMITTING XOR (XOR-128-1-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_B():rw:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:b:i8 REG0=GPR8_R():r:b:i8 +IFORM: XOR_MEMi8_GPR8i8_APX +} + + +# EMITTING XOR (XOR-128-10-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-10-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-11-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: XOR_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING XOR (XOR-128-11-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x30 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 REG2=GPR8_R():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x30 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 REG1=GPR8_R():r:b:i8 +IFORM: XOR_GPR8i8_MEMi8_GPR8i8_APX +} + + +# EMITTING XOR (XOR-128-12-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: XOR_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-12-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: XOR_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-13-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: XOR_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-13-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_B():rw:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: MEM0:rw:v REG0=GPRv_R():r:v +IFORM: XOR_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-14-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-14-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x31 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x31 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-15-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-15-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x31 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v REG2=GPRv_R():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x31 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v REG1=GPRv_R():r:v +IFORM: XOR_GPRv_MEMv_GPRv_APX +} + + +# EMITTING XOR (XOR-128-16-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: XOR_GPR8i8_MEMi8_APX +} + + +# EMITTING XOR (XOR-128-16-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 REG1=GPR8_B():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPR8_R():rw:b:i8 MEM0:r:b:i8 +IFORM: XOR_GPR8i8_MEMi8_APX +} + + +# EMITTING XOR (XOR-128-17-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING XOR (XOR-128-17-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x32 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 REG2=GPR8_B():r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_GPR8i8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x32 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_R():r:b:i8 MEM0:r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_MEMi8_APX +} + + +# EMITTING XOR (XOR-128-18-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: XOR_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-18-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: XOR_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-19-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: XOR_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-19-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v REG1=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=0 NF=1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() +OPERANDS: REG0=GPRv_R():rw:v MEM0:r:v +IFORM: XOR_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-2-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: XOR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING XOR (XOR-128-2-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 REG1=GPR8_B():r:b:i8 IMM0:r:b:i8 +IFORM: XOR_GPR8i8_GPR8i8_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPR8_N3():w:b:i8 MEM0:r:b:i8 IMM0:r:b:i8 +IFORM: XOR_GPR8i8_MEMi8_IMM8_APX +} + + +# EMITTING XOR (XOR-128-20-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: XOR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-20-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x33 VNP MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x33 VNP MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: XOR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-21-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=0 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: XOR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-21-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x33 V66 MAP4 MOD[0b11] MOD=3 REG[rrr] RM[nnn] ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v REG2=GPRv_B():r:v +IFORM: XOR_GPRv_GPRv_GPRv_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x33 V66 MAP4 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() ND=1 NF=1 VL128 mode64 ZEROING=0 EVAPX() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_R():r:v MEM0:r:v +IFORM: XOR_GPRv_GPRv_MEMv_APX +} + + +# EMITTING XOR (XOR-128-22-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: XOR_GPR8i8_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: XOR_MEMi8_IMM8_APX +} + + +# EMITTING XOR (XOR-128-22-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP +PATTERN: EVV 0x80 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPR8_B():rw:b:i8 IMM0:r:b:i8 +IFORM: XOR_GPR8i8_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF BYTEOP DISP8_NO_SCALE +PATTERN: EVV 0x80 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:b:i8 IMM0:r:b:i8 +IFORM: XOR_MEMi8_IMM8_APX +} + + +# EMITTING XOR (XOR-128-3-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: XOR_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: XOR_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-3-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: XOR_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: XOR_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-4-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: XOR_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: XOR_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-4-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:z +IFORM: XOR_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMMz() +OPERANDS: MEM0:rw:v IMM0:r:z +IFORM: XOR_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-5-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: XOR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: XOR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-5-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: XOR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: XOR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-6-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: XOR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: XOR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-6-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x81 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:z +IFORM: XOR_GPRv_GPRv_IMMz_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x81 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMMz() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:z +IFORM: XOR_GPRv_MEMv_IMMz_APX +} + + +# EMITTING XOR (XOR-128-7-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: XOR_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: XOR_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-7-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: XOR_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: XOR_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-8-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: XOR_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF0 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: XOR_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-8-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF +PATTERN: EVV 0x83 V66 MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=GPRv_B():rw:v IMM0:r:b:i8 +IFORM: XOR_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 V66 MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=0 NO_SCC_NF1 VL128 mode64 NOEVSR ZEROING=0 EVAPX() SIMM8() +OPERANDS: MEM0:rw:v IMM0:r:b:i8 +IFORM: XOR_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-9-nf0) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +FLAGS: MUST [ OF-0 SF-MOD ZF-MOD AF-U PF-MOD CF-0 ] +ATTRIBUTES: APX_NDD DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF0 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_MEMv_IMM8_APX +} + + +# EMITTING XOR (XOR-128-9-nf1) +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF +PATTERN: EVV 0x83 VNP MAP4 MOD[0b11] MOD=3 REG[0b110] RM[nnn] ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v REG1=GPRv_B():r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_GPRv_IMM8_APX +} + +{ +ICLASS: XOR +CPL: 3 +CATEGORY: LOGICAL +EXTENSION: APXEVEX +ISA_SET: APX_F +EXCEPTIONS: APX-EVEX-INT +REAL_OPCODE: Y +ATTRIBUTES: APX_NDD APX_NF DISP8_NO_SCALE +PATTERN: EVV 0x83 VNP MAP4 MOD[mm] MOD!=3 REG[0b110] RM[nnn] MODRM() ND=1 NO_SCC_NF1 VL128 mode64 ZEROING=0 EVAPX() SIMM8() +OPERANDS: REG0=VGPRv_N3():w:v MEM0:r:v IMM0:r:b:i8 +IFORM: XOR_GPRv_MEMv_IMM8_APX +} + + +INSTRUCTIONS():: +# EMITTING JMPABS (JMPABS-N/A-1) +{ +ICLASS: JMPABS +CPL: 3 +CATEGORY: UNCOND_BR +EXTENSION: APX_F +ISA_SET: APX_F +EXCEPTIONS: APX-LEGACY-JMPABS +REAL_OPCODE: Y +PATTERN: 0xA1 norexw_prefix no66_prefix no67_prefix norep rex2_refining_prefix mode64 BRDISP64() +OPERANDS: ABSBR:r:u64 +IFORM: JMPABS_ABSBRu64_APX +} + + diff --git a/datafiles/apx-f/apx-fields.txt b/datafiles/apx-f/apx-fields.txt new file mode 100644 index 00000000..46d8ea59 --- /dev/null +++ b/datafiles/apx-f/apx-fields.txt @@ -0,0 +1,37 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + + +############### EVEX ################### +# Separate the EVEX encoding space by a different payload bits interpretation +EVVSPACE SCALAR xed_bits_t 2 SUPPRESSED NOPRINT INTERNAL DO EO + + +### APX Promoted enc interpretation ### +# EVEX.ND bit (3 operands NDD/New-Data-Destination) +ND SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO + +# EVEX.NF bit +# EI -> Encoder input in order to enable encoder request of No-Flags APX instructions. +# This is also essential for consistent "decode-encode" path +NF SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EI + + +###### APX CCMP/CTEST EVEX interpretation ####### +SCC SCALAR xed_bits_t 4 SUPPRESSED NOPRINT INTERNAL DO EO + diff --git a/datafiles/apx-f/apx-operand-types.txt b/datafiles/apx-f/apx-operand-types.txt new file mode 100644 index 00000000..c551c3a7 --- /dev/null +++ b/datafiles/apx-f/apx-operand-types.txt @@ -0,0 +1,23 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL +# +# +#XTYPE TYPE BITS-PER-ELEM +# +i128 INT 128 + diff --git a/datafiles/apx-f/apx-operand-width.txt b/datafiles/apx-f/apx-operand-width.txt new file mode 100644 index 00000000..d7c50d93 --- /dev/null +++ b/datafiles/apx-f/apx-operand-width.txt @@ -0,0 +1,29 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL +# +# +# the default xtype can be overridden in each operand using a ":" followed by an explicit xtype +## +## the width defaults to bytes. But it can be bits if it has a "bits" suffix +## +# +# default +#oc2-code XTYPE width16 width32 width64 (if only one width is shown, it is for all widths) + +yu uint 4 4 8 +zd0 i32 512bits # SIMD operand/mem width, Doesn't affect VL diff --git a/datafiles/apx-f/apx-ppx-isa.xed.txt b/datafiles/apx-f/apx-ppx-isa.xed.txt new file mode 100644 index 00000000..05fd14c6 --- /dev/null +++ b/datafiles/apx-f/apx-ppx-isa.xed.txt @@ -0,0 +1,51 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL +# +# +# +# ***** Manually GENERATED FILE ***** +# ***** Define PUSH/POP PPX ***** +# +# +# +INSTRUCTIONS():: +{ +ICLASS: PUSHP +CPL: 3 +CATEGORY: PUSH +EXTENSION: APX_F +ISA_SET: APX_F +COMMENT: PUSH PPX + +PATTERN: 0b0101_0 SRM[rrr] rex2_refining_prefix rexw_prefix mode64 DF64() +OPERANDS: REG0=GPRv_SB():r REG1=XED_REG_STACKPUSH:rw:spw:SUPP +IFORM: PUSHP_GPRv +} + +{ +ICLASS: POPP +CPL: 3 +CATEGORY: POP +EXTENSION: APX_F +ISA_SET: APX_F +COMMENT: POP PPX + +PATTERN: 0b0101_1 SRM[rrr] mode64 rex2_refining_prefix rexw_prefix DF64() +OPERANDS: REG0=GPRv_SB():w REG1=XED_REG_STACKPOP:rw:spw:SUPP +IFORM: POPP_GPRv +} diff --git a/datafiles/apx-f/apx-regs.txt b/datafiles/apx-f/apx-regs.txt new file mode 100644 index 00000000..d83ead7e --- /dev/null +++ b/datafiles/apx-f/apx-regs.txt @@ -0,0 +1,38 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + + +##### DFV ##### +# Reg index represents the default flags values of [OF, SF, ZF, CF] +DFV0 pseudo 4 # [ OF=0, SF=0, ZF=0, CF=0 ] +DFV1 pseudo 4 # [ OF=0, SF=0, ZF=0, CF=1 ] +DFV2 pseudo 4 # [ OF=0, SF=0, ZF=1, CF=0 ] +DFV3 pseudo 4 # [ OF=0, SF=0, ZF=1, CF=1 ] +DFV4 pseudo 4 # [ OF=0, SF=1, ZF=0, CF=0 ] +DFV5 pseudo 4 # [ OF=0, SF=1, ZF=0, CF=1 ] +DFV6 pseudo 4 # [ OF=0, SF=1, ZF=1, CF=0 ] +DFV7 pseudo 4 # [ OF=0, SF=1, ZF=1, CF=1 ] +DFV8 pseudo 4 # [ OF=1, SF=0, ZF=0, CF=0 ] +DFV9 pseudo 4 # [ OF=1, SF=0, ZF=0, CF=1 ] +DFV10 pseudo 4 # [ OF=1, SF=0, ZF=1, CF=0 ] +DFV11 pseudo 4 # [ OF=1, SF=0, ZF=1, CF=1 ] +DFV12 pseudo 4 # [ OF=1, SF=1, ZF=0, CF=0 ] +DFV13 pseudo 4 # [ OF=1, SF=1, ZF=0, CF=1 ] +DFV14 pseudo 4 # [ OF=1, SF=1, ZF=1, CF=0 ] +DFV15 pseudo 4 # [ OF=1, SF=1, ZF=1, CF=1 ] + diff --git a/datafiles/apx-f/apx-sse-reg-tables.txt b/datafiles/apx-f/apx-sse-reg-tables.txt new file mode 100644 index 00000000..7e5ebf3a --- /dev/null +++ b/datafiles/apx-f/apx-sse-reg-tables.txt @@ -0,0 +1,66 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +# Promoted-from-SSE EVEX instructions +# Enables ONLY 16 lower XMMs +xed_reg_enum_t XMM_L_R3():: +mode64 | OUTREG=XMM_L_R3_64() + +xed_reg_enum_t XMM_L_R3_64():: +REXR4=0 REXR=0 REG=0 | OUTREG=XED_REG_XMM0 +REXR4=0 REXR=0 REG=1 | OUTREG=XED_REG_XMM1 +REXR4=0 REXR=0 REG=2 | OUTREG=XED_REG_XMM2 +REXR4=0 REXR=0 REG=3 | OUTREG=XED_REG_XMM3 +REXR4=0 REXR=0 REG=4 | OUTREG=XED_REG_XMM4 +REXR4=0 REXR=0 REG=5 | OUTREG=XED_REG_XMM5 +REXR4=0 REXR=0 REG=6 | OUTREG=XED_REG_XMM6 +REXR4=0 REXR=0 REG=7 | OUTREG=XED_REG_XMM7 + +REXR4=0 REXR=1 REG=0 | OUTREG=XED_REG_XMM8 +REXR4=0 REXR=1 REG=1 | OUTREG=XED_REG_XMM9 +REXR4=0 REXR=1 REG=2 | OUTREG=XED_REG_XMM10 +REXR4=0 REXR=1 REG=3 | OUTREG=XED_REG_XMM11 +REXR4=0 REXR=1 REG=4 | OUTREG=XED_REG_XMM12 +REXR4=0 REXR=1 REG=5 | OUTREG=XED_REG_XMM13 +REXR4=0 REXR=1 REG=6 | OUTREG=XED_REG_XMM14 +REXR4=0 REXR=1 REG=7 | OUTREG=XED_REG_XMM15 + + +# Enables ONLY 16 lower XMMs +xed_reg_enum_t XMM_L_B3():: +mode64 | OUTREG=XMM_L_B3_64() + +xed_reg_enum_t XMM_L_B3_64():: +REXX=0 REXB=0 RM=0 | OUTREG=XED_REG_XMM0 +REXX=0 REXB=0 RM=1 | OUTREG=XED_REG_XMM1 +REXX=0 REXB=0 RM=2 | OUTREG=XED_REG_XMM2 +REXX=0 REXB=0 RM=3 | OUTREG=XED_REG_XMM3 +REXX=0 REXB=0 RM=4 | OUTREG=XED_REG_XMM4 +REXX=0 REXB=0 RM=5 | OUTREG=XED_REG_XMM5 +REXX=0 REXB=0 RM=6 | OUTREG=XED_REG_XMM6 +REXX=0 REXB=0 RM=7 | OUTREG=XED_REG_XMM7 + +REXX=0 REXB=1 RM=0 | OUTREG=XED_REG_XMM8 +REXX=0 REXB=1 RM=1 | OUTREG=XED_REG_XMM9 +REXX=0 REXB=1 RM=2 | OUTREG=XED_REG_XMM10 +REXX=0 REXB=1 RM=3 | OUTREG=XED_REG_XMM11 +REXX=0 REXB=1 RM=4 | OUTREG=XED_REG_XMM12 +REXX=0 REXB=1 RM=5 | OUTREG=XED_REG_XMM13 +REXX=0 REXB=1 RM=6 | OUTREG=XED_REG_XMM14 +REXX=0 REXB=1 RM=7 | OUTREG=XED_REG_XMM15 + diff --git a/datafiles/apx-f/apx-state-bits.txt b/datafiles/apx-f/apx-state-bits.txt new file mode 100644 index 00000000..4e1cd03b --- /dev/null +++ b/datafiles/apx-f/apx-state-bits.txt @@ -0,0 +1,48 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +MAP4 MAP=4 + +EVEX_APX EVVSPACE=1 # APX Promoted-like EVEX encoding (ND/ZU/NF) +EVEX_APX_SCC EVVSPACE=2 # APX CCMP/CTEST encoding + +############## SCC ############## +# (VEXDEST4=~EVEX.V4 -> the inverted encoding bit) +SCC0 VEXDEST4=1 MASK=0 +SCC1 VEXDEST4=1 MASK=1 +SCC2 VEXDEST4=1 MASK=2 +SCC3 VEXDEST4=1 MASK=3 +SCC4 VEXDEST4=1 MASK=4 +SCC5 VEXDEST4=1 MASK=5 +SCC6 VEXDEST4=1 MASK=6 +SCC7 VEXDEST4=1 MASK=7 +SCC8 VEXDEST4=0 MASK=0 +SCC9 VEXDEST4=0 MASK=1 +SCC10 VEXDEST4=0 MASK=2 +SCC11 VEXDEST4=0 MASK=3 +SCC12 VEXDEST4=0 MASK=4 +SCC13 VEXDEST4=0 MASK=5 +SCC14 VEXDEST4=0 MASK=6 +SCC15 VEXDEST4=0 MASK=7 + +# Use NO_SSC pattern conditions for instructions that share (enc-space, mapId, opcode) combination +# with APX/SCC instructions. +# Explicitly define a MASK condition to prevent it from being "don't-care" and increase +# code-size (with all MASK={0-7} options). +NO_SCC_NF0 NF=0 MASK=0 +NO_SCC_NF1 NF=1 MASK=4 diff --git a/datafiles/apx-f/cpuid.xed.txt b/datafiles/apx-f/cpuid.xed.txt new file mode 100644 index 00000000..a9a9061d --- /dev/null +++ b/datafiles/apx-f/cpuid.xed.txt @@ -0,0 +1,24 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +XED_ISA_SET_APX_F : apx_f.7.1.edx.21 +XED_ISA_SET_APX_F_AMX : apx_f.7.1.edx.21 amx_tiles.7.0.edx.24 +XED_ISA_SET_APX_F_KOPB : apx_f.7.1.edx.21 +XED_ISA_SET_APX_F_KOPW : apx_f.7.1.edx.21 +XED_ISA_SET_APX_F_KOPD : apx_f.7.1.edx.21 +XED_ISA_SET_APX_F_KOPQ : apx_f.7.1.edx.21 diff --git a/datafiles/apx-f/files.cfg b/datafiles/apx-f/files.cfg new file mode 100644 index 00000000..1c8f87e1 --- /dev/null +++ b/datafiles/apx-f/files.cfg @@ -0,0 +1,65 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + + ############################################################################## + ### APX OPERANDS NTs #### + # EVEX/SSE operand NTs + dec-patterns: apx-sse-reg-tables.txt + enc-dec-patterns: apx-sse-reg-tables.txt + + # EVEX/GPR operand NTs + dec-patterns: apx-evgpr-reg-tables.txt + enc-dec-patterns: apx-evgpr-reg-tables.txt + + # EVEX/TMM operand NTs + dec-patterns: apx-amx-evex-reg-tables.txt + enc-dec-patterns: apx-amx-evex-reg-tables.txt + + ############################################################################## + ########### APX PATTERN NTs ############ + dec-patterns: apx-evex-dec.txt + enc-patterns: apx-evex-enc.txt + + ############################################################################## + ### APX promoted and new instructions #### + # APX promoted and new EVEX instructions + dec-instructions: apx-f-isa.xed.txt + enc-instructions: apx-f-isa.xed.txt + # Promoted from AMX + dec-instructions: apx-f-amx-isa.xed.txt + enc-instructions: apx-f-amx-isa.xed.txt + # APX POP/PUSH PPX + dec-instructions: apx-ppx-isa.xed.txt + enc-instructions: apx-ppx-isa.xed.txt + + # Exclude from enc2 (No EGPR, REX2 and AMX-EVEX support yet) + no-enc2-instructions: apx-f-isa.xed.txt + no-enc2-instructions: apx-f-amx-isa.xed.txt + no-enc2-instructions: apx-ppx-isa.xed.txt + + ############################################################################## + ########### APX Peripherals ########### + map-descriptions: apx-evex-maps.txt + element-types: apx-operand-types.txt + widths: apx-operand-width.txt + state: apx-state-bits.txt + fields: apx-fields.txt + registers: apx-regs.txt + errors: apx-error-enum.txt + cpuid: cpuid.xed.txt + diff --git a/datafiles/avx-vnni-int8/avx-vnni-int8-isa.xed.txt b/datafiles/avx-vnni-int8/avx-vnni-int8-isa.xed.txt index aca03f85..74259329 100644 --- a/datafiles/avx-vnni-int8/avx-vnni-int8-isa.xed.txt +++ b/datafiles/avx-vnni-int8/avx-vnni-int8-isa.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -32,9 +32,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 +PATTERN: VV1 0x50 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 REG2=XMM_B():r:dq:4i8 IFORM: VPDPBSSD_XMMi32_XMM4i8_XMM4i8 } @@ -45,9 +45,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 +PATTERN: VV1 0x50 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 MEM0:r:dq:4i8 IFORM: VPDPBSSD_XMMi32_XMM4i8_MEM4i8 } @@ -60,9 +60,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W0 +PATTERN: VV1 0x50 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 REG2=YMM_B():r:qq:4i8 IFORM: VPDPBSSD_YMMi32_YMM4i8_YMM4i8 } @@ -73,9 +73,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 +PATTERN: VV1 0x50 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 MEM0:r:qq:4i8 IFORM: VPDPBSSD_YMMi32_YMM4i8_MEM4i8 } @@ -88,9 +88,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 +PATTERN: VV1 0x51 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 REG2=XMM_B():r:dq:4i8 IFORM: VPDPBSSDS_XMMi32_XMM4i8_XMM4i8 } @@ -101,9 +101,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 +PATTERN: VV1 0x51 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 MEM0:r:dq:4i8 IFORM: VPDPBSSDS_XMMi32_XMM4i8_MEM4i8 } @@ -116,9 +116,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W0 +PATTERN: VV1 0x51 VF2 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 REG2=YMM_B():r:qq:4i8 IFORM: VPDPBSSDS_YMMi32_YMM4i8_YMM4i8 } @@ -129,9 +129,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 +PATTERN: VV1 0x51 VF2 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 MEM0:r:qq:4i8 IFORM: VPDPBSSDS_YMMi32_YMM4i8_MEM4i8 } @@ -144,9 +144,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 +PATTERN: VV1 0x50 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 REG2=XMM_B():r:dq:4u8 IFORM: VPDPBSUD_XMMi32_XMM4i8_XMM4u8 } @@ -157,9 +157,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 +PATTERN: VV1 0x50 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 MEM0:r:dq:4u8 IFORM: VPDPBSUD_XMMi32_XMM4i8_MEM4u8 } @@ -172,9 +172,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W0 +PATTERN: VV1 0x50 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 REG2=YMM_B():r:qq:4u8 IFORM: VPDPBSUD_YMMi32_YMM4i8_YMM4u8 } @@ -185,9 +185,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 +PATTERN: VV1 0x50 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 MEM0:r:qq:4u8 IFORM: VPDPBSUD_YMMi32_YMM4i8_MEM4u8 } @@ -200,9 +200,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 +PATTERN: VV1 0x51 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 REG2=XMM_B():r:dq:4u8 IFORM: VPDPBSUDS_XMMi32_XMM4i8_XMM4u8 } @@ -213,9 +213,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 +PATTERN: VV1 0x51 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL128 OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4i8 MEM0:r:dq:4u8 IFORM: VPDPBSUDS_XMMi32_XMM4i8_MEM4u8 } @@ -228,9 +228,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W0 +PATTERN: VV1 0x51 VF3 V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 REG2=YMM_B():r:qq:4u8 IFORM: VPDPBSUDS_YMMi32_YMM4i8_YMM4u8 } @@ -241,9 +241,9 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 +PATTERN: VV1 0x51 VF3 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL256 OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4i8 MEM0:r:qq:4u8 IFORM: VPDPBSUDS_YMMi32_YMM4i8_MEM4u8 } @@ -256,11 +256,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 -OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4u8 REG2=XMM_B():r:dq:4u8 -IFORM: VPDPBUUD_XMMi32_XMM4u8_XMM4u8 +PATTERN: VV1 0x50 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL128 +OPERANDS: REG0=XMM_R():rw:dq:u32 REG1=XMM_N():r:dq:4u8 REG2=XMM_B():r:dq:4u8 +IFORM: VPDPBUUD_XMMu32_XMM4u8_XMM4u8 } { @@ -269,11 +269,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 -OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4u8 MEM0:r:dq:4u8 -IFORM: VPDPBUUD_XMMi32_XMM4u8_MEM4u8 +PATTERN: VV1 0x50 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL128 +OPERANDS: REG0=XMM_R():rw:dq:u32 REG1=XMM_N():r:dq:4u8 MEM0:r:dq:4u8 +IFORM: VPDPBUUD_XMMu32_XMM4u8_MEM4u8 } @@ -284,11 +284,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W0 -OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4u8 REG2=YMM_B():r:qq:4u8 -IFORM: VPDPBUUD_YMMi32_YMM4u8_YMM4u8 +PATTERN: VV1 0x50 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL256 +OPERANDS: REG0=YMM_R():rw:qq:u32 REG1=YMM_N():r:qq:4u8 REG2=YMM_B():r:qq:4u8 +IFORM: VPDPBUUD_YMMu32_YMM4u8_YMM4u8 } { @@ -297,11 +297,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x50 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 -OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4u8 MEM0:r:qq:4u8 -IFORM: VPDPBUUD_YMMi32_YMM4u8_MEM4u8 +PATTERN: VV1 0x50 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL256 +OPERANDS: REG0=YMM_R():rw:qq:u32 REG1=YMM_N():r:qq:4u8 MEM0:r:qq:4u8 +IFORM: VPDPBUUD_YMMu32_YMM4u8_MEM4u8 } @@ -312,11 +312,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL128 W0 -OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4u8 REG2=XMM_B():r:dq:4u8 -IFORM: VPDPBUUDS_XMMi32_XMM4u8_XMM4u8 +PATTERN: VV1 0x51 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL128 +OPERANDS: REG0=XMM_R():rw:dq:u32 REG1=XMM_N():r:dq:4u8 REG2=XMM_B():r:dq:4u8 +IFORM: VPDPBUUDS_XMMu32_XMM4u8_XMM4u8 } { @@ -325,11 +325,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL128 W0 -OPERANDS: REG0=XMM_R():rw:dq:i32 REG1=XMM_N():r:dq:4u8 MEM0:r:dq:4u8 -IFORM: VPDPBUUDS_XMMi32_XMM4u8_MEM4u8 +PATTERN: VV1 0x51 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL128 +OPERANDS: REG0=XMM_R():rw:dq:u32 REG1=XMM_N():r:dq:4u8 MEM0:r:dq:4u8 +IFORM: VPDPBUUDS_XMMu32_XMM4u8_MEM4u8 } @@ -340,11 +340,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] VL256 W0 -OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4u8 REG2=YMM_B():r:qq:4u8 -IFORM: VPDPBUUDS_YMMi32_YMM4u8_YMM4u8 +PATTERN: VV1 0x51 VNP V0F38 MOD[0b11] MOD=3 REG[rrr] RM[nnn] W0 VL256 +OPERANDS: REG0=YMM_R():rw:qq:u32 REG1=YMM_N():r:qq:4u8 REG2=YMM_B():r:qq:4u8 +IFORM: VPDPBUUDS_YMMu32_YMM4u8_YMM4u8 } { @@ -353,11 +353,11 @@ CPL: 3 CATEGORY: VEX EXTENSION: AVX_VNNI_INT8 ISA_SET: AVX_VNNI_INT8 -EXCEPTIONS: avx-type-4 +EXCEPTIONS: avx-type-4 REAL_OPCODE: Y -PATTERN: VV1 0x51 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL256 W0 -OPERANDS: REG0=YMM_R():rw:qq:i32 REG1=YMM_N():r:qq:4u8 MEM0:r:qq:4u8 -IFORM: VPDPBUUDS_YMMi32_YMM4u8_MEM4u8 +PATTERN: VV1 0x51 VNP V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() W0 VL256 +OPERANDS: REG0=YMM_R():rw:qq:u32 REG1=YMM_N():r:qq:4u8 MEM0:r:qq:4u8 +IFORM: VPDPBUUDS_YMMu32_YMM4u8_MEM4u8 } diff --git a/datafiles/avx512-skx/cpuid.xed.txt b/datafiles/avx512-skx/cpuid.xed.txt index 21b80218..1ae548a6 100644 --- a/datafiles/avx512-skx/cpuid.xed.txt +++ b/datafiles/avx512-skx/cpuid.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,11 +19,13 @@ XED_ISA_SET_AVX512BW_128N: avx512bw.7.0.ebx.30 XED_ISA_SET_AVX512BW_256: avx512bw.7.0.ebx.30 avx512vl.7.0.ebx.31 XED_ISA_SET_AVX512BW_512: avx512bw.7.0.ebx.30 - XED_ISA_SET_AVX512BW_KOP: avx512bw.7.0.ebx.30 + XED_ISA_SET_AVX512BW_KOPD: avx512bw.7.0.ebx.30 + XED_ISA_SET_AVX512BW_KOPQ: avx512bw.7.0.ebx.30 XED_ISA_SET_AVX512DQ_128: avx512dq.7.0.ebx.17 avx512vl.7.0.ebx.31 XED_ISA_SET_AVX512DQ_128N: avx512dq.7.0.ebx.17 XED_ISA_SET_AVX512DQ_256: avx512dq.7.0.ebx.17 avx512vl.7.0.ebx.31 XED_ISA_SET_AVX512DQ_512: avx512dq.7.0.ebx.17 - XED_ISA_SET_AVX512DQ_KOP: avx512dq.7.0.ebx.17 + XED_ISA_SET_AVX512DQ_KOPB: avx512dq.7.0.ebx.17 + XED_ISA_SET_AVX512DQ_KOPW: avx512dq.7.0.ebx.17 XED_ISA_SET_AVX512DQ_SCALAR: avx512dq.7.0.ebx.17 diff --git a/datafiles/avx512-skx/skx-isa.xed.txt b/datafiles/avx512-skx/skx-isa.xed.txt index ca42cbcd..e5fc1b3a 100644 --- a/datafiles/avx512-skx/skx-isa.xed.txt +++ b/datafiles/avx512-skx/skx-isa.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -27258,7 +27258,7 @@ ICLASS: KADDB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27274,7 +27274,7 @@ ICLASS: KADDD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27290,7 +27290,7 @@ ICLASS: KADDQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27306,7 +27306,7 @@ ICLASS: KADDW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27322,7 +27322,7 @@ ICLASS: KANDB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27338,7 +27338,7 @@ ICLASS: KANDD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27354,7 +27354,7 @@ ICLASS: KANDNB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27370,7 +27370,7 @@ ICLASS: KANDND CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27386,7 +27386,7 @@ ICLASS: KANDNQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27402,7 +27402,7 @@ ICLASS: KANDQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27418,7 +27418,7 @@ ICLASS: KMOVB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27432,7 +27432,7 @@ ICLASS: KMOVB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27448,7 +27448,7 @@ ICLASS: KMOVB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27464,7 +27464,7 @@ ICLASS: KMOVB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27480,7 +27480,7 @@ ICLASS: KMOVB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27496,7 +27496,7 @@ ICLASS: KMOVD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27510,7 +27510,7 @@ ICLASS: KMOVD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27526,7 +27526,7 @@ ICLASS: KMOVD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27542,7 +27542,7 @@ ICLASS: KMOVD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27563,7 +27563,7 @@ ICLASS: KMOVD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27584,7 +27584,7 @@ ICLASS: KMOVQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27598,7 +27598,7 @@ ICLASS: KMOVQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27614,7 +27614,7 @@ ICLASS: KMOVQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27630,7 +27630,7 @@ ICLASS: KMOVQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27646,7 +27646,7 @@ ICLASS: KMOVQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27662,7 +27662,7 @@ ICLASS: KNOTB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27678,7 +27678,7 @@ ICLASS: KNOTD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27694,7 +27694,7 @@ ICLASS: KNOTQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27710,7 +27710,7 @@ ICLASS: KORB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27726,7 +27726,7 @@ ICLASS: KORD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27742,7 +27742,7 @@ ICLASS: KORQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27758,7 +27758,7 @@ ICLASS: KORTESTB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27775,7 +27775,7 @@ ICLASS: KORTESTD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27792,7 +27792,7 @@ ICLASS: KORTESTQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27809,7 +27809,7 @@ ICLASS: KSHIFTLB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27825,7 +27825,7 @@ ICLASS: KSHIFTLD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27841,7 +27841,7 @@ ICLASS: KSHIFTLQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27857,7 +27857,7 @@ ICLASS: KSHIFTRB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27873,7 +27873,7 @@ ICLASS: KSHIFTRD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27889,7 +27889,7 @@ ICLASS: KSHIFTRQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27905,7 +27905,7 @@ ICLASS: KTESTB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27922,7 +27922,7 @@ ICLASS: KTESTD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27939,7 +27939,7 @@ ICLASS: KTESTQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27956,7 +27956,7 @@ ICLASS: KTESTW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -27973,7 +27973,7 @@ ICLASS: KUNPCKDQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -27989,7 +27989,7 @@ ICLASS: KUNPCKWD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -28005,7 +28005,7 @@ ICLASS: KXNORB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -28021,7 +28021,7 @@ ICLASS: KXNORD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -28037,7 +28037,7 @@ ICLASS: KXNORQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -28053,7 +28053,7 @@ ICLASS: KXORB CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512DQ_KOP +ISA_SET: AVX512DQ_KOPB EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -28069,7 +28069,7 @@ ICLASS: KXORD CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -28085,7 +28085,7 @@ ICLASS: KXORQ CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK diff --git a/datafiles/avx512f/avx512-addressing-dec.txt b/datafiles/avx512f/avx512-addressing-dec.txt index b3ca0694..7e95730b 100644 --- a/datafiles/avx512f/avx512-addressing-dec.txt +++ b/datafiles/avx512f/avx512-addressing-dec.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -155,35 +155,54 @@ VEXDEST4=1 REXX=1 SIBINDEX=7 | OUTREG=XED_REG_XMM31 UISA_VSIB_BASE():: -REXB=0 SIBBASE=0 | BASE0=ArAX() SEG0=FINAL_DSEG() -REXB=0 SIBBASE=1 | BASE0=ArCX() SEG0=FINAL_DSEG() -REXB=0 SIBBASE=2 | BASE0=ArDX() SEG0=FINAL_DSEG() -REXB=0 SIBBASE=3 | BASE0=ArBX() SEG0=FINAL_DSEG() -REXB=0 SIBBASE=4 | BASE0=ArSP() SEG0=FINAL_SSEG() +REXB4=0 REXB=0 SIBBASE=0 | BASE0=ArAX() SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=1 | BASE0=ArCX() SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=2 | BASE0=ArDX() SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=3 | BASE0=ArBX() SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=4 | BASE0=ArSP() SEG0=FINAL_SSEG() # FIXME: BASE ISA IS CONSIDERABLY MORE COMPLICATED FOR DISP8 and DISP32 -REXB=0 SIBBASE=5 MOD=0 MEMDISP32() | BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() -REXB=0 SIBBASE=5 MOD!=0 | BASE0=ArBP() SEG0=FINAL_SSEG() +REXB4=0 REXB=0 SIBBASE=5 MOD=0 MEMDISP32() | BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=5 MOD!=0 | BASE0=ArBP() SEG0=FINAL_SSEG() -REXB=0 SIBBASE=6 | BASE0=ArSI() SEG0=FINAL_DSEG() -REXB=0 SIBBASE=7 | BASE0=ArDI() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=0 | BASE0=Ar8() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=1 | BASE0=Ar9() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=2 | BASE0=Ar10() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=3 | BASE0=Ar11() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=4 | BASE0=Ar12() SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=6 | BASE0=ArSI() SEG0=FINAL_DSEG() +REXB4=0 REXB=0 SIBBASE=7 | BASE0=ArDI() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=0 | BASE0=Ar8() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=1 | BASE0=Ar9() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=2 | BASE0=Ar10() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=3 | BASE0=Ar11() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=4 | BASE0=Ar12() SEG0=FINAL_DSEG() # FIXME: BASE ISA IS CONSIDERABLY MORE COMPLICATED FOR DISP8 and DISP32 -REXB=1 SIBBASE=5 MOD=0 MEMDISP32() | BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() -REXB=1 SIBBASE=5 MOD!=0 | BASE0=Ar13() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=5 MOD=0 MEMDISP32() | BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=5 MOD!=0 | BASE0=Ar13() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=6 | BASE0=Ar14() SEG0=FINAL_DSEG() -REXB=1 SIBBASE=7 | BASE0=Ar15() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=6 | BASE0=Ar14() SEG0=FINAL_DSEG() +REXB4=0 REXB=1 SIBBASE=7 | BASE0=Ar15() SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=0 | BASE0=Ar16() SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=1 | BASE0=Ar17() SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=2 | BASE0=Ar18() SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=3 | BASE0=Ar19() SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=4 | BASE0=Ar20() SEG0=FINAL_SSEG() - - +# FIXME: BASE ISA IS CONSIDERABLY MORE COMPLICATED FOR DISP8 and DISP32 +REXB4=1 REXB=0 SIBBASE=5 MOD=0 MEMDISP32() | BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=5 MOD!=0 | BASE0=Ar21() SEG0=FINAL_SSEG() + +REXB4=1 REXB=0 SIBBASE=6 | BASE0=Ar22() SEG0=FINAL_DSEG() +REXB4=1 REXB=0 SIBBASE=7 | BASE0=Ar23() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=0 | BASE0=Ar24() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=1 | BASE0=Ar25() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=2 | BASE0=Ar26() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=3 | BASE0=Ar27() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=4 | BASE0=Ar28() SEG0=FINAL_DSEG() +# FIXME: BASE ISA IS CONSIDERABLY MORE COMPLICATED FOR DISP8 and DISP32 +REXB4=1 REXB=1 SIBBASE=5 MOD=0 MEMDISP32() | BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=5 MOD!=0 | BASE0=Ar29() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=6 | BASE0=Ar30() SEG0=FINAL_DSEG() +REXB4=1 REXB=1 SIBBASE=7 | BASE0=Ar31() SEG0=FINAL_DSEG() diff --git a/datafiles/avx512f/avx512-evex-dec.txt b/datafiles/avx512f/avx512-evex-dec.txt index 958ac8ad..c7dc9c18 100644 --- a/datafiles/avx512f/avx512-evex-dec.txt +++ b/datafiles/avx512f/avx512-evex-dec.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -30,7 +30,7 @@ BCRC=0 | error # #UD in 64b mode and gpr encoded in modrm.reg. EVEXR4_ONE():: REXR4=0 | -otherwise | error +# Default: otherwise | error # NEWKEY: VEXPFX_OP == 0x62 diff --git a/datafiles/avx512f/avx512-evex-enc.txt b/datafiles/avx512f/avx512-evex-enc.txt index 6e08f46b..1715851d 100644 --- a/datafiles/avx512f/avx512-evex-enc.txt +++ b/datafiles/avx512f/avx512-evex-enc.txt @@ -169,8 +169,6 @@ SAE():: SAE=1 -> BCRC=1 SAE=0 -> BCRC=0 -# REXR4 is EVEX.R' stored inverted. EVEX.R'=0 (or REXR4=1) implies -# #UD in 64b mode and gpr encoded in modrm.reg. + EVEXR4_ONE():: -REXR4=0 -> nothing -otherwise -> error +otherwise -> nothing diff --git a/datafiles/avx512f/avx512-fields.txt b/datafiles/avx512f/avx512-fields.txt index 97499557..30ef5b76 100644 --- a/datafiles/avx512f/avx512-fields.txt +++ b/datafiles/avx512f/avx512-fields.txt @@ -20,7 +20,6 @@ ZEROING SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO LLRC SCALAR xed_bits_t 2 SUPPRESSED NOPRINT INTERNAL DO EO BCRC SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO -REXR4 SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO VEXDEST4 SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO MASK SCALAR xed_bits_t 3 SUPPRESSED NOPRINT INTERNAL DO EO diff --git a/datafiles/avx512f/avx512-foundation-isa.xed.txt b/datafiles/avx512f/avx512-foundation-isa.xed.txt index abf91580..c89ef91e 100644 --- a/datafiles/avx512f/avx512-foundation-isa.xed.txt +++ b/datafiles/avx512f/avx512-foundation-isa.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -13362,7 +13362,7 @@ ICLASS: KANDNW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13378,7 +13378,7 @@ ICLASS: KANDW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13394,7 +13394,7 @@ ICLASS: KMOVW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13408,7 +13408,7 @@ ICLASS: KMOVW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13424,7 +13424,7 @@ ICLASS: KMOVW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13440,7 +13440,7 @@ ICLASS: KMOVW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K21 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13456,7 +13456,7 @@ ICLASS: KMOVW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13472,7 +13472,7 @@ ICLASS: KNOTW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13488,7 +13488,7 @@ ICLASS: KORTESTW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y FLAGS: MUST [ cf-mod zf-mod pf-0 of-0 af-0 sf-0 ] @@ -13505,7 +13505,7 @@ ICLASS: KORW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13521,7 +13521,7 @@ ICLASS: KSHIFTLW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13537,7 +13537,7 @@ ICLASS: KSHIFTRW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13553,7 +13553,7 @@ ICLASS: KUNPCKBW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13569,7 +13569,7 @@ ICLASS: KXNORW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK @@ -13585,7 +13585,7 @@ ICLASS: KXORW CPL: 3 CATEGORY: KMASK EXTENSION: AVX512VEX -ISA_SET: AVX512F_KOP +ISA_SET: AVX512F_KOPW EXCEPTIONS: AVX512-K20 REAL_OPCODE: Y ATTRIBUTES: KMASK diff --git a/datafiles/avx512f/cpuid.xed.txt b/datafiles/avx512f/cpuid.xed.txt index bf1a90c2..14075ca1 100644 --- a/datafiles/avx512f/cpuid.xed.txt +++ b/datafiles/avx512f/cpuid.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -19,5 +19,5 @@ XED_ISA_SET_AVX512F_128N: avx512f.7.0.ebx.16 XED_ISA_SET_AVX512F_256: avx512f.7.0.ebx.16 avx512vl.7.0.ebx.31 XED_ISA_SET_AVX512F_512: avx512f.7.0.ebx.16 - XED_ISA_SET_AVX512F_KOP: avx512f.7.0.ebx.16 + XED_ISA_SET_AVX512F_KOPW: avx512f.7.0.ebx.16 XED_ISA_SET_AVX512F_SCALAR: avx512f.7.0.ebx.16 diff --git a/datafiles/future/future-chips.txt b/datafiles/future/future-chips.txt index 059794a0..4cb591d0 100644 --- a/datafiles/future/future-chips.txt +++ b/datafiles/future/future-chips.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -23,4 +23,11 @@ FUTURE: \ ALL_OF(GRANITE_RAPIDS) \ - TDX + ALL_OF(LUNAR_LAKE) \ + TDX \ + APX_F \ + APX_F_AMX \ + APX_F_KOPB \ + APX_F_KOPW \ + APX_F_KOPD \ + APX_F_KOPQ diff --git a/datafiles/gnr/avx10-ver1-cpuid.xed.txt b/datafiles/gnr/avx10-ver1-cpuid.xed.txt new file mode 100644 index 00000000..75968076 --- /dev/null +++ b/datafiles/gnr/avx10-ver1-cpuid.xed.txt @@ -0,0 +1,92 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +# a complete definition of all AVX10.1 instructions + +XED_ISA_SET_AVX512F_SCALAR, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512F_128N, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512F_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512F_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512F_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] +XED_ISA_SET_AVX512F_KOPW, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] + +XED_ISA_SET_AVX512CD_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512CD_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512CD_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512BW_128N, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512BW_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512BW_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512BW_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] +XED_ISA_SET_AVX512BW_KOPD, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512BW_KOPQ, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512DQ_SCALAR, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512DQ_128N, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512DQ_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512DQ_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512DQ_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] +XED_ISA_SET_AVX512DQ_KOPB, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512DQ_KOPW, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] + +XED_ISA_SET_AVX512_VBMI_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_VBMI_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_VBMI_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_IFMA_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_IFMA_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_IFMA_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_VNNI_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_VNNI_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_VNNI_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_BF16_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_BF16_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_BF16_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_VPOPCNTDQ_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_VPOPCNTDQ_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_VPOPCNTDQ_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_VBMI2_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_VBMI2_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_VBMI2_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_VAES_128, AVX10: vaes.7.0.ecx.9 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_VAES_256, AVX10: vaes.7.0.ecx.9 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_VAES_512, AVX10: vaes.7.0.ecx.9 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_GFNI_128, AVX10: gfni.7.0.ecx.8 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_GFNI_256, AVX10: gfni.7.0.ecx.8 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_GFNI_512, AVX10: gfni.7.0.ecx.8 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_VPCLMULQDQ_128, AVX10: vpclmulqdq.7.0.ecx.10 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_VPCLMULQDQ_256, AVX10: vpclmulqdq.7.0.ecx.10 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_VPCLMULQDQ_512, AVX10: vpclmulqdq.7.0.ecx.10 avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_BITALG_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_BITALG_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_BITALG_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + +XED_ISA_SET_AVX512_FP16_SCALAR, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512_FP16_128N, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 +XED_ISA_SET_AVX512_FP16_128, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_128vl.24.0.ebx[16] +XED_ISA_SET_AVX512_FP16_256, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_256vl.24.0.ebx[17] +XED_ISA_SET_AVX512_FP16_512, AVX10: avx10_enabled.7.1.edx[19] avx10_ver1.24.0.ebx[0:7]=1 avx10_512vl.24.0.ebx[18] + diff --git a/datafiles/gnr/files.cfg b/datafiles/gnr/files.cfg index eae0377d..ed3a8d7e 100644 --- a/datafiles/gnr/files.cfg +++ b/datafiles/gnr/files.cfg @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,4 +17,5 @@ #END_LEGAL chip-models: gnr-chips.txt + cpuid: avx10-ver1-cpuid.xed.txt diff --git a/datafiles/knl/knl-chips.txt b/datafiles/knl/knl-chips.txt index 9cc4ace6..53c10c2d 100644 --- a/datafiles/knl/knl-chips.txt +++ b/datafiles/knl/knl-chips.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -20,7 +20,7 @@ # No BDW SMAP KNL: ALL_OF(IVYBRIDGE) \ AVX512F_SCALAR \ - AVX512F_KOP \ + AVX512F_KOPW \ AVX512F_512 \ AVX512F_128N \ AVX512CD_512 \ diff --git a/datafiles/knl/knl-isa.xed.txt b/datafiles/knl/knl-isa.xed.txt index aeac3d73..ed0a9ce5 100644 --- a/datafiles/knl/knl-isa.xed.txt +++ b/datafiles/knl/knl-isa.xed.txt @@ -35,7 +35,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR +PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W1 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IFORM: VEXP2PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER } @@ -49,7 +49,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR +PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf64:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IFORM: VEXP2PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER } @@ -63,7 +63,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED -PATTERN: EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL() +PATTERN: EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL() OPERANDS: REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR IFORM: VEXP2PD_ZMMf64_MASKmskw_MEMf64_AVX512ER } @@ -79,7 +79,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR +PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W0 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32 IFORM: VEXP2PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER } @@ -93,7 +93,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR +PATTERN: EVV 0xC8 V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf32:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32 IFORM: VEXP2PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER } @@ -107,7 +107,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED -PATTERN: EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL() +PATTERN: EVV 0xC8 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL() OPERANDS: REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f32:TXT=BCASTSTR IFORM: VEXP2PS_ZMMf32_MASKmskw_MEMf32_AVX512ER } @@ -123,7 +123,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF0DPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -139,7 +139,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF0DPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -155,7 +155,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b001] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF0QPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -171,7 +171,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b001] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF0QPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -187,7 +187,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF1DPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -203,7 +203,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF1DPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -219,7 +219,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b010] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF1QPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -235,7 +235,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES GATHER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b010] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VGATHERPF1QPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -251,7 +251,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR +PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W1 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IFORM: VRCP28PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER } @@ -265,7 +265,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR +PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf64:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IFORM: VRCP28PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER } @@ -279,7 +279,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED -PATTERN: EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL() +PATTERN: EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL() OPERANDS: REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR IFORM: VRCP28PD_ZMMf64_MASKmskw_MEMf64_AVX512ER } @@ -295,7 +295,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR +PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W0 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32 IFORM: VRCP28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER } @@ -309,7 +309,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR +PATTERN: EVV 0xCA V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf32:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32 IFORM: VRCP28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER } @@ -323,7 +323,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED -PATTERN: EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL() +PATTERN: EVV 0xCA V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL() OPERANDS: REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f32:TXT=BCASTSTR IFORM: VRCP28PS_ZMMf32_MASKmskw_MEMf32_AVX512ER } @@ -339,7 +339,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 +PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W1 OPERANDS: REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 REG3=XMM_B3():r:dq:f64 IFORM: VRCP28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER } @@ -353,7 +353,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 +PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 OPERANDS: REG0=XMM_R3():w:dq:f64:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 REG3=XMM_B3():r:dq:f64 IFORM: VRCP28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER } @@ -367,7 +367,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_SCALAR -PATTERN: EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR() +PATTERN: EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR() OPERANDS: REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 MEM0:r:q:f64 IFORM: VRCP28SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512ER } @@ -383,7 +383,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 +PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 OPERANDS: REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 REG3=XMM_B3():r:dq:f32 IFORM: VRCP28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER } @@ -397,7 +397,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 +PATTERN: EVV 0xCB V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 OPERANDS: REG0=XMM_R3():w:dq:f32:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 REG3=XMM_B3():r:dq:f32 IFORM: VRCP28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER } @@ -411,7 +411,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_SCALAR -PATTERN: EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR() +PATTERN: EVV 0xCB V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR() OPERANDS: REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 MEM0:r:d:f32 IFORM: VRCP28SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512ER } @@ -427,7 +427,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W1 NOEVSR +PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W1 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IFORM: VRSQRT28PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER } @@ -441,7 +441,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR +PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W1 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf64:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf64 IFORM: VRSQRT28PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER } @@ -455,7 +455,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED -PATTERN: EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL() +PATTERN: EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W1 NOEVSR ESIZE_64_BITS() NELEM_FULL() OPERANDS: REG0=ZMM_R3():w:zf64 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f64:TXT=BCASTSTR IFORM: VRSQRT28PD_ZMMf64_MASKmskw_MEMf64_AVX512ER } @@ -471,7 +471,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] VL512 W0 NOEVSR +PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] VL512 W0 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32 IFORM: VRSQRT28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER } @@ -485,7 +485,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MASKOP_EVEX -PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR +PATTERN: EVV 0xCC V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN512() SAE() W0 NOEVSR OPERANDS: REG0=ZMM_R3():w:zf32:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=ZMM_B3():r:zf32 IFORM: VRSQRT28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER } @@ -499,7 +499,7 @@ ISA_SET: AVX512ER_512 EXCEPTIONS: AVX512-E2 REAL_OPCODE: Y ATTRIBUTES: MXCSR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_FULL BROADCAST_ENABLED -PATTERN: EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL() +PATTERN: EVV 0xCC V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] MODRM() VL512 W0 NOEVSR ESIZE_32_BITS() NELEM_FULL() OPERANDS: REG0=ZMM_R3():w:zf32 REG1=MASK1():r:mskw:TXT=ZEROSTR MEM0:r:vv:f32:TXT=BCASTSTR IFORM: VRSQRT28PS_ZMMf32_MASKmskw_MEMf32_AVX512ER } @@ -515,7 +515,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W1 +PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W1 OPERANDS: REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 REG3=XMM_B3():r:dq:f64 IFORM: VRSQRT28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER } @@ -529,7 +529,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 +PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W1 OPERANDS: REG0=XMM_R3():w:dq:f64:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 REG3=XMM_B3():r:dq:f64 IFORM: VRSQRT28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER } @@ -543,7 +543,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_SCALAR -PATTERN: EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR() +PATTERN: EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W1 ESIZE_64_BITS() NELEM_SCALAR() OPERANDS: REG0=XMM_R3():w:dq:f64 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f64 MEM0:r:q:f64 IFORM: VRSQRT28SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512ER } @@ -559,7 +559,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 REG[rrr] RM[nnn] W0 +PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=0 UBIT=1 REG[rrr] RM[nnn] W0 OPERANDS: REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 REG3=XMM_B3():r:dq:f32 IFORM: VRSQRT28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER } @@ -573,7 +573,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MASKOP_EVEX -PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 +PATTERN: EVV 0xCD V66 V0F38 MOD[0b11] MOD=3 BCRC=1 UBIT=1 REG[rrr] RM[nnn] FIX_ROUND_LEN128() SAE() W0 OPERANDS: REG0=XMM_R3():w:dq:f32:TXT=SAESTR REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 REG3=XMM_B3():r:dq:f32 IFORM: VRSQRT28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER } @@ -587,7 +587,7 @@ ISA_SET: AVX512ER_SCALAR EXCEPTIONS: AVX512-E3 REAL_OPCODE: Y ATTRIBUTES: MXCSR SIMD_SCALAR MEMORY_FAULT_SUPPRESSION MASKOP_EVEX DISP8_SCALAR -PATTERN: EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR() +PATTERN: EVV 0xCD V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[rrr] RM[nnn] BCRC=0 MODRM() W0 ESIZE_32_BITS() NELEM_SCALAR() OPERANDS: REG0=XMM_R3():w:dq:f32 REG1=MASK1():r:mskw:TXT=ZEROSTR REG2=XMM_N3():r:dq:f32 MEM0:r:d:f32 IFORM: VRSQRT28SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512ER } @@ -603,7 +603,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF0DPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -619,7 +619,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF0DPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -635,7 +635,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b101] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF0QPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -651,7 +651,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b101] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF0QPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -667,7 +667,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_YMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF1DPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -683,7 +683,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED DWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC6 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF1DPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -699,7 +699,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b110] RM[nnn] BCRC=0 VL512 W1 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_64_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:q:f64 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF1QPD_MEMf64_MASKmskw_AVX512PF_VL512 } @@ -715,7 +715,7 @@ ISA_SET: AVX512PF_512 EXCEPTIONS: AVX512-E12NP REAL_OPCODE: Y ATTRIBUTES: MEMORY_FAULT_SUPPRESSION SPECIAL_AGEN_REQUIRED QWORD_INDICES SCATTER PREFETCH MASKOP_EVEX DISP8_GSCAT -PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() +PATTERN: EVV 0xC7 V66 V0F38 MOD[mm] MOD!=3 UBIT=1 REG[0b110] RM[nnn] BCRC=0 VL512 W0 RM=4 UISA_VMODRM_ZMM() eanot16 NOVSR ZEROING=0 ESIZE_32_BITS() NELEM_GSCAT() OPERANDS: MEM0:r:d:f32 REG0=MASKNOT0():rw:mskw IFORM: VSCATTERPF1QPS_MEMf32_MASKmskw_AVX512PF_VL512 } @@ -731,7 +731,7 @@ EXTENSION: PREFETCHWT1 ISA_SET: PREFETCHWT1 REAL_OPCODE: Y ATTRIBUTES: PREFETCH -PATTERN: 0x0F 0x0D MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() +PATTERN: 0x0F 0x0D MOD[mm] MOD!=3 REG[0b010] RM[nnn] MODRM() OPERANDS: MEM0:r:mprefetch IFORM: PREFETCHWT1_MEMu8 } diff --git a/datafiles/movdir/asize-reg-table.xed.txt b/datafiles/movdir/asize-reg-table.xed.txt index fa4e3388..587ba28f 100644 --- a/datafiles/movdir/asize-reg-table.xed.txt +++ b/datafiles/movdir/asize-reg-table.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,19 +17,36 @@ #END_LEGAL xed_reg_enum_t A_GPR_R():: -REXR=0 REG=0x0 | OUTREG=ArAX() -REXR=0 REG=0x1 | OUTREG=ArCX() -REXR=0 REG=0x2 | OUTREG=ArDX() -REXR=0 REG=0x3 | OUTREG=ArBX() -REXR=0 REG=0x4 | OUTREG=ArSP() -REXR=0 REG=0x5 | OUTREG=ArBP() -REXR=0 REG=0x6 | OUTREG=ArSI() -REXR=0 REG=0x7 | OUTREG=ArDI() -REXR=1 REG=0x0 | OUTREG=Ar8() -REXR=1 REG=0x1 | OUTREG=Ar9() -REXR=1 REG=0x2 | OUTREG=Ar10() -REXR=1 REG=0x3 | OUTREG=Ar11() -REXR=1 REG=0x4 | OUTREG=Ar12() -REXR=1 REG=0x5 | OUTREG=Ar13() -REXR=1 REG=0x6 | OUTREG=Ar14() -REXR=1 REG=0x7 | OUTREG=Ar15() +REXR4=0 REXR=0 REG=0x0 | OUTREG=ArAX() +REXR4=0 REXR=0 REG=0x1 | OUTREG=ArCX() +REXR4=0 REXR=0 REG=0x2 | OUTREG=ArDX() +REXR4=0 REXR=0 REG=0x3 | OUTREG=ArBX() +REXR4=0 REXR=0 REG=0x4 | OUTREG=ArSP() +REXR4=0 REXR=0 REG=0x5 | OUTREG=ArBP() +REXR4=0 REXR=0 REG=0x6 | OUTREG=ArSI() +REXR4=0 REXR=0 REG=0x7 | OUTREG=ArDI() +REXR4=0 REXR=1 REG=0x0 | OUTREG=Ar8() +REXR4=0 REXR=1 REG=0x1 | OUTREG=Ar9() +REXR4=0 REXR=1 REG=0x2 | OUTREG=Ar10() +REXR4=0 REXR=1 REG=0x3 | OUTREG=Ar11() +REXR4=0 REXR=1 REG=0x4 | OUTREG=Ar12() +REXR4=0 REXR=1 REG=0x5 | OUTREG=Ar13() +REXR4=0 REXR=1 REG=0x6 | OUTREG=Ar14() +REXR4=0 REXR=1 REG=0x7 | OUTREG=Ar15() + +REXR4=1 REXR=0 REG=0x0 | OUTREG=Ar16() +REXR4=1 REXR=0 REG=0x1 | OUTREG=Ar17() +REXR4=1 REXR=0 REG=0x2 | OUTREG=Ar18() +REXR4=1 REXR=0 REG=0x3 | OUTREG=Ar19() +REXR4=1 REXR=0 REG=0x4 | OUTREG=Ar20() +REXR4=1 REXR=0 REG=0x5 | OUTREG=Ar21() +REXR4=1 REXR=0 REG=0x6 | OUTREG=Ar22() +REXR4=1 REXR=0 REG=0x7 | OUTREG=Ar23() +REXR4=1 REXR=1 REG=0x0 | OUTREG=Ar24() +REXR4=1 REXR=1 REG=0x1 | OUTREG=Ar25() +REXR4=1 REXR=1 REG=0x2 | OUTREG=Ar26() +REXR4=1 REXR=1 REG=0x3 | OUTREG=Ar27() +REXR4=1 REXR=1 REG=0x4 | OUTREG=Ar28() +REXR4=1 REXR=1 REG=0x5 | OUTREG=Ar29() +REXR4=1 REXR=1 REG=0x6 | OUTREG=Ar30() +REXR4=1 REXR=1 REG=0x7 | OUTREG=Ar31() diff --git a/datafiles/pbndkb/cpuid.xed.txt b/datafiles/pbndkb/cpuid.xed.txt index d6c72a1b..0bb0e8ab 100644 --- a/datafiles/pbndkb/cpuid.xed.txt +++ b/datafiles/pbndkb/cpuid.xed.txt @@ -16,4 +16,4 @@ # #END_LEGAL - XED_ISA_SET_PBNDKB: pbndkb.7.1.ebx.1 + XED_ISA_SET_PBNDKB: tse.7.1.ebx.1 diff --git a/datafiles/skx/skx-chips.txt b/datafiles/skx/skx-chips.txt index 7d8c5b2d..4eca3444 100644 --- a/datafiles/skx/skx-chips.txt +++ b/datafiles/skx/skx-chips.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -23,13 +23,14 @@ SKYLAKE_SERVER: ALL_OF(SKYLAKE) PKU \ AVX512F_128 \ AVX512F_128N \ AVX512F_256 \ - AVX512F_KOP \ + AVX512F_KOPW \ AVX512F_SCALAR \ AVX512BW_128 \ AVX512BW_128N \ AVX512BW_256 \ AVX512BW_512 \ - AVX512BW_KOP \ + AVX512BW_KOPD \ + AVX512BW_KOPQ \ AVX512CD_128 \ AVX512CD_256 \ AVX512CD_512 \ @@ -37,7 +38,8 @@ SKYLAKE_SERVER: ALL_OF(SKYLAKE) PKU \ AVX512DQ_128N \ AVX512DQ_256 \ AVX512DQ_512 \ - AVX512DQ_KOP \ + AVX512DQ_KOPB \ + AVX512DQ_KOPW \ AVX512DQ_SCALAR diff --git a/datafiles/waitpkg/asize-rm-table.xed.txt b/datafiles/waitpkg/asize-rm-table.xed.txt index 3b2c2464..6b377b76 100644 --- a/datafiles/waitpkg/asize-rm-table.xed.txt +++ b/datafiles/waitpkg/asize-rm-table.xed.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -17,19 +17,36 @@ #END_LEGAL xed_reg_enum_t A_GPR_B():: -REXB=0 RM=0x0 | OUTREG=ArAX() -REXB=0 RM=0x1 | OUTREG=ArCX() -REXB=0 RM=0x2 | OUTREG=ArDX() -REXB=0 RM=0x3 | OUTREG=ArBX() -REXB=0 RM=0x4 | OUTREG=ArSP() -REXB=0 RM=0x5 | OUTREG=ArBP() -REXB=0 RM=0x6 | OUTREG=ArSI() -REXB=0 RM=0x7 | OUTREG=ArDI() -REXB=1 RM=0x0 | OUTREG=Ar8() -REXB=1 RM=0x1 | OUTREG=Ar9() -REXB=1 RM=0x2 | OUTREG=Ar10() -REXB=1 RM=0x3 | OUTREG=Ar11() -REXB=1 RM=0x4 | OUTREG=Ar12() -REXB=1 RM=0x5 | OUTREG=Ar13() -REXB=1 RM=0x6 | OUTREG=Ar14() -REXB=1 RM=0x7 | OUTREG=Ar15() +REXB4=0 REXB=0 RM=0x0 | OUTREG=ArAX() +REXB4=0 REXB=0 RM=0x1 | OUTREG=ArCX() +REXB4=0 REXB=0 RM=0x2 | OUTREG=ArDX() +REXB4=0 REXB=0 RM=0x3 | OUTREG=ArBX() +REXB4=0 REXB=0 RM=0x4 | OUTREG=ArSP() +REXB4=0 REXB=0 RM=0x5 | OUTREG=ArBP() +REXB4=0 REXB=0 RM=0x6 | OUTREG=ArSI() +REXB4=0 REXB=0 RM=0x7 | OUTREG=ArDI() +REXB4=0 REXB=1 RM=0x0 | OUTREG=Ar8() +REXB4=0 REXB=1 RM=0x1 | OUTREG=Ar9() +REXB4=0 REXB=1 RM=0x2 | OUTREG=Ar10() +REXB4=0 REXB=1 RM=0x3 | OUTREG=Ar11() +REXB4=0 REXB=1 RM=0x4 | OUTREG=Ar12() +REXB4=0 REXB=1 RM=0x5 | OUTREG=Ar13() +REXB4=0 REXB=1 RM=0x6 | OUTREG=Ar14() +REXB4=0 REXB=1 RM=0x7 | OUTREG=Ar15() + +REXB4=1 REXB=0 RM=0x0 | OUTREG=Ar16() +REXB4=1 REXB=0 RM=0x1 | OUTREG=Ar17() +REXB4=1 REXB=0 RM=0x2 | OUTREG=Ar18() +REXB4=1 REXB=0 RM=0x3 | OUTREG=Ar19() +REXB4=1 REXB=0 RM=0x4 | OUTREG=Ar20() +REXB4=1 REXB=0 RM=0x5 | OUTREG=Ar21() +REXB4=1 REXB=0 RM=0x6 | OUTREG=Ar22() +REXB4=1 REXB=0 RM=0x7 | OUTREG=Ar23() +REXB4=1 REXB=1 RM=0x0 | OUTREG=Ar24() +REXB4=1 REXB=1 RM=0x1 | OUTREG=Ar25() +REXB4=1 REXB=1 RM=0x2 | OUTREG=Ar26() +REXB4=1 REXB=1 RM=0x3 | OUTREG=Ar27() +REXB4=1 REXB=1 RM=0x4 | OUTREG=Ar28() +REXB4=1 REXB=1 RM=0x5 | OUTREG=Ar29() +REXB4=1 REXB=1 RM=0x6 | OUTREG=Ar30() +REXB4=1 REXB=1 RM=0x7 | OUTREG=Ar31() diff --git a/datafiles/xed-addressing-modes-new.txt b/datafiles/xed-addressing-modes-new.txt index b056aa9f..9eb8fbae 100644 --- a/datafiles/xed-addressing-modes-new.txt +++ b/datafiles/xed-addressing-modes-new.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -20,10 +20,12 @@ ########################################################################### # inputs: -# REX = REX or NOREX -# REXB = REXB0 or REXB1 -# REXX = REXX0 or REXX1 -# MODE = MODE32 or MODE64 +# REX = REX or NOREX +# REXB = REXB0 or REXB1 +# REXB4 = REXB4=0 or REXB4=1 +# REXX = REXX0 or REXX1 +# REXX4 = REXX4=0 or REXX4=1 +# MODE = MODE32 or MODE64 # outputs: # SEG0, BASE0, INDEX, SCALE, DISP and @@ -61,83 +63,131 @@ mode16 eamode16 MODRM16() MEMDISP() | ############################################################################ MODRM64alt32():: - REXB=0 MOD=0b00 RM=0b000 | BASE0=ArAX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b00 RM=0b000 | BASE0=Ar8() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b00 RM=0b001 | BASE0=ArCX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b00 RM=0b001 | BASE0=Ar9() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b00 RM=0b010 | BASE0=ArDX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b00 RM=0b010 | BASE0=Ar10() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b00 RM=0b011 | BASE0=ArBX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b00 RM=0b011 | BASE0=Ar11() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b00 RM=0b100 SIB() | - REXB=1 MOD=0b00 RM=0b100 SIB() | - -# Ignores rexb -- must duplicate to avoid don't-care problems - REXB=0 MOD=0b00 RM=0b101 | NEED_MEMDISP=32 BASE0=rIPa() SEG0=FINAL_DSEG() enc - REXB=1 MOD=0b00 RM=0b101 | NEED_MEMDISP=32 BASE0=rIPa() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b00 RM=0b110 | BASE0=ArSI() SEG0=FINAL_DSEG() - REXB=1 MOD=0b00 RM=0b110 | BASE0=Ar14() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b00 RM=0b111 | BASE0=ArDI() SEG0=FINAL_DSEG() - REXB=1 MOD=0b00 RM=0b111 | BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=0 REXB=0 MOD=0b00 RM=0b000 | BASE0=ArAX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b00 RM=0b000 | BASE0=Ar8() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b000 | BASE0=Ar16() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b00 RM=0b000 | BASE0=Ar24() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b00 RM=0b001 | BASE0=ArCX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b00 RM=0b001 | BASE0=Ar9() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b001 | BASE0=Ar17() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b00 RM=0b001 | BASE0=Ar25() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b00 RM=0b010 | BASE0=ArDX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b00 RM=0b010 | BASE0=Ar10() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b010 | BASE0=Ar18() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b00 RM=0b010 | BASE0=Ar26() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b00 RM=0b011 | BASE0=ArBX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b00 RM=0b011 | BASE0=Ar11() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b011 | BASE0=Ar19() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b00 RM=0b011 | BASE0=Ar27() SEG0=FINAL_DSEG() + +# Ignores rexb and rexb4 -- must duplicate to avoid don't-care problems + REXB4=0 REXB=0 MOD=0b00 RM=0b100 SIB() | + REXB4=0 REXB=1 MOD=0b00 RM=0b100 SIB() | + REXB4=1 REXB=0 MOD=0b00 RM=0b100 SIB() | + REXB4=1 REXB=1 MOD=0b00 RM=0b100 SIB() | + +# Ignores rexb and rexb4 -- must duplicate to avoid don't-care problems + REXB4=0 REXB=0 MOD=0b00 RM=0b101 | NEED_MEMDISP=32 BASE0=rIPa() SEG0=FINAL_DSEG() enc + REXB4=0 REXB=1 MOD=0b00 RM=0b101 | NEED_MEMDISP=32 BASE0=rIPa() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b101 | NEED_MEMDISP=32 BASE0=rIPa() SEG0=FINAL_DSEG() enc + REXB4=1 REXB=1 MOD=0b00 RM=0b101 | NEED_MEMDISP=32 BASE0=rIPa() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b00 RM=0b110 | BASE0=ArSI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b00 RM=0b110 | BASE0=Ar14() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b110 | BASE0=Ar22() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b00 RM=0b110 | BASE0=Ar30() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b00 RM=0b111 | BASE0=ArDI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b00 RM=0b111 | BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b00 RM=0b111 | BASE0=Ar23() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b00 RM=0b111 | BASE0=Ar31() SEG0=FINAL_DSEG() ############################################ - REXB=0 MOD=0b01 RM=0b000 | NEED_MEMDISP=8 BASE0=ArAX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b01 RM=0b000 | NEED_MEMDISP=8 BASE0=Ar8() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b01 RM=0b001 | NEED_MEMDISP=8 BASE0=ArCX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b01 RM=0b001 | NEED_MEMDISP=8 BASE0=Ar9() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b01 RM=0b010 | NEED_MEMDISP=8 BASE0=ArDX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b01 RM=0b010 | NEED_MEMDISP=8 BASE0=Ar10() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b01 RM=0b011 | NEED_MEMDISP=8 BASE0=ArBX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b01 RM=0b011 | NEED_MEMDISP=8 BASE0=Ar11() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b01 RM=0b100 SIB() | NEED_MEMDISP=8 - REXB=1 MOD=0b01 RM=0b100 SIB() | NEED_MEMDISP=8 - - REXB=0 MOD=0b01 RM=0b101 | NEED_MEMDISP=8 BASE0=ArBP() SEG0=FINAL_SSEG() - REXB=1 MOD=0b01 RM=0b101 | NEED_MEMDISP=8 BASE0=Ar13() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b01 RM=0b110 | NEED_MEMDISP=8 BASE0=ArSI() SEG0=FINAL_DSEG() - REXB=1 MOD=0b01 RM=0b110 | NEED_MEMDISP=8 BASE0=Ar14() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b01 RM=0b111 | NEED_MEMDISP=8 BASE0=ArDI() SEG0=FINAL_DSEG() - REXB=1 MOD=0b01 RM=0b111 | NEED_MEMDISP=8 BASE0=Ar15() SEG0=FINAL_DSEG() - + REXB4=0 REXB=0 MOD=0b01 RM=0b000 | NEED_MEMDISP=8 BASE0=ArAX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b000 | NEED_MEMDISP=8 BASE0=Ar8() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b000 | NEED_MEMDISP=8 BASE0=Ar16() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b000 | NEED_MEMDISP=8 BASE0=Ar24() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b01 RM=0b001 | NEED_MEMDISP=8 BASE0=ArCX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b001 | NEED_MEMDISP=8 BASE0=Ar9() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b001 | NEED_MEMDISP=8 BASE0=Ar17() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b001 | NEED_MEMDISP=8 BASE0=Ar25() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b01 RM=0b010 | NEED_MEMDISP=8 BASE0=ArDX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b010 | NEED_MEMDISP=8 BASE0=Ar10() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b010 | NEED_MEMDISP=8 BASE0=Ar18() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b010 | NEED_MEMDISP=8 BASE0=Ar26() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b01 RM=0b011 | NEED_MEMDISP=8 BASE0=ArBX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b011 | NEED_MEMDISP=8 BASE0=Ar11() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b011 | NEED_MEMDISP=8 BASE0=Ar19() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b011 | NEED_MEMDISP=8 BASE0=Ar27() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b01 RM=0b100 SIB() | NEED_MEMDISP=8 + REXB4=0 REXB=1 MOD=0b01 RM=0b100 SIB() | NEED_MEMDISP=8 + REXB4=1 REXB=0 MOD=0b01 RM=0b100 SIB() | NEED_MEMDISP=8 + REXB4=1 REXB=1 MOD=0b01 RM=0b100 SIB() | NEED_MEMDISP=8 + + REXB4=0 REXB=0 MOD=0b01 RM=0b101 | NEED_MEMDISP=8 BASE0=ArBP() SEG0=FINAL_SSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b101 | NEED_MEMDISP=8 BASE0=Ar13() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b101 | NEED_MEMDISP=8 BASE0=Ar21() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b101 | NEED_MEMDISP=8 BASE0=Ar29() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b01 RM=0b110 | NEED_MEMDISP=8 BASE0=ArSI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b110 | NEED_MEMDISP=8 BASE0=Ar14() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b110 | NEED_MEMDISP=8 BASE0=Ar22() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b110 | NEED_MEMDISP=8 BASE0=Ar30() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b01 RM=0b111 | NEED_MEMDISP=8 BASE0=ArDI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b01 RM=0b111 | NEED_MEMDISP=8 BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b01 RM=0b111 | NEED_MEMDISP=8 BASE0=Ar23() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b01 RM=0b111 | NEED_MEMDISP=8 BASE0=Ar31() SEG0=FINAL_DSEG() ############################################ - REXB=0 MOD=0b10 RM=0b000 | NEED_MEMDISP=32 BASE0=ArAX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b10 RM=0b000 | NEED_MEMDISP=32 BASE0=Ar8() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b10 RM=0b001 | NEED_MEMDISP=32 BASE0=ArCX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b10 RM=0b001 | NEED_MEMDISP=32 BASE0=Ar9() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b10 RM=0b010 | NEED_MEMDISP=32 BASE0=ArDX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b10 RM=0b010 | NEED_MEMDISP=32 BASE0=Ar10() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b10 RM=0b011 | NEED_MEMDISP=32 BASE0=ArBX() SEG0=FINAL_DSEG() - REXB=1 MOD=0b10 RM=0b011 | NEED_MEMDISP=32 BASE0=Ar11() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b10 RM=0b100 SIB() | NEED_MEMDISP=32 - REXB=1 MOD=0b10 RM=0b100 SIB() | NEED_MEMDISP=32 - - REXB=0 MOD=0b10 RM=0b101 | NEED_MEMDISP=32 BASE0=ArBP() SEG0=FINAL_SSEG() - REXB=1 MOD=0b10 RM=0b101 | NEED_MEMDISP=32 BASE0=Ar13() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b10 RM=0b110 | NEED_MEMDISP=32 BASE0=ArSI() SEG0=FINAL_DSEG() - REXB=1 MOD=0b10 RM=0b110 | NEED_MEMDISP=32 BASE0=Ar14() SEG0=FINAL_DSEG() - - REXB=0 MOD=0b10 RM=0b111 | NEED_MEMDISP=32 BASE0=ArDI() SEG0=FINAL_DSEG() - REXB=1 MOD=0b10 RM=0b111 | NEED_MEMDISP=32 BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=0 REXB=0 MOD=0b10 RM=0b000 | NEED_MEMDISP=32 BASE0=ArAX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b000 | NEED_MEMDISP=32 BASE0=Ar8() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b000 | NEED_MEMDISP=32 BASE0=Ar16() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b000 | NEED_MEMDISP=32 BASE0=Ar24() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b10 RM=0b001 | NEED_MEMDISP=32 BASE0=ArCX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b001 | NEED_MEMDISP=32 BASE0=Ar9() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b001 | NEED_MEMDISP=32 BASE0=Ar17() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b001 | NEED_MEMDISP=32 BASE0=Ar25() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b10 RM=0b010 | NEED_MEMDISP=32 BASE0=ArDX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b010 | NEED_MEMDISP=32 BASE0=Ar10() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b010 | NEED_MEMDISP=32 BASE0=Ar18() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b010 | NEED_MEMDISP=32 BASE0=Ar26() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b10 RM=0b011 | NEED_MEMDISP=32 BASE0=ArBX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b011 | NEED_MEMDISP=32 BASE0=Ar11() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b011 | NEED_MEMDISP=32 BASE0=Ar19() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b011 | NEED_MEMDISP=32 BASE0=Ar27() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b10 RM=0b100 SIB() | NEED_MEMDISP=32 + REXB4=0 REXB=1 MOD=0b10 RM=0b100 SIB() | NEED_MEMDISP=32 + REXB4=1 REXB=0 MOD=0b10 RM=0b100 SIB() | NEED_MEMDISP=32 + REXB4=1 REXB=1 MOD=0b10 RM=0b100 SIB() | NEED_MEMDISP=32 + + REXB4=0 REXB=0 MOD=0b10 RM=0b101 | NEED_MEMDISP=32 BASE0=ArBP() SEG0=FINAL_SSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b101 | NEED_MEMDISP=32 BASE0=Ar13() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b101 | NEED_MEMDISP=32 BASE0=Ar21() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b101 | NEED_MEMDISP=32 BASE0=Ar29() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b10 RM=0b110 | NEED_MEMDISP=32 BASE0=ArSI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b110 | NEED_MEMDISP=32 BASE0=Ar14() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b110 | NEED_MEMDISP=32 BASE0=Ar22() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b110 | NEED_MEMDISP=32 BASE0=Ar30() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 MOD=0b10 RM=0b111 | NEED_MEMDISP=32 BASE0=ArDI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 MOD=0b10 RM=0b111 | NEED_MEMDISP=32 BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 MOD=0b10 RM=0b111 | NEED_MEMDISP=32 BASE0=Ar23() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 MOD=0b10 RM=0b111 | NEED_MEMDISP=32 BASE0=Ar31() SEG0=FINAL_DSEG() ############################################ @@ -218,135 +268,205 @@ MODRM16():: ############################################ SIB():: +# SCALE = 1 + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar16() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar24() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar17() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar25() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar18() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar26() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar19() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar27() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 enc + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar20() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar28() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar21() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar29() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar22() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar30() SCALE=1 + + REXX4=0 REXX=0 SIBSCALE[0b00] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b00] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=1 + REXX4=1 REXX=0 SIBSCALE[0b00] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar23() SCALE=1 + REXX4=1 REXX=1 SIBSCALE[0b00] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar31() SCALE=1 + + +# SCALE = 2 + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar16() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar24() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar17() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar25() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar18() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar26() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar19() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar27() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar20() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar28() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar21() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar29() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar22() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar30() SCALE=2 + + REXX4=0 REXX=0 SIBSCALE[0b01] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=2 + REXX4=0 REXX=1 SIBSCALE[0b01] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=2 + REXX4=1 REXX=0 SIBSCALE[0b01] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar23() SCALE=2 + REXX4=1 REXX=1 SIBSCALE[0b01] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar31() SCALE=2 + + +# SCALE = 4 + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar16() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar24() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar17() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar25() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar18() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar26() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar19() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar27() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar20() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar28() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar21() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar29() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar22() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar30() SCALE=4 + + REXX4=0 REXX=0 SIBSCALE[0b10] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=4 + REXX4=0 REXX=1 SIBSCALE[0b10] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=4 + REXX4=1 REXX=0 SIBSCALE[0b10] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar23() SCALE=4 + REXX4=1 REXX=1 SIBSCALE[0b10] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar31() SCALE=4 + + + +# SCALE = 8 + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar16() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar24() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar17() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar25() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar18() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar26() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar19() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar27() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar20() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar28() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar21() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar29() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar22() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar30() SCALE=8 + + REXX4=0 REXX=0 SIBSCALE[0b11] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=8 + REXX4=0 REXX=1 SIBSCALE[0b11] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=8 + REXX4=1 REXX=0 SIBSCALE[0b11] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar23() SCALE=8 + REXX4=1 REXX=1 SIBSCALE[0b11] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar31() SCALE=8 - REXX=0 SIBSCALE[0b00] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 enc - REXX=1 SIBSCALE[0b00] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=1 - - REXX=0 SIBSCALE[0b00] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=1 - REXX=1 SIBSCALE[0b00] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=1 - - - - - REXX=0 SIBSCALE[0b01] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=2 - - REXX=0 SIBSCALE[0b01] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=2 - - REXX=0 SIBSCALE[0b01] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=2 - - REXX=0 SIBSCALE[0b01] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=2 - - - REXX=0 SIBSCALE[0b01] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=2 - - REXX=0 SIBSCALE[0b01] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=2 - REXX=0 SIBSCALE[0b01] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=2 - REXX=0 SIBSCALE[0b01] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=2 - REXX=1 SIBSCALE[0b01] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=2 - - - - - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=4 - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=4 - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=4 - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=4 - - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=4 - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=4 - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=4 - - REXX=0 SIBSCALE[0b10] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=4 - REXX=1 SIBSCALE[0b10] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=4 - - - - - - REXX=0 SIBSCALE[0b11] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=ArAX() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b000] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar8() SCALE=8 - - REXX=0 SIBSCALE[0b11] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=ArCX() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b001] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar9() SCALE=8 - - REXX=0 SIBSCALE[0b11] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDX() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b010] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar10() SCALE=8 - - REXX=0 SIBSCALE[0b11] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBX() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b011] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar11() SCALE=8 - - - REXX=0 SIBSCALE[0b11] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=XED_REG_INVALID SCALE=1 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b100] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar12() SCALE=8 +################################################### - REXX=0 SIBSCALE[0b11] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=ArBP() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b101] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar13() SCALE=8 +SIB_BASE0():: - REXX=0 SIBSCALE[0b11] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=ArSI() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b110] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar14() SCALE=8 + REXB4=0 REXB=0 SIBBASE=0b000 | BASE0=ArAX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b000 | BASE0=Ar8() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b000 | BASE0=Ar16() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b000 | BASE0=Ar24() SEG0=FINAL_DSEG() - REXX=0 SIBSCALE[0b11] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=ArDI() SCALE=8 - REXX=1 SIBSCALE[0b11] SIBINDEX[0b111] SIBBASE[bbb] SIB_BASE0() | INDEX=Ar15() SCALE=8 + REXB4=0 REXB=0 SIBBASE=0b001 | BASE0=ArCX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b001 | BASE0=Ar9() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b001 | BASE0=Ar17() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b001 | BASE0=Ar25() SEG0=FINAL_DSEG() + REXB4=0 REXB=0 SIBBASE=0b010 | BASE0=ArDX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b010 | BASE0=Ar10() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b010 | BASE0=Ar18() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b010 | BASE0=Ar26() SEG0=FINAL_DSEG() -################################################### + REXB4=0 REXB=0 SIBBASE=0b011 | BASE0=ArBX() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b011 | BASE0=Ar11() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b011 | BASE0=Ar19() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b011 | BASE0=Ar27() SEG0=FINAL_DSEG() -SIB_BASE0():: + REXB4=0 REXB=0 SIBBASE=0b100 | BASE0=ArSP() SEG0=FINAL_SSEG() + REXB4=0 REXB=1 SIBBASE=0b100 | BASE0=Ar12() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b100 | BASE0=Ar20() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b100 | BASE0=Ar28() SEG0=FINAL_DSEG() - REXB=0 SIBBASE=0b000 | BASE0=ArAX() SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b000 | BASE0=Ar8() SEG0=FINAL_DSEG() - REXB=0 SIBBASE=0b001 | BASE0=ArCX() SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b001 | BASE0=Ar9() SEG0=FINAL_DSEG() - - REXB=0 SIBBASE=0b010 | BASE0=ArDX() SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b010 | BASE0=Ar10() SEG0=FINAL_DSEG() - - REXB=0 SIBBASE=0b011 | BASE0=ArBX() SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b011 | BASE0=Ar11() SEG0=FINAL_DSEG() - - REXB=0 SIBBASE=0b100 | BASE0=ArSP() SEG0=FINAL_SSEG() - REXB=1 SIBBASE=0b100 | BASE0=Ar12() SEG0=FINAL_DSEG() # FIXME the d/8 for MOD=01_ and d/32 for MOD=10_ case are redundantly # specified in the manuals. I removed them from here, but the d/32 for @@ -356,19 +476,30 @@ SIB_BASE0():: # MOD=10_ cases so that the encoder will pick the right one even though we # accept the displacment at a higher level. - REXB=0 SIBBASE=0b101 MOD=0b00 | NEED_MEMDISP=32 BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() enc - REXB=0 SIBBASE=0b101 MOD=0b01 | BASE0=ArBP() SEG0=FINAL_SSEG() DISP_WIDTH=8 - REXB=0 SIBBASE=0b101 MOD=0b10 | BASE0=ArBP() SEG0=FINAL_SSEG() DISP_WIDTH=32 + REXB4=0 REXB=0 SIBBASE=0b101 MOD=0b00 | NEED_MEMDISP=32 BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() enc + REXB4=0 REXB=0 SIBBASE=0b101 MOD=0b01 | BASE0=ArBP() SEG0=FINAL_SSEG() DISP_WIDTH=8 + REXB4=0 REXB=0 SIBBASE=0b101 MOD=0b10 | BASE0=ArBP() SEG0=FINAL_SSEG() DISP_WIDTH=32 + REXB4=1 REXB=0 SIBBASE=0b101 MOD=0b00 | NEED_MEMDISP=32 BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() enc + REXB4=1 REXB=0 SIBBASE=0b101 MOD=0b01 | BASE0=Ar21() SEG0=FINAL_SSEG() DISP_WIDTH=8 + REXB4=1 REXB=0 SIBBASE=0b101 MOD=0b10 | BASE0=Ar21() SEG0=FINAL_SSEG() DISP_WIDTH=32 - REXB=1 SIBBASE=0b101 MOD=0b00 | NEED_MEMDISP=32 BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b101 MOD=0b01 | BASE0=Ar13() SEG0=FINAL_DSEG() DISP_WIDTH=8 - REXB=1 SIBBASE=0b101 MOD=0b10 | BASE0=Ar13() SEG0=FINAL_DSEG() DISP_WIDTH=32 - - REXB=0 SIBBASE=0b110 | BASE0=ArSI() SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b110 | BASE0=Ar14() SEG0=FINAL_DSEG() - - REXB=0 SIBBASE=0b111 | BASE0=ArDI() SEG0=FINAL_DSEG() - REXB=1 SIBBASE=0b111 | BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b101 MOD=0b00 | NEED_MEMDISP=32 BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b101 MOD=0b01 | BASE0=Ar13() SEG0=FINAL_DSEG() DISP_WIDTH=8 + REXB4=0 REXB=1 SIBBASE=0b101 MOD=0b10 | BASE0=Ar13() SEG0=FINAL_DSEG() DISP_WIDTH=32 + REXB4=1 REXB=1 SIBBASE=0b101 MOD=0b00 | NEED_MEMDISP=32 BASE0=XED_REG_INVALID SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b101 MOD=0b01 | BASE0=Ar29() SEG0=FINAL_DSEG() DISP_WIDTH=8 + REXB4=1 REXB=1 SIBBASE=0b101 MOD=0b10 | BASE0=Ar29() SEG0=FINAL_DSEG() DISP_WIDTH=32 + + REXB4=0 REXB=0 SIBBASE=0b110 | BASE0=ArSI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b110 | BASE0=Ar14() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b110 | BASE0=Ar22() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b110 | BASE0=Ar30() SEG0=FINAL_DSEG() + + REXB4=0 REXB=0 SIBBASE=0b111 | BASE0=ArDI() SEG0=FINAL_DSEG() + REXB4=0 REXB=1 SIBBASE=0b111 | BASE0=Ar15() SEG0=FINAL_DSEG() + REXB4=1 REXB=0 SIBBASE=0b111 | BASE0=Ar23() SEG0=FINAL_DSEG() + REXB4=1 REXB=1 SIBBASE=0b111 | BASE0=Ar31() SEG0=FINAL_DSEG() + #FIXME: 2008-10-01 make these in to nops! OVERRIDE_SEG0():: @@ -381,9 +512,3 @@ mode16 | mode32 | mode64 | -XSAVE():: -mode16 | -mode32 | -mode64 | - - diff --git a/datafiles/xed-error-enum-base.txt b/datafiles/xed-error-enum-base.txt index 3c385e22..f5240c53 100644 --- a/datafiles/xed-error-enum-base.txt +++ b/datafiles/xed-error-enum-base.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -33,7 +33,6 @@ BAD_LOCK_PREFIX ///< A lock prefix was found where none is allowed. BAD_REP_PREFIX ///< An F2 or F3 prefix was found where none is allowed. BAD_LEGACY_PREFIX ///< A 66, F2 or F3 prefix was found where none is allowed. BAD_REX_PREFIX ///< A REX prefix was found where none is allowed. -BAD_EVEX_UBIT ///< An illegal value for the EVEX.U bit was present in the instruction. BAD_MAP ///< An illegal value for the MAP field was detected in the instruction. BAD_EVEX_V_PRIME ///< EVEX.V'=0 was detected in a non-64b mode instruction. BAD_EVEX_Z_NO_MASKING ///< EVEX.Z!=0 when EVEX.aaa==0 @@ -45,4 +44,4 @@ GATHER_REGS ///< The index, dest and mask regs for AVX2 gathers must be di INSTR_TOO_LONG ///< Full decode of instruction would exeed 15B. INVALID_MODE ///< The instruction was not valid for the specified mode BAD_EVEX_LL ///< EVEX.LL must not ==3 unless using embedded rounding -BAD_REG_MATCH ///< Source registers must not match the destination register for this instruction. +BAD_REG_MATCH ///< Some registers must not match for this instruction (e.g. source with dest or dest with dest). diff --git a/datafiles/xed-fields.txt b/datafiles/xed-fields.txt index 7a59fc70..bfe3a202 100644 --- a/datafiles/xed-fields.txt +++ b/datafiles/xed-fields.txt @@ -76,6 +76,15 @@ REXR SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO E REXX SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO REXB SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO +REX2 SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO +REXB4 SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO +REXX4 SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO +REXR4 SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO + +# True if one of the instruction's operands is EGPR (GPR16 and above). +# Can be used for optimizations +HAS_EGPR SCALAR xed_bits_t 1 SUPPRESSED PRINT INTERNAL DO EO + # refining must be used to interpret the REP output of decode REP SCALAR xed_bits_t 2 SUPPRESSED PRINT PUBLIC DO EO # 0=no-rep, 2=F2, 3=F3 OSZ SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EO @@ -165,6 +174,8 @@ AGEN SCALAR xed_bits_t 1 EXPLICIT PRINT PUBLIC # RELBR is used as a decode operand, but it is not required for encode RELBR SCALAR xed_bits_t 1 EXPLICIT PRINT PUBLIC DO EI +# ABSBR is used as a decode operand. For Absolute near jump (See JMPABS) +ABSBR SCALAR xed_bits_t 1 EXPLICIT PRINT PUBLIC DO EI # for CALL_FAR & JMP_FAR. Note UIM0 is also set by these PTR SCALAR xed_bits_t 1 EXPLICIT PRINT PUBLIC DO EI @@ -224,3 +235,5 @@ DUMMY SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DO EI # Disable decoder VEX/EVEX space NO_EVEX SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DI EO NO_VEX SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DI EO +NO_APX SCALAR xed_bits_t 1 SUPPRESSED NOPRINT INTERNAL DI EI + diff --git a/datafiles/xed-gpr8-dec-reg-table.txt b/datafiles/xed-gpr8-dec-reg-table.txt index 48452767..9460a238 100644 --- a/datafiles/xed-gpr8-dec-reg-table.txt +++ b/datafiles/xed-gpr8-dec-reg-table.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -21,78 +21,171 @@ xed_reg_enum_t GPR8_R():: -REXR=0 REG=0x0 | OUTREG=XED_REG_AL -REXR=0 REG=0x1 | OUTREG=XED_REG_CL -REXR=0 REG=0x2 | OUTREG=XED_REG_DL -REXR=0 REG=0x3 | OUTREG=XED_REG_BL - -REXR=0 REG=0x4 REX=0 | OUTREG=XED_REG_AH -REXR=0 REG=0x5 REX=0 | OUTREG=XED_REG_CH -REXR=0 REG=0x6 REX=0 | OUTREG=XED_REG_DH -REXR=0 REG=0x7 REX=0 | OUTREG=XED_REG_BH - -REXR=0 REG=0x4 REX=1 | OUTREG=XED_REG_SPL -REXR=0 REG=0x5 REX=1 | OUTREG=XED_REG_BPL -REXR=0 REG=0x6 REX=1 | OUTREG=XED_REG_SIL -REXR=0 REG=0x7 REX=1 | OUTREG=XED_REG_DIL - -REXR=1 REG=0x0 | OUTREG=XED_REG_R8B -REXR=1 REG=0x1 | OUTREG=XED_REG_R9B -REXR=1 REG=0x2 | OUTREG=XED_REG_R10B -REXR=1 REG=0x3 | OUTREG=XED_REG_R11B -REXR=1 REG=0x4 | OUTREG=XED_REG_R12B -REXR=1 REG=0x5 | OUTREG=XED_REG_R13B -REXR=1 REG=0x6 | OUTREG=XED_REG_R14B -REXR=1 REG=0x7 | OUTREG=XED_REG_R15B +REXR4=0 REXR=0 REG=0x0 | OUTREG=XED_REG_AL +REXR4=0 REXR=0 REG=0x1 | OUTREG=XED_REG_CL +REXR4=0 REXR=0 REG=0x2 | OUTREG=XED_REG_DL +REXR4=0 REXR=0 REG=0x3 | OUTREG=XED_REG_BL + +REXR4=0 REXR=0 REG=0x4 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_AH +REXR4=0 REXR=0 REG=0x5 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_CH +REXR4=0 REXR=0 REG=0x6 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_DH +REXR4=0 REXR=0 REG=0x7 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_BH + +REXR4=0 REXR=0 REG=0x4 REX=1 REX2=0 | OUTREG=XED_REG_SPL +REXR4=0 REXR=0 REG=0x5 REX=1 REX2=0 | OUTREG=XED_REG_BPL +REXR4=0 REXR=0 REG=0x6 REX=1 REX2=0 | OUTREG=XED_REG_SIL +REXR4=0 REXR=0 REG=0x7 REX=1 REX2=0 | OUTREG=XED_REG_DIL + +# REX2 prefix (REX prefix is "don't care"): +REXR4=0 REXR=0 REG=0x4 REX2=1 | OUTREG=XED_REG_SPL +REXR4=0 REXR=0 REG=0x5 REX2=1 | OUTREG=XED_REG_BPL +REXR4=0 REXR=0 REG=0x6 REX2=1 | OUTREG=XED_REG_SIL +REXR4=0 REXR=0 REG=0x7 REX2=1 | OUTREG=XED_REG_DIL + +# EVEX implies REX +REXR4=0 REXR=0 REG=0x4 REX=0 REX2=0 EVV | OUTREG=XED_REG_SPL +REXR4=0 REXR=0 REG=0x5 REX=0 REX2=0 EVV | OUTREG=XED_REG_BPL +REXR4=0 REXR=0 REG=0x6 REX=0 REX2=0 EVV | OUTREG=XED_REG_SIL +REXR4=0 REXR=0 REG=0x7 REX=0 REX2=0 EVV | OUTREG=XED_REG_DIL + +REXR4=0 REXR=1 REG=0x0 | OUTREG=XED_REG_R8B +REXR4=0 REXR=1 REG=0x1 | OUTREG=XED_REG_R9B +REXR4=0 REXR=1 REG=0x2 | OUTREG=XED_REG_R10B +REXR4=0 REXR=1 REG=0x3 | OUTREG=XED_REG_R11B +REXR4=0 REXR=1 REG=0x4 | OUTREG=XED_REG_R12B +REXR4=0 REXR=1 REG=0x5 | OUTREG=XED_REG_R13B +REXR4=0 REXR=1 REG=0x6 | OUTREG=XED_REG_R14B +REXR4=0 REXR=1 REG=0x7 | OUTREG=XED_REG_R15B + + +REXR4=1 REXR=0 REG=0x0 | OUTREG=XED_REG_R16B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x1 | OUTREG=XED_REG_R17B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x2 | OUTREG=XED_REG_R18B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x3 | OUTREG=XED_REG_R19B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x4 | OUTREG=XED_REG_R20B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x5 | OUTREG=XED_REG_R21B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x6 | OUTREG=XED_REG_R22B HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x7 | OUTREG=XED_REG_R23B HAS_EGPR=1 + +REXR4=1 REXR=1 REG=0x0 | OUTREG=XED_REG_R24B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x1 | OUTREG=XED_REG_R25B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x2 | OUTREG=XED_REG_R26B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x3 | OUTREG=XED_REG_R27B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x4 | OUTREG=XED_REG_R28B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x5 | OUTREG=XED_REG_R29B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x6 | OUTREG=XED_REG_R30B HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x7 | OUTREG=XED_REG_R31B HAS_EGPR=1 + xed_reg_enum_t GPR8_B():: -REXB=0 RM=0x0 | OUTREG=XED_REG_AL -REXB=0 RM=0x1 | OUTREG=XED_REG_CL -REXB=0 RM=0x2 | OUTREG=XED_REG_DL -REXB=0 RM=0x3 | OUTREG=XED_REG_BL - -REXB=0 RM=0x4 REX=0 | OUTREG=XED_REG_AH -REXB=0 RM=0x5 REX=0 | OUTREG=XED_REG_CH -REXB=0 RM=0x6 REX=0 | OUTREG=XED_REG_DH -REXB=0 RM=0x7 REX=0 | OUTREG=XED_REG_BH - -REXB=0 RM=0x4 REX=1 | OUTREG=XED_REG_SPL -REXB=0 RM=0x5 REX=1 | OUTREG=XED_REG_BPL -REXB=0 RM=0x6 REX=1 | OUTREG=XED_REG_SIL -REXB=0 RM=0x7 REX=1 | OUTREG=XED_REG_DIL - -REXB=1 RM=0x0 | OUTREG=XED_REG_R8B -REXB=1 RM=0x1 | OUTREG=XED_REG_R9B -REXB=1 RM=0x2 | OUTREG=XED_REG_R10B -REXB=1 RM=0x3 | OUTREG=XED_REG_R11B -REXB=1 RM=0x4 | OUTREG=XED_REG_R12B -REXB=1 RM=0x5 | OUTREG=XED_REG_R13B -REXB=1 RM=0x6 | OUTREG=XED_REG_R14B -REXB=1 RM=0x7 | OUTREG=XED_REG_R15B +REXB4=0 REXB=0 RM=0x0 | OUTREG=XED_REG_AL +REXB4=0 REXB=0 RM=0x1 | OUTREG=XED_REG_CL +REXB4=0 REXB=0 RM=0x2 | OUTREG=XED_REG_DL +REXB4=0 REXB=0 RM=0x3 | OUTREG=XED_REG_BL + +REXB4=0 REXB=0 RM=0x4 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_AH +REXB4=0 REXB=0 RM=0x5 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_CH +REXB4=0 REXB=0 RM=0x6 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_DH +REXB4=0 REXB=0 RM=0x7 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_BH + +REXB4=0 REXB=0 RM=0x4 REX=1 REX2=0 | OUTREG=XED_REG_SPL +REXB4=0 REXB=0 RM=0x5 REX=1 REX2=0 | OUTREG=XED_REG_BPL +REXB4=0 REXB=0 RM=0x6 REX=1 REX2=0 | OUTREG=XED_REG_SIL +REXB4=0 REXB=0 RM=0x7 REX=1 REX2=0 | OUTREG=XED_REG_DIL + +# REX2 prefix (REX prefix is "don't care"): +REXB4=0 REXB=0 RM=0x4 REX2=1 | OUTREG=XED_REG_SPL +REXB4=0 REXB=0 RM=0x5 REX2=1 | OUTREG=XED_REG_BPL +REXB4=0 REXB=0 RM=0x6 REX2=1 | OUTREG=XED_REG_SIL +REXB4=0 REXB=0 RM=0x7 REX2=1 | OUTREG=XED_REG_DIL + +# EVEX implies REX +REXB4=0 REXB=0 RM=0x4 REX=0 REX2=0 EVV | OUTREG=XED_REG_SPL +REXB4=0 REXB=0 RM=0x5 REX=0 REX2=0 EVV | OUTREG=XED_REG_BPL +REXB4=0 REXB=0 RM=0x6 REX=0 REX2=0 EVV | OUTREG=XED_REG_SIL +REXB4=0 REXB=0 RM=0x7 REX=0 REX2=0 EVV | OUTREG=XED_REG_DIL + +REXB4=0 REXB=1 RM=0x0 | OUTREG=XED_REG_R8B +REXB4=0 REXB=1 RM=0x1 | OUTREG=XED_REG_R9B +REXB4=0 REXB=1 RM=0x2 | OUTREG=XED_REG_R10B +REXB4=0 REXB=1 RM=0x3 | OUTREG=XED_REG_R11B +REXB4=0 REXB=1 RM=0x4 | OUTREG=XED_REG_R12B +REXB4=0 REXB=1 RM=0x5 | OUTREG=XED_REG_R13B +REXB4=0 REXB=1 RM=0x6 | OUTREG=XED_REG_R14B +REXB4=0 REXB=1 RM=0x7 | OUTREG=XED_REG_R15B + + +REXB4=1 REXB=0 RM=0x0 | OUTREG=XED_REG_R16B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x1 | OUTREG=XED_REG_R17B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x2 | OUTREG=XED_REG_R18B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x3 | OUTREG=XED_REG_R19B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x4 | OUTREG=XED_REG_R20B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x5 | OUTREG=XED_REG_R21B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x6 | OUTREG=XED_REG_R22B HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x7 | OUTREG=XED_REG_R23B HAS_EGPR=1 + +REXB4=1 REXB=1 RM=0x0 | OUTREG=XED_REG_R24B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x1 | OUTREG=XED_REG_R25B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x2 | OUTREG=XED_REG_R26B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x3 | OUTREG=XED_REG_R27B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x4 | OUTREG=XED_REG_R28B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x5 | OUTREG=XED_REG_R29B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x6 | OUTREG=XED_REG_R30B HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x7 | OUTREG=XED_REG_R31B HAS_EGPR=1 xed_reg_enum_t GPR8_SB():: -REXB=0 SRM=0x0 | OUTREG=XED_REG_AL -REXB=0 SRM=0x1 | OUTREG=XED_REG_CL -REXB=0 SRM=0x2 | OUTREG=XED_REG_DL -REXB=0 SRM=0x3 | OUTREG=XED_REG_BL - -REXB=0 SRM=0x4 REX=0 | OUTREG=XED_REG_AH -REXB=0 SRM=0x5 REX=0 | OUTREG=XED_REG_CH -REXB=0 SRM=0x6 REX=0 | OUTREG=XED_REG_DH -REXB=0 SRM=0x7 REX=0 | OUTREG=XED_REG_BH - -REXB=0 SRM=0x4 REX=1 | OUTREG=XED_REG_SPL -REXB=0 SRM=0x5 REX=1 | OUTREG=XED_REG_BPL -REXB=0 SRM=0x6 REX=1 | OUTREG=XED_REG_SIL -REXB=0 SRM=0x7 REX=1 | OUTREG=XED_REG_DIL - -REXB=1 SRM=0x0 | OUTREG=XED_REG_R8B -REXB=1 SRM=0x1 | OUTREG=XED_REG_R9B -REXB=1 SRM=0x2 | OUTREG=XED_REG_R10B -REXB=1 SRM=0x3 | OUTREG=XED_REG_R11B -REXB=1 SRM=0x4 | OUTREG=XED_REG_R12B -REXB=1 SRM=0x5 | OUTREG=XED_REG_R13B -REXB=1 SRM=0x6 | OUTREG=XED_REG_R14B -REXB=1 SRM=0x7 | OUTREG=XED_REG_R15B +REXB4=0 REXB=0 SRM=0x0 | OUTREG=XED_REG_AL +REXB4=0 REXB=0 SRM=0x1 | OUTREG=XED_REG_CL +REXB4=0 REXB=0 SRM=0x2 | OUTREG=XED_REG_DL +REXB4=0 REXB=0 SRM=0x3 | OUTREG=XED_REG_BL + +REXB4=0 REXB=0 SRM=0x4 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_AH +REXB4=0 REXB=0 SRM=0x5 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_CH +REXB4=0 REXB=0 SRM=0x6 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_DH +REXB4=0 REXB=0 SRM=0x7 REX=0 REX2=0 VEXVALID!=2 | OUTREG=XED_REG_BH + +REXB4=0 REXB=0 SRM=0x4 REX=1 REX2=0 | OUTREG=XED_REG_SPL +REXB4=0 REXB=0 SRM=0x5 REX=1 REX2=0 | OUTREG=XED_REG_BPL +REXB4=0 REXB=0 SRM=0x6 REX=1 REX2=0 | OUTREG=XED_REG_SIL +REXB4=0 REXB=0 SRM=0x7 REX=1 REX2=0 | OUTREG=XED_REG_DIL + +# REX2 prefix (REX prefix is "don't care"): +REXB4=0 REXB=0 SRM=0x4 REX2=1 | OUTREG=XED_REG_SPL +REXB4=0 REXB=0 SRM=0x5 REX2=1 | OUTREG=XED_REG_BPL +REXB4=0 REXB=0 SRM=0x6 REX2=1 | OUTREG=XED_REG_SIL +REXB4=0 REXB=0 SRM=0x7 REX2=1 | OUTREG=XED_REG_DIL + +# EVEX implies REX +REXB4=0 REXB=0 SRM=0x4 REX=0 REX2=0 EVV | OUTREG=XED_REG_SPL +REXB4=0 REXB=0 SRM=0x5 REX=0 REX2=0 EVV | OUTREG=XED_REG_BPL +REXB4=0 REXB=0 SRM=0x6 REX=0 REX2=0 EVV | OUTREG=XED_REG_SIL +REXB4=0 REXB=0 SRM=0x7 REX=0 REX2=0 EVV | OUTREG=XED_REG_DIL + +REXB4=0 REXB=1 SRM=0x0 | OUTREG=XED_REG_R8B +REXB4=0 REXB=1 SRM=0x1 | OUTREG=XED_REG_R9B +REXB4=0 REXB=1 SRM=0x2 | OUTREG=XED_REG_R10B +REXB4=0 REXB=1 SRM=0x3 | OUTREG=XED_REG_R11B +REXB4=0 REXB=1 SRM=0x4 | OUTREG=XED_REG_R12B +REXB4=0 REXB=1 SRM=0x5 | OUTREG=XED_REG_R13B +REXB4=0 REXB=1 SRM=0x6 | OUTREG=XED_REG_R14B +REXB4=0 REXB=1 SRM=0x7 | OUTREG=XED_REG_R15B + + +REXB4=1 REXB=0 SRM=0x0 | OUTREG=XED_REG_R16B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x1 | OUTREG=XED_REG_R17B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x2 | OUTREG=XED_REG_R18B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x3 | OUTREG=XED_REG_R19B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x4 | OUTREG=XED_REG_R20B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x5 | OUTREG=XED_REG_R21B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x6 | OUTREG=XED_REG_R22B HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x7 | OUTREG=XED_REG_R23B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x0 | OUTREG=XED_REG_R24B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x1 | OUTREG=XED_REG_R25B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x2 | OUTREG=XED_REG_R26B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x3 | OUTREG=XED_REG_R27B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x4 | OUTREG=XED_REG_R28B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x5 | OUTREG=XED_REG_R29B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x6 | OUTREG=XED_REG_R30B HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x7 | OUTREG=XED_REG_R31B HAS_EGPR=1 diff --git a/datafiles/xed-gpr8-enc-reg-table.txt b/datafiles/xed-gpr8-enc-reg-table.txt index 6f72ee80..129bcf7b 100644 --- a/datafiles/xed-gpr8-enc-reg-table.txt +++ b/datafiles/xed-gpr8-enc-reg-table.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -31,10 +31,10 @@ OUTREG=XED_REG_CL -> REG=0x1 OUTREG=XED_REG_DL -> REG=0x2 OUTREG=XED_REG_BL -> REG=0x3 -OUTREG=XED_REG_AH -> REG=0x4 NOREX=1 -OUTREG=XED_REG_CH -> REG=0x5 NOREX=1 -OUTREG=XED_REG_DH -> REG=0x6 NOREX=1 -OUTREG=XED_REG_BH -> REG=0x7 NOREX=1 +VV0 OUTREG=XED_REG_AH -> REG=0x4 NOREX=1 +VV0 OUTREG=XED_REG_CH -> REG=0x5 NOREX=1 +VV0 OUTREG=XED_REG_DH -> REG=0x6 NOREX=1 +VV0 OUTREG=XED_REG_BH -> REG=0x7 NOREX=1 OUTREG=XED_REG_SPL -> REG=0x4 NEEDREX=1 OUTREG=XED_REG_BPL -> REG=0x5 NEEDREX=1 @@ -57,10 +57,10 @@ OUTREG=XED_REG_CL -> RM=0x1 OUTREG=XED_REG_DL -> RM=0x2 OUTREG=XED_REG_BL -> RM=0x3 -OUTREG=XED_REG_AH -> RM=0x4 NOREX=1 -OUTREG=XED_REG_CH -> RM=0x5 NOREX=1 -OUTREG=XED_REG_DH -> RM=0x6 NOREX=1 -OUTREG=XED_REG_BH -> RM=0x7 NOREX=1 +VV0 OUTREG=XED_REG_AH -> RM=0x4 NOREX=1 +VV0 OUTREG=XED_REG_CH -> RM=0x5 NOREX=1 +VV0 OUTREG=XED_REG_DH -> RM=0x6 NOREX=1 +VV0 OUTREG=XED_REG_BH -> RM=0x7 NOREX=1 OUTREG=XED_REG_SPL -> RM=0x4 NEEDREX=1 OUTREG=XED_REG_BPL -> RM=0x5 NEEDREX=1 @@ -83,10 +83,10 @@ OUTREG=XED_REG_CL -> SRM=0x1 OUTREG=XED_REG_DL -> SRM=0x2 OUTREG=XED_REG_BL -> SRM=0x3 -OUTREG=XED_REG_AH -> SRM=0x4 NOREX=1 -OUTREG=XED_REG_CH -> SRM=0x5 NOREX=1 -OUTREG=XED_REG_DH -> SRM=0x6 NOREX=1 -OUTREG=XED_REG_BH -> SRM=0x7 NOREX=1 +VV0 OUTREG=XED_REG_AH -> SRM=0x4 NOREX=1 +VV0 OUTREG=XED_REG_CH -> SRM=0x5 NOREX=1 +VV0 OUTREG=XED_REG_DH -> SRM=0x6 NOREX=1 +VV0 OUTREG=XED_REG_BH -> SRM=0x7 NOREX=1 OUTREG=XED_REG_SPL -> SRM=0x4 NEEDREX=1 OUTREG=XED_REG_BPL -> SRM=0x5 NEEDREX=1 diff --git a/datafiles/xed-immediates.txt b/datafiles/xed-immediates.txt index 47eb9d1d..d037d806 100644 --- a/datafiles/xed-immediates.txt +++ b/datafiles/xed-immediates.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -61,11 +61,14 @@ UIMM32():: UIMM0[i/32] | IMM_WIDTH=32 BRDISP8():: - DISP[d/8] |BRDISP_WIDTH=8 + DISP[d/8] | BRDISP_WIDTH=8 BRDISP32():: DISP[d/32] | BRDISP_WIDTH=32 +BRDISP64():: + DISP[d/64] | BRDISP_WIDTH=64 + BRDISPz():: EOSZ=1 DISP[d/16] | BRDISP_WIDTH=16 EOSZ=2 DISP[d/32] | BRDISP_WIDTH=32 diff --git a/datafiles/xed-isa.txt b/datafiles/xed-isa.txt index 8eb30280..1cc5ec27 100644 --- a/datafiles/xed-isa.txt +++ b/datafiles/xed-isa.txt @@ -6300,23 +6300,31 @@ IFORM : DEC_GPRv_48 } { ICLASS : PUSH -UNAME : PUSH_50 CPL : 3 CATEGORY : PUSH EXTENSION : BASE ISA_SET : I86 -PATTERN : 0b0101_0 SRM[rrr] DF64() + +PATTERN : 0b0101_0 SRM[rrr] norex2_prefix DF64() +OPERANDS : REG0=GPRv_SB():r REG1=XED_REG_STACKPUSH:rw:spw:SUPP +IFORM : PUSH_GPRv_50 + +PATTERN : 0b0101_0 SRM[rrr] rex2_refining_prefix norexw_prefix mode64 DF64() OPERANDS : REG0=GPRv_SB():r REG1=XED_REG_STACKPUSH:rw:spw:SUPP IFORM : PUSH_GPRv_50 } { ICLASS : POP -UNAME : POP_58 CPL : 3 CATEGORY : POP EXTENSION : BASE ISA_SET : I86 -PATTERN : 0b0101_1 SRM[rrr] DF64() + +PATTERN : 0b0101_1 SRM[rrr] norex2_prefix DF64() +OPERANDS : REG0=GPRv_SB():w REG1=XED_REG_STACKPOP:rw:spw:SUPP +IFORM : POP_GPRv_58 + +PATTERN : 0b0101_1 SRM[rrr] mode64 rex2_refining_prefix norexw_prefix DF64() OPERANDS : REG0=GPRv_SB():w REG1=XED_REG_STACKPOP:rw:spw:SUPP IFORM : POP_GPRv_58 } @@ -7153,7 +7161,7 @@ CATEGORY : NOP EXTENSION : BASE ATTRIBUTES: NOP ISA_SET : I86 -PATTERN : 0b1001_0 SRM[0b000] SRM=0 not_refining_f3 norexb_prefix +PATTERN : 0b1001_0 SRM[0b000] SRM=0 not_refining_f3 norexb_prefix norexb4_prefix OPERANDS : IFORM : NOP_90 } @@ -7196,6 +7204,9 @@ OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL # This is strange. REG0 is r8w, r8d or r8 depending on the EOSZ. mode64 PATTERN : 0b1001_0 SRM[rrr] SRM=0 not_refining_f3 rexb_prefix OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL + +PATTERN : 0b1001_0 SRM[rrr] SRM=0 not_refining_f3 norexb_prefix rexb4_prefix +OPERANDS : REG0=GPRv_SB():rw REG1=OrAX():rw:IMPL } { ICLASS : CBW @@ -7429,7 +7440,7 @@ CATEGORY : DATAXFER EXTENSION : BASE ISA_SET : I86 ATTRIBUTES : fixed_base0 -PATTERN : 0xA1 MEMDISPv() OVERRIDE_SEG0() +PATTERN : 0xA1 norex2_prefix MEMDISPv() OVERRIDE_SEG0() OPERANDS : REG0=OrAX():w:IMPL MEM0:r:v SEG0=FINAL_DSEG():r:SUPP BASE0=XED_REG_INVALID:r:ECOND INDEX=XED_REG_INVALID:r:ECOND } { @@ -15155,7 +15166,7 @@ CATEGORY : XSAVE EXTENSION : XSAVE COMMENT : Variable length store and conditional reg read. Reads/writes XSTATE_BV from header. ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b100] RM[nnn] no_refining_prefix norexw_prefix MODRM() XSAVE() +PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b100] RM[nnn] no_refining_prefix norex2_prefix norexw_prefix MODRM() #FIXME 2007-06-25 need a meaningful width code for XSAVE/XRSTOR OPERANDS : MEM0:rw:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -15166,7 +15177,7 @@ CATEGORY : XSAVE EXTENSION : XSAVE COMMENT : variable length load and conditional reg write ATTRIBUTES : xmm_state_cw REQUIRES_ALIGNMENT x87_mmx_state_cw NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b101] RM[nnn] no_refining_prefix norexw_prefix MODRM() XSAVE() +PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b101] RM[nnn] no_refining_prefix norex2_prefix norexw_prefix MODRM() #FIXME 2007-06-25 need a meaningful width code for XSAVE/XRSTOR OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -15179,7 +15190,7 @@ CATEGORY : XSAVE EXTENSION : XSAVE COMMENT : Variable length store and conditional reg read. Reads/writes XSTATE_BV from header. ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b100] RM[nnn] no_refining_prefix rexw_prefix MODRM() XSAVE() +PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b100] RM[nnn] no_refining_prefix norex2_prefix rexw_prefix MODRM() #FIXME 2007-06-25 need a meaningful width code for XSAVE/XRSTOR OPERANDS : MEM0:rw:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -15191,7 +15202,7 @@ CATEGORY : XSAVE EXTENSION : XSAVE COMMENT : variable length load and conditional reg write ATTRIBUTES : xmm_state_cw REQUIRES_ALIGNMENT x87_mmx_state_cw NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b101] RM[nnn] no_refining_prefix rexw_prefix MODRM() XSAVE() +PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b101] RM[nnn] no_refining_prefix norex2_prefix rexw_prefix MODRM() #FIXME 2007-06-25 need a meaningful width code for XSAVE/XRSTOR OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } diff --git a/datafiles/xed-modrm-encode.txt b/datafiles/xed-modrm-encode.txt index b513469f..32f20c80 100644 --- a/datafiles/xed-modrm-encode.txt +++ b/datafiles/xed-modrm-encode.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -463,5 +463,3 @@ DISP_WIDTH=0 -> nothing DISP_WIDTH=8 -> nothing DISP_WIDTH=32 -> nothing -XSAVE():: -otherwise -> nothing diff --git a/datafiles/xed-reg-tables-gpr.txt b/datafiles/xed-reg-tables-gpr.txt index 16722827..5152f859 100644 --- a/datafiles/xed-reg-tables-gpr.txt +++ b/datafiles/xed-reg-tables-gpr.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -99,6 +99,72 @@ EASZ=1 | OUTREG=XED_REG_R15W EASZ=2 | OUTREG=XED_REG_R15D EASZ=3 | OUTREG=XED_REG_R15 +# EGPRs +xed_reg_enum_t Ar16():: +EASZ=1 | OUTREG=XED_REG_R16W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R16D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R16 HAS_EGPR=1 +xed_reg_enum_t Ar17():: +EASZ=1 | OUTREG=XED_REG_R17W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R17D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R17 HAS_EGPR=1 +xed_reg_enum_t Ar18():: +EASZ=1 | OUTREG=XED_REG_R18W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R18D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R18 HAS_EGPR=1 +xed_reg_enum_t Ar19():: +EASZ=1 | OUTREG=XED_REG_R19W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R19D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R19 HAS_EGPR=1 +xed_reg_enum_t Ar20():: +EASZ=1 | OUTREG=XED_REG_R20W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R20D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R20 HAS_EGPR=1 +xed_reg_enum_t Ar21():: +EASZ=1 | OUTREG=XED_REG_R21W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R21D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R21 HAS_EGPR=1 +xed_reg_enum_t Ar22():: +EASZ=1 | OUTREG=XED_REG_R22W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R22D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R22 HAS_EGPR=1 +xed_reg_enum_t Ar23():: +EASZ=1 | OUTREG=XED_REG_R23W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R23D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R23 HAS_EGPR=1 +xed_reg_enum_t Ar24():: +EASZ=1 | OUTREG=XED_REG_R24W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R24D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R24 HAS_EGPR=1 +xed_reg_enum_t Ar25():: +EASZ=1 | OUTREG=XED_REG_R25W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R25D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R25 HAS_EGPR=1 +xed_reg_enum_t Ar26():: +EASZ=1 | OUTREG=XED_REG_R26W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R26D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R26 HAS_EGPR=1 +xed_reg_enum_t Ar27():: +EASZ=1 | OUTREG=XED_REG_R27W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R27D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R27 HAS_EGPR=1 +xed_reg_enum_t Ar28():: +EASZ=1 | OUTREG=XED_REG_R28W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R28D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R28 HAS_EGPR=1 +xed_reg_enum_t Ar29():: +EASZ=1 | OUTREG=XED_REG_R29W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R29D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R29 HAS_EGPR=1 +xed_reg_enum_t Ar30():: +EASZ=1 | OUTREG=XED_REG_R30W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R30D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R30 HAS_EGPR=1 +xed_reg_enum_t Ar31():: +EASZ=1 | OUTREG=XED_REG_R31W HAS_EGPR=1 +EASZ=2 | OUTREG=XED_REG_R31D HAS_EGPR=1 +EASZ=3 | OUTREG=XED_REG_R31 HAS_EGPR=1 + xed_reg_enum_t rIP():: mode16 | OUTREG=XED_REG_EIP mode32 | OUTREG=XED_REG_EIP @@ -176,6 +242,11 @@ EOSZ=3 | OUTREG=GPR32_R() EOSZ=2 | OUTREG=GPR32_R() EOSZ=1 | OUTREG=GPR16_R() +xed_reg_enum_t GPRy_R():: +EOSZ=3 | OUTREG=GPR64_R() +EOSZ=2 | OUTREG=GPR32_R() +EOSZ=1 | OUTREG=GPR32_R() + # When used as the MOD=11/RM register xed_reg_enum_t GPRv_B():: EOSZ=3 | OUTREG=GPR64_B() @@ -192,228 +263,403 @@ EOSZ=3 | OUTREG=GPR64_B() EOSZ=2 | OUTREG=GPR32_B() EOSZ=1 | OUTREG=GPR32_B() -xed_reg_enum_t GPRy_R():: -EOSZ=3 | OUTREG=GPR64_R() -EOSZ=2 | OUTREG=GPR32_R() -EOSZ=1 | OUTREG=GPR32_R() ##################################### xed_reg_enum_t GPR64_R():: -REXR=0 REG=0x0 | OUTREG=XED_REG_RAX -REXR=0 REG=0x1 | OUTREG=XED_REG_RCX -REXR=0 REG=0x2 | OUTREG=XED_REG_RDX -REXR=0 REG=0x3 | OUTREG=XED_REG_RBX -REXR=0 REG=0x4 | OUTREG=XED_REG_RSP -REXR=0 REG=0x5 | OUTREG=XED_REG_RBP -REXR=0 REG=0x6 | OUTREG=XED_REG_RSI -REXR=0 REG=0x7 | OUTREG=XED_REG_RDI -REXR=1 REG=0x0 | OUTREG=XED_REG_R8 -REXR=1 REG=0x1 | OUTREG=XED_REG_R9 -REXR=1 REG=0x2 | OUTREG=XED_REG_R10 -REXR=1 REG=0x3 | OUTREG=XED_REG_R11 -REXR=1 REG=0x4 | OUTREG=XED_REG_R12 -REXR=1 REG=0x5 | OUTREG=XED_REG_R13 -REXR=1 REG=0x6 | OUTREG=XED_REG_R14 -REXR=1 REG=0x7 | OUTREG=XED_REG_R15 +REXR4=0 REXR=0 REG=0x0 | OUTREG=XED_REG_RAX +REXR4=0 REXR=0 REG=0x1 | OUTREG=XED_REG_RCX +REXR4=0 REXR=0 REG=0x2 | OUTREG=XED_REG_RDX +REXR4=0 REXR=0 REG=0x3 | OUTREG=XED_REG_RBX +REXR4=0 REXR=0 REG=0x4 | OUTREG=XED_REG_RSP +REXR4=0 REXR=0 REG=0x5 | OUTREG=XED_REG_RBP +REXR4=0 REXR=0 REG=0x6 | OUTREG=XED_REG_RSI +REXR4=0 REXR=0 REG=0x7 | OUTREG=XED_REG_RDI +REXR4=0 REXR=1 REG=0x0 | OUTREG=XED_REG_R8 +REXR4=0 REXR=1 REG=0x1 | OUTREG=XED_REG_R9 +REXR4=0 REXR=1 REG=0x2 | OUTREG=XED_REG_R10 +REXR4=0 REXR=1 REG=0x3 | OUTREG=XED_REG_R11 +REXR4=0 REXR=1 REG=0x4 | OUTREG=XED_REG_R12 +REXR4=0 REXR=1 REG=0x5 | OUTREG=XED_REG_R13 +REXR4=0 REXR=1 REG=0x6 | OUTREG=XED_REG_R14 +REXR4=0 REXR=1 REG=0x7 | OUTREG=XED_REG_R15 +#EGPRs +REXR4=1 REXR=0 REG=0x0 | OUTREG=XED_REG_R16 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x1 | OUTREG=XED_REG_R17 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x2 | OUTREG=XED_REG_R18 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x3 | OUTREG=XED_REG_R19 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x4 | OUTREG=XED_REG_R20 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x5 | OUTREG=XED_REG_R21 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x6 | OUTREG=XED_REG_R22 HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x7 | OUTREG=XED_REG_R23 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x0 | OUTREG=XED_REG_R24 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x1 | OUTREG=XED_REG_R25 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x2 | OUTREG=XED_REG_R26 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x3 | OUTREG=XED_REG_R27 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x4 | OUTREG=XED_REG_R28 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x5 | OUTREG=XED_REG_R29 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x6 | OUTREG=XED_REG_R30 HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x7 | OUTREG=XED_REG_R31 HAS_EGPR=1 xed_reg_enum_t GPR64_B():: -REXB=0 RM=0x0 | OUTREG=XED_REG_RAX -REXB=0 RM=0x1 | OUTREG=XED_REG_RCX -REXB=0 RM=0x2 | OUTREG=XED_REG_RDX -REXB=0 RM=0x3 | OUTREG=XED_REG_RBX -REXB=0 RM=0x4 | OUTREG=XED_REG_RSP -REXB=0 RM=0x5 | OUTREG=XED_REG_RBP -REXB=0 RM=0x6 | OUTREG=XED_REG_RSI -REXB=0 RM=0x7 | OUTREG=XED_REG_RDI -REXB=1 RM=0x0 | OUTREG=XED_REG_R8 -REXB=1 RM=0x1 | OUTREG=XED_REG_R9 -REXB=1 RM=0x2 | OUTREG=XED_REG_R10 -REXB=1 RM=0x3 | OUTREG=XED_REG_R11 -REXB=1 RM=0x4 | OUTREG=XED_REG_R12 -REXB=1 RM=0x5 | OUTREG=XED_REG_R13 -REXB=1 RM=0x6 | OUTREG=XED_REG_R14 -REXB=1 RM=0x7 | OUTREG=XED_REG_R15 +REXB4=0 REXB=0 RM=0x0 | OUTREG=XED_REG_RAX +REXB4=0 REXB=0 RM=0x1 | OUTREG=XED_REG_RCX +REXB4=0 REXB=0 RM=0x2 | OUTREG=XED_REG_RDX +REXB4=0 REXB=0 RM=0x3 | OUTREG=XED_REG_RBX +REXB4=0 REXB=0 RM=0x4 | OUTREG=XED_REG_RSP +REXB4=0 REXB=0 RM=0x5 | OUTREG=XED_REG_RBP +REXB4=0 REXB=0 RM=0x6 | OUTREG=XED_REG_RSI +REXB4=0 REXB=0 RM=0x7 | OUTREG=XED_REG_RDI +REXB4=0 REXB=1 RM=0x0 | OUTREG=XED_REG_R8 +REXB4=0 REXB=1 RM=0x1 | OUTREG=XED_REG_R9 +REXB4=0 REXB=1 RM=0x2 | OUTREG=XED_REG_R10 +REXB4=0 REXB=1 RM=0x3 | OUTREG=XED_REG_R11 +REXB4=0 REXB=1 RM=0x4 | OUTREG=XED_REG_R12 +REXB4=0 REXB=1 RM=0x5 | OUTREG=XED_REG_R13 +REXB4=0 REXB=1 RM=0x6 | OUTREG=XED_REG_R14 +REXB4=0 REXB=1 RM=0x7 | OUTREG=XED_REG_R15 +#EGPRs +REXB4=1 REXB=0 RM=0x0 | OUTREG=XED_REG_R16 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x1 | OUTREG=XED_REG_R17 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x2 | OUTREG=XED_REG_R18 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x3 | OUTREG=XED_REG_R19 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x4 | OUTREG=XED_REG_R20 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x5 | OUTREG=XED_REG_R21 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x6 | OUTREG=XED_REG_R22 HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x7 | OUTREG=XED_REG_R23 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x0 | OUTREG=XED_REG_R24 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x1 | OUTREG=XED_REG_R25 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x2 | OUTREG=XED_REG_R26 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x3 | OUTREG=XED_REG_R27 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x4 | OUTREG=XED_REG_R28 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x5 | OUTREG=XED_REG_R29 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x6 | OUTREG=XED_REG_R30 HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x7 | OUTREG=XED_REG_R31 HAS_EGPR=1 xed_reg_enum_t GPR64_SB():: -REXB=0 SRM=0x0 | OUTREG=XED_REG_RAX -REXB=0 SRM=0x1 | OUTREG=XED_REG_RCX -REXB=0 SRM=0x2 | OUTREG=XED_REG_RDX -REXB=0 SRM=0x3 | OUTREG=XED_REG_RBX -REXB=0 SRM=0x4 | OUTREG=XED_REG_RSP -REXB=0 SRM=0x5 | OUTREG=XED_REG_RBP -REXB=0 SRM=0x6 | OUTREG=XED_REG_RSI -REXB=0 SRM=0x7 | OUTREG=XED_REG_RDI -REXB=1 SRM=0x0 | OUTREG=XED_REG_R8 -REXB=1 SRM=0x1 | OUTREG=XED_REG_R9 -REXB=1 SRM=0x2 | OUTREG=XED_REG_R10 -REXB=1 SRM=0x3 | OUTREG=XED_REG_R11 -REXB=1 SRM=0x4 | OUTREG=XED_REG_R12 -REXB=1 SRM=0x5 | OUTREG=XED_REG_R13 -REXB=1 SRM=0x6 | OUTREG=XED_REG_R14 -REXB=1 SRM=0x7 | OUTREG=XED_REG_R15 - - +REXB4=0 REXB=0 SRM=0x0 | OUTREG=XED_REG_RAX +REXB4=0 REXB=0 SRM=0x1 | OUTREG=XED_REG_RCX +REXB4=0 REXB=0 SRM=0x2 | OUTREG=XED_REG_RDX +REXB4=0 REXB=0 SRM=0x3 | OUTREG=XED_REG_RBX +REXB4=0 REXB=0 SRM=0x4 | OUTREG=XED_REG_RSP +REXB4=0 REXB=0 SRM=0x5 | OUTREG=XED_REG_RBP +REXB4=0 REXB=0 SRM=0x6 | OUTREG=XED_REG_RSI +REXB4=0 REXB=0 SRM=0x7 | OUTREG=XED_REG_RDI +REXB4=0 REXB=1 SRM=0x0 | OUTREG=XED_REG_R8 +REXB4=0 REXB=1 SRM=0x1 | OUTREG=XED_REG_R9 +REXB4=0 REXB=1 SRM=0x2 | OUTREG=XED_REG_R10 +REXB4=0 REXB=1 SRM=0x3 | OUTREG=XED_REG_R11 +REXB4=0 REXB=1 SRM=0x4 | OUTREG=XED_REG_R12 +REXB4=0 REXB=1 SRM=0x5 | OUTREG=XED_REG_R13 +REXB4=0 REXB=1 SRM=0x6 | OUTREG=XED_REG_R14 +REXB4=0 REXB=1 SRM=0x7 | OUTREG=XED_REG_R15 +#EGPRs +REXB4=1 REXB=0 SRM=0x0 | OUTREG=XED_REG_R16 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x1 | OUTREG=XED_REG_R17 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x2 | OUTREG=XED_REG_R18 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x3 | OUTREG=XED_REG_R19 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x4 | OUTREG=XED_REG_R20 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x5 | OUTREG=XED_REG_R21 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x6 | OUTREG=XED_REG_R22 HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x7 | OUTREG=XED_REG_R23 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x0 | OUTREG=XED_REG_R24 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x1 | OUTREG=XED_REG_R25 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x2 | OUTREG=XED_REG_R26 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x3 | OUTREG=XED_REG_R27 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x4 | OUTREG=XED_REG_R28 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x5 | OUTREG=XED_REG_R29 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x6 | OUTREG=XED_REG_R30 HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x7 | OUTREG=XED_REG_R31 HAS_EGPR=1 xed_reg_enum_t GPR64_X():: -REXX=0 SIBINDEX=0x0 | OUTREG=XED_REG_RAX -REXX=0 SIBINDEX=0x1 | OUTREG=XED_REG_RCX -REXX=0 SIBINDEX=0x2 | OUTREG=XED_REG_RDX -REXX=0 SIBINDEX=0x3 | OUTREG=XED_REG_RBX -REXX=0 SIBINDEX=0x4 | OUTREG=XED_REG_INVALID -REXX=0 SIBINDEX=0x5 | OUTREG=XED_REG_RBP -REXX=0 SIBINDEX=0x6 | OUTREG=XED_REG_RSI -REXX=0 SIBINDEX=0x7 | OUTREG=XED_REG_RDI -REXX=1 SIBINDEX=0x0 | OUTREG=XED_REG_R8 -REXX=1 SIBINDEX=0x1 | OUTREG=XED_REG_R9 -REXX=1 SIBINDEX=0x2 | OUTREG=XED_REG_R10 -REXX=1 SIBINDEX=0x3 | OUTREG=XED_REG_R11 -REXX=1 SIBINDEX=0x4 | OUTREG=XED_REG_R12 -REXX=1 SIBINDEX=0x5 | OUTREG=XED_REG_R13 -REXX=1 SIBINDEX=0x6 | OUTREG=XED_REG_R14 -REXX=1 SIBINDEX=0x7 | OUTREG=XED_REG_R15 - +REXX4=0 REXX=0 SIBINDEX=0x0 | OUTREG=XED_REG_RAX +REXX4=0 REXX=0 SIBINDEX=0x1 | OUTREG=XED_REG_RCX +REXX4=0 REXX=0 SIBINDEX=0x2 | OUTREG=XED_REG_RDX +REXX4=0 REXX=0 SIBINDEX=0x3 | OUTREG=XED_REG_RBX +REXX4=0 REXX=0 SIBINDEX=0x4 | OUTREG=XED_REG_INVALID +REXX4=0 REXX=0 SIBINDEX=0x5 | OUTREG=XED_REG_RBP +REXX4=0 REXX=0 SIBINDEX=0x6 | OUTREG=XED_REG_RSI +REXX4=0 REXX=0 SIBINDEX=0x7 | OUTREG=XED_REG_RDI +REXX4=0 REXX=1 SIBINDEX=0x0 | OUTREG=XED_REG_R8 +REXX4=0 REXX=1 SIBINDEX=0x1 | OUTREG=XED_REG_R9 +REXX4=0 REXX=1 SIBINDEX=0x2 | OUTREG=XED_REG_R10 +REXX4=0 REXX=1 SIBINDEX=0x3 | OUTREG=XED_REG_R11 +REXX4=0 REXX=1 SIBINDEX=0x4 | OUTREG=XED_REG_R12 +REXX4=0 REXX=1 SIBINDEX=0x5 | OUTREG=XED_REG_R13 +REXX4=0 REXX=1 SIBINDEX=0x6 | OUTREG=XED_REG_R14 +REXX4=0 REXX=1 SIBINDEX=0x7 | OUTREG=XED_REG_R15 +#EGPRs +REXX4=1 REXX=0 SIBINDEX=0x0 | OUTREG=XED_REG_R16 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x1 | OUTREG=XED_REG_R17 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x2 | OUTREG=XED_REG_R18 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x3 | OUTREG=XED_REG_R19 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x4 | OUTREG=XED_REG_R20 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x5 | OUTREG=XED_REG_R21 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x6 | OUTREG=XED_REG_R22 HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x7 | OUTREG=XED_REG_R23 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x0 | OUTREG=XED_REG_R24 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x1 | OUTREG=XED_REG_R25 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x2 | OUTREG=XED_REG_R26 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x3 | OUTREG=XED_REG_R27 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x4 | OUTREG=XED_REG_R28 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x5 | OUTREG=XED_REG_R29 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x6 | OUTREG=XED_REG_R30 HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x7 | OUTREG=XED_REG_R31 HAS_EGPR=1 ################################# xed_reg_enum_t GPR32_R():: -REXR=0 REG=0x0 | OUTREG=XED_REG_EAX -REXR=0 REG=0x1 | OUTREG=XED_REG_ECX -REXR=0 REG=0x2 | OUTREG=XED_REG_EDX -REXR=0 REG=0x3 | OUTREG=XED_REG_EBX -REXR=0 REG=0x4 | OUTREG=XED_REG_ESP -REXR=0 REG=0x5 | OUTREG=XED_REG_EBP -REXR=0 REG=0x6 | OUTREG=XED_REG_ESI -REXR=0 REG=0x7 | OUTREG=XED_REG_EDI -REXR=1 REG=0x0 | OUTREG=XED_REG_R8D -REXR=1 REG=0x1 | OUTREG=XED_REG_R9D -REXR=1 REG=0x2 | OUTREG=XED_REG_R10D -REXR=1 REG=0x3 | OUTREG=XED_REG_R11D -REXR=1 REG=0x4 | OUTREG=XED_REG_R12D -REXR=1 REG=0x5 | OUTREG=XED_REG_R13D -REXR=1 REG=0x6 | OUTREG=XED_REG_R14D -REXR=1 REG=0x7 | OUTREG=XED_REG_R15D +REXR4=0 REXR=0 REG=0x0 | OUTREG=XED_REG_EAX +REXR4=0 REXR=0 REG=0x1 | OUTREG=XED_REG_ECX +REXR4=0 REXR=0 REG=0x2 | OUTREG=XED_REG_EDX +REXR4=0 REXR=0 REG=0x3 | OUTREG=XED_REG_EBX +REXR4=0 REXR=0 REG=0x4 | OUTREG=XED_REG_ESP +REXR4=0 REXR=0 REG=0x5 | OUTREG=XED_REG_EBP +REXR4=0 REXR=0 REG=0x6 | OUTREG=XED_REG_ESI +REXR4=0 REXR=0 REG=0x7 | OUTREG=XED_REG_EDI +REXR4=0 REXR=1 REG=0x0 | OUTREG=XED_REG_R8D +REXR4=0 REXR=1 REG=0x1 | OUTREG=XED_REG_R9D +REXR4=0 REXR=1 REG=0x2 | OUTREG=XED_REG_R10D +REXR4=0 REXR=1 REG=0x3 | OUTREG=XED_REG_R11D +REXR4=0 REXR=1 REG=0x4 | OUTREG=XED_REG_R12D +REXR4=0 REXR=1 REG=0x5 | OUTREG=XED_REG_R13D +REXR4=0 REXR=1 REG=0x6 | OUTREG=XED_REG_R14D +REXR4=0 REXR=1 REG=0x7 | OUTREG=XED_REG_R15D +#EGPRs +REXR4=1 REXR=0 REG=0x0 | OUTREG=XED_REG_R16D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x1 | OUTREG=XED_REG_R17D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x2 | OUTREG=XED_REG_R18D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x3 | OUTREG=XED_REG_R19D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x4 | OUTREG=XED_REG_R20D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x5 | OUTREG=XED_REG_R21D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x6 | OUTREG=XED_REG_R22D HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x7 | OUTREG=XED_REG_R23D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x0 | OUTREG=XED_REG_R24D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x1 | OUTREG=XED_REG_R25D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x2 | OUTREG=XED_REG_R26D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x3 | OUTREG=XED_REG_R27D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x4 | OUTREG=XED_REG_R28D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x5 | OUTREG=XED_REG_R29D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x6 | OUTREG=XED_REG_R30D HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x7 | OUTREG=XED_REG_R31D HAS_EGPR=1 xed_reg_enum_t GPR32_B():: -REXB=0 RM=0x0 | OUTREG=XED_REG_EAX -REXB=0 RM=0x1 | OUTREG=XED_REG_ECX -REXB=0 RM=0x2 | OUTREG=XED_REG_EDX -REXB=0 RM=0x3 | OUTREG=XED_REG_EBX -REXB=0 RM=0x4 | OUTREG=XED_REG_ESP -REXB=0 RM=0x5 | OUTREG=XED_REG_EBP -REXB=0 RM=0x6 | OUTREG=XED_REG_ESI -REXB=0 RM=0x7 | OUTREG=XED_REG_EDI -REXB=1 RM=0x0 | OUTREG=XED_REG_R8D -REXB=1 RM=0x1 | OUTREG=XED_REG_R9D -REXB=1 RM=0x2 | OUTREG=XED_REG_R10D -REXB=1 RM=0x3 | OUTREG=XED_REG_R11D -REXB=1 RM=0x4 | OUTREG=XED_REG_R12D -REXB=1 RM=0x5 | OUTREG=XED_REG_R13D -REXB=1 RM=0x6 | OUTREG=XED_REG_R14D -REXB=1 RM=0x7 | OUTREG=XED_REG_R15D - -xed_reg_enum_t GPR32_SB():: -REXB=0 SRM=0x0 | OUTREG=XED_REG_EAX -REXB=0 SRM=0x1 | OUTREG=XED_REG_ECX -REXB=0 SRM=0x2 | OUTREG=XED_REG_EDX -REXB=0 SRM=0x3 | OUTREG=XED_REG_EBX -REXB=0 SRM=0x4 | OUTREG=XED_REG_ESP -REXB=0 SRM=0x5 | OUTREG=XED_REG_EBP -REXB=0 SRM=0x6 | OUTREG=XED_REG_ESI -REXB=0 SRM=0x7 | OUTREG=XED_REG_EDI -REXB=1 SRM=0x0 | OUTREG=XED_REG_R8D -REXB=1 SRM=0x1 | OUTREG=XED_REG_R9D -REXB=1 SRM=0x2 | OUTREG=XED_REG_R10D -REXB=1 SRM=0x3 | OUTREG=XED_REG_R11D -REXB=1 SRM=0x4 | OUTREG=XED_REG_R12D -REXB=1 SRM=0x5 | OUTREG=XED_REG_R13D -REXB=1 SRM=0x6 | OUTREG=XED_REG_R14D -REXB=1 SRM=0x7 | OUTREG=XED_REG_R15D - +REXB4=0 REXB=0 RM=0x0 | OUTREG=XED_REG_EAX +REXB4=0 REXB=0 RM=0x1 | OUTREG=XED_REG_ECX +REXB4=0 REXB=0 RM=0x2 | OUTREG=XED_REG_EDX +REXB4=0 REXB=0 RM=0x3 | OUTREG=XED_REG_EBX +REXB4=0 REXB=0 RM=0x4 | OUTREG=XED_REG_ESP +REXB4=0 REXB=0 RM=0x5 | OUTREG=XED_REG_EBP +REXB4=0 REXB=0 RM=0x6 | OUTREG=XED_REG_ESI +REXB4=0 REXB=0 RM=0x7 | OUTREG=XED_REG_EDI +REXB4=0 REXB=1 RM=0x0 | OUTREG=XED_REG_R8D +REXB4=0 REXB=1 RM=0x1 | OUTREG=XED_REG_R9D +REXB4=0 REXB=1 RM=0x2 | OUTREG=XED_REG_R10D +REXB4=0 REXB=1 RM=0x3 | OUTREG=XED_REG_R11D +REXB4=0 REXB=1 RM=0x4 | OUTREG=XED_REG_R12D +REXB4=0 REXB=1 RM=0x5 | OUTREG=XED_REG_R13D +REXB4=0 REXB=1 RM=0x6 | OUTREG=XED_REG_R14D +REXB4=0 REXB=1 RM=0x7 | OUTREG=XED_REG_R15D +#EGPRs +REXB4=1 REXB=0 RM=0x0 | OUTREG=XED_REG_R16D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x1 | OUTREG=XED_REG_R17D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x2 | OUTREG=XED_REG_R18D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x3 | OUTREG=XED_REG_R19D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x4 | OUTREG=XED_REG_R20D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x5 | OUTREG=XED_REG_R21D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x6 | OUTREG=XED_REG_R22D HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x7 | OUTREG=XED_REG_R23D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x0 | OUTREG=XED_REG_R24D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x1 | OUTREG=XED_REG_R25D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x2 | OUTREG=XED_REG_R26D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x3 | OUTREG=XED_REG_R27D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x4 | OUTREG=XED_REG_R28D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x5 | OUTREG=XED_REG_R29D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x6 | OUTREG=XED_REG_R30D HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x7 | OUTREG=XED_REG_R31D HAS_EGPR=1 +xed_reg_enum_t GPR32_SB():: +REXB4=0 REXB=0 SRM=0x0 | OUTREG=XED_REG_EAX +REXB4=0 REXB=0 SRM=0x1 | OUTREG=XED_REG_ECX +REXB4=0 REXB=0 SRM=0x2 | OUTREG=XED_REG_EDX +REXB4=0 REXB=0 SRM=0x3 | OUTREG=XED_REG_EBX +REXB4=0 REXB=0 SRM=0x4 | OUTREG=XED_REG_ESP +REXB4=0 REXB=0 SRM=0x5 | OUTREG=XED_REG_EBP +REXB4=0 REXB=0 SRM=0x6 | OUTREG=XED_REG_ESI +REXB4=0 REXB=0 SRM=0x7 | OUTREG=XED_REG_EDI +REXB4=0 REXB=1 SRM=0x0 | OUTREG=XED_REG_R8D +REXB4=0 REXB=1 SRM=0x1 | OUTREG=XED_REG_R9D +REXB4=0 REXB=1 SRM=0x2 | OUTREG=XED_REG_R10D +REXB4=0 REXB=1 SRM=0x3 | OUTREG=XED_REG_R11D +REXB4=0 REXB=1 SRM=0x4 | OUTREG=XED_REG_R12D +REXB4=0 REXB=1 SRM=0x5 | OUTREG=XED_REG_R13D +REXB4=0 REXB=1 SRM=0x6 | OUTREG=XED_REG_R14D +REXB4=0 REXB=1 SRM=0x7 | OUTREG=XED_REG_R15D +#EGPRs +REXB4=1 REXB=0 SRM=0x0 | OUTREG=XED_REG_R16D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x1 | OUTREG=XED_REG_R17D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x2 | OUTREG=XED_REG_R18D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x3 | OUTREG=XED_REG_R19D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x4 | OUTREG=XED_REG_R20D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x5 | OUTREG=XED_REG_R21D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x6 | OUTREG=XED_REG_R22D HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x7 | OUTREG=XED_REG_R23D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x0 | OUTREG=XED_REG_R24D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x1 | OUTREG=XED_REG_R25D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x2 | OUTREG=XED_REG_R26D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x3 | OUTREG=XED_REG_R27D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x4 | OUTREG=XED_REG_R28D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x5 | OUTREG=XED_REG_R29D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x6 | OUTREG=XED_REG_R30D HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x7 | OUTREG=XED_REG_R31D HAS_EGPR=1 xed_reg_enum_t GPR32_X():: -REXX=0 SIBINDEX=0x0 | OUTREG=XED_REG_EAX -REXX=0 SIBINDEX=0x1 | OUTREG=XED_REG_ECX -REXX=0 SIBINDEX=0x2 | OUTREG=XED_REG_EDX -REXX=0 SIBINDEX=0x3 | OUTREG=XED_REG_EBX -REXX=0 SIBINDEX=0x4 | OUTREG=XED_REG_INVALID -REXX=0 SIBINDEX=0x5 | OUTREG=XED_REG_EBP -REXX=0 SIBINDEX=0x6 | OUTREG=XED_REG_ESI -REXX=0 SIBINDEX=0x7 | OUTREG=XED_REG_EDI -REXX=1 SIBINDEX=0x0 | OUTREG=XED_REG_R8D -REXX=1 SIBINDEX=0x1 | OUTREG=XED_REG_R9D -REXX=1 SIBINDEX=0x2 | OUTREG=XED_REG_R10D -REXX=1 SIBINDEX=0x3 | OUTREG=XED_REG_R11D -REXX=1 SIBINDEX=0x4 | OUTREG=XED_REG_R12D -REXX=1 SIBINDEX=0x5 | OUTREG=XED_REG_R13D -REXX=1 SIBINDEX=0x6 | OUTREG=XED_REG_R14D -REXX=1 SIBINDEX=0x7 | OUTREG=XED_REG_R15D - +REXX4=0 REXX=0 SIBINDEX=0x0 | OUTREG=XED_REG_EAX +REXX4=0 REXX=0 SIBINDEX=0x1 | OUTREG=XED_REG_ECX +REXX4=0 REXX=0 SIBINDEX=0x2 | OUTREG=XED_REG_EDX +REXX4=0 REXX=0 SIBINDEX=0x3 | OUTREG=XED_REG_EBX +REXX4=0 REXX=0 SIBINDEX=0x4 | OUTREG=XED_REG_INVALID +REXX4=0 REXX=0 SIBINDEX=0x5 | OUTREG=XED_REG_EBP +REXX4=0 REXX=0 SIBINDEX=0x6 | OUTREG=XED_REG_ESI +REXX4=0 REXX=0 SIBINDEX=0x7 | OUTREG=XED_REG_EDI +REXX4=0 REXX=1 SIBINDEX=0x0 | OUTREG=XED_REG_R8D +REXX4=0 REXX=1 SIBINDEX=0x1 | OUTREG=XED_REG_R9D +REXX4=0 REXX=1 SIBINDEX=0x2 | OUTREG=XED_REG_R10D +REXX4=0 REXX=1 SIBINDEX=0x3 | OUTREG=XED_REG_R11D +REXX4=0 REXX=1 SIBINDEX=0x4 | OUTREG=XED_REG_R12D +REXX4=0 REXX=1 SIBINDEX=0x5 | OUTREG=XED_REG_R13D +REXX4=0 REXX=1 SIBINDEX=0x6 | OUTREG=XED_REG_R14D +REXX4=0 REXX=1 SIBINDEX=0x7 | OUTREG=XED_REG_R15D +#EGPRs +REXX4=1 REXX=0 SIBINDEX=0x0 | OUTREG=XED_REG_R16D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x1 | OUTREG=XED_REG_R17D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x2 | OUTREG=XED_REG_R18D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x3 | OUTREG=XED_REG_R19D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x4 | OUTREG=XED_REG_R20D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x5 | OUTREG=XED_REG_R21D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x6 | OUTREG=XED_REG_R22D HAS_EGPR=1 +REXX4=1 REXX=0 SIBINDEX=0x7 | OUTREG=XED_REG_R23D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x0 | OUTREG=XED_REG_R24D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x1 | OUTREG=XED_REG_R25D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x2 | OUTREG=XED_REG_R26D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x3 | OUTREG=XED_REG_R27D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x4 | OUTREG=XED_REG_R28D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x5 | OUTREG=XED_REG_R29D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x6 | OUTREG=XED_REG_R30D HAS_EGPR=1 +REXX4=1 REXX=1 SIBINDEX=0x7 | OUTREG=XED_REG_R31D HAS_EGPR=1 ############################# xed_reg_enum_t GPR16_R():: -REXR=0 REG=0x0 | OUTREG=XED_REG_AX -REXR=0 REG=0x1 | OUTREG=XED_REG_CX -REXR=0 REG=0x2 | OUTREG=XED_REG_DX -REXR=0 REG=0x3 | OUTREG=XED_REG_BX -REXR=0 REG=0x4 | OUTREG=XED_REG_SP -REXR=0 REG=0x5 | OUTREG=XED_REG_BP -REXR=0 REG=0x6 | OUTREG=XED_REG_SI -REXR=0 REG=0x7 | OUTREG=XED_REG_DI -REXR=1 REG=0x0 | OUTREG=XED_REG_R8W -REXR=1 REG=0x1 | OUTREG=XED_REG_R9W -REXR=1 REG=0x2 | OUTREG=XED_REG_R10W -REXR=1 REG=0x3 | OUTREG=XED_REG_R11W -REXR=1 REG=0x4 | OUTREG=XED_REG_R12W -REXR=1 REG=0x5 | OUTREG=XED_REG_R13W -REXR=1 REG=0x6 | OUTREG=XED_REG_R14W -REXR=1 REG=0x7 | OUTREG=XED_REG_R15W - +REXR4=0 REXR=0 REG=0x0 | OUTREG=XED_REG_AX +REXR4=0 REXR=0 REG=0x1 | OUTREG=XED_REG_CX +REXR4=0 REXR=0 REG=0x2 | OUTREG=XED_REG_DX +REXR4=0 REXR=0 REG=0x3 | OUTREG=XED_REG_BX +REXR4=0 REXR=0 REG=0x4 | OUTREG=XED_REG_SP +REXR4=0 REXR=0 REG=0x5 | OUTREG=XED_REG_BP +REXR4=0 REXR=0 REG=0x6 | OUTREG=XED_REG_SI +REXR4=0 REXR=0 REG=0x7 | OUTREG=XED_REG_DI +REXR4=0 REXR=1 REG=0x0 | OUTREG=XED_REG_R8W +REXR4=0 REXR=1 REG=0x1 | OUTREG=XED_REG_R9W +REXR4=0 REXR=1 REG=0x2 | OUTREG=XED_REG_R10W +REXR4=0 REXR=1 REG=0x3 | OUTREG=XED_REG_R11W +REXR4=0 REXR=1 REG=0x4 | OUTREG=XED_REG_R12W +REXR4=0 REXR=1 REG=0x5 | OUTREG=XED_REG_R13W +REXR4=0 REXR=1 REG=0x6 | OUTREG=XED_REG_R14W +REXR4=0 REXR=1 REG=0x7 | OUTREG=XED_REG_R15W +#EGPRs +REXR4=1 REXR=0 REG=0x0 | OUTREG=XED_REG_R16W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x1 | OUTREG=XED_REG_R17W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x2 | OUTREG=XED_REG_R18W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x3 | OUTREG=XED_REG_R19W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x4 | OUTREG=XED_REG_R20W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x5 | OUTREG=XED_REG_R21W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x6 | OUTREG=XED_REG_R22W HAS_EGPR=1 +REXR4=1 REXR=0 REG=0x7 | OUTREG=XED_REG_R23W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x0 | OUTREG=XED_REG_R24W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x1 | OUTREG=XED_REG_R25W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x2 | OUTREG=XED_REG_R26W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x3 | OUTREG=XED_REG_R27W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x4 | OUTREG=XED_REG_R28W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x5 | OUTREG=XED_REG_R29W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x6 | OUTREG=XED_REG_R30W HAS_EGPR=1 +REXR4=1 REXR=1 REG=0x7 | OUTREG=XED_REG_R31W HAS_EGPR=1 xed_reg_enum_t GPR16_B():: -REXB=0 RM=0x0 | OUTREG=XED_REG_AX -REXB=0 RM=0x1 | OUTREG=XED_REG_CX -REXB=0 RM=0x2 | OUTREG=XED_REG_DX -REXB=0 RM=0x3 | OUTREG=XED_REG_BX -REXB=0 RM=0x4 | OUTREG=XED_REG_SP -REXB=0 RM=0x5 | OUTREG=XED_REG_BP -REXB=0 RM=0x6 | OUTREG=XED_REG_SI -REXB=0 RM=0x7 | OUTREG=XED_REG_DI -REXB=1 RM=0x0 | OUTREG=XED_REG_R8W -REXB=1 RM=0x1 | OUTREG=XED_REG_R9W -REXB=1 RM=0x2 | OUTREG=XED_REG_R10W -REXB=1 RM=0x3 | OUTREG=XED_REG_R11W -REXB=1 RM=0x4 | OUTREG=XED_REG_R12W -REXB=1 RM=0x5 | OUTREG=XED_REG_R13W -REXB=1 RM=0x6 | OUTREG=XED_REG_R14W -REXB=1 RM=0x7 | OUTREG=XED_REG_R15W +REXB4=0 REXB=0 RM=0x0 | OUTREG=XED_REG_AX +REXB4=0 REXB=0 RM=0x1 | OUTREG=XED_REG_CX +REXB4=0 REXB=0 RM=0x2 | OUTREG=XED_REG_DX +REXB4=0 REXB=0 RM=0x3 | OUTREG=XED_REG_BX +REXB4=0 REXB=0 RM=0x4 | OUTREG=XED_REG_SP +REXB4=0 REXB=0 RM=0x5 | OUTREG=XED_REG_BP +REXB4=0 REXB=0 RM=0x6 | OUTREG=XED_REG_SI +REXB4=0 REXB=0 RM=0x7 | OUTREG=XED_REG_DI +REXB4=0 REXB=1 RM=0x0 | OUTREG=XED_REG_R8W +REXB4=0 REXB=1 RM=0x1 | OUTREG=XED_REG_R9W +REXB4=0 REXB=1 RM=0x2 | OUTREG=XED_REG_R10W +REXB4=0 REXB=1 RM=0x3 | OUTREG=XED_REG_R11W +REXB4=0 REXB=1 RM=0x4 | OUTREG=XED_REG_R12W +REXB4=0 REXB=1 RM=0x5 | OUTREG=XED_REG_R13W +REXB4=0 REXB=1 RM=0x6 | OUTREG=XED_REG_R14W +REXB4=0 REXB=1 RM=0x7 | OUTREG=XED_REG_R15W +#EGPRs +REXB4=1 REXB=0 RM=0x0 | OUTREG=XED_REG_R16W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x1 | OUTREG=XED_REG_R17W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x2 | OUTREG=XED_REG_R18W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x3 | OUTREG=XED_REG_R19W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x4 | OUTREG=XED_REG_R20W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x5 | OUTREG=XED_REG_R21W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x6 | OUTREG=XED_REG_R22W HAS_EGPR=1 +REXB4=1 REXB=0 RM=0x7 | OUTREG=XED_REG_R23W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x0 | OUTREG=XED_REG_R24W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x1 | OUTREG=XED_REG_R25W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x2 | OUTREG=XED_REG_R26W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x3 | OUTREG=XED_REG_R27W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x4 | OUTREG=XED_REG_R28W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x5 | OUTREG=XED_REG_R29W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x6 | OUTREG=XED_REG_R30W HAS_EGPR=1 +REXB4=1 REXB=1 RM=0x7 | OUTREG=XED_REG_R31W HAS_EGPR=1 xed_reg_enum_t GPR16_SB():: -REXB=0 SRM=0x0 | OUTREG=XED_REG_AX -REXB=0 SRM=0x1 | OUTREG=XED_REG_CX -REXB=0 SRM=0x2 | OUTREG=XED_REG_DX -REXB=0 SRM=0x3 | OUTREG=XED_REG_BX -REXB=0 SRM=0x4 | OUTREG=XED_REG_SP -REXB=0 SRM=0x5 | OUTREG=XED_REG_BP -REXB=0 SRM=0x6 | OUTREG=XED_REG_SI -REXB=0 SRM=0x7 | OUTREG=XED_REG_DI -REXB=1 SRM=0x0 | OUTREG=XED_REG_R8W -REXB=1 SRM=0x1 | OUTREG=XED_REG_R9W -REXB=1 SRM=0x2 | OUTREG=XED_REG_R10W -REXB=1 SRM=0x3 | OUTREG=XED_REG_R11W -REXB=1 SRM=0x4 | OUTREG=XED_REG_R12W -REXB=1 SRM=0x5 | OUTREG=XED_REG_R13W -REXB=1 SRM=0x6 | OUTREG=XED_REG_R14W -REXB=1 SRM=0x7 | OUTREG=XED_REG_R15W - +REXB4=0 REXB=0 SRM=0x0 | OUTREG=XED_REG_AX +REXB4=0 REXB=0 SRM=0x1 | OUTREG=XED_REG_CX +REXB4=0 REXB=0 SRM=0x2 | OUTREG=XED_REG_DX +REXB4=0 REXB=0 SRM=0x3 | OUTREG=XED_REG_BX +REXB4=0 REXB=0 SRM=0x4 | OUTREG=XED_REG_SP +REXB4=0 REXB=0 SRM=0x5 | OUTREG=XED_REG_BP +REXB4=0 REXB=0 SRM=0x6 | OUTREG=XED_REG_SI +REXB4=0 REXB=0 SRM=0x7 | OUTREG=XED_REG_DI +REXB4=0 REXB=1 SRM=0x0 | OUTREG=XED_REG_R8W +REXB4=0 REXB=1 SRM=0x1 | OUTREG=XED_REG_R9W +REXB4=0 REXB=1 SRM=0x2 | OUTREG=XED_REG_R10W +REXB4=0 REXB=1 SRM=0x3 | OUTREG=XED_REG_R11W +REXB4=0 REXB=1 SRM=0x4 | OUTREG=XED_REG_R12W +REXB4=0 REXB=1 SRM=0x5 | OUTREG=XED_REG_R13W +REXB4=0 REXB=1 SRM=0x6 | OUTREG=XED_REG_R14W +REXB4=0 REXB=1 SRM=0x7 | OUTREG=XED_REG_R15W +#EGPRs +REXB4=1 REXB=0 SRM=0x0 | OUTREG=XED_REG_R16W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x1 | OUTREG=XED_REG_R17W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x2 | OUTREG=XED_REG_R18W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x3 | OUTREG=XED_REG_R19W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x4 | OUTREG=XED_REG_R20W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x5 | OUTREG=XED_REG_R21W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x6 | OUTREG=XED_REG_R22W HAS_EGPR=1 +REXB4=1 REXB=0 SRM=0x7 | OUTREG=XED_REG_R23W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x0 | OUTREG=XED_REG_R24W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x1 | OUTREG=XED_REG_R25W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x2 | OUTREG=XED_REG_R26W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x3 | OUTREG=XED_REG_R27W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x4 | OUTREG=XED_REG_R28W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x5 | OUTREG=XED_REG_R29W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x6 | OUTREG=XED_REG_R30W HAS_EGPR=1 +REXB4=1 REXB=1 SRM=0x7 | OUTREG=XED_REG_R31W HAS_EGPR=1 ############################# @@ -423,59 +669,62 @@ REXB=1 SRM=0x7 | OUTREG=XED_REG_R15W ###########################a xed_reg_enum_t CR_R():: -REXR=0 REG=0x0 | OUTREG=XED_REG_CR0 -REXR=0 REG=0x1 | OUTREG=XED_REG_ERROR enc -REXR=0 REG=0x2 | OUTREG=XED_REG_CR2 -REXR=0 REG=0x3 | OUTREG=XED_REG_CR3 -REXR=0 REG=0x4 | OUTREG=XED_REG_CR4 -REXR=0 REG=0x5 | OUTREG=XED_REG_ERROR -REXR=0 REG=0x6 | OUTREG=XED_REG_ERROR -REXR=0 REG=0x7 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x0 | OUTREG=XED_REG_CR8 -REXR=1 REG=0x1 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x2 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x3 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x4 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x5 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x6 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x7 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=0 REG=0x0 | OUTREG=XED_REG_CR0 +REXR4=0 REXR=0 REG=0x1 | OUTREG=XED_REG_ERROR enc +REXR4=0 REXR=0 REG=0x2 | OUTREG=XED_REG_CR2 +REXR4=0 REXR=0 REG=0x3 | OUTREG=XED_REG_CR3 +REXR4=0 REXR=0 REG=0x4 | OUTREG=XED_REG_CR4 +REXR4=0 REXR=0 REG=0x5 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=0 REG=0x6 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=0 REG=0x7 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x0 | OUTREG=XED_REG_CR8 +REXR4=0 REXR=1 REG=0x1 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x2 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x3 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x4 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x5 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x6 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x7 | OUTREG=XED_REG_ERROR +REXR4=1 | OUTREG=XED_REG_ERROR # FIXME: not used xed_reg_enum_t CR_B():: -REXB=0 RM=0x0 | OUTREG=XED_REG_CR0 -REXB=0 RM=0x1 | OUTREG=XED_REG_ERROR enc -REXB=0 RM=0x2 | OUTREG=XED_REG_CR2 -REXB=0 RM=0x3 | OUTREG=XED_REG_CR3 -REXB=0 RM=0x4 | OUTREG=XED_REG_CR4 -REXB=0 RM=0x5 | OUTREG=XED_REG_ERROR -REXB=0 RM=0x6 | OUTREG=XED_REG_ERROR -REXB=0 RM=0x7 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x0 | OUTREG=XED_REG_CR8 -REXB=1 RM=0x1 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x2 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x3 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x4 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x5 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x6 | OUTREG=XED_REG_ERROR -REXB=1 RM=0x7 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=0 RM=0x0 | OUTREG=XED_REG_CR0 +REXR4=0 REXB=0 RM=0x1 | OUTREG=XED_REG_ERROR enc +REXR4=0 REXB=0 RM=0x2 | OUTREG=XED_REG_CR2 +REXR4=0 REXB=0 RM=0x3 | OUTREG=XED_REG_CR3 +REXR4=0 REXB=0 RM=0x4 | OUTREG=XED_REG_CR4 +REXR4=0 REXB=0 RM=0x5 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=0 RM=0x6 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=0 RM=0x7 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x0 | OUTREG=XED_REG_CR8 +REXR4=0 REXB=1 RM=0x1 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x2 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x3 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x4 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x5 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x6 | OUTREG=XED_REG_ERROR +REXR4=0 REXB=1 RM=0x7 | OUTREG=XED_REG_ERROR +REXR4=1 | OUTREG=XED_REG_ERROR ######################## xed_reg_enum_t DR_R():: -REXR=0 REG=0x0 | OUTREG=XED_REG_DR0 -REXR=0 REG=0x1 | OUTREG=XED_REG_DR1 -REXR=0 REG=0x2 | OUTREG=XED_REG_DR2 -REXR=0 REG=0x3 | OUTREG=XED_REG_DR3 -REXR=0 REG=0x4 | OUTREG=XED_REG_DR4 -REXR=0 REG=0x5 | OUTREG=XED_REG_DR5 -REXR=0 REG=0x6 | OUTREG=XED_REG_DR6 -REXR=0 REG=0x7 | OUTREG=XED_REG_DR7 -REXR=1 REG=0x0 | OUTREG=XED_REG_ERROR enc -REXR=1 REG=0x1 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x2 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x3 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x4 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x5 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x6 | OUTREG=XED_REG_ERROR -REXR=1 REG=0x7 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=0 REG=0x0 | OUTREG=XED_REG_DR0 +REXR4=0 REXR=0 REG=0x1 | OUTREG=XED_REG_DR1 +REXR4=0 REXR=0 REG=0x2 | OUTREG=XED_REG_DR2 +REXR4=0 REXR=0 REG=0x3 | OUTREG=XED_REG_DR3 +REXR4=0 REXR=0 REG=0x4 | OUTREG=XED_REG_DR4 +REXR4=0 REXR=0 REG=0x5 | OUTREG=XED_REG_DR5 +REXR4=0 REXR=0 REG=0x6 | OUTREG=XED_REG_DR6 +REXR4=0 REXR=0 REG=0x7 | OUTREG=XED_REG_DR7 +REXR4=0 REXR=1 REG=0x0 | OUTREG=XED_REG_ERROR enc +REXR4=0 REXR=1 REG=0x1 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x2 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x3 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x4 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x5 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x6 | OUTREG=XED_REG_ERROR +REXR4=0 REXR=1 REG=0x7 | OUTREG=XED_REG_ERROR +REXR4=1 | OUTREG=XED_REG_ERROR diff --git a/datafiles/xed-regs.txt b/datafiles/xed-regs.txt index f26826da..23206473 100644 --- a/datafiles/xed-regs.txt +++ b/datafiles/xed-regs.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -110,6 +110,87 @@ R15D gpr 32 R15/R15D 15 R15W gpr 16 R15/R15D 15 R15B gpr 8 R15/R15D 15 +##### EGPRs ##### +R16 gpr 64 R16 16 +R16D gpr 32 R16/R16D 16 +R16W gpr 16 R16/R16D 16 +R16B gpr 8 R16/R16D 16 + +R17 gpr 64 R17 17 +R17D gpr 32 R17/R17D 17 +R17W gpr 16 R17/R17D 17 +R17B gpr 8 R17/R17D 17 + +R18 gpr 64 R18 18 +R18D gpr 32 R18/R18D 18 +R18W gpr 16 R18/R18D 18 +R18B gpr 8 R18/R18D 18 + +R19 gpr 64 R19 19 +R19D gpr 32 R19/R19D 19 +R19W gpr 16 R19/R19D 19 +R19B gpr 8 R19/R19D 19 + +R20 gpr 64 R20 20 +R20D gpr 32 R20/R20D 20 +R20W gpr 16 R20/R20D 20 +R20B gpr 8 R20/R20D 20 + +R21 gpr 64 R21 21 +R21D gpr 32 R21/R21D 21 +R21W gpr 16 R21/R21D 21 +R21B gpr 8 R21/R21D 21 + +R22 gpr 64 R22 22 +R22D gpr 32 R22/R22D 22 +R22W gpr 16 R22/R22D 22 +R22B gpr 8 R22/R22D 22 + +R23 gpr 64 R23 23 +R23D gpr 32 R23/R23D 23 +R23W gpr 16 R23/R23D 23 +R23B gpr 8 R23/R23D 23 + +R24 gpr 64 R24 24 +R24D gpr 32 R24/R24D 24 +R24W gpr 16 R24/R24D 24 +R24B gpr 8 R24/R24D 24 + +R25 gpr 64 R25 25 +R25D gpr 32 R25/R25D 25 +R25W gpr 16 R25/R25D 25 +R25B gpr 8 R25/R25D 25 + +R26 gpr 64 R26 26 +R26D gpr 32 R26/R26D 26 +R26W gpr 16 R26/R26D 26 +R26B gpr 8 R26/R26D 26 + +R27 gpr 64 R27 27 +R27D gpr 32 R27/R27D 27 +R27W gpr 16 R27/R27D 27 +R27B gpr 8 R27/R27D 27 + +R28 gpr 64 R28 28 +R28D gpr 32 R28/R28D 28 +R28W gpr 16 R28/R28D 28 +R28B gpr 8 R28/R28D 28 + +R29 gpr 64 R29 29 +R29D gpr 32 R29/R29D 29 +R29W gpr 16 R29/R29D 29 +R29B gpr 8 R29/R29D 29 + +R30 gpr 64 R30 30 +R30D gpr 32 R30/R30D 30 +R30W gpr 16 R30/R30D 30 +R30B gpr 8 R30/R30D 30 + +R31 gpr 64 R31 31 +R31D gpr 32 R31/R31D 31 +R31W gpr 16 R31/R31D 31 +R31B gpr 8 R31/R31D 31 +################################## RIP ip 64 RIP EIP ip 32 RIP/EIP diff --git a/datafiles/xed-state-bits.txt b/datafiles/xed-state-bits.txt index 9e2a2a2f..4ceec609 100644 --- a/datafiles/xed-state-bits.txt +++ b/datafiles/xed-state-bits.txt @@ -60,13 +60,20 @@ rexb_prefix REXB=1 rexx_prefix REXX=1 rexr_prefix REXR=1 - rexw_prefix REXW=1 # Legacy encoding space norexw_prefix REXW=0 # Legacy encoding space W1 REXW=1 SKIP_OSZ=1 W0 REXW=0 SKIP_OSZ=1 -norexb_prefix REXB=0 +rexb4_prefix REXB4=1 + +norexb_prefix REXB=0 +norexb4_prefix REXB4=0 + +rex2_refining_prefix REX2=1 +norex2_prefix REX2=0 + + ############################################################3333 f2_prefix REP=2 # REPNZ, REPNE f3_prefix REP=3 # REPZ, REPE diff --git a/datafiles/xsavec/xsavec-isa.txt b/datafiles/xsavec/xsavec-isa.txt index f81ba036..bbb2e160 100644 --- a/datafiles/xsavec/xsavec-isa.txt +++ b/datafiles/xsavec/xsavec-isa.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,7 +24,7 @@ CATEGORY : XSAVE EXTENSION : XSAVEC COMMENT : Variable length store and conditional reg read. does not read header ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() norexw_prefix no_refining_prefix XSAVE() +PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() norexw_prefix no_refining_prefix norex2_prefix OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -37,7 +37,7 @@ CATEGORY : XSAVE EXTENSION : XSAVEC COMMENT : Variable length store and conditional reg read. does not read header ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() rexw_prefix no_refining_prefix XSAVE() +PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b100] RM[nnn] MODRM() rexw_prefix no_refining_prefix norex2_prefix OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } diff --git a/datafiles/xsaveopt/xsaveopt-isa.txt b/datafiles/xsaveopt/xsaveopt-isa.txt index d9bbd378..7dd7dbd6 100644 --- a/datafiles/xsaveopt/xsaveopt-isa.txt +++ b/datafiles/xsaveopt/xsaveopt-isa.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,7 +24,7 @@ CATEGORY : XSAVEOPT EXTENSION : XSAVEOPT ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX COMMENT : Variable length Store and conditional reg read. reads/modifies header. -PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b110] RM[nnn] no_refining_prefix norexw_prefix MODRM() XSAVE() +PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b110] RM[nnn] no_refining_prefix norex2_prefix norexw_prefix MODRM() #FIXME 2007-06-25 need a meaningful width code for XSAVE/XSAVEOPT/XRSTOR OPERANDS : MEM0:rw:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -37,7 +37,7 @@ CATEGORY : XSAVEOPT EXTENSION : XSAVEOPT ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX COMMENT : Variable length Store and conditional reg read. reads/modifies header. -PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b110] RM[nnn] no_refining_prefix rexw_prefix MODRM() XSAVE() +PATTERN : 0x0F 0xAE MOD[mm] MOD!=3 REG[0b110] RM[nnn] no_refining_prefix norex2_prefix rexw_prefix MODRM() #FIXME 2007-06-25 need a meaningful width code for XSAVE/XSAVEOPT/XRSTOR OPERANDS : MEM0:rw:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } diff --git a/datafiles/xsaves/xsaves-isa.txt b/datafiles/xsaves/xsaves-isa.txt index d47a70ec..d2667329 100644 --- a/datafiles/xsaves/xsaves-isa.txt +++ b/datafiles/xsaves/xsaves-isa.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,7 +24,7 @@ CATEGORY : XSAVE EXTENSION : XSAVES COMMENT : variable length store and conditional reg read. does not read header ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() norexw_prefix no_refining_prefix XSAVE() +PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() norexw_prefix no_refining_prefix norex2_prefix OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -36,7 +36,7 @@ CATEGORY : XSAVE EXTENSION : XSAVES COMMENT : variable length store and conditional reg read. does not read header ATTRIBUTES : xmm_state_r REQUIRES_ALIGNMENT x87_mmx_state_r NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() rexw_prefix no_refining_prefix XSAVE() +PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b101] RM[nnn] MODRM() rexw_prefix no_refining_prefix norex2_prefix OPERANDS : MEM0:w:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -51,7 +51,7 @@ CATEGORY : XSAVE EXTENSION : XSAVES COMMENT : variable length load and conditional reg write. ATTRIBUTES : xmm_state_w REQUIRES_ALIGNMENT x87_mmx_state_w NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() norexw_prefix no_refining_prefix XSAVE() +PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() norexw_prefix no_refining_prefix norex2_prefix OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } @@ -63,7 +63,7 @@ CATEGORY : XSAVE EXTENSION : XSAVES COMMENT : variable length load and conditional reg write ATTRIBUTES : xmm_state_w REQUIRES_ALIGNMENT x87_mmx_state_w NOTSX SPECIAL_AGEN_REQUIRED -PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() rexw_prefix no_refining_prefix XSAVE() +PATTERN : 0x0F 0xC7 MOD[mm] MOD!=3 REG[0b011] RM[nnn] MODRM() rexw_prefix no_refining_prefix norex2_prefix OPERANDS : MEM0:r:mxsave REG0=XED_REG_EDX:r:SUPP REG1=XED_REG_EAX:r:SUPP REG2=XED_REG_XCR0:r:SUPP } diff --git a/docsrc/xed-doc-top.txt b/docsrc/xed-doc-top.txt index 3d350e2b..b5549ba9 100644 --- a/docsrc/xed-doc-top.txt +++ b/docsrc/xed-doc-top.txt @@ -695,7 +695,7 @@ in the #xed_encoder_request_t.
  1. operand kind - (XED_OPERAND_{AGEN,MEM0,MEM1,IMM0,IMM1,RELBR,PTR,REG0...REG15} + (XED_OPERAND_{AGEN,MEM0,MEM1,IMM0,IMM1,RELBR,ABSBR,PTR,REG0...REG15}
  2. operand order
    xed_encoder_request_set_operand_order(&req,operand_index, XED_OPERAND_*); diff --git a/examples/udhelp.cpp b/examples/udhelp.cpp index 0ecb1698..b3991ea6 100644 --- a/examples/udhelp.cpp +++ b/examples/udhelp.cpp @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2021 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -54,8 +54,8 @@ BOOL CALLBACK dbg_help_client_t::enum_sym( xst_add_global_symbol(&pthis->sym_tab, addr, xed_strdup(pSymInfo->Name)); - return TRUE; (void)SymbolSize; //pacify compiler warning about unused param + return TRUE; } diff --git a/examples/xed-asmparse-main.c b/examples/xed-asmparse-main.c index c05d500a..e61bda22 100644 --- a/examples/xed-asmparse-main.c +++ b/examples/xed-asmparse-main.c @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2021 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,6 +32,9 @@ static xed_uint_t intel_asm_emits=0; static xed_bool_t test_has_relbr(const xed_inst_t* p); static xed_bool_t has_relbr(xed_iclass_enum_t iclass); +static xed_bool_t test_has_absbr(const xed_inst_t* p); +static xed_bool_t has_absbr(xed_iclass_enum_t iclass); + static void delete_string_list(xed_str_list_t* h) { // clean up memory allocated @@ -344,9 +347,9 @@ static int process_rc_sae(char const* s,xed_encoder_operand_t* operand, xed_uint } #endif asp_error_printf("Unhandled decorator: %s\n",s); + (void) operand; (void) pos; exit(1); return 0; - (void) operand; (void) pos; } @@ -546,6 +549,11 @@ static void process_operand(xed_enc_line_parsed_t* v, check_too_many_operands(i); operands[i++] = xed_relbr(literal_val, nbits); } + else if (has_absbr(v->iclass_e)) { + asp_dbg_printf("The literal is treated as absolute branch\n"); + check_too_many_operands(i); + operands[i++] = xed_absbr(literal_val, nbits); + } else { // literal immediate if (*has_imm0 == 0) { check_too_many_operands(i); @@ -971,22 +979,47 @@ static xed_bool_t test_has_relbr(const xed_inst_t* p) { return 0; } -/* relbr_table is an array initialized at startup that tells us if we have - * a relative branch displacement */ -static xed_bool_t relbr_table[XED_ICLASS_LAST]; +/* Return true if the instruction accepts absolute branch as an operand */ +static xed_bool_t test_has_absbr(const xed_inst_t* p) { + const unsigned noperands = xed_inst_noperands(p); + for (unsigned i = 0; i < noperands; i++) { + const xed_operand_t* o = xed_inst_operand(p, i); + if (xed_operand_name(o) == XED_OPERAND_ABSBR) { + return 1; + } + } + return 0; +} + +/* brdisp_table is an array initialized at startup that tells us if we have + * an absolute or a relative branch displacement */ +static xed_encoder_operand_type_t brdisp_table[XED_ICLASS_LAST]; static xed_bool_t has_relbr(xed_iclass_enum_t iclass) { assert(iclass < XED_ICLASS_LAST); - return relbr_table[iclass]; + if (brdisp_table[iclass] == XED_ENCODER_OPERAND_TYPE_REL_BRDISP) + return 1; + return 0; } + +static xed_bool_t has_absbr(xed_iclass_enum_t iclass) { + assert(iclass < XED_ICLASS_LAST); + if (brdisp_table[iclass] == XED_ENCODER_OPERAND_TYPE_ABS_BRDISP) + return 1; + return 0; +} + static void setup(void) { - memset(relbr_table, 0, sizeof(xed_bool_t)*XED_ICLASS_LAST); + memset(brdisp_table, 0, sizeof(xed_bool_t)*XED_ICLASS_LAST); for (unsigned i = 0; i < XED_MAX_INST_TABLE_NODES; i++) { const xed_inst_t *inst = xed_inst_table_base() + i; xed_iclass_enum_t ic = xed_inst_iclass(inst); assert(ic < XED_ICLASS_LAST); - relbr_table[ic] = test_has_relbr(inst); + if (test_has_relbr(inst)) + brdisp_table[ic] = XED_ENCODER_OPERAND_TYPE_REL_BRDISP; + else if (test_has_absbr(inst)) + brdisp_table[ic] = XED_ENCODER_OPERAND_TYPE_ABS_BRDISP; } } diff --git a/examples/xed-dec-print.c b/examples/xed-dec-print.c index b8230ccd..48222f27 100644 --- a/examples/xed-dec-print.c +++ b/examples/xed-dec-print.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -57,6 +57,6 @@ main(int argc, char** argv) return 1; } printf("Decoding error\n"); - return 1; (void) argv; (void)argc; + return 1; } diff --git a/examples/xed-dll-discovery.c b/examples/xed-dll-discovery.c index 86bea9bb..cad2d683 100644 --- a/examples/xed-dll-discovery.c +++ b/examples/xed-dll-discovery.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -116,6 +116,6 @@ int main(int argc, char** argv) { build_map_to_xed(); invert_map(); - return 0; (void) argc; (void) argv; //pacify compiler + return 0; } diff --git a/examples/xed-enc-lang.c b/examples/xed-enc-lang.c index c10ef9c2..3453fe2b 100644 --- a/examples/xed-enc-lang.c +++ b/examples/xed-enc-lang.c @@ -390,7 +390,7 @@ parse_encode_request(ascii_encode_request_t areq) the operands: operand kind (XED_OPERAND_{AGEN,MEM0,MEM1,IMM0,IMM1, - RELBR,PTR,REG0...REG15} + RELBR,ABSBR,PTR,REG0...REG15} operand order @@ -408,19 +408,19 @@ parse_encode_request(ascii_encode_request_t areq) tokens = tokenize(areq.command," "); p = tokens; - for ( ; p ; token_index++, p=p->next ) { + if (p) + { slash_split(p->s, cfirst, csecond); - if(is_empty_buf(cfirst)) - break; - upcase(cfirst); - if (CLIENT_VERBOSE3) - printf( "[%s][%s][%s]\n", p->s, - (!is_empty_buf(cfirst)?cfirst:"NULL"), - (!is_empty_buf(cfirst)?csecond:"NULL")); - - // consumed token, advance & exit - p = p->next; - break; + if (! is_empty_buf(cfirst)) + { + upcase(cfirst); + if (CLIENT_VERBOSE3) + printf("[%s][%s][%s]\n", p->s, + (!is_empty_buf(cfirst)?cfirst:"NULL"), + (!is_empty_buf(cfirst)?csecond:"NULL")); + + p = p->next; // consumed token, advance + } } // we can attempt to override the mode @@ -605,14 +605,14 @@ parse_encode_request(ascii_encode_request_t areq) } - immed_parser_init(&disp,cres_reg, "BRDISP"); + immed_parser_init(&disp,cres_reg, "RELBR"); if (disp.valid) { if (CLIENT_VERBOSE3) printf("Setting displacement value to " XED_FMT_LX "\n", disp.immed_val); xed_encoder_request_set_branch_displacement( &req, - XED_STATIC_CAST(xed_int32_t,disp.immed_val), + XED_STATIC_CAST(xed_int64_t,disp.immed_val), disp.width_bits/8); //FIXME xed_encoder_request_set_operand_order(&req, operand_index, @@ -621,6 +621,22 @@ parse_encode_request(ascii_encode_request_t areq) continue; } + immed_parser_init(&disp,cres_reg, "ABSBR"); + if (disp.valid) { + if (CLIENT_VERBOSE3) + printf("Setting displacement value to " XED_FMT_LX "\n", + disp.immed_val); + xed_encoder_request_set_branch_displacement( + &req, + XED_STATIC_CAST(xed_int64_t,disp.immed_val), + disp.width_bits/8); //FIXME + xed_encoder_request_set_operand_order(&req, + operand_index, + XED_OPERAND_ABSBR); + xed_encoder_request_set_absbr(&req); + continue; + } + immed_parser_init(&ptr_disp,cres_reg, "PTR"); if (ptr_disp.valid) { @@ -629,7 +645,7 @@ parse_encode_request(ascii_encode_request_t areq) ptr_disp.immed_val); xed_encoder_request_set_branch_displacement( &req, - XED_STATIC_CAST(xed_int32_t,ptr_disp.immed_val), + XED_STATIC_CAST(xed_int64_t,ptr_disp.immed_val), ptr_disp.width_bits/8); //FIXME xed_encoder_request_set_operand_order(&req, operand_index, diff --git a/examples/xed-enc2-1.c b/examples/xed-enc2-1.c index 29f374b4..ac1e4ec1 100644 --- a/examples/xed-enc2-1.c +++ b/examples/xed-enc2-1.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -160,7 +160,6 @@ int main(int argc, char** argv) { retval += r; printf("decode returned %d\n",r); #endif - - return retval; (void)argc; (void)argv; + return retval; } diff --git a/examples/xed-enc2-2.c b/examples/xed-enc2-2.c index 8330c29d..943cb460 100644 --- a/examples/xed-enc2-2.c +++ b/examples/xed-enc2-2.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -119,6 +119,6 @@ int main(int argc, char** argv) { retval = decode(output_buffer, enclen); printf("decode returned %d\n",retval); #endif - return retval; (void)argc; (void)argv; + return retval; } diff --git a/examples/xed-enc2-3.c b/examples/xed-enc2-3.c index 3723e7fe..2f6da8f2 100644 --- a/examples/xed-enc2-3.c +++ b/examples/xed-enc2-3.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -108,7 +108,6 @@ int main(int argc, char** argv) { printf("decode returned %d\n\n",r); } } - - return retval; (void)argc; (void)argv; + return retval; } diff --git a/examples/xed-ex1.c b/examples/xed-ex1.c index 38e02e08..1e6decbb 100644 --- a/examples/xed-ex1.c +++ b/examples/xed-ex1.c @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2022 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -27,8 +27,29 @@ END_LEGAL */ #include int main(int argc, char** argv); + +#if defined(XED_APX) +xed_reg_enum_t get_dfv_reg(const xed_decoded_inst_t* xedd){ + /* returns default flag values reg if a decoded instruction uses DFV and INVALID reg otherwise.*/ + const xed_inst_t* inst = xedd->_inst; + const unsigned int noperands = xed_inst_noperands(inst); + unsigned int i; + for( i=0;i= XED_REG_DFV0 && r <= XED_REG_DFV15) + { + return r; + } + } + return XED_REG_INVALID; +} +#endif + void print_misc(xed_decoded_inst_t* xedd) { - xed_uint_t i=0; + xed_uint_t i=0, j=0; const xed_operand_values_t* ov = xed_decoded_inst_operands_const(xedd); const xed_inst_t* xi = xed_decoded_inst_inst(xedd); xed_exception_enum_t e = xed_inst_exception(xi); @@ -65,6 +86,11 @@ void print_misc(xed_decoded_inst_t* xedd) { /* this is any 66 prefix including the above */ printf("ANY 66 PREFIX\n"); } + if (xed3_operand_get_rex2(xedd)) { + /* Legacy instructions with REX2 prefix have no new iforms. This function returns a non-zero + number if REX2 prefix is detected for a Legacy instruction */ + printf("REX2 PREFIX\n"); + } if (xed_decoded_inst_get_attribute(xedd, XED_ATTRIBUTE_RING0)) { printf("RING0 only\n"); @@ -75,6 +101,27 @@ void print_misc(xed_decoded_inst_t* xedd) { } if (xed_decoded_inst_is_broadcast(xedd)) printf("BROADCAST\n"); +#if defined(XED_APX) + if (xed_classify_apx(xedd)) + { + printf("[APX] "); + if (xed_decoded_inst_get_attribute(xedd, XED_ATTRIBUTE_APX_NDD)) { + printf("New-Data-Destination "); + } + if (xed_decoded_inst_get_attribute(xedd, XED_ATTRIBUTE_APX_NF)) { + printf("No-Flags "); + } + if (xed3_operand_get_has_egpr(xedd)) { + /* returns a non-zero number if one of the register/memory-structure operands of a decoded + instruction is an extended GPR(EGPR) (valid for both Legacy and EVEX instructions) */ + printf("Uses-EGPR "); + } + if (xed_decoded_inst_is_apx_zu(xedd)) { + printf("Zero-Upper "); + } + printf("\n"); + } +#endif if (xed_classify_sse(xedd) || xed_classify_avx(xedd) || xed_classify_avx512(xedd) || xed_classify_amx(xedd)) @@ -119,24 +166,33 @@ void print_misc(xed_decoded_inst_t* xedd) { printf("Number of legacy prefixes: %u \n", np); printf("ISA SET: [%s]\n", xed_isa_set_enum_t2str(isaset)); - for(i=0; i> 3) & 0x1, + (dfv_idx >> 2) & 0x1, + (dfv_idx >> 1) & 0x1, + (dfv_idx >> 0) & 0x1); + } +#endif } } @@ -332,21 +401,28 @@ void print_operands(xed_decoded_inst_t* xedd) { // we print memops in a different function xed_strcpy(tbuf, "(see below)"); break; - case XED_OPERAND_PTR: // pointer (always in conjunction with a IMM0) - case XED_OPERAND_RELBR: { // branch displacements - xed_uint_t disp_bits = + case XED_OPERAND_PTR: // pointer (always in conjunction with a IMM0) + case XED_OPERAND_ABSBR: // Absolute branch displacements + case XED_OPERAND_RELBR: { // Relative branch displacements + xed_uint_t disp_bytes = xed_decoded_inst_get_branch_displacement_width(xedd); - if (disp_bits) { - xed_int32_t disp = + if (disp_bytes) { + char buf[40]; + const unsigned int no_leading_zeros=0; + const xed_bool_t lowercase = 1; + xed_uint_t disp_bits = + xed_decoded_inst_get_branch_displacement_width_bits(xedd); + xed_int64_t disp = xed_decoded_inst_get_branch_displacement(xedd); + xed_itoa_hex_ul(buf, disp, disp_bits, no_leading_zeros, 40, lowercase); #if defined (_WIN32) && !defined(PIN_CRT) _snprintf_s(tbuf, TBUFSZ, TBUFSZ, - "BRANCH_DISPLACEMENT_BYTES= %d %08x", - disp_bits,disp); + "BRANCH_DISPLACEMENT_BYTES=%d 0x%s", + disp_bytes,buf); #else snprintf(tbuf, TBUFSZ, - "BRANCH_DISPLACEMENT_BYTES= %d %08x", - disp_bits,disp); + "BRANCH_DISPLACEMENT_BYTES=%d 0x%s", + disp_bytes,buf); #endif } } diff --git a/examples/xed-ex5-enc.c b/examples/xed-ex5-enc.c index 53d31fa6..e33aa68c 100644 --- a/examples/xed-ex5-enc.c +++ b/examples/xed-ex5-enc.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -276,7 +276,7 @@ main(int argc, char** argv) #endif } - return 0; (void) argc; (void) argv; + return 0; } diff --git a/examples/xed-ex9-patch.c b/examples/xed-ex9-patch.c index 18e745d1..0f11d686 100644 --- a/examples/xed-ex9-patch.c +++ b/examples/xed-ex9-patch.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -129,7 +129,7 @@ main(int argc, char** argv) /* patch the displacements or immediates */ - ok = xed_patch_relbr(xedd+0, itext[0], xed_relbr(0x55667788,32)); + ok = xed_patch_brdisp(xedd+0, itext[0], xed_relbr(0x55667788,32)); if (!ok) fprintf(stderr,"Patching failed for 1st instr\n"); ok = xed_patch_disp(xedd+1, itext[1], xed_disp(0x55,8)); @@ -157,7 +157,7 @@ main(int argc, char** argv) else fprintf(stderr,"DISASSEMBLY ERROR\n"); } - return 0; (void) argc; (void) argv; + return 0; } diff --git a/examples/xed-find-special.c b/examples/xed-find-special.c index 0b683de0..dbc3bf39 100644 --- a/examples/xed-find-special.c +++ b/examples/xed-find-special.c @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2021 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -90,7 +90,6 @@ int main(int argc, char** argv) { scan_insts(); - - return 0; (void) argc; (void) argv; //pacify compiler + return 0; } diff --git a/examples/xed-min.c b/examples/xed-min.c index 702de75c..1b514e7f 100644 --- a/examples/xed-min.c +++ b/examples/xed-min.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -63,6 +63,6 @@ int main(int argc, char** argv) { bytes); printf("%d %s\n",(int)bytes, xed_error_enum_t2str(xed_error)); } - return 0; (void) argc; (void) argv; //pacify compiler + return 0; } diff --git a/examples/xed-reps.c b/examples/xed-reps.c index d413065b..0f755633 100644 --- a/examples/xed-reps.c +++ b/examples/xed-reps.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -101,7 +101,7 @@ int main(int argc, char** argv) xed_iclass_enum_t xr = xed_rep_map(norep); r |= xtest(rep[i],xr); } - - return r; (void) argc; (void) argv; //pacify compiler + return r; + } diff --git a/examples/xed-size.c b/examples/xed-size.c index 51e6db46..629b33b5 100644 --- a/examples/xed-size.c +++ b/examples/xed-size.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -27,8 +27,9 @@ int main(int argc, char** argv) { printf("xed_decoded_inst_t %12d\n", (int)sizeof(xed_decoded_inst_t)); printf("xed_inst_t %12d\n", (int)sizeof(xed_inst_t)); printf("xed_operand_t %12d\n", (int)sizeof(xed_operand_t)); - printf("xed_iform_info_t %12d\n", (int)sizeof(xed_iform_info_t)); - return 0; + printf("xed_iform_info_t %12d\n", (int)sizeof(xed_iform_info_t)); (void) argc; (void) argv; //pacify compiler - (void) x; + (void) x; + return 0; + } diff --git a/examples/xed-tables.c b/examples/xed-tables.c index 8f2defe2..f7aed87f 100644 --- a/examples/xed-tables.c +++ b/examples/xed-tables.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -87,7 +87,6 @@ int main(int argc, char** argv) { dump_insts(); - - return 0; (void) argc; (void) argv; //pacify compiler + return 0; } diff --git a/examples/xed.c b/examples/xed.c index 8b588f5e..a71e1e8c 100644 --- a/examples/xed.c +++ b/examples/xed.c @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2022 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -940,10 +940,11 @@ main(int argc, char** argv) #if defined(XED_ENCODER) if (encode_text) free((void*)encode_text); +#else + (void) encode_text; #endif - return 0; (void) obytes; - (void) encode_text; + return 0; #if !defined(XED_DECODER) // pacify the compiler for encoder-only builds: (void) xedd; diff --git a/include/private/xed-decoded-inst-private.h b/include/private/xed-decoded-inst-private.h index 3d26c447..dcd4a27f 100644 --- a/include/private/xed-decoded-inst-private.h +++ b/include/private/xed-decoded-inst-private.h @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2022 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -64,13 +64,13 @@ xed_decoded_inst_inc_length(xed_decoded_inst_t* p) { static XED_INLINE xed_uint32_t xed_phash_invalid(xed_decoded_inst_t* d) { - return 0; (void) d; + return 0; } static XED_INLINE xed_uint32_t xed_phash_invalid_const(const xed_decoded_inst_t* d) { - return 0; (void) d; + return 0; } static XED_INLINE void xed_ild_set_has_modrm(xed_decoded_inst_t* d, xed_uint8_t v) { diff --git a/include/private/xed-ild-extension.h b/include/private/xed-ild-extension.h index 55eedc79..e57922b3 100644 --- a/include/private/xed-ild-extension.h +++ b/include/private/xed-ild-extension.h @@ -26,39 +26,23 @@ END_LEGAL */ #include "xed-operand-accessors.h" #include "xed-ild-enum.h" -#define MAX_PREFIXES_EXT 5 - #define XED_GRAMMAR_MODE_64 2 #define XED_GRAMMAR_MODE_32 1 #define XED_GRAMMAR_MODE_16 0 -void xed_ild_ext_internal_scanner(xed_decoded_inst_t *d); -xed_bool_t xed_ild_ext_opcode_scanner_needed(xed_decoded_inst_t *d); -void xed_ild_ext_finalize(xed_decoded_inst_t *d); -// EVEX void xed_ild_ext_set_ubit(xed_decoded_inst_t *d, xed_uint8_t ubit); -xed_uint8_t xed_ild_ext_set_evex_map(xed_decoded_inst_t* d, xed_uint8_t map); -void xed_ild_ext_finalize_evex(xed_decoded_inst_t *d, xed_uint_t length); static XED_INLINE xed_uint_t xed_ild_ext_mode_64b(xed_decoded_inst_t* d) { return (xed3_operand_get_mode(d) == XED_GRAMMAR_MODE_64); } -static XED_INLINE void xed_ild_ext_too_short(xed_decoded_inst_t* d) -{ - xed3_operand_set_out_of_bytes(d, 1); - if ( xed3_operand_get_max_bytes(d) >= XED_MAX_INSTRUCTION_BYTES) - xed3_operand_set_error(d,XED_ERROR_INSTR_TOO_LONG); - else - xed3_operand_set_error(d,XED_ERROR_BUFFER_TOO_SHORT); -} - -static XED_INLINE void xed_ild_ext_bad_map(xed_decoded_inst_t* d) +#if defined(XED_APX) +static XED_INLINE xed_bool_t xed_ild_ext_apx_supported(xed_decoded_inst_t *d) { - xed3_operand_set_map(d,XED_ILD_MAP_INVALID); - xed3_operand_set_error(d,XED_ERROR_BAD_MAP); + return (!xed3_operand_get_no_apx(d) && xed_ild_ext_mode_64b(d)); } +#endif // XED_APX #endif diff --git a/include/private/xed-ild-private.h b/include/private/xed-ild-private.h index 54470c69..cdc5158c 100644 --- a/include/private/xed-ild-private.h +++ b/include/private/xed-ild-private.h @@ -36,6 +36,9 @@ static XED_INLINE xed_uint_t xed_sib_base(xed_uint8_t m) { return m&7; } static XED_INLINE xed_uint_t bits2bytes(xed_uint_t bits) { return bits>>3; } static XED_INLINE xed_uint_t bytes2bits(xed_uint_t bytes) { return bytes<<3; } +#if defined(XED_APX) +xed_bool_t chip_supports_apx(xed_decoded_inst_t* d); +#endif typedef void(*xed_ild_l1_func_t)(xed_decoded_inst_t*); typedef xed_uint32_t(*xed3_find_func_t)(const xed_decoded_inst_t*); diff --git a/include/private/xed-internal-header-2.h b/include/private/xed-internal-header-2.h index 659835b7..4b6f06d7 100644 --- a/include/private/xed-internal-header-2.h +++ b/include/private/xed-internal-header-2.h @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -48,7 +48,8 @@ END_LEGAL */ #include "xed-flags.h" #include "xed-operand-action.h" #include "xed-cpuid-rec.h" -#include "xed-cpuid-bit-enum.h" +#include "xed-cpuid-rec-enum.h" +#include "xed-cpuid-group-enum.h" struct xed_decoded_inst_s; //fwd-decl diff --git a/include/public/xed/xed-cpuid-rec.h b/include/public/xed/xed-cpuid-rec.h index 576d0875..0d6d6f9b 100644 --- a/include/public/xed/xed-cpuid-rec.h +++ b/include/public/xed/xed-cpuid-rec.h @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -20,35 +20,53 @@ END_LEGAL */ # define XED_CPUID_REC_H #include "xed-types.h" #include "xed-portability.h" -#include "xed-cpuid-bit-enum.h" +#include "xed-cpuid-rec-enum.h" +#include "xed-cpuid-group-enum.h" #include "xed-isa-set-enum.h" typedef struct { - xed_uint32_t leaf; // cpuid leaf - xed_uint32_t subleaf; // cpuid subleaf - xed_uint32_t bit; // the bit number for the feature - xed_reg_enum_t reg; // the register containing the bit (EAX,EBX,ECX,EDX) + xed_uint32_t leaf; // cpuid leaf + xed_uint32_t subleaf; // cpuid subleaf + xed_reg_enum_t reg; // the register containing the bit (EAX,EBX,ECX,EDX) + xed_uint8_t bit_start; // the bit start index for the feature + xed_uint8_t bit_end; // the bit end index for the feature + xed_uint32_t value; // the required feature value } xed_cpuid_rec_t; -#define XED_MAX_CPUID_BITS_PER_ISA_SET (4) +#define XED_MAX_CPUID_GROUPS_PER_ISA_SET (2) +#define XED_MAX_CPUID_RECS_PER_GROUP (4) -/// Returns the name of the i'th cpuid bit associated with this isa-set. +/// Returns the name of the i'th cpuid group associated with this isa-set. /// Call this repeatedly, with 0 <= i < -/// XED_MAX_CPUID_BITS_PER_ISA_SET. Give up when i == -/// XED_MAX_CPUID_BITS_PER_ISA_SET or the return value is -/// XED_CPUID_BIT_INVALID. +/// XED_MAX_CPUID_GROUPS_PER_ISA_SET. Give up when i == +/// XED_MAX_CPUID_GROUPS_PER_ISA_SET or the return value is +/// XED_CPUID_GROUP_INVALID. +/// An ISA-SET is supported by a chip if CPUID match is found for a single CPUID +/// group (OR relationship between groups). XED_DLL_EXPORT -xed_cpuid_bit_enum_t -xed_get_cpuid_bit_for_isa_set(xed_isa_set_enum_t isaset, - xed_uint_t i); +xed_cpuid_group_enum_t +xed_get_cpuid_group_enum_for_isa_set(xed_isa_set_enum_t isaset, + xed_uint_t i); -/// This provides the details of the CPUID bit specification, if the -/// enumeration value is not sufficient. Returns 1 on success and fills in +/// Returns the name of the i'th cpuid record associated with this cpuid group. +/// Call this repeatedly, with 0 <= i < +/// XED_MAX_CPUID_RECS_PER_GROUP. Give up when i == +/// XED_MAX_CPUID_RECS_PER_GROUP or the return value is +/// XED_CPUID_REC_INVALID. +/// A cpuid group is satisfied if all of its cpuid records are +/// set (AND relationship between records). +XED_DLL_EXPORT +xed_cpuid_rec_enum_t +xed_get_cpuid_rec_enum_for_group(xed_cpuid_group_enum_t group, + xed_uint_t i); + +/// This provides the details of the CPUID specification, if the +/// enumeration value is not sufficient. Returns 1 on success and fills in /// the structure pointed to by p. Returns 0 on failure. XED_DLL_EXPORT -xed_int_t -xed_get_cpuid_rec(xed_cpuid_bit_enum_t cpuid_bit, +xed_bool_t +xed_get_cpuid_rec(xed_cpuid_rec_enum_t cpuid_bit, xed_cpuid_rec_t* p); #endif diff --git a/include/public/xed/xed-decoded-inst-api.h b/include/public/xed/xed-decoded-inst-api.h index 469d0ac0..fc007790 100644 --- a/include/public/xed/xed-decoded-inst-api.h +++ b/include/public/xed/xed-decoded-inst-api.h @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2022 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -106,6 +106,11 @@ xed_decoded_inst_is_xrelease(const xed_decoded_inst_t* p); XED_DLL_EXPORT xed_uint32_t xed_decoded_inst_has_mpx_prefix(const xed_decoded_inst_t* p); +/// @ingroup DEC +// Return non-zero value for APX-Promtoed zero-upper instructions +XED_DLL_EXPORT xed_bool_t +xed_decoded_inst_is_apx_zu(const xed_decoded_inst_t* p); + /// @ingroup DEC /// Returns the modrm byte XED_DLL_EXPORT xed_uint8_t @@ -481,7 +486,7 @@ XED_DLL_EXPORT xed_uint_t xed_decoded_inst_get_memory_displacement_width_bits(const xed_decoded_inst_t* p, unsigned int mem_idx); /// @ingroup DEC -XED_DLL_EXPORT xed_int32_t +XED_DLL_EXPORT xed_int64_t xed_decoded_inst_get_branch_displacement(const xed_decoded_inst_t* p); /// @ingroup DEC /// Result in BYTES @@ -615,7 +620,7 @@ xed_decoded_inst_set_memory_displacement(xed_decoded_inst_t* p, /// Set the branch displacement using a BYTE length XED_DLL_EXPORT void xed_decoded_inst_set_branch_displacement(xed_decoded_inst_t* p, - xed_int32_t disp, + xed_int64_t disp, xed_uint_t length_bytes); /// @ingroup DEC /// Set the signed immediate a BYTE length @@ -641,7 +646,7 @@ xed_decoded_inst_set_memory_displacement_bits(xed_decoded_inst_t* p, /// Set the branch displacement a BITS length XED_DLL_EXPORT void xed_decoded_inst_set_branch_displacement_bits(xed_decoded_inst_t* p, - xed_int32_t disp, + xed_int64_t disp, xed_uint_t length_bits); /// @ingroup DEC /// Set the signed immediate a BITS length @@ -678,9 +683,15 @@ xed_decoded_inst_set_user_data(xed_decoded_inst_t* p, /// @name xed_decoded_inst_t Classifiers //@{ /// @ingroup DEC +/// True for APX instructions, includes instructions with EGPRs, REX2 and +/// encodings that are treated as illegal on non-APX systems +XED_DLL_EXPORT xed_bool_t +xed_classify_apx(const xed_decoded_inst_t* d); +/// @ingroup DEC /// True for AMX instructions XED_DLL_EXPORT xed_bool_t xed_classify_amx(const xed_decoded_inst_t* d); +/// @ingroup DEC /// True for AVX512 (EVEX-encoded) SIMD and (VEX encoded) K-mask instructions XED_DLL_EXPORT xed_bool_t xed_classify_avx512(const xed_decoded_inst_t* d); @@ -696,7 +707,6 @@ xed_classify_avx(const xed_decoded_inst_t* d); /// True for SSE/SSE2/etc. SIMD operations. Includes AES and PCLMULQDQ XED_DLL_EXPORT xed_bool_t xed_classify_sse(const xed_decoded_inst_t* d); - //@} #endif diff --git a/include/public/xed/xed-encode.h b/include/public/xed/xed-encode.h index 9188e84d..5171c055 100644 --- a/include/public/xed/xed-encode.h +++ b/include/public/xed/xed-encode.h @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -128,9 +128,11 @@ xed_encoder_request_operand_order_entries(xed_encoder_request_t* p) /// @ingroup ENC XED_DLL_EXPORT void xed_encoder_request_set_relbr(xed_encoder_request_t* p); /// @ingroup ENC +XED_DLL_EXPORT void xed_encoder_request_set_absbr(xed_encoder_request_t* p); +/// @ingroup ENC XED_DLL_EXPORT void xed_encoder_request_set_branch_displacement(xed_encoder_request_t* p, - xed_int32_t brdisp, + xed_int64_t brdisp, xed_uint_t nbytes); /// @ingroup ENC XED_DLL_EXPORT void xed_encoder_request_set_ptr(xed_encoder_request_t* p); diff --git a/include/public/xed/xed-encoder-hl.h b/include/public/xed/xed-encoder-hl.h index fb5f076c..32d4c415 100644 --- a/include/public/xed/xed-encoder-hl.h +++ b/include/public/xed/xed-encoder-hl.h @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2020 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -60,7 +60,8 @@ typedef struct { typedef enum { XED_ENCODER_OPERAND_TYPE_INVALID, - XED_ENCODER_OPERAND_TYPE_BRDISP, + XED_ENCODER_OPERAND_TYPE_REL_BRDISP, + XED_ENCODER_OPERAND_TYPE_ABS_BRDISP, XED_ENCODER_OPERAND_TYPE_REG, XED_ENCODER_OPERAND_TYPE_IMM0, XED_ENCODER_OPERAND_TYPE_SIMM0, @@ -104,7 +105,21 @@ typedef struct { static XED_INLINE xed_encoder_operand_t xed_relbr(xed_int32_t brdisp, xed_uint_t width_bits) { xed_encoder_operand_t o; - o.type = XED_ENCODER_OPERAND_TYPE_BRDISP; + o.type = XED_ENCODER_OPERAND_TYPE_REL_BRDISP; + o.u.brdisp = brdisp; + o.width_bits = width_bits; + return o; +} + +/// @ingroup ENCHL +/// an absolute branch displacement operand +/// @param brdisp The branch displacement +/// @param width_bits The width of the displacement in bits. +/// @returns xed_encoder_operand_t An operand. +static XED_INLINE xed_encoder_operand_t xed_absbr(xed_int32_t brdisp, + xed_uint_t width_bits) { + xed_encoder_operand_t o; + o.type = XED_ENCODER_OPERAND_TYPE_ABS_BRDISP; o.u.brdisp = brdisp; o.width_bits = width_bits; return o; diff --git a/include/public/xed/xed-ild.h b/include/public/xed/xed-ild.h index 72fe0d25..5569718d 100644 --- a/include/public/xed/xed-ild.h +++ b/include/public/xed/xed-ild.h @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. diff --git a/include/public/xed/xed-operand-values-interface.h b/include/public/xed/xed-operand-values-interface.h index 528c3e6b..5c627edf 100644 --- a/include/public/xed/xed-operand-values-interface.h +++ b/include/public/xed/xed-operand-values-interface.h @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2022 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -381,8 +381,8 @@ xed_operand_values_get_branch_displacement_length_bits( const xed_operand_values_t* p); /// @ingroup OPERANDS -XED_DLL_EXPORT xed_int32_t -xed_operand_values_get_branch_displacement_int32(const xed_operand_values_t* p); +XED_DLL_EXPORT xed_int64_t +xed_operand_values_get_branch_displacement_int64(const xed_operand_values_t* p); /// @ingroup OPERANDS XED_DLL_EXPORT xed_uint8_t @@ -456,17 +456,21 @@ xed_operand_values_set_memory_displacement_bits(xed_operand_values_t* p, /// Indicate that we have a relative branch. XED_DLL_EXPORT void xed_operand_values_set_relbr(xed_operand_values_t* p); +/// @ingroup OPERANDS +/// Indicate that we have an absolute branch. +XED_DLL_EXPORT void xed_operand_values_set_absbr(xed_operand_values_t* p); + /// @ingroup OPERANDS /// Set the branch displacement using a BYTES length XED_DLL_EXPORT void xed_operand_values_set_branch_displacement(xed_operand_values_t* p, - xed_int32_t x, + xed_int64_t x, unsigned int len); /// @ingroup OPERANDS /// Set the branch displacement using a BITS length XED_DLL_EXPORT void xed_operand_values_set_branch_displacement_bits(xed_operand_values_t* p, - xed_int32_t x, + xed_int64_t x, unsigned int len_bits); /// @ingroup OPERANDS diff --git a/include/public/xed/xed-patch.h b/include/public/xed/xed-patch.h index 5e48d8de..5d9c180a 100644 --- a/include/public/xed/xed-patch.h +++ b/include/public/xed/xed-patch.h @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -35,7 +35,7 @@ xed_patch_disp(xed_decoded_inst_t* xedd, xed_uint8_t* itext, xed_enc_displacement_t disp); -/// Replace a branch displacement. +/// Replace a relative/absolute branch displacement. /// The widths of original displacement and replacement must match. /// @param xedd A decoded instruction. /// @param itext The corresponding encoder output, byte array. @@ -43,7 +43,7 @@ xed_patch_disp(xed_decoded_inst_t* xedd, /// @returns xed_bool_t 1=success, 0=failure /// @ingroup ENCHLPATCH XED_DLL_EXPORT xed_bool_t -xed_patch_relbr(xed_decoded_inst_t* xedd, +xed_patch_brdisp(xed_decoded_inst_t* xedd, xed_uint8_t* itext, xed_encoder_operand_t disp); diff --git a/misc/API.NAMES.txt b/misc/API.NAMES.txt index f66dc5b2..4063f58c 100644 --- a/misc/API.NAMES.txt +++ b/misc/API.NAMES.txt @@ -2,7 +2,7 @@ str2xed_address_width_enum_t str2xed_attribute_enum_t str2xed_category_enum_t str2xed_chip_enum_t -str2xed_cpuid_bit_enum_t +str2xed_cpuid_rec_enum_t str2xed_error_enum_t str2xed_exception_enum_t str2xed_extension_enum_t @@ -42,8 +42,9 @@ xed_category_enum_t_last xed_chip_enum_t2str xed_chip_enum_t_last xed_convert_to_encoder_request -xed_cpuid_bit_enum_t2str -xed_cpuid_bit_enum_t_last +xed_cpuid_rec_enum_t2str +xed_cpuid_group_enum_t2str +xed_cpuid_rec_enum_t_last xed_decode xed_decoded_inst_conditionally_writes_registers xed_decoded_inst_dump @@ -132,6 +133,7 @@ xed_encoder_request_set_operand_order xed_encoder_request_set_ptr xed_encoder_request_set_reg xed_encoder_request_set_relbr +xed_encoder_request_set_absbr xed_encoder_request_set_rep xed_encoder_request_set_repne xed_encoder_request_set_scale @@ -169,7 +171,8 @@ xed_format_generic xed_format_set_options xed_get_byte xed_get_copyright -xed_get_cpuid_bit_for_isa_set +xed_get_cpuid_group_enum_for_isa_set +xed_get_cpuid_rec_enum_for_group xed_get_cpuid_rec xed_get_largest_enclosing_register xed_get_largest_enclosing_register32 @@ -280,7 +283,7 @@ xed_operand_values_dump xed_operand_values_get_atomic xed_operand_values_get_base_reg xed_operand_values_get_branch_displacement_byte -xed_operand_values_get_branch_displacement_int32 +xed_operand_values_get_branch_displacement_int64 xed_operand_values_get_branch_displacement_length xed_operand_values_get_branch_displacement_length_bits xed_operand_values_get_displacement_for_memop @@ -347,6 +350,7 @@ xed_operand_values_set_memory_operand_length xed_operand_values_set_mode xed_operand_values_set_operand_reg xed_operand_values_set_relbr +xed_operand_values_set_absbr xed_operand_values_set_scale xed_operand_values_set_seg_reg xed_operand_values_using_default_segment @@ -415,7 +419,7 @@ xed_decoded_inst_is_broadcast xed3_get_generic_operand xed3_set_generic_operand xed_patch_imm0 -xed_patch_relbr +xed_patch_brdisp xed_patch_disp xed_enc2_error xed_enc2_set_error_handler diff --git a/pysrc/chipmodel.py b/pysrc/chipmodel.py index 44c811aa..3993dc44 100755 --- a/pysrc/chipmodel.py +++ b/pysrc/chipmodel.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -24,6 +24,7 @@ import enum_txt_writer import codegen import genutil +from typing import List, Tuple, Dict def _die(s): genutil.die(s) @@ -140,7 +141,7 @@ def recursive_expand(d): expand_chip(chip,d) -def read_database(filename): +def read_database(filename) -> Tuple[List[str], Dict[str,str]]: lines = open(filename,'r').readlines() lines = filter_comments(lines) lines = genutil.process_continuations(lines) @@ -211,6 +212,28 @@ def _check_in_instructions_not_chip_hierarchy(isaset_ch, isaset_inst): "but not part of any chip: {}".format(v)) return missing +def get_chip_supports_feature_dict(feature: str, chip2isa: dict) -> dict: + """ + returns a dictionary indicating whether each chip supports the given feature (chip -> feature is supported) + + Args: + feature (str): name of feature (APX, AVX512...) + chip2isa (dict): maps chip to list of features/ISA + + Returns: + dict: keys are the given chips and values indicate whether corresponding chip supports the given feature + """ + feature_support_table = {} + for c in chip2isa.keys(): + supports_feature=False + for f in chip2isa[c]: + if feature in f: + supports_feature=True + break + feature_support_table[c] = '1' if supports_feature else '0' + + return feature_support_table + def work(arg): (chips,chip_features_dict) = read_database(arg.input_file_name) @@ -328,20 +351,18 @@ def work(arg): for i,x in enumerate([s0s, s1s, s2s,s3s, s4s, s5s]): fo.add_code_eol("xed_chip_features[XED_CHIP_{}][{}] = {}".format(c, i, x)) + features = ['AVX512', 'APX'] + # declare tables, where each entry indicates whether the chip supports the corrisponding feature + for feature in features: + cfe.write(f"xed_bool_t xed_chip_supports_{feature.lower()}[XED_CHIP_LAST];\n") + hfe.write(f"extern xed_bool_t xed_chip_supports_{feature.lower()}[XED_CHIP_LAST];\n") + + for feature in features: + # populate the chip support tables with appropriate values then pour into dynamic function + feature_support_table = get_chip_supports_feature_dict(feature, chip_features_dict) + for chip, is_supported in feature_support_table.items(): + fo.add_code_eol(f'xed_chip_supports_{feature.lower()}[XED_CHIP_{chip}]={is_supported}') - # figure out which chips support AVX512 for ILD evex processing - cfe.write("xed_bool_t xed_chip_supports_avx512[XED_CHIP_LAST];\n") - hfe.write("extern xed_bool_t xed_chip_supports_avx512[XED_CHIP_LAST];\n") - for c in chips: - supports_avx512=False - for f in chip_features_dict[c]: - if 'AVX512' in f: - supports_avx512=True - break - v = '1' if supports_avx512 else '0' - fo.add_code_eol('xed_chip_supports_avx512[XED_CHIP_{}]={}'. - format(c, v)) - cfe.write(fo.emit()) hfe.write(fo.emit_header()) cfe.close() diff --git a/pysrc/classifier.py b/pysrc/classifier.py index 47b4f0bb..99e57ba0 100644 --- a/pysrc/classifier.py +++ b/pysrc/classifier.py @@ -24,12 +24,9 @@ import genutil import codegen - -def _emit_function(fe, isa_sets, name): - fo = codegen.function_object_t('xed_classify_{}'.format(name)) - fo.add_arg('const xed_decoded_inst_t* d') - fo.add_code_eol(' const xed_isa_set_enum_t isa_set = xed_decoded_inst_get_isa_set(d)') - # FIXME: 2017-07-14 optimization: could use a static array for faster checking, smaller code +def _emit_isa_switch_cases(fo, isa_sets): + # builds a switch case that catches all of the extension's ISA + # and defaultly returns 0 otherwise switch = codegen.c_switch_generator_t('isa_set', fo) isa_sets_sorted = sorted(isa_sets) for c in isa_sets_sorted: @@ -38,7 +35,40 @@ def _emit_function(fe, isa_sets, name): switch.add('return 1;') switch.add_default(['return 0;'], do_break=False) switch.finish() + +def _emit_apx_classifier(fe, isa_sets): + # adds special checks for APX instructions, as well as the default switch check + fo = codegen.function_object_t('xed_classify_apx') + fo.add_arg('const xed_decoded_inst_t* d') + fo.add_code_eol(' const xed_isa_set_enum_t isa_set = xed_decoded_inst_get_isa_set(d)') + fo.add_comment('REX2 Prefix is detected') + fo.add_code_eol(' if (xed3_operand_get_rex2(d)) return 1') + + fo.add_comment('The instruction has EGPR reg or mem operand (Detects non-APX EVEX instructions)') + fo.add_code_eol(' if (xed3_operand_get_has_egpr(d)) return 1') + + fo.add_comment('APX EVEX bits are set but ignored (e.g. instructions with no MEM/GPR operand)') + fo.add_comment('EVEX.B4 is set') + fo.add_code_eol(' if (xed3_operand_get_rexb4(d)) return 1') + + fo.add_comment('EVEX.X4 is zero (reverted -> logically set)') + fo.add_comment('REXX4 = ~EVEX.X4') + # check XED-ILD for more info + fo.add_code_eol(' if (xed3_operand_get_rexx4(d) && xed3_operand_get_ubit(d)) return 1') + + _emit_isa_switch_cases(fo, isa_sets) + + fo.emit_file_emitter(fe) + + +def _emit_function(fe, isa_sets, name): + # builds a function that indicates whether a decoded instruction's ISA falls + # under the given extension (name) + fo = codegen.function_object_t('xed_classify_{}'.format(name)) + fo.add_arg('const xed_decoded_inst_t* d') + fo.add_code_eol(' const xed_isa_set_enum_t isa_set = xed_decoded_inst_get_isa_set(d)') + _emit_isa_switch_cases(fo, isa_sets) fo.emit_file_emitter(fe) @@ -48,8 +78,8 @@ def find_avx512_insts(agi) -> set: for generator in agi.generator_list: for ii in generator.parser_output.instructions: if genutil.field_check(ii, 'iclass'): - # if the instruction has 512 VL variant or AVX512 prefix - if re.search('^AVX512_|_512$',ii.isa_set): + # if the instruction has 512 VL variant or AVX512 prefix (AVX10 too for now) + if re.search('^AVX(512|10)_|_512$',ii.isa_set): avx512_main_isa.add(ii.isa_set.rsplit('_', 1)[0]) return avx512_main_isa @@ -66,12 +96,15 @@ def work(agi): avx512_isa_sets = set([]) avx512_kmask_op = set([]) amx_isa_sets = set([]) + apx_isa_sets = set() avx512_main_isa = find_avx512_insts(agi) # contains the main forms of AVX512 ISA for generator in agi.generator_list: for ii in generator.parser_output.instructions: if genutil.field_check(ii, 'iclass'): + if re.search('APX',ii.isa_set): + apx_isa_sets.add(ii.isa_set) if re.search('AMX',ii.isa_set): amx_isa_sets.add(ii.isa_set) elif is_avx512_inst(ii.isa_set, avx512_main_isa): @@ -91,12 +124,13 @@ def work(agi): if (not re.search('MMX',ii.isa_set) and not re.search('PREFETCH',ii.isa_set) and not re.search('X87',ii.isa_set) and not re.search('MWAIT',ii.isa_set)): sse_isa_sets.add(ii.isa_set) - + fe = agi.open_file('xed-classifiers.c') # xed_file_emitter_t _emit_function(fe, amx_isa_sets, 'amx') _emit_function(fe, avx512_isa_sets, 'avx512') _emit_function(fe, avx512_kmask_op, 'avx512_maskop') _emit_function(fe, avx_isa_sets, 'avx') _emit_function(fe, sse_isa_sets, 'sse') + _emit_apx_classifier(fe, apx_isa_sets) fe.close() return diff --git a/pysrc/cpuid_rdr.py b/pysrc/cpuid_rdr.py index 4625058c..db96ef1b 100644 --- a/pysrc/cpuid_rdr.py +++ b/pysrc/cpuid_rdr.py @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -15,19 +15,332 @@ # limitations under the License. # #END_LEGAL +from enum import Enum import genutil +from genutil import die +import re +from typing import Dict, List -def read_file(fn): +### Data types ### +class cpuid_record_t: + """ load and report CPUID record """ + + ### CPUID optional string patterns ### + # CPUID common prefix: ... + cpuid_prefix = r"(?P\w+)[.](?P[0-9A-F]+)[.](?P[0-9A-F]+)[.](?P[a-zA-Z]+)" + # CPUID pattern: .... + old_cpuid_pattern = re.compile(cpuid_prefix + r"[.](?P\d+)$") + # CPUID pattern: ...[] + cpuid_bit_pattern = re.compile(cpuid_prefix + r"\[(?P\d+)\]$") + # CPUID pattern: ...[:]= + cpuid_range_pattern = re.compile(cpuid_prefix + r"\[(?P\d+)\:(?P\d+)\]=(?P\d+)$") + + def __init__(self, rec_str:str = ''): + """ init and load from sting if rec_str is not empty """ + self.fname : str = '' # Feature name + self.leaf : str = '' + self.s_leaf : str = '' + self.reg : str = '' + self.bit_start : str = '' + self.bit_end : str = '' + self.value : str = '' # Dec number, Not a bit + if rec_str: self.load_from_str(rec_str) + + def valid_self_members(self) -> bool: + """ Return True if all self.members contains a legal value """ + try: + if all(len(member) for member in vars(self).values()): + valid : bool = True + # Check Leaf/Sub-Leaf (Hexa number >= 0) + inputs = [int(self.leaf, 16), int(self.s_leaf, 16)] + valid &= all(i >= 0 for i in inputs) + # Check reg + valid &= (len(self.reg) == 3) + # Check bit indexes (Dec number in range(0, 32)) + b_start, b_end = int(self.bit_start, 10), int(self.bit_end, 10) + bits = [b_start, b_end] + valid &= all(b in range(0, 32) for b in bits) + valid &= (b_start <= b_end) + # Check value (Dec number with limited bits width) + max_bits = b_end - b_start + 1 + bits_len = int(self.value, 10).bit_length() + valid &= (bits_len <= max_bits) + + return valid + except: + # Main catches are failed string to int(10/16 base) conversion + return False + return False + + def load_from_str(self, rec_str : str) -> bool: + """ + Parse a given cpuid rec_str string and fully load the CPUID information into all self.members. + The function asserts if any self.member was not set as expected. + + Args: + rec_str (str): CPUID string representation in a form of XED config file + + Returns: + bool: True - The loaded record is not empty. + False - The loaded record is empty. + """ + rec_str = rec_str.strip() + if rec_str == 'N/A': + self.fname = self.reg = 'INVALID' + self.leaf = self.s_leaf = self.bit_start = self.bit_end = self.value = '0' + return False + + cpuid_range_def = self.cpuid_range_pattern.match(rec_str) + if cpuid_range_def: + # One value bounded by bits indexes, new syntax + record = cpuid_range_def.groupdict() + for k in record: + setattr(self, k, record[k]) + + cpuid_bit_def = self.cpuid_bit_pattern.match(rec_str) + if cpuid_bit_def: + # One bit, new syntax + record = cpuid_bit_def.groupdict() + for k in record: + setattr(self, k, record[k]) + self.bit_end = self.bit_start + self.value = '1' + + old_cpuid_def = self.old_cpuid_pattern.match(rec_str) + if old_cpuid_def: + # One bit, old syntax + record = old_cpuid_def.groupdict() + for k in record: + setattr(self, k, record[k]) + self.bit_end = self.bit_start + self.value = '1' + + assert self.valid_self_members(), f'[ERROR] load CPUID from "{rec_str}" failed. Record: {self.emit()}' + return True + + def emit(self) -> str: + """emit record's members and values """ + s = '{ ' + for member, val in vars(self).items(): + s += f'{member}={val}, ' + return s.strip(' ,') + ' }' + + def __str__(self): + """Overrides the default implementation""" + # Return non-compacted generic XED format + if not self.valid_self_members() or self.fname == 'INVALID': + return 'N/A' + s = f'{self.fname}.{self.leaf}.{self.s_leaf}.{self.reg}[{self.bit_start}:{self.bit_end}]' + s += f'={self.value}' + return s + + def __eq__(self, other): + """Overrides the default implementation""" + if not isinstance(other, cpuid_record_t): + return False + for member in vars(self): + if getattr(self, member) != getattr(other, member): + return False + return True + +class group_kind_t(Enum): + """ + Enum for XED CPUID group kind + The Enum's value is a sorting key and implies the groups indexing order of + each ISA-SET's CPUID group + """ + AVX10 = 0 # AVX10 (EVEX) CPUID model + FBIT = 1 # Feature bit CPUID model + + @staticmethod + def names(): + return list(map(lambda c: c.name, group_kind_t)) + +DEFAULT_CPUID_GROUP: group_kind_t = group_kind_t.FBIT + + +class group_record_t: + """ + XED CPUID group class + XED ISA-SET can be mapped to several CPUID groups. + CPUID group includes several cpuid records. + CPUID satisfaction of a given isa-set requires that all group's records are set. + If one group was satisfied, the isa-set is supported + (OR relationship between groups, AND relationship between records) + """ + def __init__(self, kind: group_kind_t, isa_set: str): + self.kind: group_kind_t = kind + self.isa_set: str = re.sub(r'^XED_ISA_SET_', '', isa_set) # isa-set's group + self.name: str = self.isa_set + if self.kind != DEFAULT_CPUID_GROUP: + self.name = f'{self.name}_{self.get_kind_name()}' + self.records: List[cpuid_record_t] = [] + + def get_name(self) -> str: + """ Return the group name """ + return self.name + + def get_kind_name(self) -> str: + """ Return the group's kind (group_kind_t) name """ + return self.kind.name + + def get_sort_key(self) -> int: + """ Returns a sorting key for isa-set's group list """ + return self.kind.value + + def get_records(self) -> List[cpuid_record_t]: + """ Return a list of the group's cpuid records """ + return self.records + + def records_len(self) -> int: + """ Returns the number of cpuid records """ + return len(self.get_records()) + + def add_records_from_str(self, records: List[str]) -> int: + """ + Convert a string of cpuid records to cpuid_record_t and store as a + group record. + + Args: + records (List[str]): cpuid records in a XED config format + + Returns: + int: Returns the total number of group's records + """ + for rec_str in records: + rec = cpuid_record_t() + loaded = rec.load_from_str(rec_str) + if not loaded: + continue # Do not append an empty record (Usually "n/a" records) + if (self.kind != group_kind_t.AVX10) and ('AVX10' in rec.fname): + die(f'Found illegal AVX10 CPUID record ({rec.emit()}) in {self.get_kind_name} group') + self.records.append(rec) + return self.records_len() + + def __eg__(self, other): + """ Overrides the default implementation """ + if not isinstance(other, group_record_t): + return False + if self.kind != other.kind: + return False + return len(set(self.get_records()).symmetric_difference(other.get_records())) == 0 + + def __str__(self) -> str: + """ Overrides the default implementation """ + s = f'Name={self.get_name}, Kind={self.get_kind_name}, ISA-SET={self.isa_set}\n' + s += 'CPUID records:\n\t' + s += ', '.join([str(rec) for rec in self.get_records()]) + return s + + +### Type Hints ### +cpuid_rec_info_map_t = Dict[str, cpuid_record_t] # d[cpuid-name] = cpuid_record_t +cpuid_group_info_map_t = Dict[str, group_record_t] # d[group-name] = group_record_t +isaset_cpuid_map_t = Dict[str, List[group_record_t]] # d[isa-set] = Lits[group_record_t] +################## + +def make_cpuid_rec_info_map(isaset_cpuid_map : isaset_cpuid_map_t) -> cpuid_rec_info_map_t: + """ + Create and return a unique CPUID map of {cpuid-name : cpuid_record_t}. + The map is generated from isaset_cpuid_map_t + + Args: + isaset_cpuid_map (isaset_cpuid_map_t): isa-set to a list of cpuid groups + + Returns: + cpuid_rec_info_map_t: CPUID name to CPUID record mapping + """ + cpuid_info_map : cpuid_rec_info_map_t = {} + for groups in isaset_cpuid_map.values(): + for group in groups: + for rec in group.get_records(): + if rec.fname in cpuid_info_map: + if cpuid_info_map[rec.fname] != rec: + die("Mismatch on cpuid record specification for rec {}: {} vs {}".format( + rec.fname, cpuid_info_map[rec.fname], rec)) + cpuid_info_map[rec.fname] = rec + + # Make an INVALID cpuid record for enumeration usage + cpuid_info_map['INVALID'] = cpuid_record_t('N/A') + return cpuid_info_map + +def make_cpuid_group_info_map(isaset_cpuid_map : isaset_cpuid_map_t) -> cpuid_group_info_map_t: + """ + Create and return a unique CPUID map of {cpuid-group-name : group_record_t}. + The map is generated from isaset_cpuid_map_t + + Args: + isaset_cpuid_map (isaset_cpuid_map_t): isa-set to a list of cpuid groups + + Returns: + cpuid_group_info_map_t: Group name to CPUID group mapping + """ + group_info_map : cpuid_group_info_map_t = {} + for groups in isaset_cpuid_map.values(): + for grp in groups: + if grp.name in group_info_map: + if group_info_map[grp.name] != grp: + die("Mismatch on cpuid group specification for {}: \n{} \nVS \n{}".format( + grp.name, group_info_map[grp.name], grp)) + group_info_map[grp.name] = grp + # Make an INVALID empty cpuid group for enumeration usage + group_info_map['INVALID'] = group_record_t(isa_set='', kind=DEFAULT_CPUID_GROUP) + return group_info_map + +def read_file(fn : str) -> isaset_cpuid_map_t: + """ + Read XED CPUID input file and return isa-set to list of group_record_t mapping. + The support CPUID string format for XED's input files + is: ":, , ..." + + Supported formats for : + 1. ", :" includes an explicit isa-set and cpuid-group name. + 2. ":" with no cpuid-group kind. in this case, the group will be autogenerated to: + a. *AVX10* If "AVX10_ENABLED" was specified as a cpuid_record name + a. *DEFAULT_CPUID_GROUP* otherwise + For supported formats, check cpuid string patterns in cpuid_record_t. + + Args: + fn (str): XED CPUID input file name + + Returns: + isaset_cpuid_map_t: isa-set to list of group_record_t mapping. + """ lines = open(fn,'r').readlines() lines = map(genutil.no_comments, lines) lines = list(filter(genutil.blank_line, lines)) - d = {} # isa-set to list of cpuid records + d: isaset_cpuid_map_t = {} # d[isa-set] = Lits[group_record_t] for line in lines: - wrds = line.split(':') - isa_set = wrds[0].strip() - cpuid_bits = wrds[1].upper().split() + row_key, row_val = line.split(':', 1) + row_key_list: List[str] = row_key.replace(' ', '').upper().split(',') + assert len(row_key_list) in [1,2], f'Illegal cpuid key format: {row_key}' + + isa_set = row_key_list[0] + group_kind: group_kind_t = DEFAULT_CPUID_GROUP + if len(row_key_list) == 2: + try: # Group kind is explicitly set as CPUID key token + group_kind = group_kind_t[row_key_list[1]] + except: + die(f'Unsupported CPUID group kind "{row_key_list[1]}". Expected: {group_kind_t.names()}') + elif 'AVX10_ENABLED' in row_val.upper(): + # CPUID rows that are naturally belong to the AVX10 group + # "AVX10_ENABLED" is the cpuid name of a fundamental AVX10 cpuid record + group_kind = group_kind_t.AVX10 + if isa_set in d: - msg = "Duplicate cpuid definition for isa set. isa-set={} old={} new={}" - genutil.die(msg.format(isa_set, d[isa_set], cpuid_bits)) - d[isa_set] = cpuid_bits + isa_set_groups: List[group_kind_t] = [grp.kind for grp in d[isa_set]] + if group_kind in isa_set_groups: + msg = "Duplicate group definition for isa set. isa-set={} \nold={} \nnew={}" + genutil.die(msg.format(isa_set, d[isa_set], line)) + else: + d[isa_set] = [] + group_rec = group_record_t(group_kind, isa_set) + records_len = group_rec.add_records_from_str(row_val.upper().split()) + if records_len: # append only non-empty CPUID groups + d[isa_set].append(group_rec) + + # Sort the cpuid groups for each ISA-SET + for isa_set in d: + d[isa_set] = sorted(d[isa_set], key=lambda x: x.get_sort_key()) + return d diff --git a/pysrc/enc2gen.py b/pysrc/enc2gen.py index b3de517d..78ab2027 100755 --- a/pysrc/enc2gen.py +++ b/pysrc/enc2gen.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -5473,6 +5473,9 @@ def _mkstr(lst): set_dbg_output(open(dbg_fn,"w")) gen_setup.make_paths(args) + # Use a dedicated enc2 generated instructions file + args.instructions_filename = gen_setup.check_exist(os.path.join(args.prefix, + 'all-enc2-instructions.txt')) msge('Reading XED db...') xeddb = read_xed_db.xed_reader_t(args.state_bits_filename, args.instructions_filename, diff --git a/pysrc/enumer.py b/pysrc/enumer.py index a78f40da..edc914ac 100755 --- a/pysrc/enumer.py +++ b/pysrc/enumer.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -477,8 +477,8 @@ def _emit_str2enum_convert_stub(self): top = """ %(type)s str2%(type)s(const char* s) { - return %(prefix)s%(invalid)s; (void)s; + return %(prefix)s%(invalid)s; }""" invalid = self._invalid_or_last() d = {'type':self.type_name, @@ -491,8 +491,8 @@ def _emit_enum2str_convert_stub(self): s = """ const char* %(type)s2str(const %(type)s p) { - return "INVALID"; (void)p; + return "INVALID"; }""" invalid = self._invalid_or_last() self.cf.emit_eol(s % {'type':self.type_name, diff --git a/pysrc/func_gen.py b/pysrc/func_gen.py index 4ecc4cf7..074ba263 100644 --- a/pysrc/func_gen.py +++ b/pysrc/func_gen.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2019 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -33,7 +33,7 @@ def __init__(self,cvg, fname): def _gen_empty_function(self,fname): ''' generate a function without constraints ''' - + returned = False return_type = 'xed_uint32_t' fo = codegen.function_object_t(fname, return_type=return_type, @@ -47,12 +47,16 @@ def _gen_empty_function(self,fname): lines = self.cvg.action_codegen.emit_default() for line in lines: - if line == 'return ': + if line.startswith('return'): + fo.add_code_eol('(void)%s' % obj_str) fo.add_code_eol('return 1') + returned = True else: fo.add_code_eol(line) - fo.add_code_eol('(void)%s' % obj_str) - fo.add_code_eol('return 1') + + if not returned: + fo.add_code_eol('(void)%s' % obj_str) + fo.add_code_eol('return 1') return fo def gen_function(self): diff --git a/pysrc/gen_cpuid.py b/pysrc/gen_cpuid.py index e30f3c2b..809994ea 100755 --- a/pysrc/gen_cpuid.py +++ b/pysrc/gen_cpuid.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2020 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,8 +18,8 @@ # #END_LEGAL from __future__ import print_function +from typing import Set import sys -import read_xed_db import gen_setup def die(s): @@ -37,16 +37,19 @@ def work(args): # main function xeddb.recs.sort(key=lambda x:x.iclass) for r in xeddb.recs: + if not r.cpuid_groups: + continue + cpuids: Set[str] = set() + for grp in r.cpuid_groups: + cpuids.update([str(rec) for rec in grp.get_records()]) if r.space in ['vex','evex']: - print("{}: {}/{}: {}".format(r.iclass, r.space, r.vl, " ".join(r.cpuid))) + print("{}: {}/{}: {}".format(r.iclass, r.space, r.vl, ", ".join(cpuids))) else: - print("{}: {}: {}".format(r.iclass, r.space, " ".join(r.cpuid))) - - return 0 + print("{}: {}: {}".format(r.iclass, r.space, ", ".join(cpuids))) if __name__ == "__main__": args = gen_setup.setup('Generate cpuid info') - r = work(args) - sys.exit(r) + work(args) + sys.exit(0) diff --git a/pysrc/gen_cpuid_per_chip.py b/pysrc/gen_cpuid_per_chip.py index b2186115..af6de8d4 100755 --- a/pysrc/gen_cpuid_per_chip.py +++ b/pysrc/gen_cpuid_per_chip.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2020 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -18,39 +18,41 @@ # #END_LEGAL from __future__ import print_function +import json import sys import read_xed_db import gen_setup +import cpuid_rdr +from typing import Dict, List -def die(s): - sys.stdout.write("ERROR: {0}\n".format(s)) - sys.exit(1) -def msgb(b,s=''): - sys.stdout.write("[{0}] {1}\n".format(b,s)) - +def msgj(b,s=''): + sys.stdout.write("# [{0}] {1}\n".format(b,s)) def work(args): # main function - msgb("READING XED DB") - - xeddb = gen_setup.read_db(args) + msgj("READING XED DB") + xeddb: read_xed_db.xed_reader_t = gen_setup.read_db(args) chips, chipdb = gen_setup.read_chips(args) + data: Dict[str, dict] = {} # DB for future json print + xeddb.recs.sort(key=lambda x:x.iclass) for chip in chips: - cpuids = set() + data[chip]: Dict[str, dict] = {} # isa-set as a key for r in xeddb.recs: - if r.isa_set in chipdb[chip]: - for cpuid in r.cpuid: - if cpuid != 'N/A': - cpuids.add(cpuid) - print("CHIP {}".format(chip)) - print("\t{}".format(" ".join(cpuids))) - return 0 + if r.isa_set in chipdb[chip] and r.cpuid_groups: + data[chip][r.isa_set]: Dict[str, List[str]] = {} + group : cpuid_rdr.group_record_t + for group in r.cpuid_groups: + group_k = group.get_kind_name() + data[chip][r.isa_set][group_k]: List[str] = [str(rec) for rec in group.get_records()] + + jsonString = json.dumps(data, indent=4) + print(jsonString) if __name__ == "__main__": - args = gen_setup.setup('Generate cpuid info') - r = work(args) - sys.exit(r) + args = gen_setup.setup('Generate cpuid info in json format') + work(args) + sys.exit(0) diff --git a/pysrc/gen_setup.py b/pysrc/gen_setup.py index 0e950fc2..927e1144 100644 --- a/pysrc/gen_setup.py +++ b/pysrc/gen_setup.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2020 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -23,6 +23,7 @@ import sys import read_xed_db import chipmodel +from typing import List, Tuple, Dict def die(s): sys.stdout.write("ERROR: {0}\n".format(s)) @@ -66,7 +67,7 @@ def read_db(args): args.map_descriptions) return xeddb -def read_chips(args): +def read_chips(args) -> Tuple[List[str], Dict[str,str]]: chips, chip_db = chipmodel.read_database(args.chip_filename) return chips, chip_db diff --git a/pysrc/generator.py b/pysrc/generator.py index a16f3a47..4d47b1f7 100755 --- a/pysrc/generator.py +++ b/pysrc/generator.py @@ -2893,7 +2893,7 @@ def collect_immediate_operand_bit_positions(options, opnd, ii): ################################ -uninteresting_operand_types_list = ['imm_const', 'reg', 'relbr', 'ptr', 'error', +uninteresting_operand_types_list = ['imm_const', 'reg', 'relbr', 'absbr', 'ptr', 'error', 'nt_lookup_fn', 'mem', 'xed_reset', 'flag', 'agen'] @@ -5665,100 +5665,113 @@ def call_chipmodel(agi): agi.add_file_name(f,is_header(f)) ################################################ -def read_cpuid_mappings(fn): - return cpuid_rdr.read_file(fn) - -def make_cpuid_mappings(agi,mappings): - - # 'mappings' is a dict of isa_set -> list of cpuid_bit_names - - # collect all unique list of cpuid bit names - cpuid_bits = {} - for vlist in mappings.values(): - for bit in vlist: - if bit == 'N/A': - data = bitname = 'INVALID' - else: - try: - bitname,orgdata = bit.split('.',1) - data = re.sub('[.]','_',orgdata) - except: - die("splitting problem with {}".format(bit)) - if bitname in cpuid_bits: - if cpuid_bits[bitname] != data: - die("Mismatch on cpuid bit specification for bit {}: {} vs {}".format( - bitname, cpuid_bits[bitname], data)) - cpuid_bits[bitname]=data - - - cpuid_bit_string_names = sorted(cpuid_bits.keys()) - - # move INVALID to 0th element: - p = cpuid_bit_string_names.index('INVALID') - del cpuid_bit_string_names[p] - cpuid_bit_string_names = ['INVALID'] + cpuid_bit_string_names - - # emit enum for cpuid bit names - cpuid_bit_enum = enum_txt_writer.enum_info_t(cpuid_bit_string_names, +def make_cpuid_mappings(agi,fn): + """ + Make CPUID C tables and headers + + Args: + agi (all_generator_info_t): All generator info + fn (str): cpuid input file name + """ + isaset_cpuid_map : cpuid_rdr.isaset_cpuid_map_t = cpuid_rdr.read_file(fn) + cpuid_recs : cpuid_rdr.cpuid_rec_info_map_t = cpuid_rdr.make_cpuid_rec_info_map(isaset_cpuid_map) + cpuid_grps : cpuid_rdr.cpuid_group_info_map_t = cpuid_rdr.make_cpuid_group_info_map(isaset_cpuid_map) + cpuid_rec_string_names = sorted(cpuid_recs.keys()) + cpuid_group_string_names = sorted(cpuid_grps.keys()) + + ### CPUID Record Enum ## + # Move INVALID to 0th element: + p = cpuid_rec_string_names.index('INVALID') + del cpuid_rec_string_names[p] + cpuid_rec_string_names = ['INVALID'] + cpuid_rec_string_names + + # Emit enum for cpuid rec names + cpuid_rec_enum = enum_txt_writer.enum_info_t(cpuid_rec_string_names, agi.common.options.xeddir, agi.common.options.gendir, - 'xed-cpuid-bit', - 'xed_cpuid_bit_enum_t', - 'XED_CPUID_BIT_', + 'xed-cpuid-rec', + 'xed_cpuid_rec_enum_t', + 'XED_CPUID_REC_', cplusplus=False) - cpuid_bit_enum.print_enum() - cpuid_bit_enum.run_enumer() - agi.add_file_name(cpuid_bit_enum.src_full_file_name) - agi.add_file_name(cpuid_bit_enum.hdr_full_file_name,header=True) + cpuid_rec_enum.print_enum() + cpuid_rec_enum.run_enumer() + agi.add_file_name(cpuid_rec_enum.src_full_file_name) + agi.add_file_name(cpuid_rec_enum.hdr_full_file_name,header=True) + + ### CPUID Group Enum ## + # Move INVALID to 0th element: + p = cpuid_group_string_names.index('INVALID') + del cpuid_group_string_names[p] + cpuid_group_string_names = ['INVALID'] + cpuid_group_string_names + + # Emit enum for cpuid group names + cpuid_grp_enum = enum_txt_writer.enum_info_t(cpuid_group_string_names, + agi.common.options.xeddir, + agi.common.options.gendir, + 'xed-cpuid-group', + 'xed_cpuid_group_enum_t', + 'XED_CPUID_GROUP_', + cplusplus=False) + cpuid_grp_enum.print_enum() + cpuid_grp_enum.run_enumer() + agi.add_file_name(cpuid_grp_enum.src_full_file_name) + agi.add_file_name(cpuid_grp_enum.hdr_full_file_name,header=True) fp = agi.open_file('xed-cpuid-tables.c') fp.add_code('const xed_cpuid_rec_t xed_cpuid_info[] = {') # emit initialized structure mapping cpuid enum values to descriptive structures - for bitname in cpuid_bit_string_names: - cpuid_bit_data = cpuid_bits[bitname] - if bitname == 'INVALID': - leaf = subleaf = bit = 0 - reg = 'INVALID' - else: - (leaf,subleaf,reg,bit) = cpuid_bit_data.split('_') + for recname in cpuid_rec_string_names: + data : cpuid_rdr.cpuid_record_t = cpuid_recs[recname] - s = "/* {:18s} */ {{ 0x{}, {}, {}, XED_REG_{} }},".format( - bitname, leaf,subleaf, bit, reg) + s = "/* {:18s} */ {{ 0x{}, {}, XED_REG_{}, {}, {}, {} }},".format( + recname, data.leaf, data.s_leaf, data.reg, data.bit_start, + data.bit_end, data.value) fp.add_code(s) fp.add_code('};') # check that each isa set in the cpuid files has a corresponding XED_ISA_SET_ value fail = False - for cisa in mappings.keys(): + for cisa in isaset_cpuid_map.keys(): t = re.sub('XED_ISA_SET_','',cisa) if t not in agi.all_enums['xed_isa_set_enum_t']: fail = True genutil.warn("bad isa_set referenced cpuid file: {}".format(cisa)) if fail: die("Found bad isa_sets in cpuid input files.") - - - - # emit initialized structure of isa-set mapping to array of cpuid bit string enum. + # emit initialized structure of cpuid group mapping to array of cpuid rec string enum. n = 4 - fp.add_code('const xed_cpuid_bit_enum_t xed_isa_set_to_cpuid_mapping[][XED_MAX_CPUID_BITS_PER_ISA_SET] = {') + fp.add_code('const xed_cpuid_rec_enum_t xed_cpuid_group_to_rec_mapping[][XED_MAX_CPUID_RECS_PER_GROUP] = {') + for group_name in cpuid_group_string_names: + print("CPUID Group: ", group_name) + raw = n*['XED_CPUID_REC_INVALID'] + if group_name in cpuid_grps: + group: cpuid_rdr.group_record_t = cpuid_grps[group_name] + for i, rec in enumerate(group.get_records()): + rec_symbolic_name = rec.fname + if i >= n: + die("Make XED_MAX_CPUID_RECS_PER_GROUP bigger") + raw[i] = 'XED_CPUID_REC_' + rec_symbolic_name + recs = ", ".join(raw) + s = '/* {} */ {{ {} }} ,'.format(group_name, recs) + fp.add_code(s) + fp.add_code('};') + # emit initialized structure of isa-set mapping to array of cpuid group string enum. + n = 2 + fp.add_code('const xed_cpuid_group_enum_t xed_isa_set_to_cpuid_group_mapping[][XED_MAX_CPUID_GROUPS_PER_ISA_SET] = {') for isaset in agi.all_enums['xed_isa_set_enum_t']: print("ISASET: ", isaset) x = 'XED_ISA_SET_' + isaset - raw = n*['XED_CPUID_BIT_INVALID'] - if x in mappings: - for i,v in enumerate(mappings[x]): - if v == 'N/A': - bit_symbolic_name = 'INVALID' - else: - (bit_symbolic_name,leaf,subleaf,reg,bit) = v.split('.') + raw = n*['XED_CPUID_GROUP_INVALID'] + if x in isaset_cpuid_map: + for i,v in enumerate(isaset_cpuid_map[x]): + grp_symbolic_name = v.get_name() if i >= n: - die("Make XED_MAX_CPUID_BITS_PER_ISA_SET bigger") - raw[i] = 'XED_CPUID_BIT_' + bit_symbolic_name + die("Make XED_MAX_CPUID_GROUPS_PER_ISA_SET bigger") + raw[i] = 'XED_CPUID_GROUP_' + grp_symbolic_name bits = ", ".join(raw) s = '/* {} */ {{ {} }} ,'.format(isaset, bits) fp.add_code(s) @@ -5769,8 +5782,7 @@ def gen_cpuid_map(agi): fn = agi.common.options.cpuid_input_fn if fn: if os.path.exists(fn): - mappings = read_cpuid_mappings(fn) - make_cpuid_mappings(agi, mappings) + make_cpuid_mappings(agi, fn) return die("Could not read cpuid input file: {}".format(str(fn))) diff --git a/pysrc/ild_codegen.py b/pysrc/ild_codegen.py index 3fd4b655..b5f12245 100755 --- a/pysrc/ild_codegen.py +++ b/pysrc/ild_codegen.py @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2021 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -552,6 +552,43 @@ def _gen_byreg_fun_dict(info_list, nt_dict, is_conflict_fun, fun_dict[reg] = l2_fn return fun_dict +def _gen_byrex2_fun_dict(info_list, nt_dict, is_conflict_fun, + gen_l2_fn_fun): + REX2_REF_PATT = 'rex2_refining_prefix' + NO_REX2_REF_PATT = 'norex2_prefix' + fun_dict = {0: [], 1: []} # Keys are the REX2 required value + insn_map = info_list[0].insn_map + opcode = info_list[0].opcode + + #get info objects with REX2 refining constraint + for info in info_list: + if REX2_REF_PATT in info.ptrn_wrds: + fun_dict[1].append(info) + elif NO_REX2_REF_PATT in info.ptrn_wrds: + fun_dict[0].append(info) + else: + # no REX2 constraint, can not resolve conflict + return None + + for rex2_ref, infos in fun_dict.items(): + if len(infos) == 0: + ildutil.ild_warn('BY REX2 resolving: No infos for rex2_refining:' + + '%s opcode %s map %s' % (rex2_ref==1, opcode, insn_map)) + return None + #if these info objects conflict, we cannot refine by REX2 refining prefix + is_conflict = is_conflict_fun(infos, nt_dict) + if is_conflict == None: + return None + if is_conflict: + ildutil.ild_warn('BY REX2 resolving:Still conflict for rex2_refining:' + + '%s opcode %s map %s' % (rex2_ref==1, opcode, insn_map)) + return None + l2_fn = gen_l2_fn_fun(infos[0], nt_dict) + if not l2_fn: + return None + fun_dict[rex2_ref] = l2_fn + return fun_dict + def _gen_intervals_dict(fun_dict): """If there are keys that map to the same value, we want to unite them to intervals in order to have less conditional branches in @@ -723,6 +760,54 @@ def gen_l1_bymode_resolution_function(agi,info_list, nt_dict, is_conflict_fun, return fo + +def gen_l1_byrex2_resolution_function(agi,info_list, nt_dict, is_conflict_fun, + gen_l2_fn_fun, fn_suffix): + if len(info_list) == 0: + ildutil.ild_warn("Trying to resolve conflict for empty info_list") + return None + insn_map = info_list[0].insn_map + opcode = info_list[0].opcode + ildutil.ild_warn('generating by REX2 fun_dict for opcode %s map %s' % + (opcode, insn_map)) + fun_dict: dict = _gen_byrex2_fun_dict(info_list, nt_dict, is_conflict_fun, + gen_l2_fn_fun) + if not fun_dict or not all(fun_dict.values()): + #it is not ild_err because we might have other conflict resolution + #functions to try. + #In general we have a list of different conflict resolution functions + #that we iterate over and try to resolve the conflict + ildutil.ild_warn('Failed to generate by REX2 fun_dict for opcode '+ + '%s map %s' % (opcode, insn_map)) + return None + + lufn = ild_nt.gen_lu_names(['RESOLVE_BYREX2'], fn_suffix)[2] + lufn += '_map%s_op%s_l1' % (insn_map, opcode) + return_type = 'void' + fo = codegen.function_object_t(lufn, return_type, + static=True, inline=True) + data_name = 'x' + fo.add_arg(ildutil.ild_c_type + ' %s' % data_name) + + + mode_type = ildutil.ild_c_op_type + rex2_var = '_rex2' + fo.add_code_eol(mode_type + ' %s' % rex2_var) + #get MODE value + access_call = emit_ild_access_call("REX2", data_name) + if not access_call: + return None + + fo.add_code_eol('%s = (%s)%s' %(rex2_var, mode_type, access_call)) + + #now emit the resolution code, that checks conditions from dict + #(in this case the REX2 condition) + #and calls appropriate L2 function for each condition + _add_switch_dispatching(fo, fun_dict, rex2_var, data_name) + + return fo + + def print_defines(file, define_dict): for def_name in sorted(define_dict.keys()): def_val = define_dict[def_name] diff --git a/pysrc/ild_disp.py b/pysrc/ild_disp.py index 0e1241b9..27dd729d 100755 --- a/pysrc/ild_disp.py +++ b/pysrc/ild_disp.py @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2021 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -140,7 +140,8 @@ def _is_disp_conflict(info_list, disp_dict): #a list of conflict resolution functions to use when we have conflicts #between info objects in the same map-opcode _resolution_functions = [ ild_codegen.gen_l1_byreg_resolution_function, - ild_codegen.gen_l1_bymode_resolution_function ] + ild_codegen.gen_l1_bymode_resolution_function, + ild_codegen.gen_l1_byrex2_resolution_function ] def _resolve_conflicts(agi, info_list, disp_dict): """Try to resolve conflicts by applying the conflict resolution diff --git a/pysrc/ild_info.py b/pysrc/ild_info.py index 677f472f..0182d85e 100755 --- a/pysrc/ild_info.py +++ b/pysrc/ild_info.py @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2021 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -78,7 +78,8 @@ def __init__(self, vexvalid=None, easz_nt_seq=None, imm_nt_seq=None, disp_nt_seq=None,ext_opcode=None, mode=None, - priority=storage_priority): + priority=storage_priority, + ptrn_wrds=[]): self.vexvalid = vexvalid # numeric self.insn_map = insn_map self.opcode = opcode @@ -120,6 +121,10 @@ def __init__(self, vexvalid=None, #For example storage's objects have priority 10 and objects #obtained from grammar parsing have priority 0. self.priority = priority + + # Store all pattern's tokens, use for exceptional checks and not for object + # comparing + self.ptrn_wrds = ptrn_wrds #This method is important because it defines which objects conflict # NOTE: SKIPPING vexvalid field in comparison @@ -166,6 +171,7 @@ def __str__(self): printed_members.append('EOSZ_SEQ:\t %s' % self.eosz_nt_seq) printed_members.append('IMM_SEQ\t: %s' % self.imm_nt_seq) printed_members.append('DISP_SEQ\t: %s' % self.disp_nt_seq) + printed_members.append('PATTERN\t: %s' % ', '.join(self.ptrn_wrds)) return "{\n"+ ",\n".join(printed_members) + "\n}" @@ -183,7 +189,8 @@ def ptrn_to_info(pattern, prio=storage_priority): disp_nt_seq=pattern.disp_nt_seq, ext_opcode=pattern.ext_opcode, mode=pattern.mode, - priority=prio) + priority=prio, + ptrn_wrds=pattern.ptrn_wrds) #Get pattern_t object and set of infos , create info_t object and add it #to the set diff --git a/pysrc/ild_phash.py b/pysrc/ild_phash.py index 78ddd0b1..c485357c 100755 --- a/pysrc/ild_phash.py +++ b/pysrc/ild_phash.py @@ -218,11 +218,11 @@ def gen_find_fos(self, fname): # phash_t if self.hash_f.kind() == 'trivial': operand_lu_fo = None - # rule is a pattern_t - fo.add_code_eol("return {}".format(self.cdict.rule.ii.inum)) # avoid parmameter-not-used warnings with compilers that # care (like MSVS) fo.add_code_eol("(void)d") + # rule is a pattern_t + fo.add_code_eol("return {}".format(self.cdict.rule.ii.inum)) else: operand_lu_fo = codegen.function_object_t(lu_operands_fn, return_type=key_ctype, diff --git a/pysrc/map_info_rdr.py b/pysrc/map_info_rdr.py index 6a69338a..e6863569 100755 --- a/pysrc/map_info_rdr.py +++ b/pysrc/map_info_rdr.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -309,8 +309,8 @@ def convert_list_to_integer(lst, bits_per_field): constant = 0 f.add_code('/* {} */'.format(codes)) if set(codes) == {0}: # all zero values... - f.add_code_eol('return 0') f.add_code_eol('(void)m') + f.add_code_eol('return 0') else: if required_chunks <= 1: f.add_code_eol('const xed_uint64_t data_const = 0x{:x}ULL'.format(constant)) diff --git a/pysrc/nt_func_gen.py b/pysrc/nt_func_gen.py index 9411b7a5..320a90d3 100755 --- a/pysrc/nt_func_gen.py +++ b/pysrc/nt_func_gen.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2020 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -33,7 +33,7 @@ # those operand are very wide but the real values they may have are few # specifying here the valid values for the operands and the number bits # needed to represent each one -_valid_width = {'BRDISP_WIDTH' :[8, 16, 32], +_valid_width = {'BRDISP_WIDTH' :[8, 16, 32, 64], 'DISP_WIDTH' :[0, 8, 16, 32, 64], 'IMM_WIDTH' :[8, 16, 32, 64], } diff --git a/pysrc/opnds.py b/pysrc/opnds.py index 358cf09e..4d2bef8d 100644 --- a/pysrc/opnds.py +++ b/pysrc/opnds.py @@ -2,7 +2,7 @@ # -*- python -*- #BEGIN_LEGAL # -#Copyright (c) 2020 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -31,7 +31,7 @@ class operand_info_t(object): decimal_number_pattern = re.compile(r'[0-9]+') operand_types = [ 'reg', 'imm', 'imm_const', 'error', - 'relbr', 'ptr', 'nt_lookup_fn', 'mem', 'xed_reset', + 'relbr', 'absbr', 'ptr', 'nt_lookup_fn', 'mem', 'xed_reset', 'flag', 'agen' ] def __init__(self, @@ -279,6 +279,7 @@ def __hash__(self): imm_token_pattern = re.compile(r'IMM[0123]') agen_pattern = re.compile(r'AGEN') relative_branch_pattern = re.compile(r'RELBR') +absolute_branch_pattern = re.compile(r'ABSBR') pointer_pattern = re.compile(r'PTR') xed_reset_pattern = re.compile(r'XED_RESET') double_parens_pattern = re.compile(r'[(][)]') @@ -303,7 +304,7 @@ def parse_one_operand(w, name=xxxxxy:{r,w,crw,rw,rcw}[:{EXPL,IMPL,SUPP,ECOND}][:{some oc2 code}][:{some xtype code}] name=NTLUR():{r,w,crw,rw,rcw}[:{EXPL,IMPL,SUPP,ECOND}][:{some oc2 code}][:{some xtype code}] oc2 can be before EXPL/IMPL/SUPP. oc2 is the width code. - MEM{0,1}, PTR, RELBR, AGEN, IMM{0,1,2,3} + MEM{0,1}, PTR, RELBR, ABSBR, AGEN, IMM{0,1,2,3} xtype describes the number of data type and width of each element. If the xtype is omitted, xed will attempt to infer it from the oc2 code. @@ -463,6 +464,10 @@ def parse_one_operand(w, name = a optype ='imm_const' rhs = '1' + elif absolute_branch_pattern.search(a): + name = a + optype ='imm_const' + rhs = '1' elif pointer_pattern.search(a): name = a optype ='imm_const' diff --git a/pysrc/read-encfile.py b/pysrc/read-encfile.py index 02ff21d9..3e41cda5 100755 --- a/pysrc/read-encfile.py +++ b/pysrc/read-encfile.py @@ -94,8 +94,6 @@ def find_dir(d): import encutil from patterns import * -EXT_MODULE = None - storage_fields = {} def outreg(): return operand_storage.get_op_getter_full_func('outreg', @@ -1092,9 +1090,8 @@ def __init__(self, map_info, self.encspace=act.value break - # Use extension module constructor, if exists - if EXT_MODULE: EXT_MODULE.ext_iform_t.extend_init(self) - self._fixup_vex_conditions() + self._fixup_non_evex_conditions() + self._fixup_evex_scalable_operands() self._find_legacy_map(map_info) self.rule = self.make_rule() @@ -1126,11 +1123,51 @@ def _find_legacy_map(self, map_info): self.legacy_map = default_map if not self.legacy_map: genutil.die("Could not set legacy map.") - - def _fixup_vex_conditions(self): - """if action has VEXVALID=1, add modal_pattern MUST_USE_EVEX=0. + + def _fixup_evex_scalable_operands(self): + """ + Some EVEX instructions are defined with scalable width operand. For them, + the EVEX.PP=1 is equivalent to 66 OSZ prefix. + In this case, the function adds EOSZ restriction according to the PP field. + This is true for a full VAR scalability level (excluding y,z...) + + Args: + iform_t (iform_t): the iform_t self object + """ + + evex_scalable_op = False + mode64 = 'MODE=2' in self.modal_patterns + if self.encspace == 2: # EVEX + for e in self.enc_conditions: + if e.lencode in ['v']: + evex_scalable_op = True + break + + support_evex_scalable_op = evex_scalable_op and mode64 + if not support_evex_scalable_op: + return + + pp = None + for e in self.enc_actions: + if e.field_name == 'VEX_PREFIX': + pp = e.value + break + + # mode64 66_pp REXW=0 | EOSZ=1 + # mode64 no66_pp REXW=0 | EOSZ=2 + # mode64 66_pp REXW=1 | EOSZ=3 + # mode64 no66_pp REXW=1 | EOSZ=3 + pp_cond = {0 : 'EOSZ!=1', # EVEX.PP=0 (VNP) is treated as "no66_pp" + 1 : 'EOSZ!=2'} # EVEX.PP=1 (V66) is treated as "66_pp" + + assert pp in pp_cond, "Unhandled EVEX prefix for scalable operands" + self.modal_patterns.append(pp_cond[pp]) + return + + def _fixup_non_evex_conditions(self): + """if instruction is not EVEX add modal_pattern MUST_USE_EVEX=0. The modal_patterns become conditions later on.""" - if self.encspace == 1: # VEX + if self.encspace != 2: # Not EVEX self.modal_patterns.append("MUST_USE_EVEX=0") def make_operand_name_list(self): @@ -1411,9 +1448,9 @@ def create_function(self, bind_or_emit): iform_builder.remember_iforms(nt_name) else: # nothing to emit, so skip this... - fo.add_code_eol('return 1') fo.add_code_eol('(void) okay') fo.add_code_eol('(void) xes') + fo.add_code_eol('return 1') return fo #_vmsgb("EMITTING RULES FOR", nt_name) @@ -1432,15 +1469,17 @@ def create_function(self, bind_or_emit): default_rule = self._default_rule() lines = default_rule.emit_rule(bind_or_emit,0, nt_name) fo.add_lines(lines) - - fo.add_code('return 0; /*pacify the compiler*/') + fo.add_comment('pacify the compiler') fo.add_code_eol('(void) okay') fo.add_code_eol('(void) xes') + if bind_or_emit == 'EMIT': fo.add_code_eol('(void) iform') if bind_or_emit == 'BIND' or bind_or_emit == 'NTLUF': fo.add_code_eol("(void) conditions_satisfied") + + fo.add_code('return 0;') return fo class sequencer_t(object): @@ -2638,9 +2677,9 @@ def make_isa_encode_group(self, group_index, ins_group): fo.add_code(pad4 + '} // initial conditions') fo.add_code('} // xed_enc_chip_check ') - fo.add_code_eol('return 0') fo.add_code_eol("(void) okay") fo.add_code_eol("(void) xes") + fo.add_code_eol('return 0') return fo def emit_encode_function_table_init(self): @@ -3210,28 +3249,6 @@ def setup_arg_parser(): chip.''') options, args = arg_parser.parse_args() - - if options.xedext_dir: - extdir_path = Path(options.xedext_dir).resolve() - if extdir_path.exists(): - # Catch read-encfile.py extension - try: - global EXT_MODULE - fname = Path(__file__).name - ext_file = 'ext-' + fname - ext_module = 'ext-' + Path(__file__).stem - - ext_path = extdir_path.joinpath('pysrc', ext_file).resolve(strict=True) - spec = importlib.util.spec_from_file_location(ext_module, ext_path) - EXT_MODULE = importlib.util.module_from_spec(spec) - sys.modules[ext_module] = EXT_MODULE - spec.loader.exec_module(EXT_MODULE) - mbuild.msgb(f'PYSRC: Extending "{fname}" with "{ext_file}"') - except: - die('(read-encfile.py) couldn\'t find an expected extension module') - else: - warn(f'Provided --xedext-dir does not exists: "{options.xedext_dir}"') - return options, args diff --git a/pysrc/read_xed_db.py b/pysrc/read_xed_db.py index 4c9a11b5..d94d98b6 100755 --- a/pysrc/read_xed_db.py +++ b/pysrc/read_xed_db.py @@ -21,6 +21,7 @@ import sys import re import collections +from typing import List import patterns import slash_expand import genutil @@ -209,7 +210,7 @@ def __init__(self, self._summarize_vsib() self._summarize_sibmem() - self.cpuid_map = {} + self.cpuid_map : cpuid_rdr.isaset_cpuid_map_t = {} if cpuid_filename: self.cpuid_map = cpuid_rdr.read_file(cpuid_filename) self._add_cpuid() @@ -396,10 +397,10 @@ def _generate_memop_rw_field(self): def _add_cpuid(self): '''set v.cpuid with list of cpuid bits for this instr''' for v in self.recs: - v.cpuid = [] + v.cpuid_groups: List[cpuid_rdr.group_record_t] = [] ky = 'XED_ISA_SET_{}'.format(v.isa_set.upper()) if ky in self.cpuid_map: - v.cpuid = self.cpuid_map[ky] + v.cpuid_groups = self.cpuid_map[ky] def _add_broadcasting(self): broadcast_attr = re.compile(r'BROADCAST_ENABLED') diff --git a/scripts/apply_legal_header.py b/scripts/apply_legal_header.py index 88bca427..a8f51e71 100755 --- a/scripts/apply_legal_header.py +++ b/scripts/apply_legal_header.py @@ -242,7 +242,7 @@ def skip_file(file): return True #skip pattern - skip_patterns = ['*.gitignore', '*README.*', 'tests/tests-*/*/*', '*tests/test-*/*'] + skip_patterns = ['*.gitignore', '*README.*', 'tests/test*/*', 'tests/test*/**/*'] for pattern in skip_patterns: if f.match(pattern): return True diff --git a/src/common/xed-cpuid.c b/src/common/xed-cpuid.c index b9765203..e9f4b9fb 100644 --- a/src/common/xed-cpuid.c +++ b/src/common/xed-cpuid.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -19,27 +19,39 @@ END_LEGAL */ #include "xed-internal-header.h" +extern const xed_cpuid_group_enum_t xed_isa_set_to_cpuid_group_mapping[][XED_MAX_CPUID_GROUPS_PER_ISA_SET]; +extern const xed_cpuid_rec_enum_t xed_cpuid_group_to_rec_mapping[][XED_MAX_CPUID_RECS_PER_GROUP]; extern const xed_cpuid_rec_t xed_cpuid_info[]; -extern const xed_cpuid_bit_enum_t xed_isa_set_to_cpuid_mapping[][XED_MAX_CPUID_BITS_PER_ISA_SET]; -xed_cpuid_bit_enum_t xed_get_cpuid_bit_for_isa_set(xed_isa_set_enum_t isaset, xed_uint_t i) +xed_cpuid_group_enum_t xed_get_cpuid_group_enum_for_isa_set(xed_isa_set_enum_t isaset, xed_uint_t i) { if (isaset > XED_ISA_SET_INVALID && isaset < XED_ISA_SET_LAST && - i < XED_MAX_CPUID_BITS_PER_ISA_SET) + i < XED_MAX_CPUID_GROUPS_PER_ISA_SET) { - return xed_isa_set_to_cpuid_mapping[isaset][i]; + return xed_isa_set_to_cpuid_group_mapping[isaset][i]; } - return XED_CPUID_BIT_INVALID; + return XED_CPUID_GROUP_INVALID; } -xed_int_t xed_get_cpuid_rec(xed_cpuid_bit_enum_t cpuid_bit, xed_cpuid_rec_t* cpuid_rec) +xed_cpuid_rec_enum_t xed_get_cpuid_rec_enum_for_group(xed_cpuid_group_enum_t group, xed_uint_t i) { - if (cpuid_bit > XED_CPUID_BIT_INVALID && - cpuid_bit < XED_CPUID_BIT_LAST) + if (group > XED_CPUID_GROUP_INVALID && + group < XED_CPUID_GROUP_LAST && + i < XED_MAX_CPUID_RECS_PER_GROUP) + { + return xed_cpuid_group_to_rec_mapping[group][i]; + } + return XED_CPUID_REC_INVALID; +} + +xed_bool_t xed_get_cpuid_rec(xed_cpuid_rec_enum_t rec_enum, xed_cpuid_rec_t* cpuid_rec) +{ + if (rec_enum > XED_CPUID_REC_INVALID && + rec_enum < XED_CPUID_REC_LAST) { xed_assert(cpuid_rec!=0); - *cpuid_rec = xed_cpuid_info[cpuid_bit]; + *cpuid_rec = xed_cpuid_info[rec_enum]; return 1; } return 0; diff --git a/src/common/xed-flags.c b/src/common/xed-flags.c index 3ace800f..6a19cbf5 100644 --- a/src/common/xed-flags.c +++ b/src/common/xed-flags.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -72,8 +72,8 @@ xed_flag_action_get_flag_name(const xed_flag_action_t* p) { /// return the action xed_flag_action_enum_t xed_flag_action_get_action(const xed_flag_action_t* p, unsigned int i) { - return p->action; (void)i; // pacify compiler warnings + return p->action; } /// returns 1 if the specified action is invalid. Only the 2nd flag might diff --git a/src/common/xed-immed.c b/src/common/xed-immed.c index b91a05ce..ecb6eb67 100644 --- a/src/common/xed-immed.c +++ b/src/common/xed-immed.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -37,7 +37,7 @@ xed_int64_t xed_immed_from_bytes(xed_int8_t* bytes, xed_uint_t n) { if (n == 0) return 0; else if (n == 4) { - r = (ub[3]<<24) | (ub[2]<<16) | (ub[1] << 8) | ub[0]; + r = ((xed_uint64_t)ub[3] << 24) | ((xed_uint64_t)ub[2] << 16) | ((xed_uint64_t)ub[1] << 8) | (xed_uint64_t)ub[0]; if (bytes[3] < 0) { r = r | m1.i64; } diff --git a/src/common/xed-operand-values-interface.c b/src/common/xed-operand-values-interface.c index ae1de8f5..78360bd0 100644 --- a/src/common/xed-operand-values-interface.c +++ b/src/common/xed-operand-values-interface.c @@ -499,8 +499,8 @@ xed_operand_values_is_nop(const xed_operand_values_t* p) -xed_int32_t -xed_operand_values_get_branch_displacement_int32( +xed_int64_t +xed_operand_values_get_branch_displacement_int64( const xed_operand_values_t* p) { const xed_decoded_inst_t* xedd = (const xed_decoded_inst_t*)p; // same type @@ -509,6 +509,7 @@ xed_operand_values_get_branch_displacement_int32( case 8: case 16: case 32: + case 64: return xed3_operand_get_disp(xedd); default: return 0; @@ -572,7 +573,7 @@ xed_uint8_t xed_operand_values_get_branch_displacement_byte(const xed_operand_values_t* p, unsigned int i) { unsigned int len = xed3_operand_get_brdisp_width(p); - xed_int32_t v = xed_operand_values_get_branch_displacement_int32(p); //FIXME: BENDIAN + xed_int64_t v = xed_operand_values_get_branch_displacement_int64(p); //FIXME: BENDIAN return xed_get_byte(v, i, len); } @@ -621,6 +622,10 @@ void xed_operand_values_set_relbr(xed_operand_values_t* p) { xed3_operand_set_relbr(p,1); } +void +xed_operand_values_set_absbr(xed_operand_values_t* p) { + xed3_operand_set_absbr(p,1); +} void xed_operand_values_set_effective_operand_width(xed_operand_values_t* p, @@ -658,8 +663,8 @@ xed_operand_values_set_memory_operand_length(xed_operand_values_t* p, unsigned int xed_operand_values_get_memory_operand_length(const xed_operand_values_t* p, unsigned int memop_idx) { + (void)memop_idx; return xed3_operand_get_mem_width(p); - (void)memop_idx; } void @@ -689,19 +694,19 @@ xed_operand_values_set_memory_displacement_bits(xed_operand_values_t* p, void xed_operand_values_set_branch_displacement(xed_operand_values_t* p, - xed_int32_t x, + xed_int64_t x, unsigned int len) { xed_operand_values_set_branch_displacement_bits(p,x,len*8); } void xed_operand_values_set_branch_displacement_bits(xed_operand_values_t* p, - xed_int32_t x, + xed_int64_t x, unsigned int len) { /* Set the real displacement value x in big-endian form for emitting. * Make sure that the LSB of x is the MSB of the xed3_operand_get_(p)* field * because we emit them starting from the MSB based on the width */ - xed_assert(len==0 || len==8 || len==16 || len==32); - if (len ==0){ + xed_assert(len==0 || len==8 || len==16 || len==32 || len==64); + if (len == 0){ xed3_operand_set_disp(p,0); } else{ @@ -973,7 +978,18 @@ xed_operand_values_dump( const xed_operand_values_t* ov, break; case XED_OPERAND_PTR: if (xed3_operand_get_ptr(ov)) { - xed_int64_t be_disp = xed_operand_values_get_branch_displacement_int32(ov); + xed_int64_t be_disp = xed_operand_values_get_branch_displacement_int64(ov); + xed_bool_t long_mode = xed_operand_values_get_long_mode(ov); + xed_uint_t xed_bits_to_print = long_mode ? 8*8 : 4*8; + emitted = add_comma(emitted,buf,&blen); + blen = xed_strncat(buf, xed_operand_enum_t2str(XED_STATIC_CAST(xed_operand_enum_t,i)),blen); + blen = xed_strncat(buf,":0x",blen); + blen = xed_itoa_hex_zeros(buf+xed_strlen(buf), be_disp, xed_bits_to_print, leading_zeros, blen); + } + break; + case XED_OPERAND_ABSBR: + if (xed3_operand_get_absbr(ov)) { + xed_int64_t be_disp = xed_operand_values_get_branch_displacement_int64(ov); xed_bool_t long_mode = xed_operand_values_get_long_mode(ov); xed_uint_t xed_bits_to_print = long_mode ? 8*8 : 4*8; emitted = add_comma(emitted,buf,&blen); @@ -984,7 +1000,7 @@ xed_operand_values_dump( const xed_operand_values_t* ov, break; case XED_OPERAND_RELBR: if (xed3_operand_get_relbr(ov)) { - xed_int64_t be_disp = xed_operand_values_get_branch_displacement_int32(ov); + xed_int64_t be_disp = xed_operand_values_get_branch_displacement_int64(ov); xed_uint64_t effective_addr; xed_bool_t long_mode; xed_uint_t xed_bits_to_print; diff --git a/src/common/xed-util.c b/src/common/xed-util.c index ed9dafa6..789eedaf 100644 --- a/src/common/xed-util.c +++ b/src/common/xed-util.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -233,7 +233,6 @@ int xed_itoa_hex_zeros(char* buf, int buflen) { const xed_bool_t lowercase=1; return xed_itoa_hex_ul(buf,f,bits_to_print, leading_zeros, buflen, lowercase); - (void) leading_zeros; } int xed_itoa_hex(char* buf, @@ -536,8 +535,8 @@ xed_uint8_t xed_get_byte(xed_uint64_t x, unsigned int i, unsigned int len) { // (The least significant byte is 00) xed_assert (i < len); - return XED_BYTE_CAST(x >> (i*8)); (void)len; //pacify compiler + return XED_BYTE_CAST(x >> (i*8)); } diff --git a/src/dec/xed-decode.c b/src/dec/xed-decode.c index e73434f7..f51f5542 100644 --- a/src/dec/xed-decode.c +++ b/src/dec/xed-decode.c @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2020 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -95,6 +95,17 @@ static void check_src2_dest_match(xed_decoded_inst_t* xds) { } #endif +#if defined(XED_APX) +static XED_INLINE void check_reg0_reg1_match(xed_decoded_inst_t* xds) { + /* Check that the first and second registers do not match */ + xed_reg_enum_t reg0 = xed3_operand_get_reg0(xds); + xed_reg_enum_t reg1 = xed3_operand_get_reg1(xds); + + if (reg0 == reg1) + xed3_operand_set_error(xds,XED_ERROR_BAD_REG_MATCH); +} +#endif + static XED_INLINE void xed_decode_finalize_operand_storage_fields(xed_decoded_inst_t* xds) { @@ -107,6 +118,15 @@ xed_decode_finalize_operand_storage_fields(xed_decoded_inst_t* xds) return; } +#if defined(XED_APX) + xed_iclass_enum_t iclass = xed_decoded_inst_get_iclass(xds); + /* FIXME: for now this is tailored solely for POP2{,P}. A more generic solution with broader restrictions is on the horizon */ + if (iclass == XED_ICLASS_POP2 || iclass == XED_ICLASS_POP2P) { + /* POP2 and POP2P don't allow matching destination registers (first two regs)*/ + check_reg0_reg1_match(xds); + } +#endif + /* We only keep real reps, MPX reps, HLE reps. Refining reps can just mess up subsequent encodes if the iclass or operands get changed by the user. */ @@ -213,6 +233,12 @@ xed_decode_with_features(xed_decoded_inst_t* xedd, if (!xed_decoded_inst_valid_for_chip(xedd, chip)) { return XED_ERROR_INVALID_FOR_CHIP; } +#if defined(XED_APX) + // Check APX instructions with no-APX ISA-SET + if (!chip_supports_apx(xedd) && xed_classify_apx(xedd)){ + return XED_ERROR_INVALID_FOR_CHIP; + } +#endif } if (features) { const xed_isa_set_enum_t isa_set = xed_decoded_inst_get_isa_set(xedd); diff --git a/src/dec/xed-decoded-inst.c b/src/dec/xed-decoded-inst.c index b65dd1cd..d2813c60 100644 --- a/src/dec/xed-decoded-inst.c +++ b/src/dec/xed-decoded-inst.c @@ -136,9 +136,9 @@ xed_decoded_inst_get_modrm(const xed_decoded_inst_t* p) } ///////////////////////////////////////////////////////////////////////// -xed_int32_t +xed_int64_t xed_decoded_inst_get_branch_displacement(const xed_decoded_inst_t* p) { - return xed_operand_values_get_branch_displacement_int32(p); + return xed_operand_values_get_branch_displacement_int64(p); } xed_uint_t xed_decoded_inst_get_branch_displacement_width(const xed_decoded_inst_t* p) { @@ -443,8 +443,8 @@ xed_decoded_inst_compute_variable_width(const xed_decoded_inst_t* p, const xed_operand_t* o) { const xed_uint32_t nelem = xed3_operand_get_nelem(p); const xed_uint32_t element_size = xed3_operand_get_element_size(p); - return nelem*element_size; (void)o; // pacify compiler + return nelem*element_size; } @@ -525,7 +525,7 @@ xed_decoded_inst_operand_length_bits( return len; } - // MEM0, MEM1,PTR, IMM0, IMM1, and RELBR use the width codes now. + // MEM0, MEM1,PTR, IMM0, IMM1, RELBR, and ABSBR use the width codes now. // use the "scalable" width codes from the operand template. len = xed_decoded_inst_get_operand_width_bits(p,o); @@ -755,7 +755,7 @@ void xed_decoded_inst_set_memory_displacement(xed_decoded_inst_t* p, xed_operand_values_set_memory_displacement(p, disp, length_bytes); } void xed_decoded_inst_set_branch_displacement(xed_decoded_inst_t* p, - xed_int32_t disp, + xed_int64_t disp, xed_uint_t length_bytes) { xed_operand_values_set_branch_displacement(p, disp, length_bytes); } @@ -779,7 +779,7 @@ void xed_decoded_inst_set_memory_displacement_bits(xed_decoded_inst_t* p, xed_operand_values_set_memory_displacement_bits(p, disp, length_bits); } void xed_decoded_inst_set_branch_displacement_bits(xed_decoded_inst_t* p, - xed_int32_t disp, + xed_int64_t disp, xed_uint_t length_bits) { xed_operand_values_set_branch_displacement_bits(p, disp, length_bits); } @@ -833,8 +833,8 @@ xed_decoded_inst_vector_length_bits(xed_decoded_inst_t const* const p) /* 0->128, 1->256, 2->512 */ vl_bits = 1 << (vl_encoded+7); #endif - return vl_bits; (void)p; // pacify (msvs) compiler for noavx builds + return vl_bits; } xed_bool_t @@ -879,8 +879,8 @@ xed_bool_t xed_decoded_inst_masking(const xed_decoded_inst_t* p) { if (xed3_operand_get_mask(p) != 0) return 1; #endif - return 0; (void)p; //pacify compiler + return 0; } xed_bool_t xed_decoded_inst_merging(const xed_decoded_inst_t* p) { @@ -897,8 +897,8 @@ xed_bool_t xed_decoded_inst_merging(const xed_decoded_inst_t* p) { return 1; } #endif - return 0; (void)p; //pacify compiler + return 0; } xed_bool_t xed_decoded_inst_zeroing(const xed_decoded_inst_t* p) { #if defined(XED_SUPPORTS_AVX512) @@ -906,8 +906,8 @@ xed_bool_t xed_decoded_inst_zeroing(const xed_decoded_inst_t* p) { if (xed3_operand_get_zeroing(p) == 1) return 1; #endif - return 0; (void)p; //pacify compiler + return 0; } xed_uint_t xed_decoded_inst_avx512_dest_elements(const xed_decoded_inst_t* p) { @@ -989,8 +989,8 @@ xed_decoded_inst_uses_embedded_broadcast(const xed_decoded_inst_t* p) if (xed3_operand_get_bcast(p)) return 1; #endif - return 0; (void) p; + return 0; } xed_bool_t xed_decoded_inst_is_broadcast_instruction(const xed_decoded_inst_t* p) @@ -999,8 +999,8 @@ xed_decoded_inst_is_broadcast_instruction(const xed_decoded_inst_t* p) if (xed_decoded_inst_get_category(p) == XED_CATEGORY_BROADCAST) return 1; #endif - return 0; (void) p; + return 0; } xed_bool_t xed_decoded_inst_is_broadcast(const xed_decoded_inst_t* p) @@ -1012,3 +1012,21 @@ xed_decoded_inst_is_broadcast(const xed_decoded_inst_t* p) return 1; return 0; } + +xed_bool_t +xed_decoded_inst_is_apx_zu(const xed_decoded_inst_t* p) +{ + /* APX-Promoted instructions with ZU(zero-upper) behavior are: + - NDD instructions + - Subgroup of promoted IMUL instructions with 0x69 and 0x6B opcodes + - Subgroup of promoted SETcc instructions */ + +#if defined(XED_APX) + if (xed_decoded_inst_get_extension(p) == XED_EXTENSION_APXEVEX) { + // APX EVEX instructions + return xed3_operand_get_nd(p); + } +#endif + (void) p; + return 0; +} diff --git a/src/dec/xed-disas.c b/src/dec/xed-disas.c index b487aacd..2e45afc4 100644 --- a/src/dec/xed-disas.c +++ b/src/dec/xed-disas.c @@ -200,8 +200,8 @@ xed_decoded_inst_dump_xed_format(const xed_decoded_inst_t* p, blen = xed_strncat(buf, " ", blen); s = buf + xed_strlen(buf); xed_operand_values_print_short(co,s,blen); - return 1; (void) runtime_address; + return 1; } static const char* xed_decoded_inst_print_ptr_size(xed_uint_t bytes) { @@ -963,10 +963,10 @@ static void xed_print_operand( xed_print_info_t* pi ) } case XED_OPERAND_PTR: { - unsigned int disp =(unsigned int) - xed_operand_values_get_branch_displacement_int32(ov); + xed_int64_t disp = + xed_operand_values_get_branch_displacement_int64(ov); - xed_uint_t bits_to_print = xed_operand_values_get_effective_operand_width(ov); + xed_uint_t bits_to_print = xed_decoded_inst_get_branch_displacement_width_bits(ov); if (pi->format_options.xml_a) xed_pi_strcat(pi,""); @@ -980,13 +980,34 @@ static void xed_print_operand( xed_print_info_t* pi ) pi->format_options.lowercase_hex); xml_print_end(pi,"PTR"); break; + } + case XED_OPERAND_ABSBR: { + xed_int64_t disp = + xed_operand_values_get_branch_displacement_int64(ov); + + xed_uint_t bits_to_print = xed_decoded_inst_get_branch_displacement_width_bits(ov); + + if (pi->format_options.xml_a) + xed_pi_strcat(pi,""); + + xed_pi_strcat(pi,"0x"); + pi->blen = xed_itoa_hex_ul(pi->buf+xed_strlen(pi->buf), + disp, + bits_to_print, + leading_zeros, + pi->blen, + pi->format_options.lowercase_hex); + xml_print_end(pi,"ABSBR"); + break; } - case XED_OPERAND_RELBR: + + case XED_OPERAND_RELBR: { if (xed_inst_iclass(xi) == XED_ICLASS_XBEGIN) pi->truncate_eip_eosz16 = 0; print_relbr(pi); break; + } default: { xed_operand_ctype_enum_t ctype = xed_operand_get_ctype(op_name); @@ -1420,10 +1441,11 @@ xed_decoded_inst_dump_att_format_internal( break; } + case XED_OPERAND_ABSBR: case XED_OPERAND_PTR: { - unsigned int disp = + xed_int64_t disp = xed_decoded_inst_get_branch_displacement(pi->p); - xed_uint_t bits_to_print = xed_operand_values_get_effective_operand_width(ov); + xed_uint_t bits_to_print = xed_decoded_inst_get_branch_displacement_width_bits(ov); xed_pi_strcat(pi,"$0x"); pi->blen = xed_itoa_hex_ul(pi->buf+xed_strlen(pi->buf), @@ -1435,11 +1457,12 @@ xed_decoded_inst_dump_att_format_internal( break; } - case XED_OPERAND_RELBR: + case XED_OPERAND_RELBR: { if (xed_inst_iclass(xi) == XED_ICLASS_XBEGIN) pi->truncate_eip_eosz16 = 0; print_relbr(pi); break; + } default: { xed_operand_ctype_enum_t ctype = xed_operand_get_ctype(op_name); diff --git a/src/dec/xed-ild-extension.c b/src/dec/xed-ild-extension.c index 119e86b3..d05dceaa 100644 --- a/src/dec/xed-ild-extension.c +++ b/src/dec/xed-ild-extension.c @@ -19,46 +19,18 @@ END_LEGAL */ /// instruction length decoder extension #include "xed-ild-extension.h" -#include "xed-error-enum.h" -#include "xed-ild-enum.h" -void xed_ild_ext_internal_scanner(xed_decoded_inst_t *d) -{ - (void)d; -} - -xed_bool_t xed_ild_ext_opcode_scanner_needed(xed_decoded_inst_t *d) -{ - xed_bool_t yes = !xed3_operand_get_error(d); -#if defined(XED_AVX) - return (yes && !xed3_operand_get_vexvalid(d)); -#else - return yes; -#endif -} void xed_ild_ext_set_ubit(xed_decoded_inst_t *d, xed_uint8_t ubit) { - xed3_operand_set_ubit(d, ubit & 1); - xed3_operand_set_vexvalid(d, 2); +#if defined(XED_APX) + if (xed_ild_ext_apx_supported(d)) { + // APX reinterprets the Ubit with memory fourth index EGPR bit. + xed3_operand_set_rexx4(d, ~ubit & 1); + xed3_operand_set_ubit(d, 1); // Satisfies instruction pattern's UBIT condition + return; + } +#endif // XED_APX - if (ubit==0) - xed3_operand_set_error(d, XED_ERROR_BAD_EVEX_UBIT); -} - -xed_uint8_t xed_ild_ext_set_evex_map(xed_decoded_inst_t* d, xed_uint8_t map) -{ - xed3_operand_set_map(d, map); - return map; -} - -void xed_ild_ext_finalize_evex(xed_decoded_inst_t *d, xed_uint_t length) -{ - (void)d; - (void)length; -} - -void xed_ild_ext_finalize(xed_decoded_inst_t *d) -{ - (void)d; + xed3_operand_set_ubit(d, ubit & 1); } diff --git a/src/dec/xed-ild.c b/src/dec/xed-ild.c index 39c5bd99..c7636077 100644 --- a/src/dec/xed-ild.c +++ b/src/dec/xed-ild.c @@ -32,12 +32,23 @@ END_LEGAL */ #include "xed-chip-features-table.h" #include "xed-ild-extension.h" - -static void init_has_disp_regular_table(void); -static void init_eamode_table(void); -static void init_has_sib_table(void); static void set_has_modrm(xed_decoded_inst_t* d); +static XED_INLINE void too_short(xed_decoded_inst_t* d) +{ + xed3_operand_set_out_of_bytes(d, 1); + if ( xed3_operand_get_max_bytes(d) >= XED_MAX_INSTRUCTION_BYTES) + xed3_operand_set_error(d,XED_ERROR_INSTR_TOO_LONG); + else + xed3_operand_set_error(d,XED_ERROR_BUFFER_TOO_SHORT); +} + +static XED_INLINE void bad_map(xed_decoded_inst_t* d) +{ + xed3_operand_set_map(d,XED_ILD_MAP_INVALID); + xed3_operand_set_error(d,XED_ERROR_BAD_MAP); +} + // We set the hints to the values {1,2} here but later move the values to // {3,4} if the prefixes are actually used for a Jcc branch. If 3e is used // as a CET no-track indicator, it remains as the value 2. @@ -305,7 +316,7 @@ static void prefix_scanner(xed_decoded_inst_t* d) /* all available length was taken by prefixes, but we for sure need * at least one additional byte for an opcode, hence we are out of * bytes. */ - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -384,7 +395,7 @@ static void vex_c4_scanner(xed_decoded_inst_t* d) else { // not enough bytes to check vex prefix validity xed_decoded_inst_set_length(d, max_bytes); - xed_ild_ext_too_short(d); + too_short(d); return ; } @@ -416,7 +427,7 @@ static void vex_c4_scanner(xed_decoded_inst_t* d) eff_map = c4byte1.s.map; if (xed_ild_map_valid_vex(eff_map) == 0) { - xed_ild_ext_bad_map(d); + bad_map(d); return; } // this is a success indicator for downstreaam decoding @@ -430,7 +441,7 @@ static void vex_c4_scanner(xed_decoded_inst_t* d) * hence we are out of bytes. */ xed_decoded_inst_set_length(d, max_bytes); - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -454,7 +465,7 @@ static void vex_c5_scanner(xed_decoded_inst_t* d) else { // not enough bytes to check vex prefix validity xed_decoded_inst_set_length(d, max_bytes); - xed_ild_ext_too_short(d); + too_short(d); return ; } // c5 xx opc @@ -489,7 +500,7 @@ static void vex_c5_scanner(xed_decoded_inst_t* d) * of bytes. */ xed_decoded_inst_set_length(d, max_bytes); - xed_ild_ext_too_short(d); + too_short(d); return ; } } @@ -525,7 +536,7 @@ static void xop_scanner(xed_decoded_inst_t* d) else { /* don't have enough bytes to check if it's an xop prefix, we * are out of bytes */ - xed_ild_ext_too_short(d); + too_short(d); return ; } @@ -553,7 +564,7 @@ static void xop_scanner(xed_decoded_inst_t* d) xed3_operand_set_map(d,XED_ILD_AMD_XOPA); } else - xed_ild_ext_bad_map(d); + bad_map(d); xed3_operand_set_rexr(d, ~xop_byte1.s.r_inv&1); @@ -580,7 +591,7 @@ static void xop_scanner(xed_decoded_inst_t* d) * hence we are out of bytes. */ xed_decoded_inst_set_length(d, max_bytes); - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -651,7 +662,7 @@ static void get_next_as_opcode(xed_decoded_inst_t* d) { xed3_operand_set_srm(d, xed_modrm_rm(b)); } else { - xed_ild_ext_too_short(d); + too_short(d); } } @@ -805,7 +816,7 @@ void xed_modrm_scanner(xed_decoded_inst_t* d) } else { /*need modrm, but length >= max_bytes, and we are out of bytes*/ - xed_ild_ext_too_short(d); + too_short(d); return; } @@ -842,7 +853,7 @@ static void sib_scanner(xed_decoded_inst_t* d) } } else { /*has_sib but not enough length -> out of bytes */ - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -912,7 +923,7 @@ static void disp_scanner(xed_decoded_inst_t* d) xed_decoded_inst_set_length(d, length + disp_bytes); } else { - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -1010,6 +1021,16 @@ static void evex_vex_opcode_scanner(xed_decoded_inst_t* d) } #endif +static XED_INLINE xed_bool_t opcode_scanner_needed(xed_decoded_inst_t *d) +{ +#if defined(XED_APX) + return (xed3_operand_get_error(d) == XED_ERROR_NONE) && (xed3_operand_get_rex2(d) == 0); +#else + return (xed3_operand_get_error(d) == XED_ERROR_NONE); +#endif +} + + static void opcode_scanner(xed_decoded_inst_t* d) { unsigned char length = xed_decoded_inst_get_length(d); @@ -1033,7 +1054,7 @@ static void opcode_scanner(xed_decoded_inst_t* d) length++; /* eat the 0x0F */ if (length >= xed3_operand_get_max_bytes(d)) { - xed_ild_ext_too_short(d); + too_short(d); return; } @@ -1073,7 +1094,7 @@ static void opcode_scanner(xed_decoded_inst_t* d) } } // handle no map found... FIXME - xed_ild_ext_bad_map(d); + bad_map(d); } ////////////////////////////////////////////////////////////////////////// @@ -1081,47 +1102,71 @@ static void opcode_scanner(xed_decoded_inst_t* d) #if defined(XED_SUPPORTS_AVX512) -typedef union { // AVX512 - struct { +typedef union { + struct { // AVX512 xed_uint32_t map:4; xed_uint32_t rr_inv:1; xed_uint32_t b_inv:1; xed_uint32_t x_inv:1; xed_uint32_t r_inv:1; - xed_uint32_t pad:24; } s; - struct { + struct { // AVX512 coarse xed_uint32_t map:4; xed_uint32_t rr_inv:1; xed_uint32_t b_inv:1; xed_uint32_t rx_inv:2; - xed_uint32_t pad:24; } coarse; - xed_uint32_t u32; -} xed_avx512_payload1_t; +#if defined(XED_APX) + struct { // APX + xed_uint32_t map:3; + xed_uint32_t rexb4:1; + xed_uint32_t rr_inv:1; + xed_uint32_t b_inv:1; + xed_uint32_t x_inv:1; + xed_uint32_t r_inv:1; + } apx; +#endif // XED_APX + xed_uint8_t u8; +} xed_evex_payload1_t; -typedef union { // AVX512 - struct { +typedef union { + struct { // AVX512 xed_uint32_t pp:2; xed_uint32_t ubit:1; xed_uint32_t vexdest210:3; xed_uint32_t vexdest3:1; xed_uint32_t rexw:1; - xed_uint32_t pad:24; } s; - xed_uint32_t u32; -} xed_avx512_payload2_t; + xed_uint8_t u8; +} xed_evex_payload2_t; -typedef union{ // AVX512 only - struct { +typedef union{ + xed_uint8_t u8; + struct { // AVX512 xed_uint32_t mask:3; xed_uint32_t vexdest4p:1; xed_uint32_t bcrc:1; xed_uint32_t llrc:2; xed_uint32_t z:1; } s; - xed_uint8_t u8; -} xed_avx512_payload3_t; +#if defined(XED_APX) + struct { // APX standard EVEX encoding + xed_uint32_t mask_zero:2; + xed_uint32_t nf:1; + xed_uint32_t vexdest4p:1; + xed_uint32_t nd:1; + xed_uint32_t llrc:2; + xed_uint32_t zeroing:1; + } apx; + struct { // APX CCMP/CTEST reinterpretation + xed_uint32_t scc:4; + xed_uint32_t nd:1; + xed_uint32_t llrc:2; + xed_uint32_t zeroing:1; + } apx_scc; +#endif // XED_APX +} xed_evex_payload3_t; + static XED_INLINE xed_bool_t chip_supports_avx512(xed_decoded_inst_t* d) { @@ -1135,6 +1180,31 @@ static XED_INLINE xed_bool_t chip_supports_avx512(xed_decoded_inst_t* d) return 0; } +#if defined(XED_APX) +xed_bool_t chip_supports_apx(xed_decoded_inst_t* d) +{ + xed_chip_enum_t chip = xed_decoded_inst_get_input_chip(d); + if (chip == XED_CHIP_INVALID) + chip = XED_CHIP_ALL; + if (chip < XED_CHIP_LAST) + return xed_chip_supports_apx[chip]; + return 0; +} +#endif + +static XED_INLINE xed_uint8_t set_evex_map(xed_decoded_inst_t *d, xed_evex_payload1_t evex1) +{ + xed_uint8_t map = evex1.s.map; // 4 bits map +#if defined(XED_APX) + if (xed_ild_ext_apx_supported(d)) + { + map = evex1.apx.map; // 3 bits map + xed3_operand_set_rexb4(d, evex1.apx.rexb4); + } +#endif // XED_APX + xed3_operand_set_map(d, map); + return map; +} static void evex_scanner(xed_decoded_inst_t* d) { @@ -1151,10 +1221,10 @@ static void evex_scanner(xed_decoded_inst_t* d) if (b == 0x62) { - xed_avx512_payload1_t evex1; + xed_evex_payload1_t evex1; // check that it is not a BOUND instruction if (length + 1 < max_bytes) { - evex1.u32 = xed_decoded_inst_get_byte(d, length+1); + evex1.u8 = xed_decoded_inst_get_byte(d, length+1); if (!xed_ild_ext_mode_64b(d) && evex1.coarse.rx_inv != 3) { /*this is a BOUND instruction */ return; @@ -1162,13 +1232,13 @@ static void evex_scanner(xed_decoded_inst_t* d) } else { xed_decoded_inst_set_length(d, max_bytes); - xed_ild_ext_too_short(d); + too_short(d); return; } if (evex1.coarse.map == 0) { xed_decoded_inst_set_length(d, length+2); - xed_ild_ext_bad_map(d); + bad_map(d); return; } @@ -1177,10 +1247,12 @@ static void evex_scanner(xed_decoded_inst_t* d) enough bytes available to read 4 bytes for evex prefix and 1 byte for an opcode */ if (length + 4 < max_bytes) { - xed_avx512_payload2_t evex2; + xed_evex_payload2_t evex2; xed_uint_t eff_map; + + xed3_operand_set_vexvalid(d, 2); - evex2.u32 = xed_decoded_inst_get_byte(d, length+2); + evex2.u8 = xed_decoded_inst_get_byte(d, length+2); // above check guarantees that r and x are 1 in 16/32b mode. if (xed_ild_ext_mode_64b(d)) { @@ -1190,10 +1262,10 @@ static void evex_scanner(xed_decoded_inst_t* d) xed3_operand_set_rexr4(d, ~evex1.s.rr_inv & 1); } - eff_map = xed_ild_ext_set_evex_map(d, evex1.s.map); + eff_map = set_evex_map(d, evex1); if (xed_ild_map_valid_evex(eff_map) == 0) { xed_decoded_inst_set_length(d, length+4); // we saw 62 xx xx xx opc - xed_ild_ext_bad_map(d); + bad_map(d); return; } @@ -1203,9 +1275,15 @@ static void evex_scanner(xed_decoded_inst_t* d) xed_ild_ext_set_ubit(d, evex2.s.ubit); xed_ild_set_pp_vex_prefix(d, evex2.s.pp); + if(evex2.s.pp == 1) { // Compacted 0x66 prefix + // Affect the instruction's effective OSZ (EOSZ). + // Used by EVEX instructions with GPR scalable operand size (GPRv/GPRy/...) + xed3_operand_set_osz(d, 1); + } + if (!xed3_operand_get_error(d)) { - xed_avx512_payload3_t evex3; + xed_evex_payload3_t evex3; evex3.u8 = xed_decoded_inst_get_byte(d, length+3); xed3_operand_set_zeroing(d, evex3.s.z); @@ -1223,8 +1301,25 @@ static void evex_scanner(xed_decoded_inst_t* d) xed3_operand_set_mask(d, evex3.s.mask); if (evex3.s.mask == 0 && evex3.s.z == 1) bad_z_aaa(d); + +#if defined(XED_APX) + if (xed_ild_ext_apx_supported(d)) + { + /* Set the APX reinterpreted EVEX bits */ + // APX promoted instruction's NT will clear the MASK and BCRC XED operands, + // but all other non-APX EVEX instructions won't clear the NF/ND operands. + xed3_operand_set_nf(d, evex3.apx.nf); // EVEX.mask[2] -> APX.NF + xed3_operand_set_nd(d, evex3.apx.nd); // EVEX.bcrc -> APX.ND + if (xed3_operand_get_map(d) == 4) { + // For CCMP/CTEST (currently MAP4 only). + // ILD has no mapping for opcode to CCMP/CTEST instructions. + // Therefore, always set the SCC operand. + // Note, APX pattern's NTs will clear it later if needed. + xed3_operand_set_scc(d, evex3.apx_scc.scc); + } + } +#endif // XED_APX } - xed_ild_ext_finalize_evex(d, length); length += 4; xed_decoded_inst_set_length(d, length); @@ -1241,11 +1336,142 @@ static void evex_scanner(xed_decoded_inst_t* d) else { /*there is no enough bytes, hence we are out of bytes */ xed_decoded_inst_set_length(d, max_bytes); // we saw 62 0b11xx.xxxx - xed_ild_ext_too_short(d); + too_short(d); } } } +#if defined(XED_APX) +static XED_INLINE void check_rex2_opcode(xed_decoded_inst_t *d) +{ + /* Check REX2 opcode applicability restrictions */ + // + // assumption: REX2 prefix detected. + // + // This should be called right after a completed REX2 opcode scanning + // to get the right illegal instructions length + // + // TBD: Move to instructions PATTERN restriction + // + xed_ild_map_enum_t const map = xed3_operand_get_map(d); + xed_bits_t const opcode = xed3_operand_get_nominal_opcode(d); + xed_bits_t const opcode_upper_nibble = (opcode & 0xf0) >> 4; + + if (map == XED_ILD_LEGACY_MAP0) { + switch (opcode_upper_nibble) + { + case 0x4: + case 0x7: + case 0xE: + /* opcode in [0x4*, 0x7*, 0xE*] */ + xed3_operand_set_error(d, XED_ERROR_BAD_REX2_PREFIX); + break; + + case 0xA: + /* opcode in [0xA*] */ + if (opcode != 0xA1) // (0xA1 for JMPABS) + xed3_operand_set_error(d, XED_ERROR_BAD_REX2_PREFIX); + break; + + default: + break; + } + } + else if (map == XED_ILD_LEGACY_MAP1) { + switch (opcode_upper_nibble) + { + case 0x3: + case 0x8: + /* opcode in [0x3*, 0x8*] */ + xed3_operand_set_error(d, XED_ERROR_BAD_REX2_PREFIX); + break; + + default: + break; + } + } + else { + xed_derror("Illegal mapId for REX2 prefix"); + } +} + +static XED_INLINE void rex2_scanner(xed_decoded_inst_t *d) +{ + /* assumption: length < max_bytes + * This is checked in prefix_scanner. + * If any other scanner is added before evex_scanner, this condition + * should be preserved. + */ + xed_uint8_t length = xed_decoded_inst_get_length(d); + xed_uint8_t b = xed_decoded_inst_get_byte(d, length); + + /* REX2 Prefix */ + if (b == 0xD5) + { + xed_uint8_t max_bytes = xed3_operand_get_max_bytes(d); + + if (xed3_operand_get_rex(d)) + { + xed3_operand_set_error(d, XED_ERROR_BAD_REX_PREFIX); + // Keep parsing to provide a richer content of error... + } + + /* Eat REX2 prefix byte and start the payload parser */ + // D5 rex2 opc + // ^ + if (length + 1 < max_bytes) + { + // D5 rex2 opc + // ^ + static const xed_ild_map_enum_t rex2_bit_to_map[] = { + XED_ILD_LEGACY_MAP0, XED_ILD_LEGACY_MAP1}; + xed_uint8_t map_bit = 0; + xed_uint8_t rex2 = xed_decoded_inst_get_byte(d, length + 1); + xed3_operand_set_rex2(d, 1); + + map_bit = (rex2>>7) & 1; + xed3_operand_set_map(d, rex2_bit_to_map[map_bit]); + + xed3_operand_set_rexr4(d, (rex2>>6) & 1); + xed3_operand_set_rexx4(d, (rex2>>5) & 1); + xed3_operand_set_rexb4(d, (rex2>>4) & 1); + // Lower nibble - REX like + xed3_operand_set_rexw(d, (rex2>>3) & 1); + xed3_operand_set_rexr(d, (rex2>>2) & 1); + xed3_operand_set_rexx(d, (rex2>>1) & 1); + xed3_operand_set_rexb(d, (rex2) & 1); + + + // d5 rex2 opc + // ^ + if (length + 2 >= max_bytes) + { + xed_decoded_inst_set_length(d, max_bytes); // We saw D5 xx + too_short(d); + return; + } + + /* REX2 Opcode scanner */ + length += 2; + b = xed_decoded_inst_get_byte(d, length); + xed3_operand_set_nominal_opcode(d, b); + xed3_operand_set_pos_nominal_opcode(d, length); + xed3_operand_set_srm(d, xed_modrm_rm(b)); + xed_decoded_inst_set_length(d, length+1); // We saw D5 xx opc + xed_set_downstream_info(d,0); + + /* REX2 legal Opcode checker*/ + check_rex2_opcode(d); + } + else + { + xed_decoded_inst_set_length(d, max_bytes); // We saw D5 + too_short(d); + } + } +} +#endif // XED_APX + static void imm_scanner(xed_decoded_inst_t* d) { xed_uint8_t imm_bytes; @@ -1273,7 +1499,7 @@ static void imm_scanner(xed_decoded_inst_t* d) return; } else { - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -1303,13 +1529,13 @@ static void imm_scanner(xed_decoded_inst_t* d) xed3_operand_set_uimm1(d, *imm_ptr); } else {/* Ugly code */ - xed_ild_ext_too_short(d); + too_short(d); return; } } } else { - xed_ild_ext_too_short(d); + too_short(d); return; } } @@ -1407,26 +1633,30 @@ xed_instruction_length_decode(xed_decoded_inst_t* ild) if (xed3_operand_get_out_of_bytes(ild)) return; - xed_ild_ext_internal_scanner(ild); - - if (xed3_operand_get_out_of_bytes(ild)) - return; - if (xed3_operand_get_vexvalid(ild)) { catch_invalid_rex_or_legacy_prefixes(ild); catch_invalid_mode(ild); } - // previous scanners also eat the opcode - if (xed_ild_ext_opcode_scanner_needed(ild)) - opcode_scanner(ild); - + if (!xed3_operand_get_vexvalid(ild)) { + // Scan the legacy encoding space +#if defined(XED_APX) + if (chip_supports_apx(ild) && xed_ild_ext_apx_supported(ild)) { + rex2_scanner(ild); + } +#endif // XED_APX + if (opcode_scanner_needed(ild)) { + opcode_scanner(ild); + } + } + + if (xed3_operand_get_out_of_bytes(ild)) + return; + xed_modrm_scanner(ild); sib_scanner(ild); disp_scanner(ild); imm_scanner(ild); - - xed_ild_ext_finalize(ild); } #include "xed-chip-modes.h" diff --git a/src/enc/xed-encode.c b/src/enc/xed-encode.c index a89f2b27..7980ec38 100644 --- a/src/enc/xed-encode.c +++ b/src/enc/xed-encode.c @@ -1,6 +1,6 @@ /* BEGIN_LEGAL -Copyright (c) 2022 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -251,7 +251,7 @@ xed_encoder_request_set_effective_address_size( xed_encoder_request_t* p, } void xed_encoder_request_set_branch_displacement(xed_encoder_request_t* p, - xed_int32_t brdisp, + xed_int64_t brdisp, xed_uint_t nbytes) { xed_operand_values_set_branch_displacement(p, brdisp, nbytes); } @@ -259,6 +259,9 @@ void xed_encoder_request_set_branch_displacement(xed_encoder_request_t* p, void xed_encoder_request_set_relbr(xed_encoder_request_t* p) { xed3_operand_set_relbr(p,1); } +void xed_encoder_request_set_absbr(xed_encoder_request_t* p) { + xed3_operand_set_absbr(p,1); +} void xed_encoder_request_set_ptr(xed_encoder_request_t* p) { xed3_operand_set_ptr(p,1); } diff --git a/src/enc/xed-encoder-hl.c b/src/enc/xed-encoder-hl.c index b2e99899..a07269d0 100644 --- a/src/enc/xed-encoder-hl.c +++ b/src/enc/xed-encoder-hl.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -52,7 +52,7 @@ xed_bool_t xed_convert_to_encoder_request(xed_encoder_request_t* out, real_operands++; break; - case XED_ENCODER_OPERAND_TYPE_BRDISP: + case XED_ENCODER_OPERAND_TYPE_REL_BRDISP: xed_encoder_request_set_branch_displacement(out, op->u.brdisp, op->width_bits/8); //FIXME: bits interface @@ -60,6 +60,15 @@ xed_bool_t xed_convert_to_encoder_request(xed_encoder_request_t* out, xed_encoder_request_set_relbr(out); real_operands++; break; + + case XED_ENCODER_OPERAND_TYPE_ABS_BRDISP: + xed_encoder_request_set_branch_displacement(out, + op->u.brdisp, + op->width_bits/8); //FIXME: bits interface + xed_encoder_request_set_operand_order(out, real_operands, XED_OPERAND_ABSBR); + xed_encoder_request_set_absbr(out); + real_operands++; + break; case XED_ENCODER_OPERAND_TYPE_SEG0: xed_encoder_request_set_seg0(out, op->u.reg); diff --git a/src/encdec/xed-patch.c b/src/encdec/xed-patch.c index 014192bc..73077f8b 100644 --- a/src/encdec/xed-patch.c +++ b/src/encdec/xed-patch.c @@ -1,6 +1,6 @@ -/*BEGIN_LEGAL +/* BEGIN_LEGAL -Copyright (c) 2019 Intel Corporation +Copyright (c) 2023 Intel Corporation Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -40,7 +40,7 @@ xed_patch_disp(xed_decoded_inst_t* xedd, xed_bool_t -xed_patch_relbr(xed_decoded_inst_t* xedd, +xed_patch_brdisp(xed_decoded_inst_t* xedd, xed_uint8_t* itext, xed_encoder_operand_t disp) { diff --git a/tests/REBASE.TESTS b/tests/REBASE.TESTS index 4bf757f3..81ac1502 100755 --- a/tests/REBASE.TESTS +++ b/tests/REBASE.TESTS @@ -1 +1 @@ -./run-cmd.py --build-dir ../obj/wkit/bin --rebase-tests --tests tests-base --tests tests-avx512 --tests tests-xop --tests test-avx512pf --tests tests-cet --tests tests-via --tests tests-syntax --tests tests-amx --tests tests-prefetch +./run-cmd.py --build-dir ../obj/wkit/bin --rebase-tests --tests tests-base --tests tests-avx512 --tests tests-xop --tests test-avx512pf --tests tests-cet --tests tests-via --tests tests-syntax --tests tests-amx --tests tests-prefetch --tests tests-apx diff --git a/tests/RECREATE.TESTS b/tests/RECREATE.TESTS index 75a85fff..78f70465 100755 --- a/tests/RECREATE.TESTS +++ b/tests/RECREATE.TESTS @@ -5,6 +5,8 @@ ./run-cmd.py --build-dir ../obj/wkit/bin --otests tests-amx -b bulk-tests/amx-bulk-tests.txt +./run-cmd.py --build-dir ../obj/wkit/bin --otests tests-apx -b bulk-tests/apx-bulk-tests.txt + ./run-cmd.py --build-dir ../obj/wkit/bin --otests tests-xop -b bulk-tests/amd-xop-bulk-tests.txt ./run-cmd.py --build-dir ../obj/wkit/bin --otests tests-cet -b bulk-tests/cet-tests.txt ./run-cmd.py --build-dir ../obj/wkit/bin --otests tests-via -b bulk-tests/via-padlock-tests.txt diff --git a/tests/RUN.TESTS b/tests/RUN.TESTS index c42081ff..9ca007b5 100755 --- a/tests/RUN.TESTS +++ b/tests/RUN.TESTS @@ -1 +1 @@ -./run-cmd.py --build-dir ../obj/wkit/bin --tests tests-base --tests tests-avx512 --tests tests-avx512pf --tests tests-cet --tests tests-via --tests tests-amx --tests tests-prefetch +./run-cmd.py --build-dir ../obj/wkit/bin --tests tests-base --tests tests-avx512 --tests tests-avx512pf --tests tests-cet --tests tests-via --tests tests-amx --tests tests-prefetch --tests tests-apx diff --git a/tests/bulk-tests/apx-bulk-tests.txt b/tests/bulk-tests/apx-bulk-tests.txt new file mode 100644 index 00000000..b1f00904 --- /dev/null +++ b/tests/bulk-tests/apx-bulk-tests.txt @@ -0,0 +1,96 @@ +#BEGIN_LEGAL +# +#Copyright (c) 2023 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#END_LEGAL + +########################## REX2 ########################## +# Check MODRM.mod=0, [rm] addressing form instructions +DEC APX ; BUILDDIR/xed -64 -ih TESTDIR/../rex2-mod0-dec-in.txt + +# Check MODRM.mod=1 instructions (All register combinations) +DEC APX ; BUILDDIR/xed -64 -ih TESTDIR/../rex2-mod1-dec-in.txt + +DEC APX ; BUILDDIR/xed -64 -d 66d580124C8300 # REX2 MAP1 +DEC APX ; BUILDDIR/xed -64 -d 66d5b3124C8301 # REX2 MAP1 EGPRs +DEC APX ; BUILDDIR/xed -64 -d d50080C401 # No [A,C,D,B]h on REX2 (tests SPL) +DEC APX ; BUILDDIR/xed -64 -d 66d5C0124C8300 # Ignore non-reg rex2.r4 bit +DEC APX ; BUILDDIR/xed -64 -d 440f2203 # mov_cr cr8, rbx (REX Prefix) +DEC APX ; BUILDDIR/xed -64 -d d5842203 # mov_cr cr8, rbx (REX2 Prefix) +DEC APX ; BUILDDIR/xed -64 -d d5c42203 # mov_cr cr8, rbx (illegal REX2.R4=1) +DEC APX ; BUILDDIR/xed -64 -d f36467d598aef7 # UMONITOR A_GPR_B() +DEC APX ; BUILDDIR/xed -64 -d 66d5cdc5db08 # PEXTRW (0xC5 opcode) +DEC APX ; BUILDDIR/xed -64 -d d598c4fe77 # PINSRW (0xC4 opcode) +DEC APX ; BUILDDIR/xed -64 -d d5986212 # PUNPCKLDQ (0x62 opcode) +DEC APX ; BUILDDIR/xed -64 -d d51890 # REX2 (B4=1,B3=0) | 0x90 -> XCHG +DEC APX ; BUILDDIR/xed -64 -d d50190 # REX2 (B4=0,B3=1) | 0x90 -> XCHG +DEC APX ; BUILDDIR/xed -64 -d d50890 # REX2 (B4=0,B3=0) | 0x90 -> NOP + +# Test XSAVE EGPRs limitations +DEC APX ; BUILDDIR/xed -64 -d 0fae2411 # No prefix +DEC APX ; BUILDDIR/xed -64 -d 4b0fae2411 # REX prefix +DEC APX ; BUILDDIR/xed -64 -d d588ae2411 # REX2 prefix Error + +# Test REX2 opcode applicability restriction +DEC APX ; BUILDDIR/xed -64 -d d5 00 a4 + +# Disable APX decode support +DEC ; BUILDDIR/xed -64 -set NO_APX 1 -d d5 84 67 0f # REX2 prefix + + +########################## EVEX EGPRs ########################## +# Test EGPRs accessability using EVEX.R4 and reinterpreted EVEX.B4 and EVEX.X4 bits + +DEC APX ; BUILDDIR/xed -64 -d 62B1E10A580C38 # MODRM() using X4 +DEC APX ; BUILDDIR/xed -64 -d 62D9742854041f # MODRM() using B4 +DEC APX ; BUILDDIR/xed -64 -d 62DB7D0814C706 # GPR32_B() using B4 +DEC APX ; BUILDDIR/xed -64 -d 62B9E10A580C38 # MODRM() using B4 and X4 +DEC APX ; BUILDDIR/xed -64 -d 6265FE082DC0 # GPR64_R() using R4 bit + +DEC APX ; BUILDDIR/xed -64 -d 62fa7d49a02c00 # VSCATTER VSIB memory pattern + +DEC ; BUILDDIR/xed -64 -set NO_APX 1 -d 6265FE082DC0 # R4 | no-APX + EGPR -> error +DEC ; BUILDDIR/xed -64 -set NO_APX 1 -d 62 61 fa 48 7a f7 # Check Ubit error w/o APX + +########################## EVEX Promoted ISA ################### +DEC APX ; BUILDDIR/xed -64 -isa-set -ih TESTDIR/../gen-enc-layer-apx-f.txt # Decode all iforms + +# Test scalable operand size NT e.g GPRv()/SIMMz(). (pp=1 -> OSZ 66 prefix) +DEC APX ; BUILDDIR/xed -64 -d 62D4 FC 0881EC33C00003 # EOSZ=3 (w=1, pp=0) +DEC APX ; BUILDDIR/xed -64 -d 62D4 FD 0881EC33C00003 # EOSZ=3 (w=1, pp=1) +DEC APX ; BUILDDIR/xed -64 -d 62D4 7C 0881EC33C00003 # EOSZ=2 (w=0, pp=0) +DEC APX ; BUILDDIR/xed -64 -d 62D4 7D 0881EC33C0 # EOSZ=1 (w=0, pp=1) + +DEC ; BUILDDIR/xed -64 -set NO_APX 1 -d 62F2E408F2C2 # NO_APX + promoted-from-vex -> error + +########################## JMPABS ################### +DEC APX ; BUILDDIR/xed -64 -d 67 D500 A10123456789012345 # JMPABS, EASZ=2 -> illegal +DEC APX ; BUILDDIR/xed-ex1 -64 D500 A10123456789012345 # JMPABS, EASZ=3 +DEC APX ; BUILDDIR/xed -64 -d A10123456789012345 # MOV, EASZ=3 +DEC APX ; BUILDDIR/xed -64 -d 67 A101234567 # MOV, EASZ=2 + +################### APX chip-check ################### +DEC APX ; BUILDDIR/xed-ex1 -64 -chip FUTURE 62D2FC00F3D9 # EGPR +DEC APX ; BUILDDIR/xed-ex1 -64 -chip FUTURE 66d580124C8300 # REX2 +DEC APX ; BUILDDIR/xed-ex1 -64 -chip ICE_LAKE 62B9E10A580C38 # using B4 and X4 +DEC APX ; BUILDDIR/xed-ex1 -64 -chip FUTURE 62B9E10A580C38 # using B4 and X4 + +################## miscellaneous Example1 Tests ################ +DEC APX ; BUILDDIR/xed-ex1 -64 6254F50239C8 # DFV +DEC APX ; BUILDDIR/xed-ex1 -64 62D4BC1883D001 # NDD + ZU +DEC APX ; BUILDDIR/xed-ex1 -64 6254FC0CF4C0 # NF + +################## Instruction Restrictions Tests ################ +DEC APX ; BUILDDIR/xed-ex1 -64 62D434188FC1 # POP2 has dest1!=dest2 restriction diff --git a/tests/bulk-tests/avx512x-bulk-tests.txt b/tests/bulk-tests/avx512x-bulk-tests.txt index a2b14c89..793587de 100644 --- a/tests/bulk-tests/avx512x-bulk-tests.txt +++ b/tests/bulk-tests/avx512x-bulk-tests.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. @@ -38,7 +38,7 @@ DEC AVX512X ; BUILDDIR/xed -d C4E17B92FB DEC AVX512X ; BUILDDIR/xed -64 -d 6762E17488551425E00F5305 DEC AVX512X ; BUILDDIR/xed -64 -d 62 C1 DF 68 58 E5 DEC AVX512X ; BUILDDIR/xed -d f3 67 2e f0 f3 f3 65 67 62 f1 5d 8e d0 8e e7 -DEC AVX512X ; BUILDDIR/xed -64 -d 62 61 fa 48 7a f7 +DEC AVX10 ; BUILDDIR/xed-ex1 -64 62F5742858C2 DEC ENC AVX512X ; BUILDDIR/xed -de 62 f1 7e 08 2c 55 04 DEC ENC AVX512X ; BUILDDIR/xed -32 -de 62 f5 7e 08 79 c0 DEC AVX512X ; BUILDDIR/xed -set NO_VEX 1 -d C4E1FB93D8 diff --git a/tests/bulk-tests/new-tests.txt b/tests/bulk-tests/new-tests.txt index 9d8835f4..4ddad5ff 100644 --- a/tests/bulk-tests/new-tests.txt +++ b/tests/bulk-tests/new-tests.txt @@ -1,6 +1,6 @@ #BEGIN_LEGAL # -#Copyright (c) 2022 Intel Corporation +#Copyright (c) 2023 Intel Corporation # # Licensed under the Apache License, Version 2.0 (the "License"); # you may not use this file except in compliance with the License. diff --git a/tests/run-cmd.py b/tests/run-cmd.py index d62af611..54baf890 100755 --- a/tests/run-cmd.py +++ b/tests/run-cmd.py @@ -274,7 +274,7 @@ def work(): action="append", default=[], help="Codes for test subsetting (DEC, ENC, AVX, " - + "AVX512X, AVX512PF, AMX, IPREFETCH, HSW, AMD, XOP, VIA)." + + "AVX512X, AVX512PF, AMX, APX, AVX10, IPREFETCH, HSW, AMD, XOP, VIA)." + " Only used for running tests, not creating them.") env.parse_args() diff --git a/tests/tests-amx/test-00009/stdout.reference b/tests/tests-amx/test-00009/stdout.reference index f66c850e..7e9bfb76 100644 --- a/tests/tests-amx/test-00009/stdout.reference +++ b/tests/tests-amx/test-00009/stdout.reference @@ -22,7 +22,8 @@ ATTRIBUTES: NOTSX EXCEPTION TYPE: AMX_E4 AMX ISA SET: [AMX_BF16] -0 CPUID BIT NAME: [AMX_TILES] - Leaf 0x00000007, subleaf 0x00000000, EDX[24] -1 CPUID BIT NAME: [AMX_BF16] - Leaf 0x00000007, subleaf 0x00000000, EDX[22] +0 CPUID GROUP NAME: [AMX_BF16] + 0 CPUID RECORD NAME: [AMX_TILES] + {Leaf 0x00000007, subleaf 0x00000000, EDX[24:24]} = 1 + 1 CPUID RECORD NAME: [AMX_BF16] + {Leaf 0x00000007, subleaf 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\ No newline at end of file diff --git a/tests/tests-apx/rex2-mod0-dec-in.txt b/tests/tests-apx/rex2-mod0-dec-in.txt new file mode 100644 index 00000000..087df0eb --- /dev/null +++ b/tests/tests-apx/rex2-mod0-dec-in.txt @@ -0,0 +1 @@ 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\ No newline at end of file diff --git a/tests/tests-apx/test-00000/cmd b/tests/tests-apx/test-00000/cmd new file mode 100644 index 00000000..59fdc3bd --- /dev/null +++ b/tests/tests-apx/test-00000/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -ih TESTDIR/../rex2-mod0-dec-in.txt diff --git a/tests/tests-apx/test-00000/codes b/tests/tests-apx/test-00000/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00000/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00000/retcode.reference b/tests/tests-apx/test-00000/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00000/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00000/stderr.reference b/tests/tests-apx/test-00000/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00000/stdout.reference b/tests/tests-apx/test-00000/stdout.reference new file mode 100644 index 00000000..52817174 --- /dev/null +++ b/tests/tests-apx/test-00000/stdout.reference @@ -0,0 +1,777 @@ +XDIS 0: DATAXFER BASE D5088900 mov qword ptr [rax], rax +XDIS 4: DATAXFER BASE D5088901 mov qword ptr [rcx], rax +XDIS 8: DATAXFER BASE D5088902 mov qword ptr [rdx], rax +XDIS c: DATAXFER BASE D5088903 mov qword ptr [rbx], rax +XDIS 10: DATAXFER BASE D5088906 mov qword ptr [rsi], rax +XDIS 14: DATAXFER BASE D5088907 mov qword ptr [rdi], rax +XDIS 18: DATAXFER BASE D5098900 mov qword ptr [r8], rax +XDIS 1c: DATAXFER BASE D5098901 mov qword ptr [r9], rax +XDIS 20: DATAXFER BASE D5098902 mov qword ptr [r10], rax +XDIS 24: DATAXFER BASE D5098903 mov qword ptr [r11], rax +XDIS 28: DATAXFER BASE D5098906 mov qword ptr [r14], rax +XDIS 2c: DATAXFER BASE D5098907 mov qword ptr [r15], rax +XDIS 30: DATAXFER BASE D5188900 mov qword ptr [r16], rax +XDIS 34: DATAXFER BASE D5188901 mov qword ptr [r17], rax +XDIS 38: DATAXFER BASE D5188902 mov qword ptr [r18], rax +XDIS 3c: DATAXFER BASE D5188903 mov qword ptr [r19], rax +XDIS 40: DATAXFER BASE D5188906 mov qword ptr [r22], rax +XDIS 44: DATAXFER BASE D5188907 mov qword ptr [r23], rax +XDIS 48: DATAXFER BASE D5198900 mov qword ptr [r24], rax +XDIS 4c: DATAXFER BASE D5198901 mov qword ptr [r25], rax +XDIS 50: DATAXFER BASE D5198902 mov qword ptr [r26], rax +XDIS 54: DATAXFER BASE D5198903 mov qword ptr [r27], rax +XDIS 58: DATAXFER BASE D5198906 mov qword ptr [r30], rax +XDIS 5c: DATAXFER BASE D5198907 mov qword ptr [r31], rax +XDIS 60: DATAXFER BASE D5088908 mov qword ptr [rax], rcx +XDIS 64: DATAXFER BASE D5088909 mov qword ptr [rcx], rcx +XDIS 68: DATAXFER BASE D508890A mov qword ptr [rdx], rcx +XDIS 6c: DATAXFER BASE D508890B mov qword ptr [rbx], rcx +XDIS 70: DATAXFER BASE D508890E mov qword ptr [rsi], rcx +XDIS 74: DATAXFER BASE D508890F mov qword ptr [rdi], rcx +XDIS 78: DATAXFER BASE D5098908 mov qword ptr [r8], rcx +XDIS 7c: DATAXFER BASE D5098909 mov qword ptr [r9], rcx +XDIS 80: DATAXFER BASE D509890A mov qword ptr [r10], rcx +XDIS 84: DATAXFER BASE D509890B mov qword ptr [r11], rcx +XDIS 88: DATAXFER BASE D509890E mov qword ptr [r14], rcx +XDIS 8c: DATAXFER BASE D509890F mov qword ptr [r15], rcx +XDIS 90: DATAXFER BASE D5188908 mov qword ptr [r16], rcx +XDIS 94: DATAXFER BASE D5188909 mov qword ptr [r17], rcx +XDIS 98: DATAXFER BASE D518890A mov qword ptr [r18], rcx +XDIS 9c: DATAXFER BASE D518890B mov qword ptr [r19], rcx +XDIS a0: DATAXFER BASE D518890E mov qword ptr [r22], rcx +XDIS a4: DATAXFER BASE D518890F mov qword ptr [r23], rcx +XDIS a8: DATAXFER BASE D5198908 mov qword ptr [r24], rcx +XDIS ac: DATAXFER BASE D5198909 mov qword ptr [r25], rcx +XDIS b0: DATAXFER BASE D519890A mov qword ptr [r26], rcx +XDIS b4: DATAXFER BASE D519890B mov qword ptr [r27], rcx +XDIS b8: DATAXFER BASE D519890E mov qword ptr [r30], rcx +XDIS bc: DATAXFER BASE D519890F mov qword ptr [r31], rcx +XDIS c0: DATAXFER BASE D5088910 mov qword ptr [rax], rdx +XDIS c4: DATAXFER BASE D5088911 mov qword ptr [rcx], rdx +XDIS c8: DATAXFER BASE D5088912 mov qword ptr [rdx], rdx +XDIS cc: DATAXFER BASE D5088913 mov qword ptr [rbx], rdx +XDIS d0: DATAXFER BASE D5088916 mov qword ptr [rsi], rdx +XDIS d4: DATAXFER BASE D5088917 mov qword ptr [rdi], rdx +XDIS d8: DATAXFER BASE D5098910 mov qword ptr [r8], rdx +XDIS dc: DATAXFER BASE D5098911 mov qword ptr [r9], rdx +XDIS e0: DATAXFER BASE D5098912 mov qword ptr [r10], rdx +XDIS e4: DATAXFER BASE D5098913 mov qword ptr [r11], rdx +XDIS e8: DATAXFER BASE D5098916 mov qword ptr [r14], rdx +XDIS ec: DATAXFER BASE D5098917 mov qword ptr [r15], rdx +XDIS f0: DATAXFER BASE D5188910 mov qword ptr [r16], rdx +XDIS f4: DATAXFER BASE D5188911 mov qword ptr [r17], rdx +XDIS f8: DATAXFER BASE D5188912 mov qword ptr [r18], rdx +XDIS fc: DATAXFER BASE D5188913 mov qword ptr [r19], rdx +XDIS 100: DATAXFER BASE D5188916 mov qword ptr [r22], rdx +XDIS 104: DATAXFER BASE D5188917 mov qword ptr [r23], rdx +XDIS 108: DATAXFER BASE D5198910 mov qword ptr [r24], rdx +XDIS 10c: DATAXFER BASE D5198911 mov qword ptr [r25], rdx +XDIS 110: DATAXFER BASE D5198912 mov qword ptr [r26], rdx +XDIS 114: DATAXFER BASE D5198913 mov qword ptr [r27], rdx +XDIS 118: DATAXFER BASE D5198916 mov qword ptr [r30], rdx +XDIS 11c: DATAXFER BASE D5198917 mov qword ptr [r31], rdx +XDIS 120: DATAXFER BASE D5088918 mov qword ptr [rax], rbx +XDIS 124: DATAXFER BASE D5088919 mov qword ptr [rcx], rbx +XDIS 128: DATAXFER BASE D508891A mov qword ptr [rdx], rbx +XDIS 12c: DATAXFER BASE D508891B mov qword ptr [rbx], rbx +XDIS 130: DATAXFER BASE D508891E mov qword ptr [rsi], rbx +XDIS 134: DATAXFER BASE D508891F mov qword ptr [rdi], rbx +XDIS 138: DATAXFER BASE D5098918 mov qword ptr [r8], rbx +XDIS 13c: DATAXFER BASE D5098919 mov qword ptr [r9], rbx +XDIS 140: DATAXFER BASE D509891A mov qword ptr [r10], rbx +XDIS 144: DATAXFER BASE D509891B mov qword ptr [r11], rbx +XDIS 148: DATAXFER BASE D509891E mov qword ptr [r14], rbx +XDIS 14c: DATAXFER BASE D509891F mov qword ptr [r15], rbx +XDIS 150: DATAXFER BASE D5188918 mov qword ptr [r16], rbx +XDIS 154: DATAXFER BASE D5188919 mov qword ptr [r17], rbx +XDIS 158: DATAXFER BASE D518891A mov qword ptr [r18], rbx +XDIS 15c: DATAXFER BASE D518891B mov qword ptr [r19], rbx +XDIS 160: DATAXFER BASE D518891E mov qword ptr [r22], rbx +XDIS 164: DATAXFER BASE D518891F mov qword ptr [r23], rbx +XDIS 168: DATAXFER BASE D5198918 mov qword ptr [r24], rbx +XDIS 16c: DATAXFER BASE D5198919 mov qword ptr [r25], rbx +XDIS 170: DATAXFER BASE D519891A mov qword ptr [r26], rbx +XDIS 174: DATAXFER BASE D519891B mov qword ptr [r27], rbx +XDIS 178: DATAXFER BASE D519891E mov qword ptr [r30], rbx +XDIS 17c: DATAXFER BASE D519891F mov qword ptr [r31], rbx +XDIS 180: DATAXFER BASE D5088920 mov qword ptr [rax], rsp +XDIS 184: DATAXFER BASE D5088921 mov qword ptr [rcx], rsp +XDIS 188: DATAXFER BASE D5088922 mov qword ptr [rdx], rsp +XDIS 18c: DATAXFER BASE D5088923 mov qword ptr [rbx], rsp +XDIS 190: DATAXFER BASE D5088926 mov qword ptr [rsi], rsp +XDIS 194: DATAXFER BASE D5088927 mov qword ptr [rdi], rsp +XDIS 198: DATAXFER BASE D5098920 mov qword ptr [r8], rsp +XDIS 19c: DATAXFER BASE D5098921 mov qword ptr [r9], rsp +XDIS 1a0: DATAXFER BASE D5098922 mov qword ptr [r10], rsp +XDIS 1a4: DATAXFER BASE D5098923 mov qword ptr [r11], rsp +XDIS 1a8: DATAXFER BASE D5098926 mov qword ptr [r14], rsp +XDIS 1ac: DATAXFER BASE D5098927 mov qword ptr [r15], rsp +XDIS 1b0: DATAXFER BASE D5188920 mov qword ptr [r16], rsp +XDIS 1b4: DATAXFER BASE D5188921 mov qword ptr [r17], rsp +XDIS 1b8: DATAXFER BASE D5188922 mov qword ptr [r18], rsp +XDIS 1bc: DATAXFER BASE D5188923 mov qword ptr [r19], rsp +XDIS 1c0: DATAXFER BASE D5188926 mov qword ptr [r22], rsp +XDIS 1c4: DATAXFER BASE D5188927 mov qword ptr [r23], rsp +XDIS 1c8: DATAXFER BASE D5198920 mov qword ptr [r24], rsp +XDIS 1cc: DATAXFER BASE D5198921 mov qword ptr [r25], rsp +XDIS 1d0: DATAXFER BASE D5198922 mov qword ptr [r26], rsp +XDIS 1d4: DATAXFER BASE D5198923 mov qword ptr [r27], rsp +XDIS 1d8: DATAXFER BASE D5198926 mov qword ptr [r30], rsp +XDIS 1dc: DATAXFER BASE D5198927 mov qword ptr [r31], rsp +XDIS 1e0: DATAXFER BASE D5088928 mov qword ptr [rax], rbp +XDIS 1e4: DATAXFER BASE D5088929 mov qword ptr [rcx], rbp +XDIS 1e8: DATAXFER BASE D508892A mov qword ptr [rdx], rbp +XDIS 1ec: DATAXFER BASE D508892B mov qword ptr [rbx], rbp +XDIS 1f0: DATAXFER BASE D508892E mov qword ptr [rsi], rbp +XDIS 1f4: DATAXFER BASE D508892F mov qword ptr [rdi], rbp +XDIS 1f8: DATAXFER BASE D5098928 mov qword ptr [r8], rbp +XDIS 1fc: DATAXFER BASE D5098929 mov qword ptr [r9], rbp +XDIS 200: DATAXFER BASE D509892A mov qword ptr [r10], rbp +XDIS 204: DATAXFER BASE D509892B mov qword ptr [r11], rbp +XDIS 208: DATAXFER BASE D509892E mov qword ptr [r14], rbp +XDIS 20c: DATAXFER BASE D509892F mov qword ptr [r15], rbp +XDIS 210: DATAXFER BASE D5188928 mov qword ptr [r16], rbp +XDIS 214: DATAXFER BASE D5188929 mov qword ptr [r17], rbp +XDIS 218: DATAXFER BASE D518892A mov qword ptr [r18], rbp +XDIS 21c: DATAXFER BASE D518892B mov qword ptr [r19], rbp +XDIS 220: DATAXFER BASE D518892E mov qword ptr [r22], rbp +XDIS 224: DATAXFER BASE D518892F mov qword ptr [r23], rbp +XDIS 228: DATAXFER BASE D5198928 mov qword ptr [r24], rbp +XDIS 22c: DATAXFER BASE D5198929 mov qword ptr [r25], rbp +XDIS 230: DATAXFER BASE D519892A mov qword ptr [r26], rbp +XDIS 234: DATAXFER BASE D519892B mov qword ptr [r27], rbp +XDIS 238: DATAXFER BASE D519892E mov qword ptr [r30], rbp +XDIS 23c: DATAXFER BASE D519892F mov qword ptr [r31], rbp +XDIS 240: DATAXFER BASE D5088930 mov qword ptr [rax], rsi +XDIS 244: DATAXFER BASE D5088931 mov qword ptr [rcx], rsi +XDIS 248: DATAXFER BASE D5088932 mov qword ptr [rdx], rsi +XDIS 24c: DATAXFER BASE D5088933 mov qword ptr [rbx], rsi +XDIS 250: DATAXFER BASE D5088936 mov qword ptr [rsi], rsi +XDIS 254: DATAXFER BASE D5088937 mov qword ptr [rdi], rsi +XDIS 258: DATAXFER BASE D5098930 mov qword ptr [r8], rsi +XDIS 25c: DATAXFER BASE D5098931 mov qword ptr [r9], rsi +XDIS 260: DATAXFER BASE D5098932 mov qword ptr [r10], rsi +XDIS 264: DATAXFER BASE D5098933 mov qword ptr [r11], rsi +XDIS 268: DATAXFER BASE D5098936 mov qword ptr [r14], rsi +XDIS 26c: DATAXFER BASE D5098937 mov qword ptr [r15], rsi +XDIS 270: DATAXFER BASE D5188930 mov qword ptr [r16], rsi +XDIS 274: DATAXFER BASE D5188931 mov qword ptr [r17], rsi +XDIS 278: DATAXFER BASE D5188932 mov qword ptr [r18], rsi +XDIS 27c: DATAXFER BASE D5188933 mov qword ptr [r19], rsi +XDIS 280: DATAXFER BASE D5188936 mov qword ptr [r22], rsi +XDIS 284: DATAXFER BASE D5188937 mov qword ptr [r23], rsi +XDIS 288: DATAXFER BASE D5198930 mov qword ptr [r24], rsi +XDIS 28c: DATAXFER BASE D5198931 mov qword ptr [r25], rsi +XDIS 290: DATAXFER BASE D5198932 mov qword ptr [r26], rsi +XDIS 294: DATAXFER BASE D5198933 mov qword ptr [r27], rsi +XDIS 298: DATAXFER BASE D5198936 mov qword ptr [r30], rsi +XDIS 29c: DATAXFER BASE D5198937 mov qword ptr [r31], rsi +XDIS 2a0: DATAXFER BASE D5088938 mov qword ptr [rax], rdi +XDIS 2a4: DATAXFER BASE D5088939 mov qword ptr [rcx], rdi +XDIS 2a8: DATAXFER BASE D508893A mov qword ptr [rdx], rdi +XDIS 2ac: DATAXFER BASE D508893B mov qword ptr [rbx], rdi +XDIS 2b0: DATAXFER BASE D508893E mov qword ptr [rsi], rdi +XDIS 2b4: DATAXFER BASE D508893F mov qword ptr [rdi], rdi +XDIS 2b8: DATAXFER BASE D5098938 mov qword ptr [r8], rdi +XDIS 2bc: DATAXFER BASE D5098939 mov qword ptr [r9], rdi +XDIS 2c0: DATAXFER BASE D509893A mov qword ptr [r10], rdi +XDIS 2c4: DATAXFER BASE D509893B mov qword ptr [r11], rdi +XDIS 2c8: DATAXFER BASE D509893E mov qword ptr [r14], rdi +XDIS 2cc: DATAXFER BASE D509893F mov qword ptr [r15], rdi +XDIS 2d0: DATAXFER BASE D5188938 mov qword ptr [r16], rdi +XDIS 2d4: DATAXFER BASE D5188939 mov qword ptr [r17], rdi +XDIS 2d8: DATAXFER BASE D518893A mov qword ptr [r18], rdi +XDIS 2dc: DATAXFER BASE D518893B mov qword ptr [r19], rdi +XDIS 2e0: DATAXFER BASE D518893E mov qword ptr [r22], rdi +XDIS 2e4: DATAXFER BASE D518893F mov qword ptr [r23], rdi +XDIS 2e8: DATAXFER BASE D5198938 mov qword ptr [r24], rdi +XDIS 2ec: DATAXFER BASE D5198939 mov qword ptr [r25], rdi +XDIS 2f0: DATAXFER BASE D519893A mov qword ptr [r26], rdi +XDIS 2f4: DATAXFER BASE D519893B mov qword ptr [r27], rdi +XDIS 2f8: DATAXFER BASE D519893E mov qword ptr [r30], rdi +XDIS 2fc: DATAXFER BASE D519893F mov qword ptr [r31], rdi +XDIS 300: DATAXFER BASE D50C8900 mov qword ptr [rax], r8 +XDIS 304: DATAXFER BASE D50C8901 mov qword ptr [rcx], r8 +XDIS 308: DATAXFER BASE D50C8902 mov qword ptr [rdx], r8 +XDIS 30c: DATAXFER BASE D50C8903 mov qword ptr [rbx], r8 +XDIS 310: DATAXFER BASE D50C8906 mov qword ptr [rsi], r8 +XDIS 314: DATAXFER BASE D50C8907 mov qword ptr [rdi], r8 +XDIS 318: DATAXFER BASE D50D8900 mov qword ptr [r8], r8 +XDIS 31c: DATAXFER BASE D50D8901 mov qword ptr [r9], r8 +XDIS 320: DATAXFER BASE D50D8902 mov qword ptr [r10], r8 +XDIS 324: DATAXFER BASE D50D8903 mov qword ptr [r11], r8 +XDIS 328: DATAXFER BASE D50D8906 mov qword ptr [r14], r8 +XDIS 32c: DATAXFER BASE D50D8907 mov qword ptr [r15], r8 +XDIS 330: DATAXFER BASE D51C8900 mov qword ptr [r16], r8 +XDIS 334: DATAXFER BASE D51C8901 mov qword ptr [r17], r8 +XDIS 338: DATAXFER BASE D51C8902 mov qword ptr [r18], r8 +XDIS 33c: DATAXFER BASE D51C8903 mov qword ptr [r19], r8 +XDIS 340: DATAXFER BASE D51C8906 mov qword ptr [r22], r8 +XDIS 344: DATAXFER BASE D51C8907 mov qword ptr [r23], r8 +XDIS 348: DATAXFER BASE D51D8900 mov qword ptr [r24], r8 +XDIS 34c: DATAXFER BASE D51D8901 mov qword ptr [r25], r8 +XDIS 350: DATAXFER BASE D51D8902 mov qword ptr [r26], r8 +XDIS 354: DATAXFER BASE D51D8903 mov qword ptr [r27], r8 +XDIS 358: DATAXFER BASE D51D8906 mov qword ptr [r30], r8 +XDIS 35c: DATAXFER BASE D51D8907 mov qword ptr [r31], r8 +XDIS 360: DATAXFER BASE D50C8908 mov qword ptr [rax], r9 +XDIS 364: DATAXFER BASE D50C8909 mov qword ptr [rcx], r9 +XDIS 368: DATAXFER BASE D50C890A mov qword ptr [rdx], r9 +XDIS 36c: DATAXFER BASE D50C890B mov qword ptr [rbx], r9 +XDIS 370: DATAXFER BASE D50C890E mov qword ptr [rsi], r9 +XDIS 374: DATAXFER BASE D50C890F mov qword ptr [rdi], r9 +XDIS 378: DATAXFER BASE D50D8908 mov qword ptr [r8], r9 +XDIS 37c: DATAXFER BASE D50D8909 mov qword ptr [r9], r9 +XDIS 380: DATAXFER BASE D50D890A mov qword ptr [r10], r9 +XDIS 384: DATAXFER BASE D50D890B mov qword ptr [r11], r9 +XDIS 388: DATAXFER BASE D50D890E mov qword ptr [r14], r9 +XDIS 38c: DATAXFER BASE D50D890F mov qword ptr [r15], r9 +XDIS 390: DATAXFER BASE D51C8908 mov qword ptr [r16], r9 +XDIS 394: DATAXFER BASE D51C8909 mov qword ptr [r17], r9 +XDIS 398: DATAXFER BASE D51C890A mov qword ptr [r18], r9 +XDIS 39c: DATAXFER BASE D51C890B mov qword ptr [r19], r9 +XDIS 3a0: DATAXFER BASE D51C890E mov qword ptr [r22], r9 +XDIS 3a4: DATAXFER BASE D51C890F mov qword ptr [r23], r9 +XDIS 3a8: DATAXFER BASE D51D8908 mov qword ptr [r24], r9 +XDIS 3ac: DATAXFER BASE D51D8909 mov qword ptr [r25], r9 +XDIS 3b0: DATAXFER BASE D51D890A mov qword ptr [r26], r9 +XDIS 3b4: DATAXFER BASE D51D890B mov qword ptr [r27], r9 +XDIS 3b8: DATAXFER BASE D51D890E mov qword ptr [r30], r9 +XDIS 3bc: DATAXFER BASE D51D890F mov qword ptr [r31], r9 +XDIS 3c0: DATAXFER BASE D50C8910 mov qword ptr [rax], r10 +XDIS 3c4: DATAXFER BASE D50C8911 mov qword ptr [rcx], r10 +XDIS 3c8: DATAXFER BASE D50C8912 mov qword ptr [rdx], r10 +XDIS 3cc: DATAXFER BASE D50C8913 mov qword ptr [rbx], r10 +XDIS 3d0: DATAXFER BASE D50C8916 mov qword ptr [rsi], r10 +XDIS 3d4: DATAXFER BASE D50C8917 mov qword ptr [rdi], r10 +XDIS 3d8: DATAXFER BASE D50D8910 mov qword ptr [r8], r10 +XDIS 3dc: DATAXFER BASE D50D8911 mov qword ptr [r9], r10 +XDIS 3e0: DATAXFER BASE D50D8912 mov qword ptr [r10], r10 +XDIS 3e4: DATAXFER BASE D50D8913 mov qword ptr [r11], r10 +XDIS 3e8: DATAXFER BASE D50D8916 mov qword ptr [r14], r10 +XDIS 3ec: DATAXFER BASE D50D8917 mov qword ptr [r15], r10 +XDIS 3f0: DATAXFER BASE D51C8910 mov qword ptr [r16], r10 +XDIS 3f4: DATAXFER BASE D51C8911 mov qword ptr [r17], r10 +XDIS 3f8: DATAXFER BASE D51C8912 mov qword ptr [r18], r10 +XDIS 3fc: DATAXFER BASE D51C8913 mov qword ptr [r19], r10 +XDIS 400: DATAXFER BASE D51C8916 mov qword ptr [r22], r10 +XDIS 404: DATAXFER BASE D51C8917 mov qword ptr [r23], r10 +XDIS 408: DATAXFER BASE D51D8910 mov qword ptr [r24], r10 +XDIS 40c: DATAXFER BASE D51D8911 mov qword ptr [r25], r10 +XDIS 410: DATAXFER BASE D51D8912 mov qword ptr [r26], r10 +XDIS 414: DATAXFER BASE D51D8913 mov qword ptr [r27], r10 +XDIS 418: DATAXFER BASE D51D8916 mov qword ptr [r30], r10 +XDIS 41c: DATAXFER BASE D51D8917 mov qword ptr [r31], r10 +XDIS 420: DATAXFER BASE D50C8918 mov qword ptr [rax], r11 +XDIS 424: DATAXFER BASE D50C8919 mov qword ptr [rcx], r11 +XDIS 428: DATAXFER BASE D50C891A mov qword ptr [rdx], r11 +XDIS 42c: DATAXFER BASE D50C891B mov qword ptr [rbx], r11 +XDIS 430: DATAXFER BASE D50C891E mov qword ptr [rsi], r11 +XDIS 434: DATAXFER BASE D50C891F mov qword ptr [rdi], r11 +XDIS 438: DATAXFER BASE D50D8918 mov qword ptr [r8], r11 +XDIS 43c: DATAXFER BASE D50D8919 mov qword ptr [r9], r11 +XDIS 440: DATAXFER BASE D50D891A mov qword ptr [r10], r11 +XDIS 444: DATAXFER BASE D50D891B mov qword ptr [r11], r11 +XDIS 448: DATAXFER BASE D50D891E mov qword ptr [r14], r11 +XDIS 44c: DATAXFER BASE D50D891F mov qword ptr [r15], r11 +XDIS 450: DATAXFER BASE D51C8918 mov qword ptr [r16], r11 +XDIS 454: DATAXFER BASE D51C8919 mov qword ptr [r17], r11 +XDIS 458: DATAXFER BASE D51C891A mov qword ptr [r18], r11 +XDIS 45c: DATAXFER BASE D51C891B mov qword ptr [r19], r11 +XDIS 460: DATAXFER BASE D51C891E mov qword ptr [r22], r11 +XDIS 464: DATAXFER BASE D51C891F mov qword ptr [r23], r11 +XDIS 468: DATAXFER BASE D51D8918 mov qword ptr [r24], r11 +XDIS 46c: DATAXFER BASE D51D8919 mov qword ptr [r25], r11 +XDIS 470: DATAXFER BASE D51D891A mov qword ptr [r26], r11 +XDIS 474: DATAXFER BASE D51D891B mov qword ptr [r27], r11 +XDIS 478: DATAXFER BASE D51D891E mov qword ptr [r30], r11 +XDIS 47c: DATAXFER BASE D51D891F mov qword ptr [r31], r11 +XDIS 480: DATAXFER BASE D50C8920 mov qword ptr [rax], r12 +XDIS 484: DATAXFER BASE D50C8921 mov qword ptr [rcx], r12 +XDIS 488: DATAXFER BASE D50C8922 mov qword ptr [rdx], r12 +XDIS 48c: DATAXFER BASE D50C8923 mov qword ptr [rbx], r12 +XDIS 490: DATAXFER BASE D50C8926 mov qword ptr [rsi], r12 +XDIS 494: DATAXFER BASE D50C8927 mov qword ptr [rdi], r12 +XDIS 498: DATAXFER BASE D50D8920 mov qword ptr [r8], r12 +XDIS 49c: DATAXFER BASE D50D8921 mov qword ptr [r9], r12 +XDIS 4a0: DATAXFER BASE D50D8922 mov qword ptr [r10], r12 +XDIS 4a4: DATAXFER BASE D50D8923 mov qword ptr [r11], r12 +XDIS 4a8: DATAXFER BASE D50D8926 mov qword ptr [r14], r12 +XDIS 4ac: DATAXFER BASE D50D8927 mov qword ptr [r15], r12 +XDIS 4b0: DATAXFER BASE D51C8920 mov qword ptr [r16], r12 +XDIS 4b4: DATAXFER BASE D51C8921 mov qword ptr [r17], r12 +XDIS 4b8: DATAXFER BASE D51C8922 mov qword ptr [r18], r12 +XDIS 4bc: DATAXFER BASE D51C8923 mov qword ptr [r19], r12 +XDIS 4c0: DATAXFER BASE D51C8926 mov qword ptr [r22], r12 +XDIS 4c4: DATAXFER BASE D51C8927 mov qword ptr [r23], r12 +XDIS 4c8: DATAXFER BASE D51D8920 mov qword ptr [r24], r12 +XDIS 4cc: DATAXFER BASE D51D8921 mov qword ptr [r25], r12 +XDIS 4d0: DATAXFER BASE D51D8922 mov qword ptr [r26], r12 +XDIS 4d4: DATAXFER BASE D51D8923 mov qword ptr [r27], r12 +XDIS 4d8: DATAXFER BASE D51D8926 mov qword ptr [r30], r12 +XDIS 4dc: DATAXFER BASE D51D8927 mov qword ptr [r31], r12 +XDIS 4e0: DATAXFER BASE D50C8928 mov qword ptr [rax], r13 +XDIS 4e4: DATAXFER BASE D50C8929 mov qword ptr [rcx], r13 +XDIS 4e8: DATAXFER BASE D50C892A mov qword ptr [rdx], r13 +XDIS 4ec: DATAXFER BASE D50C892B mov qword ptr [rbx], r13 +XDIS 4f0: DATAXFER BASE D50C892E mov qword ptr [rsi], r13 +XDIS 4f4: DATAXFER BASE D50C892F mov qword ptr [rdi], r13 +XDIS 4f8: DATAXFER BASE D50D8928 mov qword ptr [r8], r13 +XDIS 4fc: DATAXFER BASE D50D8929 mov qword ptr [r9], r13 +XDIS 500: DATAXFER BASE D50D892A mov qword ptr [r10], r13 +XDIS 504: DATAXFER BASE D50D892B mov qword ptr [r11], r13 +XDIS 508: DATAXFER BASE D50D892E mov qword ptr [r14], r13 +XDIS 50c: DATAXFER BASE D50D892F mov qword ptr [r15], r13 +XDIS 510: DATAXFER BASE D51C8928 mov qword ptr [r16], r13 +XDIS 514: DATAXFER BASE D51C8929 mov qword ptr [r17], r13 +XDIS 518: DATAXFER BASE D51C892A mov qword ptr [r18], r13 +XDIS 51c: DATAXFER BASE D51C892B mov qword ptr [r19], r13 +XDIS 520: DATAXFER BASE D51C892E mov qword ptr [r22], r13 +XDIS 524: DATAXFER BASE D51C892F mov qword ptr [r23], r13 +XDIS 528: DATAXFER BASE D51D8928 mov qword ptr [r24], r13 +XDIS 52c: DATAXFER BASE D51D8929 mov qword ptr [r25], r13 +XDIS 530: DATAXFER BASE D51D892A mov qword ptr [r26], r13 +XDIS 534: DATAXFER BASE D51D892B mov qword ptr [r27], r13 +XDIS 538: DATAXFER BASE D51D892E mov qword ptr [r30], r13 +XDIS 53c: DATAXFER BASE D51D892F mov qword ptr [r31], r13 +XDIS 540: DATAXFER BASE D50C8930 mov qword ptr [rax], r14 +XDIS 544: DATAXFER BASE D50C8931 mov qword ptr [rcx], r14 +XDIS 548: DATAXFER BASE D50C8932 mov qword ptr [rdx], r14 +XDIS 54c: DATAXFER BASE D50C8933 mov qword ptr [rbx], r14 +XDIS 550: DATAXFER BASE D50C8936 mov qword ptr [rsi], r14 +XDIS 554: DATAXFER BASE D50C8937 mov qword ptr [rdi], r14 +XDIS 558: DATAXFER BASE D50D8930 mov qword ptr [r8], r14 +XDIS 55c: DATAXFER BASE D50D8931 mov qword ptr [r9], r14 +XDIS 560: DATAXFER BASE D50D8932 mov qword ptr [r10], r14 +XDIS 564: DATAXFER BASE D50D8933 mov qword ptr [r11], r14 +XDIS 568: DATAXFER BASE D50D8936 mov qword ptr [r14], r14 +XDIS 56c: DATAXFER BASE D50D8937 mov qword ptr [r15], r14 +XDIS 570: DATAXFER BASE D51C8930 mov qword ptr [r16], r14 +XDIS 574: DATAXFER BASE D51C8931 mov qword ptr [r17], r14 +XDIS 578: DATAXFER BASE D51C8932 mov qword ptr [r18], r14 +XDIS 57c: DATAXFER BASE D51C8933 mov qword ptr [r19], r14 +XDIS 580: DATAXFER BASE D51C8936 mov qword ptr [r22], r14 +XDIS 584: DATAXFER BASE D51C8937 mov qword ptr [r23], r14 +XDIS 588: DATAXFER BASE D51D8930 mov qword ptr [r24], r14 +XDIS 58c: DATAXFER BASE D51D8931 mov qword ptr [r25], r14 +XDIS 590: DATAXFER BASE D51D8932 mov qword ptr [r26], r14 +XDIS 594: DATAXFER BASE D51D8933 mov qword ptr [r27], r14 +XDIS 598: DATAXFER BASE D51D8936 mov qword ptr [r30], r14 +XDIS 59c: DATAXFER BASE D51D8937 mov qword ptr [r31], r14 +XDIS 5a0: DATAXFER BASE D50C8938 mov qword ptr [rax], r15 +XDIS 5a4: DATAXFER BASE D50C8939 mov qword ptr [rcx], r15 +XDIS 5a8: DATAXFER BASE D50C893A mov qword ptr [rdx], r15 +XDIS 5ac: DATAXFER BASE D50C893B mov qword ptr [rbx], r15 +XDIS 5b0: DATAXFER BASE D50C893E mov qword ptr [rsi], r15 +XDIS 5b4: DATAXFER BASE D50C893F mov qword ptr [rdi], r15 +XDIS 5b8: DATAXFER BASE D50D8938 mov qword ptr [r8], r15 +XDIS 5bc: DATAXFER BASE D50D8939 mov qword ptr [r9], r15 +XDIS 5c0: DATAXFER BASE D50D893A mov qword ptr [r10], r15 +XDIS 5c4: DATAXFER BASE D50D893B mov qword ptr [r11], r15 +XDIS 5c8: DATAXFER BASE D50D893E mov qword ptr [r14], r15 +XDIS 5cc: DATAXFER BASE D50D893F mov qword ptr [r15], r15 +XDIS 5d0: DATAXFER BASE D51C8938 mov qword ptr [r16], r15 +XDIS 5d4: DATAXFER BASE D51C8939 mov qword ptr [r17], r15 +XDIS 5d8: DATAXFER BASE D51C893A mov qword ptr [r18], r15 +XDIS 5dc: DATAXFER BASE D51C893B mov qword ptr [r19], r15 +XDIS 5e0: DATAXFER BASE D51C893E mov qword ptr [r22], r15 +XDIS 5e4: DATAXFER BASE D51C893F mov qword ptr [r23], r15 +XDIS 5e8: DATAXFER BASE D51D8938 mov qword ptr [r24], r15 +XDIS 5ec: DATAXFER BASE D51D8939 mov qword ptr [r25], r15 +XDIS 5f0: DATAXFER BASE D51D893A mov qword ptr [r26], r15 +XDIS 5f4: DATAXFER BASE D51D893B mov qword ptr [r27], r15 +XDIS 5f8: DATAXFER BASE D51D893E mov qword ptr [r30], r15 +XDIS 5fc: DATAXFER BASE D51D893F mov qword ptr [r31], r15 +XDIS 600: DATAXFER BASE D5488900 mov qword ptr [rax], r16 +XDIS 604: DATAXFER BASE D5488901 mov qword ptr [rcx], r16 +XDIS 608: DATAXFER BASE D5488902 mov qword ptr [rdx], r16 +XDIS 60c: DATAXFER BASE D5488903 mov qword ptr [rbx], r16 +XDIS 610: DATAXFER BASE D5488906 mov qword ptr [rsi], r16 +XDIS 614: DATAXFER BASE D5488907 mov qword ptr [rdi], r16 +XDIS 618: DATAXFER BASE D5498900 mov qword ptr [r8], r16 +XDIS 61c: DATAXFER BASE D5498901 mov qword ptr [r9], r16 +XDIS 620: DATAXFER BASE D5498902 mov qword ptr [r10], r16 +XDIS 624: DATAXFER BASE D5498903 mov qword ptr [r11], r16 +XDIS 628: DATAXFER BASE D5498906 mov qword ptr [r14], r16 +XDIS 62c: DATAXFER BASE D5498907 mov qword ptr [r15], r16 +XDIS 630: DATAXFER BASE D5588900 mov qword ptr [r16], r16 +XDIS 634: DATAXFER BASE D5588901 mov qword ptr [r17], r16 +XDIS 638: DATAXFER BASE D5588902 mov qword ptr [r18], r16 +XDIS 63c: DATAXFER BASE D5588903 mov qword ptr [r19], r16 +XDIS 640: DATAXFER BASE D5588906 mov qword ptr [r22], r16 +XDIS 644: DATAXFER BASE D5588907 mov qword ptr [r23], r16 +XDIS 648: DATAXFER BASE D5598900 mov qword ptr [r24], r16 +XDIS 64c: DATAXFER BASE D5598901 mov qword ptr [r25], r16 +XDIS 650: DATAXFER BASE D5598902 mov qword ptr [r26], r16 +XDIS 654: DATAXFER BASE D5598903 mov qword ptr [r27], r16 +XDIS 658: DATAXFER BASE D5598906 mov qword ptr [r30], r16 +XDIS 65c: DATAXFER BASE D5598907 mov qword ptr [r31], r16 +XDIS 660: DATAXFER BASE D5488908 mov qword ptr [rax], r17 +XDIS 664: DATAXFER BASE D5488909 mov qword ptr [rcx], r17 +XDIS 668: DATAXFER BASE D548890A mov qword ptr [rdx], r17 +XDIS 66c: DATAXFER BASE D548890B mov qword ptr [rbx], r17 +XDIS 670: DATAXFER BASE D548890E mov qword ptr [rsi], r17 +XDIS 674: DATAXFER BASE D548890F mov qword ptr [rdi], r17 +XDIS 678: DATAXFER BASE D5498908 mov qword ptr [r8], r17 +XDIS 67c: DATAXFER BASE D5498909 mov qword ptr [r9], r17 +XDIS 680: DATAXFER BASE D549890A mov qword ptr [r10], r17 +XDIS 684: DATAXFER BASE D549890B mov qword ptr [r11], r17 +XDIS 688: DATAXFER BASE D549890E mov qword ptr [r14], r17 +XDIS 68c: DATAXFER BASE D549890F mov qword ptr [r15], r17 +XDIS 690: DATAXFER BASE D5588908 mov qword ptr [r16], r17 +XDIS 694: DATAXFER BASE D5588909 mov qword ptr [r17], r17 +XDIS 698: DATAXFER BASE D558890A mov qword ptr [r18], r17 +XDIS 69c: DATAXFER BASE D558890B mov qword ptr [r19], r17 +XDIS 6a0: DATAXFER BASE D558890E mov qword ptr [r22], r17 +XDIS 6a4: DATAXFER BASE D558890F mov qword ptr [r23], r17 +XDIS 6a8: DATAXFER BASE D5598908 mov qword ptr [r24], r17 +XDIS 6ac: DATAXFER BASE D5598909 mov qword ptr [r25], r17 +XDIS 6b0: DATAXFER BASE D559890A mov qword ptr [r26], r17 +XDIS 6b4: DATAXFER BASE D559890B mov qword ptr [r27], r17 +XDIS 6b8: DATAXFER BASE D559890E mov qword ptr [r30], r17 +XDIS 6bc: DATAXFER BASE D559890F mov qword ptr [r31], r17 +XDIS 6c0: DATAXFER BASE D5488910 mov qword ptr [rax], r18 +XDIS 6c4: DATAXFER BASE D5488911 mov qword ptr [rcx], r18 +XDIS 6c8: DATAXFER BASE D5488912 mov qword ptr [rdx], r18 +XDIS 6cc: DATAXFER BASE D5488913 mov qword ptr [rbx], r18 +XDIS 6d0: DATAXFER BASE D5488916 mov qword ptr [rsi], r18 +XDIS 6d4: DATAXFER BASE D5488917 mov qword ptr [rdi], r18 +XDIS 6d8: DATAXFER BASE D5498910 mov qword ptr [r8], r18 +XDIS 6dc: DATAXFER BASE D5498911 mov qword ptr [r9], r18 +XDIS 6e0: DATAXFER BASE D5498912 mov qword ptr [r10], r18 +XDIS 6e4: DATAXFER BASE D5498913 mov qword ptr [r11], r18 +XDIS 6e8: DATAXFER BASE D5498916 mov qword ptr [r14], r18 +XDIS 6ec: DATAXFER BASE D5498917 mov qword ptr [r15], r18 +XDIS 6f0: DATAXFER BASE D5588910 mov qword ptr [r16], r18 +XDIS 6f4: DATAXFER BASE D5588911 mov qword ptr [r17], r18 +XDIS 6f8: DATAXFER BASE D5588912 mov qword ptr [r18], r18 +XDIS 6fc: DATAXFER BASE D5588913 mov qword ptr [r19], r18 +XDIS 700: DATAXFER BASE D5588916 mov qword ptr [r22], r18 +XDIS 704: DATAXFER BASE D5588917 mov qword ptr [r23], r18 +XDIS 708: DATAXFER BASE D5598910 mov qword ptr [r24], r18 +XDIS 70c: DATAXFER BASE D5598911 mov qword ptr [r25], r18 +XDIS 710: DATAXFER BASE D5598912 mov qword ptr [r26], r18 +XDIS 714: DATAXFER BASE D5598913 mov qword ptr [r27], r18 +XDIS 718: DATAXFER BASE D5598916 mov qword ptr [r30], r18 +XDIS 71c: DATAXFER BASE D5598917 mov qword ptr [r31], r18 +XDIS 720: DATAXFER BASE D5488918 mov qword ptr [rax], r19 +XDIS 724: DATAXFER BASE D5488919 mov qword ptr [rcx], r19 +XDIS 728: DATAXFER BASE D548891A mov qword ptr [rdx], r19 +XDIS 72c: DATAXFER BASE D548891B mov qword ptr [rbx], r19 +XDIS 730: DATAXFER BASE D548891E mov qword ptr [rsi], r19 +XDIS 734: DATAXFER BASE D548891F mov qword ptr [rdi], r19 +XDIS 738: DATAXFER BASE D5498918 mov qword ptr [r8], r19 +XDIS 73c: DATAXFER BASE D5498919 mov qword ptr [r9], r19 +XDIS 740: DATAXFER BASE D549891A mov qword ptr [r10], r19 +XDIS 744: DATAXFER BASE D549891B mov qword ptr [r11], r19 +XDIS 748: DATAXFER BASE D549891E mov qword ptr [r14], r19 +XDIS 74c: DATAXFER BASE D549891F mov qword ptr [r15], r19 +XDIS 750: DATAXFER BASE D5588918 mov qword ptr [r16], r19 +XDIS 754: DATAXFER BASE D5588919 mov qword ptr [r17], r19 +XDIS 758: DATAXFER BASE D558891A mov qword ptr [r18], r19 +XDIS 75c: DATAXFER BASE D558891B mov qword ptr [r19], r19 +XDIS 760: DATAXFER BASE D558891E mov qword ptr [r22], r19 +XDIS 764: DATAXFER BASE D558891F mov qword ptr [r23], r19 +XDIS 768: DATAXFER BASE D5598918 mov qword ptr [r24], r19 +XDIS 76c: DATAXFER BASE D5598919 mov qword ptr [r25], r19 +XDIS 770: DATAXFER BASE D559891A mov qword ptr [r26], r19 +XDIS 774: DATAXFER BASE D559891B mov qword ptr [r27], r19 +XDIS 778: DATAXFER BASE D559891E mov qword ptr [r30], r19 +XDIS 77c: DATAXFER BASE D559891F mov qword ptr [r31], r19 +XDIS 780: DATAXFER BASE D5488920 mov qword ptr [rax], r20 +XDIS 784: DATAXFER BASE D5488921 mov qword ptr [rcx], r20 +XDIS 788: DATAXFER BASE D5488922 mov qword ptr [rdx], r20 +XDIS 78c: DATAXFER BASE D5488923 mov qword ptr [rbx], r20 +XDIS 790: DATAXFER BASE D5488926 mov qword ptr [rsi], r20 +XDIS 794: DATAXFER BASE D5488927 mov qword ptr [rdi], r20 +XDIS 798: DATAXFER BASE D5498920 mov qword ptr [r8], r20 +XDIS 79c: DATAXFER BASE D5498921 mov qword ptr [r9], r20 +XDIS 7a0: DATAXFER BASE D5498922 mov qword ptr [r10], r20 +XDIS 7a4: DATAXFER BASE D5498923 mov qword ptr [r11], r20 +XDIS 7a8: DATAXFER BASE D5498926 mov qword ptr [r14], r20 +XDIS 7ac: DATAXFER BASE D5498927 mov qword ptr [r15], r20 +XDIS 7b0: DATAXFER BASE D5588920 mov qword ptr [r16], r20 +XDIS 7b4: DATAXFER BASE D5588921 mov qword ptr [r17], r20 +XDIS 7b8: DATAXFER BASE D5588922 mov qword ptr [r18], r20 +XDIS 7bc: DATAXFER BASE D5588923 mov qword ptr [r19], r20 +XDIS 7c0: DATAXFER BASE D5588926 mov qword ptr [r22], r20 +XDIS 7c4: DATAXFER BASE D5588927 mov qword ptr [r23], r20 +XDIS 7c8: DATAXFER BASE D5598920 mov qword ptr [r24], r20 +XDIS 7cc: DATAXFER BASE D5598921 mov qword ptr [r25], r20 +XDIS 7d0: DATAXFER BASE D5598922 mov qword ptr [r26], r20 +XDIS 7d4: DATAXFER BASE D5598923 mov qword ptr [r27], r20 +XDIS 7d8: DATAXFER BASE D5598926 mov qword ptr [r30], r20 +XDIS 7dc: DATAXFER BASE D5598927 mov qword ptr [r31], r20 +XDIS 7e0: DATAXFER BASE D5488928 mov qword ptr [rax], r21 +XDIS 7e4: DATAXFER BASE D5488929 mov qword ptr [rcx], r21 +XDIS 7e8: DATAXFER BASE D548892A mov qword ptr [rdx], r21 +XDIS 7ec: DATAXFER BASE D548892B mov qword ptr [rbx], r21 +XDIS 7f0: DATAXFER BASE D548892E mov qword ptr [rsi], r21 +XDIS 7f4: DATAXFER BASE D548892F mov qword ptr [rdi], r21 +XDIS 7f8: DATAXFER BASE D5498928 mov qword ptr [r8], r21 +XDIS 7fc: DATAXFER BASE D5498929 mov qword ptr [r9], r21 +XDIS 800: DATAXFER BASE D549892A mov qword ptr [r10], r21 +XDIS 804: DATAXFER BASE D549892B mov qword ptr [r11], r21 +XDIS 808: DATAXFER BASE D549892E mov qword ptr [r14], r21 +XDIS 80c: DATAXFER BASE D549892F mov qword ptr [r15], r21 +XDIS 810: DATAXFER BASE D5588928 mov qword ptr [r16], r21 +XDIS 814: DATAXFER BASE D5588929 mov qword ptr [r17], r21 +XDIS 818: DATAXFER BASE D558892A mov qword ptr [r18], r21 +XDIS 81c: DATAXFER BASE D558892B mov qword ptr [r19], r21 +XDIS 820: DATAXFER BASE D558892E mov qword ptr [r22], r21 +XDIS 824: DATAXFER BASE D558892F mov qword ptr [r23], r21 +XDIS 828: DATAXFER BASE D5598928 mov qword ptr [r24], r21 +XDIS 82c: DATAXFER BASE D5598929 mov qword ptr [r25], r21 +XDIS 830: DATAXFER BASE D559892A mov qword ptr [r26], r21 +XDIS 834: DATAXFER BASE D559892B mov qword ptr [r27], r21 +XDIS 838: DATAXFER BASE D559892E mov qword ptr [r30], r21 +XDIS 83c: DATAXFER BASE D559892F mov qword ptr [r31], r21 +XDIS 840: DATAXFER BASE D5488930 mov qword ptr [rax], r22 +XDIS 844: DATAXFER BASE D5488931 mov qword ptr [rcx], r22 +XDIS 848: DATAXFER BASE D5488932 mov qword ptr [rdx], r22 +XDIS 84c: DATAXFER BASE D5488933 mov qword ptr [rbx], r22 +XDIS 850: DATAXFER BASE D5488936 mov qword ptr [rsi], r22 +XDIS 854: DATAXFER BASE D5488937 mov qword ptr [rdi], r22 +XDIS 858: DATAXFER BASE D5498930 mov qword ptr [r8], r22 +XDIS 85c: DATAXFER BASE D5498931 mov qword ptr [r9], r22 +XDIS 860: DATAXFER BASE D5498932 mov qword ptr [r10], r22 +XDIS 864: DATAXFER BASE D5498933 mov qword ptr [r11], r22 +XDIS 868: DATAXFER BASE D5498936 mov qword ptr [r14], r22 +XDIS 86c: DATAXFER BASE D5498937 mov qword ptr [r15], r22 +XDIS 870: DATAXFER BASE D5588930 mov qword ptr [r16], r22 +XDIS 874: DATAXFER BASE D5588931 mov qword ptr [r17], r22 +XDIS 878: DATAXFER BASE D5588932 mov qword ptr [r18], r22 +XDIS 87c: DATAXFER BASE D5588933 mov qword ptr [r19], r22 +XDIS 880: DATAXFER BASE D5588936 mov qword ptr [r22], r22 +XDIS 884: DATAXFER BASE D5588937 mov qword ptr [r23], r22 +XDIS 888: DATAXFER BASE D5598930 mov qword ptr [r24], r22 +XDIS 88c: DATAXFER BASE D5598931 mov qword ptr [r25], r22 +XDIS 890: DATAXFER BASE D5598932 mov qword ptr [r26], r22 +XDIS 894: DATAXFER BASE D5598933 mov qword ptr [r27], r22 +XDIS 898: DATAXFER BASE D5598936 mov qword ptr [r30], r22 +XDIS 89c: DATAXFER BASE D5598937 mov qword ptr [r31], r22 +XDIS 8a0: DATAXFER BASE D5488938 mov qword ptr [rax], r23 +XDIS 8a4: DATAXFER BASE D5488939 mov qword ptr [rcx], r23 +XDIS 8a8: DATAXFER BASE D548893A mov qword ptr [rdx], r23 +XDIS 8ac: DATAXFER BASE D548893B mov qword ptr [rbx], r23 +XDIS 8b0: DATAXFER BASE D548893E mov qword ptr [rsi], r23 +XDIS 8b4: DATAXFER BASE D548893F mov qword ptr [rdi], r23 +XDIS 8b8: DATAXFER BASE D5498938 mov qword ptr [r8], r23 +XDIS 8bc: DATAXFER BASE D5498939 mov qword ptr [r9], r23 +XDIS 8c0: DATAXFER BASE D549893A mov qword ptr [r10], r23 +XDIS 8c4: DATAXFER BASE D549893B mov qword ptr [r11], r23 +XDIS 8c8: DATAXFER BASE D549893E mov qword ptr [r14], r23 +XDIS 8cc: DATAXFER BASE D549893F mov qword ptr [r15], r23 +XDIS 8d0: DATAXFER BASE D5588938 mov qword ptr [r16], r23 +XDIS 8d4: DATAXFER BASE D5588939 mov qword ptr [r17], r23 +XDIS 8d8: DATAXFER BASE D558893A mov qword ptr [r18], r23 +XDIS 8dc: DATAXFER BASE D558893B mov qword ptr [r19], r23 +XDIS 8e0: DATAXFER BASE D558893E mov qword ptr [r22], r23 +XDIS 8e4: DATAXFER BASE D558893F mov qword ptr [r23], r23 +XDIS 8e8: DATAXFER BASE D5598938 mov qword ptr [r24], r23 +XDIS 8ec: DATAXFER BASE D5598939 mov qword ptr [r25], r23 +XDIS 8f0: DATAXFER BASE D559893A mov qword ptr [r26], r23 +XDIS 8f4: DATAXFER BASE D559893B mov qword ptr [r27], r23 +XDIS 8f8: DATAXFER BASE D559893E mov qword ptr [r30], r23 +XDIS 8fc: DATAXFER BASE D559893F mov qword ptr [r31], r23 +XDIS 900: DATAXFER BASE D54C8900 mov qword ptr [rax], r24 +XDIS 904: DATAXFER BASE D54C8901 mov qword ptr [rcx], r24 +XDIS 908: DATAXFER BASE D54C8902 mov qword ptr [rdx], r24 +XDIS 90c: DATAXFER BASE D54C8903 mov qword ptr [rbx], r24 +XDIS 910: DATAXFER BASE D54C8906 mov qword ptr [rsi], r24 +XDIS 914: DATAXFER BASE D54C8907 mov qword ptr [rdi], r24 +XDIS 918: DATAXFER BASE D54D8900 mov qword ptr [r8], r24 +XDIS 91c: DATAXFER BASE D54D8901 mov qword ptr [r9], r24 +XDIS 920: DATAXFER BASE D54D8902 mov qword ptr [r10], r24 +XDIS 924: DATAXFER BASE D54D8903 mov qword ptr [r11], r24 +XDIS 928: DATAXFER BASE D54D8906 mov qword ptr [r14], r24 +XDIS 92c: DATAXFER BASE D54D8907 mov qword ptr [r15], r24 +XDIS 930: DATAXFER BASE D55C8900 mov qword ptr [r16], r24 +XDIS 934: DATAXFER BASE D55C8901 mov qword ptr [r17], r24 +XDIS 938: DATAXFER BASE D55C8902 mov qword ptr [r18], r24 +XDIS 93c: DATAXFER BASE D55C8903 mov qword ptr [r19], r24 +XDIS 940: DATAXFER BASE D55C8906 mov qword ptr [r22], r24 +XDIS 944: DATAXFER BASE D55C8907 mov qword ptr [r23], r24 +XDIS 948: DATAXFER BASE D55D8900 mov qword ptr [r24], r24 +XDIS 94c: DATAXFER BASE D55D8901 mov qword ptr [r25], r24 +XDIS 950: DATAXFER BASE D55D8902 mov qword ptr [r26], r24 +XDIS 954: DATAXFER BASE D55D8903 mov qword ptr [r27], r24 +XDIS 958: DATAXFER BASE D55D8906 mov qword ptr [r30], r24 +XDIS 95c: DATAXFER BASE D55D8907 mov qword ptr [r31], r24 +XDIS 960: DATAXFER BASE D54C8908 mov qword ptr [rax], r25 +XDIS 964: DATAXFER BASE D54C8909 mov qword ptr [rcx], r25 +XDIS 968: DATAXFER BASE D54C890A mov qword ptr [rdx], r25 +XDIS 96c: DATAXFER BASE D54C890B mov qword ptr [rbx], r25 +XDIS 970: DATAXFER BASE D54C890E mov qword ptr [rsi], r25 +XDIS 974: DATAXFER BASE D54C890F mov qword ptr [rdi], r25 +XDIS 978: DATAXFER BASE D54D8908 mov qword ptr [r8], r25 +XDIS 97c: DATAXFER BASE D54D8909 mov qword ptr [r9], r25 +XDIS 980: DATAXFER BASE D54D890A mov qword ptr [r10], r25 +XDIS 984: DATAXFER BASE D54D890B mov qword ptr [r11], r25 +XDIS 988: DATAXFER BASE D54D890E mov qword ptr [r14], r25 +XDIS 98c: DATAXFER BASE D54D890F mov qword ptr [r15], r25 +XDIS 990: DATAXFER BASE D55C8908 mov qword ptr [r16], r25 +XDIS 994: DATAXFER BASE D55C8909 mov qword ptr [r17], r25 +XDIS 998: DATAXFER BASE D55C890A mov qword ptr [r18], r25 +XDIS 99c: DATAXFER BASE D55C890B mov qword ptr [r19], r25 +XDIS 9a0: DATAXFER BASE D55C890E mov qword ptr [r22], r25 +XDIS 9a4: DATAXFER BASE D55C890F mov qword ptr [r23], r25 +XDIS 9a8: DATAXFER BASE D55D8908 mov qword ptr [r24], r25 +XDIS 9ac: DATAXFER BASE D55D8909 mov qword ptr [r25], r25 +XDIS 9b0: DATAXFER BASE D55D890A mov qword ptr [r26], r25 +XDIS 9b4: DATAXFER BASE D55D890B mov qword ptr [r27], r25 +XDIS 9b8: DATAXFER BASE D55D890E mov qword ptr [r30], r25 +XDIS 9bc: DATAXFER BASE D55D890F mov qword ptr [r31], r25 +XDIS 9c0: DATAXFER BASE D54C8910 mov qword ptr [rax], r26 +XDIS 9c4: DATAXFER BASE D54C8911 mov qword ptr [rcx], r26 +XDIS 9c8: DATAXFER BASE D54C8912 mov qword ptr [rdx], r26 +XDIS 9cc: DATAXFER BASE D54C8913 mov qword ptr [rbx], r26 +XDIS 9d0: DATAXFER BASE D54C8916 mov qword ptr [rsi], r26 +XDIS 9d4: DATAXFER BASE D54C8917 mov qword ptr [rdi], r26 +XDIS 9d8: DATAXFER BASE D54D8910 mov qword ptr [r8], r26 +XDIS 9dc: DATAXFER BASE D54D8911 mov qword ptr [r9], r26 +XDIS 9e0: DATAXFER BASE D54D8912 mov qword ptr [r10], r26 +XDIS 9e4: DATAXFER BASE D54D8913 mov qword ptr [r11], r26 +XDIS 9e8: DATAXFER BASE D54D8916 mov qword ptr [r14], r26 +XDIS 9ec: DATAXFER BASE D54D8917 mov qword ptr [r15], r26 +XDIS 9f0: DATAXFER BASE D55C8910 mov qword ptr [r16], r26 +XDIS 9f4: DATAXFER BASE D55C8911 mov qword ptr [r17], r26 +XDIS 9f8: DATAXFER BASE D55C8912 mov qword ptr [r18], r26 +XDIS 9fc: DATAXFER BASE D55C8913 mov qword ptr [r19], r26 +XDIS a00: DATAXFER BASE D55C8916 mov qword ptr [r22], r26 +XDIS a04: DATAXFER BASE D55C8917 mov qword ptr [r23], r26 +XDIS a08: DATAXFER BASE D55D8910 mov qword ptr [r24], r26 +XDIS a0c: DATAXFER BASE D55D8911 mov qword ptr [r25], r26 +XDIS a10: DATAXFER BASE D55D8912 mov qword ptr [r26], r26 +XDIS a14: DATAXFER BASE D55D8913 mov qword ptr [r27], r26 +XDIS a18: DATAXFER BASE D55D8916 mov qword ptr [r30], r26 +XDIS a1c: DATAXFER BASE D55D8917 mov qword ptr [r31], r26 +XDIS a20: DATAXFER BASE D54C8918 mov qword ptr [rax], r27 +XDIS a24: DATAXFER BASE D54C8919 mov qword ptr [rcx], r27 +XDIS a28: DATAXFER BASE D54C891A mov qword ptr [rdx], r27 +XDIS a2c: DATAXFER BASE D54C891B mov qword ptr [rbx], r27 +XDIS a30: DATAXFER BASE D54C891E mov qword ptr [rsi], r27 +XDIS a34: DATAXFER BASE D54C891F mov qword ptr [rdi], r27 +XDIS a38: DATAXFER BASE D54D8918 mov qword ptr [r8], r27 +XDIS a3c: DATAXFER BASE D54D8919 mov qword ptr [r9], r27 +XDIS a40: DATAXFER BASE D54D891A mov qword ptr [r10], r27 +XDIS a44: DATAXFER BASE D54D891B mov qword ptr [r11], r27 +XDIS a48: DATAXFER BASE D54D891E mov qword ptr [r14], r27 +XDIS a4c: DATAXFER BASE D54D891F mov qword ptr [r15], r27 +XDIS a50: DATAXFER BASE D55C8918 mov qword ptr [r16], r27 +XDIS a54: DATAXFER BASE D55C8919 mov qword ptr [r17], r27 +XDIS a58: DATAXFER BASE D55C891A mov qword ptr [r18], r27 +XDIS a5c: DATAXFER BASE D55C891B mov qword ptr [r19], r27 +XDIS a60: DATAXFER BASE D55C891E mov qword ptr [r22], r27 +XDIS a64: DATAXFER BASE D55C891F mov qword ptr [r23], r27 +XDIS a68: DATAXFER BASE D55D8918 mov qword ptr [r24], r27 +XDIS a6c: DATAXFER BASE D55D8919 mov qword ptr [r25], r27 +XDIS a70: DATAXFER BASE D55D891A mov qword ptr [r26], r27 +XDIS a74: DATAXFER BASE D55D891B mov qword ptr [r27], r27 +XDIS a78: DATAXFER BASE D55D891E mov qword ptr [r30], r27 +XDIS a7c: DATAXFER BASE D55D891F mov qword ptr [r31], r27 +XDIS a80: DATAXFER BASE D54C8920 mov qword ptr [rax], r28 +XDIS a84: DATAXFER BASE D54C8921 mov qword ptr [rcx], r28 +XDIS a88: DATAXFER BASE D54C8922 mov qword ptr [rdx], r28 +XDIS a8c: DATAXFER BASE D54C8923 mov qword ptr [rbx], r28 +XDIS a90: DATAXFER BASE D54C8926 mov qword ptr [rsi], r28 +XDIS a94: DATAXFER BASE D54C8927 mov qword ptr [rdi], r28 +XDIS a98: DATAXFER BASE D54D8920 mov qword ptr [r8], r28 +XDIS a9c: DATAXFER BASE D54D8921 mov qword ptr [r9], r28 +XDIS aa0: DATAXFER BASE D54D8922 mov qword ptr [r10], r28 +XDIS aa4: DATAXFER BASE D54D8923 mov qword ptr [r11], r28 +XDIS aa8: DATAXFER BASE D54D8926 mov qword ptr [r14], r28 +XDIS aac: DATAXFER BASE D54D8927 mov qword ptr [r15], r28 +XDIS ab0: DATAXFER BASE D55C8920 mov qword ptr [r16], r28 +XDIS ab4: DATAXFER BASE D55C8921 mov qword ptr [r17], r28 +XDIS ab8: DATAXFER BASE D55C8922 mov qword ptr [r18], r28 +XDIS abc: DATAXFER BASE D55C8923 mov qword ptr [r19], r28 +XDIS ac0: DATAXFER BASE D55C8926 mov qword ptr [r22], r28 +XDIS ac4: DATAXFER BASE D55C8927 mov qword ptr [r23], r28 +XDIS ac8: DATAXFER BASE D55D8920 mov qword ptr [r24], r28 +XDIS acc: DATAXFER BASE D55D8921 mov qword ptr [r25], r28 +XDIS ad0: DATAXFER BASE D55D8922 mov qword ptr [r26], r28 +XDIS ad4: DATAXFER BASE D55D8923 mov qword ptr [r27], r28 +XDIS ad8: DATAXFER BASE D55D8926 mov qword ptr [r30], r28 +XDIS adc: DATAXFER BASE D55D8927 mov qword ptr [r31], r28 +XDIS ae0: DATAXFER BASE D54C8928 mov qword ptr [rax], r29 +XDIS ae4: DATAXFER BASE D54C8929 mov qword ptr [rcx], r29 +XDIS ae8: DATAXFER BASE D54C892A mov qword ptr [rdx], r29 +XDIS aec: DATAXFER BASE D54C892B mov qword ptr [rbx], r29 +XDIS af0: DATAXFER BASE D54C892E mov qword ptr [rsi], r29 +XDIS af4: DATAXFER BASE D54C892F mov qword ptr [rdi], r29 +XDIS af8: DATAXFER BASE D54D8928 mov qword ptr [r8], r29 +XDIS afc: DATAXFER BASE D54D8929 mov qword ptr [r9], r29 +XDIS b00: DATAXFER BASE D54D892A mov qword ptr [r10], r29 +XDIS b04: DATAXFER BASE D54D892B mov qword ptr [r11], r29 +XDIS b08: DATAXFER BASE D54D892E mov qword ptr [r14], r29 +XDIS b0c: DATAXFER BASE D54D892F mov qword ptr [r15], r29 +XDIS b10: DATAXFER BASE D55C8928 mov qword ptr [r16], r29 +XDIS b14: DATAXFER BASE D55C8929 mov qword ptr [r17], r29 +XDIS b18: DATAXFER BASE D55C892A mov qword ptr [r18], r29 +XDIS b1c: DATAXFER BASE D55C892B mov qword ptr [r19], r29 +XDIS b20: DATAXFER BASE D55C892E mov qword ptr [r22], r29 +XDIS b24: DATAXFER BASE D55C892F mov qword ptr [r23], r29 +XDIS b28: DATAXFER BASE D55D8928 mov qword ptr [r24], r29 +XDIS b2c: DATAXFER BASE D55D8929 mov qword ptr [r25], r29 +XDIS b30: DATAXFER BASE D55D892A mov qword ptr [r26], r29 +XDIS b34: DATAXFER BASE D55D892B mov qword ptr [r27], r29 +XDIS b38: DATAXFER BASE D55D892E mov qword ptr [r30], r29 +XDIS b3c: DATAXFER BASE D55D892F mov qword ptr [r31], r29 +XDIS b40: DATAXFER BASE D54C8930 mov qword ptr [rax], r30 +XDIS b44: DATAXFER BASE D54C8931 mov qword ptr [rcx], r30 +XDIS b48: DATAXFER BASE D54C8932 mov qword ptr [rdx], r30 +XDIS b4c: DATAXFER BASE D54C8933 mov qword ptr [rbx], r30 +XDIS b50: DATAXFER BASE D54C8936 mov qword ptr [rsi], r30 +XDIS b54: DATAXFER BASE D54C8937 mov qword ptr [rdi], r30 +XDIS b58: DATAXFER BASE D54D8930 mov qword ptr [r8], r30 +XDIS b5c: DATAXFER BASE D54D8931 mov qword ptr [r9], r30 +XDIS b60: DATAXFER BASE D54D8932 mov qword ptr [r10], r30 +XDIS b64: DATAXFER BASE D54D8933 mov qword ptr [r11], r30 +XDIS b68: DATAXFER BASE D54D8936 mov qword ptr [r14], r30 +XDIS b6c: DATAXFER BASE D54D8937 mov qword ptr [r15], r30 +XDIS b70: DATAXFER BASE D55C8930 mov qword ptr [r16], r30 +XDIS b74: DATAXFER BASE D55C8931 mov qword ptr [r17], r30 +XDIS b78: DATAXFER BASE D55C8932 mov qword ptr [r18], r30 +XDIS b7c: DATAXFER BASE D55C8933 mov qword ptr [r19], r30 +XDIS b80: DATAXFER BASE D55C8936 mov qword ptr [r22], r30 +XDIS b84: DATAXFER BASE D55C8937 mov qword ptr [r23], r30 +XDIS b88: DATAXFER BASE D55D8930 mov qword ptr [r24], r30 +XDIS b8c: DATAXFER BASE D55D8931 mov qword ptr [r25], r30 +XDIS b90: DATAXFER BASE D55D8932 mov qword ptr [r26], r30 +XDIS b94: DATAXFER BASE D55D8933 mov qword ptr [r27], r30 +XDIS b98: DATAXFER BASE D55D8936 mov qword ptr [r30], r30 +XDIS b9c: DATAXFER BASE D55D8937 mov qword ptr [r31], r30 +XDIS ba0: DATAXFER BASE D54C8938 mov qword ptr [rax], r31 +XDIS ba4: DATAXFER BASE D54C8939 mov qword ptr [rcx], r31 +XDIS ba8: DATAXFER BASE D54C893A mov qword ptr [rdx], r31 +XDIS bac: DATAXFER BASE D54C893B mov qword ptr [rbx], r31 +XDIS bb0: DATAXFER BASE D54C893E mov qword ptr [rsi], r31 +XDIS bb4: DATAXFER BASE D54C893F mov qword ptr [rdi], r31 +XDIS bb8: DATAXFER BASE D54D8938 mov qword ptr [r8], r31 +XDIS bbc: DATAXFER BASE D54D8939 mov qword ptr [r9], r31 +XDIS bc0: DATAXFER BASE D54D893A mov qword ptr [r10], r31 +XDIS bc4: DATAXFER BASE D54D893B mov qword ptr [r11], r31 +XDIS bc8: DATAXFER BASE D54D893E mov qword ptr [r14], r31 +XDIS bcc: DATAXFER BASE D54D893F mov qword ptr [r15], r31 +XDIS bd0: DATAXFER BASE D55C8938 mov qword ptr [r16], r31 +XDIS bd4: DATAXFER BASE D55C8939 mov qword ptr [r17], r31 +XDIS bd8: DATAXFER BASE D55C893A mov qword ptr [r18], r31 +XDIS bdc: DATAXFER BASE D55C893B mov qword ptr [r19], r31 +XDIS be0: DATAXFER BASE D55C893E mov qword ptr [r22], r31 +XDIS be4: DATAXFER BASE D55C893F mov qword ptr [r23], r31 +XDIS be8: DATAXFER BASE D55D8938 mov qword ptr [r24], r31 +XDIS bec: DATAXFER BASE D55D8939 mov qword ptr [r25], r31 +XDIS bf0: DATAXFER BASE D55D893A mov qword ptr [r26], r31 +XDIS bf4: DATAXFER BASE D55D893B mov qword ptr [r27], r31 +XDIS bf8: DATAXFER BASE D55D893E mov qword ptr [r30], r31 +XDIS bfc: DATAXFER BASE D55D893F mov qword ptr [r31], r31 +# end of text section. +# Errors: 0 +#XED3 DECODE STATS +#Total DECODE cycles: 1531692 +#Total instructions DECODE: 718 +#Total tail DECODE cycles: 1854188 +#Total tail instructions DECODE: 768 +#Total cycles/instruction DECODE: 2133.28 +#Total tail cycles/instruction DECODE: 2414.31 diff --git a/tests/tests-apx/test-00001/cmd b/tests/tests-apx/test-00001/cmd new file mode 100644 index 00000000..ea59df8d --- /dev/null +++ b/tests/tests-apx/test-00001/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -ih TESTDIR/../rex2-mod1-dec-in.txt diff --git a/tests/tests-apx/test-00001/codes b/tests/tests-apx/test-00001/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00001/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00001/retcode.reference b/tests/tests-apx/test-00001/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00001/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00001/stderr.reference b/tests/tests-apx/test-00001/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00001/stdout.reference b/tests/tests-apx/test-00001/stdout.reference new file mode 100644 index 00000000..7d97b478 --- /dev/null +++ b/tests/tests-apx/test-00001/stdout.reference @@ -0,0 +1,32777 @@ +XDIS 0: MISC BASE D5088D444000 lea rax, ptr [rax+rax*2] +XDIS 6: MISC BASE D5088D444101 lea rax, ptr [rcx+rax*2+0x1] +XDIS c: MISC BASE D5088D444202 lea rax, ptr [rdx+rax*2+0x2] +XDIS 12: MISC BASE D5088D444303 lea rax, ptr [rbx+rax*2+0x3] +XDIS 18: MISC BASE D5088D444404 lea rax, ptr [rsp+rax*2+0x4] +XDIS 1e: MISC BASE D5088D444505 lea rax, ptr [rbp+rax*2+0x5] +XDIS 24: MISC BASE D5088D444606 lea rax, ptr [rsi+rax*2+0x6] +XDIS 2a: MISC BASE D5088D444707 lea rax, ptr [rdi+rax*2+0x7] +XDIS 30: MISC BASE D5098D444008 lea rax, ptr [r8+rax*2+0x8] +XDIS 36: MISC BASE D5098D444109 lea rax, ptr [r9+rax*2+0x9] +XDIS 3c: MISC BASE D5098D44420A lea rax, ptr [r10+rax*2+0xa] +XDIS 42: MISC BASE D5098D44430B lea rax, ptr [r11+rax*2+0xb] +XDIS 48: MISC BASE D5098D44440C lea rax, ptr [r12+rax*2+0xc] +XDIS 4e: MISC BASE D5098D44450D lea rax, ptr [r13+rax*2+0xd] +XDIS 54: MISC BASE D5098D44460E lea rax, ptr [r14+rax*2+0xe] +XDIS 5a: MISC BASE D5098D44470F lea rax, ptr [r15+rax*2+0xf] +XDIS 60: MISC BASE D5188D444010 lea rax, ptr [r16+rax*2+0x10] +XDIS 66: MISC BASE D5188D444111 lea rax, ptr [r17+rax*2+0x11] +XDIS 6c: MISC BASE D5188D444212 lea rax, ptr [r18+rax*2+0x12] +XDIS 72: MISC BASE D5188D444313 lea rax, ptr [r19+rax*2+0x13] +XDIS 78: MISC BASE D5188D444414 lea rax, ptr [r20+rax*2+0x14] +XDIS 7e: MISC BASE D5188D444515 lea rax, ptr [r21+rax*2+0x15] +XDIS 84: MISC BASE D5188D444616 lea rax, ptr [r22+rax*2+0x16] +XDIS 8a: MISC BASE D5188D444717 lea rax, ptr [r23+rax*2+0x17] +XDIS 90: MISC BASE D5198D444018 lea rax, ptr [r24+rax*2+0x18] +XDIS 96: MISC BASE D5198D444119 lea rax, ptr [r25+rax*2+0x19] +XDIS 9c: MISC BASE D5198D44421A lea rax, ptr [r26+rax*2+0x1a] +XDIS a2: MISC BASE D5198D44431B lea rax, ptr [r27+rax*2+0x1b] +XDIS a8: MISC BASE D5198D44441C lea rax, ptr [r28+rax*2+0x1c] +XDIS ae: MISC BASE D5198D44451D lea rax, ptr [r29+rax*2+0x1d] +XDIS b4: MISC BASE D5198D44461E lea rax, ptr [r30+rax*2+0x1e] +XDIS ba: MISC BASE D5198D44471F lea rax, ptr [r31+rax*2+0x1f] +XDIS c0: MISC BASE D5088D444801 lea rax, ptr [rax+rcx*2+0x1] +XDIS c6: MISC BASE D5088D444902 lea rax, ptr [rcx+rcx*2+0x2] +XDIS cc: MISC BASE D5088D444A03 lea rax, ptr [rdx+rcx*2+0x3] +XDIS d2: MISC BASE D5088D444B04 lea rax, ptr [rbx+rcx*2+0x4] +XDIS d8: MISC BASE D5088D444C05 lea rax, ptr [rsp+rcx*2+0x5] +XDIS de: MISC BASE D5088D444D06 lea rax, ptr [rbp+rcx*2+0x6] +XDIS e4: MISC BASE D5088D444E07 lea rax, ptr [rsi+rcx*2+0x7] +XDIS ea: MISC BASE D5088D444F08 lea rax, ptr [rdi+rcx*2+0x8] +XDIS f0: MISC BASE D5098D444809 lea rax, ptr [r8+rcx*2+0x9] +XDIS f6: MISC BASE D5098D44490A lea rax, ptr [r9+rcx*2+0xa] +XDIS fc: MISC BASE D5098D444A0B lea rax, ptr [r10+rcx*2+0xb] +XDIS 102: MISC BASE D5098D444B0C lea rax, ptr [r11+rcx*2+0xc] +XDIS 108: MISC BASE D5098D444C0D lea rax, ptr [r12+rcx*2+0xd] +XDIS 10e: MISC BASE D5098D444D0E lea rax, ptr [r13+rcx*2+0xe] +XDIS 114: MISC BASE D5098D444E0F lea rax, ptr [r14+rcx*2+0xf] +XDIS 11a: MISC BASE D5098D444F10 lea rax, ptr [r15+rcx*2+0x10] +XDIS 120: MISC BASE D5188D444811 lea rax, ptr [r16+rcx*2+0x11] +XDIS 126: MISC BASE D5188D444912 lea rax, ptr [r17+rcx*2+0x12] +XDIS 12c: MISC BASE D5188D444A13 lea rax, ptr [r18+rcx*2+0x13] +XDIS 132: MISC BASE D5188D444B14 lea rax, ptr [r19+rcx*2+0x14] +XDIS 138: MISC BASE D5188D444C15 lea rax, ptr [r20+rcx*2+0x15] +XDIS 13e: MISC BASE D5188D444D16 lea rax, ptr [r21+rcx*2+0x16] +XDIS 144: MISC BASE D5188D444E17 lea rax, ptr [r22+rcx*2+0x17] +XDIS 14a: MISC BASE D5188D444F18 lea rax, ptr [r23+rcx*2+0x18] +XDIS 150: MISC BASE D5198D444819 lea rax, ptr [r24+rcx*2+0x19] +XDIS 156: MISC BASE D5198D44491A lea rax, ptr [r25+rcx*2+0x1a] +XDIS 15c: MISC BASE D5198D444A1B lea rax, ptr [r26+rcx*2+0x1b] +XDIS 162: MISC BASE D5198D444B1C lea rax, ptr [r27+rcx*2+0x1c] +XDIS 168: MISC BASE D5198D444C1D lea rax, ptr [r28+rcx*2+0x1d] +XDIS 16e: MISC BASE D5198D444D1E lea rax, ptr [r29+rcx*2+0x1e] +XDIS 174: MISC BASE D5198D444E1F lea rax, ptr [r30+rcx*2+0x1f] +XDIS 17a: MISC BASE D5198D444F20 lea rax, ptr [r31+rcx*2+0x20] +XDIS 180: MISC BASE D5088D445002 lea rax, ptr [rax+rdx*2+0x2] +XDIS 186: MISC BASE D5088D445103 lea rax, ptr [rcx+rdx*2+0x3] +XDIS 18c: MISC BASE D5088D445204 lea rax, ptr [rdx+rdx*2+0x4] +XDIS 192: MISC BASE D5088D445305 lea rax, ptr [rbx+rdx*2+0x5] +XDIS 198: MISC BASE D5088D445406 lea rax, ptr [rsp+rdx*2+0x6] +XDIS 19e: MISC BASE D5088D445507 lea rax, ptr [rbp+rdx*2+0x7] +XDIS 1a4: MISC BASE D5088D445608 lea rax, ptr [rsi+rdx*2+0x8] +XDIS 1aa: MISC BASE D5088D445709 lea rax, ptr [rdi+rdx*2+0x9] +XDIS 1b0: MISC BASE D5098D44500A lea rax, ptr [r8+rdx*2+0xa] +XDIS 1b6: MISC BASE D5098D44510B lea rax, ptr [r9+rdx*2+0xb] +XDIS 1bc: MISC BASE D5098D44520C lea rax, ptr [r10+rdx*2+0xc] +XDIS 1c2: MISC BASE D5098D44530D lea rax, ptr [r11+rdx*2+0xd] +XDIS 1c8: MISC BASE D5098D44540E lea rax, ptr [r12+rdx*2+0xe] +XDIS 1ce: MISC BASE D5098D44550F lea rax, ptr [r13+rdx*2+0xf] +XDIS 1d4: MISC BASE D5098D445610 lea rax, ptr [r14+rdx*2+0x10] +XDIS 1da: MISC BASE D5098D445711 lea rax, ptr [r15+rdx*2+0x11] +XDIS 1e0: MISC BASE D5188D445012 lea rax, ptr [r16+rdx*2+0x12] +XDIS 1e6: MISC BASE D5188D445113 lea rax, ptr [r17+rdx*2+0x13] +XDIS 1ec: MISC BASE D5188D445214 lea rax, ptr [r18+rdx*2+0x14] +XDIS 1f2: MISC BASE D5188D445315 lea rax, ptr [r19+rdx*2+0x15] +XDIS 1f8: MISC BASE D5188D445416 lea rax, ptr [r20+rdx*2+0x16] +XDIS 1fe: MISC BASE D5188D445517 lea rax, ptr [r21+rdx*2+0x17] +XDIS 204: MISC BASE D5188D445618 lea rax, ptr [r22+rdx*2+0x18] +XDIS 20a: MISC BASE D5188D445719 lea rax, ptr [r23+rdx*2+0x19] +XDIS 210: MISC BASE D5198D44501A lea rax, ptr [r24+rdx*2+0x1a] +XDIS 216: MISC BASE D5198D44511B lea rax, ptr [r25+rdx*2+0x1b] +XDIS 21c: MISC BASE D5198D44521C lea rax, ptr [r26+rdx*2+0x1c] +XDIS 222: MISC BASE D5198D44531D lea rax, ptr [r27+rdx*2+0x1d] +XDIS 228: MISC BASE D5198D44541E lea rax, ptr [r28+rdx*2+0x1e] +XDIS 22e: MISC BASE D5198D44551F lea rax, ptr [r29+rdx*2+0x1f] +XDIS 234: MISC BASE D5198D445620 lea rax, ptr [r30+rdx*2+0x20] +XDIS 23a: MISC BASE D5198D445721 lea rax, ptr [r31+rdx*2+0x21] +XDIS 240: MISC BASE D5088D445803 lea rax, ptr [rax+rbx*2+0x3] +XDIS 246: MISC BASE D5088D445904 lea rax, ptr [rcx+rbx*2+0x4] +XDIS 24c: MISC BASE D5088D445A05 lea rax, ptr [rdx+rbx*2+0x5] +XDIS 252: MISC BASE D5088D445B06 lea rax, ptr [rbx+rbx*2+0x6] +XDIS 258: MISC BASE D5088D445C07 lea rax, ptr [rsp+rbx*2+0x7] +XDIS 25e: MISC BASE D5088D445D08 lea rax, ptr [rbp+rbx*2+0x8] +XDIS 264: MISC BASE D5088D445E09 lea rax, ptr [rsi+rbx*2+0x9] +XDIS 26a: MISC BASE D5088D445F0A lea rax, ptr [rdi+rbx*2+0xa] +XDIS 270: MISC BASE D5098D44580B lea rax, ptr [r8+rbx*2+0xb] +XDIS 276: MISC BASE D5098D44590C lea rax, ptr [r9+rbx*2+0xc] +XDIS 27c: MISC BASE D5098D445A0D lea rax, ptr [r10+rbx*2+0xd] +XDIS 282: MISC BASE D5098D445B0E lea rax, ptr [r11+rbx*2+0xe] +XDIS 288: MISC BASE D5098D445C0F lea rax, ptr [r12+rbx*2+0xf] +XDIS 28e: MISC BASE D5098D445D10 lea rax, ptr [r13+rbx*2+0x10] +XDIS 294: MISC BASE D5098D445E11 lea rax, ptr [r14+rbx*2+0x11] +XDIS 29a: MISC BASE D5098D445F12 lea rax, ptr [r15+rbx*2+0x12] +XDIS 2a0: MISC BASE D5188D445813 lea rax, ptr [r16+rbx*2+0x13] +XDIS 2a6: MISC BASE D5188D445914 lea rax, ptr [r17+rbx*2+0x14] +XDIS 2ac: MISC BASE D5188D445A15 lea rax, ptr [r18+rbx*2+0x15] +XDIS 2b2: MISC BASE D5188D445B16 lea rax, ptr [r19+rbx*2+0x16] +XDIS 2b8: MISC BASE D5188D445C17 lea rax, ptr [r20+rbx*2+0x17] +XDIS 2be: MISC BASE D5188D445D18 lea rax, ptr [r21+rbx*2+0x18] +XDIS 2c4: MISC BASE D5188D445E19 lea rax, ptr [r22+rbx*2+0x19] +XDIS 2ca: MISC BASE D5188D445F1A lea rax, ptr [r23+rbx*2+0x1a] +XDIS 2d0: MISC BASE D5198D44581B lea rax, ptr [r24+rbx*2+0x1b] +XDIS 2d6: MISC BASE D5198D44591C lea rax, ptr [r25+rbx*2+0x1c] +XDIS 2dc: MISC BASE D5198D445A1D lea rax, ptr [r26+rbx*2+0x1d] +XDIS 2e2: MISC BASE D5198D445B1E lea rax, ptr [r27+rbx*2+0x1e] +XDIS 2e8: MISC BASE D5198D445C1F lea rax, ptr [r28+rbx*2+0x1f] +XDIS 2ee: MISC BASE D5198D445D20 lea rax, ptr [r29+rbx*2+0x20] +XDIS 2f4: MISC BASE D5198D445E21 lea rax, ptr [r30+rbx*2+0x21] +XDIS 2fa: MISC BASE D5198D445F22 lea rax, ptr [r31+rbx*2+0x22] +XDIS 300: MISC BASE D5088D446004 lea rax, ptr [rax+0x4] +XDIS 306: MISC BASE D5088D446105 lea rax, ptr [rcx+0x5] +XDIS 30c: MISC BASE D5088D446206 lea rax, ptr [rdx+0x6] +XDIS 312: MISC BASE D5088D446307 lea rax, ptr [rbx+0x7] +XDIS 318: MISC BASE D5088D446408 lea rax, ptr [rsp+0x8] +XDIS 31e: MISC BASE D5088D446509 lea rax, ptr [rbp+0x9] +XDIS 324: MISC BASE D5088D44660A lea rax, ptr [rsi+0xa] +XDIS 32a: MISC BASE D5088D44670B lea rax, ptr [rdi+0xb] +XDIS 330: MISC BASE D5098D44600C lea rax, ptr [r8+0xc] +XDIS 336: MISC BASE D5098D44610D lea rax, ptr [r9+0xd] +XDIS 33c: MISC BASE D5098D44620E lea rax, ptr [r10+0xe] +XDIS 342: MISC BASE D5098D44630F lea rax, ptr [r11+0xf] +XDIS 348: MISC BASE D5098D446410 lea rax, ptr [r12+0x10] +XDIS 34e: MISC BASE D5098D446511 lea rax, ptr [r13+0x11] +XDIS 354: MISC BASE D5098D446612 lea rax, ptr [r14+0x12] +XDIS 35a: MISC BASE D5098D446713 lea rax, ptr [r15+0x13] +XDIS 360: MISC BASE D5188D446014 lea rax, ptr [r16+0x14] +XDIS 366: MISC BASE D5188D446115 lea rax, ptr [r17+0x15] +XDIS 36c: MISC BASE D5188D446216 lea rax, ptr [r18+0x16] +XDIS 372: MISC BASE D5188D446317 lea rax, ptr [r19+0x17] +XDIS 378: MISC BASE D5188D446418 lea rax, ptr [r20+0x18] +XDIS 37e: MISC BASE D5188D446519 lea rax, ptr [r21+0x19] +XDIS 384: MISC BASE D5188D44661A lea rax, ptr [r22+0x1a] +XDIS 38a: MISC BASE D5188D44671B lea rax, ptr [r23+0x1b] +XDIS 390: MISC BASE D5198D44601C lea rax, ptr [r24+0x1c] +XDIS 396: MISC BASE D5198D44611D lea rax, ptr [r25+0x1d] +XDIS 39c: MISC BASE D5198D44621E lea rax, ptr [r26+0x1e] +XDIS 3a2: MISC BASE D5198D44631F lea rax, ptr [r27+0x1f] +XDIS 3a8: MISC BASE D5198D446420 lea rax, ptr [r28+0x20] +XDIS 3ae: MISC BASE D5198D446521 lea rax, ptr [r29+0x21] +XDIS 3b4: MISC BASE D5198D446622 lea rax, ptr [r30+0x22] +XDIS 3ba: MISC BASE D5198D446723 lea rax, ptr [r31+0x23] +XDIS 3c0: MISC BASE D5088D446805 lea rax, ptr [rax+rbp*2+0x5] +XDIS 3c6: MISC BASE D5088D446906 lea rax, ptr [rcx+rbp*2+0x6] +XDIS 3cc: MISC BASE D5088D446A07 lea rax, ptr [rdx+rbp*2+0x7] +XDIS 3d2: MISC BASE D5088D446B08 lea rax, ptr [rbx+rbp*2+0x8] +XDIS 3d8: MISC BASE D5088D446C09 lea rax, ptr [rsp+rbp*2+0x9] +XDIS 3de: MISC BASE D5088D446D0A lea rax, ptr [rbp+rbp*2+0xa] +XDIS 3e4: MISC BASE D5088D446E0B lea rax, ptr [rsi+rbp*2+0xb] +XDIS 3ea: MISC BASE D5088D446F0C lea rax, ptr [rdi+rbp*2+0xc] +XDIS 3f0: MISC BASE D5098D44680D lea rax, ptr [r8+rbp*2+0xd] +XDIS 3f6: MISC BASE D5098D44690E lea rax, ptr [r9+rbp*2+0xe] +XDIS 3fc: MISC BASE D5098D446A0F lea rax, ptr [r10+rbp*2+0xf] +XDIS 402: MISC BASE D5098D446B10 lea rax, ptr [r11+rbp*2+0x10] +XDIS 408: MISC BASE D5098D446C11 lea rax, ptr [r12+rbp*2+0x11] +XDIS 40e: MISC BASE D5098D446D12 lea rax, ptr [r13+rbp*2+0x12] +XDIS 414: MISC BASE D5098D446E13 lea rax, ptr [r14+rbp*2+0x13] +XDIS 41a: MISC BASE D5098D446F14 lea rax, ptr [r15+rbp*2+0x14] +XDIS 420: MISC BASE D5188D446815 lea rax, ptr [r16+rbp*2+0x15] +XDIS 426: MISC BASE D5188D446916 lea rax, ptr [r17+rbp*2+0x16] +XDIS 42c: MISC BASE D5188D446A17 lea rax, ptr [r18+rbp*2+0x17] +XDIS 432: MISC BASE D5188D446B18 lea rax, ptr [r19+rbp*2+0x18] +XDIS 438: MISC BASE D5188D446C19 lea rax, ptr [r20+rbp*2+0x19] +XDIS 43e: MISC BASE D5188D446D1A lea rax, ptr [r21+rbp*2+0x1a] +XDIS 444: MISC BASE D5188D446E1B lea rax, ptr [r22+rbp*2+0x1b] +XDIS 44a: MISC BASE D5188D446F1C lea rax, ptr [r23+rbp*2+0x1c] +XDIS 450: MISC BASE D5198D44681D lea rax, ptr [r24+rbp*2+0x1d] +XDIS 456: MISC BASE D5198D44691E lea rax, ptr [r25+rbp*2+0x1e] +XDIS 45c: MISC BASE D5198D446A1F lea rax, ptr [r26+rbp*2+0x1f] +XDIS 462: MISC BASE D5198D446B20 lea rax, ptr [r27+rbp*2+0x20] +XDIS 468: MISC BASE D5198D446C21 lea rax, ptr [r28+rbp*2+0x21] +XDIS 46e: MISC BASE D5198D446D22 lea rax, ptr [r29+rbp*2+0x22] +XDIS 474: MISC BASE D5198D446E23 lea rax, ptr [r30+rbp*2+0x23] +XDIS 47a: MISC BASE D5198D446F24 lea rax, ptr [r31+rbp*2+0x24] +XDIS 480: MISC BASE D5088D447006 lea rax, ptr [rax+rsi*2+0x6] +XDIS 486: MISC BASE D5088D447107 lea rax, ptr [rcx+rsi*2+0x7] +XDIS 48c: MISC BASE D5088D447208 lea rax, ptr [rdx+rsi*2+0x8] +XDIS 492: MISC BASE D5088D447309 lea rax, ptr [rbx+rsi*2+0x9] +XDIS 498: MISC BASE D5088D44740A lea rax, ptr [rsp+rsi*2+0xa] +XDIS 49e: MISC BASE D5088D44750B lea rax, ptr [rbp+rsi*2+0xb] +XDIS 4a4: MISC BASE D5088D44760C lea rax, ptr [rsi+rsi*2+0xc] +XDIS 4aa: MISC BASE D5088D44770D lea rax, ptr [rdi+rsi*2+0xd] +XDIS 4b0: MISC BASE D5098D44700E lea rax, ptr [r8+rsi*2+0xe] +XDIS 4b6: MISC BASE D5098D44710F lea rax, ptr [r9+rsi*2+0xf] +XDIS 4bc: MISC BASE D5098D447210 lea rax, ptr [r10+rsi*2+0x10] +XDIS 4c2: MISC BASE D5098D447311 lea rax, ptr [r11+rsi*2+0x11] +XDIS 4c8: MISC BASE D5098D447412 lea rax, ptr [r12+rsi*2+0x12] +XDIS 4ce: MISC BASE D5098D447513 lea rax, ptr [r13+rsi*2+0x13] +XDIS 4d4: MISC BASE D5098D447614 lea rax, ptr [r14+rsi*2+0x14] +XDIS 4da: MISC BASE D5098D447715 lea rax, ptr [r15+rsi*2+0x15] +XDIS 4e0: MISC BASE D5188D447016 lea rax, ptr [r16+rsi*2+0x16] +XDIS 4e6: MISC BASE D5188D447117 lea rax, ptr [r17+rsi*2+0x17] +XDIS 4ec: MISC BASE D5188D447218 lea rax, ptr [r18+rsi*2+0x18] +XDIS 4f2: MISC BASE D5188D447319 lea rax, ptr [r19+rsi*2+0x19] +XDIS 4f8: MISC BASE D5188D44741A lea rax, ptr [r20+rsi*2+0x1a] +XDIS 4fe: MISC BASE D5188D44751B lea rax, ptr [r21+rsi*2+0x1b] +XDIS 504: MISC BASE D5188D44761C lea rax, ptr [r22+rsi*2+0x1c] +XDIS 50a: MISC BASE D5188D44771D lea rax, ptr [r23+rsi*2+0x1d] +XDIS 510: MISC BASE D5198D44701E lea rax, ptr [r24+rsi*2+0x1e] +XDIS 516: MISC BASE D5198D44711F lea rax, ptr [r25+rsi*2+0x1f] +XDIS 51c: MISC BASE D5198D447220 lea rax, ptr [r26+rsi*2+0x20] +XDIS 522: MISC BASE D5198D447321 lea rax, ptr [r27+rsi*2+0x21] +XDIS 528: MISC BASE D5198D447422 lea rax, ptr [r28+rsi*2+0x22] +XDIS 52e: MISC BASE D5198D447523 lea rax, ptr [r29+rsi*2+0x23] +XDIS 534: MISC BASE D5198D447624 lea rax, ptr [r30+rsi*2+0x24] +XDIS 53a: MISC BASE D5198D447725 lea rax, ptr [r31+rsi*2+0x25] +XDIS 540: MISC BASE D5088D447807 lea rax, ptr [rax+rdi*2+0x7] +XDIS 546: MISC BASE D5088D447908 lea rax, ptr [rcx+rdi*2+0x8] +XDIS 54c: MISC BASE D5088D447A09 lea rax, ptr [rdx+rdi*2+0x9] +XDIS 552: MISC BASE D5088D447B0A lea rax, ptr [rbx+rdi*2+0xa] +XDIS 558: MISC BASE D5088D447C0B lea rax, ptr [rsp+rdi*2+0xb] +XDIS 55e: MISC BASE D5088D447D0C lea rax, ptr [rbp+rdi*2+0xc] +XDIS 564: MISC BASE D5088D447E0D lea rax, ptr [rsi+rdi*2+0xd] +XDIS 56a: MISC BASE D5088D447F0E lea rax, ptr [rdi+rdi*2+0xe] +XDIS 570: MISC BASE D5098D44780F lea rax, ptr [r8+rdi*2+0xf] +XDIS 576: MISC BASE D5098D447910 lea rax, ptr [r9+rdi*2+0x10] +XDIS 57c: MISC BASE D5098D447A11 lea rax, ptr [r10+rdi*2+0x11] +XDIS 582: MISC BASE D5098D447B12 lea rax, ptr [r11+rdi*2+0x12] +XDIS 588: MISC BASE D5098D447C13 lea rax, ptr [r12+rdi*2+0x13] +XDIS 58e: MISC BASE D5098D447D14 lea rax, ptr [r13+rdi*2+0x14] +XDIS 594: MISC BASE D5098D447E15 lea rax, ptr [r14+rdi*2+0x15] +XDIS 59a: MISC BASE D5098D447F16 lea rax, ptr [r15+rdi*2+0x16] +XDIS 5a0: MISC BASE D5188D447817 lea rax, ptr [r16+rdi*2+0x17] +XDIS 5a6: MISC BASE D5188D447918 lea rax, ptr [r17+rdi*2+0x18] +XDIS 5ac: MISC BASE D5188D447A19 lea rax, ptr [r18+rdi*2+0x19] +XDIS 5b2: MISC BASE D5188D447B1A lea rax, ptr [r19+rdi*2+0x1a] +XDIS 5b8: MISC BASE D5188D447C1B lea rax, ptr [r20+rdi*2+0x1b] +XDIS 5be: MISC BASE D5188D447D1C lea rax, ptr [r21+rdi*2+0x1c] +XDIS 5c4: MISC BASE D5188D447E1D lea rax, ptr [r22+rdi*2+0x1d] +XDIS 5ca: MISC BASE D5188D447F1E lea rax, ptr [r23+rdi*2+0x1e] +XDIS 5d0: MISC BASE D5198D44781F lea rax, ptr [r24+rdi*2+0x1f] +XDIS 5d6: MISC BASE D5198D447920 lea rax, ptr [r25+rdi*2+0x20] +XDIS 5dc: MISC BASE D5198D447A21 lea rax, ptr [r26+rdi*2+0x21] +XDIS 5e2: MISC BASE D5198D447B22 lea rax, ptr [r27+rdi*2+0x22] +XDIS 5e8: MISC BASE D5198D447C23 lea rax, ptr [r28+rdi*2+0x23] +XDIS 5ee: MISC BASE D5198D447D24 lea rax, ptr [r29+rdi*2+0x24] +XDIS 5f4: MISC BASE D5198D447E25 lea rax, ptr [r30+rdi*2+0x25] +XDIS 5fa: MISC BASE D5198D447F26 lea rax, ptr [r31+rdi*2+0x26] +XDIS 600: MISC BASE D50A8D444008 lea rax, ptr [rax+r8*2+0x8] +XDIS 606: MISC BASE D50A8D444109 lea rax, ptr [rcx+r8*2+0x9] +XDIS 60c: MISC BASE D50A8D44420A lea rax, ptr [rdx+r8*2+0xa] +XDIS 612: MISC BASE D50A8D44430B lea rax, ptr [rbx+r8*2+0xb] +XDIS 618: MISC BASE D50A8D44440C lea rax, ptr [rsp+r8*2+0xc] +XDIS 61e: MISC BASE D50A8D44450D lea rax, ptr [rbp+r8*2+0xd] +XDIS 624: MISC BASE D50A8D44460E lea rax, ptr [rsi+r8*2+0xe] +XDIS 62a: MISC BASE D50A8D44470F lea rax, ptr [rdi+r8*2+0xf] +XDIS 630: MISC BASE D50B8D444010 lea rax, ptr [r8+r8*2+0x10] +XDIS 636: MISC BASE D50B8D444111 lea rax, ptr [r9+r8*2+0x11] +XDIS 63c: MISC BASE D50B8D444212 lea rax, ptr [r10+r8*2+0x12] +XDIS 642: MISC BASE D50B8D444313 lea rax, ptr [r11+r8*2+0x13] +XDIS 648: MISC BASE D50B8D444414 lea rax, ptr [r12+r8*2+0x14] +XDIS 64e: MISC BASE D50B8D444515 lea rax, ptr [r13+r8*2+0x15] +XDIS 654: MISC BASE D50B8D444616 lea rax, ptr [r14+r8*2+0x16] +XDIS 65a: MISC BASE D50B8D444717 lea rax, ptr [r15+r8*2+0x17] +XDIS 660: MISC BASE D51A8D444018 lea rax, ptr [r16+r8*2+0x18] +XDIS 666: MISC BASE D51A8D444119 lea rax, ptr [r17+r8*2+0x19] +XDIS 66c: MISC BASE D51A8D44421A lea rax, ptr [r18+r8*2+0x1a] +XDIS 672: MISC BASE D51A8D44431B lea rax, ptr [r19+r8*2+0x1b] +XDIS 678: MISC BASE D51A8D44441C lea rax, ptr [r20+r8*2+0x1c] +XDIS 67e: MISC BASE D51A8D44451D lea rax, ptr [r21+r8*2+0x1d] +XDIS 684: MISC BASE D51A8D44461E lea rax, ptr [r22+r8*2+0x1e] +XDIS 68a: MISC BASE D51A8D44471F lea rax, ptr [r23+r8*2+0x1f] +XDIS 690: MISC BASE D51B8D444020 lea rax, ptr [r24+r8*2+0x20] +XDIS 696: MISC BASE D51B8D444121 lea rax, ptr [r25+r8*2+0x21] +XDIS 69c: MISC BASE D51B8D444222 lea rax, ptr [r26+r8*2+0x22] +XDIS 6a2: MISC BASE D51B8D444323 lea rax, ptr [r27+r8*2+0x23] +XDIS 6a8: MISC BASE D51B8D444424 lea rax, ptr [r28+r8*2+0x24] +XDIS 6ae: MISC BASE D51B8D444525 lea rax, ptr [r29+r8*2+0x25] +XDIS 6b4: MISC BASE D51B8D444626 lea rax, ptr [r30+r8*2+0x26] +XDIS 6ba: MISC BASE D51B8D444727 lea rax, ptr [r31+r8*2+0x27] +XDIS 6c0: MISC BASE D50A8D444809 lea rax, ptr [rax+r9*2+0x9] +XDIS 6c6: MISC BASE D50A8D44490A lea rax, ptr [rcx+r9*2+0xa] +XDIS 6cc: MISC BASE D50A8D444A0B lea rax, ptr [rdx+r9*2+0xb] +XDIS 6d2: MISC BASE D50A8D444B0C lea rax, ptr [rbx+r9*2+0xc] +XDIS 6d8: MISC BASE D50A8D444C0D lea rax, ptr [rsp+r9*2+0xd] +XDIS 6de: MISC BASE D50A8D444D0E lea rax, ptr [rbp+r9*2+0xe] +XDIS 6e4: MISC BASE D50A8D444E0F lea rax, ptr [rsi+r9*2+0xf] +XDIS 6ea: MISC BASE D50A8D444F10 lea rax, ptr [rdi+r9*2+0x10] +XDIS 6f0: MISC BASE D50B8D444811 lea rax, ptr [r8+r9*2+0x11] +XDIS 6f6: MISC BASE D50B8D444912 lea rax, ptr [r9+r9*2+0x12] +XDIS 6fc: MISC BASE D50B8D444A13 lea rax, ptr [r10+r9*2+0x13] +XDIS 702: MISC BASE D50B8D444B14 lea rax, ptr [r11+r9*2+0x14] +XDIS 708: MISC BASE D50B8D444C15 lea rax, ptr [r12+r9*2+0x15] +XDIS 70e: MISC BASE D50B8D444D16 lea rax, ptr [r13+r9*2+0x16] +XDIS 714: MISC BASE D50B8D444E17 lea rax, ptr [r14+r9*2+0x17] +XDIS 71a: MISC BASE D50B8D444F18 lea rax, ptr [r15+r9*2+0x18] +XDIS 720: MISC BASE D51A8D444819 lea rax, ptr [r16+r9*2+0x19] +XDIS 726: MISC BASE D51A8D44491A lea rax, ptr [r17+r9*2+0x1a] +XDIS 72c: MISC BASE D51A8D444A1B lea rax, ptr [r18+r9*2+0x1b] +XDIS 732: MISC BASE D51A8D444B1C lea rax, ptr [r19+r9*2+0x1c] +XDIS 738: MISC BASE D51A8D444C1D lea rax, ptr [r20+r9*2+0x1d] +XDIS 73e: MISC BASE D51A8D444D1E lea rax, ptr [r21+r9*2+0x1e] +XDIS 744: MISC BASE D51A8D444E1F lea rax, ptr [r22+r9*2+0x1f] +XDIS 74a: MISC BASE D51A8D444F20 lea rax, ptr [r23+r9*2+0x20] +XDIS 750: MISC BASE D51B8D444821 lea rax, ptr [r24+r9*2+0x21] +XDIS 756: MISC BASE D51B8D444922 lea rax, ptr [r25+r9*2+0x22] +XDIS 75c: MISC BASE D51B8D444A23 lea rax, ptr [r26+r9*2+0x23] +XDIS 762: MISC BASE D51B8D444B24 lea rax, ptr [r27+r9*2+0x24] +XDIS 768: MISC BASE D51B8D444C25 lea rax, ptr [r28+r9*2+0x25] +XDIS 76e: MISC BASE D51B8D444D26 lea rax, ptr [r29+r9*2+0x26] +XDIS 774: MISC BASE D51B8D444E27 lea rax, ptr [r30+r9*2+0x27] +XDIS 77a: MISC BASE D51B8D444F28 lea rax, ptr [r31+r9*2+0x28] +XDIS 780: MISC BASE D50A8D44500A lea rax, ptr [rax+r10*2+0xa] +XDIS 786: MISC BASE D50A8D44510B lea rax, ptr [rcx+r10*2+0xb] +XDIS 78c: MISC BASE D50A8D44520C lea rax, ptr [rdx+r10*2+0xc] +XDIS 792: MISC BASE D50A8D44530D lea rax, ptr [rbx+r10*2+0xd] +XDIS 798: MISC BASE D50A8D44540E lea rax, ptr [rsp+r10*2+0xe] +XDIS 79e: MISC BASE D50A8D44550F lea rax, ptr [rbp+r10*2+0xf] +XDIS 7a4: MISC BASE D50A8D445610 lea rax, ptr [rsi+r10*2+0x10] +XDIS 7aa: MISC BASE D50A8D445711 lea rax, ptr [rdi+r10*2+0x11] +XDIS 7b0: MISC BASE D50B8D445012 lea rax, ptr [r8+r10*2+0x12] +XDIS 7b6: MISC BASE D50B8D445113 lea rax, ptr [r9+r10*2+0x13] +XDIS 7bc: MISC BASE D50B8D445214 lea rax, ptr [r10+r10*2+0x14] +XDIS 7c2: MISC BASE D50B8D445315 lea rax, ptr [r11+r10*2+0x15] +XDIS 7c8: MISC BASE D50B8D445416 lea rax, ptr [r12+r10*2+0x16] +XDIS 7ce: MISC BASE D50B8D445517 lea rax, ptr [r13+r10*2+0x17] +XDIS 7d4: MISC BASE D50B8D445618 lea rax, ptr [r14+r10*2+0x18] +XDIS 7da: MISC BASE D50B8D445719 lea rax, ptr [r15+r10*2+0x19] +XDIS 7e0: MISC BASE D51A8D44501A lea rax, ptr [r16+r10*2+0x1a] +XDIS 7e6: MISC BASE D51A8D44511B lea rax, ptr [r17+r10*2+0x1b] +XDIS 7ec: MISC BASE D51A8D44521C lea rax, ptr [r18+r10*2+0x1c] +XDIS 7f2: MISC BASE D51A8D44531D lea rax, ptr [r19+r10*2+0x1d] +XDIS 7f8: MISC BASE D51A8D44541E lea rax, ptr [r20+r10*2+0x1e] +XDIS 7fe: MISC BASE D51A8D44551F lea rax, ptr [r21+r10*2+0x1f] +XDIS 804: MISC BASE D51A8D445620 lea rax, ptr [r22+r10*2+0x20] +XDIS 80a: MISC BASE D51A8D445721 lea rax, ptr [r23+r10*2+0x21] +XDIS 810: MISC BASE D51B8D445022 lea rax, ptr [r24+r10*2+0x22] +XDIS 816: MISC BASE D51B8D445123 lea rax, ptr [r25+r10*2+0x23] +XDIS 81c: MISC BASE D51B8D445224 lea rax, ptr [r26+r10*2+0x24] +XDIS 822: MISC BASE D51B8D445325 lea rax, ptr [r27+r10*2+0x25] +XDIS 828: MISC BASE D51B8D445426 lea rax, ptr [r28+r10*2+0x26] +XDIS 82e: MISC BASE D51B8D445527 lea rax, ptr [r29+r10*2+0x27] +XDIS 834: MISC BASE D51B8D445628 lea rax, ptr [r30+r10*2+0x28] +XDIS 83a: MISC BASE D51B8D445729 lea rax, ptr [r31+r10*2+0x29] +XDIS 840: MISC BASE D50A8D44580B lea rax, ptr [rax+r11*2+0xb] +XDIS 846: MISC BASE D50A8D44590C lea rax, ptr [rcx+r11*2+0xc] +XDIS 84c: MISC BASE D50A8D445A0D lea rax, ptr [rdx+r11*2+0xd] +XDIS 852: MISC BASE D50A8D445B0E lea rax, ptr [rbx+r11*2+0xe] +XDIS 858: MISC BASE D50A8D445C0F lea rax, ptr [rsp+r11*2+0xf] +XDIS 85e: MISC BASE D50A8D445D10 lea rax, ptr [rbp+r11*2+0x10] +XDIS 864: MISC BASE D50A8D445E11 lea rax, ptr [rsi+r11*2+0x11] +XDIS 86a: MISC BASE D50A8D445F12 lea rax, ptr [rdi+r11*2+0x12] +XDIS 870: MISC BASE D50B8D445813 lea rax, ptr [r8+r11*2+0x13] +XDIS 876: MISC BASE D50B8D445914 lea rax, ptr [r9+r11*2+0x14] +XDIS 87c: MISC BASE D50B8D445A15 lea rax, ptr [r10+r11*2+0x15] +XDIS 882: MISC BASE D50B8D445B16 lea rax, ptr [r11+r11*2+0x16] +XDIS 888: MISC BASE D50B8D445C17 lea rax, ptr [r12+r11*2+0x17] +XDIS 88e: MISC BASE D50B8D445D18 lea rax, ptr [r13+r11*2+0x18] +XDIS 894: MISC BASE D50B8D445E19 lea rax, ptr [r14+r11*2+0x19] +XDIS 89a: MISC BASE D50B8D445F1A lea rax, ptr [r15+r11*2+0x1a] +XDIS 8a0: MISC BASE D51A8D44581B lea rax, ptr [r16+r11*2+0x1b] +XDIS 8a6: MISC BASE D51A8D44591C lea rax, ptr [r17+r11*2+0x1c] +XDIS 8ac: MISC BASE D51A8D445A1D lea rax, ptr [r18+r11*2+0x1d] +XDIS 8b2: MISC BASE D51A8D445B1E lea rax, ptr [r19+r11*2+0x1e] +XDIS 8b8: MISC BASE D51A8D445C1F lea rax, ptr [r20+r11*2+0x1f] +XDIS 8be: MISC BASE D51A8D445D20 lea rax, ptr [r21+r11*2+0x20] +XDIS 8c4: MISC BASE D51A8D445E21 lea rax, ptr [r22+r11*2+0x21] +XDIS 8ca: MISC BASE D51A8D445F22 lea rax, ptr [r23+r11*2+0x22] +XDIS 8d0: MISC BASE D51B8D445823 lea rax, ptr [r24+r11*2+0x23] +XDIS 8d6: MISC BASE D51B8D445924 lea rax, ptr [r25+r11*2+0x24] +XDIS 8dc: MISC BASE D51B8D445A25 lea rax, ptr [r26+r11*2+0x25] +XDIS 8e2: MISC BASE D51B8D445B26 lea rax, ptr [r27+r11*2+0x26] +XDIS 8e8: MISC BASE D51B8D445C27 lea rax, ptr [r28+r11*2+0x27] +XDIS 8ee: MISC BASE D51B8D445D28 lea rax, ptr [r29+r11*2+0x28] +XDIS 8f4: MISC BASE D51B8D445E29 lea rax, ptr [r30+r11*2+0x29] +XDIS 8fa: MISC BASE D51B8D445F2A lea rax, ptr [r31+r11*2+0x2a] +XDIS 900: MISC BASE D50A8D44600C lea rax, ptr [rax+r12*2+0xc] +XDIS 906: MISC BASE D50A8D44610D lea rax, ptr [rcx+r12*2+0xd] +XDIS 90c: MISC BASE D50A8D44620E lea rax, ptr [rdx+r12*2+0xe] +XDIS 912: MISC BASE D50A8D44630F lea rax, ptr [rbx+r12*2+0xf] +XDIS 918: MISC BASE D50A8D446410 lea rax, ptr [rsp+r12*2+0x10] +XDIS 91e: MISC BASE D50A8D446511 lea rax, ptr [rbp+r12*2+0x11] +XDIS 924: MISC BASE D50A8D446612 lea rax, ptr [rsi+r12*2+0x12] +XDIS 92a: MISC BASE D50A8D446713 lea rax, ptr [rdi+r12*2+0x13] +XDIS 930: MISC BASE D50B8D446014 lea rax, ptr [r8+r12*2+0x14] +XDIS 936: MISC BASE D50B8D446115 lea rax, ptr [r9+r12*2+0x15] +XDIS 93c: MISC BASE D50B8D446216 lea rax, ptr [r10+r12*2+0x16] +XDIS 942: MISC BASE D50B8D446317 lea rax, ptr [r11+r12*2+0x17] +XDIS 948: MISC BASE D50B8D446418 lea rax, ptr [r12+r12*2+0x18] +XDIS 94e: MISC BASE D50B8D446519 lea rax, ptr [r13+r12*2+0x19] +XDIS 954: MISC BASE D50B8D44661A lea rax, ptr [r14+r12*2+0x1a] +XDIS 95a: MISC BASE D50B8D44671B lea rax, ptr [r15+r12*2+0x1b] +XDIS 960: MISC BASE D51A8D44601C lea rax, ptr [r16+r12*2+0x1c] +XDIS 966: MISC BASE D51A8D44611D lea rax, ptr [r17+r12*2+0x1d] +XDIS 96c: MISC BASE D51A8D44621E lea rax, ptr [r18+r12*2+0x1e] +XDIS 972: MISC BASE D51A8D44631F lea rax, ptr [r19+r12*2+0x1f] +XDIS 978: MISC BASE D51A8D446420 lea rax, ptr [r20+r12*2+0x20] +XDIS 97e: MISC BASE D51A8D446521 lea rax, ptr [r21+r12*2+0x21] +XDIS 984: MISC BASE D51A8D446622 lea rax, ptr [r22+r12*2+0x22] +XDIS 98a: MISC BASE D51A8D446723 lea rax, ptr [r23+r12*2+0x23] +XDIS 990: MISC BASE D51B8D446024 lea rax, ptr [r24+r12*2+0x24] +XDIS 996: MISC BASE D51B8D446125 lea rax, ptr [r25+r12*2+0x25] +XDIS 99c: MISC BASE D51B8D446226 lea rax, ptr [r26+r12*2+0x26] +XDIS 9a2: MISC BASE D51B8D446327 lea rax, ptr [r27+r12*2+0x27] +XDIS 9a8: MISC BASE D51B8D446428 lea rax, ptr [r28+r12*2+0x28] +XDIS 9ae: MISC BASE D51B8D446529 lea rax, ptr [r29+r12*2+0x29] +XDIS 9b4: MISC BASE D51B8D44662A lea rax, ptr [r30+r12*2+0x2a] +XDIS 9ba: MISC BASE D51B8D44672B lea rax, ptr [r31+r12*2+0x2b] +XDIS 9c0: MISC BASE D50A8D44680D lea rax, ptr [rax+r13*2+0xd] +XDIS 9c6: MISC BASE D50A8D44690E lea rax, ptr [rcx+r13*2+0xe] +XDIS 9cc: MISC BASE D50A8D446A0F lea rax, ptr [rdx+r13*2+0xf] +XDIS 9d2: MISC BASE D50A8D446B10 lea rax, ptr [rbx+r13*2+0x10] +XDIS 9d8: MISC BASE D50A8D446C11 lea rax, ptr [rsp+r13*2+0x11] +XDIS 9de: MISC BASE D50A8D446D12 lea rax, ptr [rbp+r13*2+0x12] +XDIS 9e4: MISC BASE D50A8D446E13 lea rax, ptr [rsi+r13*2+0x13] +XDIS 9ea: MISC BASE D50A8D446F14 lea rax, ptr [rdi+r13*2+0x14] +XDIS 9f0: MISC BASE D50B8D446815 lea rax, ptr [r8+r13*2+0x15] +XDIS 9f6: MISC BASE D50B8D446916 lea rax, ptr [r9+r13*2+0x16] +XDIS 9fc: MISC BASE D50B8D446A17 lea rax, ptr [r10+r13*2+0x17] +XDIS a02: MISC BASE D50B8D446B18 lea rax, ptr [r11+r13*2+0x18] +XDIS a08: MISC BASE D50B8D446C19 lea rax, ptr [r12+r13*2+0x19] +XDIS a0e: MISC BASE D50B8D446D1A lea rax, ptr [r13+r13*2+0x1a] +XDIS a14: MISC BASE D50B8D446E1B lea rax, ptr [r14+r13*2+0x1b] +XDIS a1a: MISC BASE D50B8D446F1C lea rax, ptr [r15+r13*2+0x1c] +XDIS a20: MISC BASE D51A8D44681D lea rax, ptr [r16+r13*2+0x1d] +XDIS a26: MISC BASE D51A8D44691E lea rax, ptr [r17+r13*2+0x1e] +XDIS a2c: MISC BASE D51A8D446A1F lea rax, ptr [r18+r13*2+0x1f] +XDIS a32: MISC BASE D51A8D446B20 lea rax, ptr [r19+r13*2+0x20] +XDIS a38: MISC BASE D51A8D446C21 lea rax, ptr [r20+r13*2+0x21] +XDIS a3e: MISC BASE D51A8D446D22 lea rax, ptr [r21+r13*2+0x22] +XDIS a44: MISC BASE D51A8D446E23 lea rax, ptr [r22+r13*2+0x23] +XDIS a4a: MISC BASE D51A8D446F24 lea rax, ptr [r23+r13*2+0x24] +XDIS a50: MISC BASE D51B8D446825 lea rax, ptr [r24+r13*2+0x25] +XDIS a56: MISC BASE D51B8D446926 lea rax, ptr [r25+r13*2+0x26] +XDIS a5c: MISC BASE D51B8D446A27 lea rax, ptr [r26+r13*2+0x27] +XDIS a62: MISC BASE D51B8D446B28 lea rax, ptr [r27+r13*2+0x28] +XDIS a68: MISC BASE D51B8D446C29 lea rax, ptr [r28+r13*2+0x29] +XDIS a6e: MISC BASE D51B8D446D2A lea rax, ptr [r29+r13*2+0x2a] +XDIS a74: MISC BASE D51B8D446E2B lea rax, ptr [r30+r13*2+0x2b] +XDIS a7a: MISC BASE D51B8D446F2C lea rax, ptr [r31+r13*2+0x2c] +XDIS a80: MISC BASE D50A8D44700E lea rax, ptr [rax+r14*2+0xe] +XDIS a86: MISC BASE D50A8D44710F lea rax, ptr [rcx+r14*2+0xf] +XDIS a8c: MISC BASE D50A8D447210 lea rax, ptr [rdx+r14*2+0x10] +XDIS a92: MISC BASE D50A8D447311 lea rax, ptr [rbx+r14*2+0x11] +XDIS a98: MISC BASE D50A8D447412 lea rax, ptr [rsp+r14*2+0x12] +XDIS a9e: MISC BASE D50A8D447513 lea rax, ptr [rbp+r14*2+0x13] +XDIS aa4: MISC BASE D50A8D447614 lea rax, ptr [rsi+r14*2+0x14] +XDIS aaa: MISC BASE D50A8D447715 lea rax, ptr [rdi+r14*2+0x15] +XDIS ab0: MISC BASE D50B8D447016 lea rax, ptr [r8+r14*2+0x16] +XDIS ab6: MISC BASE D50B8D447117 lea rax, ptr [r9+r14*2+0x17] +XDIS abc: MISC BASE D50B8D447218 lea rax, ptr [r10+r14*2+0x18] +XDIS ac2: MISC BASE D50B8D447319 lea rax, ptr [r11+r14*2+0x19] +XDIS ac8: MISC BASE D50B8D44741A lea rax, ptr [r12+r14*2+0x1a] +XDIS ace: MISC BASE D50B8D44751B lea rax, ptr [r13+r14*2+0x1b] +XDIS ad4: MISC BASE D50B8D44761C lea rax, ptr [r14+r14*2+0x1c] +XDIS ada: MISC BASE D50B8D44771D lea rax, ptr [r15+r14*2+0x1d] +XDIS ae0: MISC BASE D51A8D44701E lea rax, ptr [r16+r14*2+0x1e] +XDIS ae6: MISC BASE D51A8D44711F lea rax, ptr [r17+r14*2+0x1f] +XDIS aec: MISC BASE D51A8D447220 lea rax, ptr [r18+r14*2+0x20] +XDIS af2: MISC BASE D51A8D447321 lea rax, ptr [r19+r14*2+0x21] +XDIS af8: MISC BASE D51A8D447422 lea rax, ptr [r20+r14*2+0x22] +XDIS afe: MISC BASE D51A8D447523 lea rax, ptr [r21+r14*2+0x23] +XDIS b04: MISC BASE D51A8D447624 lea rax, ptr [r22+r14*2+0x24] +XDIS b0a: MISC BASE D51A8D447725 lea rax, ptr [r23+r14*2+0x25] +XDIS b10: MISC BASE D51B8D447026 lea rax, ptr [r24+r14*2+0x26] +XDIS b16: MISC BASE D51B8D447127 lea rax, ptr [r25+r14*2+0x27] +XDIS b1c: MISC BASE D51B8D447228 lea rax, ptr [r26+r14*2+0x28] +XDIS b22: MISC BASE D51B8D447329 lea rax, ptr [r27+r14*2+0x29] +XDIS b28: MISC BASE D51B8D44742A lea rax, ptr [r28+r14*2+0x2a] +XDIS b2e: MISC BASE D51B8D44752B lea rax, ptr [r29+r14*2+0x2b] +XDIS b34: MISC BASE D51B8D44762C lea rax, ptr [r30+r14*2+0x2c] +XDIS b3a: MISC BASE D51B8D44772D lea rax, ptr [r31+r14*2+0x2d] +XDIS b40: MISC BASE D50A8D44780F lea rax, ptr [rax+r15*2+0xf] +XDIS b46: MISC BASE D50A8D447910 lea rax, ptr [rcx+r15*2+0x10] +XDIS b4c: MISC BASE D50A8D447A11 lea rax, ptr [rdx+r15*2+0x11] +XDIS b52: MISC BASE D50A8D447B12 lea rax, ptr [rbx+r15*2+0x12] +XDIS b58: MISC BASE D50A8D447C13 lea rax, ptr [rsp+r15*2+0x13] +XDIS b5e: MISC BASE D50A8D447D14 lea rax, ptr [rbp+r15*2+0x14] +XDIS b64: MISC BASE D50A8D447E15 lea rax, ptr [rsi+r15*2+0x15] +XDIS b6a: MISC BASE D50A8D447F16 lea rax, ptr [rdi+r15*2+0x16] +XDIS b70: MISC BASE D50B8D447817 lea rax, ptr [r8+r15*2+0x17] +XDIS b76: MISC BASE D50B8D447918 lea rax, ptr [r9+r15*2+0x18] +XDIS b7c: MISC BASE D50B8D447A19 lea rax, ptr [r10+r15*2+0x19] +XDIS b82: MISC BASE D50B8D447B1A lea rax, ptr [r11+r15*2+0x1a] +XDIS b88: MISC BASE D50B8D447C1B lea rax, ptr [r12+r15*2+0x1b] +XDIS b8e: MISC BASE D50B8D447D1C lea rax, ptr [r13+r15*2+0x1c] +XDIS b94: MISC BASE D50B8D447E1D lea rax, ptr [r14+r15*2+0x1d] +XDIS b9a: MISC BASE D50B8D447F1E lea rax, ptr [r15+r15*2+0x1e] +XDIS ba0: MISC BASE D51A8D44781F lea rax, ptr [r16+r15*2+0x1f] +XDIS ba6: MISC BASE D51A8D447920 lea rax, ptr [r17+r15*2+0x20] +XDIS bac: MISC BASE D51A8D447A21 lea rax, ptr [r18+r15*2+0x21] +XDIS bb2: MISC BASE D51A8D447B22 lea rax, ptr [r19+r15*2+0x22] +XDIS bb8: MISC BASE D51A8D447C23 lea rax, ptr [r20+r15*2+0x23] +XDIS bbe: MISC BASE D51A8D447D24 lea rax, ptr [r21+r15*2+0x24] +XDIS bc4: MISC BASE D51A8D447E25 lea rax, ptr [r22+r15*2+0x25] +XDIS bca: MISC BASE D51A8D447F26 lea rax, ptr [r23+r15*2+0x26] +XDIS bd0: MISC BASE D51B8D447827 lea rax, ptr [r24+r15*2+0x27] +XDIS bd6: MISC BASE D51B8D447928 lea rax, ptr [r25+r15*2+0x28] +XDIS bdc: MISC BASE D51B8D447A29 lea rax, ptr [r26+r15*2+0x29] +XDIS be2: MISC BASE D51B8D447B2A lea rax, ptr [r27+r15*2+0x2a] +XDIS be8: MISC BASE D51B8D447C2B lea rax, ptr [r28+r15*2+0x2b] +XDIS bee: MISC BASE D51B8D447D2C lea rax, ptr [r29+r15*2+0x2c] +XDIS bf4: MISC BASE D51B8D447E2D lea rax, ptr [r30+r15*2+0x2d] +XDIS bfa: MISC BASE D51B8D447F2E lea rax, ptr [r31+r15*2+0x2e] +XDIS c00: MISC BASE D5288D444010 lea rax, ptr [rax+r16*2+0x10] +XDIS c06: MISC BASE D5288D444111 lea rax, ptr [rcx+r16*2+0x11] +XDIS c0c: MISC BASE D5288D444212 lea rax, ptr [rdx+r16*2+0x12] +XDIS c12: MISC BASE D5288D444313 lea rax, ptr [rbx+r16*2+0x13] +XDIS c18: MISC BASE D5288D444414 lea rax, ptr [rsp+r16*2+0x14] +XDIS c1e: MISC BASE D5288D444515 lea rax, ptr [rbp+r16*2+0x15] +XDIS c24: MISC BASE D5288D444616 lea rax, ptr [rsi+r16*2+0x16] +XDIS c2a: MISC BASE D5288D444717 lea rax, ptr [rdi+r16*2+0x17] +XDIS c30: MISC BASE D5298D444018 lea rax, ptr [r8+r16*2+0x18] +XDIS c36: MISC BASE D5298D444119 lea rax, ptr [r9+r16*2+0x19] +XDIS c3c: MISC BASE D5298D44421A lea rax, ptr [r10+r16*2+0x1a] +XDIS c42: MISC BASE D5298D44431B lea rax, ptr [r11+r16*2+0x1b] +XDIS c48: MISC BASE D5298D44441C lea rax, ptr [r12+r16*2+0x1c] +XDIS c4e: MISC BASE D5298D44451D lea rax, ptr [r13+r16*2+0x1d] +XDIS c54: MISC BASE D5298D44461E lea rax, ptr [r14+r16*2+0x1e] +XDIS c5a: MISC BASE D5298D44471F lea rax, ptr [r15+r16*2+0x1f] +XDIS c60: MISC BASE D5388D444020 lea rax, ptr [r16+r16*2+0x20] +XDIS c66: MISC BASE D5388D444121 lea rax, ptr [r17+r16*2+0x21] +XDIS c6c: MISC BASE D5388D444222 lea rax, ptr [r18+r16*2+0x22] +XDIS c72: MISC BASE D5388D444323 lea rax, ptr [r19+r16*2+0x23] +XDIS c78: MISC BASE D5388D444424 lea rax, ptr [r20+r16*2+0x24] +XDIS c7e: MISC BASE D5388D444525 lea rax, ptr [r21+r16*2+0x25] +XDIS c84: MISC BASE D5388D444626 lea rax, ptr [r22+r16*2+0x26] +XDIS c8a: MISC BASE D5388D444727 lea rax, ptr [r23+r16*2+0x27] +XDIS c90: MISC BASE D5398D444028 lea rax, ptr [r24+r16*2+0x28] +XDIS c96: MISC BASE D5398D444129 lea rax, ptr [r25+r16*2+0x29] +XDIS c9c: MISC BASE D5398D44422A lea rax, ptr [r26+r16*2+0x2a] +XDIS ca2: MISC BASE D5398D44432B lea rax, ptr [r27+r16*2+0x2b] +XDIS ca8: MISC BASE D5398D44442C lea rax, ptr [r28+r16*2+0x2c] +XDIS cae: MISC BASE D5398D44452D lea rax, ptr [r29+r16*2+0x2d] +XDIS cb4: MISC BASE D5398D44462E lea rax, ptr [r30+r16*2+0x2e] +XDIS cba: MISC BASE D5398D44472F lea rax, ptr [r31+r16*2+0x2f] +XDIS cc0: MISC BASE D5288D444811 lea rax, ptr [rax+r17*2+0x11] +XDIS cc6: MISC BASE D5288D444912 lea rax, ptr [rcx+r17*2+0x12] +XDIS ccc: MISC BASE D5288D444A13 lea rax, ptr [rdx+r17*2+0x13] +XDIS cd2: MISC BASE D5288D444B14 lea rax, ptr [rbx+r17*2+0x14] +XDIS cd8: MISC BASE D5288D444C15 lea rax, ptr [rsp+r17*2+0x15] +XDIS cde: MISC BASE D5288D444D16 lea rax, ptr [rbp+r17*2+0x16] +XDIS ce4: MISC BASE D5288D444E17 lea rax, ptr [rsi+r17*2+0x17] +XDIS cea: MISC BASE D5288D444F18 lea rax, ptr [rdi+r17*2+0x18] +XDIS cf0: MISC BASE D5298D444819 lea rax, ptr [r8+r17*2+0x19] +XDIS cf6: MISC BASE D5298D44491A lea rax, ptr [r9+r17*2+0x1a] +XDIS cfc: MISC BASE D5298D444A1B lea rax, ptr [r10+r17*2+0x1b] +XDIS d02: MISC BASE D5298D444B1C lea rax, ptr [r11+r17*2+0x1c] +XDIS d08: MISC BASE D5298D444C1D lea rax, ptr [r12+r17*2+0x1d] +XDIS d0e: MISC BASE D5298D444D1E lea rax, ptr [r13+r17*2+0x1e] +XDIS d14: MISC BASE D5298D444E1F lea rax, ptr [r14+r17*2+0x1f] +XDIS d1a: MISC BASE D5298D444F20 lea rax, ptr [r15+r17*2+0x20] +XDIS d20: MISC BASE D5388D444821 lea rax, ptr [r16+r17*2+0x21] +XDIS d26: MISC BASE D5388D444922 lea rax, ptr [r17+r17*2+0x22] +XDIS d2c: MISC BASE D5388D444A23 lea rax, ptr [r18+r17*2+0x23] +XDIS d32: MISC BASE D5388D444B24 lea rax, ptr [r19+r17*2+0x24] +XDIS d38: MISC BASE D5388D444C25 lea rax, ptr [r20+r17*2+0x25] +XDIS d3e: MISC BASE D5388D444D26 lea rax, ptr [r21+r17*2+0x26] +XDIS d44: MISC BASE D5388D444E27 lea rax, ptr [r22+r17*2+0x27] +XDIS d4a: MISC BASE D5388D444F28 lea rax, ptr [r23+r17*2+0x28] +XDIS d50: MISC BASE D5398D444829 lea rax, ptr [r24+r17*2+0x29] +XDIS d56: MISC BASE D5398D44492A lea rax, ptr [r25+r17*2+0x2a] +XDIS d5c: MISC BASE D5398D444A2B lea rax, ptr [r26+r17*2+0x2b] +XDIS d62: MISC BASE D5398D444B2C lea rax, ptr [r27+r17*2+0x2c] +XDIS d68: MISC BASE D5398D444C2D lea rax, ptr [r28+r17*2+0x2d] +XDIS d6e: MISC BASE D5398D444D2E lea rax, ptr [r29+r17*2+0x2e] +XDIS d74: MISC BASE D5398D444E2F lea rax, ptr [r30+r17*2+0x2f] +XDIS d7a: MISC BASE D5398D444F30 lea rax, ptr [r31+r17*2+0x30] +XDIS d80: MISC BASE D5288D445012 lea rax, ptr [rax+r18*2+0x12] +XDIS d86: MISC BASE D5288D445113 lea rax, ptr [rcx+r18*2+0x13] +XDIS d8c: MISC BASE D5288D445214 lea rax, ptr [rdx+r18*2+0x14] +XDIS d92: MISC BASE D5288D445315 lea rax, ptr [rbx+r18*2+0x15] +XDIS d98: MISC BASE D5288D445416 lea rax, ptr [rsp+r18*2+0x16] +XDIS d9e: MISC BASE D5288D445517 lea rax, ptr [rbp+r18*2+0x17] +XDIS da4: MISC BASE D5288D445618 lea rax, ptr [rsi+r18*2+0x18] +XDIS daa: MISC BASE D5288D445719 lea rax, ptr [rdi+r18*2+0x19] +XDIS db0: MISC BASE D5298D44501A lea rax, ptr [r8+r18*2+0x1a] +XDIS db6: MISC BASE D5298D44511B lea rax, ptr [r9+r18*2+0x1b] +XDIS dbc: MISC BASE D5298D44521C lea rax, ptr [r10+r18*2+0x1c] +XDIS dc2: MISC BASE D5298D44531D lea rax, ptr [r11+r18*2+0x1d] +XDIS dc8: MISC BASE D5298D44541E lea rax, ptr [r12+r18*2+0x1e] +XDIS dce: MISC BASE D5298D44551F lea rax, ptr [r13+r18*2+0x1f] +XDIS dd4: MISC BASE D5298D445620 lea rax, ptr [r14+r18*2+0x20] +XDIS dda: MISC BASE D5298D445721 lea rax, ptr [r15+r18*2+0x21] +XDIS de0: MISC BASE D5388D445022 lea rax, ptr [r16+r18*2+0x22] +XDIS de6: MISC BASE D5388D445123 lea rax, ptr [r17+r18*2+0x23] +XDIS dec: MISC BASE D5388D445224 lea rax, ptr [r18+r18*2+0x24] +XDIS df2: MISC BASE D5388D445325 lea rax, ptr [r19+r18*2+0x25] +XDIS df8: MISC BASE D5388D445426 lea rax, ptr [r20+r18*2+0x26] +XDIS dfe: MISC BASE D5388D445527 lea rax, ptr [r21+r18*2+0x27] +XDIS e04: MISC BASE D5388D445628 lea rax, ptr [r22+r18*2+0x28] +XDIS e0a: MISC BASE D5388D445729 lea rax, ptr [r23+r18*2+0x29] +XDIS e10: MISC BASE D5398D44502A lea rax, ptr [r24+r18*2+0x2a] +XDIS e16: MISC BASE D5398D44512B lea rax, ptr [r25+r18*2+0x2b] +XDIS e1c: MISC BASE D5398D44522C lea rax, ptr [r26+r18*2+0x2c] +XDIS e22: MISC BASE D5398D44532D lea rax, ptr [r27+r18*2+0x2d] +XDIS e28: MISC BASE D5398D44542E lea rax, ptr [r28+r18*2+0x2e] +XDIS e2e: MISC BASE D5398D44552F lea rax, ptr [r29+r18*2+0x2f] +XDIS e34: MISC BASE D5398D445630 lea rax, ptr [r30+r18*2+0x30] +XDIS e3a: MISC BASE D5398D445731 lea rax, ptr [r31+r18*2+0x31] +XDIS e40: MISC BASE D5288D445813 lea rax, ptr [rax+r19*2+0x13] +XDIS e46: MISC BASE D5288D445914 lea rax, ptr [rcx+r19*2+0x14] +XDIS e4c: MISC BASE D5288D445A15 lea rax, ptr [rdx+r19*2+0x15] +XDIS e52: MISC BASE D5288D445B16 lea rax, ptr [rbx+r19*2+0x16] +XDIS e58: MISC BASE D5288D445C17 lea rax, ptr [rsp+r19*2+0x17] +XDIS e5e: MISC BASE D5288D445D18 lea rax, ptr [rbp+r19*2+0x18] +XDIS e64: MISC BASE D5288D445E19 lea rax, ptr [rsi+r19*2+0x19] +XDIS e6a: MISC BASE D5288D445F1A lea rax, ptr [rdi+r19*2+0x1a] +XDIS e70: MISC BASE D5298D44581B lea rax, ptr [r8+r19*2+0x1b] +XDIS e76: MISC BASE D5298D44591C lea rax, ptr [r9+r19*2+0x1c] +XDIS e7c: MISC BASE D5298D445A1D lea rax, ptr [r10+r19*2+0x1d] +XDIS e82: MISC BASE D5298D445B1E lea rax, ptr [r11+r19*2+0x1e] +XDIS e88: MISC BASE D5298D445C1F lea rax, ptr [r12+r19*2+0x1f] +XDIS e8e: MISC BASE D5298D445D20 lea rax, ptr [r13+r19*2+0x20] +XDIS e94: MISC BASE D5298D445E21 lea rax, ptr [r14+r19*2+0x21] +XDIS e9a: MISC BASE D5298D445F22 lea rax, ptr [r15+r19*2+0x22] +XDIS ea0: MISC BASE D5388D445823 lea rax, ptr [r16+r19*2+0x23] +XDIS ea6: MISC BASE D5388D445924 lea rax, ptr [r17+r19*2+0x24] +XDIS eac: MISC BASE D5388D445A25 lea rax, ptr [r18+r19*2+0x25] +XDIS eb2: MISC BASE D5388D445B26 lea rax, ptr [r19+r19*2+0x26] +XDIS eb8: MISC BASE D5388D445C27 lea rax, ptr [r20+r19*2+0x27] +XDIS ebe: MISC BASE D5388D445D28 lea rax, ptr [r21+r19*2+0x28] +XDIS ec4: MISC BASE D5388D445E29 lea rax, ptr [r22+r19*2+0x29] +XDIS eca: MISC BASE D5388D445F2A lea rax, ptr [r23+r19*2+0x2a] +XDIS ed0: MISC BASE D5398D44582B lea rax, ptr [r24+r19*2+0x2b] +XDIS ed6: MISC BASE D5398D44592C lea rax, ptr [r25+r19*2+0x2c] +XDIS edc: MISC BASE D5398D445A2D lea rax, ptr [r26+r19*2+0x2d] +XDIS ee2: MISC BASE D5398D445B2E lea rax, ptr [r27+r19*2+0x2e] +XDIS ee8: MISC BASE D5398D445C2F lea rax, ptr [r28+r19*2+0x2f] +XDIS eee: MISC BASE D5398D445D30 lea rax, ptr [r29+r19*2+0x30] +XDIS ef4: MISC BASE D5398D445E31 lea rax, ptr [r30+r19*2+0x31] +XDIS efa: MISC BASE D5398D445F32 lea rax, ptr [r31+r19*2+0x32] +XDIS f00: MISC BASE D5288D446014 lea rax, ptr [rax+r20*2+0x14] +XDIS f06: MISC BASE D5288D446115 lea rax, ptr [rcx+r20*2+0x15] +XDIS f0c: MISC BASE D5288D446216 lea rax, ptr [rdx+r20*2+0x16] +XDIS f12: MISC BASE D5288D446317 lea rax, ptr [rbx+r20*2+0x17] +XDIS f18: MISC BASE D5288D446418 lea rax, ptr [rsp+r20*2+0x18] +XDIS f1e: MISC BASE D5288D446519 lea rax, ptr [rbp+r20*2+0x19] +XDIS f24: MISC BASE D5288D44661A lea rax, ptr [rsi+r20*2+0x1a] +XDIS f2a: MISC BASE D5288D44671B lea rax, ptr [rdi+r20*2+0x1b] +XDIS f30: MISC BASE D5298D44601C lea rax, ptr [r8+r20*2+0x1c] +XDIS f36: MISC BASE D5298D44611D lea rax, ptr [r9+r20*2+0x1d] +XDIS f3c: MISC BASE D5298D44621E lea rax, ptr [r10+r20*2+0x1e] +XDIS f42: MISC BASE D5298D44631F lea rax, ptr [r11+r20*2+0x1f] +XDIS f48: MISC BASE D5298D446420 lea rax, ptr [r12+r20*2+0x20] +XDIS f4e: MISC BASE D5298D446521 lea rax, ptr [r13+r20*2+0x21] +XDIS f54: MISC BASE D5298D446622 lea rax, ptr [r14+r20*2+0x22] +XDIS f5a: MISC BASE D5298D446723 lea rax, ptr [r15+r20*2+0x23] +XDIS f60: MISC BASE D5388D446024 lea rax, ptr [r16+r20*2+0x24] +XDIS f66: MISC BASE D5388D446125 lea rax, ptr [r17+r20*2+0x25] +XDIS f6c: MISC BASE D5388D446226 lea rax, ptr [r18+r20*2+0x26] +XDIS f72: MISC BASE D5388D446327 lea rax, ptr [r19+r20*2+0x27] +XDIS f78: MISC BASE D5388D446428 lea rax, ptr [r20+r20*2+0x28] +XDIS f7e: MISC BASE D5388D446529 lea rax, ptr [r21+r20*2+0x29] +XDIS f84: MISC BASE D5388D44662A lea rax, ptr [r22+r20*2+0x2a] +XDIS f8a: MISC BASE D5388D44672B lea rax, ptr [r23+r20*2+0x2b] +XDIS f90: MISC BASE D5398D44602C lea rax, ptr [r24+r20*2+0x2c] +XDIS f96: MISC BASE D5398D44612D lea rax, ptr [r25+r20*2+0x2d] +XDIS f9c: MISC BASE D5398D44622E lea rax, ptr [r26+r20*2+0x2e] +XDIS fa2: MISC BASE D5398D44632F lea rax, ptr [r27+r20*2+0x2f] +XDIS fa8: MISC BASE D5398D446430 lea rax, ptr [r28+r20*2+0x30] +XDIS fae: MISC BASE D5398D446531 lea rax, ptr [r29+r20*2+0x31] +XDIS fb4: MISC BASE D5398D446632 lea rax, ptr [r30+r20*2+0x32] +XDIS fba: MISC BASE D5398D446733 lea rax, ptr [r31+r20*2+0x33] +XDIS fc0: MISC BASE D5288D446815 lea rax, ptr [rax+r21*2+0x15] +XDIS fc6: MISC BASE D5288D446916 lea rax, ptr [rcx+r21*2+0x16] +XDIS fcc: MISC BASE D5288D446A17 lea rax, ptr [rdx+r21*2+0x17] +XDIS fd2: MISC BASE D5288D446B18 lea rax, ptr [rbx+r21*2+0x18] +XDIS fd8: MISC BASE D5288D446C19 lea rax, ptr [rsp+r21*2+0x19] +XDIS fde: MISC BASE D5288D446D1A lea rax, ptr [rbp+r21*2+0x1a] +XDIS fe4: MISC BASE D5288D446E1B lea rax, ptr [rsi+r21*2+0x1b] +XDIS fea: MISC BASE D5288D446F1C lea rax, ptr [rdi+r21*2+0x1c] +XDIS ff0: MISC BASE D5298D44681D lea rax, ptr [r8+r21*2+0x1d] +XDIS ff6: MISC BASE D5298D44691E lea rax, ptr [r9+r21*2+0x1e] +XDIS ffc: MISC BASE D5298D446A1F lea rax, ptr [r10+r21*2+0x1f] +XDIS 1002: MISC BASE D5298D446B20 lea rax, ptr [r11+r21*2+0x20] +XDIS 1008: MISC BASE D5298D446C21 lea rax, ptr [r12+r21*2+0x21] +XDIS 100e: MISC BASE D5298D446D22 lea rax, ptr [r13+r21*2+0x22] +XDIS 1014: MISC BASE D5298D446E23 lea rax, ptr [r14+r21*2+0x23] +XDIS 101a: MISC BASE D5298D446F24 lea rax, ptr [r15+r21*2+0x24] +XDIS 1020: MISC BASE D5388D446825 lea rax, ptr [r16+r21*2+0x25] +XDIS 1026: MISC BASE D5388D446926 lea rax, ptr [r17+r21*2+0x26] +XDIS 102c: MISC BASE D5388D446A27 lea rax, ptr [r18+r21*2+0x27] +XDIS 1032: MISC BASE D5388D446B28 lea rax, ptr [r19+r21*2+0x28] +XDIS 1038: MISC BASE D5388D446C29 lea rax, ptr [r20+r21*2+0x29] +XDIS 103e: MISC BASE D5388D446D2A lea rax, ptr [r21+r21*2+0x2a] +XDIS 1044: MISC BASE D5388D446E2B lea rax, ptr [r22+r21*2+0x2b] +XDIS 104a: MISC BASE D5388D446F2C lea rax, ptr [r23+r21*2+0x2c] +XDIS 1050: MISC BASE D5398D44682D lea rax, ptr [r24+r21*2+0x2d] +XDIS 1056: MISC BASE D5398D44692E lea rax, ptr [r25+r21*2+0x2e] +XDIS 105c: MISC BASE D5398D446A2F lea rax, ptr [r26+r21*2+0x2f] +XDIS 1062: MISC BASE D5398D446B30 lea rax, ptr [r27+r21*2+0x30] +XDIS 1068: MISC BASE D5398D446C31 lea rax, ptr [r28+r21*2+0x31] +XDIS 106e: MISC BASE D5398D446D32 lea rax, ptr [r29+r21*2+0x32] +XDIS 1074: MISC BASE D5398D446E33 lea rax, ptr [r30+r21*2+0x33] +XDIS 107a: MISC BASE D5398D446F34 lea rax, ptr [r31+r21*2+0x34] +XDIS 1080: MISC BASE D5288D447016 lea rax, ptr [rax+r22*2+0x16] +XDIS 1086: MISC BASE D5288D447117 lea rax, ptr [rcx+r22*2+0x17] +XDIS 108c: MISC BASE D5288D447218 lea rax, ptr [rdx+r22*2+0x18] +XDIS 1092: MISC BASE D5288D447319 lea rax, ptr [rbx+r22*2+0x19] +XDIS 1098: MISC BASE D5288D44741A lea rax, ptr [rsp+r22*2+0x1a] +XDIS 109e: MISC BASE D5288D44751B lea rax, ptr [rbp+r22*2+0x1b] +XDIS 10a4: MISC BASE D5288D44761C lea rax, ptr [rsi+r22*2+0x1c] +XDIS 10aa: MISC BASE D5288D44771D lea rax, ptr [rdi+r22*2+0x1d] +XDIS 10b0: MISC BASE D5298D44701E lea rax, ptr [r8+r22*2+0x1e] +XDIS 10b6: MISC BASE D5298D44711F lea rax, ptr [r9+r22*2+0x1f] +XDIS 10bc: MISC BASE D5298D447220 lea rax, ptr [r10+r22*2+0x20] +XDIS 10c2: MISC BASE D5298D447321 lea rax, ptr [r11+r22*2+0x21] +XDIS 10c8: MISC BASE D5298D447422 lea rax, ptr [r12+r22*2+0x22] +XDIS 10ce: MISC BASE D5298D447523 lea rax, ptr [r13+r22*2+0x23] +XDIS 10d4: MISC BASE D5298D447624 lea rax, ptr [r14+r22*2+0x24] +XDIS 10da: MISC BASE D5298D447725 lea rax, ptr [r15+r22*2+0x25] +XDIS 10e0: MISC BASE D5388D447026 lea rax, ptr [r16+r22*2+0x26] +XDIS 10e6: MISC BASE D5388D447127 lea rax, ptr [r17+r22*2+0x27] +XDIS 10ec: MISC BASE D5388D447228 lea rax, ptr [r18+r22*2+0x28] +XDIS 10f2: MISC BASE D5388D447329 lea rax, ptr [r19+r22*2+0x29] +XDIS 10f8: MISC BASE D5388D44742A lea rax, ptr [r20+r22*2+0x2a] +XDIS 10fe: MISC BASE D5388D44752B lea rax, ptr [r21+r22*2+0x2b] +XDIS 1104: MISC BASE D5388D44762C lea rax, ptr [r22+r22*2+0x2c] +XDIS 110a: MISC BASE D5388D44772D lea rax, ptr [r23+r22*2+0x2d] +XDIS 1110: MISC BASE D5398D44702E lea rax, ptr [r24+r22*2+0x2e] +XDIS 1116: MISC BASE D5398D44712F lea rax, ptr [r25+r22*2+0x2f] +XDIS 111c: MISC BASE D5398D447230 lea rax, ptr [r26+r22*2+0x30] +XDIS 1122: MISC BASE D5398D447331 lea rax, ptr [r27+r22*2+0x31] +XDIS 1128: MISC BASE D5398D447432 lea rax, ptr [r28+r22*2+0x32] +XDIS 112e: MISC BASE D5398D447533 lea rax, ptr [r29+r22*2+0x33] +XDIS 1134: MISC BASE D5398D447634 lea rax, ptr [r30+r22*2+0x34] +XDIS 113a: MISC BASE D5398D447735 lea rax, ptr [r31+r22*2+0x35] +XDIS 1140: MISC BASE D5288D447817 lea rax, ptr [rax+r23*2+0x17] +XDIS 1146: MISC BASE D5288D447918 lea rax, ptr [rcx+r23*2+0x18] +XDIS 114c: MISC BASE D5288D447A19 lea rax, ptr [rdx+r23*2+0x19] +XDIS 1152: MISC BASE D5288D447B1A lea rax, ptr [rbx+r23*2+0x1a] +XDIS 1158: MISC BASE D5288D447C1B lea rax, ptr [rsp+r23*2+0x1b] +XDIS 115e: MISC BASE D5288D447D1C lea rax, ptr [rbp+r23*2+0x1c] +XDIS 1164: MISC BASE D5288D447E1D lea rax, ptr [rsi+r23*2+0x1d] +XDIS 116a: MISC BASE D5288D447F1E lea rax, ptr [rdi+r23*2+0x1e] +XDIS 1170: MISC BASE D5298D44781F lea rax, ptr [r8+r23*2+0x1f] +XDIS 1176: MISC BASE D5298D447920 lea rax, ptr [r9+r23*2+0x20] +XDIS 117c: MISC BASE D5298D447A21 lea rax, ptr [r10+r23*2+0x21] +XDIS 1182: MISC BASE D5298D447B22 lea rax, ptr [r11+r23*2+0x22] +XDIS 1188: MISC BASE D5298D447C23 lea rax, ptr [r12+r23*2+0x23] +XDIS 118e: MISC BASE D5298D447D24 lea rax, ptr [r13+r23*2+0x24] +XDIS 1194: MISC BASE D5298D447E25 lea rax, ptr [r14+r23*2+0x25] +XDIS 119a: MISC BASE D5298D447F26 lea rax, ptr [r15+r23*2+0x26] +XDIS 11a0: MISC BASE D5388D447827 lea rax, ptr [r16+r23*2+0x27] +XDIS 11a6: MISC BASE D5388D447928 lea rax, ptr [r17+r23*2+0x28] +XDIS 11ac: MISC BASE D5388D447A29 lea rax, ptr [r18+r23*2+0x29] +XDIS 11b2: MISC BASE D5388D447B2A lea rax, ptr [r19+r23*2+0x2a] +XDIS 11b8: MISC BASE D5388D447C2B lea rax, ptr [r20+r23*2+0x2b] +XDIS 11be: MISC BASE D5388D447D2C lea rax, ptr [r21+r23*2+0x2c] +XDIS 11c4: MISC BASE D5388D447E2D lea rax, ptr [r22+r23*2+0x2d] +XDIS 11ca: MISC BASE D5388D447F2E lea rax, ptr [r23+r23*2+0x2e] +XDIS 11d0: MISC BASE D5398D44782F lea rax, ptr [r24+r23*2+0x2f] +XDIS 11d6: MISC BASE D5398D447930 lea rax, ptr [r25+r23*2+0x30] +XDIS 11dc: MISC BASE D5398D447A31 lea rax, ptr [r26+r23*2+0x31] +XDIS 11e2: MISC BASE D5398D447B32 lea rax, ptr [r27+r23*2+0x32] +XDIS 11e8: MISC BASE D5398D447C33 lea rax, ptr [r28+r23*2+0x33] +XDIS 11ee: MISC BASE D5398D447D34 lea rax, ptr [r29+r23*2+0x34] +XDIS 11f4: MISC BASE D5398D447E35 lea rax, ptr [r30+r23*2+0x35] +XDIS 11fa: MISC BASE D5398D447F36 lea rax, ptr [r31+r23*2+0x36] +XDIS 1200: MISC BASE D52A8D444018 lea rax, ptr [rax+r24*2+0x18] +XDIS 1206: MISC BASE D52A8D444119 lea rax, ptr [rcx+r24*2+0x19] +XDIS 120c: MISC BASE D52A8D44421A lea rax, ptr [rdx+r24*2+0x1a] +XDIS 1212: MISC BASE D52A8D44431B lea rax, ptr [rbx+r24*2+0x1b] +XDIS 1218: MISC BASE D52A8D44441C lea rax, ptr [rsp+r24*2+0x1c] +XDIS 121e: MISC BASE D52A8D44451D lea rax, ptr [rbp+r24*2+0x1d] +XDIS 1224: MISC BASE D52A8D44461E lea rax, ptr [rsi+r24*2+0x1e] +XDIS 122a: MISC BASE D52A8D44471F lea rax, ptr [rdi+r24*2+0x1f] +XDIS 1230: MISC BASE D52B8D444020 lea rax, ptr [r8+r24*2+0x20] +XDIS 1236: MISC BASE D52B8D444121 lea rax, ptr [r9+r24*2+0x21] +XDIS 123c: MISC BASE D52B8D444222 lea rax, ptr [r10+r24*2+0x22] +XDIS 1242: MISC BASE D52B8D444323 lea rax, ptr [r11+r24*2+0x23] +XDIS 1248: MISC BASE D52B8D444424 lea rax, ptr [r12+r24*2+0x24] +XDIS 124e: MISC BASE D52B8D444525 lea rax, ptr [r13+r24*2+0x25] +XDIS 1254: MISC BASE D52B8D444626 lea rax, ptr [r14+r24*2+0x26] +XDIS 125a: MISC BASE D52B8D444727 lea rax, ptr [r15+r24*2+0x27] +XDIS 1260: MISC BASE D53A8D444028 lea rax, ptr [r16+r24*2+0x28] +XDIS 1266: MISC BASE D53A8D444129 lea rax, ptr [r17+r24*2+0x29] +XDIS 126c: MISC BASE D53A8D44422A lea rax, ptr [r18+r24*2+0x2a] +XDIS 1272: MISC BASE D53A8D44432B lea rax, ptr [r19+r24*2+0x2b] +XDIS 1278: MISC BASE D53A8D44442C lea rax, ptr [r20+r24*2+0x2c] +XDIS 127e: MISC BASE D53A8D44452D lea rax, ptr [r21+r24*2+0x2d] +XDIS 1284: MISC BASE D53A8D44462E lea rax, ptr [r22+r24*2+0x2e] +XDIS 128a: MISC BASE D53A8D44472F lea rax, ptr [r23+r24*2+0x2f] +XDIS 1290: MISC BASE D53B8D444030 lea rax, ptr [r24+r24*2+0x30] +XDIS 1296: MISC BASE D53B8D444131 lea rax, ptr [r25+r24*2+0x31] +XDIS 129c: MISC BASE D53B8D444232 lea rax, ptr [r26+r24*2+0x32] +XDIS 12a2: MISC BASE D53B8D444333 lea rax, ptr [r27+r24*2+0x33] +XDIS 12a8: MISC BASE D53B8D444434 lea rax, ptr [r28+r24*2+0x34] +XDIS 12ae: MISC BASE D53B8D444535 lea rax, ptr [r29+r24*2+0x35] +XDIS 12b4: MISC BASE D53B8D444636 lea rax, ptr [r30+r24*2+0x36] +XDIS 12ba: MISC BASE D53B8D444737 lea rax, ptr [r31+r24*2+0x37] +XDIS 12c0: MISC BASE D52A8D444819 lea rax, ptr [rax+r25*2+0x19] +XDIS 12c6: MISC BASE D52A8D44491A lea rax, ptr [rcx+r25*2+0x1a] +XDIS 12cc: MISC BASE D52A8D444A1B lea rax, ptr [rdx+r25*2+0x1b] +XDIS 12d2: MISC BASE D52A8D444B1C lea rax, ptr [rbx+r25*2+0x1c] +XDIS 12d8: MISC BASE D52A8D444C1D lea rax, ptr [rsp+r25*2+0x1d] +XDIS 12de: MISC BASE D52A8D444D1E lea rax, ptr [rbp+r25*2+0x1e] +XDIS 12e4: MISC BASE D52A8D444E1F lea rax, ptr [rsi+r25*2+0x1f] +XDIS 12ea: MISC BASE D52A8D444F20 lea rax, ptr [rdi+r25*2+0x20] +XDIS 12f0: MISC BASE D52B8D444821 lea rax, ptr [r8+r25*2+0x21] +XDIS 12f6: MISC BASE D52B8D444922 lea rax, ptr [r9+r25*2+0x22] +XDIS 12fc: MISC BASE D52B8D444A23 lea rax, ptr [r10+r25*2+0x23] +XDIS 1302: MISC BASE D52B8D444B24 lea rax, ptr [r11+r25*2+0x24] +XDIS 1308: MISC BASE D52B8D444C25 lea rax, ptr [r12+r25*2+0x25] +XDIS 130e: MISC BASE D52B8D444D26 lea rax, ptr [r13+r25*2+0x26] +XDIS 1314: MISC BASE D52B8D444E27 lea rax, ptr [r14+r25*2+0x27] +XDIS 131a: MISC BASE D52B8D444F28 lea rax, ptr [r15+r25*2+0x28] +XDIS 1320: MISC BASE D53A8D444829 lea rax, ptr [r16+r25*2+0x29] +XDIS 1326: MISC BASE D53A8D44492A lea rax, ptr [r17+r25*2+0x2a] +XDIS 132c: MISC BASE D53A8D444A2B lea rax, ptr [r18+r25*2+0x2b] +XDIS 1332: MISC BASE D53A8D444B2C lea rax, ptr [r19+r25*2+0x2c] +XDIS 1338: MISC BASE D53A8D444C2D lea rax, ptr [r20+r25*2+0x2d] +XDIS 133e: MISC BASE D53A8D444D2E lea rax, ptr [r21+r25*2+0x2e] +XDIS 1344: MISC BASE D53A8D444E2F lea rax, ptr [r22+r25*2+0x2f] +XDIS 134a: MISC BASE D53A8D444F30 lea rax, ptr [r23+r25*2+0x30] +XDIS 1350: MISC BASE D53B8D444831 lea rax, ptr [r24+r25*2+0x31] +XDIS 1356: MISC BASE D53B8D444932 lea rax, ptr [r25+r25*2+0x32] +XDIS 135c: MISC BASE D53B8D444A33 lea rax, ptr [r26+r25*2+0x33] +XDIS 1362: MISC BASE D53B8D444B34 lea rax, ptr [r27+r25*2+0x34] +XDIS 1368: MISC BASE D53B8D444C35 lea rax, ptr [r28+r25*2+0x35] +XDIS 136e: MISC BASE D53B8D444D36 lea rax, ptr [r29+r25*2+0x36] +XDIS 1374: MISC BASE D53B8D444E37 lea rax, ptr [r30+r25*2+0x37] +XDIS 137a: MISC BASE D53B8D444F38 lea rax, ptr [r31+r25*2+0x38] +XDIS 1380: MISC BASE D52A8D44501A lea rax, ptr [rax+r26*2+0x1a] +XDIS 1386: MISC BASE D52A8D44511B lea rax, ptr [rcx+r26*2+0x1b] +XDIS 138c: MISC BASE D52A8D44521C lea rax, ptr [rdx+r26*2+0x1c] +XDIS 1392: MISC BASE D52A8D44531D lea rax, ptr [rbx+r26*2+0x1d] +XDIS 1398: MISC BASE D52A8D44541E lea rax, ptr [rsp+r26*2+0x1e] +XDIS 139e: MISC BASE D52A8D44551F lea rax, ptr [rbp+r26*2+0x1f] +XDIS 13a4: MISC BASE D52A8D445620 lea rax, ptr [rsi+r26*2+0x20] +XDIS 13aa: MISC BASE D52A8D445721 lea rax, ptr [rdi+r26*2+0x21] +XDIS 13b0: MISC BASE D52B8D445022 lea rax, ptr [r8+r26*2+0x22] +XDIS 13b6: MISC BASE D52B8D445123 lea rax, ptr [r9+r26*2+0x23] +XDIS 13bc: MISC BASE D52B8D445224 lea rax, ptr [r10+r26*2+0x24] +XDIS 13c2: MISC BASE D52B8D445325 lea rax, ptr [r11+r26*2+0x25] +XDIS 13c8: MISC BASE D52B8D445426 lea rax, ptr [r12+r26*2+0x26] +XDIS 13ce: MISC BASE D52B8D445527 lea rax, ptr [r13+r26*2+0x27] +XDIS 13d4: MISC BASE D52B8D445628 lea rax, ptr [r14+r26*2+0x28] +XDIS 13da: MISC BASE D52B8D445729 lea rax, ptr [r15+r26*2+0x29] +XDIS 13e0: MISC BASE D53A8D44502A lea rax, ptr [r16+r26*2+0x2a] +XDIS 13e6: MISC BASE D53A8D44512B lea rax, ptr [r17+r26*2+0x2b] +XDIS 13ec: MISC BASE D53A8D44522C lea rax, ptr [r18+r26*2+0x2c] +XDIS 13f2: MISC BASE D53A8D44532D lea rax, ptr [r19+r26*2+0x2d] +XDIS 13f8: MISC BASE D53A8D44542E lea rax, ptr [r20+r26*2+0x2e] +XDIS 13fe: MISC BASE D53A8D44552F lea rax, ptr [r21+r26*2+0x2f] +XDIS 1404: MISC BASE D53A8D445630 lea rax, ptr [r22+r26*2+0x30] +XDIS 140a: MISC BASE D53A8D445731 lea rax, ptr [r23+r26*2+0x31] +XDIS 1410: MISC BASE D53B8D445032 lea rax, ptr [r24+r26*2+0x32] +XDIS 1416: MISC BASE D53B8D445133 lea rax, ptr [r25+r26*2+0x33] +XDIS 141c: MISC BASE D53B8D445234 lea rax, ptr [r26+r26*2+0x34] +XDIS 1422: MISC BASE D53B8D445335 lea rax, ptr [r27+r26*2+0x35] +XDIS 1428: MISC BASE D53B8D445436 lea rax, ptr [r28+r26*2+0x36] +XDIS 142e: MISC BASE D53B8D445537 lea rax, ptr [r29+r26*2+0x37] +XDIS 1434: MISC BASE D53B8D445638 lea rax, ptr [r30+r26*2+0x38] +XDIS 143a: MISC BASE D53B8D445739 lea rax, ptr [r31+r26*2+0x39] +XDIS 1440: MISC BASE D52A8D44581B lea rax, ptr [rax+r27*2+0x1b] +XDIS 1446: MISC BASE D52A8D44591C lea rax, ptr [rcx+r27*2+0x1c] +XDIS 144c: MISC BASE D52A8D445A1D lea rax, ptr [rdx+r27*2+0x1d] +XDIS 1452: MISC BASE D52A8D445B1E lea rax, ptr [rbx+r27*2+0x1e] +XDIS 1458: MISC BASE D52A8D445C1F lea rax, ptr [rsp+r27*2+0x1f] +XDIS 145e: MISC BASE D52A8D445D20 lea rax, ptr [rbp+r27*2+0x20] +XDIS 1464: MISC BASE D52A8D445E21 lea rax, ptr [rsi+r27*2+0x21] +XDIS 146a: MISC BASE D52A8D445F22 lea rax, ptr [rdi+r27*2+0x22] +XDIS 1470: MISC BASE D52B8D445823 lea rax, ptr [r8+r27*2+0x23] +XDIS 1476: MISC BASE D52B8D445924 lea rax, ptr [r9+r27*2+0x24] +XDIS 147c: MISC BASE D52B8D445A25 lea rax, ptr [r10+r27*2+0x25] +XDIS 1482: MISC BASE D52B8D445B26 lea rax, ptr [r11+r27*2+0x26] +XDIS 1488: MISC BASE D52B8D445C27 lea rax, ptr [r12+r27*2+0x27] +XDIS 148e: MISC BASE D52B8D445D28 lea rax, ptr [r13+r27*2+0x28] +XDIS 1494: MISC BASE D52B8D445E29 lea rax, ptr [r14+r27*2+0x29] +XDIS 149a: MISC BASE D52B8D445F2A lea rax, ptr [r15+r27*2+0x2a] +XDIS 14a0: MISC BASE D53A8D44582B lea rax, ptr [r16+r27*2+0x2b] +XDIS 14a6: MISC BASE D53A8D44592C lea rax, ptr [r17+r27*2+0x2c] +XDIS 14ac: MISC BASE D53A8D445A2D lea rax, ptr [r18+r27*2+0x2d] +XDIS 14b2: MISC BASE D53A8D445B2E lea rax, ptr [r19+r27*2+0x2e] +XDIS 14b8: MISC BASE D53A8D445C2F lea rax, ptr [r20+r27*2+0x2f] +XDIS 14be: MISC BASE D53A8D445D30 lea rax, ptr [r21+r27*2+0x30] +XDIS 14c4: MISC BASE D53A8D445E31 lea rax, ptr [r22+r27*2+0x31] +XDIS 14ca: MISC BASE D53A8D445F32 lea rax, ptr [r23+r27*2+0x32] +XDIS 14d0: MISC BASE D53B8D445833 lea rax, ptr [r24+r27*2+0x33] +XDIS 14d6: MISC BASE D53B8D445934 lea rax, ptr [r25+r27*2+0x34] +XDIS 14dc: MISC BASE D53B8D445A35 lea rax, ptr [r26+r27*2+0x35] +XDIS 14e2: MISC BASE D53B8D445B36 lea rax, ptr [r27+r27*2+0x36] +XDIS 14e8: MISC BASE D53B8D445C37 lea rax, ptr [r28+r27*2+0x37] +XDIS 14ee: MISC BASE D53B8D445D38 lea rax, ptr [r29+r27*2+0x38] +XDIS 14f4: MISC BASE D53B8D445E39 lea rax, ptr [r30+r27*2+0x39] +XDIS 14fa: MISC BASE D53B8D445F3A lea rax, ptr [r31+r27*2+0x3a] +XDIS 1500: MISC BASE D52A8D44601C lea rax, ptr [rax+r28*2+0x1c] +XDIS 1506: MISC BASE D52A8D44611D lea rax, ptr [rcx+r28*2+0x1d] +XDIS 150c: MISC BASE D52A8D44621E lea rax, ptr [rdx+r28*2+0x1e] +XDIS 1512: MISC BASE D52A8D44631F lea rax, ptr [rbx+r28*2+0x1f] +XDIS 1518: MISC BASE D52A8D446420 lea rax, ptr [rsp+r28*2+0x20] +XDIS 151e: MISC BASE D52A8D446521 lea rax, ptr [rbp+r28*2+0x21] +XDIS 1524: MISC BASE D52A8D446622 lea rax, ptr [rsi+r28*2+0x22] +XDIS 152a: MISC BASE D52A8D446723 lea rax, ptr [rdi+r28*2+0x23] +XDIS 1530: MISC BASE D52B8D446024 lea rax, ptr [r8+r28*2+0x24] +XDIS 1536: MISC BASE D52B8D446125 lea rax, ptr [r9+r28*2+0x25] +XDIS 153c: MISC BASE D52B8D446226 lea rax, ptr [r10+r28*2+0x26] +XDIS 1542: MISC BASE D52B8D446327 lea rax, ptr [r11+r28*2+0x27] +XDIS 1548: MISC BASE D52B8D446428 lea rax, ptr [r12+r28*2+0x28] +XDIS 154e: MISC BASE D52B8D446529 lea rax, ptr [r13+r28*2+0x29] +XDIS 1554: MISC BASE D52B8D44662A lea rax, ptr [r14+r28*2+0x2a] +XDIS 155a: MISC BASE D52B8D44672B lea rax, ptr [r15+r28*2+0x2b] +XDIS 1560: MISC BASE D53A8D44602C lea rax, ptr [r16+r28*2+0x2c] +XDIS 1566: MISC BASE D53A8D44612D lea rax, ptr [r17+r28*2+0x2d] +XDIS 156c: MISC BASE D53A8D44622E lea rax, ptr [r18+r28*2+0x2e] +XDIS 1572: MISC BASE D53A8D44632F lea rax, ptr [r19+r28*2+0x2f] +XDIS 1578: MISC BASE D53A8D446430 lea rax, ptr [r20+r28*2+0x30] +XDIS 157e: MISC BASE D53A8D446531 lea rax, ptr [r21+r28*2+0x31] +XDIS 1584: MISC BASE D53A8D446632 lea rax, ptr [r22+r28*2+0x32] +XDIS 158a: MISC BASE D53A8D446733 lea rax, ptr [r23+r28*2+0x33] +XDIS 1590: MISC BASE D53B8D446034 lea rax, ptr [r24+r28*2+0x34] +XDIS 1596: MISC BASE D53B8D446135 lea rax, ptr [r25+r28*2+0x35] +XDIS 159c: MISC BASE D53B8D446236 lea rax, ptr [r26+r28*2+0x36] +XDIS 15a2: MISC BASE D53B8D446337 lea rax, ptr [r27+r28*2+0x37] +XDIS 15a8: MISC BASE D53B8D446438 lea rax, ptr [r28+r28*2+0x38] +XDIS 15ae: MISC BASE D53B8D446539 lea rax, ptr [r29+r28*2+0x39] +XDIS 15b4: MISC BASE D53B8D44663A lea rax, ptr [r30+r28*2+0x3a] +XDIS 15ba: MISC BASE D53B8D44673B lea rax, ptr [r31+r28*2+0x3b] +XDIS 15c0: MISC BASE D52A8D44681D lea rax, ptr [rax+r29*2+0x1d] +XDIS 15c6: MISC BASE D52A8D44691E lea rax, ptr [rcx+r29*2+0x1e] +XDIS 15cc: MISC BASE D52A8D446A1F lea rax, ptr [rdx+r29*2+0x1f] +XDIS 15d2: MISC BASE D52A8D446B20 lea rax, ptr [rbx+r29*2+0x20] +XDIS 15d8: MISC BASE D52A8D446C21 lea rax, ptr [rsp+r29*2+0x21] +XDIS 15de: MISC BASE D52A8D446D22 lea rax, ptr [rbp+r29*2+0x22] +XDIS 15e4: MISC BASE D52A8D446E23 lea rax, ptr [rsi+r29*2+0x23] +XDIS 15ea: MISC BASE D52A8D446F24 lea rax, ptr [rdi+r29*2+0x24] +XDIS 15f0: MISC BASE D52B8D446825 lea rax, ptr [r8+r29*2+0x25] +XDIS 15f6: MISC BASE D52B8D446926 lea rax, ptr [r9+r29*2+0x26] +XDIS 15fc: MISC BASE D52B8D446A27 lea rax, ptr [r10+r29*2+0x27] +XDIS 1602: MISC BASE D52B8D446B28 lea rax, ptr [r11+r29*2+0x28] +XDIS 1608: MISC BASE D52B8D446C29 lea rax, ptr [r12+r29*2+0x29] +XDIS 160e: MISC BASE D52B8D446D2A lea rax, ptr [r13+r29*2+0x2a] +XDIS 1614: MISC BASE D52B8D446E2B lea rax, ptr [r14+r29*2+0x2b] +XDIS 161a: MISC BASE D52B8D446F2C lea rax, ptr [r15+r29*2+0x2c] +XDIS 1620: MISC BASE D53A8D44682D lea rax, ptr [r16+r29*2+0x2d] +XDIS 1626: MISC BASE D53A8D44692E lea rax, ptr [r17+r29*2+0x2e] +XDIS 162c: MISC BASE D53A8D446A2F lea rax, ptr [r18+r29*2+0x2f] +XDIS 1632: MISC BASE D53A8D446B30 lea rax, ptr [r19+r29*2+0x30] +XDIS 1638: MISC BASE D53A8D446C31 lea rax, ptr [r20+r29*2+0x31] +XDIS 163e: MISC BASE D53A8D446D32 lea rax, ptr [r21+r29*2+0x32] +XDIS 1644: MISC BASE D53A8D446E33 lea rax, ptr [r22+r29*2+0x33] +XDIS 164a: MISC BASE D53A8D446F34 lea rax, ptr [r23+r29*2+0x34] +XDIS 1650: MISC BASE D53B8D446835 lea rax, ptr [r24+r29*2+0x35] +XDIS 1656: MISC BASE D53B8D446936 lea rax, ptr [r25+r29*2+0x36] +XDIS 165c: MISC BASE D53B8D446A37 lea rax, ptr [r26+r29*2+0x37] +XDIS 1662: MISC BASE D53B8D446B38 lea rax, ptr [r27+r29*2+0x38] +XDIS 1668: MISC BASE D53B8D446C39 lea rax, ptr [r28+r29*2+0x39] +XDIS 166e: MISC BASE D53B8D446D3A lea rax, ptr [r29+r29*2+0x3a] +XDIS 1674: MISC BASE D53B8D446E3B lea rax, ptr [r30+r29*2+0x3b] +XDIS 167a: MISC BASE D53B8D446F3C lea rax, ptr [r31+r29*2+0x3c] +XDIS 1680: MISC BASE D52A8D44701E lea rax, ptr [rax+r30*2+0x1e] +XDIS 1686: MISC BASE D52A8D44711F lea rax, ptr [rcx+r30*2+0x1f] +XDIS 168c: MISC BASE D52A8D447220 lea rax, ptr [rdx+r30*2+0x20] +XDIS 1692: MISC BASE D52A8D447321 lea rax, ptr [rbx+r30*2+0x21] +XDIS 1698: MISC BASE D52A8D447422 lea rax, ptr [rsp+r30*2+0x22] +XDIS 169e: MISC BASE D52A8D447523 lea rax, ptr [rbp+r30*2+0x23] +XDIS 16a4: MISC BASE D52A8D447624 lea rax, ptr [rsi+r30*2+0x24] +XDIS 16aa: MISC BASE D52A8D447725 lea rax, ptr [rdi+r30*2+0x25] +XDIS 16b0: MISC BASE D52B8D447026 lea rax, ptr [r8+r30*2+0x26] +XDIS 16b6: MISC BASE D52B8D447127 lea rax, ptr [r9+r30*2+0x27] +XDIS 16bc: MISC BASE D52B8D447228 lea rax, ptr [r10+r30*2+0x28] +XDIS 16c2: MISC BASE D52B8D447329 lea rax, ptr [r11+r30*2+0x29] +XDIS 16c8: MISC BASE D52B8D44742A lea rax, ptr [r12+r30*2+0x2a] +XDIS 16ce: MISC BASE D52B8D44752B lea rax, ptr [r13+r30*2+0x2b] +XDIS 16d4: MISC BASE D52B8D44762C lea rax, ptr [r14+r30*2+0x2c] +XDIS 16da: MISC BASE D52B8D44772D lea rax, ptr [r15+r30*2+0x2d] +XDIS 16e0: MISC BASE D53A8D44702E lea rax, ptr [r16+r30*2+0x2e] +XDIS 16e6: MISC BASE D53A8D44712F lea rax, ptr [r17+r30*2+0x2f] +XDIS 16ec: MISC BASE D53A8D447230 lea rax, ptr [r18+r30*2+0x30] +XDIS 16f2: MISC BASE D53A8D447331 lea rax, ptr [r19+r30*2+0x31] +XDIS 16f8: MISC BASE D53A8D447432 lea rax, ptr [r20+r30*2+0x32] +XDIS 16fe: MISC BASE D53A8D447533 lea rax, ptr [r21+r30*2+0x33] +XDIS 1704: MISC BASE D53A8D447634 lea rax, ptr [r22+r30*2+0x34] +XDIS 170a: MISC BASE D53A8D447735 lea rax, ptr [r23+r30*2+0x35] +XDIS 1710: MISC BASE D53B8D447036 lea rax, ptr [r24+r30*2+0x36] +XDIS 1716: MISC BASE D53B8D447137 lea rax, ptr [r25+r30*2+0x37] +XDIS 171c: MISC BASE D53B8D447238 lea rax, ptr [r26+r30*2+0x38] +XDIS 1722: MISC BASE D53B8D447339 lea rax, ptr [r27+r30*2+0x39] +XDIS 1728: MISC BASE D53B8D44743A lea rax, ptr [r28+r30*2+0x3a] +XDIS 172e: MISC BASE D53B8D44753B lea rax, ptr [r29+r30*2+0x3b] +XDIS 1734: MISC BASE D53B8D44763C lea rax, ptr [r30+r30*2+0x3c] +XDIS 173a: MISC BASE D53B8D44773D lea rax, ptr [r31+r30*2+0x3d] +XDIS 1740: MISC BASE D52A8D44781F lea rax, ptr [rax+r31*2+0x1f] +XDIS 1746: MISC BASE D52A8D447920 lea rax, ptr [rcx+r31*2+0x20] +XDIS 174c: MISC BASE D52A8D447A21 lea rax, ptr [rdx+r31*2+0x21] +XDIS 1752: MISC BASE D52A8D447B22 lea rax, ptr [rbx+r31*2+0x22] +XDIS 1758: MISC BASE D52A8D447C23 lea rax, ptr [rsp+r31*2+0x23] +XDIS 175e: MISC BASE D52A8D447D24 lea rax, ptr [rbp+r31*2+0x24] +XDIS 1764: MISC BASE D52A8D447E25 lea rax, ptr [rsi+r31*2+0x25] +XDIS 176a: MISC BASE D52A8D447F26 lea rax, ptr [rdi+r31*2+0x26] +XDIS 1770: MISC BASE D52B8D447827 lea rax, ptr [r8+r31*2+0x27] +XDIS 1776: MISC BASE D52B8D447928 lea rax, ptr [r9+r31*2+0x28] +XDIS 177c: MISC BASE D52B8D447A29 lea rax, ptr [r10+r31*2+0x29] +XDIS 1782: MISC BASE D52B8D447B2A lea rax, ptr [r11+r31*2+0x2a] +XDIS 1788: MISC BASE D52B8D447C2B lea rax, ptr [r12+r31*2+0x2b] +XDIS 178e: MISC BASE D52B8D447D2C lea rax, ptr [r13+r31*2+0x2c] +XDIS 1794: MISC BASE D52B8D447E2D lea rax, ptr [r14+r31*2+0x2d] +XDIS 179a: MISC BASE D52B8D447F2E lea rax, ptr [r15+r31*2+0x2e] +XDIS 17a0: MISC BASE D53A8D44782F lea rax, ptr [r16+r31*2+0x2f] +XDIS 17a6: MISC BASE D53A8D447930 lea rax, ptr [r17+r31*2+0x30] +XDIS 17ac: MISC BASE D53A8D447A31 lea rax, ptr [r18+r31*2+0x31] +XDIS 17b2: MISC BASE D53A8D447B32 lea rax, ptr [r19+r31*2+0x32] +XDIS 17b8: MISC BASE D53A8D447C33 lea rax, ptr [r20+r31*2+0x33] +XDIS 17be: MISC BASE D53A8D447D34 lea rax, ptr [r21+r31*2+0x34] +XDIS 17c4: MISC BASE D53A8D447E35 lea rax, ptr [r22+r31*2+0x35] +XDIS 17ca: MISC BASE D53A8D447F36 lea rax, ptr [r23+r31*2+0x36] +XDIS 17d0: MISC BASE D53B8D447837 lea rax, ptr [r24+r31*2+0x37] +XDIS 17d6: MISC BASE D53B8D447938 lea rax, ptr [r25+r31*2+0x38] +XDIS 17dc: MISC BASE D53B8D447A39 lea rax, ptr [r26+r31*2+0x39] +XDIS 17e2: MISC BASE D53B8D447B3A lea rax, ptr [r27+r31*2+0x3a] +XDIS 17e8: MISC BASE D53B8D447C3B lea rax, ptr [r28+r31*2+0x3b] +XDIS 17ee: MISC BASE D53B8D447D3C lea rax, ptr [r29+r31*2+0x3c] +XDIS 17f4: MISC BASE D53B8D447E3D lea rax, ptr [r30+r31*2+0x3d] +XDIS 17fa: MISC BASE D53B8D447F3E lea rax, ptr [r31+r31*2+0x3e] +XDIS 1800: MISC BASE D5088D4C4001 lea rcx, ptr [rax+rax*2+0x1] +XDIS 1806: MISC BASE D5088D4C4102 lea rcx, ptr [rcx+rax*2+0x2] +XDIS 180c: MISC BASE D5088D4C4203 lea rcx, ptr [rdx+rax*2+0x3] +XDIS 1812: MISC BASE D5088D4C4304 lea rcx, ptr [rbx+rax*2+0x4] +XDIS 1818: MISC BASE D5088D4C4405 lea rcx, ptr [rsp+rax*2+0x5] +XDIS 181e: MISC BASE D5088D4C4506 lea rcx, ptr [rbp+rax*2+0x6] +XDIS 1824: MISC BASE D5088D4C4607 lea rcx, ptr [rsi+rax*2+0x7] +XDIS 182a: MISC BASE D5088D4C4708 lea rcx, ptr [rdi+rax*2+0x8] +XDIS 1830: MISC BASE D5098D4C4009 lea rcx, ptr [r8+rax*2+0x9] +XDIS 1836: MISC BASE D5098D4C410A lea rcx, ptr [r9+rax*2+0xa] +XDIS 183c: MISC BASE D5098D4C420B lea rcx, ptr [r10+rax*2+0xb] +XDIS 1842: MISC BASE D5098D4C430C lea rcx, ptr [r11+rax*2+0xc] +XDIS 1848: MISC BASE D5098D4C440D lea rcx, ptr [r12+rax*2+0xd] +XDIS 184e: MISC BASE D5098D4C450E lea rcx, ptr [r13+rax*2+0xe] +XDIS 1854: MISC BASE D5098D4C460F lea rcx, ptr [r14+rax*2+0xf] +XDIS 185a: MISC BASE D5098D4C4710 lea rcx, ptr [r15+rax*2+0x10] +XDIS 1860: MISC BASE D5188D4C4011 lea rcx, ptr [r16+rax*2+0x11] +XDIS 1866: MISC BASE D5188D4C4112 lea rcx, ptr [r17+rax*2+0x12] +XDIS 186c: MISC BASE D5188D4C4213 lea rcx, ptr [r18+rax*2+0x13] +XDIS 1872: MISC BASE D5188D4C4314 lea rcx, ptr [r19+rax*2+0x14] +XDIS 1878: MISC BASE D5188D4C4415 lea rcx, ptr [r20+rax*2+0x15] +XDIS 187e: MISC BASE D5188D4C4516 lea rcx, ptr [r21+rax*2+0x16] +XDIS 1884: MISC BASE D5188D4C4617 lea rcx, ptr [r22+rax*2+0x17] +XDIS 188a: MISC BASE D5188D4C4718 lea rcx, ptr [r23+rax*2+0x18] +XDIS 1890: MISC BASE D5198D4C4019 lea rcx, ptr [r24+rax*2+0x19] +XDIS 1896: MISC BASE D5198D4C411A lea rcx, ptr [r25+rax*2+0x1a] +XDIS 189c: MISC BASE D5198D4C421B lea rcx, ptr [r26+rax*2+0x1b] +XDIS 18a2: MISC BASE D5198D4C431C lea rcx, ptr [r27+rax*2+0x1c] +XDIS 18a8: MISC BASE D5198D4C441D lea rcx, ptr [r28+rax*2+0x1d] +XDIS 18ae: MISC BASE D5198D4C451E lea rcx, ptr [r29+rax*2+0x1e] +XDIS 18b4: MISC BASE D5198D4C461F lea rcx, ptr [r30+rax*2+0x1f] +XDIS 18ba: MISC BASE D5198D4C4720 lea rcx, ptr [r31+rax*2+0x20] +XDIS 18c0: MISC BASE D5088D4C4802 lea rcx, ptr [rax+rcx*2+0x2] +XDIS 18c6: MISC BASE D5088D4C4903 lea rcx, ptr [rcx+rcx*2+0x3] +XDIS 18cc: MISC BASE D5088D4C4A04 lea rcx, ptr [rdx+rcx*2+0x4] +XDIS 18d2: MISC BASE D5088D4C4B05 lea rcx, ptr [rbx+rcx*2+0x5] +XDIS 18d8: MISC BASE D5088D4C4C06 lea rcx, ptr [rsp+rcx*2+0x6] +XDIS 18de: MISC BASE D5088D4C4D07 lea rcx, ptr [rbp+rcx*2+0x7] +XDIS 18e4: MISC BASE D5088D4C4E08 lea rcx, ptr [rsi+rcx*2+0x8] +XDIS 18ea: MISC BASE D5088D4C4F09 lea rcx, ptr [rdi+rcx*2+0x9] +XDIS 18f0: MISC BASE D5098D4C480A lea rcx, ptr [r8+rcx*2+0xa] +XDIS 18f6: MISC BASE D5098D4C490B lea rcx, ptr [r9+rcx*2+0xb] +XDIS 18fc: MISC BASE D5098D4C4A0C lea rcx, ptr [r10+rcx*2+0xc] +XDIS 1902: MISC BASE D5098D4C4B0D lea rcx, ptr [r11+rcx*2+0xd] +XDIS 1908: MISC BASE D5098D4C4C0E lea rcx, ptr [r12+rcx*2+0xe] +XDIS 190e: MISC BASE D5098D4C4D0F lea rcx, ptr [r13+rcx*2+0xf] +XDIS 1914: MISC BASE D5098D4C4E10 lea rcx, ptr [r14+rcx*2+0x10] +XDIS 191a: MISC BASE D5098D4C4F11 lea rcx, ptr [r15+rcx*2+0x11] +XDIS 1920: MISC BASE D5188D4C4812 lea rcx, ptr [r16+rcx*2+0x12] +XDIS 1926: MISC BASE D5188D4C4913 lea rcx, ptr [r17+rcx*2+0x13] +XDIS 192c: MISC BASE D5188D4C4A14 lea rcx, ptr [r18+rcx*2+0x14] +XDIS 1932: MISC BASE D5188D4C4B15 lea rcx, ptr [r19+rcx*2+0x15] +XDIS 1938: MISC BASE D5188D4C4C16 lea rcx, ptr [r20+rcx*2+0x16] +XDIS 193e: MISC BASE D5188D4C4D17 lea rcx, ptr [r21+rcx*2+0x17] +XDIS 1944: MISC BASE D5188D4C4E18 lea rcx, ptr [r22+rcx*2+0x18] +XDIS 194a: MISC BASE D5188D4C4F19 lea rcx, ptr [r23+rcx*2+0x19] +XDIS 1950: MISC BASE D5198D4C481A lea rcx, ptr [r24+rcx*2+0x1a] +XDIS 1956: MISC BASE D5198D4C491B lea rcx, ptr [r25+rcx*2+0x1b] +XDIS 195c: MISC BASE D5198D4C4A1C lea rcx, ptr [r26+rcx*2+0x1c] +XDIS 1962: MISC BASE D5198D4C4B1D lea rcx, ptr [r27+rcx*2+0x1d] +XDIS 1968: MISC BASE D5198D4C4C1E lea rcx, ptr [r28+rcx*2+0x1e] +XDIS 196e: MISC BASE D5198D4C4D1F lea rcx, ptr [r29+rcx*2+0x1f] +XDIS 1974: MISC BASE D5198D4C4E20 lea rcx, ptr [r30+rcx*2+0x20] +XDIS 197a: MISC BASE D5198D4C4F21 lea rcx, ptr [r31+rcx*2+0x21] +XDIS 1980: MISC BASE D5088D4C5003 lea rcx, ptr [rax+rdx*2+0x3] +XDIS 1986: MISC BASE D5088D4C5104 lea rcx, ptr [rcx+rdx*2+0x4] +XDIS 198c: MISC BASE D5088D4C5205 lea rcx, ptr [rdx+rdx*2+0x5] +XDIS 1992: MISC BASE D5088D4C5306 lea rcx, ptr [rbx+rdx*2+0x6] +XDIS 1998: MISC BASE D5088D4C5407 lea rcx, ptr [rsp+rdx*2+0x7] +XDIS 199e: MISC BASE D5088D4C5508 lea rcx, ptr [rbp+rdx*2+0x8] +XDIS 19a4: MISC BASE D5088D4C5609 lea rcx, ptr [rsi+rdx*2+0x9] +XDIS 19aa: MISC BASE D5088D4C570A lea rcx, ptr [rdi+rdx*2+0xa] +XDIS 19b0: MISC BASE D5098D4C500B lea rcx, ptr [r8+rdx*2+0xb] +XDIS 19b6: MISC BASE D5098D4C510C lea rcx, ptr [r9+rdx*2+0xc] +XDIS 19bc: MISC BASE D5098D4C520D lea rcx, ptr [r10+rdx*2+0xd] +XDIS 19c2: MISC BASE D5098D4C530E lea rcx, ptr [r11+rdx*2+0xe] +XDIS 19c8: MISC BASE D5098D4C540F lea rcx, ptr [r12+rdx*2+0xf] +XDIS 19ce: MISC BASE D5098D4C5510 lea rcx, ptr [r13+rdx*2+0x10] +XDIS 19d4: MISC BASE D5098D4C5611 lea rcx, ptr [r14+rdx*2+0x11] +XDIS 19da: MISC BASE D5098D4C5712 lea rcx, ptr [r15+rdx*2+0x12] +XDIS 19e0: MISC BASE D5188D4C5013 lea rcx, ptr [r16+rdx*2+0x13] +XDIS 19e6: MISC BASE D5188D4C5114 lea rcx, ptr [r17+rdx*2+0x14] +XDIS 19ec: MISC BASE D5188D4C5215 lea rcx, ptr [r18+rdx*2+0x15] +XDIS 19f2: MISC BASE D5188D4C5316 lea rcx, ptr [r19+rdx*2+0x16] +XDIS 19f8: MISC BASE D5188D4C5417 lea rcx, ptr [r20+rdx*2+0x17] +XDIS 19fe: MISC BASE D5188D4C5518 lea rcx, ptr [r21+rdx*2+0x18] +XDIS 1a04: MISC BASE D5188D4C5619 lea rcx, ptr [r22+rdx*2+0x19] +XDIS 1a0a: MISC BASE D5188D4C571A lea rcx, ptr [r23+rdx*2+0x1a] +XDIS 1a10: MISC BASE D5198D4C501B lea rcx, ptr [r24+rdx*2+0x1b] +XDIS 1a16: MISC BASE D5198D4C511C lea rcx, ptr [r25+rdx*2+0x1c] +XDIS 1a1c: MISC BASE D5198D4C521D lea rcx, ptr [r26+rdx*2+0x1d] +XDIS 1a22: MISC BASE D5198D4C531E lea rcx, ptr [r27+rdx*2+0x1e] +XDIS 1a28: MISC BASE D5198D4C541F lea rcx, ptr [r28+rdx*2+0x1f] +XDIS 1a2e: MISC BASE D5198D4C5520 lea rcx, ptr [r29+rdx*2+0x20] +XDIS 1a34: MISC BASE D5198D4C5621 lea rcx, ptr [r30+rdx*2+0x21] +XDIS 1a3a: MISC BASE D5198D4C5722 lea rcx, ptr [r31+rdx*2+0x22] +XDIS 1a40: MISC BASE D5088D4C5804 lea rcx, ptr [rax+rbx*2+0x4] +XDIS 1a46: MISC BASE D5088D4C5905 lea rcx, ptr [rcx+rbx*2+0x5] +XDIS 1a4c: MISC BASE D5088D4C5A06 lea rcx, ptr [rdx+rbx*2+0x6] +XDIS 1a52: MISC BASE D5088D4C5B07 lea rcx, ptr [rbx+rbx*2+0x7] +XDIS 1a58: MISC BASE D5088D4C5C08 lea rcx, ptr [rsp+rbx*2+0x8] +XDIS 1a5e: MISC BASE D5088D4C5D09 lea rcx, ptr [rbp+rbx*2+0x9] +XDIS 1a64: MISC BASE D5088D4C5E0A lea rcx, ptr [rsi+rbx*2+0xa] +XDIS 1a6a: MISC BASE D5088D4C5F0B lea rcx, ptr [rdi+rbx*2+0xb] +XDIS 1a70: MISC BASE D5098D4C580C lea rcx, ptr [r8+rbx*2+0xc] +XDIS 1a76: MISC BASE D5098D4C590D lea rcx, ptr [r9+rbx*2+0xd] +XDIS 1a7c: MISC BASE D5098D4C5A0E lea rcx, ptr [r10+rbx*2+0xe] +XDIS 1a82: MISC BASE D5098D4C5B0F lea rcx, ptr [r11+rbx*2+0xf] +XDIS 1a88: MISC BASE D5098D4C5C10 lea rcx, ptr [r12+rbx*2+0x10] +XDIS 1a8e: MISC BASE D5098D4C5D11 lea rcx, ptr [r13+rbx*2+0x11] +XDIS 1a94: MISC BASE D5098D4C5E12 lea rcx, ptr [r14+rbx*2+0x12] +XDIS 1a9a: MISC BASE D5098D4C5F13 lea rcx, ptr [r15+rbx*2+0x13] +XDIS 1aa0: MISC BASE D5188D4C5814 lea rcx, ptr [r16+rbx*2+0x14] +XDIS 1aa6: MISC BASE D5188D4C5915 lea rcx, ptr [r17+rbx*2+0x15] +XDIS 1aac: MISC BASE D5188D4C5A16 lea rcx, ptr [r18+rbx*2+0x16] +XDIS 1ab2: MISC BASE D5188D4C5B17 lea rcx, ptr [r19+rbx*2+0x17] +XDIS 1ab8: MISC BASE D5188D4C5C18 lea rcx, ptr [r20+rbx*2+0x18] +XDIS 1abe: MISC BASE D5188D4C5D19 lea rcx, ptr [r21+rbx*2+0x19] +XDIS 1ac4: MISC BASE D5188D4C5E1A lea rcx, ptr [r22+rbx*2+0x1a] +XDIS 1aca: MISC BASE D5188D4C5F1B lea rcx, ptr [r23+rbx*2+0x1b] +XDIS 1ad0: MISC BASE D5198D4C581C lea rcx, ptr [r24+rbx*2+0x1c] +XDIS 1ad6: MISC BASE D5198D4C591D lea rcx, ptr [r25+rbx*2+0x1d] +XDIS 1adc: MISC BASE D5198D4C5A1E lea rcx, ptr [r26+rbx*2+0x1e] +XDIS 1ae2: MISC BASE D5198D4C5B1F lea rcx, ptr [r27+rbx*2+0x1f] +XDIS 1ae8: MISC BASE D5198D4C5C20 lea rcx, ptr [r28+rbx*2+0x20] +XDIS 1aee: MISC BASE D5198D4C5D21 lea rcx, ptr [r29+rbx*2+0x21] +XDIS 1af4: MISC BASE D5198D4C5E22 lea rcx, ptr [r30+rbx*2+0x22] +XDIS 1afa: MISC BASE D5198D4C5F23 lea rcx, ptr [r31+rbx*2+0x23] +XDIS 1b00: MISC BASE D5088D4C6005 lea rcx, ptr [rax+0x5] +XDIS 1b06: MISC BASE D5088D4C6106 lea rcx, ptr [rcx+0x6] +XDIS 1b0c: MISC BASE D5088D4C6207 lea rcx, ptr [rdx+0x7] +XDIS 1b12: MISC BASE D5088D4C6308 lea rcx, ptr [rbx+0x8] +XDIS 1b18: MISC BASE D5088D4C6409 lea rcx, ptr [rsp+0x9] +XDIS 1b1e: MISC BASE D5088D4C650A lea rcx, ptr [rbp+0xa] +XDIS 1b24: MISC BASE D5088D4C660B lea rcx, ptr [rsi+0xb] +XDIS 1b2a: MISC BASE D5088D4C670C lea rcx, ptr [rdi+0xc] +XDIS 1b30: MISC BASE D5098D4C600D lea rcx, ptr [r8+0xd] +XDIS 1b36: MISC BASE D5098D4C610E lea rcx, ptr [r9+0xe] +XDIS 1b3c: MISC BASE D5098D4C620F lea rcx, ptr [r10+0xf] +XDIS 1b42: MISC BASE D5098D4C6310 lea rcx, ptr [r11+0x10] +XDIS 1b48: MISC BASE D5098D4C6411 lea rcx, ptr [r12+0x11] +XDIS 1b4e: MISC BASE D5098D4C6512 lea rcx, ptr [r13+0x12] +XDIS 1b54: MISC BASE D5098D4C6613 lea rcx, ptr [r14+0x13] +XDIS 1b5a: MISC BASE D5098D4C6714 lea rcx, ptr [r15+0x14] +XDIS 1b60: MISC BASE D5188D4C6015 lea rcx, ptr [r16+0x15] +XDIS 1b66: MISC BASE D5188D4C6116 lea rcx, ptr [r17+0x16] +XDIS 1b6c: MISC BASE D5188D4C6217 lea rcx, ptr [r18+0x17] +XDIS 1b72: MISC BASE D5188D4C6318 lea rcx, ptr [r19+0x18] +XDIS 1b78: MISC BASE D5188D4C6419 lea rcx, ptr [r20+0x19] +XDIS 1b7e: MISC BASE D5188D4C651A lea rcx, ptr [r21+0x1a] +XDIS 1b84: MISC BASE D5188D4C661B lea rcx, ptr [r22+0x1b] +XDIS 1b8a: MISC BASE D5188D4C671C lea rcx, ptr [r23+0x1c] +XDIS 1b90: MISC BASE D5198D4C601D lea rcx, ptr [r24+0x1d] +XDIS 1b96: MISC BASE D5198D4C611E lea rcx, ptr [r25+0x1e] +XDIS 1b9c: MISC BASE D5198D4C621F lea rcx, ptr [r26+0x1f] +XDIS 1ba2: MISC BASE D5198D4C6320 lea rcx, ptr [r27+0x20] +XDIS 1ba8: MISC BASE D5198D4C6421 lea rcx, ptr [r28+0x21] +XDIS 1bae: MISC BASE D5198D4C6522 lea rcx, ptr [r29+0x22] +XDIS 1bb4: MISC BASE D5198D4C6623 lea rcx, ptr [r30+0x23] +XDIS 1bba: MISC BASE D5198D4C6724 lea rcx, ptr [r31+0x24] +XDIS 1bc0: MISC BASE D5088D4C6806 lea rcx, ptr [rax+rbp*2+0x6] +XDIS 1bc6: MISC BASE D5088D4C6907 lea rcx, ptr [rcx+rbp*2+0x7] +XDIS 1bcc: MISC BASE D5088D4C6A08 lea rcx, ptr [rdx+rbp*2+0x8] +XDIS 1bd2: MISC BASE D5088D4C6B09 lea rcx, ptr [rbx+rbp*2+0x9] +XDIS 1bd8: MISC BASE D5088D4C6C0A lea rcx, ptr [rsp+rbp*2+0xa] +XDIS 1bde: MISC BASE D5088D4C6D0B lea rcx, ptr [rbp+rbp*2+0xb] +XDIS 1be4: MISC BASE D5088D4C6E0C lea rcx, ptr [rsi+rbp*2+0xc] +XDIS 1bea: MISC BASE D5088D4C6F0D lea rcx, ptr [rdi+rbp*2+0xd] +XDIS 1bf0: MISC BASE D5098D4C680E lea rcx, ptr [r8+rbp*2+0xe] +XDIS 1bf6: MISC BASE D5098D4C690F lea rcx, ptr [r9+rbp*2+0xf] +XDIS 1bfc: MISC BASE D5098D4C6A10 lea rcx, ptr [r10+rbp*2+0x10] +XDIS 1c02: MISC BASE D5098D4C6B11 lea rcx, ptr [r11+rbp*2+0x11] +XDIS 1c08: MISC BASE D5098D4C6C12 lea rcx, ptr [r12+rbp*2+0x12] +XDIS 1c0e: MISC BASE D5098D4C6D13 lea rcx, ptr [r13+rbp*2+0x13] +XDIS 1c14: MISC BASE D5098D4C6E14 lea rcx, ptr [r14+rbp*2+0x14] +XDIS 1c1a: MISC BASE D5098D4C6F15 lea rcx, ptr [r15+rbp*2+0x15] +XDIS 1c20: MISC BASE D5188D4C6816 lea rcx, ptr [r16+rbp*2+0x16] +XDIS 1c26: MISC BASE D5188D4C6917 lea rcx, ptr [r17+rbp*2+0x17] +XDIS 1c2c: MISC BASE D5188D4C6A18 lea rcx, ptr [r18+rbp*2+0x18] +XDIS 1c32: MISC BASE D5188D4C6B19 lea rcx, ptr [r19+rbp*2+0x19] +XDIS 1c38: MISC BASE D5188D4C6C1A lea rcx, ptr [r20+rbp*2+0x1a] +XDIS 1c3e: MISC BASE D5188D4C6D1B lea rcx, ptr [r21+rbp*2+0x1b] +XDIS 1c44: MISC BASE D5188D4C6E1C lea rcx, ptr [r22+rbp*2+0x1c] +XDIS 1c4a: MISC BASE D5188D4C6F1D lea rcx, ptr [r23+rbp*2+0x1d] +XDIS 1c50: MISC BASE D5198D4C681E lea rcx, ptr [r24+rbp*2+0x1e] +XDIS 1c56: MISC BASE D5198D4C691F lea rcx, ptr [r25+rbp*2+0x1f] +XDIS 1c5c: MISC BASE D5198D4C6A20 lea rcx, ptr [r26+rbp*2+0x20] +XDIS 1c62: MISC BASE D5198D4C6B21 lea rcx, ptr [r27+rbp*2+0x21] +XDIS 1c68: MISC BASE D5198D4C6C22 lea rcx, ptr [r28+rbp*2+0x22] +XDIS 1c6e: MISC BASE D5198D4C6D23 lea rcx, ptr [r29+rbp*2+0x23] +XDIS 1c74: MISC BASE D5198D4C6E24 lea rcx, ptr [r30+rbp*2+0x24] +XDIS 1c7a: MISC BASE D5198D4C6F25 lea rcx, ptr [r31+rbp*2+0x25] +XDIS 1c80: MISC BASE D5088D4C7007 lea rcx, ptr [rax+rsi*2+0x7] +XDIS 1c86: MISC BASE D5088D4C7108 lea rcx, ptr [rcx+rsi*2+0x8] +XDIS 1c8c: MISC BASE D5088D4C7209 lea rcx, ptr [rdx+rsi*2+0x9] +XDIS 1c92: MISC BASE D5088D4C730A lea rcx, ptr [rbx+rsi*2+0xa] +XDIS 1c98: MISC BASE D5088D4C740B lea rcx, ptr [rsp+rsi*2+0xb] +XDIS 1c9e: MISC BASE D5088D4C750C lea rcx, ptr [rbp+rsi*2+0xc] +XDIS 1ca4: MISC BASE D5088D4C760D lea rcx, ptr [rsi+rsi*2+0xd] +XDIS 1caa: MISC BASE D5088D4C770E lea rcx, ptr [rdi+rsi*2+0xe] +XDIS 1cb0: MISC BASE D5098D4C700F lea rcx, ptr [r8+rsi*2+0xf] +XDIS 1cb6: MISC BASE D5098D4C7110 lea rcx, ptr [r9+rsi*2+0x10] +XDIS 1cbc: MISC BASE D5098D4C7211 lea rcx, ptr [r10+rsi*2+0x11] +XDIS 1cc2: MISC BASE D5098D4C7312 lea rcx, ptr [r11+rsi*2+0x12] +XDIS 1cc8: MISC BASE D5098D4C7413 lea rcx, ptr [r12+rsi*2+0x13] +XDIS 1cce: MISC BASE D5098D4C7514 lea rcx, ptr [r13+rsi*2+0x14] +XDIS 1cd4: MISC BASE D5098D4C7615 lea rcx, ptr [r14+rsi*2+0x15] +XDIS 1cda: MISC BASE D5098D4C7716 lea rcx, ptr [r15+rsi*2+0x16] +XDIS 1ce0: MISC BASE D5188D4C7017 lea rcx, ptr [r16+rsi*2+0x17] +XDIS 1ce6: MISC BASE D5188D4C7118 lea rcx, ptr [r17+rsi*2+0x18] +XDIS 1cec: MISC BASE D5188D4C7219 lea rcx, ptr [r18+rsi*2+0x19] +XDIS 1cf2: MISC BASE D5188D4C731A lea rcx, ptr [r19+rsi*2+0x1a] +XDIS 1cf8: MISC BASE D5188D4C741B lea rcx, ptr [r20+rsi*2+0x1b] +XDIS 1cfe: MISC BASE D5188D4C751C lea rcx, ptr [r21+rsi*2+0x1c] +XDIS 1d04: MISC BASE D5188D4C761D lea rcx, ptr [r22+rsi*2+0x1d] +XDIS 1d0a: MISC BASE D5188D4C771E lea rcx, ptr [r23+rsi*2+0x1e] +XDIS 1d10: MISC BASE D5198D4C701F lea rcx, ptr [r24+rsi*2+0x1f] +XDIS 1d16: MISC BASE D5198D4C7120 lea rcx, ptr [r25+rsi*2+0x20] +XDIS 1d1c: MISC BASE D5198D4C7221 lea rcx, ptr [r26+rsi*2+0x21] +XDIS 1d22: MISC BASE D5198D4C7322 lea rcx, ptr [r27+rsi*2+0x22] +XDIS 1d28: MISC BASE D5198D4C7423 lea rcx, ptr [r28+rsi*2+0x23] +XDIS 1d2e: MISC BASE D5198D4C7524 lea rcx, ptr [r29+rsi*2+0x24] +XDIS 1d34: MISC BASE D5198D4C7625 lea rcx, ptr [r30+rsi*2+0x25] +XDIS 1d3a: MISC BASE D5198D4C7726 lea rcx, ptr [r31+rsi*2+0x26] +XDIS 1d40: MISC BASE D5088D4C7808 lea rcx, ptr [rax+rdi*2+0x8] +XDIS 1d46: MISC BASE D5088D4C7909 lea rcx, ptr [rcx+rdi*2+0x9] +XDIS 1d4c: MISC BASE D5088D4C7A0A lea rcx, ptr [rdx+rdi*2+0xa] +XDIS 1d52: MISC BASE D5088D4C7B0B lea rcx, ptr [rbx+rdi*2+0xb] +XDIS 1d58: MISC BASE D5088D4C7C0C lea rcx, ptr [rsp+rdi*2+0xc] +XDIS 1d5e: MISC BASE D5088D4C7D0D lea rcx, ptr [rbp+rdi*2+0xd] +XDIS 1d64: MISC BASE D5088D4C7E0E lea rcx, ptr [rsi+rdi*2+0xe] +XDIS 1d6a: MISC BASE D5088D4C7F0F lea rcx, ptr [rdi+rdi*2+0xf] +XDIS 1d70: MISC BASE D5098D4C7810 lea rcx, ptr [r8+rdi*2+0x10] +XDIS 1d76: MISC BASE D5098D4C7911 lea rcx, ptr [r9+rdi*2+0x11] +XDIS 1d7c: MISC BASE D5098D4C7A12 lea rcx, ptr [r10+rdi*2+0x12] +XDIS 1d82: MISC BASE D5098D4C7B13 lea rcx, ptr [r11+rdi*2+0x13] +XDIS 1d88: MISC BASE D5098D4C7C14 lea rcx, ptr [r12+rdi*2+0x14] +XDIS 1d8e: MISC BASE D5098D4C7D15 lea rcx, ptr [r13+rdi*2+0x15] +XDIS 1d94: MISC BASE D5098D4C7E16 lea rcx, ptr [r14+rdi*2+0x16] +XDIS 1d9a: MISC BASE D5098D4C7F17 lea rcx, ptr [r15+rdi*2+0x17] +XDIS 1da0: MISC BASE D5188D4C7818 lea rcx, ptr [r16+rdi*2+0x18] +XDIS 1da6: MISC BASE D5188D4C7919 lea rcx, ptr [r17+rdi*2+0x19] +XDIS 1dac: MISC BASE D5188D4C7A1A lea rcx, ptr [r18+rdi*2+0x1a] +XDIS 1db2: MISC BASE D5188D4C7B1B lea rcx, ptr [r19+rdi*2+0x1b] +XDIS 1db8: MISC BASE D5188D4C7C1C lea rcx, ptr [r20+rdi*2+0x1c] +XDIS 1dbe: MISC BASE D5188D4C7D1D lea rcx, ptr [r21+rdi*2+0x1d] +XDIS 1dc4: MISC BASE D5188D4C7E1E lea rcx, ptr [r22+rdi*2+0x1e] +XDIS 1dca: MISC BASE D5188D4C7F1F lea rcx, ptr [r23+rdi*2+0x1f] +XDIS 1dd0: MISC BASE D5198D4C7820 lea rcx, ptr [r24+rdi*2+0x20] +XDIS 1dd6: MISC BASE D5198D4C7921 lea rcx, ptr [r25+rdi*2+0x21] +XDIS 1ddc: MISC BASE D5198D4C7A22 lea rcx, ptr [r26+rdi*2+0x22] +XDIS 1de2: MISC BASE D5198D4C7B23 lea rcx, ptr [r27+rdi*2+0x23] +XDIS 1de8: MISC BASE D5198D4C7C24 lea rcx, ptr [r28+rdi*2+0x24] +XDIS 1dee: MISC BASE D5198D4C7D25 lea rcx, ptr [r29+rdi*2+0x25] +XDIS 1df4: MISC BASE D5198D4C7E26 lea rcx, ptr [r30+rdi*2+0x26] +XDIS 1dfa: MISC BASE D5198D4C7F27 lea rcx, ptr [r31+rdi*2+0x27] +XDIS 1e00: MISC BASE D50A8D4C4009 lea rcx, ptr [rax+r8*2+0x9] +XDIS 1e06: MISC BASE D50A8D4C410A lea rcx, ptr [rcx+r8*2+0xa] +XDIS 1e0c: MISC BASE D50A8D4C420B lea rcx, ptr [rdx+r8*2+0xb] +XDIS 1e12: MISC BASE D50A8D4C430C lea rcx, ptr [rbx+r8*2+0xc] +XDIS 1e18: MISC BASE D50A8D4C440D lea rcx, ptr [rsp+r8*2+0xd] +XDIS 1e1e: MISC BASE D50A8D4C450E lea rcx, ptr [rbp+r8*2+0xe] +XDIS 1e24: MISC BASE D50A8D4C460F lea rcx, ptr [rsi+r8*2+0xf] +XDIS 1e2a: MISC BASE D50A8D4C4710 lea rcx, ptr [rdi+r8*2+0x10] +XDIS 1e30: MISC BASE D50B8D4C4011 lea rcx, ptr [r8+r8*2+0x11] +XDIS 1e36: MISC BASE D50B8D4C4112 lea rcx, ptr [r9+r8*2+0x12] +XDIS 1e3c: MISC BASE D50B8D4C4213 lea rcx, ptr [r10+r8*2+0x13] +XDIS 1e42: MISC BASE D50B8D4C4314 lea rcx, ptr [r11+r8*2+0x14] +XDIS 1e48: MISC BASE D50B8D4C4415 lea rcx, ptr [r12+r8*2+0x15] +XDIS 1e4e: MISC BASE D50B8D4C4516 lea rcx, ptr [r13+r8*2+0x16] +XDIS 1e54: MISC BASE D50B8D4C4617 lea rcx, ptr [r14+r8*2+0x17] +XDIS 1e5a: MISC BASE D50B8D4C4718 lea rcx, ptr [r15+r8*2+0x18] +XDIS 1e60: MISC BASE D51A8D4C4019 lea rcx, ptr [r16+r8*2+0x19] +XDIS 1e66: MISC BASE D51A8D4C411A lea rcx, ptr [r17+r8*2+0x1a] +XDIS 1e6c: MISC BASE D51A8D4C421B lea rcx, ptr [r18+r8*2+0x1b] +XDIS 1e72: MISC BASE D51A8D4C431C lea rcx, ptr [r19+r8*2+0x1c] +XDIS 1e78: MISC BASE D51A8D4C441D lea rcx, ptr [r20+r8*2+0x1d] +XDIS 1e7e: MISC BASE D51A8D4C451E lea rcx, ptr [r21+r8*2+0x1e] +XDIS 1e84: MISC BASE D51A8D4C461F lea rcx, ptr [r22+r8*2+0x1f] +XDIS 1e8a: MISC BASE D51A8D4C4720 lea rcx, ptr [r23+r8*2+0x20] +XDIS 1e90: MISC BASE D51B8D4C4021 lea rcx, ptr [r24+r8*2+0x21] +XDIS 1e96: MISC BASE D51B8D4C4122 lea rcx, ptr [r25+r8*2+0x22] +XDIS 1e9c: MISC BASE D51B8D4C4223 lea rcx, ptr [r26+r8*2+0x23] +XDIS 1ea2: MISC BASE D51B8D4C4324 lea rcx, ptr [r27+r8*2+0x24] +XDIS 1ea8: MISC BASE D51B8D4C4425 lea rcx, ptr [r28+r8*2+0x25] +XDIS 1eae: MISC BASE D51B8D4C4526 lea rcx, ptr [r29+r8*2+0x26] +XDIS 1eb4: MISC BASE D51B8D4C4627 lea rcx, ptr [r30+r8*2+0x27] +XDIS 1eba: MISC BASE D51B8D4C4728 lea rcx, ptr [r31+r8*2+0x28] +XDIS 1ec0: MISC BASE D50A8D4C480A lea rcx, ptr [rax+r9*2+0xa] +XDIS 1ec6: MISC BASE D50A8D4C490B lea rcx, ptr [rcx+r9*2+0xb] +XDIS 1ecc: MISC BASE D50A8D4C4A0C lea rcx, ptr [rdx+r9*2+0xc] +XDIS 1ed2: MISC BASE D50A8D4C4B0D lea rcx, ptr [rbx+r9*2+0xd] +XDIS 1ed8: MISC BASE D50A8D4C4C0E lea rcx, ptr [rsp+r9*2+0xe] +XDIS 1ede: MISC BASE D50A8D4C4D0F lea rcx, ptr [rbp+r9*2+0xf] +XDIS 1ee4: MISC BASE D50A8D4C4E10 lea rcx, ptr [rsi+r9*2+0x10] +XDIS 1eea: MISC BASE D50A8D4C4F11 lea rcx, ptr [rdi+r9*2+0x11] +XDIS 1ef0: MISC BASE D50B8D4C4812 lea rcx, ptr [r8+r9*2+0x12] +XDIS 1ef6: MISC BASE D50B8D4C4913 lea rcx, ptr [r9+r9*2+0x13] +XDIS 1efc: MISC BASE D50B8D4C4A14 lea rcx, ptr [r10+r9*2+0x14] +XDIS 1f02: MISC BASE D50B8D4C4B15 lea rcx, ptr [r11+r9*2+0x15] +XDIS 1f08: MISC BASE D50B8D4C4C16 lea rcx, ptr [r12+r9*2+0x16] +XDIS 1f0e: MISC BASE D50B8D4C4D17 lea rcx, ptr [r13+r9*2+0x17] +XDIS 1f14: MISC BASE D50B8D4C4E18 lea rcx, ptr [r14+r9*2+0x18] +XDIS 1f1a: MISC BASE D50B8D4C4F19 lea rcx, ptr [r15+r9*2+0x19] +XDIS 1f20: MISC BASE D51A8D4C481A lea rcx, ptr [r16+r9*2+0x1a] +XDIS 1f26: MISC BASE D51A8D4C491B lea rcx, ptr [r17+r9*2+0x1b] +XDIS 1f2c: MISC BASE D51A8D4C4A1C lea rcx, ptr [r18+r9*2+0x1c] +XDIS 1f32: MISC BASE D51A8D4C4B1D lea rcx, ptr [r19+r9*2+0x1d] +XDIS 1f38: MISC BASE D51A8D4C4C1E lea rcx, ptr [r20+r9*2+0x1e] +XDIS 1f3e: MISC BASE D51A8D4C4D1F lea rcx, ptr [r21+r9*2+0x1f] +XDIS 1f44: MISC BASE D51A8D4C4E20 lea rcx, ptr [r22+r9*2+0x20] +XDIS 1f4a: MISC BASE D51A8D4C4F21 lea rcx, ptr [r23+r9*2+0x21] +XDIS 1f50: MISC BASE D51B8D4C4822 lea rcx, ptr [r24+r9*2+0x22] +XDIS 1f56: MISC BASE D51B8D4C4923 lea rcx, ptr [r25+r9*2+0x23] +XDIS 1f5c: MISC BASE D51B8D4C4A24 lea rcx, ptr [r26+r9*2+0x24] +XDIS 1f62: MISC BASE D51B8D4C4B25 lea rcx, ptr [r27+r9*2+0x25] +XDIS 1f68: MISC BASE D51B8D4C4C26 lea rcx, ptr [r28+r9*2+0x26] +XDIS 1f6e: MISC BASE D51B8D4C4D27 lea rcx, ptr [r29+r9*2+0x27] +XDIS 1f74: MISC BASE D51B8D4C4E28 lea rcx, ptr [r30+r9*2+0x28] +XDIS 1f7a: MISC BASE D51B8D4C4F29 lea rcx, ptr [r31+r9*2+0x29] +XDIS 1f80: MISC BASE D50A8D4C500B lea rcx, ptr [rax+r10*2+0xb] +XDIS 1f86: MISC BASE D50A8D4C510C lea rcx, ptr [rcx+r10*2+0xc] +XDIS 1f8c: MISC BASE D50A8D4C520D lea rcx, ptr [rdx+r10*2+0xd] +XDIS 1f92: MISC BASE D50A8D4C530E lea rcx, ptr [rbx+r10*2+0xe] +XDIS 1f98: MISC BASE D50A8D4C540F lea rcx, ptr [rsp+r10*2+0xf] +XDIS 1f9e: MISC BASE D50A8D4C5510 lea rcx, ptr [rbp+r10*2+0x10] +XDIS 1fa4: MISC BASE D50A8D4C5611 lea rcx, ptr [rsi+r10*2+0x11] +XDIS 1faa: MISC BASE D50A8D4C5712 lea rcx, ptr [rdi+r10*2+0x12] +XDIS 1fb0: MISC BASE D50B8D4C5013 lea rcx, ptr [r8+r10*2+0x13] +XDIS 1fb6: MISC BASE D50B8D4C5114 lea rcx, ptr [r9+r10*2+0x14] +XDIS 1fbc: MISC BASE D50B8D4C5215 lea rcx, ptr [r10+r10*2+0x15] +XDIS 1fc2: MISC BASE D50B8D4C5316 lea rcx, ptr [r11+r10*2+0x16] +XDIS 1fc8: MISC BASE D50B8D4C5417 lea rcx, ptr [r12+r10*2+0x17] +XDIS 1fce: MISC BASE D50B8D4C5518 lea rcx, ptr [r13+r10*2+0x18] +XDIS 1fd4: MISC BASE D50B8D4C5619 lea rcx, ptr [r14+r10*2+0x19] +XDIS 1fda: MISC BASE D50B8D4C571A lea rcx, ptr [r15+r10*2+0x1a] +XDIS 1fe0: MISC BASE D51A8D4C501B lea rcx, ptr [r16+r10*2+0x1b] +XDIS 1fe6: MISC BASE D51A8D4C511C lea rcx, ptr [r17+r10*2+0x1c] +XDIS 1fec: MISC BASE D51A8D4C521D lea rcx, ptr [r18+r10*2+0x1d] +XDIS 1ff2: MISC BASE D51A8D4C531E lea rcx, ptr [r19+r10*2+0x1e] +XDIS 1ff8: MISC BASE D51A8D4C541F lea rcx, ptr [r20+r10*2+0x1f] +XDIS 1ffe: MISC BASE D51A8D4C5520 lea rcx, ptr [r21+r10*2+0x20] +XDIS 2004: MISC BASE D51A8D4C5621 lea rcx, ptr [r22+r10*2+0x21] +XDIS 200a: MISC BASE D51A8D4C5722 lea rcx, ptr [r23+r10*2+0x22] +XDIS 2010: MISC BASE D51B8D4C5023 lea rcx, ptr [r24+r10*2+0x23] +XDIS 2016: MISC BASE D51B8D4C5124 lea rcx, ptr [r25+r10*2+0x24] +XDIS 201c: MISC BASE D51B8D4C5225 lea rcx, ptr [r26+r10*2+0x25] +XDIS 2022: MISC BASE D51B8D4C5326 lea rcx, ptr [r27+r10*2+0x26] +XDIS 2028: MISC BASE D51B8D4C5427 lea rcx, ptr [r28+r10*2+0x27] +XDIS 202e: MISC BASE D51B8D4C5528 lea rcx, ptr [r29+r10*2+0x28] +XDIS 2034: MISC BASE D51B8D4C5629 lea rcx, ptr [r30+r10*2+0x29] +XDIS 203a: MISC BASE D51B8D4C572A lea rcx, ptr [r31+r10*2+0x2a] +XDIS 2040: MISC BASE D50A8D4C580C lea rcx, ptr [rax+r11*2+0xc] +XDIS 2046: MISC BASE D50A8D4C590D lea rcx, ptr [rcx+r11*2+0xd] +XDIS 204c: MISC BASE D50A8D4C5A0E lea rcx, ptr [rdx+r11*2+0xe] +XDIS 2052: MISC BASE D50A8D4C5B0F lea rcx, ptr [rbx+r11*2+0xf] +XDIS 2058: MISC BASE D50A8D4C5C10 lea rcx, ptr [rsp+r11*2+0x10] +XDIS 205e: MISC BASE D50A8D4C5D11 lea rcx, ptr [rbp+r11*2+0x11] +XDIS 2064: MISC BASE D50A8D4C5E12 lea rcx, ptr [rsi+r11*2+0x12] +XDIS 206a: MISC BASE D50A8D4C5F13 lea rcx, ptr [rdi+r11*2+0x13] +XDIS 2070: MISC BASE D50B8D4C5814 lea rcx, ptr [r8+r11*2+0x14] +XDIS 2076: MISC BASE D50B8D4C5915 lea rcx, ptr [r9+r11*2+0x15] +XDIS 207c: MISC BASE D50B8D4C5A16 lea rcx, ptr [r10+r11*2+0x16] +XDIS 2082: MISC BASE D50B8D4C5B17 lea rcx, ptr [r11+r11*2+0x17] +XDIS 2088: MISC BASE D50B8D4C5C18 lea rcx, ptr [r12+r11*2+0x18] +XDIS 208e: MISC BASE D50B8D4C5D19 lea rcx, ptr [r13+r11*2+0x19] +XDIS 2094: MISC BASE D50B8D4C5E1A lea rcx, ptr [r14+r11*2+0x1a] +XDIS 209a: MISC BASE D50B8D4C5F1B lea rcx, ptr [r15+r11*2+0x1b] +XDIS 20a0: MISC BASE D51A8D4C581C lea rcx, ptr [r16+r11*2+0x1c] +XDIS 20a6: MISC BASE D51A8D4C591D lea rcx, ptr [r17+r11*2+0x1d] +XDIS 20ac: MISC BASE D51A8D4C5A1E lea rcx, ptr [r18+r11*2+0x1e] +XDIS 20b2: MISC BASE D51A8D4C5B1F lea rcx, ptr [r19+r11*2+0x1f] +XDIS 20b8: MISC BASE D51A8D4C5C20 lea rcx, ptr [r20+r11*2+0x20] +XDIS 20be: MISC BASE D51A8D4C5D21 lea rcx, ptr [r21+r11*2+0x21] +XDIS 20c4: MISC BASE D51A8D4C5E22 lea rcx, ptr [r22+r11*2+0x22] +XDIS 20ca: MISC BASE D51A8D4C5F23 lea rcx, ptr [r23+r11*2+0x23] +XDIS 20d0: MISC BASE D51B8D4C5824 lea rcx, ptr [r24+r11*2+0x24] +XDIS 20d6: MISC BASE D51B8D4C5925 lea rcx, ptr [r25+r11*2+0x25] +XDIS 20dc: MISC BASE D51B8D4C5A26 lea rcx, ptr [r26+r11*2+0x26] +XDIS 20e2: MISC BASE D51B8D4C5B27 lea rcx, ptr [r27+r11*2+0x27] +XDIS 20e8: MISC BASE D51B8D4C5C28 lea rcx, ptr [r28+r11*2+0x28] +XDIS 20ee: MISC BASE D51B8D4C5D29 lea rcx, ptr [r29+r11*2+0x29] +XDIS 20f4: MISC BASE D51B8D4C5E2A lea rcx, ptr [r30+r11*2+0x2a] +XDIS 20fa: MISC BASE D51B8D4C5F2B lea rcx, ptr [r31+r11*2+0x2b] +XDIS 2100: MISC BASE D50A8D4C600D lea rcx, ptr [rax+r12*2+0xd] +XDIS 2106: MISC BASE D50A8D4C610E lea rcx, ptr [rcx+r12*2+0xe] +XDIS 210c: MISC BASE D50A8D4C620F lea rcx, ptr [rdx+r12*2+0xf] +XDIS 2112: MISC BASE D50A8D4C6310 lea rcx, ptr [rbx+r12*2+0x10] +XDIS 2118: MISC BASE D50A8D4C6411 lea rcx, ptr [rsp+r12*2+0x11] +XDIS 211e: MISC BASE D50A8D4C6512 lea rcx, ptr [rbp+r12*2+0x12] +XDIS 2124: MISC BASE D50A8D4C6613 lea rcx, ptr [rsi+r12*2+0x13] +XDIS 212a: MISC BASE D50A8D4C6714 lea rcx, ptr [rdi+r12*2+0x14] +XDIS 2130: MISC BASE D50B8D4C6015 lea rcx, ptr [r8+r12*2+0x15] +XDIS 2136: MISC BASE D50B8D4C6116 lea rcx, ptr [r9+r12*2+0x16] +XDIS 213c: MISC BASE D50B8D4C6217 lea rcx, ptr [r10+r12*2+0x17] +XDIS 2142: MISC BASE D50B8D4C6318 lea rcx, ptr [r11+r12*2+0x18] +XDIS 2148: MISC BASE D50B8D4C6419 lea rcx, ptr [r12+r12*2+0x19] +XDIS 214e: MISC BASE D50B8D4C651A lea rcx, ptr [r13+r12*2+0x1a] +XDIS 2154: MISC BASE D50B8D4C661B lea rcx, ptr [r14+r12*2+0x1b] +XDIS 215a: MISC BASE D50B8D4C671C lea rcx, ptr [r15+r12*2+0x1c] +XDIS 2160: MISC BASE D51A8D4C601D lea rcx, ptr [r16+r12*2+0x1d] +XDIS 2166: MISC BASE D51A8D4C611E lea rcx, ptr [r17+r12*2+0x1e] +XDIS 216c: MISC BASE D51A8D4C621F lea rcx, ptr [r18+r12*2+0x1f] +XDIS 2172: MISC BASE D51A8D4C6320 lea rcx, ptr [r19+r12*2+0x20] +XDIS 2178: MISC BASE D51A8D4C6421 lea rcx, ptr [r20+r12*2+0x21] +XDIS 217e: MISC BASE D51A8D4C6522 lea rcx, ptr [r21+r12*2+0x22] +XDIS 2184: MISC BASE D51A8D4C6623 lea rcx, ptr [r22+r12*2+0x23] +XDIS 218a: MISC BASE D51A8D4C6724 lea rcx, ptr [r23+r12*2+0x24] +XDIS 2190: MISC BASE D51B8D4C6025 lea rcx, ptr [r24+r12*2+0x25] +XDIS 2196: MISC BASE D51B8D4C6126 lea rcx, ptr [r25+r12*2+0x26] +XDIS 219c: MISC BASE D51B8D4C6227 lea rcx, ptr [r26+r12*2+0x27] +XDIS 21a2: MISC BASE D51B8D4C6328 lea rcx, ptr [r27+r12*2+0x28] +XDIS 21a8: MISC BASE D51B8D4C6429 lea rcx, ptr [r28+r12*2+0x29] +XDIS 21ae: MISC BASE D51B8D4C652A lea rcx, ptr [r29+r12*2+0x2a] +XDIS 21b4: MISC BASE D51B8D4C662B lea rcx, ptr [r30+r12*2+0x2b] +XDIS 21ba: MISC BASE D51B8D4C672C lea rcx, ptr [r31+r12*2+0x2c] +XDIS 21c0: MISC BASE D50A8D4C680E lea rcx, ptr [rax+r13*2+0xe] +XDIS 21c6: MISC BASE D50A8D4C690F lea rcx, ptr [rcx+r13*2+0xf] +XDIS 21cc: MISC BASE D50A8D4C6A10 lea rcx, ptr [rdx+r13*2+0x10] +XDIS 21d2: MISC BASE D50A8D4C6B11 lea rcx, ptr [rbx+r13*2+0x11] +XDIS 21d8: MISC BASE D50A8D4C6C12 lea rcx, ptr [rsp+r13*2+0x12] +XDIS 21de: MISC BASE D50A8D4C6D13 lea rcx, ptr [rbp+r13*2+0x13] +XDIS 21e4: MISC BASE D50A8D4C6E14 lea rcx, ptr [rsi+r13*2+0x14] +XDIS 21ea: MISC BASE D50A8D4C6F15 lea rcx, ptr [rdi+r13*2+0x15] +XDIS 21f0: MISC BASE D50B8D4C6816 lea rcx, ptr [r8+r13*2+0x16] +XDIS 21f6: MISC BASE D50B8D4C6917 lea rcx, ptr [r9+r13*2+0x17] +XDIS 21fc: MISC BASE D50B8D4C6A18 lea rcx, ptr [r10+r13*2+0x18] +XDIS 2202: MISC BASE D50B8D4C6B19 lea rcx, ptr [r11+r13*2+0x19] +XDIS 2208: MISC BASE D50B8D4C6C1A lea rcx, ptr [r12+r13*2+0x1a] +XDIS 220e: MISC BASE D50B8D4C6D1B lea rcx, ptr [r13+r13*2+0x1b] +XDIS 2214: MISC BASE D50B8D4C6E1C lea rcx, ptr [r14+r13*2+0x1c] +XDIS 221a: MISC BASE D50B8D4C6F1D lea rcx, ptr [r15+r13*2+0x1d] +XDIS 2220: MISC BASE D51A8D4C681E lea rcx, ptr [r16+r13*2+0x1e] +XDIS 2226: MISC BASE D51A8D4C691F lea rcx, ptr [r17+r13*2+0x1f] +XDIS 222c: MISC BASE D51A8D4C6A20 lea rcx, ptr [r18+r13*2+0x20] +XDIS 2232: MISC BASE D51A8D4C6B21 lea rcx, ptr [r19+r13*2+0x21] +XDIS 2238: MISC BASE D51A8D4C6C22 lea rcx, ptr [r20+r13*2+0x22] +XDIS 223e: MISC BASE D51A8D4C6D23 lea rcx, ptr [r21+r13*2+0x23] +XDIS 2244: MISC BASE D51A8D4C6E24 lea rcx, ptr [r22+r13*2+0x24] +XDIS 224a: MISC BASE D51A8D4C6F25 lea rcx, ptr [r23+r13*2+0x25] +XDIS 2250: MISC BASE D51B8D4C6826 lea rcx, ptr [r24+r13*2+0x26] +XDIS 2256: MISC BASE D51B8D4C6927 lea rcx, ptr [r25+r13*2+0x27] +XDIS 225c: MISC BASE D51B8D4C6A28 lea rcx, ptr [r26+r13*2+0x28] +XDIS 2262: MISC BASE D51B8D4C6B29 lea rcx, ptr [r27+r13*2+0x29] +XDIS 2268: MISC BASE D51B8D4C6C2A lea rcx, ptr [r28+r13*2+0x2a] +XDIS 226e: MISC BASE D51B8D4C6D2B lea rcx, ptr [r29+r13*2+0x2b] +XDIS 2274: MISC BASE D51B8D4C6E2C lea rcx, ptr [r30+r13*2+0x2c] +XDIS 227a: MISC BASE D51B8D4C6F2D lea rcx, ptr [r31+r13*2+0x2d] +XDIS 2280: MISC BASE D50A8D4C700F lea rcx, ptr [rax+r14*2+0xf] +XDIS 2286: MISC BASE D50A8D4C7110 lea rcx, ptr [rcx+r14*2+0x10] +XDIS 228c: MISC BASE D50A8D4C7211 lea rcx, ptr [rdx+r14*2+0x11] +XDIS 2292: MISC BASE D50A8D4C7312 lea rcx, ptr [rbx+r14*2+0x12] +XDIS 2298: MISC BASE D50A8D4C7413 lea rcx, ptr [rsp+r14*2+0x13] +XDIS 229e: MISC BASE D50A8D4C7514 lea rcx, ptr [rbp+r14*2+0x14] +XDIS 22a4: MISC BASE D50A8D4C7615 lea rcx, ptr [rsi+r14*2+0x15] +XDIS 22aa: MISC BASE D50A8D4C7716 lea rcx, ptr [rdi+r14*2+0x16] +XDIS 22b0: MISC BASE D50B8D4C7017 lea rcx, ptr [r8+r14*2+0x17] +XDIS 22b6: MISC BASE D50B8D4C7118 lea rcx, ptr [r9+r14*2+0x18] +XDIS 22bc: MISC BASE D50B8D4C7219 lea rcx, ptr [r10+r14*2+0x19] +XDIS 22c2: MISC BASE D50B8D4C731A lea rcx, ptr [r11+r14*2+0x1a] +XDIS 22c8: MISC BASE D50B8D4C741B lea rcx, ptr [r12+r14*2+0x1b] +XDIS 22ce: MISC BASE D50B8D4C751C lea rcx, ptr [r13+r14*2+0x1c] +XDIS 22d4: MISC BASE D50B8D4C761D lea rcx, ptr [r14+r14*2+0x1d] +XDIS 22da: MISC BASE D50B8D4C771E lea rcx, ptr [r15+r14*2+0x1e] +XDIS 22e0: MISC BASE D51A8D4C701F lea rcx, ptr [r16+r14*2+0x1f] +XDIS 22e6: MISC BASE D51A8D4C7120 lea rcx, ptr [r17+r14*2+0x20] +XDIS 22ec: MISC BASE D51A8D4C7221 lea rcx, ptr [r18+r14*2+0x21] +XDIS 22f2: MISC BASE D51A8D4C7322 lea rcx, ptr [r19+r14*2+0x22] +XDIS 22f8: MISC BASE D51A8D4C7423 lea rcx, ptr [r20+r14*2+0x23] +XDIS 22fe: MISC BASE D51A8D4C7524 lea rcx, ptr [r21+r14*2+0x24] +XDIS 2304: MISC BASE D51A8D4C7625 lea rcx, ptr [r22+r14*2+0x25] +XDIS 230a: MISC BASE D51A8D4C7726 lea rcx, ptr [r23+r14*2+0x26] +XDIS 2310: MISC BASE D51B8D4C7027 lea rcx, ptr [r24+r14*2+0x27] +XDIS 2316: MISC BASE D51B8D4C7128 lea rcx, ptr [r25+r14*2+0x28] +XDIS 231c: MISC BASE D51B8D4C7229 lea rcx, ptr [r26+r14*2+0x29] +XDIS 2322: MISC BASE D51B8D4C732A lea rcx, ptr [r27+r14*2+0x2a] +XDIS 2328: MISC BASE D51B8D4C742B lea rcx, ptr [r28+r14*2+0x2b] +XDIS 232e: MISC BASE D51B8D4C752C lea rcx, ptr [r29+r14*2+0x2c] +XDIS 2334: MISC BASE D51B8D4C762D lea rcx, ptr [r30+r14*2+0x2d] +XDIS 233a: MISC BASE D51B8D4C772E lea rcx, ptr [r31+r14*2+0x2e] +XDIS 2340: MISC BASE D50A8D4C7810 lea rcx, ptr [rax+r15*2+0x10] +XDIS 2346: MISC BASE D50A8D4C7911 lea rcx, ptr [rcx+r15*2+0x11] +XDIS 234c: MISC BASE D50A8D4C7A12 lea rcx, ptr [rdx+r15*2+0x12] +XDIS 2352: MISC BASE D50A8D4C7B13 lea rcx, ptr [rbx+r15*2+0x13] +XDIS 2358: MISC BASE D50A8D4C7C14 lea rcx, ptr [rsp+r15*2+0x14] +XDIS 235e: MISC BASE D50A8D4C7D15 lea rcx, ptr [rbp+r15*2+0x15] +XDIS 2364: MISC BASE D50A8D4C7E16 lea rcx, ptr [rsi+r15*2+0x16] +XDIS 236a: MISC BASE D50A8D4C7F17 lea rcx, ptr [rdi+r15*2+0x17] +XDIS 2370: MISC BASE D50B8D4C7818 lea rcx, ptr [r8+r15*2+0x18] +XDIS 2376: MISC BASE D50B8D4C7919 lea rcx, ptr [r9+r15*2+0x19] +XDIS 237c: MISC BASE D50B8D4C7A1A lea rcx, ptr [r10+r15*2+0x1a] +XDIS 2382: MISC BASE D50B8D4C7B1B lea rcx, ptr [r11+r15*2+0x1b] +XDIS 2388: MISC BASE D50B8D4C7C1C lea rcx, ptr [r12+r15*2+0x1c] +XDIS 238e: MISC BASE D50B8D4C7D1D lea rcx, ptr [r13+r15*2+0x1d] +XDIS 2394: MISC BASE D50B8D4C7E1E lea rcx, ptr [r14+r15*2+0x1e] +XDIS 239a: MISC BASE D50B8D4C7F1F lea rcx, ptr [r15+r15*2+0x1f] +XDIS 23a0: MISC BASE D51A8D4C7820 lea rcx, ptr [r16+r15*2+0x20] +XDIS 23a6: MISC BASE D51A8D4C7921 lea rcx, ptr [r17+r15*2+0x21] +XDIS 23ac: MISC BASE D51A8D4C7A22 lea rcx, ptr [r18+r15*2+0x22] +XDIS 23b2: MISC BASE D51A8D4C7B23 lea rcx, ptr [r19+r15*2+0x23] +XDIS 23b8: MISC BASE D51A8D4C7C24 lea rcx, ptr [r20+r15*2+0x24] +XDIS 23be: MISC BASE D51A8D4C7D25 lea rcx, ptr [r21+r15*2+0x25] +XDIS 23c4: MISC BASE D51A8D4C7E26 lea rcx, ptr [r22+r15*2+0x26] +XDIS 23ca: MISC BASE D51A8D4C7F27 lea rcx, ptr [r23+r15*2+0x27] +XDIS 23d0: MISC BASE D51B8D4C7828 lea rcx, ptr [r24+r15*2+0x28] +XDIS 23d6: MISC BASE D51B8D4C7929 lea rcx, ptr [r25+r15*2+0x29] +XDIS 23dc: MISC BASE D51B8D4C7A2A lea rcx, ptr [r26+r15*2+0x2a] +XDIS 23e2: MISC BASE D51B8D4C7B2B lea rcx, ptr [r27+r15*2+0x2b] +XDIS 23e8: MISC BASE D51B8D4C7C2C lea rcx, ptr [r28+r15*2+0x2c] +XDIS 23ee: MISC BASE D51B8D4C7D2D lea rcx, ptr [r29+r15*2+0x2d] +XDIS 23f4: MISC BASE D51B8D4C7E2E lea rcx, ptr [r30+r15*2+0x2e] +XDIS 23fa: MISC BASE D51B8D4C7F2F lea rcx, ptr [r31+r15*2+0x2f] +XDIS 2400: MISC BASE D5288D4C4011 lea rcx, ptr [rax+r16*2+0x11] +XDIS 2406: MISC BASE D5288D4C4112 lea rcx, ptr [rcx+r16*2+0x12] +XDIS 240c: MISC BASE D5288D4C4213 lea rcx, ptr [rdx+r16*2+0x13] +XDIS 2412: MISC BASE D5288D4C4314 lea rcx, ptr [rbx+r16*2+0x14] +XDIS 2418: MISC BASE D5288D4C4415 lea rcx, ptr [rsp+r16*2+0x15] +XDIS 241e: MISC BASE D5288D4C4516 lea rcx, ptr [rbp+r16*2+0x16] +XDIS 2424: MISC BASE D5288D4C4617 lea rcx, ptr [rsi+r16*2+0x17] +XDIS 242a: MISC BASE D5288D4C4718 lea rcx, ptr [rdi+r16*2+0x18] +XDIS 2430: MISC BASE D5298D4C4019 lea rcx, ptr [r8+r16*2+0x19] +XDIS 2436: MISC BASE D5298D4C411A lea rcx, ptr [r9+r16*2+0x1a] +XDIS 243c: MISC BASE D5298D4C421B lea rcx, ptr [r10+r16*2+0x1b] +XDIS 2442: MISC BASE D5298D4C431C lea rcx, ptr [r11+r16*2+0x1c] +XDIS 2448: MISC BASE D5298D4C441D lea rcx, ptr [r12+r16*2+0x1d] +XDIS 244e: MISC BASE D5298D4C451E lea rcx, ptr [r13+r16*2+0x1e] +XDIS 2454: MISC BASE D5298D4C461F lea rcx, ptr [r14+r16*2+0x1f] +XDIS 245a: MISC BASE D5298D4C4720 lea rcx, ptr [r15+r16*2+0x20] +XDIS 2460: MISC BASE D5388D4C4021 lea rcx, ptr [r16+r16*2+0x21] +XDIS 2466: MISC BASE D5388D4C4122 lea rcx, ptr [r17+r16*2+0x22] +XDIS 246c: MISC BASE D5388D4C4223 lea rcx, ptr [r18+r16*2+0x23] +XDIS 2472: MISC BASE D5388D4C4324 lea rcx, ptr [r19+r16*2+0x24] +XDIS 2478: MISC BASE D5388D4C4425 lea rcx, ptr [r20+r16*2+0x25] +XDIS 247e: MISC BASE D5388D4C4526 lea rcx, ptr [r21+r16*2+0x26] +XDIS 2484: MISC BASE D5388D4C4627 lea rcx, ptr [r22+r16*2+0x27] +XDIS 248a: MISC BASE D5388D4C4728 lea rcx, ptr [r23+r16*2+0x28] +XDIS 2490: MISC BASE D5398D4C4029 lea rcx, ptr [r24+r16*2+0x29] +XDIS 2496: MISC BASE D5398D4C412A lea rcx, ptr [r25+r16*2+0x2a] +XDIS 249c: MISC BASE D5398D4C422B lea rcx, ptr [r26+r16*2+0x2b] +XDIS 24a2: MISC BASE D5398D4C432C lea rcx, ptr [r27+r16*2+0x2c] +XDIS 24a8: MISC BASE D5398D4C442D lea rcx, ptr [r28+r16*2+0x2d] +XDIS 24ae: MISC BASE D5398D4C452E lea rcx, ptr [r29+r16*2+0x2e] +XDIS 24b4: MISC BASE D5398D4C462F lea rcx, ptr [r30+r16*2+0x2f] +XDIS 24ba: MISC BASE D5398D4C4730 lea rcx, ptr [r31+r16*2+0x30] +XDIS 24c0: MISC BASE D5288D4C4812 lea rcx, ptr [rax+r17*2+0x12] +XDIS 24c6: MISC BASE D5288D4C4913 lea rcx, ptr [rcx+r17*2+0x13] +XDIS 24cc: MISC BASE D5288D4C4A14 lea rcx, ptr [rdx+r17*2+0x14] +XDIS 24d2: MISC BASE D5288D4C4B15 lea rcx, ptr [rbx+r17*2+0x15] +XDIS 24d8: MISC BASE D5288D4C4C16 lea rcx, ptr [rsp+r17*2+0x16] +XDIS 24de: MISC BASE D5288D4C4D17 lea rcx, ptr [rbp+r17*2+0x17] +XDIS 24e4: MISC BASE D5288D4C4E18 lea rcx, ptr [rsi+r17*2+0x18] +XDIS 24ea: MISC BASE D5288D4C4F19 lea rcx, ptr [rdi+r17*2+0x19] +XDIS 24f0: MISC BASE D5298D4C481A lea rcx, ptr [r8+r17*2+0x1a] +XDIS 24f6: MISC BASE D5298D4C491B lea rcx, ptr [r9+r17*2+0x1b] +XDIS 24fc: MISC BASE D5298D4C4A1C lea rcx, ptr [r10+r17*2+0x1c] +XDIS 2502: MISC BASE D5298D4C4B1D lea rcx, ptr [r11+r17*2+0x1d] +XDIS 2508: MISC BASE D5298D4C4C1E lea rcx, ptr [r12+r17*2+0x1e] +XDIS 250e: MISC BASE D5298D4C4D1F lea rcx, ptr [r13+r17*2+0x1f] +XDIS 2514: MISC BASE D5298D4C4E20 lea rcx, ptr [r14+r17*2+0x20] +XDIS 251a: MISC BASE D5298D4C4F21 lea rcx, ptr [r15+r17*2+0x21] +XDIS 2520: MISC BASE D5388D4C4822 lea rcx, ptr [r16+r17*2+0x22] +XDIS 2526: MISC BASE D5388D4C4923 lea rcx, ptr [r17+r17*2+0x23] +XDIS 252c: MISC BASE D5388D4C4A24 lea rcx, ptr [r18+r17*2+0x24] +XDIS 2532: MISC BASE D5388D4C4B25 lea rcx, ptr [r19+r17*2+0x25] +XDIS 2538: MISC BASE D5388D4C4C26 lea rcx, ptr [r20+r17*2+0x26] +XDIS 253e: MISC BASE D5388D4C4D27 lea rcx, ptr [r21+r17*2+0x27] +XDIS 2544: MISC BASE D5388D4C4E28 lea rcx, ptr [r22+r17*2+0x28] +XDIS 254a: MISC BASE D5388D4C4F29 lea rcx, ptr [r23+r17*2+0x29] +XDIS 2550: MISC BASE D5398D4C482A lea rcx, ptr [r24+r17*2+0x2a] +XDIS 2556: MISC BASE D5398D4C492B lea rcx, ptr [r25+r17*2+0x2b] +XDIS 255c: MISC BASE D5398D4C4A2C lea rcx, ptr [r26+r17*2+0x2c] +XDIS 2562: MISC BASE D5398D4C4B2D lea rcx, ptr [r27+r17*2+0x2d] +XDIS 2568: MISC BASE D5398D4C4C2E lea rcx, ptr [r28+r17*2+0x2e] +XDIS 256e: MISC BASE D5398D4C4D2F lea rcx, ptr [r29+r17*2+0x2f] +XDIS 2574: MISC BASE D5398D4C4E30 lea rcx, ptr [r30+r17*2+0x30] +XDIS 257a: MISC BASE D5398D4C4F31 lea rcx, ptr [r31+r17*2+0x31] +XDIS 2580: MISC BASE D5288D4C5013 lea rcx, ptr [rax+r18*2+0x13] +XDIS 2586: MISC BASE D5288D4C5114 lea rcx, ptr [rcx+r18*2+0x14] +XDIS 258c: MISC BASE D5288D4C5215 lea rcx, ptr [rdx+r18*2+0x15] +XDIS 2592: MISC BASE D5288D4C5316 lea rcx, ptr [rbx+r18*2+0x16] +XDIS 2598: MISC BASE D5288D4C5417 lea rcx, ptr [rsp+r18*2+0x17] +XDIS 259e: MISC BASE D5288D4C5518 lea rcx, ptr [rbp+r18*2+0x18] +XDIS 25a4: MISC BASE D5288D4C5619 lea rcx, ptr [rsi+r18*2+0x19] +XDIS 25aa: MISC BASE D5288D4C571A lea rcx, ptr [rdi+r18*2+0x1a] +XDIS 25b0: MISC BASE D5298D4C501B lea rcx, ptr [r8+r18*2+0x1b] +XDIS 25b6: MISC BASE D5298D4C511C lea rcx, ptr [r9+r18*2+0x1c] +XDIS 25bc: MISC BASE D5298D4C521D lea rcx, ptr [r10+r18*2+0x1d] +XDIS 25c2: MISC BASE D5298D4C531E lea rcx, ptr [r11+r18*2+0x1e] +XDIS 25c8: MISC BASE D5298D4C541F lea rcx, ptr [r12+r18*2+0x1f] +XDIS 25ce: MISC BASE D5298D4C5520 lea rcx, ptr [r13+r18*2+0x20] +XDIS 25d4: MISC BASE D5298D4C5621 lea rcx, ptr [r14+r18*2+0x21] +XDIS 25da: MISC BASE D5298D4C5722 lea rcx, ptr [r15+r18*2+0x22] +XDIS 25e0: MISC BASE D5388D4C5023 lea rcx, ptr [r16+r18*2+0x23] +XDIS 25e6: MISC BASE D5388D4C5124 lea rcx, ptr [r17+r18*2+0x24] +XDIS 25ec: MISC BASE D5388D4C5225 lea rcx, ptr [r18+r18*2+0x25] +XDIS 25f2: MISC BASE D5388D4C5326 lea rcx, ptr [r19+r18*2+0x26] +XDIS 25f8: MISC BASE D5388D4C5427 lea rcx, ptr [r20+r18*2+0x27] +XDIS 25fe: MISC BASE D5388D4C5528 lea rcx, ptr [r21+r18*2+0x28] +XDIS 2604: MISC BASE D5388D4C5629 lea rcx, ptr [r22+r18*2+0x29] +XDIS 260a: MISC BASE D5388D4C572A lea rcx, ptr [r23+r18*2+0x2a] +XDIS 2610: MISC BASE D5398D4C502B lea rcx, ptr [r24+r18*2+0x2b] +XDIS 2616: MISC BASE D5398D4C512C lea rcx, ptr [r25+r18*2+0x2c] +XDIS 261c: MISC BASE D5398D4C522D lea rcx, ptr [r26+r18*2+0x2d] +XDIS 2622: MISC BASE D5398D4C532E lea rcx, ptr [r27+r18*2+0x2e] +XDIS 2628: MISC BASE D5398D4C542F lea rcx, ptr [r28+r18*2+0x2f] +XDIS 262e: MISC BASE D5398D4C5530 lea rcx, ptr [r29+r18*2+0x30] +XDIS 2634: MISC BASE D5398D4C5631 lea rcx, ptr [r30+r18*2+0x31] +XDIS 263a: MISC BASE D5398D4C5732 lea rcx, ptr [r31+r18*2+0x32] +XDIS 2640: MISC BASE D5288D4C5814 lea rcx, ptr [rax+r19*2+0x14] +XDIS 2646: MISC BASE D5288D4C5915 lea rcx, ptr [rcx+r19*2+0x15] +XDIS 264c: MISC BASE D5288D4C5A16 lea rcx, ptr [rdx+r19*2+0x16] +XDIS 2652: MISC BASE D5288D4C5B17 lea rcx, ptr [rbx+r19*2+0x17] +XDIS 2658: MISC BASE D5288D4C5C18 lea rcx, ptr [rsp+r19*2+0x18] +XDIS 265e: MISC BASE D5288D4C5D19 lea rcx, ptr [rbp+r19*2+0x19] +XDIS 2664: MISC BASE D5288D4C5E1A lea rcx, ptr [rsi+r19*2+0x1a] +XDIS 266a: MISC BASE D5288D4C5F1B lea rcx, ptr [rdi+r19*2+0x1b] +XDIS 2670: MISC BASE D5298D4C581C lea rcx, ptr [r8+r19*2+0x1c] +XDIS 2676: MISC BASE D5298D4C591D lea rcx, ptr [r9+r19*2+0x1d] +XDIS 267c: MISC BASE D5298D4C5A1E lea rcx, ptr [r10+r19*2+0x1e] +XDIS 2682: MISC BASE D5298D4C5B1F lea rcx, ptr [r11+r19*2+0x1f] +XDIS 2688: MISC BASE D5298D4C5C20 lea rcx, ptr [r12+r19*2+0x20] +XDIS 268e: MISC BASE D5298D4C5D21 lea rcx, ptr [r13+r19*2+0x21] +XDIS 2694: MISC BASE D5298D4C5E22 lea rcx, ptr [r14+r19*2+0x22] +XDIS 269a: MISC BASE D5298D4C5F23 lea rcx, ptr [r15+r19*2+0x23] +XDIS 26a0: MISC BASE D5388D4C5824 lea rcx, ptr [r16+r19*2+0x24] +XDIS 26a6: MISC BASE D5388D4C5925 lea rcx, ptr [r17+r19*2+0x25] +XDIS 26ac: MISC BASE D5388D4C5A26 lea rcx, ptr [r18+r19*2+0x26] +XDIS 26b2: MISC BASE D5388D4C5B27 lea rcx, ptr [r19+r19*2+0x27] +XDIS 26b8: MISC BASE D5388D4C5C28 lea rcx, ptr [r20+r19*2+0x28] +XDIS 26be: MISC BASE D5388D4C5D29 lea rcx, ptr [r21+r19*2+0x29] +XDIS 26c4: MISC BASE D5388D4C5E2A lea rcx, ptr [r22+r19*2+0x2a] +XDIS 26ca: MISC BASE D5388D4C5F2B lea rcx, ptr [r23+r19*2+0x2b] +XDIS 26d0: MISC BASE D5398D4C582C lea rcx, ptr [r24+r19*2+0x2c] +XDIS 26d6: MISC BASE D5398D4C592D lea rcx, ptr [r25+r19*2+0x2d] +XDIS 26dc: MISC BASE D5398D4C5A2E lea rcx, ptr [r26+r19*2+0x2e] +XDIS 26e2: MISC BASE D5398D4C5B2F lea rcx, ptr [r27+r19*2+0x2f] +XDIS 26e8: MISC BASE D5398D4C5C30 lea rcx, ptr [r28+r19*2+0x30] +XDIS 26ee: MISC BASE D5398D4C5D31 lea rcx, ptr [r29+r19*2+0x31] +XDIS 26f4: MISC BASE D5398D4C5E32 lea rcx, ptr [r30+r19*2+0x32] +XDIS 26fa: MISC BASE D5398D4C5F33 lea rcx, ptr [r31+r19*2+0x33] +XDIS 2700: MISC BASE D5288D4C6015 lea rcx, ptr [rax+r20*2+0x15] +XDIS 2706: MISC BASE D5288D4C6116 lea rcx, ptr [rcx+r20*2+0x16] +XDIS 270c: MISC BASE D5288D4C6217 lea rcx, ptr [rdx+r20*2+0x17] +XDIS 2712: MISC BASE D5288D4C6318 lea rcx, ptr [rbx+r20*2+0x18] +XDIS 2718: MISC BASE D5288D4C6419 lea rcx, ptr [rsp+r20*2+0x19] +XDIS 271e: MISC BASE D5288D4C651A lea rcx, ptr [rbp+r20*2+0x1a] +XDIS 2724: MISC BASE D5288D4C661B lea rcx, ptr [rsi+r20*2+0x1b] +XDIS 272a: MISC BASE D5288D4C671C lea rcx, ptr [rdi+r20*2+0x1c] +XDIS 2730: MISC BASE D5298D4C601D lea rcx, ptr [r8+r20*2+0x1d] +XDIS 2736: MISC BASE D5298D4C611E lea rcx, ptr [r9+r20*2+0x1e] +XDIS 273c: MISC BASE D5298D4C621F lea rcx, ptr [r10+r20*2+0x1f] +XDIS 2742: MISC BASE D5298D4C6320 lea rcx, ptr [r11+r20*2+0x20] +XDIS 2748: MISC BASE D5298D4C6421 lea rcx, ptr [r12+r20*2+0x21] +XDIS 274e: MISC BASE D5298D4C6522 lea rcx, ptr [r13+r20*2+0x22] +XDIS 2754: MISC BASE D5298D4C6623 lea rcx, ptr [r14+r20*2+0x23] +XDIS 275a: MISC BASE D5298D4C6724 lea rcx, ptr [r15+r20*2+0x24] +XDIS 2760: MISC BASE D5388D4C6025 lea rcx, ptr [r16+r20*2+0x25] +XDIS 2766: MISC BASE D5388D4C6126 lea rcx, ptr [r17+r20*2+0x26] +XDIS 276c: MISC BASE D5388D4C6227 lea rcx, ptr [r18+r20*2+0x27] +XDIS 2772: MISC BASE D5388D4C6328 lea rcx, ptr [r19+r20*2+0x28] +XDIS 2778: MISC BASE D5388D4C6429 lea rcx, ptr [r20+r20*2+0x29] +XDIS 277e: MISC BASE D5388D4C652A lea rcx, ptr [r21+r20*2+0x2a] +XDIS 2784: MISC BASE D5388D4C662B lea rcx, ptr [r22+r20*2+0x2b] +XDIS 278a: MISC BASE D5388D4C672C lea rcx, ptr [r23+r20*2+0x2c] +XDIS 2790: MISC BASE D5398D4C602D lea rcx, ptr [r24+r20*2+0x2d] +XDIS 2796: MISC BASE D5398D4C612E lea rcx, ptr [r25+r20*2+0x2e] +XDIS 279c: MISC BASE D5398D4C622F lea rcx, ptr [r26+r20*2+0x2f] +XDIS 27a2: MISC BASE D5398D4C6330 lea rcx, ptr [r27+r20*2+0x30] +XDIS 27a8: MISC BASE D5398D4C6431 lea rcx, ptr [r28+r20*2+0x31] +XDIS 27ae: MISC BASE D5398D4C6532 lea rcx, ptr [r29+r20*2+0x32] +XDIS 27b4: MISC BASE D5398D4C6633 lea rcx, ptr [r30+r20*2+0x33] +XDIS 27ba: MISC BASE D5398D4C6734 lea rcx, ptr [r31+r20*2+0x34] +XDIS 27c0: MISC BASE D5288D4C6816 lea rcx, ptr [rax+r21*2+0x16] +XDIS 27c6: MISC BASE D5288D4C6917 lea rcx, ptr [rcx+r21*2+0x17] +XDIS 27cc: MISC BASE D5288D4C6A18 lea rcx, ptr [rdx+r21*2+0x18] +XDIS 27d2: MISC BASE D5288D4C6B19 lea rcx, ptr [rbx+r21*2+0x19] +XDIS 27d8: MISC BASE D5288D4C6C1A lea rcx, ptr [rsp+r21*2+0x1a] +XDIS 27de: MISC BASE D5288D4C6D1B lea rcx, ptr [rbp+r21*2+0x1b] +XDIS 27e4: MISC BASE D5288D4C6E1C lea rcx, ptr [rsi+r21*2+0x1c] +XDIS 27ea: MISC BASE D5288D4C6F1D lea rcx, ptr [rdi+r21*2+0x1d] +XDIS 27f0: MISC BASE D5298D4C681E lea rcx, ptr [r8+r21*2+0x1e] +XDIS 27f6: MISC BASE D5298D4C691F lea rcx, ptr [r9+r21*2+0x1f] +XDIS 27fc: MISC BASE D5298D4C6A20 lea rcx, ptr [r10+r21*2+0x20] +XDIS 2802: MISC BASE D5298D4C6B21 lea rcx, ptr [r11+r21*2+0x21] +XDIS 2808: MISC BASE D5298D4C6C22 lea rcx, ptr [r12+r21*2+0x22] +XDIS 280e: MISC BASE D5298D4C6D23 lea rcx, ptr [r13+r21*2+0x23] +XDIS 2814: MISC BASE D5298D4C6E24 lea rcx, ptr [r14+r21*2+0x24] +XDIS 281a: MISC BASE D5298D4C6F25 lea rcx, ptr [r15+r21*2+0x25] +XDIS 2820: MISC BASE D5388D4C6826 lea rcx, ptr [r16+r21*2+0x26] +XDIS 2826: MISC BASE D5388D4C6927 lea rcx, ptr [r17+r21*2+0x27] +XDIS 282c: MISC BASE D5388D4C6A28 lea rcx, ptr [r18+r21*2+0x28] +XDIS 2832: MISC BASE D5388D4C6B29 lea rcx, ptr [r19+r21*2+0x29] +XDIS 2838: MISC BASE D5388D4C6C2A lea rcx, ptr [r20+r21*2+0x2a] +XDIS 283e: MISC BASE D5388D4C6D2B lea rcx, ptr [r21+r21*2+0x2b] +XDIS 2844: MISC BASE D5388D4C6E2C lea rcx, ptr [r22+r21*2+0x2c] +XDIS 284a: MISC BASE D5388D4C6F2D lea rcx, ptr [r23+r21*2+0x2d] +XDIS 2850: MISC BASE D5398D4C682E lea rcx, ptr [r24+r21*2+0x2e] +XDIS 2856: MISC BASE D5398D4C692F lea rcx, ptr [r25+r21*2+0x2f] +XDIS 285c: MISC BASE D5398D4C6A30 lea rcx, ptr [r26+r21*2+0x30] +XDIS 2862: MISC BASE D5398D4C6B31 lea rcx, ptr [r27+r21*2+0x31] +XDIS 2868: MISC BASE D5398D4C6C32 lea rcx, ptr [r28+r21*2+0x32] +XDIS 286e: MISC BASE D5398D4C6D33 lea rcx, ptr [r29+r21*2+0x33] +XDIS 2874: MISC BASE D5398D4C6E34 lea rcx, ptr [r30+r21*2+0x34] +XDIS 287a: MISC BASE D5398D4C6F35 lea rcx, ptr [r31+r21*2+0x35] +XDIS 2880: MISC BASE D5288D4C7017 lea rcx, ptr [rax+r22*2+0x17] +XDIS 2886: MISC BASE D5288D4C7118 lea rcx, ptr [rcx+r22*2+0x18] +XDIS 288c: MISC BASE D5288D4C7219 lea rcx, ptr [rdx+r22*2+0x19] +XDIS 2892: MISC BASE D5288D4C731A lea rcx, ptr [rbx+r22*2+0x1a] +XDIS 2898: MISC BASE D5288D4C741B lea rcx, ptr [rsp+r22*2+0x1b] +XDIS 289e: MISC BASE D5288D4C751C lea rcx, ptr [rbp+r22*2+0x1c] +XDIS 28a4: MISC BASE D5288D4C761D lea rcx, ptr [rsi+r22*2+0x1d] +XDIS 28aa: MISC BASE D5288D4C771E lea rcx, ptr [rdi+r22*2+0x1e] +XDIS 28b0: MISC BASE D5298D4C701F lea rcx, ptr [r8+r22*2+0x1f] +XDIS 28b6: MISC BASE D5298D4C7120 lea rcx, ptr [r9+r22*2+0x20] +XDIS 28bc: MISC BASE D5298D4C7221 lea rcx, ptr [r10+r22*2+0x21] +XDIS 28c2: MISC BASE D5298D4C7322 lea rcx, ptr [r11+r22*2+0x22] +XDIS 28c8: MISC BASE D5298D4C7423 lea rcx, ptr [r12+r22*2+0x23] +XDIS 28ce: MISC BASE D5298D4C7524 lea rcx, ptr [r13+r22*2+0x24] +XDIS 28d4: MISC BASE D5298D4C7625 lea rcx, ptr [r14+r22*2+0x25] +XDIS 28da: MISC BASE D5298D4C7726 lea rcx, ptr [r15+r22*2+0x26] +XDIS 28e0: MISC BASE D5388D4C7027 lea rcx, ptr [r16+r22*2+0x27] +XDIS 28e6: MISC BASE D5388D4C7128 lea rcx, ptr [r17+r22*2+0x28] +XDIS 28ec: MISC BASE D5388D4C7229 lea rcx, ptr [r18+r22*2+0x29] +XDIS 28f2: MISC BASE D5388D4C732A lea rcx, ptr [r19+r22*2+0x2a] +XDIS 28f8: MISC BASE D5388D4C742B lea rcx, ptr [r20+r22*2+0x2b] +XDIS 28fe: MISC BASE D5388D4C752C lea rcx, ptr [r21+r22*2+0x2c] +XDIS 2904: MISC BASE D5388D4C762D lea rcx, ptr [r22+r22*2+0x2d] +XDIS 290a: MISC BASE D5388D4C772E lea rcx, ptr [r23+r22*2+0x2e] +XDIS 2910: MISC BASE D5398D4C702F lea rcx, ptr [r24+r22*2+0x2f] +XDIS 2916: MISC BASE D5398D4C7130 lea rcx, ptr [r25+r22*2+0x30] +XDIS 291c: MISC BASE D5398D4C7231 lea rcx, ptr [r26+r22*2+0x31] +XDIS 2922: MISC BASE D5398D4C7332 lea rcx, ptr [r27+r22*2+0x32] +XDIS 2928: MISC BASE D5398D4C7433 lea rcx, ptr [r28+r22*2+0x33] +XDIS 292e: MISC BASE D5398D4C7534 lea rcx, ptr [r29+r22*2+0x34] +XDIS 2934: MISC BASE D5398D4C7635 lea rcx, ptr [r30+r22*2+0x35] +XDIS 293a: MISC BASE D5398D4C7736 lea rcx, ptr [r31+r22*2+0x36] +XDIS 2940: MISC BASE D5288D4C7818 lea rcx, ptr [rax+r23*2+0x18] +XDIS 2946: MISC BASE D5288D4C7919 lea rcx, ptr [rcx+r23*2+0x19] +XDIS 294c: MISC BASE D5288D4C7A1A lea rcx, ptr [rdx+r23*2+0x1a] +XDIS 2952: MISC BASE D5288D4C7B1B lea rcx, ptr [rbx+r23*2+0x1b] +XDIS 2958: MISC BASE D5288D4C7C1C lea rcx, ptr [rsp+r23*2+0x1c] +XDIS 295e: MISC BASE D5288D4C7D1D lea rcx, ptr [rbp+r23*2+0x1d] +XDIS 2964: MISC BASE D5288D4C7E1E lea rcx, ptr [rsi+r23*2+0x1e] +XDIS 296a: MISC BASE D5288D4C7F1F lea rcx, ptr [rdi+r23*2+0x1f] +XDIS 2970: MISC BASE D5298D4C7820 lea rcx, ptr [r8+r23*2+0x20] +XDIS 2976: MISC BASE D5298D4C7921 lea rcx, ptr [r9+r23*2+0x21] +XDIS 297c: MISC BASE D5298D4C7A22 lea rcx, ptr [r10+r23*2+0x22] +XDIS 2982: MISC BASE D5298D4C7B23 lea rcx, ptr [r11+r23*2+0x23] +XDIS 2988: MISC BASE D5298D4C7C24 lea rcx, ptr [r12+r23*2+0x24] +XDIS 298e: MISC BASE D5298D4C7D25 lea rcx, ptr [r13+r23*2+0x25] +XDIS 2994: MISC BASE D5298D4C7E26 lea rcx, ptr [r14+r23*2+0x26] +XDIS 299a: MISC BASE D5298D4C7F27 lea rcx, ptr [r15+r23*2+0x27] +XDIS 29a0: MISC BASE D5388D4C7828 lea rcx, ptr [r16+r23*2+0x28] +XDIS 29a6: MISC BASE D5388D4C7929 lea rcx, ptr [r17+r23*2+0x29] +XDIS 29ac: MISC BASE D5388D4C7A2A lea rcx, ptr [r18+r23*2+0x2a] +XDIS 29b2: MISC BASE D5388D4C7B2B lea rcx, ptr [r19+r23*2+0x2b] +XDIS 29b8: MISC BASE D5388D4C7C2C lea rcx, ptr [r20+r23*2+0x2c] +XDIS 29be: MISC BASE D5388D4C7D2D lea rcx, ptr [r21+r23*2+0x2d] +XDIS 29c4: MISC BASE D5388D4C7E2E lea rcx, ptr [r22+r23*2+0x2e] +XDIS 29ca: MISC BASE D5388D4C7F2F lea rcx, ptr [r23+r23*2+0x2f] +XDIS 29d0: MISC BASE D5398D4C7830 lea rcx, ptr [r24+r23*2+0x30] +XDIS 29d6: MISC BASE D5398D4C7931 lea rcx, ptr [r25+r23*2+0x31] +XDIS 29dc: MISC BASE D5398D4C7A32 lea rcx, ptr [r26+r23*2+0x32] +XDIS 29e2: MISC BASE D5398D4C7B33 lea rcx, ptr [r27+r23*2+0x33] +XDIS 29e8: MISC BASE D5398D4C7C34 lea rcx, ptr [r28+r23*2+0x34] +XDIS 29ee: MISC BASE D5398D4C7D35 lea rcx, ptr [r29+r23*2+0x35] +XDIS 29f4: MISC BASE D5398D4C7E36 lea rcx, ptr [r30+r23*2+0x36] +XDIS 29fa: MISC BASE D5398D4C7F37 lea rcx, ptr [r31+r23*2+0x37] +XDIS 2a00: MISC BASE D52A8D4C4019 lea rcx, ptr [rax+r24*2+0x19] +XDIS 2a06: MISC BASE D52A8D4C411A lea rcx, ptr [rcx+r24*2+0x1a] +XDIS 2a0c: MISC BASE D52A8D4C421B lea rcx, ptr [rdx+r24*2+0x1b] +XDIS 2a12: MISC BASE D52A8D4C431C lea rcx, ptr [rbx+r24*2+0x1c] +XDIS 2a18: MISC BASE D52A8D4C441D lea rcx, ptr [rsp+r24*2+0x1d] +XDIS 2a1e: MISC BASE D52A8D4C451E lea rcx, ptr [rbp+r24*2+0x1e] +XDIS 2a24: MISC BASE D52A8D4C461F lea rcx, ptr [rsi+r24*2+0x1f] +XDIS 2a2a: MISC BASE D52A8D4C4720 lea rcx, ptr [rdi+r24*2+0x20] +XDIS 2a30: MISC BASE D52B8D4C4021 lea rcx, ptr [r8+r24*2+0x21] +XDIS 2a36: MISC BASE D52B8D4C4122 lea rcx, ptr [r9+r24*2+0x22] +XDIS 2a3c: MISC BASE D52B8D4C4223 lea rcx, ptr [r10+r24*2+0x23] +XDIS 2a42: MISC BASE D52B8D4C4324 lea rcx, ptr [r11+r24*2+0x24] +XDIS 2a48: MISC BASE D52B8D4C4425 lea rcx, ptr [r12+r24*2+0x25] +XDIS 2a4e: MISC BASE D52B8D4C4526 lea rcx, ptr [r13+r24*2+0x26] +XDIS 2a54: MISC BASE D52B8D4C4627 lea rcx, ptr [r14+r24*2+0x27] +XDIS 2a5a: MISC BASE D52B8D4C4728 lea rcx, ptr [r15+r24*2+0x28] +XDIS 2a60: MISC BASE D53A8D4C4029 lea rcx, ptr [r16+r24*2+0x29] +XDIS 2a66: MISC BASE D53A8D4C412A lea rcx, ptr [r17+r24*2+0x2a] +XDIS 2a6c: MISC BASE D53A8D4C422B lea rcx, ptr [r18+r24*2+0x2b] +XDIS 2a72: MISC BASE D53A8D4C432C lea rcx, ptr [r19+r24*2+0x2c] +XDIS 2a78: MISC BASE D53A8D4C442D lea rcx, ptr [r20+r24*2+0x2d] +XDIS 2a7e: MISC BASE D53A8D4C452E lea rcx, ptr [r21+r24*2+0x2e] +XDIS 2a84: MISC BASE D53A8D4C462F lea rcx, ptr [r22+r24*2+0x2f] +XDIS 2a8a: MISC BASE D53A8D4C4730 lea rcx, ptr [r23+r24*2+0x30] +XDIS 2a90: MISC BASE D53B8D4C4031 lea rcx, ptr [r24+r24*2+0x31] +XDIS 2a96: MISC BASE D53B8D4C4132 lea rcx, ptr [r25+r24*2+0x32] +XDIS 2a9c: MISC BASE D53B8D4C4233 lea rcx, ptr [r26+r24*2+0x33] +XDIS 2aa2: MISC BASE D53B8D4C4334 lea rcx, ptr [r27+r24*2+0x34] +XDIS 2aa8: MISC BASE D53B8D4C4435 lea rcx, ptr [r28+r24*2+0x35] +XDIS 2aae: MISC BASE D53B8D4C4536 lea rcx, ptr [r29+r24*2+0x36] +XDIS 2ab4: MISC BASE D53B8D4C4637 lea rcx, ptr [r30+r24*2+0x37] +XDIS 2aba: MISC BASE D53B8D4C4738 lea rcx, ptr [r31+r24*2+0x38] +XDIS 2ac0: MISC BASE D52A8D4C481A lea rcx, ptr [rax+r25*2+0x1a] +XDIS 2ac6: MISC BASE D52A8D4C491B lea rcx, ptr [rcx+r25*2+0x1b] +XDIS 2acc: MISC BASE D52A8D4C4A1C lea rcx, ptr [rdx+r25*2+0x1c] +XDIS 2ad2: MISC BASE D52A8D4C4B1D lea rcx, ptr [rbx+r25*2+0x1d] +XDIS 2ad8: MISC BASE D52A8D4C4C1E lea rcx, ptr [rsp+r25*2+0x1e] +XDIS 2ade: MISC BASE D52A8D4C4D1F lea rcx, ptr [rbp+r25*2+0x1f] +XDIS 2ae4: MISC BASE D52A8D4C4E20 lea rcx, ptr [rsi+r25*2+0x20] +XDIS 2aea: MISC BASE D52A8D4C4F21 lea rcx, ptr [rdi+r25*2+0x21] +XDIS 2af0: MISC BASE D52B8D4C4822 lea rcx, ptr [r8+r25*2+0x22] +XDIS 2af6: MISC BASE D52B8D4C4923 lea rcx, ptr [r9+r25*2+0x23] +XDIS 2afc: MISC BASE D52B8D4C4A24 lea rcx, ptr [r10+r25*2+0x24] +XDIS 2b02: MISC BASE D52B8D4C4B25 lea rcx, ptr [r11+r25*2+0x25] +XDIS 2b08: MISC BASE D52B8D4C4C26 lea rcx, ptr [r12+r25*2+0x26] +XDIS 2b0e: MISC BASE D52B8D4C4D27 lea rcx, ptr [r13+r25*2+0x27] +XDIS 2b14: MISC BASE D52B8D4C4E28 lea rcx, ptr [r14+r25*2+0x28] +XDIS 2b1a: MISC BASE D52B8D4C4F29 lea rcx, ptr [r15+r25*2+0x29] +XDIS 2b20: MISC BASE D53A8D4C482A lea rcx, ptr [r16+r25*2+0x2a] +XDIS 2b26: MISC BASE D53A8D4C492B lea rcx, ptr [r17+r25*2+0x2b] +XDIS 2b2c: MISC BASE D53A8D4C4A2C lea rcx, ptr [r18+r25*2+0x2c] +XDIS 2b32: MISC BASE D53A8D4C4B2D lea rcx, ptr [r19+r25*2+0x2d] +XDIS 2b38: MISC BASE D53A8D4C4C2E lea rcx, ptr [r20+r25*2+0x2e] +XDIS 2b3e: MISC BASE D53A8D4C4D2F lea rcx, ptr [r21+r25*2+0x2f] +XDIS 2b44: MISC BASE D53A8D4C4E30 lea rcx, ptr [r22+r25*2+0x30] +XDIS 2b4a: MISC BASE D53A8D4C4F31 lea rcx, ptr [r23+r25*2+0x31] +XDIS 2b50: MISC BASE D53B8D4C4832 lea rcx, ptr [r24+r25*2+0x32] +XDIS 2b56: MISC BASE D53B8D4C4933 lea rcx, ptr [r25+r25*2+0x33] +XDIS 2b5c: MISC BASE D53B8D4C4A34 lea rcx, ptr [r26+r25*2+0x34] +XDIS 2b62: MISC BASE D53B8D4C4B35 lea rcx, ptr [r27+r25*2+0x35] +XDIS 2b68: MISC BASE D53B8D4C4C36 lea rcx, ptr [r28+r25*2+0x36] +XDIS 2b6e: MISC BASE D53B8D4C4D37 lea rcx, ptr [r29+r25*2+0x37] +XDIS 2b74: MISC BASE D53B8D4C4E38 lea rcx, ptr [r30+r25*2+0x38] +XDIS 2b7a: MISC BASE D53B8D4C4F39 lea rcx, ptr [r31+r25*2+0x39] +XDIS 2b80: MISC BASE D52A8D4C501B lea rcx, ptr [rax+r26*2+0x1b] +XDIS 2b86: MISC BASE D52A8D4C511C lea rcx, ptr [rcx+r26*2+0x1c] +XDIS 2b8c: MISC BASE D52A8D4C521D lea rcx, ptr [rdx+r26*2+0x1d] +XDIS 2b92: MISC BASE D52A8D4C531E lea rcx, ptr [rbx+r26*2+0x1e] +XDIS 2b98: MISC BASE D52A8D4C541F lea rcx, ptr [rsp+r26*2+0x1f] +XDIS 2b9e: MISC BASE D52A8D4C5520 lea rcx, ptr [rbp+r26*2+0x20] +XDIS 2ba4: MISC BASE D52A8D4C5621 lea rcx, ptr [rsi+r26*2+0x21] +XDIS 2baa: MISC BASE D52A8D4C5722 lea rcx, ptr [rdi+r26*2+0x22] +XDIS 2bb0: MISC BASE D52B8D4C5023 lea rcx, ptr [r8+r26*2+0x23] +XDIS 2bb6: MISC BASE D52B8D4C5124 lea rcx, ptr [r9+r26*2+0x24] +XDIS 2bbc: MISC BASE D52B8D4C5225 lea rcx, ptr [r10+r26*2+0x25] +XDIS 2bc2: MISC BASE D52B8D4C5326 lea rcx, ptr [r11+r26*2+0x26] +XDIS 2bc8: MISC BASE D52B8D4C5427 lea rcx, ptr [r12+r26*2+0x27] +XDIS 2bce: MISC BASE D52B8D4C5528 lea rcx, ptr [r13+r26*2+0x28] +XDIS 2bd4: MISC BASE D52B8D4C5629 lea rcx, ptr [r14+r26*2+0x29] +XDIS 2bda: MISC BASE D52B8D4C572A lea rcx, ptr [r15+r26*2+0x2a] +XDIS 2be0: MISC BASE D53A8D4C502B lea rcx, ptr [r16+r26*2+0x2b] +XDIS 2be6: MISC BASE D53A8D4C512C lea rcx, ptr [r17+r26*2+0x2c] +XDIS 2bec: MISC BASE D53A8D4C522D lea rcx, ptr [r18+r26*2+0x2d] +XDIS 2bf2: MISC BASE D53A8D4C532E lea rcx, ptr [r19+r26*2+0x2e] +XDIS 2bf8: MISC BASE D53A8D4C542F lea rcx, ptr [r20+r26*2+0x2f] +XDIS 2bfe: MISC BASE D53A8D4C5530 lea rcx, ptr [r21+r26*2+0x30] +XDIS 2c04: MISC BASE D53A8D4C5631 lea rcx, ptr [r22+r26*2+0x31] +XDIS 2c0a: MISC BASE D53A8D4C5732 lea rcx, ptr [r23+r26*2+0x32] +XDIS 2c10: MISC BASE D53B8D4C5033 lea rcx, ptr [r24+r26*2+0x33] +XDIS 2c16: MISC BASE D53B8D4C5134 lea rcx, ptr [r25+r26*2+0x34] +XDIS 2c1c: MISC BASE D53B8D4C5235 lea rcx, ptr [r26+r26*2+0x35] +XDIS 2c22: MISC BASE D53B8D4C5336 lea rcx, ptr [r27+r26*2+0x36] +XDIS 2c28: MISC BASE D53B8D4C5437 lea rcx, ptr [r28+r26*2+0x37] +XDIS 2c2e: MISC BASE D53B8D4C5538 lea rcx, ptr [r29+r26*2+0x38] +XDIS 2c34: MISC BASE D53B8D4C5639 lea rcx, ptr [r30+r26*2+0x39] +XDIS 2c3a: MISC BASE D53B8D4C573A lea rcx, ptr [r31+r26*2+0x3a] +XDIS 2c40: MISC BASE D52A8D4C581C lea rcx, ptr [rax+r27*2+0x1c] +XDIS 2c46: MISC BASE D52A8D4C591D lea rcx, ptr [rcx+r27*2+0x1d] +XDIS 2c4c: MISC BASE D52A8D4C5A1E lea rcx, ptr [rdx+r27*2+0x1e] +XDIS 2c52: MISC BASE D52A8D4C5B1F lea rcx, ptr [rbx+r27*2+0x1f] +XDIS 2c58: MISC BASE D52A8D4C5C20 lea rcx, ptr [rsp+r27*2+0x20] +XDIS 2c5e: MISC BASE D52A8D4C5D21 lea rcx, ptr [rbp+r27*2+0x21] +XDIS 2c64: MISC BASE D52A8D4C5E22 lea rcx, ptr [rsi+r27*2+0x22] +XDIS 2c6a: MISC BASE D52A8D4C5F23 lea rcx, ptr [rdi+r27*2+0x23] +XDIS 2c70: MISC BASE D52B8D4C5824 lea rcx, ptr [r8+r27*2+0x24] +XDIS 2c76: MISC BASE D52B8D4C5925 lea rcx, ptr [r9+r27*2+0x25] +XDIS 2c7c: MISC BASE D52B8D4C5A26 lea rcx, ptr [r10+r27*2+0x26] +XDIS 2c82: MISC BASE D52B8D4C5B27 lea rcx, ptr [r11+r27*2+0x27] +XDIS 2c88: MISC BASE D52B8D4C5C28 lea rcx, ptr [r12+r27*2+0x28] +XDIS 2c8e: MISC BASE D52B8D4C5D29 lea rcx, ptr [r13+r27*2+0x29] +XDIS 2c94: MISC BASE D52B8D4C5E2A lea rcx, ptr [r14+r27*2+0x2a] +XDIS 2c9a: MISC BASE D52B8D4C5F2B lea rcx, ptr [r15+r27*2+0x2b] +XDIS 2ca0: MISC BASE D53A8D4C582C lea rcx, ptr [r16+r27*2+0x2c] +XDIS 2ca6: MISC BASE D53A8D4C592D lea rcx, ptr [r17+r27*2+0x2d] +XDIS 2cac: MISC BASE D53A8D4C5A2E lea rcx, ptr [r18+r27*2+0x2e] +XDIS 2cb2: MISC BASE D53A8D4C5B2F lea rcx, ptr [r19+r27*2+0x2f] +XDIS 2cb8: MISC BASE D53A8D4C5C30 lea rcx, ptr [r20+r27*2+0x30] +XDIS 2cbe: MISC BASE D53A8D4C5D31 lea rcx, ptr [r21+r27*2+0x31] +XDIS 2cc4: MISC BASE D53A8D4C5E32 lea rcx, ptr [r22+r27*2+0x32] +XDIS 2cca: MISC BASE D53A8D4C5F33 lea rcx, ptr [r23+r27*2+0x33] +XDIS 2cd0: MISC BASE D53B8D4C5834 lea rcx, ptr [r24+r27*2+0x34] +XDIS 2cd6: MISC BASE D53B8D4C5935 lea rcx, ptr [r25+r27*2+0x35] +XDIS 2cdc: MISC BASE D53B8D4C5A36 lea rcx, ptr [r26+r27*2+0x36] +XDIS 2ce2: MISC BASE D53B8D4C5B37 lea rcx, ptr [r27+r27*2+0x37] +XDIS 2ce8: MISC BASE D53B8D4C5C38 lea rcx, ptr [r28+r27*2+0x38] +XDIS 2cee: MISC BASE D53B8D4C5D39 lea rcx, ptr [r29+r27*2+0x39] +XDIS 2cf4: MISC BASE D53B8D4C5E3A lea rcx, ptr [r30+r27*2+0x3a] +XDIS 2cfa: MISC BASE D53B8D4C5F3B lea rcx, ptr [r31+r27*2+0x3b] +XDIS 2d00: MISC BASE D52A8D4C601D lea rcx, ptr [rax+r28*2+0x1d] +XDIS 2d06: MISC BASE D52A8D4C611E lea rcx, ptr [rcx+r28*2+0x1e] +XDIS 2d0c: MISC BASE D52A8D4C621F lea rcx, ptr [rdx+r28*2+0x1f] +XDIS 2d12: MISC BASE D52A8D4C6320 lea rcx, ptr [rbx+r28*2+0x20] +XDIS 2d18: MISC BASE D52A8D4C6421 lea rcx, ptr [rsp+r28*2+0x21] +XDIS 2d1e: MISC BASE D52A8D4C6522 lea rcx, ptr [rbp+r28*2+0x22] +XDIS 2d24: MISC BASE D52A8D4C6623 lea rcx, ptr [rsi+r28*2+0x23] +XDIS 2d2a: MISC BASE D52A8D4C6724 lea rcx, ptr [rdi+r28*2+0x24] +XDIS 2d30: MISC BASE D52B8D4C6025 lea rcx, ptr [r8+r28*2+0x25] +XDIS 2d36: MISC BASE D52B8D4C6126 lea rcx, ptr [r9+r28*2+0x26] +XDIS 2d3c: MISC BASE D52B8D4C6227 lea rcx, ptr [r10+r28*2+0x27] +XDIS 2d42: MISC BASE D52B8D4C6328 lea rcx, ptr [r11+r28*2+0x28] +XDIS 2d48: MISC BASE D52B8D4C6429 lea rcx, ptr [r12+r28*2+0x29] +XDIS 2d4e: MISC BASE D52B8D4C652A lea rcx, ptr [r13+r28*2+0x2a] +XDIS 2d54: MISC BASE D52B8D4C662B lea rcx, ptr [r14+r28*2+0x2b] +XDIS 2d5a: MISC BASE D52B8D4C672C lea rcx, ptr [r15+r28*2+0x2c] +XDIS 2d60: MISC BASE D53A8D4C602D lea rcx, ptr [r16+r28*2+0x2d] +XDIS 2d66: MISC BASE D53A8D4C612E lea rcx, ptr [r17+r28*2+0x2e] +XDIS 2d6c: MISC BASE D53A8D4C622F lea rcx, ptr [r18+r28*2+0x2f] +XDIS 2d72: MISC BASE D53A8D4C6330 lea rcx, ptr [r19+r28*2+0x30] +XDIS 2d78: MISC BASE D53A8D4C6431 lea rcx, ptr [r20+r28*2+0x31] +XDIS 2d7e: MISC BASE D53A8D4C6532 lea rcx, ptr [r21+r28*2+0x32] +XDIS 2d84: MISC BASE D53A8D4C6633 lea rcx, ptr [r22+r28*2+0x33] +XDIS 2d8a: MISC BASE D53A8D4C6734 lea rcx, ptr [r23+r28*2+0x34] +XDIS 2d90: MISC BASE D53B8D4C6035 lea rcx, ptr [r24+r28*2+0x35] +XDIS 2d96: MISC BASE D53B8D4C6136 lea rcx, ptr [r25+r28*2+0x36] +XDIS 2d9c: MISC BASE D53B8D4C6237 lea rcx, ptr [r26+r28*2+0x37] +XDIS 2da2: MISC BASE D53B8D4C6338 lea rcx, ptr [r27+r28*2+0x38] +XDIS 2da8: MISC BASE D53B8D4C6439 lea rcx, ptr [r28+r28*2+0x39] +XDIS 2dae: MISC BASE D53B8D4C653A lea rcx, ptr [r29+r28*2+0x3a] +XDIS 2db4: MISC BASE D53B8D4C663B lea rcx, ptr [r30+r28*2+0x3b] +XDIS 2dba: MISC BASE D53B8D4C673C lea rcx, ptr [r31+r28*2+0x3c] +XDIS 2dc0: MISC BASE D52A8D4C681E lea rcx, ptr [rax+r29*2+0x1e] +XDIS 2dc6: MISC BASE D52A8D4C691F lea rcx, ptr [rcx+r29*2+0x1f] +XDIS 2dcc: MISC BASE D52A8D4C6A20 lea rcx, ptr [rdx+r29*2+0x20] +XDIS 2dd2: MISC BASE D52A8D4C6B21 lea rcx, ptr [rbx+r29*2+0x21] +XDIS 2dd8: MISC BASE D52A8D4C6C22 lea rcx, ptr [rsp+r29*2+0x22] +XDIS 2dde: MISC BASE D52A8D4C6D23 lea rcx, ptr [rbp+r29*2+0x23] +XDIS 2de4: MISC BASE D52A8D4C6E24 lea rcx, ptr [rsi+r29*2+0x24] +XDIS 2dea: MISC BASE D52A8D4C6F25 lea rcx, ptr [rdi+r29*2+0x25] +XDIS 2df0: MISC BASE D52B8D4C6826 lea rcx, ptr [r8+r29*2+0x26] +XDIS 2df6: MISC BASE D52B8D4C6927 lea rcx, ptr [r9+r29*2+0x27] +XDIS 2dfc: MISC BASE D52B8D4C6A28 lea rcx, ptr [r10+r29*2+0x28] +XDIS 2e02: MISC BASE D52B8D4C6B29 lea rcx, ptr [r11+r29*2+0x29] +XDIS 2e08: MISC BASE D52B8D4C6C2A lea rcx, ptr [r12+r29*2+0x2a] +XDIS 2e0e: MISC BASE D52B8D4C6D2B lea rcx, ptr [r13+r29*2+0x2b] +XDIS 2e14: MISC BASE D52B8D4C6E2C lea rcx, ptr [r14+r29*2+0x2c] +XDIS 2e1a: MISC BASE D52B8D4C6F2D lea rcx, ptr [r15+r29*2+0x2d] +XDIS 2e20: MISC BASE D53A8D4C682E lea rcx, ptr [r16+r29*2+0x2e] +XDIS 2e26: MISC BASE D53A8D4C692F lea rcx, ptr [r17+r29*2+0x2f] +XDIS 2e2c: MISC BASE D53A8D4C6A30 lea rcx, ptr [r18+r29*2+0x30] +XDIS 2e32: MISC BASE D53A8D4C6B31 lea rcx, ptr [r19+r29*2+0x31] +XDIS 2e38: MISC BASE D53A8D4C6C32 lea rcx, ptr [r20+r29*2+0x32] +XDIS 2e3e: MISC BASE D53A8D4C6D33 lea rcx, ptr [r21+r29*2+0x33] +XDIS 2e44: MISC BASE D53A8D4C6E34 lea rcx, ptr [r22+r29*2+0x34] +XDIS 2e4a: MISC BASE D53A8D4C6F35 lea rcx, ptr [r23+r29*2+0x35] +XDIS 2e50: MISC BASE D53B8D4C6836 lea rcx, ptr [r24+r29*2+0x36] +XDIS 2e56: MISC BASE D53B8D4C6937 lea rcx, ptr [r25+r29*2+0x37] +XDIS 2e5c: MISC BASE D53B8D4C6A38 lea rcx, ptr [r26+r29*2+0x38] +XDIS 2e62: MISC BASE D53B8D4C6B39 lea rcx, ptr [r27+r29*2+0x39] +XDIS 2e68: MISC BASE D53B8D4C6C3A lea rcx, ptr [r28+r29*2+0x3a] +XDIS 2e6e: MISC BASE D53B8D4C6D3B lea rcx, ptr [r29+r29*2+0x3b] +XDIS 2e74: MISC BASE D53B8D4C6E3C lea rcx, ptr [r30+r29*2+0x3c] +XDIS 2e7a: MISC BASE D53B8D4C6F3D lea rcx, ptr [r31+r29*2+0x3d] +XDIS 2e80: MISC BASE D52A8D4C701F lea rcx, ptr [rax+r30*2+0x1f] +XDIS 2e86: MISC BASE D52A8D4C7120 lea rcx, ptr [rcx+r30*2+0x20] +XDIS 2e8c: MISC BASE D52A8D4C7221 lea rcx, ptr [rdx+r30*2+0x21] +XDIS 2e92: MISC BASE D52A8D4C7322 lea rcx, ptr [rbx+r30*2+0x22] +XDIS 2e98: MISC BASE D52A8D4C7423 lea rcx, ptr [rsp+r30*2+0x23] +XDIS 2e9e: MISC BASE D52A8D4C7524 lea rcx, ptr [rbp+r30*2+0x24] +XDIS 2ea4: MISC BASE D52A8D4C7625 lea rcx, ptr [rsi+r30*2+0x25] +XDIS 2eaa: MISC BASE D52A8D4C7726 lea rcx, ptr [rdi+r30*2+0x26] +XDIS 2eb0: MISC BASE D52B8D4C7027 lea rcx, ptr [r8+r30*2+0x27] +XDIS 2eb6: MISC BASE D52B8D4C7128 lea rcx, ptr [r9+r30*2+0x28] +XDIS 2ebc: MISC BASE D52B8D4C7229 lea rcx, ptr [r10+r30*2+0x29] +XDIS 2ec2: MISC BASE D52B8D4C732A lea rcx, ptr [r11+r30*2+0x2a] +XDIS 2ec8: MISC BASE D52B8D4C742B lea rcx, ptr [r12+r30*2+0x2b] +XDIS 2ece: MISC BASE D52B8D4C752C lea rcx, ptr [r13+r30*2+0x2c] +XDIS 2ed4: MISC BASE D52B8D4C762D lea rcx, ptr [r14+r30*2+0x2d] +XDIS 2eda: MISC BASE D52B8D4C772E lea rcx, ptr [r15+r30*2+0x2e] +XDIS 2ee0: MISC BASE D53A8D4C702F lea rcx, ptr [r16+r30*2+0x2f] +XDIS 2ee6: MISC BASE D53A8D4C7130 lea rcx, ptr [r17+r30*2+0x30] +XDIS 2eec: MISC BASE D53A8D4C7231 lea rcx, ptr [r18+r30*2+0x31] +XDIS 2ef2: MISC BASE D53A8D4C7332 lea rcx, ptr [r19+r30*2+0x32] +XDIS 2ef8: MISC BASE D53A8D4C7433 lea rcx, ptr [r20+r30*2+0x33] +XDIS 2efe: MISC BASE D53A8D4C7534 lea rcx, ptr [r21+r30*2+0x34] +XDIS 2f04: MISC BASE D53A8D4C7635 lea rcx, ptr [r22+r30*2+0x35] +XDIS 2f0a: MISC BASE D53A8D4C7736 lea rcx, ptr [r23+r30*2+0x36] +XDIS 2f10: MISC BASE D53B8D4C7037 lea rcx, ptr [r24+r30*2+0x37] +XDIS 2f16: MISC BASE D53B8D4C7138 lea rcx, ptr [r25+r30*2+0x38] +XDIS 2f1c: MISC BASE D53B8D4C7239 lea rcx, ptr [r26+r30*2+0x39] +XDIS 2f22: MISC BASE D53B8D4C733A lea rcx, ptr [r27+r30*2+0x3a] +XDIS 2f28: MISC BASE D53B8D4C743B lea rcx, ptr [r28+r30*2+0x3b] +XDIS 2f2e: MISC BASE D53B8D4C753C lea rcx, ptr [r29+r30*2+0x3c] +XDIS 2f34: MISC BASE D53B8D4C763D lea rcx, ptr [r30+r30*2+0x3d] +XDIS 2f3a: MISC BASE D53B8D4C773E lea rcx, ptr [r31+r30*2+0x3e] +XDIS 2f40: MISC BASE D52A8D4C7820 lea rcx, ptr [rax+r31*2+0x20] +XDIS 2f46: MISC BASE D52A8D4C7921 lea rcx, ptr [rcx+r31*2+0x21] +XDIS 2f4c: MISC BASE D52A8D4C7A22 lea rcx, ptr [rdx+r31*2+0x22] +XDIS 2f52: MISC BASE D52A8D4C7B23 lea rcx, ptr [rbx+r31*2+0x23] +XDIS 2f58: MISC BASE D52A8D4C7C24 lea rcx, ptr [rsp+r31*2+0x24] +XDIS 2f5e: MISC BASE D52A8D4C7D25 lea rcx, ptr [rbp+r31*2+0x25] +XDIS 2f64: MISC BASE D52A8D4C7E26 lea rcx, ptr [rsi+r31*2+0x26] +XDIS 2f6a: MISC BASE D52A8D4C7F27 lea rcx, ptr [rdi+r31*2+0x27] +XDIS 2f70: MISC BASE D52B8D4C7828 lea rcx, ptr [r8+r31*2+0x28] +XDIS 2f76: MISC BASE D52B8D4C7929 lea rcx, ptr [r9+r31*2+0x29] +XDIS 2f7c: MISC BASE D52B8D4C7A2A lea rcx, ptr [r10+r31*2+0x2a] +XDIS 2f82: MISC BASE D52B8D4C7B2B lea rcx, ptr [r11+r31*2+0x2b] +XDIS 2f88: MISC BASE D52B8D4C7C2C lea rcx, ptr [r12+r31*2+0x2c] +XDIS 2f8e: MISC BASE D52B8D4C7D2D lea rcx, ptr [r13+r31*2+0x2d] +XDIS 2f94: MISC BASE D52B8D4C7E2E lea rcx, ptr [r14+r31*2+0x2e] +XDIS 2f9a: MISC BASE D52B8D4C7F2F lea rcx, ptr [r15+r31*2+0x2f] +XDIS 2fa0: MISC BASE D53A8D4C7830 lea rcx, ptr [r16+r31*2+0x30] +XDIS 2fa6: MISC BASE D53A8D4C7931 lea rcx, ptr [r17+r31*2+0x31] +XDIS 2fac: MISC BASE D53A8D4C7A32 lea rcx, ptr [r18+r31*2+0x32] +XDIS 2fb2: MISC BASE D53A8D4C7B33 lea rcx, ptr [r19+r31*2+0x33] +XDIS 2fb8: MISC BASE D53A8D4C7C34 lea rcx, ptr [r20+r31*2+0x34] +XDIS 2fbe: MISC BASE D53A8D4C7D35 lea rcx, ptr [r21+r31*2+0x35] +XDIS 2fc4: MISC BASE D53A8D4C7E36 lea rcx, ptr [r22+r31*2+0x36] +XDIS 2fca: MISC BASE D53A8D4C7F37 lea rcx, ptr [r23+r31*2+0x37] +XDIS 2fd0: MISC BASE D53B8D4C7838 lea rcx, ptr [r24+r31*2+0x38] +XDIS 2fd6: MISC BASE D53B8D4C7939 lea rcx, ptr [r25+r31*2+0x39] +XDIS 2fdc: MISC BASE D53B8D4C7A3A lea rcx, ptr [r26+r31*2+0x3a] +XDIS 2fe2: MISC BASE D53B8D4C7B3B lea rcx, ptr [r27+r31*2+0x3b] +XDIS 2fe8: MISC BASE D53B8D4C7C3C lea rcx, ptr [r28+r31*2+0x3c] +XDIS 2fee: MISC BASE D53B8D4C7D3D lea rcx, ptr [r29+r31*2+0x3d] +XDIS 2ff4: MISC BASE D53B8D4C7E3E lea rcx, ptr [r30+r31*2+0x3e] +XDIS 2ffa: MISC BASE D53B8D4C7F3F lea rcx, ptr [r31+r31*2+0x3f] +XDIS 3000: MISC BASE D5088D544002 lea rdx, ptr [rax+rax*2+0x2] +XDIS 3006: MISC BASE D5088D544103 lea rdx, ptr [rcx+rax*2+0x3] +XDIS 300c: MISC BASE D5088D544204 lea rdx, ptr [rdx+rax*2+0x4] +XDIS 3012: MISC BASE D5088D544305 lea rdx, ptr [rbx+rax*2+0x5] +XDIS 3018: MISC BASE D5088D544406 lea rdx, ptr [rsp+rax*2+0x6] +XDIS 301e: MISC BASE D5088D544507 lea rdx, ptr [rbp+rax*2+0x7] +XDIS 3024: MISC BASE D5088D544608 lea rdx, ptr [rsi+rax*2+0x8] +XDIS 302a: MISC BASE D5088D544709 lea rdx, ptr [rdi+rax*2+0x9] +XDIS 3030: MISC BASE D5098D54400A lea rdx, ptr [r8+rax*2+0xa] +XDIS 3036: MISC BASE D5098D54410B lea rdx, ptr [r9+rax*2+0xb] +XDIS 303c: MISC BASE D5098D54420C lea rdx, ptr [r10+rax*2+0xc] +XDIS 3042: MISC BASE D5098D54430D lea rdx, ptr [r11+rax*2+0xd] +XDIS 3048: MISC BASE D5098D54440E lea rdx, ptr [r12+rax*2+0xe] +XDIS 304e: MISC BASE D5098D54450F lea rdx, ptr [r13+rax*2+0xf] +XDIS 3054: MISC BASE D5098D544610 lea rdx, ptr [r14+rax*2+0x10] +XDIS 305a: MISC BASE D5098D544711 lea rdx, ptr [r15+rax*2+0x11] +XDIS 3060: MISC BASE D5188D544012 lea rdx, ptr [r16+rax*2+0x12] +XDIS 3066: MISC BASE D5188D544113 lea rdx, ptr [r17+rax*2+0x13] +XDIS 306c: MISC BASE D5188D544214 lea rdx, ptr [r18+rax*2+0x14] +XDIS 3072: MISC BASE D5188D544315 lea rdx, ptr [r19+rax*2+0x15] +XDIS 3078: MISC BASE D5188D544416 lea rdx, ptr [r20+rax*2+0x16] +XDIS 307e: MISC BASE D5188D544517 lea rdx, ptr [r21+rax*2+0x17] +XDIS 3084: MISC BASE D5188D544618 lea rdx, ptr [r22+rax*2+0x18] +XDIS 308a: MISC BASE D5188D544719 lea rdx, ptr [r23+rax*2+0x19] +XDIS 3090: MISC BASE D5198D54401A lea rdx, ptr [r24+rax*2+0x1a] +XDIS 3096: MISC BASE D5198D54411B lea rdx, ptr [r25+rax*2+0x1b] +XDIS 309c: MISC BASE D5198D54421C lea rdx, ptr [r26+rax*2+0x1c] +XDIS 30a2: MISC BASE D5198D54431D lea rdx, ptr [r27+rax*2+0x1d] +XDIS 30a8: MISC BASE D5198D54441E lea rdx, ptr [r28+rax*2+0x1e] +XDIS 30ae: MISC BASE D5198D54451F lea rdx, ptr [r29+rax*2+0x1f] +XDIS 30b4: MISC BASE D5198D544620 lea rdx, ptr [r30+rax*2+0x20] +XDIS 30ba: MISC BASE D5198D544721 lea rdx, ptr [r31+rax*2+0x21] +XDIS 30c0: MISC BASE D5088D544803 lea rdx, ptr [rax+rcx*2+0x3] +XDIS 30c6: MISC BASE D5088D544904 lea rdx, ptr [rcx+rcx*2+0x4] +XDIS 30cc: MISC BASE D5088D544A05 lea rdx, ptr [rdx+rcx*2+0x5] +XDIS 30d2: MISC BASE D5088D544B06 lea rdx, ptr [rbx+rcx*2+0x6] +XDIS 30d8: MISC BASE D5088D544C07 lea rdx, ptr [rsp+rcx*2+0x7] +XDIS 30de: MISC BASE D5088D544D08 lea rdx, ptr [rbp+rcx*2+0x8] +XDIS 30e4: MISC BASE D5088D544E09 lea rdx, ptr [rsi+rcx*2+0x9] +XDIS 30ea: MISC BASE D5088D544F0A lea rdx, ptr [rdi+rcx*2+0xa] +XDIS 30f0: MISC BASE D5098D54480B lea rdx, ptr [r8+rcx*2+0xb] +XDIS 30f6: MISC BASE D5098D54490C lea rdx, ptr [r9+rcx*2+0xc] +XDIS 30fc: MISC BASE D5098D544A0D lea rdx, ptr [r10+rcx*2+0xd] +XDIS 3102: MISC BASE D5098D544B0E lea rdx, ptr [r11+rcx*2+0xe] +XDIS 3108: MISC BASE D5098D544C0F lea rdx, ptr [r12+rcx*2+0xf] +XDIS 310e: MISC BASE D5098D544D10 lea rdx, ptr [r13+rcx*2+0x10] +XDIS 3114: MISC BASE D5098D544E11 lea rdx, ptr [r14+rcx*2+0x11] +XDIS 311a: MISC BASE D5098D544F12 lea rdx, ptr [r15+rcx*2+0x12] +XDIS 3120: MISC BASE D5188D544813 lea rdx, ptr [r16+rcx*2+0x13] +XDIS 3126: MISC BASE D5188D544914 lea rdx, ptr [r17+rcx*2+0x14] +XDIS 312c: MISC BASE D5188D544A15 lea rdx, ptr [r18+rcx*2+0x15] +XDIS 3132: MISC BASE D5188D544B16 lea rdx, ptr [r19+rcx*2+0x16] +XDIS 3138: MISC BASE D5188D544C17 lea rdx, ptr [r20+rcx*2+0x17] +XDIS 313e: MISC BASE D5188D544D18 lea rdx, ptr [r21+rcx*2+0x18] +XDIS 3144: MISC BASE D5188D544E19 lea rdx, ptr [r22+rcx*2+0x19] +XDIS 314a: MISC BASE D5188D544F1A lea rdx, ptr [r23+rcx*2+0x1a] +XDIS 3150: MISC BASE D5198D54481B lea rdx, ptr [r24+rcx*2+0x1b] +XDIS 3156: MISC BASE D5198D54491C lea rdx, ptr [r25+rcx*2+0x1c] +XDIS 315c: MISC BASE D5198D544A1D lea rdx, ptr [r26+rcx*2+0x1d] +XDIS 3162: MISC BASE D5198D544B1E lea rdx, ptr [r27+rcx*2+0x1e] +XDIS 3168: MISC BASE D5198D544C1F lea rdx, ptr [r28+rcx*2+0x1f] +XDIS 316e: MISC BASE D5198D544D20 lea rdx, ptr [r29+rcx*2+0x20] +XDIS 3174: MISC BASE D5198D544E21 lea rdx, ptr [r30+rcx*2+0x21] +XDIS 317a: MISC BASE D5198D544F22 lea rdx, ptr [r31+rcx*2+0x22] +XDIS 3180: MISC BASE D5088D545004 lea rdx, ptr [rax+rdx*2+0x4] +XDIS 3186: MISC BASE D5088D545105 lea rdx, ptr [rcx+rdx*2+0x5] +XDIS 318c: MISC BASE D5088D545206 lea rdx, ptr [rdx+rdx*2+0x6] +XDIS 3192: MISC BASE D5088D545307 lea rdx, ptr [rbx+rdx*2+0x7] +XDIS 3198: MISC BASE D5088D545408 lea rdx, ptr [rsp+rdx*2+0x8] +XDIS 319e: MISC BASE D5088D545509 lea rdx, ptr [rbp+rdx*2+0x9] +XDIS 31a4: MISC BASE D5088D54560A lea rdx, ptr [rsi+rdx*2+0xa] +XDIS 31aa: MISC BASE D5088D54570B lea rdx, ptr [rdi+rdx*2+0xb] +XDIS 31b0: MISC BASE D5098D54500C lea rdx, ptr [r8+rdx*2+0xc] +XDIS 31b6: MISC BASE D5098D54510D lea rdx, ptr [r9+rdx*2+0xd] +XDIS 31bc: MISC BASE D5098D54520E lea rdx, ptr [r10+rdx*2+0xe] +XDIS 31c2: MISC BASE D5098D54530F lea rdx, ptr [r11+rdx*2+0xf] +XDIS 31c8: MISC BASE D5098D545410 lea rdx, ptr [r12+rdx*2+0x10] +XDIS 31ce: MISC BASE D5098D545511 lea rdx, ptr [r13+rdx*2+0x11] +XDIS 31d4: MISC BASE D5098D545612 lea rdx, ptr [r14+rdx*2+0x12] +XDIS 31da: MISC BASE D5098D545713 lea rdx, ptr [r15+rdx*2+0x13] +XDIS 31e0: MISC BASE D5188D545014 lea rdx, ptr [r16+rdx*2+0x14] +XDIS 31e6: MISC BASE D5188D545115 lea rdx, ptr [r17+rdx*2+0x15] +XDIS 31ec: MISC BASE D5188D545216 lea rdx, ptr [r18+rdx*2+0x16] +XDIS 31f2: MISC BASE D5188D545317 lea rdx, ptr [r19+rdx*2+0x17] +XDIS 31f8: MISC BASE D5188D545418 lea rdx, ptr [r20+rdx*2+0x18] +XDIS 31fe: MISC BASE D5188D545519 lea rdx, ptr [r21+rdx*2+0x19] +XDIS 3204: MISC BASE D5188D54561A lea rdx, ptr [r22+rdx*2+0x1a] +XDIS 320a: MISC BASE D5188D54571B lea rdx, ptr [r23+rdx*2+0x1b] +XDIS 3210: MISC BASE D5198D54501C lea rdx, ptr [r24+rdx*2+0x1c] +XDIS 3216: MISC BASE D5198D54511D lea rdx, ptr [r25+rdx*2+0x1d] +XDIS 321c: MISC BASE D5198D54521E lea rdx, ptr [r26+rdx*2+0x1e] +XDIS 3222: MISC BASE D5198D54531F lea rdx, ptr [r27+rdx*2+0x1f] +XDIS 3228: MISC BASE D5198D545420 lea rdx, ptr [r28+rdx*2+0x20] +XDIS 322e: MISC BASE D5198D545521 lea rdx, ptr [r29+rdx*2+0x21] +XDIS 3234: MISC BASE D5198D545622 lea rdx, ptr [r30+rdx*2+0x22] +XDIS 323a: MISC BASE D5198D545723 lea rdx, ptr [r31+rdx*2+0x23] +XDIS 3240: MISC BASE D5088D545805 lea rdx, ptr [rax+rbx*2+0x5] +XDIS 3246: MISC BASE D5088D545906 lea rdx, ptr [rcx+rbx*2+0x6] +XDIS 324c: MISC BASE D5088D545A07 lea rdx, ptr [rdx+rbx*2+0x7] +XDIS 3252: MISC BASE D5088D545B08 lea rdx, ptr [rbx+rbx*2+0x8] +XDIS 3258: MISC BASE D5088D545C09 lea rdx, ptr [rsp+rbx*2+0x9] +XDIS 325e: MISC BASE D5088D545D0A lea rdx, ptr [rbp+rbx*2+0xa] +XDIS 3264: MISC BASE D5088D545E0B lea rdx, ptr [rsi+rbx*2+0xb] +XDIS 326a: MISC BASE D5088D545F0C lea rdx, ptr [rdi+rbx*2+0xc] +XDIS 3270: MISC BASE D5098D54580D lea rdx, ptr [r8+rbx*2+0xd] +XDIS 3276: MISC BASE D5098D54590E lea rdx, ptr [r9+rbx*2+0xe] +XDIS 327c: MISC BASE D5098D545A0F lea rdx, ptr [r10+rbx*2+0xf] +XDIS 3282: MISC BASE D5098D545B10 lea rdx, ptr [r11+rbx*2+0x10] +XDIS 3288: MISC BASE D5098D545C11 lea rdx, ptr [r12+rbx*2+0x11] +XDIS 328e: MISC BASE D5098D545D12 lea rdx, ptr [r13+rbx*2+0x12] +XDIS 3294: MISC BASE D5098D545E13 lea rdx, ptr [r14+rbx*2+0x13] +XDIS 329a: MISC BASE D5098D545F14 lea rdx, ptr [r15+rbx*2+0x14] +XDIS 32a0: MISC BASE D5188D545815 lea rdx, ptr [r16+rbx*2+0x15] +XDIS 32a6: MISC BASE D5188D545916 lea rdx, ptr [r17+rbx*2+0x16] +XDIS 32ac: MISC BASE D5188D545A17 lea rdx, ptr [r18+rbx*2+0x17] +XDIS 32b2: MISC BASE D5188D545B18 lea rdx, ptr [r19+rbx*2+0x18] +XDIS 32b8: MISC BASE D5188D545C19 lea rdx, ptr [r20+rbx*2+0x19] +XDIS 32be: MISC BASE D5188D545D1A lea rdx, ptr [r21+rbx*2+0x1a] +XDIS 32c4: MISC BASE D5188D545E1B lea rdx, ptr [r22+rbx*2+0x1b] +XDIS 32ca: MISC BASE D5188D545F1C lea rdx, ptr [r23+rbx*2+0x1c] +XDIS 32d0: MISC BASE D5198D54581D lea rdx, ptr [r24+rbx*2+0x1d] +XDIS 32d6: MISC BASE D5198D54591E lea rdx, ptr [r25+rbx*2+0x1e] +XDIS 32dc: MISC BASE D5198D545A1F lea rdx, ptr [r26+rbx*2+0x1f] +XDIS 32e2: MISC BASE D5198D545B20 lea rdx, ptr [r27+rbx*2+0x20] +XDIS 32e8: MISC BASE D5198D545C21 lea rdx, ptr [r28+rbx*2+0x21] +XDIS 32ee: MISC BASE D5198D545D22 lea rdx, ptr [r29+rbx*2+0x22] +XDIS 32f4: MISC BASE D5198D545E23 lea rdx, ptr [r30+rbx*2+0x23] +XDIS 32fa: MISC BASE D5198D545F24 lea rdx, ptr [r31+rbx*2+0x24] +XDIS 3300: MISC BASE D5088D546006 lea rdx, ptr [rax+0x6] +XDIS 3306: MISC BASE D5088D546107 lea rdx, ptr [rcx+0x7] +XDIS 330c: MISC BASE D5088D546208 lea rdx, ptr [rdx+0x8] +XDIS 3312: MISC BASE D5088D546309 lea rdx, ptr [rbx+0x9] +XDIS 3318: MISC BASE D5088D54640A lea rdx, ptr [rsp+0xa] +XDIS 331e: MISC BASE D5088D54650B lea rdx, ptr [rbp+0xb] +XDIS 3324: MISC BASE D5088D54660C lea rdx, ptr [rsi+0xc] +XDIS 332a: MISC BASE D5088D54670D lea rdx, ptr [rdi+0xd] +XDIS 3330: MISC BASE D5098D54600E lea rdx, ptr [r8+0xe] +XDIS 3336: MISC BASE D5098D54610F lea rdx, ptr [r9+0xf] +XDIS 333c: MISC BASE D5098D546210 lea rdx, ptr [r10+0x10] +XDIS 3342: MISC BASE D5098D546311 lea rdx, ptr [r11+0x11] +XDIS 3348: MISC BASE D5098D546412 lea rdx, ptr [r12+0x12] +XDIS 334e: MISC BASE D5098D546513 lea rdx, ptr [r13+0x13] +XDIS 3354: MISC BASE D5098D546614 lea rdx, ptr [r14+0x14] +XDIS 335a: MISC BASE D5098D546715 lea rdx, ptr [r15+0x15] +XDIS 3360: MISC BASE D5188D546016 lea rdx, ptr [r16+0x16] +XDIS 3366: MISC BASE D5188D546117 lea rdx, ptr [r17+0x17] +XDIS 336c: MISC BASE D5188D546218 lea rdx, ptr [r18+0x18] +XDIS 3372: MISC BASE D5188D546319 lea rdx, ptr [r19+0x19] +XDIS 3378: MISC BASE D5188D54641A lea rdx, ptr [r20+0x1a] +XDIS 337e: MISC BASE D5188D54651B lea rdx, ptr [r21+0x1b] +XDIS 3384: MISC BASE D5188D54661C lea rdx, ptr [r22+0x1c] +XDIS 338a: MISC BASE D5188D54671D lea rdx, ptr [r23+0x1d] +XDIS 3390: MISC BASE D5198D54601E lea rdx, ptr [r24+0x1e] +XDIS 3396: MISC BASE D5198D54611F lea rdx, ptr [r25+0x1f] +XDIS 339c: MISC BASE D5198D546220 lea rdx, ptr [r26+0x20] +XDIS 33a2: MISC BASE D5198D546321 lea rdx, ptr [r27+0x21] +XDIS 33a8: MISC BASE D5198D546422 lea rdx, ptr [r28+0x22] +XDIS 33ae: MISC BASE D5198D546523 lea rdx, ptr [r29+0x23] +XDIS 33b4: MISC BASE D5198D546624 lea rdx, ptr [r30+0x24] +XDIS 33ba: MISC BASE D5198D546725 lea rdx, ptr [r31+0x25] +XDIS 33c0: MISC BASE D5088D546807 lea rdx, ptr [rax+rbp*2+0x7] +XDIS 33c6: MISC BASE D5088D546908 lea rdx, ptr [rcx+rbp*2+0x8] +XDIS 33cc: MISC BASE D5088D546A09 lea rdx, ptr [rdx+rbp*2+0x9] +XDIS 33d2: MISC BASE D5088D546B0A lea rdx, ptr [rbx+rbp*2+0xa] +XDIS 33d8: MISC BASE D5088D546C0B lea rdx, ptr [rsp+rbp*2+0xb] +XDIS 33de: MISC BASE D5088D546D0C lea rdx, ptr [rbp+rbp*2+0xc] +XDIS 33e4: MISC BASE D5088D546E0D lea rdx, ptr [rsi+rbp*2+0xd] +XDIS 33ea: MISC BASE D5088D546F0E lea rdx, ptr [rdi+rbp*2+0xe] +XDIS 33f0: MISC BASE D5098D54680F lea rdx, ptr [r8+rbp*2+0xf] +XDIS 33f6: MISC BASE D5098D546910 lea rdx, ptr [r9+rbp*2+0x10] +XDIS 33fc: MISC BASE D5098D546A11 lea rdx, ptr [r10+rbp*2+0x11] +XDIS 3402: MISC BASE D5098D546B12 lea rdx, ptr [r11+rbp*2+0x12] +XDIS 3408: MISC BASE D5098D546C13 lea rdx, ptr [r12+rbp*2+0x13] +XDIS 340e: MISC BASE D5098D546D14 lea rdx, ptr [r13+rbp*2+0x14] +XDIS 3414: MISC BASE D5098D546E15 lea rdx, ptr [r14+rbp*2+0x15] +XDIS 341a: MISC BASE D5098D546F16 lea rdx, ptr [r15+rbp*2+0x16] +XDIS 3420: MISC BASE D5188D546817 lea rdx, ptr [r16+rbp*2+0x17] +XDIS 3426: MISC BASE D5188D546918 lea rdx, ptr [r17+rbp*2+0x18] +XDIS 342c: MISC BASE D5188D546A19 lea rdx, ptr [r18+rbp*2+0x19] +XDIS 3432: MISC BASE D5188D546B1A lea rdx, ptr [r19+rbp*2+0x1a] +XDIS 3438: MISC BASE D5188D546C1B lea rdx, ptr [r20+rbp*2+0x1b] +XDIS 343e: MISC BASE D5188D546D1C lea rdx, ptr [r21+rbp*2+0x1c] +XDIS 3444: MISC BASE D5188D546E1D lea rdx, ptr [r22+rbp*2+0x1d] +XDIS 344a: MISC BASE D5188D546F1E lea rdx, ptr [r23+rbp*2+0x1e] +XDIS 3450: MISC BASE D5198D54681F lea rdx, ptr [r24+rbp*2+0x1f] +XDIS 3456: MISC BASE D5198D546920 lea rdx, ptr [r25+rbp*2+0x20] +XDIS 345c: MISC BASE D5198D546A21 lea rdx, ptr [r26+rbp*2+0x21] +XDIS 3462: MISC BASE D5198D546B22 lea rdx, ptr [r27+rbp*2+0x22] +XDIS 3468: MISC BASE D5198D546C23 lea rdx, ptr [r28+rbp*2+0x23] +XDIS 346e: MISC BASE D5198D546D24 lea rdx, ptr [r29+rbp*2+0x24] +XDIS 3474: MISC BASE D5198D546E25 lea rdx, ptr [r30+rbp*2+0x25] +XDIS 347a: MISC BASE D5198D546F26 lea rdx, ptr [r31+rbp*2+0x26] +XDIS 3480: MISC BASE D5088D547008 lea rdx, ptr [rax+rsi*2+0x8] +XDIS 3486: MISC BASE D5088D547109 lea rdx, ptr [rcx+rsi*2+0x9] +XDIS 348c: MISC BASE D5088D54720A lea rdx, ptr [rdx+rsi*2+0xa] +XDIS 3492: MISC BASE D5088D54730B lea rdx, ptr [rbx+rsi*2+0xb] +XDIS 3498: MISC BASE D5088D54740C lea rdx, ptr [rsp+rsi*2+0xc] +XDIS 349e: MISC BASE D5088D54750D lea rdx, ptr [rbp+rsi*2+0xd] +XDIS 34a4: MISC BASE D5088D54760E lea rdx, ptr [rsi+rsi*2+0xe] +XDIS 34aa: MISC BASE D5088D54770F lea rdx, ptr [rdi+rsi*2+0xf] +XDIS 34b0: MISC BASE D5098D547010 lea rdx, ptr [r8+rsi*2+0x10] +XDIS 34b6: MISC BASE D5098D547111 lea rdx, ptr [r9+rsi*2+0x11] +XDIS 34bc: MISC BASE D5098D547212 lea rdx, ptr [r10+rsi*2+0x12] +XDIS 34c2: MISC BASE D5098D547313 lea rdx, ptr [r11+rsi*2+0x13] +XDIS 34c8: MISC BASE D5098D547414 lea rdx, ptr [r12+rsi*2+0x14] +XDIS 34ce: MISC BASE D5098D547515 lea rdx, ptr [r13+rsi*2+0x15] +XDIS 34d4: MISC BASE D5098D547616 lea rdx, ptr [r14+rsi*2+0x16] +XDIS 34da: MISC BASE D5098D547717 lea rdx, ptr [r15+rsi*2+0x17] +XDIS 34e0: MISC BASE D5188D547018 lea rdx, ptr [r16+rsi*2+0x18] +XDIS 34e6: MISC BASE D5188D547119 lea rdx, ptr [r17+rsi*2+0x19] +XDIS 34ec: MISC BASE D5188D54721A lea rdx, ptr [r18+rsi*2+0x1a] +XDIS 34f2: MISC BASE D5188D54731B lea rdx, ptr [r19+rsi*2+0x1b] +XDIS 34f8: MISC BASE D5188D54741C lea rdx, ptr [r20+rsi*2+0x1c] +XDIS 34fe: MISC BASE D5188D54751D lea rdx, ptr [r21+rsi*2+0x1d] +XDIS 3504: MISC BASE D5188D54761E lea rdx, ptr [r22+rsi*2+0x1e] +XDIS 350a: MISC BASE D5188D54771F lea rdx, ptr [r23+rsi*2+0x1f] +XDIS 3510: MISC BASE D5198D547020 lea rdx, ptr [r24+rsi*2+0x20] +XDIS 3516: MISC BASE D5198D547121 lea rdx, ptr [r25+rsi*2+0x21] +XDIS 351c: MISC BASE D5198D547222 lea rdx, ptr [r26+rsi*2+0x22] +XDIS 3522: MISC BASE D5198D547323 lea rdx, ptr [r27+rsi*2+0x23] +XDIS 3528: MISC BASE D5198D547424 lea rdx, ptr [r28+rsi*2+0x24] +XDIS 352e: MISC BASE D5198D547525 lea rdx, ptr [r29+rsi*2+0x25] +XDIS 3534: MISC BASE D5198D547626 lea rdx, ptr [r30+rsi*2+0x26] +XDIS 353a: MISC BASE D5198D547727 lea rdx, ptr [r31+rsi*2+0x27] +XDIS 3540: MISC BASE D5088D547809 lea rdx, ptr [rax+rdi*2+0x9] +XDIS 3546: MISC BASE D5088D54790A lea rdx, ptr [rcx+rdi*2+0xa] +XDIS 354c: MISC BASE D5088D547A0B lea rdx, ptr [rdx+rdi*2+0xb] +XDIS 3552: MISC BASE D5088D547B0C lea rdx, ptr [rbx+rdi*2+0xc] +XDIS 3558: MISC BASE D5088D547C0D lea rdx, ptr [rsp+rdi*2+0xd] +XDIS 355e: MISC BASE D5088D547D0E lea rdx, ptr [rbp+rdi*2+0xe] +XDIS 3564: MISC BASE D5088D547E0F lea rdx, ptr [rsi+rdi*2+0xf] +XDIS 356a: MISC BASE D5088D547F10 lea rdx, ptr [rdi+rdi*2+0x10] +XDIS 3570: MISC BASE D5098D547811 lea rdx, ptr [r8+rdi*2+0x11] +XDIS 3576: MISC BASE D5098D547912 lea rdx, ptr [r9+rdi*2+0x12] +XDIS 357c: MISC BASE D5098D547A13 lea rdx, ptr [r10+rdi*2+0x13] +XDIS 3582: MISC BASE D5098D547B14 lea rdx, ptr [r11+rdi*2+0x14] +XDIS 3588: MISC BASE D5098D547C15 lea rdx, ptr [r12+rdi*2+0x15] +XDIS 358e: MISC BASE D5098D547D16 lea rdx, ptr [r13+rdi*2+0x16] +XDIS 3594: MISC BASE D5098D547E17 lea rdx, ptr [r14+rdi*2+0x17] +XDIS 359a: MISC BASE D5098D547F18 lea rdx, ptr [r15+rdi*2+0x18] +XDIS 35a0: MISC BASE D5188D547819 lea rdx, ptr [r16+rdi*2+0x19] +XDIS 35a6: MISC BASE D5188D54791A lea rdx, ptr [r17+rdi*2+0x1a] +XDIS 35ac: MISC BASE D5188D547A1B lea rdx, ptr [r18+rdi*2+0x1b] +XDIS 35b2: MISC BASE D5188D547B1C lea rdx, ptr [r19+rdi*2+0x1c] +XDIS 35b8: MISC BASE D5188D547C1D lea rdx, ptr [r20+rdi*2+0x1d] +XDIS 35be: MISC BASE D5188D547D1E lea rdx, ptr [r21+rdi*2+0x1e] +XDIS 35c4: MISC BASE D5188D547E1F lea rdx, ptr [r22+rdi*2+0x1f] +XDIS 35ca: MISC BASE D5188D547F20 lea rdx, ptr [r23+rdi*2+0x20] +XDIS 35d0: MISC BASE D5198D547821 lea rdx, ptr [r24+rdi*2+0x21] +XDIS 35d6: MISC BASE D5198D547922 lea rdx, ptr [r25+rdi*2+0x22] +XDIS 35dc: MISC BASE D5198D547A23 lea rdx, ptr [r26+rdi*2+0x23] +XDIS 35e2: MISC BASE D5198D547B24 lea rdx, ptr [r27+rdi*2+0x24] +XDIS 35e8: MISC BASE D5198D547C25 lea rdx, ptr [r28+rdi*2+0x25] +XDIS 35ee: MISC BASE D5198D547D26 lea rdx, ptr [r29+rdi*2+0x26] +XDIS 35f4: MISC BASE D5198D547E27 lea rdx, ptr [r30+rdi*2+0x27] +XDIS 35fa: MISC BASE D5198D547F28 lea rdx, ptr [r31+rdi*2+0x28] +XDIS 3600: MISC BASE D50A8D54400A lea rdx, ptr [rax+r8*2+0xa] +XDIS 3606: MISC BASE D50A8D54410B lea rdx, ptr [rcx+r8*2+0xb] +XDIS 360c: MISC BASE D50A8D54420C lea rdx, ptr [rdx+r8*2+0xc] +XDIS 3612: MISC BASE D50A8D54430D lea rdx, ptr [rbx+r8*2+0xd] +XDIS 3618: MISC BASE D50A8D54440E lea rdx, ptr [rsp+r8*2+0xe] +XDIS 361e: MISC BASE D50A8D54450F lea rdx, ptr [rbp+r8*2+0xf] +XDIS 3624: MISC BASE D50A8D544610 lea rdx, ptr [rsi+r8*2+0x10] +XDIS 362a: MISC BASE D50A8D544711 lea rdx, ptr [rdi+r8*2+0x11] +XDIS 3630: MISC BASE D50B8D544012 lea rdx, ptr [r8+r8*2+0x12] +XDIS 3636: MISC BASE D50B8D544113 lea rdx, ptr [r9+r8*2+0x13] +XDIS 363c: MISC BASE D50B8D544214 lea rdx, ptr [r10+r8*2+0x14] +XDIS 3642: MISC BASE D50B8D544315 lea rdx, ptr [r11+r8*2+0x15] +XDIS 3648: MISC BASE D50B8D544416 lea rdx, ptr [r12+r8*2+0x16] +XDIS 364e: MISC BASE D50B8D544517 lea rdx, ptr [r13+r8*2+0x17] +XDIS 3654: MISC BASE D50B8D544618 lea rdx, ptr [r14+r8*2+0x18] +XDIS 365a: MISC BASE D50B8D544719 lea rdx, ptr [r15+r8*2+0x19] +XDIS 3660: MISC BASE D51A8D54401A lea rdx, ptr [r16+r8*2+0x1a] +XDIS 3666: MISC BASE D51A8D54411B lea rdx, ptr [r17+r8*2+0x1b] +XDIS 366c: MISC BASE D51A8D54421C lea rdx, ptr [r18+r8*2+0x1c] +XDIS 3672: MISC BASE D51A8D54431D lea rdx, ptr [r19+r8*2+0x1d] +XDIS 3678: MISC BASE D51A8D54441E lea rdx, ptr [r20+r8*2+0x1e] +XDIS 367e: MISC BASE D51A8D54451F lea rdx, ptr [r21+r8*2+0x1f] +XDIS 3684: MISC BASE D51A8D544620 lea rdx, ptr [r22+r8*2+0x20] +XDIS 368a: MISC BASE D51A8D544721 lea rdx, ptr [r23+r8*2+0x21] +XDIS 3690: MISC BASE D51B8D544022 lea rdx, ptr [r24+r8*2+0x22] +XDIS 3696: MISC BASE D51B8D544123 lea rdx, ptr [r25+r8*2+0x23] +XDIS 369c: MISC BASE D51B8D544224 lea rdx, ptr [r26+r8*2+0x24] +XDIS 36a2: MISC BASE D51B8D544325 lea rdx, ptr [r27+r8*2+0x25] +XDIS 36a8: MISC BASE D51B8D544426 lea rdx, ptr [r28+r8*2+0x26] +XDIS 36ae: MISC BASE D51B8D544527 lea rdx, ptr [r29+r8*2+0x27] +XDIS 36b4: MISC BASE D51B8D544628 lea rdx, ptr [r30+r8*2+0x28] +XDIS 36ba: MISC BASE D51B8D544729 lea rdx, ptr [r31+r8*2+0x29] +XDIS 36c0: MISC BASE D50A8D54480B lea rdx, ptr [rax+r9*2+0xb] +XDIS 36c6: MISC BASE D50A8D54490C lea rdx, ptr [rcx+r9*2+0xc] +XDIS 36cc: MISC BASE D50A8D544A0D lea rdx, ptr [rdx+r9*2+0xd] +XDIS 36d2: MISC BASE D50A8D544B0E lea rdx, ptr [rbx+r9*2+0xe] +XDIS 36d8: MISC BASE D50A8D544C0F lea rdx, ptr [rsp+r9*2+0xf] +XDIS 36de: MISC BASE D50A8D544D10 lea rdx, ptr [rbp+r9*2+0x10] +XDIS 36e4: MISC BASE D50A8D544E11 lea rdx, ptr [rsi+r9*2+0x11] +XDIS 36ea: MISC BASE D50A8D544F12 lea rdx, ptr [rdi+r9*2+0x12] +XDIS 36f0: MISC BASE D50B8D544813 lea rdx, ptr [r8+r9*2+0x13] +XDIS 36f6: MISC BASE D50B8D544914 lea rdx, ptr [r9+r9*2+0x14] +XDIS 36fc: MISC BASE D50B8D544A15 lea rdx, ptr [r10+r9*2+0x15] +XDIS 3702: MISC BASE D50B8D544B16 lea rdx, ptr [r11+r9*2+0x16] +XDIS 3708: MISC BASE D50B8D544C17 lea rdx, ptr [r12+r9*2+0x17] +XDIS 370e: MISC BASE D50B8D544D18 lea rdx, ptr [r13+r9*2+0x18] +XDIS 3714: MISC BASE D50B8D544E19 lea rdx, ptr [r14+r9*2+0x19] +XDIS 371a: MISC BASE D50B8D544F1A lea rdx, ptr [r15+r9*2+0x1a] +XDIS 3720: MISC BASE D51A8D54481B lea rdx, ptr [r16+r9*2+0x1b] +XDIS 3726: MISC BASE D51A8D54491C lea rdx, ptr [r17+r9*2+0x1c] +XDIS 372c: MISC BASE D51A8D544A1D lea rdx, ptr [r18+r9*2+0x1d] +XDIS 3732: MISC BASE D51A8D544B1E lea rdx, ptr [r19+r9*2+0x1e] +XDIS 3738: MISC BASE D51A8D544C1F lea rdx, ptr [r20+r9*2+0x1f] +XDIS 373e: MISC BASE D51A8D544D20 lea rdx, ptr [r21+r9*2+0x20] +XDIS 3744: MISC BASE D51A8D544E21 lea rdx, ptr [r22+r9*2+0x21] +XDIS 374a: MISC BASE D51A8D544F22 lea rdx, ptr [r23+r9*2+0x22] +XDIS 3750: MISC BASE D51B8D544823 lea rdx, ptr [r24+r9*2+0x23] +XDIS 3756: MISC BASE D51B8D544924 lea rdx, ptr [r25+r9*2+0x24] +XDIS 375c: MISC BASE D51B8D544A25 lea rdx, ptr [r26+r9*2+0x25] +XDIS 3762: MISC BASE D51B8D544B26 lea rdx, ptr [r27+r9*2+0x26] +XDIS 3768: MISC BASE D51B8D544C27 lea rdx, ptr [r28+r9*2+0x27] +XDIS 376e: MISC BASE D51B8D544D28 lea rdx, ptr [r29+r9*2+0x28] +XDIS 3774: MISC BASE D51B8D544E29 lea rdx, ptr [r30+r9*2+0x29] +XDIS 377a: MISC BASE D51B8D544F2A lea rdx, ptr [r31+r9*2+0x2a] +XDIS 3780: MISC BASE D50A8D54500C lea rdx, ptr [rax+r10*2+0xc] +XDIS 3786: MISC BASE D50A8D54510D lea rdx, ptr [rcx+r10*2+0xd] +XDIS 378c: MISC BASE D50A8D54520E lea rdx, ptr [rdx+r10*2+0xe] +XDIS 3792: MISC BASE D50A8D54530F lea rdx, ptr [rbx+r10*2+0xf] +XDIS 3798: MISC BASE D50A8D545410 lea rdx, ptr [rsp+r10*2+0x10] +XDIS 379e: MISC BASE D50A8D545511 lea rdx, ptr [rbp+r10*2+0x11] +XDIS 37a4: MISC BASE D50A8D545612 lea rdx, ptr [rsi+r10*2+0x12] +XDIS 37aa: MISC BASE D50A8D545713 lea rdx, ptr [rdi+r10*2+0x13] +XDIS 37b0: MISC BASE D50B8D545014 lea rdx, ptr [r8+r10*2+0x14] +XDIS 37b6: MISC BASE D50B8D545115 lea rdx, ptr [r9+r10*2+0x15] +XDIS 37bc: MISC BASE D50B8D545216 lea rdx, ptr [r10+r10*2+0x16] +XDIS 37c2: MISC BASE D50B8D545317 lea rdx, ptr [r11+r10*2+0x17] +XDIS 37c8: MISC BASE D50B8D545418 lea rdx, ptr [r12+r10*2+0x18] +XDIS 37ce: MISC BASE D50B8D545519 lea rdx, ptr [r13+r10*2+0x19] +XDIS 37d4: MISC BASE D50B8D54561A lea rdx, ptr [r14+r10*2+0x1a] +XDIS 37da: MISC BASE D50B8D54571B lea rdx, ptr [r15+r10*2+0x1b] +XDIS 37e0: MISC BASE D51A8D54501C lea rdx, ptr [r16+r10*2+0x1c] +XDIS 37e6: MISC BASE D51A8D54511D lea rdx, ptr [r17+r10*2+0x1d] +XDIS 37ec: MISC BASE D51A8D54521E lea rdx, ptr [r18+r10*2+0x1e] +XDIS 37f2: MISC BASE D51A8D54531F lea rdx, ptr [r19+r10*2+0x1f] +XDIS 37f8: MISC BASE D51A8D545420 lea rdx, ptr [r20+r10*2+0x20] +XDIS 37fe: MISC BASE D51A8D545521 lea rdx, ptr [r21+r10*2+0x21] +XDIS 3804: MISC BASE D51A8D545622 lea rdx, ptr [r22+r10*2+0x22] +XDIS 380a: MISC BASE D51A8D545723 lea rdx, ptr [r23+r10*2+0x23] +XDIS 3810: MISC BASE D51B8D545024 lea rdx, ptr [r24+r10*2+0x24] +XDIS 3816: MISC BASE D51B8D545125 lea rdx, ptr [r25+r10*2+0x25] +XDIS 381c: MISC BASE D51B8D545226 lea rdx, ptr [r26+r10*2+0x26] +XDIS 3822: MISC BASE D51B8D545327 lea rdx, ptr [r27+r10*2+0x27] +XDIS 3828: MISC BASE D51B8D545428 lea rdx, ptr [r28+r10*2+0x28] +XDIS 382e: MISC BASE D51B8D545529 lea rdx, ptr [r29+r10*2+0x29] +XDIS 3834: MISC BASE D51B8D54562A lea rdx, ptr [r30+r10*2+0x2a] +XDIS 383a: MISC BASE D51B8D54572B lea rdx, ptr [r31+r10*2+0x2b] +XDIS 3840: MISC BASE D50A8D54580D lea rdx, ptr [rax+r11*2+0xd] +XDIS 3846: MISC BASE D50A8D54590E lea rdx, ptr [rcx+r11*2+0xe] +XDIS 384c: MISC BASE D50A8D545A0F lea rdx, ptr [rdx+r11*2+0xf] +XDIS 3852: MISC BASE D50A8D545B10 lea rdx, ptr [rbx+r11*2+0x10] +XDIS 3858: MISC BASE D50A8D545C11 lea rdx, ptr [rsp+r11*2+0x11] +XDIS 385e: MISC BASE D50A8D545D12 lea rdx, ptr [rbp+r11*2+0x12] +XDIS 3864: MISC BASE D50A8D545E13 lea rdx, ptr [rsi+r11*2+0x13] +XDIS 386a: MISC BASE D50A8D545F14 lea rdx, ptr [rdi+r11*2+0x14] +XDIS 3870: MISC BASE D50B8D545815 lea rdx, ptr [r8+r11*2+0x15] +XDIS 3876: MISC BASE D50B8D545916 lea rdx, ptr [r9+r11*2+0x16] +XDIS 387c: MISC BASE D50B8D545A17 lea rdx, ptr [r10+r11*2+0x17] +XDIS 3882: MISC BASE D50B8D545B18 lea rdx, ptr [r11+r11*2+0x18] +XDIS 3888: MISC BASE D50B8D545C19 lea rdx, ptr [r12+r11*2+0x19] +XDIS 388e: MISC BASE D50B8D545D1A lea rdx, ptr [r13+r11*2+0x1a] +XDIS 3894: MISC BASE D50B8D545E1B lea rdx, ptr [r14+r11*2+0x1b] +XDIS 389a: MISC BASE D50B8D545F1C lea rdx, ptr [r15+r11*2+0x1c] +XDIS 38a0: MISC BASE D51A8D54581D lea rdx, ptr [r16+r11*2+0x1d] +XDIS 38a6: MISC BASE D51A8D54591E lea rdx, ptr [r17+r11*2+0x1e] +XDIS 38ac: MISC BASE D51A8D545A1F lea rdx, ptr [r18+r11*2+0x1f] +XDIS 38b2: MISC BASE D51A8D545B20 lea rdx, ptr [r19+r11*2+0x20] +XDIS 38b8: MISC BASE D51A8D545C21 lea rdx, ptr [r20+r11*2+0x21] +XDIS 38be: MISC BASE D51A8D545D22 lea rdx, ptr [r21+r11*2+0x22] +XDIS 38c4: MISC BASE D51A8D545E23 lea rdx, ptr [r22+r11*2+0x23] +XDIS 38ca: MISC BASE D51A8D545F24 lea rdx, ptr [r23+r11*2+0x24] +XDIS 38d0: MISC BASE D51B8D545825 lea rdx, ptr [r24+r11*2+0x25] +XDIS 38d6: MISC BASE D51B8D545926 lea rdx, ptr [r25+r11*2+0x26] +XDIS 38dc: MISC BASE D51B8D545A27 lea rdx, ptr [r26+r11*2+0x27] +XDIS 38e2: MISC BASE D51B8D545B28 lea rdx, ptr [r27+r11*2+0x28] +XDIS 38e8: MISC BASE D51B8D545C29 lea rdx, ptr [r28+r11*2+0x29] +XDIS 38ee: MISC BASE D51B8D545D2A lea rdx, ptr [r29+r11*2+0x2a] +XDIS 38f4: MISC BASE D51B8D545E2B lea rdx, ptr [r30+r11*2+0x2b] +XDIS 38fa: MISC BASE D51B8D545F2C lea rdx, ptr [r31+r11*2+0x2c] +XDIS 3900: MISC BASE D50A8D54600E lea rdx, ptr [rax+r12*2+0xe] +XDIS 3906: MISC BASE D50A8D54610F lea rdx, ptr [rcx+r12*2+0xf] +XDIS 390c: MISC BASE D50A8D546210 lea rdx, ptr [rdx+r12*2+0x10] +XDIS 3912: MISC BASE D50A8D546311 lea rdx, ptr [rbx+r12*2+0x11] +XDIS 3918: MISC BASE D50A8D546412 lea rdx, ptr [rsp+r12*2+0x12] +XDIS 391e: MISC BASE D50A8D546513 lea rdx, ptr [rbp+r12*2+0x13] +XDIS 3924: MISC BASE D50A8D546614 lea rdx, ptr [rsi+r12*2+0x14] +XDIS 392a: MISC BASE D50A8D546715 lea rdx, ptr [rdi+r12*2+0x15] +XDIS 3930: MISC BASE D50B8D546016 lea rdx, ptr [r8+r12*2+0x16] +XDIS 3936: MISC BASE D50B8D546117 lea rdx, ptr [r9+r12*2+0x17] +XDIS 393c: MISC BASE D50B8D546218 lea rdx, ptr [r10+r12*2+0x18] +XDIS 3942: MISC BASE D50B8D546319 lea rdx, ptr [r11+r12*2+0x19] +XDIS 3948: MISC BASE D50B8D54641A lea rdx, ptr [r12+r12*2+0x1a] +XDIS 394e: MISC BASE D50B8D54651B lea rdx, ptr [r13+r12*2+0x1b] +XDIS 3954: MISC BASE D50B8D54661C lea rdx, ptr [r14+r12*2+0x1c] +XDIS 395a: MISC BASE D50B8D54671D lea rdx, ptr [r15+r12*2+0x1d] +XDIS 3960: MISC BASE D51A8D54601E lea rdx, ptr [r16+r12*2+0x1e] +XDIS 3966: MISC BASE D51A8D54611F lea rdx, ptr [r17+r12*2+0x1f] +XDIS 396c: MISC BASE D51A8D546220 lea rdx, ptr [r18+r12*2+0x20] +XDIS 3972: MISC BASE D51A8D546321 lea rdx, ptr [r19+r12*2+0x21] +XDIS 3978: MISC BASE D51A8D546422 lea rdx, ptr [r20+r12*2+0x22] +XDIS 397e: MISC BASE D51A8D546523 lea rdx, ptr [r21+r12*2+0x23] +XDIS 3984: MISC BASE D51A8D546624 lea rdx, ptr [r22+r12*2+0x24] +XDIS 398a: MISC BASE D51A8D546725 lea rdx, ptr [r23+r12*2+0x25] +XDIS 3990: MISC BASE D51B8D546026 lea rdx, ptr [r24+r12*2+0x26] +XDIS 3996: MISC BASE D51B8D546127 lea rdx, ptr [r25+r12*2+0x27] +XDIS 399c: MISC BASE D51B8D546228 lea rdx, ptr [r26+r12*2+0x28] +XDIS 39a2: MISC BASE D51B8D546329 lea rdx, ptr [r27+r12*2+0x29] +XDIS 39a8: MISC BASE D51B8D54642A lea rdx, ptr [r28+r12*2+0x2a] +XDIS 39ae: MISC BASE D51B8D54652B lea rdx, ptr [r29+r12*2+0x2b] +XDIS 39b4: MISC BASE D51B8D54662C lea rdx, ptr [r30+r12*2+0x2c] +XDIS 39ba: MISC BASE D51B8D54672D lea rdx, ptr [r31+r12*2+0x2d] +XDIS 39c0: MISC BASE D50A8D54680F lea rdx, ptr [rax+r13*2+0xf] +XDIS 39c6: MISC BASE D50A8D546910 lea rdx, ptr [rcx+r13*2+0x10] +XDIS 39cc: MISC BASE D50A8D546A11 lea rdx, ptr [rdx+r13*2+0x11] +XDIS 39d2: MISC BASE D50A8D546B12 lea rdx, ptr [rbx+r13*2+0x12] +XDIS 39d8: MISC BASE D50A8D546C13 lea rdx, ptr [rsp+r13*2+0x13] +XDIS 39de: MISC BASE D50A8D546D14 lea rdx, ptr [rbp+r13*2+0x14] +XDIS 39e4: MISC BASE D50A8D546E15 lea rdx, ptr [rsi+r13*2+0x15] +XDIS 39ea: MISC BASE D50A8D546F16 lea rdx, ptr [rdi+r13*2+0x16] +XDIS 39f0: MISC BASE D50B8D546817 lea rdx, ptr [r8+r13*2+0x17] +XDIS 39f6: MISC BASE D50B8D546918 lea rdx, ptr [r9+r13*2+0x18] +XDIS 39fc: MISC BASE D50B8D546A19 lea rdx, ptr [r10+r13*2+0x19] +XDIS 3a02: MISC BASE D50B8D546B1A lea rdx, ptr [r11+r13*2+0x1a] +XDIS 3a08: MISC BASE D50B8D546C1B lea rdx, ptr [r12+r13*2+0x1b] +XDIS 3a0e: MISC BASE D50B8D546D1C lea rdx, ptr [r13+r13*2+0x1c] +XDIS 3a14: MISC BASE D50B8D546E1D lea rdx, ptr [r14+r13*2+0x1d] +XDIS 3a1a: MISC BASE D50B8D546F1E lea rdx, ptr [r15+r13*2+0x1e] +XDIS 3a20: MISC BASE D51A8D54681F lea rdx, ptr [r16+r13*2+0x1f] +XDIS 3a26: MISC BASE D51A8D546920 lea rdx, ptr [r17+r13*2+0x20] +XDIS 3a2c: MISC BASE D51A8D546A21 lea rdx, ptr [r18+r13*2+0x21] +XDIS 3a32: MISC BASE D51A8D546B22 lea rdx, ptr [r19+r13*2+0x22] +XDIS 3a38: MISC BASE D51A8D546C23 lea rdx, ptr [r20+r13*2+0x23] +XDIS 3a3e: MISC BASE D51A8D546D24 lea rdx, ptr [r21+r13*2+0x24] +XDIS 3a44: MISC BASE D51A8D546E25 lea rdx, ptr [r22+r13*2+0x25] +XDIS 3a4a: MISC BASE D51A8D546F26 lea rdx, ptr [r23+r13*2+0x26] +XDIS 3a50: MISC BASE D51B8D546827 lea rdx, ptr [r24+r13*2+0x27] +XDIS 3a56: MISC BASE D51B8D546928 lea rdx, ptr [r25+r13*2+0x28] +XDIS 3a5c: MISC BASE D51B8D546A29 lea rdx, ptr [r26+r13*2+0x29] +XDIS 3a62: MISC BASE D51B8D546B2A lea rdx, ptr [r27+r13*2+0x2a] +XDIS 3a68: MISC BASE D51B8D546C2B lea rdx, ptr [r28+r13*2+0x2b] +XDIS 3a6e: MISC BASE D51B8D546D2C lea rdx, ptr [r29+r13*2+0x2c] +XDIS 3a74: MISC BASE D51B8D546E2D lea rdx, ptr [r30+r13*2+0x2d] +XDIS 3a7a: MISC BASE D51B8D546F2E lea rdx, ptr [r31+r13*2+0x2e] +XDIS 3a80: MISC BASE D50A8D547010 lea rdx, ptr [rax+r14*2+0x10] +XDIS 3a86: MISC BASE D50A8D547111 lea rdx, ptr [rcx+r14*2+0x11] +XDIS 3a8c: MISC BASE D50A8D547212 lea rdx, ptr [rdx+r14*2+0x12] +XDIS 3a92: MISC BASE D50A8D547313 lea rdx, ptr [rbx+r14*2+0x13] +XDIS 3a98: MISC BASE D50A8D547414 lea rdx, ptr [rsp+r14*2+0x14] +XDIS 3a9e: MISC BASE D50A8D547515 lea rdx, ptr [rbp+r14*2+0x15] +XDIS 3aa4: MISC BASE D50A8D547616 lea rdx, ptr [rsi+r14*2+0x16] +XDIS 3aaa: MISC BASE D50A8D547717 lea rdx, ptr [rdi+r14*2+0x17] +XDIS 3ab0: MISC BASE D50B8D547018 lea rdx, ptr [r8+r14*2+0x18] +XDIS 3ab6: MISC BASE D50B8D547119 lea rdx, ptr [r9+r14*2+0x19] +XDIS 3abc: MISC BASE D50B8D54721A lea rdx, ptr [r10+r14*2+0x1a] +XDIS 3ac2: MISC BASE D50B8D54731B lea rdx, ptr [r11+r14*2+0x1b] +XDIS 3ac8: MISC BASE D50B8D54741C lea rdx, ptr [r12+r14*2+0x1c] +XDIS 3ace: MISC BASE D50B8D54751D lea rdx, ptr [r13+r14*2+0x1d] +XDIS 3ad4: MISC BASE D50B8D54761E lea rdx, ptr [r14+r14*2+0x1e] +XDIS 3ada: MISC BASE D50B8D54771F lea rdx, ptr [r15+r14*2+0x1f] +XDIS 3ae0: MISC BASE D51A8D547020 lea rdx, ptr [r16+r14*2+0x20] +XDIS 3ae6: MISC BASE D51A8D547121 lea rdx, ptr [r17+r14*2+0x21] +XDIS 3aec: MISC BASE D51A8D547222 lea rdx, ptr [r18+r14*2+0x22] +XDIS 3af2: MISC BASE D51A8D547323 lea rdx, ptr [r19+r14*2+0x23] +XDIS 3af8: MISC BASE D51A8D547424 lea rdx, ptr [r20+r14*2+0x24] +XDIS 3afe: MISC BASE D51A8D547525 lea rdx, ptr [r21+r14*2+0x25] +XDIS 3b04: MISC BASE D51A8D547626 lea rdx, ptr [r22+r14*2+0x26] +XDIS 3b0a: MISC BASE D51A8D547727 lea rdx, ptr [r23+r14*2+0x27] +XDIS 3b10: MISC BASE D51B8D547028 lea rdx, ptr [r24+r14*2+0x28] +XDIS 3b16: MISC BASE D51B8D547129 lea rdx, ptr [r25+r14*2+0x29] +XDIS 3b1c: MISC BASE D51B8D54722A lea rdx, ptr [r26+r14*2+0x2a] +XDIS 3b22: MISC BASE D51B8D54732B lea rdx, ptr [r27+r14*2+0x2b] +XDIS 3b28: MISC BASE D51B8D54742C lea rdx, ptr [r28+r14*2+0x2c] +XDIS 3b2e: MISC BASE D51B8D54752D lea rdx, ptr [r29+r14*2+0x2d] +XDIS 3b34: MISC BASE D51B8D54762E lea rdx, ptr [r30+r14*2+0x2e] +XDIS 3b3a: MISC BASE D51B8D54772F lea rdx, ptr [r31+r14*2+0x2f] +XDIS 3b40: MISC BASE D50A8D547811 lea rdx, ptr [rax+r15*2+0x11] +XDIS 3b46: MISC BASE D50A8D547912 lea rdx, ptr [rcx+r15*2+0x12] +XDIS 3b4c: MISC BASE D50A8D547A13 lea rdx, ptr [rdx+r15*2+0x13] +XDIS 3b52: MISC BASE D50A8D547B14 lea rdx, ptr [rbx+r15*2+0x14] +XDIS 3b58: MISC BASE D50A8D547C15 lea rdx, ptr [rsp+r15*2+0x15] +XDIS 3b5e: MISC BASE D50A8D547D16 lea rdx, ptr [rbp+r15*2+0x16] +XDIS 3b64: MISC BASE D50A8D547E17 lea rdx, ptr [rsi+r15*2+0x17] +XDIS 3b6a: MISC BASE D50A8D547F18 lea rdx, ptr [rdi+r15*2+0x18] +XDIS 3b70: MISC BASE D50B8D547819 lea rdx, ptr [r8+r15*2+0x19] +XDIS 3b76: MISC BASE D50B8D54791A lea rdx, ptr [r9+r15*2+0x1a] +XDIS 3b7c: MISC BASE D50B8D547A1B lea rdx, ptr [r10+r15*2+0x1b] +XDIS 3b82: MISC BASE D50B8D547B1C lea rdx, ptr [r11+r15*2+0x1c] +XDIS 3b88: MISC BASE D50B8D547C1D lea rdx, ptr [r12+r15*2+0x1d] +XDIS 3b8e: MISC BASE D50B8D547D1E lea rdx, ptr [r13+r15*2+0x1e] +XDIS 3b94: MISC BASE D50B8D547E1F lea rdx, ptr [r14+r15*2+0x1f] +XDIS 3b9a: MISC BASE D50B8D547F20 lea rdx, ptr [r15+r15*2+0x20] +XDIS 3ba0: MISC BASE D51A8D547821 lea rdx, ptr [r16+r15*2+0x21] +XDIS 3ba6: MISC BASE D51A8D547922 lea rdx, ptr [r17+r15*2+0x22] +XDIS 3bac: MISC BASE D51A8D547A23 lea rdx, ptr [r18+r15*2+0x23] +XDIS 3bb2: MISC BASE D51A8D547B24 lea rdx, ptr [r19+r15*2+0x24] +XDIS 3bb8: MISC BASE D51A8D547C25 lea rdx, ptr [r20+r15*2+0x25] +XDIS 3bbe: MISC BASE D51A8D547D26 lea rdx, ptr [r21+r15*2+0x26] +XDIS 3bc4: MISC BASE D51A8D547E27 lea rdx, ptr [r22+r15*2+0x27] +XDIS 3bca: MISC BASE D51A8D547F28 lea rdx, ptr [r23+r15*2+0x28] +XDIS 3bd0: MISC BASE D51B8D547829 lea rdx, ptr [r24+r15*2+0x29] +XDIS 3bd6: MISC BASE D51B8D54792A lea rdx, ptr [r25+r15*2+0x2a] +XDIS 3bdc: MISC BASE D51B8D547A2B lea rdx, ptr [r26+r15*2+0x2b] +XDIS 3be2: MISC BASE D51B8D547B2C lea rdx, ptr [r27+r15*2+0x2c] +XDIS 3be8: MISC BASE D51B8D547C2D lea rdx, ptr [r28+r15*2+0x2d] +XDIS 3bee: MISC BASE D51B8D547D2E lea rdx, ptr [r29+r15*2+0x2e] +XDIS 3bf4: MISC BASE D51B8D547E2F lea rdx, ptr [r30+r15*2+0x2f] +XDIS 3bfa: MISC BASE D51B8D547F30 lea rdx, ptr [r31+r15*2+0x30] +XDIS 3c00: MISC BASE D5288D544012 lea rdx, ptr [rax+r16*2+0x12] +XDIS 3c06: MISC BASE D5288D544113 lea rdx, ptr [rcx+r16*2+0x13] +XDIS 3c0c: MISC BASE D5288D544214 lea rdx, ptr [rdx+r16*2+0x14] +XDIS 3c12: MISC BASE D5288D544315 lea rdx, ptr [rbx+r16*2+0x15] +XDIS 3c18: MISC BASE D5288D544416 lea rdx, ptr [rsp+r16*2+0x16] +XDIS 3c1e: MISC BASE D5288D544517 lea rdx, ptr [rbp+r16*2+0x17] +XDIS 3c24: MISC BASE D5288D544618 lea rdx, ptr [rsi+r16*2+0x18] +XDIS 3c2a: MISC BASE D5288D544719 lea rdx, ptr [rdi+r16*2+0x19] +XDIS 3c30: MISC BASE D5298D54401A lea rdx, ptr [r8+r16*2+0x1a] +XDIS 3c36: MISC BASE D5298D54411B lea rdx, ptr [r9+r16*2+0x1b] +XDIS 3c3c: MISC BASE D5298D54421C lea rdx, ptr [r10+r16*2+0x1c] +XDIS 3c42: MISC BASE D5298D54431D lea rdx, ptr [r11+r16*2+0x1d] +XDIS 3c48: MISC BASE D5298D54441E lea rdx, ptr [r12+r16*2+0x1e] +XDIS 3c4e: MISC BASE D5298D54451F lea rdx, ptr [r13+r16*2+0x1f] +XDIS 3c54: MISC BASE D5298D544620 lea rdx, ptr [r14+r16*2+0x20] +XDIS 3c5a: MISC BASE D5298D544721 lea rdx, ptr [r15+r16*2+0x21] +XDIS 3c60: MISC BASE D5388D544022 lea rdx, ptr [r16+r16*2+0x22] +XDIS 3c66: MISC BASE D5388D544123 lea rdx, ptr [r17+r16*2+0x23] +XDIS 3c6c: MISC BASE D5388D544224 lea rdx, ptr [r18+r16*2+0x24] +XDIS 3c72: MISC BASE D5388D544325 lea rdx, ptr [r19+r16*2+0x25] +XDIS 3c78: MISC BASE D5388D544426 lea rdx, ptr [r20+r16*2+0x26] +XDIS 3c7e: MISC BASE D5388D544527 lea rdx, ptr [r21+r16*2+0x27] +XDIS 3c84: MISC BASE D5388D544628 lea rdx, ptr [r22+r16*2+0x28] +XDIS 3c8a: MISC BASE D5388D544729 lea rdx, ptr [r23+r16*2+0x29] +XDIS 3c90: MISC BASE D5398D54402A lea rdx, ptr [r24+r16*2+0x2a] +XDIS 3c96: MISC BASE D5398D54412B lea rdx, ptr [r25+r16*2+0x2b] +XDIS 3c9c: MISC BASE D5398D54422C lea rdx, ptr [r26+r16*2+0x2c] +XDIS 3ca2: MISC BASE D5398D54432D lea rdx, ptr [r27+r16*2+0x2d] +XDIS 3ca8: MISC BASE D5398D54442E lea rdx, ptr [r28+r16*2+0x2e] +XDIS 3cae: MISC BASE D5398D54452F lea rdx, ptr [r29+r16*2+0x2f] +XDIS 3cb4: MISC BASE D5398D544630 lea rdx, ptr [r30+r16*2+0x30] +XDIS 3cba: MISC BASE D5398D544731 lea rdx, ptr [r31+r16*2+0x31] +XDIS 3cc0: MISC BASE D5288D544813 lea rdx, ptr [rax+r17*2+0x13] +XDIS 3cc6: MISC BASE D5288D544914 lea rdx, ptr [rcx+r17*2+0x14] +XDIS 3ccc: MISC BASE D5288D544A15 lea rdx, ptr [rdx+r17*2+0x15] +XDIS 3cd2: MISC BASE D5288D544B16 lea rdx, ptr [rbx+r17*2+0x16] +XDIS 3cd8: MISC BASE D5288D544C17 lea rdx, ptr [rsp+r17*2+0x17] +XDIS 3cde: MISC BASE D5288D544D18 lea rdx, ptr [rbp+r17*2+0x18] +XDIS 3ce4: MISC BASE D5288D544E19 lea rdx, ptr [rsi+r17*2+0x19] +XDIS 3cea: MISC BASE D5288D544F1A lea rdx, ptr [rdi+r17*2+0x1a] +XDIS 3cf0: MISC BASE D5298D54481B lea rdx, ptr [r8+r17*2+0x1b] +XDIS 3cf6: MISC BASE D5298D54491C lea rdx, ptr [r9+r17*2+0x1c] +XDIS 3cfc: MISC BASE D5298D544A1D lea rdx, ptr [r10+r17*2+0x1d] +XDIS 3d02: MISC BASE D5298D544B1E lea rdx, ptr [r11+r17*2+0x1e] +XDIS 3d08: MISC BASE D5298D544C1F lea rdx, ptr [r12+r17*2+0x1f] +XDIS 3d0e: MISC BASE D5298D544D20 lea rdx, ptr [r13+r17*2+0x20] +XDIS 3d14: MISC BASE D5298D544E21 lea rdx, ptr [r14+r17*2+0x21] +XDIS 3d1a: MISC BASE D5298D544F22 lea rdx, ptr [r15+r17*2+0x22] +XDIS 3d20: MISC BASE D5388D544823 lea rdx, ptr [r16+r17*2+0x23] +XDIS 3d26: MISC BASE D5388D544924 lea rdx, ptr [r17+r17*2+0x24] +XDIS 3d2c: MISC BASE D5388D544A25 lea rdx, ptr [r18+r17*2+0x25] +XDIS 3d32: MISC BASE D5388D544B26 lea rdx, ptr [r19+r17*2+0x26] +XDIS 3d38: MISC BASE D5388D544C27 lea rdx, ptr [r20+r17*2+0x27] +XDIS 3d3e: MISC BASE D5388D544D28 lea rdx, ptr [r21+r17*2+0x28] +XDIS 3d44: MISC BASE D5388D544E29 lea rdx, ptr [r22+r17*2+0x29] +XDIS 3d4a: MISC BASE D5388D544F2A lea rdx, ptr [r23+r17*2+0x2a] +XDIS 3d50: MISC BASE D5398D54482B lea rdx, ptr [r24+r17*2+0x2b] +XDIS 3d56: MISC BASE D5398D54492C lea rdx, ptr [r25+r17*2+0x2c] +XDIS 3d5c: MISC BASE D5398D544A2D lea rdx, ptr [r26+r17*2+0x2d] +XDIS 3d62: MISC BASE D5398D544B2E lea rdx, ptr [r27+r17*2+0x2e] +XDIS 3d68: MISC BASE D5398D544C2F lea rdx, ptr [r28+r17*2+0x2f] +XDIS 3d6e: MISC BASE D5398D544D30 lea rdx, ptr [r29+r17*2+0x30] +XDIS 3d74: MISC BASE D5398D544E31 lea rdx, ptr [r30+r17*2+0x31] +XDIS 3d7a: MISC BASE D5398D544F32 lea rdx, ptr [r31+r17*2+0x32] +XDIS 3d80: MISC BASE D5288D545014 lea rdx, ptr [rax+r18*2+0x14] +XDIS 3d86: MISC BASE D5288D545115 lea rdx, ptr [rcx+r18*2+0x15] +XDIS 3d8c: MISC BASE D5288D545216 lea rdx, ptr [rdx+r18*2+0x16] +XDIS 3d92: MISC BASE D5288D545317 lea rdx, ptr [rbx+r18*2+0x17] +XDIS 3d98: MISC BASE D5288D545418 lea rdx, ptr [rsp+r18*2+0x18] +XDIS 3d9e: MISC BASE D5288D545519 lea rdx, ptr [rbp+r18*2+0x19] +XDIS 3da4: MISC BASE D5288D54561A lea rdx, ptr [rsi+r18*2+0x1a] +XDIS 3daa: MISC BASE D5288D54571B lea rdx, ptr [rdi+r18*2+0x1b] +XDIS 3db0: MISC BASE D5298D54501C lea rdx, ptr [r8+r18*2+0x1c] +XDIS 3db6: MISC BASE D5298D54511D lea rdx, ptr [r9+r18*2+0x1d] +XDIS 3dbc: MISC BASE D5298D54521E lea rdx, ptr [r10+r18*2+0x1e] +XDIS 3dc2: MISC BASE D5298D54531F lea rdx, ptr [r11+r18*2+0x1f] +XDIS 3dc8: MISC BASE D5298D545420 lea rdx, ptr [r12+r18*2+0x20] +XDIS 3dce: MISC BASE D5298D545521 lea rdx, ptr [r13+r18*2+0x21] +XDIS 3dd4: MISC BASE D5298D545622 lea rdx, ptr [r14+r18*2+0x22] +XDIS 3dda: MISC BASE D5298D545723 lea rdx, ptr [r15+r18*2+0x23] +XDIS 3de0: MISC BASE D5388D545024 lea rdx, ptr [r16+r18*2+0x24] +XDIS 3de6: MISC BASE D5388D545125 lea rdx, ptr [r17+r18*2+0x25] +XDIS 3dec: MISC BASE D5388D545226 lea rdx, ptr [r18+r18*2+0x26] +XDIS 3df2: MISC BASE D5388D545327 lea rdx, ptr [r19+r18*2+0x27] +XDIS 3df8: MISC BASE D5388D545428 lea rdx, ptr [r20+r18*2+0x28] +XDIS 3dfe: MISC BASE D5388D545529 lea rdx, ptr [r21+r18*2+0x29] +XDIS 3e04: MISC BASE D5388D54562A lea rdx, ptr [r22+r18*2+0x2a] +XDIS 3e0a: MISC BASE D5388D54572B lea rdx, ptr [r23+r18*2+0x2b] +XDIS 3e10: MISC BASE D5398D54502C lea rdx, ptr [r24+r18*2+0x2c] +XDIS 3e16: MISC BASE D5398D54512D lea rdx, ptr [r25+r18*2+0x2d] +XDIS 3e1c: MISC BASE D5398D54522E lea rdx, ptr [r26+r18*2+0x2e] +XDIS 3e22: MISC BASE D5398D54532F lea rdx, ptr [r27+r18*2+0x2f] +XDIS 3e28: MISC BASE D5398D545430 lea rdx, ptr [r28+r18*2+0x30] +XDIS 3e2e: MISC BASE D5398D545531 lea rdx, ptr [r29+r18*2+0x31] +XDIS 3e34: MISC BASE D5398D545632 lea rdx, ptr [r30+r18*2+0x32] +XDIS 3e3a: MISC BASE D5398D545733 lea rdx, ptr [r31+r18*2+0x33] +XDIS 3e40: MISC BASE D5288D545815 lea rdx, ptr [rax+r19*2+0x15] +XDIS 3e46: MISC BASE D5288D545916 lea rdx, ptr [rcx+r19*2+0x16] +XDIS 3e4c: MISC BASE D5288D545A17 lea rdx, ptr [rdx+r19*2+0x17] +XDIS 3e52: MISC BASE D5288D545B18 lea rdx, ptr [rbx+r19*2+0x18] +XDIS 3e58: MISC BASE D5288D545C19 lea rdx, ptr [rsp+r19*2+0x19] +XDIS 3e5e: MISC BASE D5288D545D1A lea rdx, ptr [rbp+r19*2+0x1a] +XDIS 3e64: MISC BASE D5288D545E1B lea rdx, ptr [rsi+r19*2+0x1b] +XDIS 3e6a: MISC BASE D5288D545F1C lea rdx, ptr [rdi+r19*2+0x1c] +XDIS 3e70: MISC BASE D5298D54581D lea rdx, ptr [r8+r19*2+0x1d] +XDIS 3e76: MISC BASE D5298D54591E lea rdx, ptr [r9+r19*2+0x1e] +XDIS 3e7c: MISC BASE D5298D545A1F lea rdx, ptr [r10+r19*2+0x1f] +XDIS 3e82: MISC BASE D5298D545B20 lea rdx, ptr [r11+r19*2+0x20] +XDIS 3e88: MISC BASE D5298D545C21 lea rdx, ptr [r12+r19*2+0x21] +XDIS 3e8e: MISC BASE D5298D545D22 lea rdx, ptr [r13+r19*2+0x22] +XDIS 3e94: MISC BASE D5298D545E23 lea rdx, ptr [r14+r19*2+0x23] +XDIS 3e9a: MISC BASE D5298D545F24 lea rdx, ptr [r15+r19*2+0x24] +XDIS 3ea0: MISC BASE D5388D545825 lea rdx, ptr [r16+r19*2+0x25] +XDIS 3ea6: MISC BASE D5388D545926 lea rdx, ptr [r17+r19*2+0x26] +XDIS 3eac: MISC BASE D5388D545A27 lea rdx, ptr [r18+r19*2+0x27] +XDIS 3eb2: MISC BASE D5388D545B28 lea rdx, ptr [r19+r19*2+0x28] +XDIS 3eb8: MISC BASE D5388D545C29 lea rdx, ptr [r20+r19*2+0x29] +XDIS 3ebe: MISC BASE D5388D545D2A lea rdx, ptr [r21+r19*2+0x2a] +XDIS 3ec4: MISC BASE D5388D545E2B lea rdx, ptr [r22+r19*2+0x2b] +XDIS 3eca: MISC BASE D5388D545F2C lea rdx, ptr [r23+r19*2+0x2c] +XDIS 3ed0: MISC BASE D5398D54582D lea rdx, ptr [r24+r19*2+0x2d] +XDIS 3ed6: MISC BASE D5398D54592E lea rdx, ptr [r25+r19*2+0x2e] +XDIS 3edc: MISC BASE D5398D545A2F lea rdx, ptr [r26+r19*2+0x2f] +XDIS 3ee2: MISC BASE D5398D545B30 lea rdx, ptr [r27+r19*2+0x30] +XDIS 3ee8: MISC BASE D5398D545C31 lea rdx, ptr [r28+r19*2+0x31] +XDIS 3eee: MISC BASE D5398D545D32 lea rdx, ptr [r29+r19*2+0x32] +XDIS 3ef4: MISC BASE D5398D545E33 lea rdx, ptr [r30+r19*2+0x33] +XDIS 3efa: MISC BASE D5398D545F34 lea rdx, ptr [r31+r19*2+0x34] +XDIS 3f00: MISC BASE D5288D546016 lea rdx, ptr [rax+r20*2+0x16] +XDIS 3f06: MISC BASE D5288D546117 lea rdx, ptr [rcx+r20*2+0x17] +XDIS 3f0c: MISC BASE D5288D546218 lea rdx, ptr [rdx+r20*2+0x18] +XDIS 3f12: MISC BASE D5288D546319 lea rdx, ptr [rbx+r20*2+0x19] +XDIS 3f18: MISC BASE D5288D54641A lea rdx, ptr [rsp+r20*2+0x1a] +XDIS 3f1e: MISC BASE D5288D54651B lea rdx, ptr [rbp+r20*2+0x1b] +XDIS 3f24: MISC BASE D5288D54661C lea rdx, ptr [rsi+r20*2+0x1c] +XDIS 3f2a: MISC BASE D5288D54671D lea rdx, ptr [rdi+r20*2+0x1d] +XDIS 3f30: MISC BASE D5298D54601E lea rdx, ptr [r8+r20*2+0x1e] +XDIS 3f36: MISC BASE D5298D54611F lea rdx, ptr [r9+r20*2+0x1f] +XDIS 3f3c: MISC BASE D5298D546220 lea rdx, ptr [r10+r20*2+0x20] +XDIS 3f42: MISC BASE D5298D546321 lea rdx, ptr [r11+r20*2+0x21] +XDIS 3f48: MISC BASE D5298D546422 lea rdx, ptr [r12+r20*2+0x22] +XDIS 3f4e: MISC BASE D5298D546523 lea rdx, ptr [r13+r20*2+0x23] +XDIS 3f54: MISC BASE D5298D546624 lea rdx, ptr [r14+r20*2+0x24] +XDIS 3f5a: MISC BASE D5298D546725 lea rdx, ptr [r15+r20*2+0x25] +XDIS 3f60: MISC BASE D5388D546026 lea rdx, ptr [r16+r20*2+0x26] +XDIS 3f66: MISC BASE D5388D546127 lea rdx, ptr [r17+r20*2+0x27] +XDIS 3f6c: MISC BASE D5388D546228 lea rdx, ptr [r18+r20*2+0x28] +XDIS 3f72: MISC BASE D5388D546329 lea rdx, ptr [r19+r20*2+0x29] +XDIS 3f78: MISC BASE D5388D54642A lea rdx, ptr [r20+r20*2+0x2a] +XDIS 3f7e: MISC BASE D5388D54652B lea rdx, ptr [r21+r20*2+0x2b] +XDIS 3f84: MISC BASE D5388D54662C lea rdx, ptr [r22+r20*2+0x2c] +XDIS 3f8a: MISC BASE D5388D54672D lea rdx, ptr [r23+r20*2+0x2d] +XDIS 3f90: MISC BASE D5398D54602E lea rdx, ptr [r24+r20*2+0x2e] +XDIS 3f96: MISC BASE D5398D54612F lea rdx, ptr [r25+r20*2+0x2f] +XDIS 3f9c: MISC BASE D5398D546230 lea rdx, ptr [r26+r20*2+0x30] +XDIS 3fa2: MISC BASE D5398D546331 lea rdx, ptr [r27+r20*2+0x31] +XDIS 3fa8: MISC BASE D5398D546432 lea rdx, ptr [r28+r20*2+0x32] +XDIS 3fae: MISC BASE D5398D546533 lea rdx, ptr [r29+r20*2+0x33] +XDIS 3fb4: MISC BASE D5398D546634 lea rdx, ptr [r30+r20*2+0x34] +XDIS 3fba: MISC BASE D5398D546735 lea rdx, ptr [r31+r20*2+0x35] +XDIS 3fc0: MISC BASE D5288D546817 lea rdx, ptr [rax+r21*2+0x17] +XDIS 3fc6: MISC BASE D5288D546918 lea rdx, ptr [rcx+r21*2+0x18] +XDIS 3fcc: MISC BASE D5288D546A19 lea rdx, ptr [rdx+r21*2+0x19] +XDIS 3fd2: MISC BASE D5288D546B1A lea rdx, ptr [rbx+r21*2+0x1a] +XDIS 3fd8: MISC BASE D5288D546C1B lea rdx, ptr [rsp+r21*2+0x1b] +XDIS 3fde: MISC BASE D5288D546D1C lea rdx, ptr [rbp+r21*2+0x1c] +XDIS 3fe4: MISC BASE D5288D546E1D lea rdx, ptr [rsi+r21*2+0x1d] +XDIS 3fea: MISC BASE D5288D546F1E lea rdx, ptr [rdi+r21*2+0x1e] +XDIS 3ff0: MISC BASE D5298D54681F lea rdx, ptr [r8+r21*2+0x1f] +XDIS 3ff6: MISC BASE D5298D546920 lea rdx, ptr [r9+r21*2+0x20] +XDIS 3ffc: MISC BASE D5298D546A21 lea rdx, ptr [r10+r21*2+0x21] +XDIS 4002: MISC BASE D5298D546B22 lea rdx, ptr [r11+r21*2+0x22] +XDIS 4008: MISC BASE D5298D546C23 lea rdx, ptr [r12+r21*2+0x23] +XDIS 400e: MISC BASE D5298D546D24 lea rdx, ptr [r13+r21*2+0x24] +XDIS 4014: MISC BASE D5298D546E25 lea rdx, ptr [r14+r21*2+0x25] +XDIS 401a: MISC BASE D5298D546F26 lea rdx, ptr [r15+r21*2+0x26] +XDIS 4020: MISC BASE D5388D546827 lea rdx, ptr [r16+r21*2+0x27] +XDIS 4026: MISC BASE D5388D546928 lea rdx, ptr [r17+r21*2+0x28] +XDIS 402c: MISC BASE D5388D546A29 lea rdx, ptr [r18+r21*2+0x29] +XDIS 4032: MISC BASE D5388D546B2A lea rdx, ptr [r19+r21*2+0x2a] +XDIS 4038: MISC BASE D5388D546C2B lea rdx, ptr [r20+r21*2+0x2b] +XDIS 403e: MISC BASE D5388D546D2C lea rdx, ptr [r21+r21*2+0x2c] +XDIS 4044: MISC BASE D5388D546E2D lea rdx, ptr [r22+r21*2+0x2d] +XDIS 404a: MISC BASE D5388D546F2E lea rdx, ptr [r23+r21*2+0x2e] +XDIS 4050: MISC BASE D5398D54682F lea rdx, ptr [r24+r21*2+0x2f] +XDIS 4056: MISC BASE D5398D546930 lea rdx, ptr [r25+r21*2+0x30] +XDIS 405c: MISC BASE D5398D546A31 lea rdx, ptr [r26+r21*2+0x31] +XDIS 4062: MISC BASE D5398D546B32 lea rdx, ptr [r27+r21*2+0x32] +XDIS 4068: MISC BASE D5398D546C33 lea rdx, ptr [r28+r21*2+0x33] +XDIS 406e: MISC BASE D5398D546D34 lea rdx, ptr [r29+r21*2+0x34] +XDIS 4074: MISC BASE D5398D546E35 lea rdx, ptr [r30+r21*2+0x35] +XDIS 407a: MISC BASE D5398D546F36 lea rdx, ptr [r31+r21*2+0x36] +XDIS 4080: MISC BASE D5288D547018 lea rdx, ptr [rax+r22*2+0x18] +XDIS 4086: MISC BASE D5288D547119 lea rdx, ptr [rcx+r22*2+0x19] +XDIS 408c: MISC BASE D5288D54721A lea rdx, ptr [rdx+r22*2+0x1a] +XDIS 4092: MISC BASE D5288D54731B lea rdx, ptr [rbx+r22*2+0x1b] +XDIS 4098: MISC BASE D5288D54741C lea rdx, ptr [rsp+r22*2+0x1c] +XDIS 409e: MISC BASE D5288D54751D lea rdx, ptr [rbp+r22*2+0x1d] +XDIS 40a4: MISC BASE D5288D54761E lea rdx, ptr [rsi+r22*2+0x1e] +XDIS 40aa: MISC BASE D5288D54771F lea rdx, ptr [rdi+r22*2+0x1f] +XDIS 40b0: MISC BASE D5298D547020 lea rdx, ptr [r8+r22*2+0x20] +XDIS 40b6: MISC BASE D5298D547121 lea rdx, ptr [r9+r22*2+0x21] +XDIS 40bc: MISC BASE D5298D547222 lea rdx, ptr [r10+r22*2+0x22] +XDIS 40c2: MISC BASE D5298D547323 lea rdx, ptr [r11+r22*2+0x23] +XDIS 40c8: MISC BASE D5298D547424 lea rdx, ptr [r12+r22*2+0x24] +XDIS 40ce: MISC BASE D5298D547525 lea rdx, ptr [r13+r22*2+0x25] +XDIS 40d4: MISC BASE D5298D547626 lea rdx, ptr [r14+r22*2+0x26] +XDIS 40da: MISC BASE D5298D547727 lea rdx, ptr [r15+r22*2+0x27] +XDIS 40e0: MISC BASE D5388D547028 lea rdx, ptr [r16+r22*2+0x28] +XDIS 40e6: MISC BASE D5388D547129 lea rdx, ptr [r17+r22*2+0x29] +XDIS 40ec: MISC BASE D5388D54722A lea rdx, ptr [r18+r22*2+0x2a] +XDIS 40f2: MISC BASE D5388D54732B lea rdx, ptr [r19+r22*2+0x2b] +XDIS 40f8: MISC BASE D5388D54742C lea rdx, ptr [r20+r22*2+0x2c] +XDIS 40fe: MISC BASE D5388D54752D lea rdx, ptr [r21+r22*2+0x2d] +XDIS 4104: MISC BASE D5388D54762E lea rdx, ptr [r22+r22*2+0x2e] +XDIS 410a: MISC BASE D5388D54772F lea rdx, ptr [r23+r22*2+0x2f] +XDIS 4110: MISC BASE D5398D547030 lea rdx, ptr [r24+r22*2+0x30] +XDIS 4116: MISC BASE D5398D547131 lea rdx, ptr [r25+r22*2+0x31] +XDIS 411c: MISC BASE D5398D547232 lea rdx, ptr [r26+r22*2+0x32] +XDIS 4122: MISC BASE D5398D547333 lea rdx, ptr [r27+r22*2+0x33] +XDIS 4128: MISC BASE D5398D547434 lea rdx, ptr [r28+r22*2+0x34] +XDIS 412e: MISC BASE D5398D547535 lea rdx, ptr [r29+r22*2+0x35] +XDIS 4134: MISC BASE D5398D547636 lea rdx, ptr [r30+r22*2+0x36] +XDIS 413a: MISC BASE D5398D547737 lea rdx, ptr [r31+r22*2+0x37] +XDIS 4140: MISC BASE D5288D547819 lea rdx, ptr [rax+r23*2+0x19] +XDIS 4146: MISC BASE D5288D54791A lea rdx, ptr [rcx+r23*2+0x1a] +XDIS 414c: MISC BASE D5288D547A1B lea rdx, ptr [rdx+r23*2+0x1b] +XDIS 4152: MISC BASE D5288D547B1C lea rdx, ptr [rbx+r23*2+0x1c] +XDIS 4158: MISC BASE D5288D547C1D lea rdx, ptr [rsp+r23*2+0x1d] +XDIS 415e: MISC BASE D5288D547D1E lea rdx, ptr [rbp+r23*2+0x1e] +XDIS 4164: MISC BASE D5288D547E1F lea rdx, ptr [rsi+r23*2+0x1f] +XDIS 416a: MISC BASE D5288D547F20 lea rdx, ptr [rdi+r23*2+0x20] +XDIS 4170: MISC BASE D5298D547821 lea rdx, ptr [r8+r23*2+0x21] +XDIS 4176: MISC BASE D5298D547922 lea rdx, ptr [r9+r23*2+0x22] +XDIS 417c: MISC BASE D5298D547A23 lea rdx, ptr [r10+r23*2+0x23] +XDIS 4182: MISC BASE D5298D547B24 lea rdx, ptr [r11+r23*2+0x24] +XDIS 4188: MISC BASE D5298D547C25 lea rdx, ptr [r12+r23*2+0x25] +XDIS 418e: MISC BASE D5298D547D26 lea rdx, ptr [r13+r23*2+0x26] +XDIS 4194: MISC BASE D5298D547E27 lea rdx, ptr [r14+r23*2+0x27] +XDIS 419a: MISC BASE D5298D547F28 lea rdx, ptr [r15+r23*2+0x28] +XDIS 41a0: MISC BASE D5388D547829 lea rdx, ptr [r16+r23*2+0x29] +XDIS 41a6: MISC BASE D5388D54792A lea rdx, ptr [r17+r23*2+0x2a] +XDIS 41ac: MISC BASE D5388D547A2B lea rdx, ptr [r18+r23*2+0x2b] +XDIS 41b2: MISC BASE D5388D547B2C lea rdx, ptr [r19+r23*2+0x2c] +XDIS 41b8: MISC BASE D5388D547C2D lea rdx, ptr [r20+r23*2+0x2d] +XDIS 41be: MISC BASE D5388D547D2E lea rdx, ptr [r21+r23*2+0x2e] +XDIS 41c4: MISC BASE D5388D547E2F lea rdx, ptr [r22+r23*2+0x2f] +XDIS 41ca: MISC BASE D5388D547F30 lea rdx, ptr [r23+r23*2+0x30] +XDIS 41d0: MISC BASE D5398D547831 lea rdx, ptr [r24+r23*2+0x31] +XDIS 41d6: MISC BASE D5398D547932 lea rdx, ptr [r25+r23*2+0x32] +XDIS 41dc: MISC BASE D5398D547A33 lea rdx, ptr [r26+r23*2+0x33] +XDIS 41e2: MISC BASE D5398D547B34 lea rdx, ptr [r27+r23*2+0x34] +XDIS 41e8: MISC BASE D5398D547C35 lea rdx, ptr [r28+r23*2+0x35] +XDIS 41ee: MISC BASE D5398D547D36 lea rdx, ptr [r29+r23*2+0x36] +XDIS 41f4: MISC BASE D5398D547E37 lea rdx, ptr [r30+r23*2+0x37] +XDIS 41fa: MISC BASE D5398D547F38 lea rdx, ptr [r31+r23*2+0x38] +XDIS 4200: MISC BASE D52A8D54401A lea rdx, ptr [rax+r24*2+0x1a] +XDIS 4206: MISC BASE D52A8D54411B lea rdx, ptr [rcx+r24*2+0x1b] +XDIS 420c: MISC BASE D52A8D54421C lea rdx, ptr [rdx+r24*2+0x1c] +XDIS 4212: MISC BASE D52A8D54431D lea rdx, ptr [rbx+r24*2+0x1d] +XDIS 4218: MISC BASE D52A8D54441E lea rdx, ptr [rsp+r24*2+0x1e] +XDIS 421e: MISC BASE D52A8D54451F lea rdx, ptr [rbp+r24*2+0x1f] +XDIS 4224: MISC BASE D52A8D544620 lea rdx, ptr [rsi+r24*2+0x20] +XDIS 422a: MISC BASE D52A8D544721 lea rdx, ptr [rdi+r24*2+0x21] +XDIS 4230: MISC BASE D52B8D544022 lea rdx, ptr [r8+r24*2+0x22] +XDIS 4236: MISC BASE D52B8D544123 lea rdx, ptr [r9+r24*2+0x23] +XDIS 423c: MISC BASE D52B8D544224 lea rdx, ptr [r10+r24*2+0x24] +XDIS 4242: MISC BASE D52B8D544325 lea rdx, ptr [r11+r24*2+0x25] +XDIS 4248: MISC BASE D52B8D544426 lea rdx, ptr [r12+r24*2+0x26] +XDIS 424e: MISC BASE D52B8D544527 lea rdx, ptr [r13+r24*2+0x27] +XDIS 4254: MISC BASE D52B8D544628 lea rdx, ptr [r14+r24*2+0x28] +XDIS 425a: MISC BASE D52B8D544729 lea rdx, ptr [r15+r24*2+0x29] +XDIS 4260: MISC BASE D53A8D54402A lea rdx, ptr [r16+r24*2+0x2a] +XDIS 4266: MISC BASE D53A8D54412B lea rdx, ptr [r17+r24*2+0x2b] +XDIS 426c: MISC BASE D53A8D54422C lea rdx, ptr [r18+r24*2+0x2c] +XDIS 4272: MISC BASE D53A8D54432D lea rdx, ptr [r19+r24*2+0x2d] +XDIS 4278: MISC BASE D53A8D54442E lea rdx, ptr [r20+r24*2+0x2e] +XDIS 427e: MISC BASE D53A8D54452F lea rdx, ptr [r21+r24*2+0x2f] +XDIS 4284: MISC BASE D53A8D544630 lea rdx, ptr [r22+r24*2+0x30] +XDIS 428a: MISC BASE D53A8D544731 lea rdx, ptr [r23+r24*2+0x31] +XDIS 4290: MISC BASE D53B8D544032 lea rdx, ptr [r24+r24*2+0x32] +XDIS 4296: MISC BASE D53B8D544133 lea rdx, ptr [r25+r24*2+0x33] +XDIS 429c: MISC BASE D53B8D544234 lea rdx, ptr [r26+r24*2+0x34] +XDIS 42a2: MISC BASE D53B8D544335 lea rdx, ptr [r27+r24*2+0x35] +XDIS 42a8: MISC BASE D53B8D544436 lea rdx, ptr [r28+r24*2+0x36] +XDIS 42ae: MISC BASE D53B8D544537 lea rdx, ptr [r29+r24*2+0x37] +XDIS 42b4: MISC BASE D53B8D544638 lea rdx, ptr [r30+r24*2+0x38] +XDIS 42ba: MISC BASE D53B8D544739 lea rdx, ptr [r31+r24*2+0x39] +XDIS 42c0: MISC BASE D52A8D54481B lea rdx, ptr [rax+r25*2+0x1b] +XDIS 42c6: MISC BASE D52A8D54491C lea rdx, ptr [rcx+r25*2+0x1c] +XDIS 42cc: MISC BASE D52A8D544A1D lea rdx, ptr [rdx+r25*2+0x1d] +XDIS 42d2: MISC BASE D52A8D544B1E lea rdx, ptr [rbx+r25*2+0x1e] +XDIS 42d8: MISC BASE D52A8D544C1F lea rdx, ptr [rsp+r25*2+0x1f] +XDIS 42de: MISC BASE D52A8D544D20 lea rdx, ptr [rbp+r25*2+0x20] +XDIS 42e4: MISC BASE D52A8D544E21 lea rdx, ptr [rsi+r25*2+0x21] +XDIS 42ea: MISC BASE D52A8D544F22 lea rdx, ptr [rdi+r25*2+0x22] +XDIS 42f0: MISC BASE D52B8D544823 lea rdx, ptr [r8+r25*2+0x23] +XDIS 42f6: MISC BASE D52B8D544924 lea rdx, ptr [r9+r25*2+0x24] +XDIS 42fc: MISC BASE D52B8D544A25 lea rdx, ptr [r10+r25*2+0x25] +XDIS 4302: MISC BASE D52B8D544B26 lea rdx, ptr [r11+r25*2+0x26] +XDIS 4308: MISC BASE D52B8D544C27 lea rdx, ptr [r12+r25*2+0x27] +XDIS 430e: MISC BASE D52B8D544D28 lea rdx, ptr [r13+r25*2+0x28] +XDIS 4314: MISC BASE D52B8D544E29 lea rdx, ptr [r14+r25*2+0x29] +XDIS 431a: MISC BASE D52B8D544F2A lea rdx, ptr [r15+r25*2+0x2a] +XDIS 4320: MISC BASE D53A8D54482B lea rdx, ptr [r16+r25*2+0x2b] +XDIS 4326: MISC BASE D53A8D54492C lea rdx, ptr [r17+r25*2+0x2c] +XDIS 432c: MISC BASE D53A8D544A2D lea rdx, ptr [r18+r25*2+0x2d] +XDIS 4332: MISC BASE D53A8D544B2E lea rdx, ptr [r19+r25*2+0x2e] +XDIS 4338: MISC BASE D53A8D544C2F lea rdx, ptr [r20+r25*2+0x2f] +XDIS 433e: MISC BASE D53A8D544D30 lea rdx, ptr [r21+r25*2+0x30] +XDIS 4344: MISC BASE D53A8D544E31 lea rdx, ptr [r22+r25*2+0x31] +XDIS 434a: MISC BASE D53A8D544F32 lea rdx, ptr [r23+r25*2+0x32] +XDIS 4350: MISC BASE D53B8D544833 lea rdx, ptr [r24+r25*2+0x33] +XDIS 4356: MISC BASE D53B8D544934 lea rdx, ptr [r25+r25*2+0x34] +XDIS 435c: MISC BASE D53B8D544A35 lea rdx, ptr [r26+r25*2+0x35] +XDIS 4362: MISC BASE D53B8D544B36 lea rdx, ptr [r27+r25*2+0x36] +XDIS 4368: MISC BASE D53B8D544C37 lea rdx, ptr [r28+r25*2+0x37] +XDIS 436e: MISC BASE D53B8D544D38 lea rdx, ptr [r29+r25*2+0x38] +XDIS 4374: MISC BASE D53B8D544E39 lea rdx, ptr [r30+r25*2+0x39] +XDIS 437a: MISC BASE D53B8D544F3A lea rdx, ptr [r31+r25*2+0x3a] +XDIS 4380: MISC BASE D52A8D54501C lea rdx, ptr [rax+r26*2+0x1c] +XDIS 4386: MISC BASE D52A8D54511D lea rdx, ptr [rcx+r26*2+0x1d] +XDIS 438c: MISC BASE D52A8D54521E lea rdx, ptr [rdx+r26*2+0x1e] +XDIS 4392: MISC BASE D52A8D54531F lea rdx, ptr [rbx+r26*2+0x1f] +XDIS 4398: MISC BASE D52A8D545420 lea rdx, ptr [rsp+r26*2+0x20] +XDIS 439e: MISC BASE D52A8D545521 lea rdx, ptr [rbp+r26*2+0x21] +XDIS 43a4: MISC BASE D52A8D545622 lea rdx, ptr [rsi+r26*2+0x22] +XDIS 43aa: MISC BASE D52A8D545723 lea rdx, ptr [rdi+r26*2+0x23] +XDIS 43b0: MISC BASE D52B8D545024 lea rdx, ptr [r8+r26*2+0x24] +XDIS 43b6: MISC BASE D52B8D545125 lea rdx, ptr [r9+r26*2+0x25] +XDIS 43bc: MISC BASE D52B8D545226 lea rdx, ptr [r10+r26*2+0x26] +XDIS 43c2: MISC BASE D52B8D545327 lea rdx, ptr [r11+r26*2+0x27] +XDIS 43c8: MISC BASE D52B8D545428 lea rdx, ptr [r12+r26*2+0x28] +XDIS 43ce: MISC BASE D52B8D545529 lea rdx, ptr [r13+r26*2+0x29] +XDIS 43d4: MISC BASE D52B8D54562A lea rdx, ptr [r14+r26*2+0x2a] +XDIS 43da: MISC BASE D52B8D54572B lea rdx, ptr [r15+r26*2+0x2b] +XDIS 43e0: MISC BASE D53A8D54502C lea rdx, ptr [r16+r26*2+0x2c] +XDIS 43e6: MISC BASE D53A8D54512D lea rdx, ptr [r17+r26*2+0x2d] +XDIS 43ec: MISC BASE D53A8D54522E lea rdx, ptr [r18+r26*2+0x2e] +XDIS 43f2: MISC BASE D53A8D54532F lea rdx, ptr [r19+r26*2+0x2f] +XDIS 43f8: MISC BASE D53A8D545430 lea rdx, ptr [r20+r26*2+0x30] +XDIS 43fe: MISC BASE D53A8D545531 lea rdx, ptr [r21+r26*2+0x31] +XDIS 4404: MISC BASE D53A8D545632 lea rdx, ptr [r22+r26*2+0x32] +XDIS 440a: MISC BASE D53A8D545733 lea rdx, ptr [r23+r26*2+0x33] +XDIS 4410: MISC BASE D53B8D545034 lea rdx, ptr [r24+r26*2+0x34] +XDIS 4416: MISC BASE D53B8D545135 lea rdx, ptr [r25+r26*2+0x35] +XDIS 441c: MISC BASE D53B8D545236 lea rdx, ptr [r26+r26*2+0x36] +XDIS 4422: MISC BASE D53B8D545337 lea rdx, ptr [r27+r26*2+0x37] +XDIS 4428: MISC BASE D53B8D545438 lea rdx, ptr [r28+r26*2+0x38] +XDIS 442e: MISC BASE D53B8D545539 lea rdx, ptr [r29+r26*2+0x39] +XDIS 4434: MISC BASE D53B8D54563A lea rdx, ptr [r30+r26*2+0x3a] +XDIS 443a: MISC BASE D53B8D54573B lea rdx, ptr [r31+r26*2+0x3b] +XDIS 4440: MISC BASE D52A8D54581D lea rdx, ptr [rax+r27*2+0x1d] +XDIS 4446: MISC BASE D52A8D54591E lea rdx, ptr [rcx+r27*2+0x1e] +XDIS 444c: MISC BASE D52A8D545A1F lea rdx, ptr [rdx+r27*2+0x1f] +XDIS 4452: MISC BASE D52A8D545B20 lea rdx, ptr [rbx+r27*2+0x20] +XDIS 4458: MISC BASE D52A8D545C21 lea rdx, ptr [rsp+r27*2+0x21] +XDIS 445e: MISC BASE D52A8D545D22 lea rdx, ptr [rbp+r27*2+0x22] +XDIS 4464: MISC BASE D52A8D545E23 lea rdx, ptr [rsi+r27*2+0x23] +XDIS 446a: MISC BASE D52A8D545F24 lea rdx, ptr [rdi+r27*2+0x24] +XDIS 4470: MISC BASE D52B8D545825 lea rdx, ptr [r8+r27*2+0x25] +XDIS 4476: MISC BASE D52B8D545926 lea rdx, ptr [r9+r27*2+0x26] +XDIS 447c: MISC BASE D52B8D545A27 lea rdx, ptr [r10+r27*2+0x27] +XDIS 4482: MISC BASE D52B8D545B28 lea rdx, ptr [r11+r27*2+0x28] +XDIS 4488: MISC BASE D52B8D545C29 lea rdx, ptr [r12+r27*2+0x29] +XDIS 448e: MISC BASE D52B8D545D2A lea rdx, ptr [r13+r27*2+0x2a] +XDIS 4494: MISC BASE D52B8D545E2B lea rdx, ptr [r14+r27*2+0x2b] +XDIS 449a: MISC BASE D52B8D545F2C lea rdx, ptr [r15+r27*2+0x2c] +XDIS 44a0: MISC BASE D53A8D54582D lea rdx, ptr [r16+r27*2+0x2d] +XDIS 44a6: MISC BASE D53A8D54592E lea rdx, ptr [r17+r27*2+0x2e] +XDIS 44ac: MISC BASE D53A8D545A2F lea rdx, ptr [r18+r27*2+0x2f] +XDIS 44b2: MISC BASE D53A8D545B30 lea rdx, ptr [r19+r27*2+0x30] +XDIS 44b8: MISC BASE D53A8D545C31 lea rdx, ptr [r20+r27*2+0x31] +XDIS 44be: MISC BASE D53A8D545D32 lea rdx, ptr [r21+r27*2+0x32] +XDIS 44c4: MISC BASE D53A8D545E33 lea rdx, ptr [r22+r27*2+0x33] +XDIS 44ca: MISC BASE D53A8D545F34 lea rdx, ptr [r23+r27*2+0x34] +XDIS 44d0: MISC BASE D53B8D545835 lea rdx, ptr [r24+r27*2+0x35] +XDIS 44d6: MISC BASE D53B8D545936 lea rdx, ptr [r25+r27*2+0x36] +XDIS 44dc: MISC BASE D53B8D545A37 lea rdx, ptr [r26+r27*2+0x37] +XDIS 44e2: MISC BASE D53B8D545B38 lea rdx, ptr [r27+r27*2+0x38] +XDIS 44e8: MISC BASE D53B8D545C39 lea rdx, ptr [r28+r27*2+0x39] +XDIS 44ee: MISC BASE D53B8D545D3A lea rdx, ptr [r29+r27*2+0x3a] +XDIS 44f4: MISC BASE D53B8D545E3B lea rdx, ptr [r30+r27*2+0x3b] +XDIS 44fa: MISC BASE D53B8D545F3C lea rdx, ptr [r31+r27*2+0x3c] +XDIS 4500: MISC BASE D52A8D54601E lea rdx, ptr [rax+r28*2+0x1e] +XDIS 4506: MISC BASE D52A8D54611F lea rdx, ptr [rcx+r28*2+0x1f] +XDIS 450c: MISC BASE D52A8D546220 lea rdx, ptr [rdx+r28*2+0x20] +XDIS 4512: MISC BASE D52A8D546321 lea rdx, ptr [rbx+r28*2+0x21] +XDIS 4518: MISC BASE D52A8D546422 lea rdx, ptr [rsp+r28*2+0x22] +XDIS 451e: MISC BASE D52A8D546523 lea rdx, ptr [rbp+r28*2+0x23] +XDIS 4524: MISC BASE D52A8D546624 lea rdx, ptr [rsi+r28*2+0x24] +XDIS 452a: MISC BASE D52A8D546725 lea rdx, ptr [rdi+r28*2+0x25] +XDIS 4530: MISC BASE D52B8D546026 lea rdx, ptr [r8+r28*2+0x26] +XDIS 4536: MISC BASE D52B8D546127 lea rdx, ptr [r9+r28*2+0x27] +XDIS 453c: MISC BASE D52B8D546228 lea rdx, ptr [r10+r28*2+0x28] +XDIS 4542: MISC BASE D52B8D546329 lea rdx, ptr [r11+r28*2+0x29] +XDIS 4548: MISC BASE D52B8D54642A lea rdx, ptr [r12+r28*2+0x2a] +XDIS 454e: MISC BASE D52B8D54652B lea rdx, ptr [r13+r28*2+0x2b] +XDIS 4554: MISC BASE D52B8D54662C lea rdx, ptr [r14+r28*2+0x2c] +XDIS 455a: MISC BASE D52B8D54672D lea rdx, ptr [r15+r28*2+0x2d] +XDIS 4560: MISC BASE D53A8D54602E lea rdx, ptr [r16+r28*2+0x2e] +XDIS 4566: MISC BASE D53A8D54612F lea rdx, ptr [r17+r28*2+0x2f] +XDIS 456c: MISC BASE D53A8D546230 lea rdx, ptr [r18+r28*2+0x30] +XDIS 4572: MISC BASE D53A8D546331 lea rdx, ptr [r19+r28*2+0x31] +XDIS 4578: MISC BASE D53A8D546432 lea rdx, ptr [r20+r28*2+0x32] +XDIS 457e: MISC BASE D53A8D546533 lea rdx, ptr [r21+r28*2+0x33] +XDIS 4584: MISC BASE D53A8D546634 lea rdx, ptr [r22+r28*2+0x34] +XDIS 458a: MISC BASE D53A8D546735 lea rdx, ptr [r23+r28*2+0x35] +XDIS 4590: MISC BASE D53B8D546036 lea rdx, ptr [r24+r28*2+0x36] +XDIS 4596: MISC BASE D53B8D546137 lea rdx, ptr [r25+r28*2+0x37] +XDIS 459c: MISC BASE D53B8D546238 lea rdx, ptr [r26+r28*2+0x38] +XDIS 45a2: MISC BASE D53B8D546339 lea rdx, ptr [r27+r28*2+0x39] +XDIS 45a8: MISC BASE D53B8D54643A lea rdx, ptr [r28+r28*2+0x3a] +XDIS 45ae: MISC BASE D53B8D54653B lea rdx, ptr [r29+r28*2+0x3b] +XDIS 45b4: MISC BASE D53B8D54663C lea rdx, ptr [r30+r28*2+0x3c] +XDIS 45ba: MISC BASE D53B8D54673D lea rdx, ptr [r31+r28*2+0x3d] +XDIS 45c0: MISC BASE D52A8D54681F lea rdx, ptr [rax+r29*2+0x1f] +XDIS 45c6: MISC BASE D52A8D546920 lea rdx, ptr [rcx+r29*2+0x20] +XDIS 45cc: MISC BASE D52A8D546A21 lea rdx, ptr [rdx+r29*2+0x21] +XDIS 45d2: MISC BASE D52A8D546B22 lea rdx, ptr [rbx+r29*2+0x22] +XDIS 45d8: MISC BASE D52A8D546C23 lea rdx, ptr [rsp+r29*2+0x23] +XDIS 45de: MISC BASE D52A8D546D24 lea rdx, ptr [rbp+r29*2+0x24] +XDIS 45e4: MISC BASE D52A8D546E25 lea rdx, ptr [rsi+r29*2+0x25] +XDIS 45ea: MISC BASE D52A8D546F26 lea rdx, ptr [rdi+r29*2+0x26] +XDIS 45f0: MISC BASE D52B8D546827 lea rdx, ptr [r8+r29*2+0x27] +XDIS 45f6: MISC BASE D52B8D546928 lea rdx, ptr [r9+r29*2+0x28] +XDIS 45fc: MISC BASE D52B8D546A29 lea rdx, ptr [r10+r29*2+0x29] +XDIS 4602: MISC BASE D52B8D546B2A lea rdx, ptr [r11+r29*2+0x2a] +XDIS 4608: MISC BASE D52B8D546C2B lea rdx, ptr [r12+r29*2+0x2b] +XDIS 460e: MISC BASE D52B8D546D2C lea rdx, ptr [r13+r29*2+0x2c] +XDIS 4614: MISC BASE D52B8D546E2D lea rdx, ptr [r14+r29*2+0x2d] +XDIS 461a: MISC BASE D52B8D546F2E lea rdx, ptr [r15+r29*2+0x2e] +XDIS 4620: MISC BASE D53A8D54682F lea rdx, ptr [r16+r29*2+0x2f] +XDIS 4626: MISC BASE D53A8D546930 lea rdx, ptr [r17+r29*2+0x30] +XDIS 462c: MISC BASE D53A8D546A31 lea rdx, ptr [r18+r29*2+0x31] +XDIS 4632: MISC BASE D53A8D546B32 lea rdx, ptr [r19+r29*2+0x32] +XDIS 4638: MISC BASE D53A8D546C33 lea rdx, ptr [r20+r29*2+0x33] +XDIS 463e: MISC BASE D53A8D546D34 lea rdx, ptr [r21+r29*2+0x34] +XDIS 4644: MISC BASE D53A8D546E35 lea rdx, ptr [r22+r29*2+0x35] +XDIS 464a: MISC BASE D53A8D546F36 lea rdx, ptr [r23+r29*2+0x36] +XDIS 4650: MISC BASE D53B8D546837 lea rdx, ptr [r24+r29*2+0x37] +XDIS 4656: MISC BASE D53B8D546938 lea rdx, ptr [r25+r29*2+0x38] +XDIS 465c: MISC BASE D53B8D546A39 lea rdx, ptr [r26+r29*2+0x39] +XDIS 4662: MISC BASE D53B8D546B3A lea rdx, ptr [r27+r29*2+0x3a] +XDIS 4668: MISC BASE D53B8D546C3B lea rdx, ptr [r28+r29*2+0x3b] +XDIS 466e: MISC BASE D53B8D546D3C lea rdx, ptr [r29+r29*2+0x3c] +XDIS 4674: MISC BASE D53B8D546E3D lea rdx, ptr [r30+r29*2+0x3d] +XDIS 467a: MISC BASE D53B8D546F3E lea rdx, ptr [r31+r29*2+0x3e] +XDIS 4680: MISC BASE D52A8D547020 lea rdx, ptr [rax+r30*2+0x20] +XDIS 4686: MISC BASE D52A8D547121 lea rdx, ptr [rcx+r30*2+0x21] +XDIS 468c: MISC BASE D52A8D547222 lea rdx, ptr [rdx+r30*2+0x22] +XDIS 4692: MISC BASE D52A8D547323 lea rdx, ptr [rbx+r30*2+0x23] +XDIS 4698: MISC BASE D52A8D547424 lea rdx, ptr [rsp+r30*2+0x24] +XDIS 469e: MISC BASE D52A8D547525 lea rdx, ptr [rbp+r30*2+0x25] +XDIS 46a4: MISC BASE D52A8D547626 lea rdx, ptr [rsi+r30*2+0x26] +XDIS 46aa: MISC BASE D52A8D547727 lea rdx, ptr [rdi+r30*2+0x27] +XDIS 46b0: MISC BASE D52B8D547028 lea rdx, ptr [r8+r30*2+0x28] +XDIS 46b6: MISC BASE D52B8D547129 lea rdx, ptr [r9+r30*2+0x29] +XDIS 46bc: MISC BASE D52B8D54722A lea rdx, ptr [r10+r30*2+0x2a] +XDIS 46c2: MISC BASE D52B8D54732B lea rdx, ptr [r11+r30*2+0x2b] +XDIS 46c8: MISC BASE D52B8D54742C lea rdx, ptr [r12+r30*2+0x2c] +XDIS 46ce: MISC BASE D52B8D54752D lea rdx, ptr [r13+r30*2+0x2d] +XDIS 46d4: MISC BASE D52B8D54762E lea rdx, ptr [r14+r30*2+0x2e] +XDIS 46da: MISC BASE D52B8D54772F lea rdx, ptr [r15+r30*2+0x2f] +XDIS 46e0: MISC BASE D53A8D547030 lea rdx, ptr [r16+r30*2+0x30] +XDIS 46e6: MISC BASE D53A8D547131 lea rdx, ptr [r17+r30*2+0x31] +XDIS 46ec: MISC BASE D53A8D547232 lea rdx, ptr [r18+r30*2+0x32] +XDIS 46f2: MISC BASE D53A8D547333 lea rdx, ptr [r19+r30*2+0x33] +XDIS 46f8: MISC BASE D53A8D547434 lea rdx, ptr [r20+r30*2+0x34] +XDIS 46fe: MISC BASE D53A8D547535 lea rdx, ptr [r21+r30*2+0x35] +XDIS 4704: MISC BASE D53A8D547636 lea rdx, ptr [r22+r30*2+0x36] +XDIS 470a: MISC BASE D53A8D547737 lea rdx, ptr [r23+r30*2+0x37] +XDIS 4710: MISC BASE D53B8D547038 lea rdx, ptr [r24+r30*2+0x38] +XDIS 4716: MISC BASE D53B8D547139 lea rdx, ptr [r25+r30*2+0x39] +XDIS 471c: MISC BASE D53B8D54723A lea rdx, ptr [r26+r30*2+0x3a] +XDIS 4722: MISC BASE D53B8D54733B lea rdx, ptr [r27+r30*2+0x3b] +XDIS 4728: MISC BASE D53B8D54743C lea rdx, ptr [r28+r30*2+0x3c] +XDIS 472e: MISC BASE D53B8D54753D lea rdx, ptr [r29+r30*2+0x3d] +XDIS 4734: MISC BASE D53B8D54763E lea rdx, ptr [r30+r30*2+0x3e] +XDIS 473a: MISC BASE D53B8D54773F lea rdx, ptr [r31+r30*2+0x3f] +XDIS 4740: MISC BASE D52A8D547821 lea rdx, ptr [rax+r31*2+0x21] +XDIS 4746: MISC BASE D52A8D547922 lea rdx, ptr [rcx+r31*2+0x22] +XDIS 474c: MISC BASE D52A8D547A23 lea rdx, ptr [rdx+r31*2+0x23] +XDIS 4752: MISC BASE D52A8D547B24 lea rdx, ptr [rbx+r31*2+0x24] +XDIS 4758: MISC BASE D52A8D547C25 lea rdx, ptr [rsp+r31*2+0x25] +XDIS 475e: MISC BASE D52A8D547D26 lea rdx, ptr [rbp+r31*2+0x26] +XDIS 4764: MISC BASE D52A8D547E27 lea rdx, ptr [rsi+r31*2+0x27] +XDIS 476a: MISC BASE D52A8D547F28 lea rdx, ptr [rdi+r31*2+0x28] +XDIS 4770: MISC BASE D52B8D547829 lea rdx, ptr [r8+r31*2+0x29] +XDIS 4776: MISC BASE D52B8D54792A lea rdx, ptr [r9+r31*2+0x2a] +XDIS 477c: MISC BASE D52B8D547A2B lea rdx, ptr [r10+r31*2+0x2b] +XDIS 4782: MISC BASE D52B8D547B2C lea rdx, ptr [r11+r31*2+0x2c] +XDIS 4788: MISC BASE D52B8D547C2D lea rdx, ptr [r12+r31*2+0x2d] +XDIS 478e: MISC BASE D52B8D547D2E lea rdx, ptr [r13+r31*2+0x2e] +XDIS 4794: MISC BASE D52B8D547E2F lea rdx, ptr [r14+r31*2+0x2f] +XDIS 479a: MISC BASE D52B8D547F30 lea rdx, ptr [r15+r31*2+0x30] +XDIS 47a0: MISC BASE D53A8D547831 lea rdx, ptr [r16+r31*2+0x31] +XDIS 47a6: MISC BASE D53A8D547932 lea rdx, ptr [r17+r31*2+0x32] +XDIS 47ac: MISC BASE D53A8D547A33 lea rdx, ptr [r18+r31*2+0x33] +XDIS 47b2: MISC BASE D53A8D547B34 lea rdx, ptr [r19+r31*2+0x34] +XDIS 47b8: MISC BASE D53A8D547C35 lea rdx, ptr [r20+r31*2+0x35] +XDIS 47be: MISC BASE D53A8D547D36 lea rdx, ptr [r21+r31*2+0x36] +XDIS 47c4: MISC BASE D53A8D547E37 lea rdx, ptr [r22+r31*2+0x37] +XDIS 47ca: MISC BASE D53A8D547F38 lea rdx, ptr [r23+r31*2+0x38] +XDIS 47d0: MISC BASE D53B8D547839 lea rdx, ptr [r24+r31*2+0x39] +XDIS 47d6: MISC BASE D53B8D54793A lea rdx, ptr [r25+r31*2+0x3a] +XDIS 47dc: MISC BASE D53B8D547A3B lea rdx, ptr [r26+r31*2+0x3b] +XDIS 47e2: MISC BASE D53B8D547B3C lea rdx, ptr [r27+r31*2+0x3c] +XDIS 47e8: MISC BASE D53B8D547C3D lea rdx, ptr [r28+r31*2+0x3d] +XDIS 47ee: MISC BASE D53B8D547D3E lea rdx, ptr [r29+r31*2+0x3e] +XDIS 47f4: MISC BASE D53B8D547E3F lea rdx, ptr [r30+r31*2+0x3f] +XDIS 47fa: MISC BASE D53B8D547F40 lea rdx, ptr [r31+r31*2+0x40] +XDIS 4800: MISC BASE D5088D5C4003 lea rbx, ptr [rax+rax*2+0x3] +XDIS 4806: MISC BASE D5088D5C4104 lea rbx, ptr [rcx+rax*2+0x4] +XDIS 480c: MISC BASE D5088D5C4205 lea rbx, ptr [rdx+rax*2+0x5] +XDIS 4812: MISC BASE D5088D5C4306 lea rbx, ptr [rbx+rax*2+0x6] +XDIS 4818: MISC BASE D5088D5C4407 lea rbx, ptr [rsp+rax*2+0x7] +XDIS 481e: MISC BASE D5088D5C4508 lea rbx, ptr [rbp+rax*2+0x8] +XDIS 4824: MISC BASE D5088D5C4609 lea rbx, ptr [rsi+rax*2+0x9] +XDIS 482a: MISC BASE D5088D5C470A lea rbx, ptr [rdi+rax*2+0xa] +XDIS 4830: MISC BASE D5098D5C400B lea rbx, ptr [r8+rax*2+0xb] +XDIS 4836: MISC BASE D5098D5C410C lea rbx, ptr [r9+rax*2+0xc] +XDIS 483c: MISC BASE D5098D5C420D lea rbx, ptr [r10+rax*2+0xd] +XDIS 4842: MISC BASE D5098D5C430E lea rbx, ptr [r11+rax*2+0xe] +XDIS 4848: MISC BASE D5098D5C440F lea rbx, ptr [r12+rax*2+0xf] +XDIS 484e: MISC BASE D5098D5C4510 lea rbx, ptr [r13+rax*2+0x10] +XDIS 4854: MISC BASE D5098D5C4611 lea rbx, ptr [r14+rax*2+0x11] +XDIS 485a: MISC BASE D5098D5C4712 lea rbx, ptr [r15+rax*2+0x12] +XDIS 4860: MISC BASE D5188D5C4013 lea rbx, ptr [r16+rax*2+0x13] +XDIS 4866: MISC BASE D5188D5C4114 lea rbx, ptr [r17+rax*2+0x14] +XDIS 486c: MISC BASE D5188D5C4215 lea rbx, ptr [r18+rax*2+0x15] +XDIS 4872: MISC BASE D5188D5C4316 lea rbx, ptr [r19+rax*2+0x16] +XDIS 4878: MISC BASE D5188D5C4417 lea rbx, ptr [r20+rax*2+0x17] +XDIS 487e: MISC BASE D5188D5C4518 lea rbx, ptr [r21+rax*2+0x18] +XDIS 4884: MISC BASE D5188D5C4619 lea rbx, ptr [r22+rax*2+0x19] +XDIS 488a: MISC BASE D5188D5C471A lea rbx, ptr [r23+rax*2+0x1a] +XDIS 4890: MISC BASE D5198D5C401B lea rbx, ptr [r24+rax*2+0x1b] +XDIS 4896: MISC BASE D5198D5C411C lea rbx, ptr [r25+rax*2+0x1c] +XDIS 489c: MISC BASE D5198D5C421D lea rbx, ptr [r26+rax*2+0x1d] +XDIS 48a2: MISC BASE D5198D5C431E lea rbx, ptr [r27+rax*2+0x1e] +XDIS 48a8: MISC BASE D5198D5C441F lea rbx, ptr [r28+rax*2+0x1f] +XDIS 48ae: MISC BASE D5198D5C4520 lea rbx, ptr [r29+rax*2+0x20] +XDIS 48b4: MISC BASE D5198D5C4621 lea rbx, ptr [r30+rax*2+0x21] +XDIS 48ba: MISC BASE D5198D5C4722 lea rbx, ptr [r31+rax*2+0x22] +XDIS 48c0: MISC BASE D5088D5C4804 lea rbx, ptr [rax+rcx*2+0x4] +XDIS 48c6: MISC BASE D5088D5C4905 lea rbx, ptr [rcx+rcx*2+0x5] +XDIS 48cc: MISC BASE D5088D5C4A06 lea rbx, ptr [rdx+rcx*2+0x6] +XDIS 48d2: MISC BASE D5088D5C4B07 lea rbx, ptr [rbx+rcx*2+0x7] +XDIS 48d8: MISC BASE D5088D5C4C08 lea rbx, ptr [rsp+rcx*2+0x8] +XDIS 48de: MISC BASE D5088D5C4D09 lea rbx, ptr [rbp+rcx*2+0x9] +XDIS 48e4: MISC BASE D5088D5C4E0A lea rbx, ptr [rsi+rcx*2+0xa] +XDIS 48ea: MISC BASE D5088D5C4F0B lea rbx, ptr [rdi+rcx*2+0xb] +XDIS 48f0: MISC BASE D5098D5C480C lea rbx, ptr [r8+rcx*2+0xc] +XDIS 48f6: MISC BASE D5098D5C490D lea rbx, ptr [r9+rcx*2+0xd] +XDIS 48fc: MISC BASE D5098D5C4A0E lea rbx, ptr [r10+rcx*2+0xe] +XDIS 4902: MISC BASE D5098D5C4B0F lea rbx, ptr [r11+rcx*2+0xf] +XDIS 4908: MISC BASE D5098D5C4C10 lea rbx, ptr [r12+rcx*2+0x10] +XDIS 490e: MISC BASE D5098D5C4D11 lea rbx, ptr [r13+rcx*2+0x11] +XDIS 4914: MISC BASE D5098D5C4E12 lea rbx, ptr [r14+rcx*2+0x12] +XDIS 491a: MISC BASE D5098D5C4F13 lea rbx, ptr [r15+rcx*2+0x13] +XDIS 4920: MISC BASE D5188D5C4814 lea rbx, ptr [r16+rcx*2+0x14] +XDIS 4926: MISC BASE D5188D5C4915 lea rbx, ptr [r17+rcx*2+0x15] +XDIS 492c: MISC BASE D5188D5C4A16 lea rbx, ptr [r18+rcx*2+0x16] +XDIS 4932: MISC BASE D5188D5C4B17 lea rbx, ptr [r19+rcx*2+0x17] +XDIS 4938: MISC BASE D5188D5C4C18 lea rbx, ptr [r20+rcx*2+0x18] +XDIS 493e: MISC BASE D5188D5C4D19 lea rbx, ptr [r21+rcx*2+0x19] +XDIS 4944: MISC BASE D5188D5C4E1A lea rbx, ptr [r22+rcx*2+0x1a] +XDIS 494a: MISC BASE D5188D5C4F1B lea rbx, ptr [r23+rcx*2+0x1b] +XDIS 4950: MISC BASE D5198D5C481C lea rbx, ptr [r24+rcx*2+0x1c] +XDIS 4956: MISC BASE D5198D5C491D lea rbx, ptr [r25+rcx*2+0x1d] +XDIS 495c: MISC BASE D5198D5C4A1E lea rbx, ptr [r26+rcx*2+0x1e] +XDIS 4962: MISC BASE D5198D5C4B1F lea rbx, ptr [r27+rcx*2+0x1f] +XDIS 4968: MISC BASE D5198D5C4C20 lea rbx, ptr [r28+rcx*2+0x20] +XDIS 496e: MISC BASE D5198D5C4D21 lea rbx, ptr [r29+rcx*2+0x21] +XDIS 4974: MISC BASE D5198D5C4E22 lea rbx, ptr [r30+rcx*2+0x22] +XDIS 497a: MISC BASE D5198D5C4F23 lea rbx, ptr [r31+rcx*2+0x23] +XDIS 4980: MISC BASE D5088D5C5005 lea rbx, ptr [rax+rdx*2+0x5] +XDIS 4986: MISC BASE D5088D5C5106 lea rbx, ptr [rcx+rdx*2+0x6] +XDIS 498c: MISC BASE D5088D5C5207 lea rbx, ptr [rdx+rdx*2+0x7] +XDIS 4992: MISC BASE D5088D5C5308 lea rbx, ptr [rbx+rdx*2+0x8] +XDIS 4998: MISC BASE D5088D5C5409 lea rbx, ptr [rsp+rdx*2+0x9] +XDIS 499e: MISC BASE D5088D5C550A lea rbx, ptr [rbp+rdx*2+0xa] +XDIS 49a4: MISC BASE D5088D5C560B lea rbx, ptr [rsi+rdx*2+0xb] +XDIS 49aa: MISC BASE D5088D5C570C lea rbx, ptr [rdi+rdx*2+0xc] +XDIS 49b0: MISC BASE D5098D5C500D lea rbx, ptr [r8+rdx*2+0xd] +XDIS 49b6: MISC BASE D5098D5C510E lea rbx, ptr [r9+rdx*2+0xe] +XDIS 49bc: MISC BASE D5098D5C520F lea rbx, ptr [r10+rdx*2+0xf] +XDIS 49c2: MISC BASE D5098D5C5310 lea rbx, ptr [r11+rdx*2+0x10] +XDIS 49c8: MISC BASE D5098D5C5411 lea rbx, ptr [r12+rdx*2+0x11] +XDIS 49ce: MISC BASE D5098D5C5512 lea rbx, ptr [r13+rdx*2+0x12] +XDIS 49d4: MISC BASE D5098D5C5613 lea rbx, ptr [r14+rdx*2+0x13] +XDIS 49da: MISC BASE D5098D5C5714 lea rbx, ptr [r15+rdx*2+0x14] +XDIS 49e0: MISC BASE D5188D5C5015 lea rbx, ptr [r16+rdx*2+0x15] +XDIS 49e6: MISC BASE D5188D5C5116 lea rbx, ptr [r17+rdx*2+0x16] +XDIS 49ec: MISC BASE D5188D5C5217 lea rbx, ptr [r18+rdx*2+0x17] +XDIS 49f2: MISC BASE D5188D5C5318 lea rbx, ptr [r19+rdx*2+0x18] +XDIS 49f8: MISC BASE D5188D5C5419 lea rbx, ptr [r20+rdx*2+0x19] +XDIS 49fe: MISC BASE D5188D5C551A lea rbx, ptr [r21+rdx*2+0x1a] +XDIS 4a04: MISC BASE D5188D5C561B lea rbx, ptr [r22+rdx*2+0x1b] +XDIS 4a0a: MISC BASE D5188D5C571C lea rbx, ptr [r23+rdx*2+0x1c] +XDIS 4a10: MISC BASE D5198D5C501D lea rbx, ptr [r24+rdx*2+0x1d] +XDIS 4a16: MISC BASE D5198D5C511E lea rbx, ptr [r25+rdx*2+0x1e] +XDIS 4a1c: MISC BASE D5198D5C521F lea rbx, ptr [r26+rdx*2+0x1f] +XDIS 4a22: MISC BASE D5198D5C5320 lea rbx, ptr [r27+rdx*2+0x20] +XDIS 4a28: MISC BASE D5198D5C5421 lea rbx, ptr [r28+rdx*2+0x21] +XDIS 4a2e: MISC BASE D5198D5C5522 lea rbx, ptr [r29+rdx*2+0x22] +XDIS 4a34: MISC BASE D5198D5C5623 lea rbx, ptr [r30+rdx*2+0x23] +XDIS 4a3a: MISC BASE D5198D5C5724 lea rbx, ptr [r31+rdx*2+0x24] +XDIS 4a40: MISC BASE D5088D5C5806 lea rbx, ptr [rax+rbx*2+0x6] +XDIS 4a46: MISC BASE D5088D5C5907 lea rbx, ptr [rcx+rbx*2+0x7] +XDIS 4a4c: MISC BASE D5088D5C5A08 lea rbx, ptr [rdx+rbx*2+0x8] +XDIS 4a52: MISC BASE D5088D5C5B09 lea rbx, ptr [rbx+rbx*2+0x9] +XDIS 4a58: MISC BASE D5088D5C5C0A lea rbx, ptr [rsp+rbx*2+0xa] +XDIS 4a5e: MISC BASE D5088D5C5D0B lea rbx, ptr [rbp+rbx*2+0xb] +XDIS 4a64: MISC BASE D5088D5C5E0C lea rbx, ptr [rsi+rbx*2+0xc] +XDIS 4a6a: MISC BASE D5088D5C5F0D lea rbx, ptr [rdi+rbx*2+0xd] +XDIS 4a70: MISC BASE D5098D5C580E lea rbx, ptr [r8+rbx*2+0xe] +XDIS 4a76: MISC BASE D5098D5C590F lea rbx, ptr [r9+rbx*2+0xf] +XDIS 4a7c: MISC BASE D5098D5C5A10 lea rbx, ptr [r10+rbx*2+0x10] +XDIS 4a82: MISC BASE D5098D5C5B11 lea rbx, ptr [r11+rbx*2+0x11] +XDIS 4a88: MISC BASE D5098D5C5C12 lea rbx, ptr [r12+rbx*2+0x12] +XDIS 4a8e: MISC BASE D5098D5C5D13 lea rbx, ptr [r13+rbx*2+0x13] +XDIS 4a94: MISC BASE D5098D5C5E14 lea rbx, ptr [r14+rbx*2+0x14] +XDIS 4a9a: MISC BASE D5098D5C5F15 lea rbx, ptr [r15+rbx*2+0x15] +XDIS 4aa0: MISC BASE D5188D5C5816 lea rbx, ptr [r16+rbx*2+0x16] +XDIS 4aa6: MISC BASE D5188D5C5917 lea rbx, ptr [r17+rbx*2+0x17] +XDIS 4aac: MISC BASE D5188D5C5A18 lea rbx, ptr [r18+rbx*2+0x18] +XDIS 4ab2: MISC BASE D5188D5C5B19 lea rbx, ptr [r19+rbx*2+0x19] +XDIS 4ab8: MISC BASE D5188D5C5C1A lea rbx, ptr [r20+rbx*2+0x1a] +XDIS 4abe: MISC BASE D5188D5C5D1B lea rbx, ptr [r21+rbx*2+0x1b] +XDIS 4ac4: MISC BASE D5188D5C5E1C lea rbx, ptr [r22+rbx*2+0x1c] +XDIS 4aca: MISC BASE D5188D5C5F1D lea rbx, ptr [r23+rbx*2+0x1d] +XDIS 4ad0: MISC BASE D5198D5C581E lea rbx, ptr [r24+rbx*2+0x1e] +XDIS 4ad6: MISC BASE D5198D5C591F lea rbx, ptr [r25+rbx*2+0x1f] +XDIS 4adc: MISC BASE D5198D5C5A20 lea rbx, ptr [r26+rbx*2+0x20] +XDIS 4ae2: MISC BASE D5198D5C5B21 lea rbx, ptr [r27+rbx*2+0x21] +XDIS 4ae8: MISC BASE D5198D5C5C22 lea rbx, ptr [r28+rbx*2+0x22] +XDIS 4aee: MISC BASE D5198D5C5D23 lea rbx, ptr [r29+rbx*2+0x23] +XDIS 4af4: MISC BASE D5198D5C5E24 lea rbx, ptr [r30+rbx*2+0x24] +XDIS 4afa: MISC BASE D5198D5C5F25 lea rbx, ptr [r31+rbx*2+0x25] +XDIS 4b00: MISC BASE D5088D5C6007 lea rbx, ptr [rax+0x7] +XDIS 4b06: MISC BASE D5088D5C6108 lea rbx, ptr [rcx+0x8] +XDIS 4b0c: MISC BASE D5088D5C6209 lea rbx, ptr [rdx+0x9] +XDIS 4b12: MISC BASE D5088D5C630A lea rbx, ptr [rbx+0xa] +XDIS 4b18: MISC BASE D5088D5C640B lea rbx, ptr [rsp+0xb] +XDIS 4b1e: MISC BASE D5088D5C650C lea rbx, ptr [rbp+0xc] +XDIS 4b24: MISC BASE D5088D5C660D lea rbx, ptr [rsi+0xd] +XDIS 4b2a: MISC BASE D5088D5C670E lea rbx, ptr [rdi+0xe] +XDIS 4b30: MISC BASE D5098D5C600F lea rbx, ptr [r8+0xf] +XDIS 4b36: MISC BASE D5098D5C6110 lea rbx, ptr [r9+0x10] +XDIS 4b3c: MISC BASE D5098D5C6211 lea rbx, ptr [r10+0x11] +XDIS 4b42: MISC BASE D5098D5C6312 lea rbx, ptr [r11+0x12] +XDIS 4b48: MISC BASE D5098D5C6413 lea rbx, ptr [r12+0x13] +XDIS 4b4e: MISC BASE D5098D5C6514 lea rbx, ptr [r13+0x14] +XDIS 4b54: MISC BASE D5098D5C6615 lea rbx, ptr [r14+0x15] +XDIS 4b5a: MISC BASE D5098D5C6716 lea rbx, ptr [r15+0x16] +XDIS 4b60: MISC BASE D5188D5C6017 lea rbx, ptr [r16+0x17] +XDIS 4b66: MISC BASE D5188D5C6118 lea rbx, ptr [r17+0x18] +XDIS 4b6c: MISC BASE D5188D5C6219 lea rbx, ptr [r18+0x19] +XDIS 4b72: MISC BASE D5188D5C631A lea rbx, ptr [r19+0x1a] +XDIS 4b78: MISC BASE D5188D5C641B lea rbx, ptr [r20+0x1b] +XDIS 4b7e: MISC BASE D5188D5C651C lea rbx, ptr [r21+0x1c] +XDIS 4b84: MISC BASE D5188D5C661D lea rbx, ptr [r22+0x1d] +XDIS 4b8a: MISC BASE D5188D5C671E lea rbx, ptr [r23+0x1e] +XDIS 4b90: MISC BASE D5198D5C601F lea rbx, ptr [r24+0x1f] +XDIS 4b96: MISC BASE D5198D5C6120 lea rbx, ptr [r25+0x20] +XDIS 4b9c: MISC BASE D5198D5C6221 lea rbx, ptr [r26+0x21] +XDIS 4ba2: MISC BASE D5198D5C6322 lea rbx, ptr [r27+0x22] +XDIS 4ba8: MISC BASE D5198D5C6423 lea rbx, ptr [r28+0x23] +XDIS 4bae: MISC BASE D5198D5C6524 lea rbx, ptr [r29+0x24] +XDIS 4bb4: MISC BASE D5198D5C6625 lea rbx, ptr [r30+0x25] +XDIS 4bba: MISC BASE D5198D5C6726 lea rbx, ptr [r31+0x26] +XDIS 4bc0: MISC BASE D5088D5C6808 lea rbx, ptr [rax+rbp*2+0x8] +XDIS 4bc6: MISC BASE D5088D5C6909 lea rbx, ptr [rcx+rbp*2+0x9] +XDIS 4bcc: MISC BASE D5088D5C6A0A lea rbx, ptr [rdx+rbp*2+0xa] +XDIS 4bd2: MISC BASE D5088D5C6B0B lea rbx, ptr [rbx+rbp*2+0xb] +XDIS 4bd8: MISC BASE D5088D5C6C0C lea rbx, ptr [rsp+rbp*2+0xc] +XDIS 4bde: MISC BASE D5088D5C6D0D lea rbx, ptr [rbp+rbp*2+0xd] +XDIS 4be4: MISC BASE D5088D5C6E0E lea rbx, ptr [rsi+rbp*2+0xe] +XDIS 4bea: MISC BASE D5088D5C6F0F lea rbx, ptr [rdi+rbp*2+0xf] +XDIS 4bf0: MISC BASE D5098D5C6810 lea rbx, ptr [r8+rbp*2+0x10] +XDIS 4bf6: MISC BASE D5098D5C6911 lea rbx, ptr [r9+rbp*2+0x11] +XDIS 4bfc: MISC BASE D5098D5C6A12 lea rbx, ptr [r10+rbp*2+0x12] +XDIS 4c02: MISC BASE D5098D5C6B13 lea rbx, ptr [r11+rbp*2+0x13] +XDIS 4c08: MISC BASE D5098D5C6C14 lea rbx, ptr [r12+rbp*2+0x14] +XDIS 4c0e: MISC BASE D5098D5C6D15 lea rbx, ptr [r13+rbp*2+0x15] +XDIS 4c14: MISC BASE D5098D5C6E16 lea rbx, ptr [r14+rbp*2+0x16] +XDIS 4c1a: MISC BASE D5098D5C6F17 lea rbx, ptr [r15+rbp*2+0x17] +XDIS 4c20: MISC BASE D5188D5C6818 lea rbx, ptr [r16+rbp*2+0x18] +XDIS 4c26: MISC BASE D5188D5C6919 lea rbx, ptr [r17+rbp*2+0x19] +XDIS 4c2c: MISC BASE D5188D5C6A1A lea rbx, ptr [r18+rbp*2+0x1a] +XDIS 4c32: MISC BASE D5188D5C6B1B lea rbx, ptr [r19+rbp*2+0x1b] +XDIS 4c38: MISC BASE D5188D5C6C1C lea rbx, ptr [r20+rbp*2+0x1c] +XDIS 4c3e: MISC BASE D5188D5C6D1D lea rbx, ptr [r21+rbp*2+0x1d] +XDIS 4c44: MISC BASE D5188D5C6E1E lea rbx, ptr [r22+rbp*2+0x1e] +XDIS 4c4a: MISC BASE D5188D5C6F1F lea rbx, ptr [r23+rbp*2+0x1f] +XDIS 4c50: MISC BASE D5198D5C6820 lea rbx, ptr [r24+rbp*2+0x20] +XDIS 4c56: MISC BASE D5198D5C6921 lea rbx, ptr [r25+rbp*2+0x21] +XDIS 4c5c: MISC BASE D5198D5C6A22 lea rbx, ptr [r26+rbp*2+0x22] +XDIS 4c62: MISC BASE D5198D5C6B23 lea rbx, ptr [r27+rbp*2+0x23] +XDIS 4c68: MISC BASE D5198D5C6C24 lea rbx, ptr [r28+rbp*2+0x24] +XDIS 4c6e: MISC BASE D5198D5C6D25 lea rbx, ptr [r29+rbp*2+0x25] +XDIS 4c74: MISC BASE D5198D5C6E26 lea rbx, ptr [r30+rbp*2+0x26] +XDIS 4c7a: MISC BASE D5198D5C6F27 lea rbx, ptr [r31+rbp*2+0x27] +XDIS 4c80: MISC BASE D5088D5C7009 lea rbx, ptr [rax+rsi*2+0x9] +XDIS 4c86: MISC BASE D5088D5C710A lea rbx, ptr [rcx+rsi*2+0xa] +XDIS 4c8c: MISC BASE D5088D5C720B lea rbx, ptr [rdx+rsi*2+0xb] +XDIS 4c92: MISC BASE D5088D5C730C lea rbx, ptr [rbx+rsi*2+0xc] +XDIS 4c98: MISC BASE D5088D5C740D lea rbx, ptr [rsp+rsi*2+0xd] +XDIS 4c9e: MISC BASE D5088D5C750E lea rbx, ptr [rbp+rsi*2+0xe] +XDIS 4ca4: MISC BASE D5088D5C760F lea rbx, ptr [rsi+rsi*2+0xf] +XDIS 4caa: MISC BASE D5088D5C7710 lea rbx, ptr [rdi+rsi*2+0x10] +XDIS 4cb0: MISC BASE D5098D5C7011 lea rbx, ptr [r8+rsi*2+0x11] +XDIS 4cb6: MISC BASE D5098D5C7112 lea rbx, ptr [r9+rsi*2+0x12] +XDIS 4cbc: MISC BASE D5098D5C7213 lea rbx, ptr [r10+rsi*2+0x13] +XDIS 4cc2: MISC BASE D5098D5C7314 lea rbx, ptr [r11+rsi*2+0x14] +XDIS 4cc8: MISC BASE D5098D5C7415 lea rbx, ptr [r12+rsi*2+0x15] +XDIS 4cce: MISC BASE D5098D5C7516 lea rbx, ptr [r13+rsi*2+0x16] +XDIS 4cd4: MISC BASE D5098D5C7617 lea rbx, ptr [r14+rsi*2+0x17] +XDIS 4cda: MISC BASE D5098D5C7718 lea rbx, ptr [r15+rsi*2+0x18] +XDIS 4ce0: MISC BASE D5188D5C7019 lea rbx, ptr [r16+rsi*2+0x19] +XDIS 4ce6: MISC BASE D5188D5C711A lea rbx, ptr [r17+rsi*2+0x1a] +XDIS 4cec: MISC BASE D5188D5C721B lea rbx, ptr [r18+rsi*2+0x1b] +XDIS 4cf2: MISC BASE D5188D5C731C lea rbx, ptr [r19+rsi*2+0x1c] +XDIS 4cf8: MISC BASE D5188D5C741D lea rbx, ptr [r20+rsi*2+0x1d] +XDIS 4cfe: MISC BASE D5188D5C751E lea rbx, ptr [r21+rsi*2+0x1e] +XDIS 4d04: MISC BASE D5188D5C761F lea rbx, ptr [r22+rsi*2+0x1f] +XDIS 4d0a: MISC BASE D5188D5C7720 lea rbx, ptr [r23+rsi*2+0x20] +XDIS 4d10: MISC BASE D5198D5C7021 lea rbx, ptr [r24+rsi*2+0x21] +XDIS 4d16: MISC BASE D5198D5C7122 lea rbx, ptr [r25+rsi*2+0x22] +XDIS 4d1c: MISC BASE D5198D5C7223 lea rbx, ptr [r26+rsi*2+0x23] +XDIS 4d22: MISC BASE D5198D5C7324 lea rbx, ptr [r27+rsi*2+0x24] +XDIS 4d28: MISC BASE D5198D5C7425 lea rbx, ptr [r28+rsi*2+0x25] +XDIS 4d2e: MISC BASE D5198D5C7526 lea rbx, ptr [r29+rsi*2+0x26] +XDIS 4d34: MISC BASE D5198D5C7627 lea rbx, ptr [r30+rsi*2+0x27] +XDIS 4d3a: MISC BASE D5198D5C7728 lea rbx, ptr [r31+rsi*2+0x28] +XDIS 4d40: MISC BASE D5088D5C780A lea rbx, ptr [rax+rdi*2+0xa] +XDIS 4d46: MISC BASE D5088D5C790B lea rbx, ptr [rcx+rdi*2+0xb] +XDIS 4d4c: MISC BASE D5088D5C7A0C lea rbx, ptr [rdx+rdi*2+0xc] +XDIS 4d52: MISC BASE D5088D5C7B0D lea rbx, ptr [rbx+rdi*2+0xd] +XDIS 4d58: MISC BASE D5088D5C7C0E lea rbx, ptr [rsp+rdi*2+0xe] +XDIS 4d5e: MISC BASE D5088D5C7D0F lea rbx, ptr [rbp+rdi*2+0xf] +XDIS 4d64: MISC BASE D5088D5C7E10 lea rbx, ptr [rsi+rdi*2+0x10] +XDIS 4d6a: MISC BASE D5088D5C7F11 lea rbx, ptr [rdi+rdi*2+0x11] +XDIS 4d70: MISC BASE D5098D5C7812 lea rbx, ptr [r8+rdi*2+0x12] +XDIS 4d76: MISC BASE D5098D5C7913 lea rbx, ptr [r9+rdi*2+0x13] +XDIS 4d7c: MISC BASE D5098D5C7A14 lea rbx, ptr [r10+rdi*2+0x14] +XDIS 4d82: MISC BASE D5098D5C7B15 lea rbx, ptr [r11+rdi*2+0x15] +XDIS 4d88: MISC BASE D5098D5C7C16 lea rbx, ptr [r12+rdi*2+0x16] +XDIS 4d8e: MISC BASE D5098D5C7D17 lea rbx, ptr [r13+rdi*2+0x17] +XDIS 4d94: MISC BASE D5098D5C7E18 lea rbx, ptr [r14+rdi*2+0x18] +XDIS 4d9a: MISC BASE D5098D5C7F19 lea rbx, ptr [r15+rdi*2+0x19] +XDIS 4da0: MISC BASE D5188D5C781A lea rbx, ptr [r16+rdi*2+0x1a] +XDIS 4da6: MISC BASE D5188D5C791B lea rbx, ptr [r17+rdi*2+0x1b] +XDIS 4dac: MISC BASE D5188D5C7A1C lea rbx, ptr [r18+rdi*2+0x1c] +XDIS 4db2: MISC BASE D5188D5C7B1D lea rbx, ptr [r19+rdi*2+0x1d] +XDIS 4db8: MISC BASE D5188D5C7C1E lea rbx, ptr [r20+rdi*2+0x1e] +XDIS 4dbe: MISC BASE D5188D5C7D1F lea rbx, ptr [r21+rdi*2+0x1f] +XDIS 4dc4: MISC BASE D5188D5C7E20 lea rbx, ptr [r22+rdi*2+0x20] +XDIS 4dca: MISC BASE D5188D5C7F21 lea rbx, ptr [r23+rdi*2+0x21] +XDIS 4dd0: MISC BASE D5198D5C7822 lea rbx, ptr [r24+rdi*2+0x22] +XDIS 4dd6: MISC BASE D5198D5C7923 lea rbx, ptr [r25+rdi*2+0x23] +XDIS 4ddc: MISC BASE D5198D5C7A24 lea rbx, ptr [r26+rdi*2+0x24] +XDIS 4de2: MISC BASE D5198D5C7B25 lea rbx, ptr [r27+rdi*2+0x25] +XDIS 4de8: MISC BASE D5198D5C7C26 lea rbx, ptr [r28+rdi*2+0x26] +XDIS 4dee: MISC BASE D5198D5C7D27 lea rbx, ptr [r29+rdi*2+0x27] +XDIS 4df4: MISC BASE D5198D5C7E28 lea rbx, ptr [r30+rdi*2+0x28] +XDIS 4dfa: MISC BASE D5198D5C7F29 lea rbx, ptr [r31+rdi*2+0x29] +XDIS 4e00: MISC BASE D50A8D5C400B lea rbx, ptr [rax+r8*2+0xb] +XDIS 4e06: MISC BASE D50A8D5C410C lea rbx, ptr [rcx+r8*2+0xc] +XDIS 4e0c: MISC BASE D50A8D5C420D lea rbx, ptr [rdx+r8*2+0xd] +XDIS 4e12: MISC BASE D50A8D5C430E lea rbx, ptr [rbx+r8*2+0xe] +XDIS 4e18: MISC BASE D50A8D5C440F lea rbx, ptr [rsp+r8*2+0xf] +XDIS 4e1e: MISC BASE D50A8D5C4510 lea rbx, ptr [rbp+r8*2+0x10] +XDIS 4e24: MISC BASE D50A8D5C4611 lea rbx, ptr [rsi+r8*2+0x11] +XDIS 4e2a: MISC BASE D50A8D5C4712 lea rbx, ptr [rdi+r8*2+0x12] +XDIS 4e30: MISC BASE D50B8D5C4013 lea rbx, ptr [r8+r8*2+0x13] +XDIS 4e36: MISC BASE D50B8D5C4114 lea rbx, ptr [r9+r8*2+0x14] +XDIS 4e3c: MISC BASE D50B8D5C4215 lea rbx, ptr [r10+r8*2+0x15] +XDIS 4e42: MISC BASE D50B8D5C4316 lea rbx, ptr [r11+r8*2+0x16] +XDIS 4e48: MISC BASE D50B8D5C4417 lea rbx, ptr [r12+r8*2+0x17] +XDIS 4e4e: MISC BASE D50B8D5C4518 lea rbx, ptr [r13+r8*2+0x18] +XDIS 4e54: MISC BASE D50B8D5C4619 lea rbx, ptr [r14+r8*2+0x19] +XDIS 4e5a: MISC BASE D50B8D5C471A lea rbx, ptr [r15+r8*2+0x1a] +XDIS 4e60: MISC BASE D51A8D5C401B lea rbx, ptr [r16+r8*2+0x1b] +XDIS 4e66: MISC BASE D51A8D5C411C lea rbx, ptr [r17+r8*2+0x1c] +XDIS 4e6c: MISC BASE D51A8D5C421D lea rbx, ptr [r18+r8*2+0x1d] +XDIS 4e72: MISC BASE D51A8D5C431E lea rbx, ptr [r19+r8*2+0x1e] +XDIS 4e78: MISC BASE D51A8D5C441F lea rbx, ptr [r20+r8*2+0x1f] +XDIS 4e7e: MISC BASE D51A8D5C4520 lea rbx, ptr [r21+r8*2+0x20] +XDIS 4e84: MISC BASE D51A8D5C4621 lea rbx, ptr [r22+r8*2+0x21] +XDIS 4e8a: MISC BASE D51A8D5C4722 lea rbx, ptr [r23+r8*2+0x22] +XDIS 4e90: MISC BASE D51B8D5C4023 lea rbx, ptr [r24+r8*2+0x23] +XDIS 4e96: MISC BASE D51B8D5C4124 lea rbx, ptr [r25+r8*2+0x24] +XDIS 4e9c: MISC BASE D51B8D5C4225 lea rbx, ptr [r26+r8*2+0x25] +XDIS 4ea2: MISC BASE D51B8D5C4326 lea rbx, ptr [r27+r8*2+0x26] +XDIS 4ea8: MISC BASE D51B8D5C4427 lea rbx, ptr [r28+r8*2+0x27] +XDIS 4eae: MISC BASE D51B8D5C4528 lea rbx, ptr [r29+r8*2+0x28] +XDIS 4eb4: MISC BASE D51B8D5C4629 lea rbx, ptr [r30+r8*2+0x29] +XDIS 4eba: MISC BASE D51B8D5C472A lea rbx, ptr [r31+r8*2+0x2a] +XDIS 4ec0: MISC BASE D50A8D5C480C lea rbx, ptr [rax+r9*2+0xc] +XDIS 4ec6: MISC BASE D50A8D5C490D lea rbx, ptr [rcx+r9*2+0xd] +XDIS 4ecc: MISC BASE D50A8D5C4A0E lea rbx, ptr [rdx+r9*2+0xe] +XDIS 4ed2: MISC BASE D50A8D5C4B0F lea rbx, ptr [rbx+r9*2+0xf] +XDIS 4ed8: MISC BASE D50A8D5C4C10 lea rbx, ptr [rsp+r9*2+0x10] +XDIS 4ede: MISC BASE D50A8D5C4D11 lea rbx, ptr [rbp+r9*2+0x11] +XDIS 4ee4: MISC BASE D50A8D5C4E12 lea rbx, ptr [rsi+r9*2+0x12] +XDIS 4eea: MISC BASE D50A8D5C4F13 lea rbx, ptr [rdi+r9*2+0x13] +XDIS 4ef0: MISC BASE D50B8D5C4814 lea rbx, ptr [r8+r9*2+0x14] +XDIS 4ef6: MISC BASE D50B8D5C4915 lea rbx, ptr [r9+r9*2+0x15] +XDIS 4efc: MISC BASE D50B8D5C4A16 lea rbx, ptr [r10+r9*2+0x16] +XDIS 4f02: MISC BASE D50B8D5C4B17 lea rbx, ptr [r11+r9*2+0x17] +XDIS 4f08: MISC BASE D50B8D5C4C18 lea rbx, ptr [r12+r9*2+0x18] +XDIS 4f0e: MISC BASE D50B8D5C4D19 lea rbx, ptr [r13+r9*2+0x19] +XDIS 4f14: MISC BASE D50B8D5C4E1A lea rbx, ptr [r14+r9*2+0x1a] +XDIS 4f1a: MISC BASE D50B8D5C4F1B lea rbx, ptr [r15+r9*2+0x1b] +XDIS 4f20: MISC BASE D51A8D5C481C lea rbx, ptr [r16+r9*2+0x1c] +XDIS 4f26: MISC BASE D51A8D5C491D lea rbx, ptr [r17+r9*2+0x1d] +XDIS 4f2c: MISC BASE D51A8D5C4A1E lea rbx, ptr [r18+r9*2+0x1e] +XDIS 4f32: MISC BASE D51A8D5C4B1F lea rbx, ptr [r19+r9*2+0x1f] +XDIS 4f38: MISC BASE D51A8D5C4C20 lea rbx, ptr [r20+r9*2+0x20] +XDIS 4f3e: MISC BASE D51A8D5C4D21 lea rbx, ptr [r21+r9*2+0x21] +XDIS 4f44: MISC BASE D51A8D5C4E22 lea rbx, ptr [r22+r9*2+0x22] +XDIS 4f4a: MISC BASE D51A8D5C4F23 lea rbx, ptr [r23+r9*2+0x23] +XDIS 4f50: MISC BASE D51B8D5C4824 lea rbx, ptr [r24+r9*2+0x24] +XDIS 4f56: MISC BASE D51B8D5C4925 lea rbx, ptr [r25+r9*2+0x25] +XDIS 4f5c: MISC BASE D51B8D5C4A26 lea rbx, ptr [r26+r9*2+0x26] +XDIS 4f62: MISC BASE D51B8D5C4B27 lea rbx, ptr [r27+r9*2+0x27] +XDIS 4f68: MISC BASE D51B8D5C4C28 lea rbx, ptr [r28+r9*2+0x28] +XDIS 4f6e: MISC BASE D51B8D5C4D29 lea rbx, ptr [r29+r9*2+0x29] +XDIS 4f74: MISC BASE D51B8D5C4E2A lea rbx, ptr [r30+r9*2+0x2a] +XDIS 4f7a: MISC BASE D51B8D5C4F2B lea rbx, ptr [r31+r9*2+0x2b] +XDIS 4f80: MISC BASE D50A8D5C500D lea rbx, ptr [rax+r10*2+0xd] +XDIS 4f86: MISC BASE D50A8D5C510E lea rbx, ptr [rcx+r10*2+0xe] +XDIS 4f8c: MISC BASE D50A8D5C520F lea rbx, ptr [rdx+r10*2+0xf] +XDIS 4f92: MISC BASE D50A8D5C5310 lea rbx, ptr [rbx+r10*2+0x10] +XDIS 4f98: MISC BASE D50A8D5C5411 lea rbx, ptr [rsp+r10*2+0x11] +XDIS 4f9e: MISC BASE D50A8D5C5512 lea rbx, ptr [rbp+r10*2+0x12] +XDIS 4fa4: MISC BASE D50A8D5C5613 lea rbx, ptr [rsi+r10*2+0x13] +XDIS 4faa: MISC BASE D50A8D5C5714 lea rbx, ptr [rdi+r10*2+0x14] +XDIS 4fb0: MISC BASE D50B8D5C5015 lea rbx, ptr [r8+r10*2+0x15] +XDIS 4fb6: MISC BASE D50B8D5C5116 lea rbx, ptr [r9+r10*2+0x16] +XDIS 4fbc: MISC BASE D50B8D5C5217 lea rbx, ptr [r10+r10*2+0x17] +XDIS 4fc2: MISC BASE D50B8D5C5318 lea rbx, ptr [r11+r10*2+0x18] +XDIS 4fc8: MISC BASE D50B8D5C5419 lea rbx, ptr [r12+r10*2+0x19] +XDIS 4fce: MISC BASE D50B8D5C551A lea rbx, ptr [r13+r10*2+0x1a] +XDIS 4fd4: MISC BASE D50B8D5C561B lea rbx, ptr [r14+r10*2+0x1b] +XDIS 4fda: MISC BASE D50B8D5C571C lea rbx, ptr [r15+r10*2+0x1c] +XDIS 4fe0: MISC BASE D51A8D5C501D lea rbx, ptr [r16+r10*2+0x1d] +XDIS 4fe6: MISC BASE D51A8D5C511E lea rbx, ptr [r17+r10*2+0x1e] +XDIS 4fec: MISC BASE D51A8D5C521F lea rbx, ptr [r18+r10*2+0x1f] +XDIS 4ff2: MISC BASE D51A8D5C5320 lea rbx, ptr [r19+r10*2+0x20] +XDIS 4ff8: MISC BASE D51A8D5C5421 lea rbx, ptr [r20+r10*2+0x21] +XDIS 4ffe: MISC BASE D51A8D5C5522 lea rbx, ptr [r21+r10*2+0x22] +XDIS 5004: MISC BASE D51A8D5C5623 lea rbx, ptr [r22+r10*2+0x23] +XDIS 500a: MISC BASE D51A8D5C5724 lea rbx, ptr [r23+r10*2+0x24] +XDIS 5010: MISC BASE D51B8D5C5025 lea rbx, ptr [r24+r10*2+0x25] +XDIS 5016: MISC BASE D51B8D5C5126 lea rbx, ptr [r25+r10*2+0x26] +XDIS 501c: MISC BASE D51B8D5C5227 lea rbx, ptr [r26+r10*2+0x27] +XDIS 5022: MISC BASE D51B8D5C5328 lea rbx, ptr [r27+r10*2+0x28] +XDIS 5028: MISC BASE D51B8D5C5429 lea rbx, ptr [r28+r10*2+0x29] +XDIS 502e: MISC BASE D51B8D5C552A lea rbx, ptr [r29+r10*2+0x2a] +XDIS 5034: MISC BASE D51B8D5C562B lea rbx, ptr [r30+r10*2+0x2b] +XDIS 503a: MISC BASE D51B8D5C572C lea rbx, ptr [r31+r10*2+0x2c] +XDIS 5040: MISC BASE D50A8D5C580E lea rbx, ptr [rax+r11*2+0xe] +XDIS 5046: MISC BASE D50A8D5C590F lea rbx, ptr [rcx+r11*2+0xf] +XDIS 504c: MISC BASE D50A8D5C5A10 lea rbx, ptr [rdx+r11*2+0x10] +XDIS 5052: MISC BASE D50A8D5C5B11 lea rbx, ptr [rbx+r11*2+0x11] +XDIS 5058: MISC BASE D50A8D5C5C12 lea rbx, ptr [rsp+r11*2+0x12] +XDIS 505e: MISC BASE D50A8D5C5D13 lea rbx, ptr [rbp+r11*2+0x13] +XDIS 5064: MISC BASE D50A8D5C5E14 lea rbx, ptr [rsi+r11*2+0x14] +XDIS 506a: MISC BASE D50A8D5C5F15 lea rbx, ptr [rdi+r11*2+0x15] +XDIS 5070: MISC BASE D50B8D5C5816 lea rbx, ptr [r8+r11*2+0x16] +XDIS 5076: MISC BASE D50B8D5C5917 lea rbx, ptr [r9+r11*2+0x17] +XDIS 507c: MISC BASE D50B8D5C5A18 lea rbx, ptr [r10+r11*2+0x18] +XDIS 5082: MISC BASE D50B8D5C5B19 lea rbx, ptr [r11+r11*2+0x19] +XDIS 5088: MISC BASE D50B8D5C5C1A lea rbx, ptr [r12+r11*2+0x1a] +XDIS 508e: MISC BASE D50B8D5C5D1B lea rbx, ptr [r13+r11*2+0x1b] +XDIS 5094: MISC BASE D50B8D5C5E1C lea rbx, ptr [r14+r11*2+0x1c] +XDIS 509a: MISC BASE D50B8D5C5F1D lea rbx, ptr [r15+r11*2+0x1d] +XDIS 50a0: MISC BASE D51A8D5C581E lea rbx, ptr [r16+r11*2+0x1e] +XDIS 50a6: MISC BASE D51A8D5C591F lea rbx, ptr [r17+r11*2+0x1f] +XDIS 50ac: MISC BASE D51A8D5C5A20 lea rbx, ptr [r18+r11*2+0x20] +XDIS 50b2: MISC BASE D51A8D5C5B21 lea rbx, ptr [r19+r11*2+0x21] +XDIS 50b8: MISC BASE D51A8D5C5C22 lea rbx, ptr [r20+r11*2+0x22] +XDIS 50be: MISC BASE D51A8D5C5D23 lea rbx, ptr [r21+r11*2+0x23] +XDIS 50c4: MISC BASE D51A8D5C5E24 lea rbx, ptr [r22+r11*2+0x24] +XDIS 50ca: MISC BASE D51A8D5C5F25 lea rbx, ptr [r23+r11*2+0x25] +XDIS 50d0: MISC BASE D51B8D5C5826 lea rbx, ptr [r24+r11*2+0x26] +XDIS 50d6: MISC BASE D51B8D5C5927 lea rbx, ptr [r25+r11*2+0x27] +XDIS 50dc: MISC BASE D51B8D5C5A28 lea rbx, ptr [r26+r11*2+0x28] +XDIS 50e2: MISC BASE D51B8D5C5B29 lea rbx, ptr [r27+r11*2+0x29] +XDIS 50e8: MISC BASE D51B8D5C5C2A lea rbx, ptr [r28+r11*2+0x2a] +XDIS 50ee: MISC BASE D51B8D5C5D2B lea rbx, ptr [r29+r11*2+0x2b] +XDIS 50f4: MISC BASE D51B8D5C5E2C lea rbx, ptr [r30+r11*2+0x2c] +XDIS 50fa: MISC BASE D51B8D5C5F2D lea rbx, ptr [r31+r11*2+0x2d] +XDIS 5100: MISC BASE D50A8D5C600F lea rbx, ptr [rax+r12*2+0xf] +XDIS 5106: MISC BASE D50A8D5C6110 lea rbx, ptr [rcx+r12*2+0x10] +XDIS 510c: MISC BASE D50A8D5C6211 lea rbx, ptr [rdx+r12*2+0x11] +XDIS 5112: MISC BASE D50A8D5C6312 lea rbx, ptr [rbx+r12*2+0x12] +XDIS 5118: MISC BASE D50A8D5C6413 lea rbx, ptr [rsp+r12*2+0x13] +XDIS 511e: MISC BASE D50A8D5C6514 lea rbx, ptr [rbp+r12*2+0x14] +XDIS 5124: MISC BASE D50A8D5C6615 lea rbx, ptr [rsi+r12*2+0x15] +XDIS 512a: MISC BASE D50A8D5C6716 lea rbx, ptr [rdi+r12*2+0x16] +XDIS 5130: MISC BASE D50B8D5C6017 lea rbx, ptr [r8+r12*2+0x17] +XDIS 5136: MISC BASE D50B8D5C6118 lea rbx, ptr [r9+r12*2+0x18] +XDIS 513c: MISC BASE D50B8D5C6219 lea rbx, ptr [r10+r12*2+0x19] +XDIS 5142: MISC BASE D50B8D5C631A lea rbx, ptr [r11+r12*2+0x1a] +XDIS 5148: MISC BASE D50B8D5C641B lea rbx, ptr [r12+r12*2+0x1b] +XDIS 514e: MISC BASE D50B8D5C651C lea rbx, ptr [r13+r12*2+0x1c] +XDIS 5154: MISC BASE D50B8D5C661D lea rbx, ptr [r14+r12*2+0x1d] +XDIS 515a: MISC BASE D50B8D5C671E lea rbx, ptr [r15+r12*2+0x1e] +XDIS 5160: MISC BASE D51A8D5C601F lea rbx, ptr [r16+r12*2+0x1f] +XDIS 5166: MISC BASE D51A8D5C6120 lea rbx, ptr [r17+r12*2+0x20] +XDIS 516c: MISC BASE D51A8D5C6221 lea rbx, ptr [r18+r12*2+0x21] +XDIS 5172: MISC BASE D51A8D5C6322 lea rbx, ptr [r19+r12*2+0x22] +XDIS 5178: MISC BASE D51A8D5C6423 lea rbx, ptr [r20+r12*2+0x23] +XDIS 517e: MISC BASE D51A8D5C6524 lea rbx, ptr [r21+r12*2+0x24] +XDIS 5184: MISC BASE D51A8D5C6625 lea rbx, ptr [r22+r12*2+0x25] +XDIS 518a: MISC BASE D51A8D5C6726 lea rbx, ptr [r23+r12*2+0x26] +XDIS 5190: MISC BASE D51B8D5C6027 lea rbx, ptr [r24+r12*2+0x27] +XDIS 5196: MISC BASE D51B8D5C6128 lea rbx, ptr [r25+r12*2+0x28] +XDIS 519c: MISC BASE D51B8D5C6229 lea rbx, ptr [r26+r12*2+0x29] +XDIS 51a2: MISC BASE D51B8D5C632A lea rbx, ptr [r27+r12*2+0x2a] +XDIS 51a8: MISC BASE D51B8D5C642B lea rbx, ptr [r28+r12*2+0x2b] +XDIS 51ae: MISC BASE D51B8D5C652C lea rbx, ptr [r29+r12*2+0x2c] +XDIS 51b4: MISC BASE D51B8D5C662D lea rbx, ptr [r30+r12*2+0x2d] +XDIS 51ba: MISC BASE D51B8D5C672E lea rbx, ptr [r31+r12*2+0x2e] +XDIS 51c0: MISC BASE D50A8D5C6810 lea rbx, ptr [rax+r13*2+0x10] +XDIS 51c6: MISC BASE D50A8D5C6911 lea rbx, ptr [rcx+r13*2+0x11] +XDIS 51cc: MISC BASE D50A8D5C6A12 lea rbx, ptr [rdx+r13*2+0x12] +XDIS 51d2: MISC BASE D50A8D5C6B13 lea rbx, ptr [rbx+r13*2+0x13] +XDIS 51d8: MISC BASE D50A8D5C6C14 lea rbx, ptr [rsp+r13*2+0x14] +XDIS 51de: MISC BASE D50A8D5C6D15 lea rbx, ptr [rbp+r13*2+0x15] +XDIS 51e4: MISC BASE D50A8D5C6E16 lea rbx, ptr [rsi+r13*2+0x16] +XDIS 51ea: MISC BASE D50A8D5C6F17 lea rbx, ptr [rdi+r13*2+0x17] +XDIS 51f0: MISC BASE D50B8D5C6818 lea rbx, ptr [r8+r13*2+0x18] +XDIS 51f6: MISC BASE D50B8D5C6919 lea rbx, ptr [r9+r13*2+0x19] +XDIS 51fc: MISC BASE D50B8D5C6A1A lea rbx, ptr [r10+r13*2+0x1a] +XDIS 5202: MISC BASE D50B8D5C6B1B lea rbx, ptr [r11+r13*2+0x1b] +XDIS 5208: MISC BASE D50B8D5C6C1C lea rbx, ptr [r12+r13*2+0x1c] +XDIS 520e: MISC BASE D50B8D5C6D1D lea rbx, ptr [r13+r13*2+0x1d] +XDIS 5214: MISC BASE D50B8D5C6E1E lea rbx, ptr [r14+r13*2+0x1e] +XDIS 521a: MISC BASE D50B8D5C6F1F lea rbx, ptr [r15+r13*2+0x1f] +XDIS 5220: MISC BASE D51A8D5C6820 lea rbx, ptr [r16+r13*2+0x20] +XDIS 5226: MISC BASE D51A8D5C6921 lea rbx, ptr [r17+r13*2+0x21] +XDIS 522c: MISC BASE D51A8D5C6A22 lea rbx, ptr [r18+r13*2+0x22] +XDIS 5232: MISC BASE D51A8D5C6B23 lea rbx, ptr [r19+r13*2+0x23] +XDIS 5238: MISC BASE D51A8D5C6C24 lea rbx, ptr [r20+r13*2+0x24] +XDIS 523e: MISC BASE D51A8D5C6D25 lea rbx, ptr [r21+r13*2+0x25] +XDIS 5244: MISC BASE D51A8D5C6E26 lea rbx, ptr [r22+r13*2+0x26] +XDIS 524a: MISC BASE D51A8D5C6F27 lea rbx, ptr [r23+r13*2+0x27] +XDIS 5250: MISC BASE D51B8D5C6828 lea rbx, ptr [r24+r13*2+0x28] +XDIS 5256: MISC BASE D51B8D5C6929 lea rbx, ptr [r25+r13*2+0x29] +XDIS 525c: MISC BASE D51B8D5C6A2A lea rbx, ptr [r26+r13*2+0x2a] +XDIS 5262: MISC BASE D51B8D5C6B2B lea rbx, ptr [r27+r13*2+0x2b] +XDIS 5268: MISC BASE D51B8D5C6C2C lea rbx, ptr [r28+r13*2+0x2c] +XDIS 526e: MISC BASE D51B8D5C6D2D lea rbx, ptr [r29+r13*2+0x2d] +XDIS 5274: MISC BASE D51B8D5C6E2E lea rbx, ptr [r30+r13*2+0x2e] +XDIS 527a: MISC BASE D51B8D5C6F2F lea rbx, ptr [r31+r13*2+0x2f] +XDIS 5280: MISC BASE D50A8D5C7011 lea rbx, ptr [rax+r14*2+0x11] +XDIS 5286: MISC BASE D50A8D5C7112 lea rbx, ptr [rcx+r14*2+0x12] +XDIS 528c: MISC BASE D50A8D5C7213 lea rbx, ptr [rdx+r14*2+0x13] +XDIS 5292: MISC BASE D50A8D5C7314 lea rbx, ptr [rbx+r14*2+0x14] +XDIS 5298: MISC BASE D50A8D5C7415 lea rbx, ptr [rsp+r14*2+0x15] +XDIS 529e: MISC BASE D50A8D5C7516 lea rbx, ptr [rbp+r14*2+0x16] +XDIS 52a4: MISC BASE D50A8D5C7617 lea rbx, ptr [rsi+r14*2+0x17] +XDIS 52aa: MISC BASE D50A8D5C7718 lea rbx, ptr [rdi+r14*2+0x18] +XDIS 52b0: MISC BASE D50B8D5C7019 lea rbx, ptr [r8+r14*2+0x19] +XDIS 52b6: MISC BASE D50B8D5C711A lea rbx, ptr [r9+r14*2+0x1a] +XDIS 52bc: MISC BASE D50B8D5C721B lea rbx, ptr [r10+r14*2+0x1b] +XDIS 52c2: MISC BASE D50B8D5C731C lea rbx, ptr [r11+r14*2+0x1c] +XDIS 52c8: MISC BASE D50B8D5C741D lea rbx, ptr [r12+r14*2+0x1d] +XDIS 52ce: MISC BASE D50B8D5C751E lea rbx, ptr [r13+r14*2+0x1e] +XDIS 52d4: MISC BASE D50B8D5C761F lea rbx, ptr [r14+r14*2+0x1f] +XDIS 52da: MISC BASE D50B8D5C7720 lea rbx, ptr [r15+r14*2+0x20] +XDIS 52e0: MISC BASE D51A8D5C7021 lea rbx, ptr [r16+r14*2+0x21] +XDIS 52e6: MISC BASE D51A8D5C7122 lea rbx, ptr [r17+r14*2+0x22] +XDIS 52ec: MISC BASE D51A8D5C7223 lea rbx, ptr [r18+r14*2+0x23] +XDIS 52f2: MISC BASE D51A8D5C7324 lea rbx, ptr [r19+r14*2+0x24] +XDIS 52f8: MISC BASE D51A8D5C7425 lea rbx, ptr [r20+r14*2+0x25] +XDIS 52fe: MISC BASE D51A8D5C7526 lea rbx, ptr [r21+r14*2+0x26] +XDIS 5304: MISC BASE D51A8D5C7627 lea rbx, ptr [r22+r14*2+0x27] +XDIS 530a: MISC BASE D51A8D5C7728 lea rbx, ptr [r23+r14*2+0x28] +XDIS 5310: MISC BASE D51B8D5C7029 lea rbx, ptr [r24+r14*2+0x29] +XDIS 5316: MISC BASE D51B8D5C712A lea rbx, ptr [r25+r14*2+0x2a] +XDIS 531c: MISC BASE D51B8D5C722B lea rbx, ptr [r26+r14*2+0x2b] +XDIS 5322: MISC BASE D51B8D5C732C lea rbx, ptr [r27+r14*2+0x2c] +XDIS 5328: MISC BASE D51B8D5C742D lea rbx, ptr [r28+r14*2+0x2d] +XDIS 532e: MISC BASE D51B8D5C752E lea rbx, ptr [r29+r14*2+0x2e] +XDIS 5334: MISC BASE D51B8D5C762F lea rbx, ptr [r30+r14*2+0x2f] +XDIS 533a: MISC BASE D51B8D5C7730 lea rbx, ptr [r31+r14*2+0x30] +XDIS 5340: MISC BASE D50A8D5C7812 lea rbx, ptr [rax+r15*2+0x12] +XDIS 5346: MISC BASE D50A8D5C7913 lea rbx, ptr [rcx+r15*2+0x13] +XDIS 534c: MISC BASE D50A8D5C7A14 lea rbx, ptr [rdx+r15*2+0x14] +XDIS 5352: MISC BASE D50A8D5C7B15 lea rbx, ptr [rbx+r15*2+0x15] +XDIS 5358: MISC BASE D50A8D5C7C16 lea rbx, ptr [rsp+r15*2+0x16] +XDIS 535e: MISC BASE D50A8D5C7D17 lea rbx, ptr [rbp+r15*2+0x17] +XDIS 5364: MISC BASE D50A8D5C7E18 lea rbx, ptr [rsi+r15*2+0x18] +XDIS 536a: MISC BASE D50A8D5C7F19 lea rbx, ptr [rdi+r15*2+0x19] +XDIS 5370: MISC BASE D50B8D5C781A lea rbx, ptr [r8+r15*2+0x1a] +XDIS 5376: MISC BASE D50B8D5C791B lea rbx, ptr [r9+r15*2+0x1b] +XDIS 537c: MISC BASE D50B8D5C7A1C lea rbx, ptr [r10+r15*2+0x1c] +XDIS 5382: MISC BASE D50B8D5C7B1D lea rbx, ptr [r11+r15*2+0x1d] +XDIS 5388: MISC BASE D50B8D5C7C1E lea rbx, ptr [r12+r15*2+0x1e] +XDIS 538e: MISC BASE D50B8D5C7D1F lea rbx, ptr [r13+r15*2+0x1f] +XDIS 5394: MISC BASE D50B8D5C7E20 lea rbx, ptr [r14+r15*2+0x20] +XDIS 539a: MISC BASE D50B8D5C7F21 lea rbx, ptr [r15+r15*2+0x21] +XDIS 53a0: MISC BASE D51A8D5C7822 lea rbx, ptr [r16+r15*2+0x22] +XDIS 53a6: MISC BASE D51A8D5C7923 lea rbx, ptr [r17+r15*2+0x23] +XDIS 53ac: MISC BASE D51A8D5C7A24 lea rbx, ptr [r18+r15*2+0x24] +XDIS 53b2: MISC BASE D51A8D5C7B25 lea rbx, ptr [r19+r15*2+0x25] +XDIS 53b8: MISC BASE D51A8D5C7C26 lea rbx, ptr [r20+r15*2+0x26] +XDIS 53be: MISC BASE D51A8D5C7D27 lea rbx, ptr [r21+r15*2+0x27] +XDIS 53c4: MISC BASE D51A8D5C7E28 lea rbx, ptr [r22+r15*2+0x28] +XDIS 53ca: MISC BASE D51A8D5C7F29 lea rbx, ptr [r23+r15*2+0x29] +XDIS 53d0: MISC BASE D51B8D5C782A lea rbx, ptr [r24+r15*2+0x2a] +XDIS 53d6: MISC BASE D51B8D5C792B lea rbx, ptr [r25+r15*2+0x2b] +XDIS 53dc: MISC BASE D51B8D5C7A2C lea rbx, ptr [r26+r15*2+0x2c] +XDIS 53e2: MISC BASE D51B8D5C7B2D lea rbx, ptr [r27+r15*2+0x2d] +XDIS 53e8: MISC BASE D51B8D5C7C2E lea rbx, ptr [r28+r15*2+0x2e] +XDIS 53ee: MISC BASE D51B8D5C7D2F lea rbx, ptr [r29+r15*2+0x2f] +XDIS 53f4: MISC BASE D51B8D5C7E30 lea rbx, ptr [r30+r15*2+0x30] +XDIS 53fa: MISC BASE D51B8D5C7F31 lea rbx, ptr [r31+r15*2+0x31] +XDIS 5400: MISC BASE D5288D5C4013 lea rbx, ptr [rax+r16*2+0x13] +XDIS 5406: MISC BASE D5288D5C4114 lea rbx, ptr [rcx+r16*2+0x14] +XDIS 540c: MISC BASE D5288D5C4215 lea rbx, ptr [rdx+r16*2+0x15] +XDIS 5412: MISC BASE D5288D5C4316 lea rbx, ptr [rbx+r16*2+0x16] +XDIS 5418: MISC BASE D5288D5C4417 lea rbx, ptr [rsp+r16*2+0x17] +XDIS 541e: MISC BASE D5288D5C4518 lea rbx, ptr [rbp+r16*2+0x18] +XDIS 5424: MISC BASE D5288D5C4619 lea rbx, ptr [rsi+r16*2+0x19] +XDIS 542a: MISC BASE D5288D5C471A lea rbx, ptr [rdi+r16*2+0x1a] +XDIS 5430: MISC BASE D5298D5C401B lea rbx, ptr [r8+r16*2+0x1b] +XDIS 5436: MISC BASE D5298D5C411C lea rbx, ptr [r9+r16*2+0x1c] +XDIS 543c: MISC BASE D5298D5C421D lea rbx, ptr [r10+r16*2+0x1d] +XDIS 5442: MISC BASE D5298D5C431E lea rbx, ptr [r11+r16*2+0x1e] +XDIS 5448: MISC BASE D5298D5C441F lea rbx, ptr [r12+r16*2+0x1f] +XDIS 544e: MISC BASE D5298D5C4520 lea rbx, ptr [r13+r16*2+0x20] +XDIS 5454: MISC BASE D5298D5C4621 lea rbx, ptr [r14+r16*2+0x21] +XDIS 545a: MISC BASE D5298D5C4722 lea rbx, ptr [r15+r16*2+0x22] +XDIS 5460: MISC BASE D5388D5C4023 lea rbx, ptr [r16+r16*2+0x23] +XDIS 5466: MISC BASE D5388D5C4124 lea rbx, ptr [r17+r16*2+0x24] +XDIS 546c: MISC BASE D5388D5C4225 lea rbx, ptr [r18+r16*2+0x25] +XDIS 5472: MISC BASE D5388D5C4326 lea rbx, ptr [r19+r16*2+0x26] +XDIS 5478: MISC BASE D5388D5C4427 lea rbx, ptr [r20+r16*2+0x27] +XDIS 547e: MISC BASE D5388D5C4528 lea rbx, ptr [r21+r16*2+0x28] +XDIS 5484: MISC BASE D5388D5C4629 lea rbx, ptr [r22+r16*2+0x29] +XDIS 548a: MISC BASE D5388D5C472A lea rbx, ptr [r23+r16*2+0x2a] +XDIS 5490: MISC BASE D5398D5C402B lea rbx, ptr [r24+r16*2+0x2b] +XDIS 5496: MISC BASE D5398D5C412C lea rbx, ptr [r25+r16*2+0x2c] +XDIS 549c: MISC BASE D5398D5C422D lea rbx, ptr [r26+r16*2+0x2d] +XDIS 54a2: MISC BASE D5398D5C432E lea rbx, ptr [r27+r16*2+0x2e] +XDIS 54a8: MISC BASE D5398D5C442F lea rbx, ptr [r28+r16*2+0x2f] +XDIS 54ae: MISC BASE D5398D5C4530 lea rbx, ptr [r29+r16*2+0x30] +XDIS 54b4: MISC BASE D5398D5C4631 lea rbx, ptr [r30+r16*2+0x31] +XDIS 54ba: MISC BASE D5398D5C4732 lea rbx, ptr [r31+r16*2+0x32] +XDIS 54c0: MISC BASE D5288D5C4814 lea rbx, ptr [rax+r17*2+0x14] +XDIS 54c6: MISC BASE D5288D5C4915 lea rbx, ptr [rcx+r17*2+0x15] +XDIS 54cc: MISC BASE D5288D5C4A16 lea rbx, ptr [rdx+r17*2+0x16] +XDIS 54d2: MISC BASE D5288D5C4B17 lea rbx, ptr [rbx+r17*2+0x17] +XDIS 54d8: MISC BASE D5288D5C4C18 lea rbx, ptr [rsp+r17*2+0x18] +XDIS 54de: MISC BASE D5288D5C4D19 lea rbx, ptr [rbp+r17*2+0x19] +XDIS 54e4: MISC BASE D5288D5C4E1A lea rbx, ptr [rsi+r17*2+0x1a] +XDIS 54ea: MISC BASE D5288D5C4F1B lea rbx, ptr [rdi+r17*2+0x1b] +XDIS 54f0: MISC BASE D5298D5C481C lea rbx, ptr [r8+r17*2+0x1c] +XDIS 54f6: MISC BASE D5298D5C491D lea rbx, ptr [r9+r17*2+0x1d] +XDIS 54fc: MISC BASE D5298D5C4A1E lea rbx, ptr [r10+r17*2+0x1e] +XDIS 5502: MISC BASE D5298D5C4B1F lea rbx, ptr [r11+r17*2+0x1f] +XDIS 5508: MISC BASE D5298D5C4C20 lea rbx, ptr [r12+r17*2+0x20] +XDIS 550e: MISC BASE D5298D5C4D21 lea rbx, ptr [r13+r17*2+0x21] +XDIS 5514: MISC BASE D5298D5C4E22 lea rbx, ptr [r14+r17*2+0x22] +XDIS 551a: MISC BASE D5298D5C4F23 lea rbx, ptr [r15+r17*2+0x23] +XDIS 5520: MISC BASE D5388D5C4824 lea rbx, ptr [r16+r17*2+0x24] +XDIS 5526: MISC BASE D5388D5C4925 lea rbx, ptr [r17+r17*2+0x25] +XDIS 552c: MISC BASE D5388D5C4A26 lea rbx, ptr [r18+r17*2+0x26] +XDIS 5532: MISC BASE D5388D5C4B27 lea rbx, ptr [r19+r17*2+0x27] +XDIS 5538: MISC BASE D5388D5C4C28 lea rbx, ptr [r20+r17*2+0x28] +XDIS 553e: MISC BASE D5388D5C4D29 lea rbx, ptr [r21+r17*2+0x29] +XDIS 5544: MISC BASE D5388D5C4E2A lea rbx, ptr [r22+r17*2+0x2a] +XDIS 554a: MISC BASE D5388D5C4F2B lea rbx, ptr [r23+r17*2+0x2b] +XDIS 5550: MISC BASE D5398D5C482C lea rbx, ptr [r24+r17*2+0x2c] +XDIS 5556: MISC BASE D5398D5C492D lea rbx, ptr [r25+r17*2+0x2d] +XDIS 555c: MISC BASE D5398D5C4A2E lea rbx, ptr [r26+r17*2+0x2e] +XDIS 5562: MISC BASE D5398D5C4B2F lea rbx, ptr [r27+r17*2+0x2f] +XDIS 5568: MISC BASE D5398D5C4C30 lea rbx, ptr [r28+r17*2+0x30] +XDIS 556e: MISC BASE D5398D5C4D31 lea rbx, ptr [r29+r17*2+0x31] +XDIS 5574: MISC BASE D5398D5C4E32 lea rbx, ptr [r30+r17*2+0x32] +XDIS 557a: MISC BASE D5398D5C4F33 lea rbx, ptr [r31+r17*2+0x33] +XDIS 5580: MISC BASE D5288D5C5015 lea rbx, ptr [rax+r18*2+0x15] +XDIS 5586: MISC BASE D5288D5C5116 lea rbx, ptr [rcx+r18*2+0x16] +XDIS 558c: MISC BASE D5288D5C5217 lea rbx, ptr [rdx+r18*2+0x17] +XDIS 5592: MISC BASE D5288D5C5318 lea rbx, ptr [rbx+r18*2+0x18] +XDIS 5598: MISC BASE D5288D5C5419 lea rbx, ptr [rsp+r18*2+0x19] +XDIS 559e: MISC BASE D5288D5C551A lea rbx, ptr [rbp+r18*2+0x1a] +XDIS 55a4: MISC BASE D5288D5C561B lea rbx, ptr [rsi+r18*2+0x1b] +XDIS 55aa: MISC BASE D5288D5C571C lea rbx, ptr [rdi+r18*2+0x1c] +XDIS 55b0: MISC BASE D5298D5C501D lea rbx, ptr [r8+r18*2+0x1d] +XDIS 55b6: MISC BASE D5298D5C511E lea rbx, ptr [r9+r18*2+0x1e] +XDIS 55bc: MISC BASE D5298D5C521F lea rbx, ptr [r10+r18*2+0x1f] +XDIS 55c2: MISC BASE D5298D5C5320 lea rbx, ptr [r11+r18*2+0x20] +XDIS 55c8: MISC BASE D5298D5C5421 lea rbx, ptr [r12+r18*2+0x21] +XDIS 55ce: MISC BASE D5298D5C5522 lea rbx, ptr [r13+r18*2+0x22] +XDIS 55d4: MISC BASE D5298D5C5623 lea rbx, ptr [r14+r18*2+0x23] +XDIS 55da: MISC BASE D5298D5C5724 lea rbx, ptr [r15+r18*2+0x24] +XDIS 55e0: MISC BASE D5388D5C5025 lea rbx, ptr [r16+r18*2+0x25] +XDIS 55e6: MISC BASE D5388D5C5126 lea rbx, ptr [r17+r18*2+0x26] +XDIS 55ec: MISC BASE D5388D5C5227 lea rbx, ptr [r18+r18*2+0x27] +XDIS 55f2: MISC BASE D5388D5C5328 lea rbx, ptr [r19+r18*2+0x28] +XDIS 55f8: MISC BASE D5388D5C5429 lea rbx, ptr [r20+r18*2+0x29] +XDIS 55fe: MISC BASE D5388D5C552A lea rbx, ptr [r21+r18*2+0x2a] +XDIS 5604: MISC BASE D5388D5C562B lea rbx, ptr [r22+r18*2+0x2b] +XDIS 560a: MISC BASE D5388D5C572C lea rbx, ptr [r23+r18*2+0x2c] +XDIS 5610: MISC BASE D5398D5C502D lea rbx, ptr [r24+r18*2+0x2d] +XDIS 5616: MISC BASE D5398D5C512E lea rbx, ptr [r25+r18*2+0x2e] +XDIS 561c: MISC BASE D5398D5C522F lea rbx, ptr [r26+r18*2+0x2f] +XDIS 5622: MISC BASE D5398D5C5330 lea rbx, ptr [r27+r18*2+0x30] +XDIS 5628: MISC BASE D5398D5C5431 lea rbx, ptr [r28+r18*2+0x31] +XDIS 562e: MISC BASE D5398D5C5532 lea rbx, ptr [r29+r18*2+0x32] +XDIS 5634: MISC BASE D5398D5C5633 lea rbx, ptr [r30+r18*2+0x33] +XDIS 563a: MISC BASE D5398D5C5734 lea rbx, ptr [r31+r18*2+0x34] +XDIS 5640: MISC BASE D5288D5C5816 lea rbx, ptr [rax+r19*2+0x16] +XDIS 5646: MISC BASE D5288D5C5917 lea rbx, ptr [rcx+r19*2+0x17] +XDIS 564c: MISC BASE D5288D5C5A18 lea rbx, ptr [rdx+r19*2+0x18] +XDIS 5652: MISC BASE D5288D5C5B19 lea rbx, ptr [rbx+r19*2+0x19] +XDIS 5658: MISC BASE D5288D5C5C1A lea rbx, ptr [rsp+r19*2+0x1a] +XDIS 565e: MISC BASE D5288D5C5D1B lea rbx, ptr [rbp+r19*2+0x1b] +XDIS 5664: MISC BASE D5288D5C5E1C lea rbx, ptr [rsi+r19*2+0x1c] +XDIS 566a: MISC BASE D5288D5C5F1D lea rbx, ptr [rdi+r19*2+0x1d] +XDIS 5670: MISC BASE D5298D5C581E lea rbx, ptr [r8+r19*2+0x1e] +XDIS 5676: MISC BASE D5298D5C591F lea rbx, ptr [r9+r19*2+0x1f] +XDIS 567c: MISC BASE D5298D5C5A20 lea rbx, ptr [r10+r19*2+0x20] +XDIS 5682: MISC BASE D5298D5C5B21 lea rbx, ptr [r11+r19*2+0x21] +XDIS 5688: MISC BASE D5298D5C5C22 lea rbx, ptr [r12+r19*2+0x22] +XDIS 568e: MISC BASE D5298D5C5D23 lea rbx, ptr [r13+r19*2+0x23] +XDIS 5694: MISC BASE D5298D5C5E24 lea rbx, ptr [r14+r19*2+0x24] +XDIS 569a: MISC BASE D5298D5C5F25 lea rbx, ptr [r15+r19*2+0x25] +XDIS 56a0: MISC BASE D5388D5C5826 lea rbx, ptr [r16+r19*2+0x26] +XDIS 56a6: MISC BASE D5388D5C5927 lea rbx, ptr [r17+r19*2+0x27] +XDIS 56ac: MISC BASE D5388D5C5A28 lea rbx, ptr [r18+r19*2+0x28] +XDIS 56b2: MISC BASE D5388D5C5B29 lea rbx, ptr [r19+r19*2+0x29] +XDIS 56b8: MISC BASE D5388D5C5C2A lea rbx, ptr [r20+r19*2+0x2a] +XDIS 56be: MISC BASE D5388D5C5D2B lea rbx, ptr [r21+r19*2+0x2b] +XDIS 56c4: MISC BASE D5388D5C5E2C lea rbx, ptr [r22+r19*2+0x2c] +XDIS 56ca: MISC BASE D5388D5C5F2D lea rbx, ptr [r23+r19*2+0x2d] +XDIS 56d0: MISC BASE D5398D5C582E lea rbx, ptr [r24+r19*2+0x2e] +XDIS 56d6: MISC BASE D5398D5C592F lea rbx, ptr [r25+r19*2+0x2f] +XDIS 56dc: MISC BASE D5398D5C5A30 lea rbx, ptr [r26+r19*2+0x30] +XDIS 56e2: MISC BASE D5398D5C5B31 lea rbx, ptr [r27+r19*2+0x31] +XDIS 56e8: MISC BASE D5398D5C5C32 lea rbx, ptr [r28+r19*2+0x32] +XDIS 56ee: MISC BASE D5398D5C5D33 lea rbx, ptr [r29+r19*2+0x33] +XDIS 56f4: MISC BASE D5398D5C5E34 lea rbx, ptr [r30+r19*2+0x34] +XDIS 56fa: MISC BASE D5398D5C5F35 lea rbx, ptr [r31+r19*2+0x35] +XDIS 5700: MISC BASE D5288D5C6017 lea rbx, ptr [rax+r20*2+0x17] +XDIS 5706: MISC BASE D5288D5C6118 lea rbx, ptr [rcx+r20*2+0x18] +XDIS 570c: MISC BASE D5288D5C6219 lea rbx, ptr [rdx+r20*2+0x19] +XDIS 5712: MISC BASE D5288D5C631A lea rbx, ptr [rbx+r20*2+0x1a] +XDIS 5718: MISC BASE D5288D5C641B lea rbx, ptr [rsp+r20*2+0x1b] +XDIS 571e: MISC BASE D5288D5C651C lea rbx, ptr [rbp+r20*2+0x1c] +XDIS 5724: MISC BASE D5288D5C661D lea rbx, ptr [rsi+r20*2+0x1d] +XDIS 572a: MISC BASE D5288D5C671E lea rbx, ptr [rdi+r20*2+0x1e] +XDIS 5730: MISC BASE D5298D5C601F lea rbx, ptr [r8+r20*2+0x1f] +XDIS 5736: MISC BASE D5298D5C6120 lea rbx, ptr [r9+r20*2+0x20] +XDIS 573c: MISC BASE D5298D5C6221 lea rbx, ptr [r10+r20*2+0x21] +XDIS 5742: MISC BASE D5298D5C6322 lea rbx, ptr [r11+r20*2+0x22] +XDIS 5748: MISC BASE D5298D5C6423 lea rbx, ptr [r12+r20*2+0x23] +XDIS 574e: MISC BASE D5298D5C6524 lea rbx, ptr [r13+r20*2+0x24] +XDIS 5754: MISC BASE D5298D5C6625 lea rbx, ptr [r14+r20*2+0x25] +XDIS 575a: MISC BASE D5298D5C6726 lea rbx, ptr [r15+r20*2+0x26] +XDIS 5760: MISC BASE D5388D5C6027 lea rbx, ptr [r16+r20*2+0x27] +XDIS 5766: MISC BASE D5388D5C6128 lea rbx, ptr [r17+r20*2+0x28] +XDIS 576c: MISC BASE D5388D5C6229 lea rbx, ptr [r18+r20*2+0x29] +XDIS 5772: MISC BASE D5388D5C632A lea rbx, ptr [r19+r20*2+0x2a] +XDIS 5778: MISC BASE D5388D5C642B lea rbx, ptr [r20+r20*2+0x2b] +XDIS 577e: MISC BASE D5388D5C652C lea rbx, ptr [r21+r20*2+0x2c] +XDIS 5784: MISC BASE D5388D5C662D lea rbx, ptr [r22+r20*2+0x2d] +XDIS 578a: MISC BASE D5388D5C672E lea rbx, ptr [r23+r20*2+0x2e] +XDIS 5790: MISC BASE D5398D5C602F lea rbx, ptr [r24+r20*2+0x2f] +XDIS 5796: MISC BASE D5398D5C6130 lea rbx, ptr [r25+r20*2+0x30] +XDIS 579c: MISC BASE D5398D5C6231 lea rbx, ptr [r26+r20*2+0x31] +XDIS 57a2: MISC BASE D5398D5C6332 lea rbx, ptr [r27+r20*2+0x32] +XDIS 57a8: MISC BASE D5398D5C6433 lea rbx, ptr [r28+r20*2+0x33] +XDIS 57ae: MISC BASE D5398D5C6534 lea rbx, ptr [r29+r20*2+0x34] +XDIS 57b4: MISC BASE D5398D5C6635 lea rbx, ptr [r30+r20*2+0x35] +XDIS 57ba: MISC BASE D5398D5C6736 lea rbx, ptr [r31+r20*2+0x36] +XDIS 57c0: MISC BASE D5288D5C6818 lea rbx, ptr [rax+r21*2+0x18] +XDIS 57c6: MISC BASE D5288D5C6919 lea rbx, ptr [rcx+r21*2+0x19] +XDIS 57cc: MISC BASE D5288D5C6A1A lea rbx, ptr [rdx+r21*2+0x1a] +XDIS 57d2: MISC BASE D5288D5C6B1B lea rbx, ptr [rbx+r21*2+0x1b] +XDIS 57d8: MISC BASE D5288D5C6C1C lea rbx, ptr [rsp+r21*2+0x1c] +XDIS 57de: MISC BASE D5288D5C6D1D lea rbx, ptr [rbp+r21*2+0x1d] +XDIS 57e4: MISC BASE D5288D5C6E1E lea rbx, ptr [rsi+r21*2+0x1e] +XDIS 57ea: MISC BASE D5288D5C6F1F lea rbx, ptr [rdi+r21*2+0x1f] +XDIS 57f0: MISC BASE D5298D5C6820 lea rbx, ptr [r8+r21*2+0x20] +XDIS 57f6: MISC BASE D5298D5C6921 lea rbx, ptr [r9+r21*2+0x21] +XDIS 57fc: MISC BASE D5298D5C6A22 lea rbx, ptr [r10+r21*2+0x22] +XDIS 5802: MISC BASE D5298D5C6B23 lea rbx, ptr [r11+r21*2+0x23] +XDIS 5808: MISC BASE D5298D5C6C24 lea rbx, ptr [r12+r21*2+0x24] +XDIS 580e: MISC BASE D5298D5C6D25 lea rbx, ptr [r13+r21*2+0x25] +XDIS 5814: MISC BASE D5298D5C6E26 lea rbx, ptr [r14+r21*2+0x26] +XDIS 581a: MISC BASE D5298D5C6F27 lea rbx, ptr [r15+r21*2+0x27] +XDIS 5820: MISC BASE D5388D5C6828 lea rbx, ptr [r16+r21*2+0x28] +XDIS 5826: MISC BASE D5388D5C6929 lea rbx, ptr [r17+r21*2+0x29] +XDIS 582c: MISC BASE D5388D5C6A2A lea rbx, ptr [r18+r21*2+0x2a] +XDIS 5832: MISC BASE D5388D5C6B2B lea rbx, ptr [r19+r21*2+0x2b] +XDIS 5838: MISC BASE D5388D5C6C2C lea rbx, ptr [r20+r21*2+0x2c] +XDIS 583e: MISC BASE D5388D5C6D2D lea rbx, ptr [r21+r21*2+0x2d] +XDIS 5844: MISC BASE D5388D5C6E2E lea rbx, ptr [r22+r21*2+0x2e] +XDIS 584a: MISC BASE D5388D5C6F2F lea rbx, ptr [r23+r21*2+0x2f] +XDIS 5850: MISC BASE D5398D5C6830 lea rbx, ptr [r24+r21*2+0x30] +XDIS 5856: MISC BASE D5398D5C6931 lea rbx, ptr [r25+r21*2+0x31] +XDIS 585c: MISC BASE D5398D5C6A32 lea rbx, ptr [r26+r21*2+0x32] +XDIS 5862: MISC BASE D5398D5C6B33 lea rbx, ptr [r27+r21*2+0x33] +XDIS 5868: MISC BASE D5398D5C6C34 lea rbx, ptr [r28+r21*2+0x34] +XDIS 586e: MISC BASE D5398D5C6D35 lea rbx, ptr [r29+r21*2+0x35] +XDIS 5874: MISC BASE D5398D5C6E36 lea rbx, ptr [r30+r21*2+0x36] +XDIS 587a: MISC BASE D5398D5C6F37 lea rbx, ptr [r31+r21*2+0x37] +XDIS 5880: MISC BASE D5288D5C7019 lea rbx, ptr [rax+r22*2+0x19] +XDIS 5886: MISC BASE D5288D5C711A lea rbx, ptr [rcx+r22*2+0x1a] +XDIS 588c: MISC BASE D5288D5C721B lea rbx, ptr [rdx+r22*2+0x1b] +XDIS 5892: MISC BASE D5288D5C731C lea rbx, ptr [rbx+r22*2+0x1c] +XDIS 5898: MISC BASE D5288D5C741D lea rbx, ptr [rsp+r22*2+0x1d] +XDIS 589e: MISC BASE D5288D5C751E lea rbx, ptr [rbp+r22*2+0x1e] +XDIS 58a4: MISC BASE D5288D5C761F lea rbx, ptr [rsi+r22*2+0x1f] +XDIS 58aa: MISC BASE D5288D5C7720 lea rbx, ptr [rdi+r22*2+0x20] +XDIS 58b0: MISC BASE D5298D5C7021 lea rbx, ptr [r8+r22*2+0x21] +XDIS 58b6: MISC BASE D5298D5C7122 lea rbx, ptr [r9+r22*2+0x22] +XDIS 58bc: MISC BASE D5298D5C7223 lea rbx, ptr [r10+r22*2+0x23] +XDIS 58c2: MISC BASE D5298D5C7324 lea rbx, ptr [r11+r22*2+0x24] +XDIS 58c8: MISC BASE D5298D5C7425 lea rbx, ptr [r12+r22*2+0x25] +XDIS 58ce: MISC BASE D5298D5C7526 lea rbx, ptr [r13+r22*2+0x26] +XDIS 58d4: MISC BASE D5298D5C7627 lea rbx, ptr [r14+r22*2+0x27] +XDIS 58da: MISC BASE D5298D5C7728 lea rbx, ptr [r15+r22*2+0x28] +XDIS 58e0: MISC BASE D5388D5C7029 lea rbx, ptr [r16+r22*2+0x29] +XDIS 58e6: MISC BASE D5388D5C712A lea rbx, ptr [r17+r22*2+0x2a] +XDIS 58ec: MISC BASE D5388D5C722B lea rbx, ptr [r18+r22*2+0x2b] +XDIS 58f2: MISC BASE D5388D5C732C lea rbx, ptr [r19+r22*2+0x2c] +XDIS 58f8: MISC BASE D5388D5C742D lea rbx, ptr [r20+r22*2+0x2d] +XDIS 58fe: MISC BASE D5388D5C752E lea rbx, ptr [r21+r22*2+0x2e] +XDIS 5904: MISC BASE D5388D5C762F lea rbx, ptr [r22+r22*2+0x2f] +XDIS 590a: MISC BASE D5388D5C7730 lea rbx, ptr [r23+r22*2+0x30] +XDIS 5910: MISC BASE D5398D5C7031 lea rbx, ptr [r24+r22*2+0x31] +XDIS 5916: MISC BASE D5398D5C7132 lea rbx, ptr [r25+r22*2+0x32] +XDIS 591c: MISC BASE D5398D5C7233 lea rbx, ptr [r26+r22*2+0x33] +XDIS 5922: MISC BASE D5398D5C7334 lea rbx, ptr [r27+r22*2+0x34] +XDIS 5928: MISC BASE D5398D5C7435 lea rbx, ptr [r28+r22*2+0x35] +XDIS 592e: MISC BASE D5398D5C7536 lea rbx, ptr [r29+r22*2+0x36] +XDIS 5934: MISC BASE D5398D5C7637 lea rbx, ptr [r30+r22*2+0x37] +XDIS 593a: MISC BASE D5398D5C7738 lea rbx, ptr [r31+r22*2+0x38] +XDIS 5940: MISC BASE D5288D5C781A lea rbx, ptr [rax+r23*2+0x1a] +XDIS 5946: MISC BASE D5288D5C791B lea rbx, ptr [rcx+r23*2+0x1b] +XDIS 594c: MISC BASE D5288D5C7A1C lea rbx, ptr [rdx+r23*2+0x1c] +XDIS 5952: MISC BASE D5288D5C7B1D lea rbx, ptr [rbx+r23*2+0x1d] +XDIS 5958: MISC BASE D5288D5C7C1E lea rbx, ptr [rsp+r23*2+0x1e] +XDIS 595e: MISC BASE D5288D5C7D1F lea rbx, ptr [rbp+r23*2+0x1f] +XDIS 5964: MISC BASE D5288D5C7E20 lea rbx, ptr [rsi+r23*2+0x20] +XDIS 596a: MISC BASE D5288D5C7F21 lea rbx, ptr [rdi+r23*2+0x21] +XDIS 5970: MISC BASE D5298D5C7822 lea rbx, ptr [r8+r23*2+0x22] +XDIS 5976: MISC BASE D5298D5C7923 lea rbx, ptr [r9+r23*2+0x23] +XDIS 597c: MISC BASE D5298D5C7A24 lea rbx, ptr [r10+r23*2+0x24] +XDIS 5982: MISC BASE D5298D5C7B25 lea rbx, ptr [r11+r23*2+0x25] +XDIS 5988: MISC BASE D5298D5C7C26 lea rbx, ptr [r12+r23*2+0x26] +XDIS 598e: MISC BASE D5298D5C7D27 lea rbx, ptr [r13+r23*2+0x27] +XDIS 5994: MISC BASE D5298D5C7E28 lea rbx, ptr [r14+r23*2+0x28] +XDIS 599a: MISC BASE D5298D5C7F29 lea rbx, ptr [r15+r23*2+0x29] +XDIS 59a0: MISC BASE D5388D5C782A lea rbx, ptr [r16+r23*2+0x2a] +XDIS 59a6: MISC BASE D5388D5C792B lea rbx, ptr [r17+r23*2+0x2b] +XDIS 59ac: MISC BASE D5388D5C7A2C lea rbx, ptr [r18+r23*2+0x2c] +XDIS 59b2: MISC BASE D5388D5C7B2D lea rbx, ptr [r19+r23*2+0x2d] +XDIS 59b8: MISC BASE D5388D5C7C2E lea rbx, ptr [r20+r23*2+0x2e] +XDIS 59be: MISC BASE D5388D5C7D2F lea rbx, ptr [r21+r23*2+0x2f] +XDIS 59c4: MISC BASE D5388D5C7E30 lea rbx, ptr [r22+r23*2+0x30] +XDIS 59ca: MISC BASE D5388D5C7F31 lea rbx, ptr [r23+r23*2+0x31] +XDIS 59d0: MISC BASE D5398D5C7832 lea rbx, ptr [r24+r23*2+0x32] +XDIS 59d6: MISC BASE D5398D5C7933 lea rbx, ptr [r25+r23*2+0x33] +XDIS 59dc: MISC BASE D5398D5C7A34 lea rbx, ptr [r26+r23*2+0x34] +XDIS 59e2: MISC BASE D5398D5C7B35 lea rbx, ptr [r27+r23*2+0x35] +XDIS 59e8: MISC BASE D5398D5C7C36 lea rbx, ptr [r28+r23*2+0x36] +XDIS 59ee: MISC BASE D5398D5C7D37 lea rbx, ptr [r29+r23*2+0x37] +XDIS 59f4: MISC BASE D5398D5C7E38 lea rbx, ptr [r30+r23*2+0x38] +XDIS 59fa: MISC BASE D5398D5C7F39 lea rbx, ptr [r31+r23*2+0x39] +XDIS 5a00: MISC BASE D52A8D5C401B lea rbx, ptr [rax+r24*2+0x1b] +XDIS 5a06: MISC BASE D52A8D5C411C lea rbx, ptr [rcx+r24*2+0x1c] +XDIS 5a0c: MISC BASE D52A8D5C421D lea rbx, ptr [rdx+r24*2+0x1d] +XDIS 5a12: MISC BASE D52A8D5C431E lea rbx, ptr [rbx+r24*2+0x1e] +XDIS 5a18: MISC BASE D52A8D5C441F lea rbx, ptr [rsp+r24*2+0x1f] +XDIS 5a1e: MISC BASE D52A8D5C4520 lea rbx, ptr [rbp+r24*2+0x20] +XDIS 5a24: MISC BASE D52A8D5C4621 lea rbx, ptr [rsi+r24*2+0x21] +XDIS 5a2a: MISC BASE D52A8D5C4722 lea rbx, ptr [rdi+r24*2+0x22] +XDIS 5a30: MISC BASE D52B8D5C4023 lea rbx, ptr [r8+r24*2+0x23] +XDIS 5a36: MISC BASE D52B8D5C4124 lea rbx, ptr [r9+r24*2+0x24] +XDIS 5a3c: MISC BASE D52B8D5C4225 lea rbx, ptr [r10+r24*2+0x25] +XDIS 5a42: MISC BASE D52B8D5C4326 lea rbx, ptr [r11+r24*2+0x26] +XDIS 5a48: MISC BASE D52B8D5C4427 lea rbx, ptr [r12+r24*2+0x27] +XDIS 5a4e: MISC BASE D52B8D5C4528 lea rbx, ptr [r13+r24*2+0x28] +XDIS 5a54: MISC BASE D52B8D5C4629 lea rbx, ptr [r14+r24*2+0x29] +XDIS 5a5a: MISC BASE D52B8D5C472A lea rbx, ptr [r15+r24*2+0x2a] +XDIS 5a60: MISC BASE D53A8D5C402B lea rbx, ptr [r16+r24*2+0x2b] +XDIS 5a66: MISC BASE D53A8D5C412C lea rbx, ptr [r17+r24*2+0x2c] +XDIS 5a6c: MISC BASE D53A8D5C422D lea rbx, ptr [r18+r24*2+0x2d] +XDIS 5a72: MISC BASE D53A8D5C432E lea rbx, ptr [r19+r24*2+0x2e] +XDIS 5a78: MISC BASE D53A8D5C442F lea rbx, ptr [r20+r24*2+0x2f] +XDIS 5a7e: MISC BASE D53A8D5C4530 lea rbx, ptr [r21+r24*2+0x30] +XDIS 5a84: MISC BASE D53A8D5C4631 lea rbx, ptr [r22+r24*2+0x31] +XDIS 5a8a: MISC BASE D53A8D5C4732 lea rbx, ptr [r23+r24*2+0x32] +XDIS 5a90: MISC BASE D53B8D5C4033 lea rbx, ptr [r24+r24*2+0x33] +XDIS 5a96: MISC BASE D53B8D5C4134 lea rbx, ptr [r25+r24*2+0x34] +XDIS 5a9c: MISC BASE D53B8D5C4235 lea rbx, ptr [r26+r24*2+0x35] +XDIS 5aa2: MISC BASE D53B8D5C4336 lea rbx, ptr [r27+r24*2+0x36] +XDIS 5aa8: MISC BASE D53B8D5C4437 lea rbx, ptr [r28+r24*2+0x37] +XDIS 5aae: MISC BASE D53B8D5C4538 lea rbx, ptr [r29+r24*2+0x38] +XDIS 5ab4: MISC BASE D53B8D5C4639 lea rbx, ptr [r30+r24*2+0x39] +XDIS 5aba: MISC BASE D53B8D5C473A lea rbx, ptr [r31+r24*2+0x3a] +XDIS 5ac0: MISC BASE D52A8D5C481C lea rbx, ptr [rax+r25*2+0x1c] +XDIS 5ac6: MISC BASE D52A8D5C491D lea rbx, ptr [rcx+r25*2+0x1d] +XDIS 5acc: MISC BASE D52A8D5C4A1E lea rbx, ptr [rdx+r25*2+0x1e] +XDIS 5ad2: MISC BASE D52A8D5C4B1F lea rbx, ptr [rbx+r25*2+0x1f] +XDIS 5ad8: MISC BASE D52A8D5C4C20 lea rbx, ptr [rsp+r25*2+0x20] +XDIS 5ade: MISC BASE D52A8D5C4D21 lea rbx, ptr [rbp+r25*2+0x21] +XDIS 5ae4: MISC BASE D52A8D5C4E22 lea rbx, ptr [rsi+r25*2+0x22] +XDIS 5aea: MISC BASE D52A8D5C4F23 lea rbx, ptr [rdi+r25*2+0x23] +XDIS 5af0: MISC BASE D52B8D5C4824 lea rbx, ptr [r8+r25*2+0x24] +XDIS 5af6: MISC BASE D52B8D5C4925 lea rbx, ptr [r9+r25*2+0x25] +XDIS 5afc: MISC BASE D52B8D5C4A26 lea rbx, ptr [r10+r25*2+0x26] +XDIS 5b02: MISC BASE D52B8D5C4B27 lea rbx, ptr [r11+r25*2+0x27] +XDIS 5b08: MISC BASE D52B8D5C4C28 lea rbx, ptr [r12+r25*2+0x28] +XDIS 5b0e: MISC BASE D52B8D5C4D29 lea rbx, ptr [r13+r25*2+0x29] +XDIS 5b14: MISC BASE D52B8D5C4E2A lea rbx, ptr [r14+r25*2+0x2a] +XDIS 5b1a: MISC BASE D52B8D5C4F2B lea rbx, ptr [r15+r25*2+0x2b] +XDIS 5b20: MISC BASE D53A8D5C482C lea rbx, ptr [r16+r25*2+0x2c] +XDIS 5b26: MISC BASE D53A8D5C492D lea rbx, ptr [r17+r25*2+0x2d] +XDIS 5b2c: MISC BASE D53A8D5C4A2E lea rbx, ptr [r18+r25*2+0x2e] +XDIS 5b32: MISC BASE D53A8D5C4B2F lea rbx, ptr [r19+r25*2+0x2f] +XDIS 5b38: MISC BASE D53A8D5C4C30 lea rbx, ptr [r20+r25*2+0x30] +XDIS 5b3e: MISC BASE D53A8D5C4D31 lea rbx, ptr [r21+r25*2+0x31] +XDIS 5b44: MISC BASE D53A8D5C4E32 lea rbx, ptr [r22+r25*2+0x32] +XDIS 5b4a: MISC BASE D53A8D5C4F33 lea rbx, ptr [r23+r25*2+0x33] +XDIS 5b50: MISC BASE D53B8D5C4834 lea rbx, ptr [r24+r25*2+0x34] +XDIS 5b56: MISC BASE D53B8D5C4935 lea rbx, ptr [r25+r25*2+0x35] +XDIS 5b5c: MISC BASE D53B8D5C4A36 lea rbx, ptr [r26+r25*2+0x36] +XDIS 5b62: MISC BASE D53B8D5C4B37 lea rbx, ptr [r27+r25*2+0x37] +XDIS 5b68: MISC BASE D53B8D5C4C38 lea rbx, ptr [r28+r25*2+0x38] +XDIS 5b6e: MISC BASE D53B8D5C4D39 lea rbx, ptr [r29+r25*2+0x39] +XDIS 5b74: MISC BASE D53B8D5C4E3A lea rbx, ptr [r30+r25*2+0x3a] +XDIS 5b7a: MISC BASE D53B8D5C4F3B lea rbx, ptr [r31+r25*2+0x3b] +XDIS 5b80: MISC BASE D52A8D5C501D lea rbx, ptr [rax+r26*2+0x1d] +XDIS 5b86: MISC BASE D52A8D5C511E lea rbx, ptr [rcx+r26*2+0x1e] +XDIS 5b8c: MISC BASE D52A8D5C521F lea rbx, ptr [rdx+r26*2+0x1f] +XDIS 5b92: MISC BASE D52A8D5C5320 lea rbx, ptr [rbx+r26*2+0x20] +XDIS 5b98: MISC BASE D52A8D5C5421 lea rbx, ptr [rsp+r26*2+0x21] +XDIS 5b9e: MISC BASE D52A8D5C5522 lea rbx, ptr [rbp+r26*2+0x22] +XDIS 5ba4: MISC BASE D52A8D5C5623 lea rbx, ptr [rsi+r26*2+0x23] +XDIS 5baa: MISC BASE D52A8D5C5724 lea rbx, ptr [rdi+r26*2+0x24] +XDIS 5bb0: MISC BASE D52B8D5C5025 lea rbx, ptr [r8+r26*2+0x25] +XDIS 5bb6: MISC BASE D52B8D5C5126 lea rbx, ptr [r9+r26*2+0x26] +XDIS 5bbc: MISC BASE D52B8D5C5227 lea rbx, ptr [r10+r26*2+0x27] +XDIS 5bc2: MISC BASE D52B8D5C5328 lea rbx, ptr [r11+r26*2+0x28] +XDIS 5bc8: MISC BASE D52B8D5C5429 lea rbx, ptr [r12+r26*2+0x29] +XDIS 5bce: MISC BASE D52B8D5C552A lea rbx, ptr [r13+r26*2+0x2a] +XDIS 5bd4: MISC BASE D52B8D5C562B lea rbx, ptr [r14+r26*2+0x2b] +XDIS 5bda: MISC BASE D52B8D5C572C lea rbx, ptr [r15+r26*2+0x2c] +XDIS 5be0: MISC BASE D53A8D5C502D lea rbx, ptr [r16+r26*2+0x2d] +XDIS 5be6: MISC BASE D53A8D5C512E lea rbx, ptr [r17+r26*2+0x2e] +XDIS 5bec: MISC BASE D53A8D5C522F lea rbx, ptr [r18+r26*2+0x2f] +XDIS 5bf2: MISC BASE D53A8D5C5330 lea rbx, ptr [r19+r26*2+0x30] +XDIS 5bf8: MISC BASE D53A8D5C5431 lea rbx, ptr [r20+r26*2+0x31] +XDIS 5bfe: MISC BASE D53A8D5C5532 lea rbx, ptr [r21+r26*2+0x32] +XDIS 5c04: MISC BASE D53A8D5C5633 lea rbx, ptr [r22+r26*2+0x33] +XDIS 5c0a: MISC BASE D53A8D5C5734 lea rbx, ptr [r23+r26*2+0x34] +XDIS 5c10: MISC BASE D53B8D5C5035 lea rbx, ptr [r24+r26*2+0x35] +XDIS 5c16: MISC BASE D53B8D5C5136 lea rbx, ptr [r25+r26*2+0x36] +XDIS 5c1c: MISC BASE D53B8D5C5237 lea rbx, ptr [r26+r26*2+0x37] +XDIS 5c22: MISC BASE D53B8D5C5338 lea rbx, ptr [r27+r26*2+0x38] +XDIS 5c28: MISC BASE D53B8D5C5439 lea rbx, ptr [r28+r26*2+0x39] +XDIS 5c2e: MISC BASE D53B8D5C553A lea rbx, ptr [r29+r26*2+0x3a] +XDIS 5c34: MISC BASE D53B8D5C563B lea rbx, ptr [r30+r26*2+0x3b] +XDIS 5c3a: MISC BASE D53B8D5C573C lea rbx, ptr [r31+r26*2+0x3c] +XDIS 5c40: MISC BASE D52A8D5C581E lea rbx, ptr [rax+r27*2+0x1e] +XDIS 5c46: MISC BASE D52A8D5C591F lea rbx, ptr [rcx+r27*2+0x1f] +XDIS 5c4c: MISC BASE D52A8D5C5A20 lea rbx, ptr [rdx+r27*2+0x20] +XDIS 5c52: MISC BASE D52A8D5C5B21 lea rbx, ptr [rbx+r27*2+0x21] +XDIS 5c58: MISC BASE D52A8D5C5C22 lea rbx, ptr [rsp+r27*2+0x22] +XDIS 5c5e: MISC BASE D52A8D5C5D23 lea rbx, ptr [rbp+r27*2+0x23] +XDIS 5c64: MISC BASE D52A8D5C5E24 lea rbx, ptr [rsi+r27*2+0x24] +XDIS 5c6a: MISC BASE D52A8D5C5F25 lea rbx, ptr [rdi+r27*2+0x25] +XDIS 5c70: MISC BASE D52B8D5C5826 lea rbx, ptr [r8+r27*2+0x26] +XDIS 5c76: MISC BASE D52B8D5C5927 lea rbx, ptr [r9+r27*2+0x27] +XDIS 5c7c: MISC BASE D52B8D5C5A28 lea rbx, ptr [r10+r27*2+0x28] +XDIS 5c82: MISC BASE D52B8D5C5B29 lea rbx, ptr [r11+r27*2+0x29] +XDIS 5c88: MISC BASE D52B8D5C5C2A lea rbx, ptr [r12+r27*2+0x2a] +XDIS 5c8e: MISC BASE D52B8D5C5D2B lea rbx, ptr [r13+r27*2+0x2b] +XDIS 5c94: MISC BASE D52B8D5C5E2C lea rbx, ptr [r14+r27*2+0x2c] +XDIS 5c9a: MISC BASE D52B8D5C5F2D lea rbx, ptr [r15+r27*2+0x2d] +XDIS 5ca0: MISC BASE D53A8D5C582E lea rbx, ptr [r16+r27*2+0x2e] +XDIS 5ca6: MISC BASE D53A8D5C592F lea rbx, ptr [r17+r27*2+0x2f] +XDIS 5cac: MISC BASE D53A8D5C5A30 lea rbx, ptr [r18+r27*2+0x30] +XDIS 5cb2: MISC BASE D53A8D5C5B31 lea rbx, ptr [r19+r27*2+0x31] +XDIS 5cb8: MISC BASE D53A8D5C5C32 lea rbx, ptr [r20+r27*2+0x32] +XDIS 5cbe: MISC BASE D53A8D5C5D33 lea rbx, ptr [r21+r27*2+0x33] +XDIS 5cc4: MISC BASE D53A8D5C5E34 lea rbx, ptr [r22+r27*2+0x34] +XDIS 5cca: MISC BASE D53A8D5C5F35 lea rbx, ptr [r23+r27*2+0x35] +XDIS 5cd0: MISC BASE D53B8D5C5836 lea rbx, ptr [r24+r27*2+0x36] +XDIS 5cd6: MISC BASE D53B8D5C5937 lea rbx, ptr [r25+r27*2+0x37] +XDIS 5cdc: MISC BASE D53B8D5C5A38 lea rbx, ptr [r26+r27*2+0x38] +XDIS 5ce2: MISC BASE D53B8D5C5B39 lea rbx, ptr [r27+r27*2+0x39] +XDIS 5ce8: MISC BASE D53B8D5C5C3A lea rbx, ptr [r28+r27*2+0x3a] +XDIS 5cee: MISC BASE D53B8D5C5D3B lea rbx, ptr [r29+r27*2+0x3b] +XDIS 5cf4: MISC BASE D53B8D5C5E3C lea rbx, ptr [r30+r27*2+0x3c] +XDIS 5cfa: MISC BASE D53B8D5C5F3D lea rbx, ptr [r31+r27*2+0x3d] +XDIS 5d00: MISC BASE D52A8D5C601F lea rbx, ptr [rax+r28*2+0x1f] +XDIS 5d06: MISC BASE D52A8D5C6120 lea rbx, ptr [rcx+r28*2+0x20] +XDIS 5d0c: MISC BASE D52A8D5C6221 lea rbx, ptr [rdx+r28*2+0x21] +XDIS 5d12: MISC BASE D52A8D5C6322 lea rbx, ptr [rbx+r28*2+0x22] +XDIS 5d18: MISC BASE D52A8D5C6423 lea rbx, ptr [rsp+r28*2+0x23] +XDIS 5d1e: MISC BASE D52A8D5C6524 lea rbx, ptr [rbp+r28*2+0x24] +XDIS 5d24: MISC BASE D52A8D5C6625 lea rbx, ptr [rsi+r28*2+0x25] +XDIS 5d2a: MISC BASE D52A8D5C6726 lea rbx, ptr [rdi+r28*2+0x26] +XDIS 5d30: MISC BASE D52B8D5C6027 lea rbx, ptr [r8+r28*2+0x27] +XDIS 5d36: MISC BASE D52B8D5C6128 lea rbx, ptr [r9+r28*2+0x28] +XDIS 5d3c: MISC BASE D52B8D5C6229 lea rbx, ptr [r10+r28*2+0x29] +XDIS 5d42: MISC BASE D52B8D5C632A lea rbx, ptr [r11+r28*2+0x2a] +XDIS 5d48: MISC BASE D52B8D5C642B lea rbx, ptr [r12+r28*2+0x2b] +XDIS 5d4e: MISC BASE D52B8D5C652C lea rbx, ptr [r13+r28*2+0x2c] +XDIS 5d54: MISC BASE D52B8D5C662D lea rbx, ptr [r14+r28*2+0x2d] +XDIS 5d5a: MISC BASE D52B8D5C672E lea rbx, ptr [r15+r28*2+0x2e] +XDIS 5d60: MISC BASE D53A8D5C602F lea rbx, ptr [r16+r28*2+0x2f] +XDIS 5d66: MISC BASE D53A8D5C6130 lea rbx, ptr [r17+r28*2+0x30] +XDIS 5d6c: MISC BASE D53A8D5C6231 lea rbx, ptr [r18+r28*2+0x31] +XDIS 5d72: MISC BASE D53A8D5C6332 lea rbx, ptr [r19+r28*2+0x32] +XDIS 5d78: MISC BASE D53A8D5C6433 lea rbx, ptr [r20+r28*2+0x33] +XDIS 5d7e: MISC BASE D53A8D5C6534 lea rbx, ptr [r21+r28*2+0x34] +XDIS 5d84: MISC BASE D53A8D5C6635 lea rbx, ptr [r22+r28*2+0x35] +XDIS 5d8a: MISC BASE D53A8D5C6736 lea rbx, ptr [r23+r28*2+0x36] +XDIS 5d90: MISC BASE D53B8D5C6037 lea rbx, ptr [r24+r28*2+0x37] +XDIS 5d96: MISC BASE D53B8D5C6138 lea rbx, ptr [r25+r28*2+0x38] +XDIS 5d9c: MISC BASE D53B8D5C6239 lea rbx, ptr [r26+r28*2+0x39] +XDIS 5da2: MISC BASE D53B8D5C633A lea rbx, ptr [r27+r28*2+0x3a] +XDIS 5da8: MISC BASE D53B8D5C643B lea rbx, ptr [r28+r28*2+0x3b] +XDIS 5dae: MISC BASE D53B8D5C653C lea rbx, ptr [r29+r28*2+0x3c] +XDIS 5db4: MISC BASE D53B8D5C663D lea rbx, ptr [r30+r28*2+0x3d] +XDIS 5dba: MISC BASE D53B8D5C673E lea rbx, ptr [r31+r28*2+0x3e] +XDIS 5dc0: MISC BASE D52A8D5C6820 lea rbx, ptr [rax+r29*2+0x20] +XDIS 5dc6: MISC BASE D52A8D5C6921 lea rbx, ptr [rcx+r29*2+0x21] +XDIS 5dcc: MISC BASE D52A8D5C6A22 lea rbx, ptr [rdx+r29*2+0x22] +XDIS 5dd2: MISC BASE D52A8D5C6B23 lea rbx, ptr [rbx+r29*2+0x23] +XDIS 5dd8: MISC BASE D52A8D5C6C24 lea rbx, ptr [rsp+r29*2+0x24] +XDIS 5dde: MISC BASE D52A8D5C6D25 lea rbx, ptr [rbp+r29*2+0x25] +XDIS 5de4: MISC BASE D52A8D5C6E26 lea rbx, ptr [rsi+r29*2+0x26] +XDIS 5dea: MISC BASE D52A8D5C6F27 lea rbx, ptr [rdi+r29*2+0x27] +XDIS 5df0: MISC BASE D52B8D5C6828 lea rbx, ptr [r8+r29*2+0x28] +XDIS 5df6: MISC BASE D52B8D5C6929 lea rbx, ptr [r9+r29*2+0x29] +XDIS 5dfc: MISC BASE D52B8D5C6A2A lea rbx, ptr [r10+r29*2+0x2a] +XDIS 5e02: MISC BASE D52B8D5C6B2B lea rbx, ptr [r11+r29*2+0x2b] +XDIS 5e08: MISC BASE D52B8D5C6C2C lea rbx, ptr [r12+r29*2+0x2c] +XDIS 5e0e: MISC BASE D52B8D5C6D2D lea rbx, ptr [r13+r29*2+0x2d] +XDIS 5e14: MISC BASE D52B8D5C6E2E lea rbx, ptr [r14+r29*2+0x2e] +XDIS 5e1a: MISC BASE D52B8D5C6F2F lea rbx, ptr [r15+r29*2+0x2f] +XDIS 5e20: MISC BASE D53A8D5C6830 lea rbx, ptr [r16+r29*2+0x30] +XDIS 5e26: MISC BASE D53A8D5C6931 lea rbx, ptr [r17+r29*2+0x31] +XDIS 5e2c: MISC BASE D53A8D5C6A32 lea rbx, ptr [r18+r29*2+0x32] +XDIS 5e32: MISC BASE D53A8D5C6B33 lea rbx, ptr [r19+r29*2+0x33] +XDIS 5e38: MISC BASE D53A8D5C6C34 lea rbx, ptr [r20+r29*2+0x34] +XDIS 5e3e: MISC BASE D53A8D5C6D35 lea rbx, ptr [r21+r29*2+0x35] +XDIS 5e44: MISC BASE D53A8D5C6E36 lea rbx, ptr [r22+r29*2+0x36] +XDIS 5e4a: MISC BASE D53A8D5C6F37 lea rbx, ptr [r23+r29*2+0x37] +XDIS 5e50: MISC BASE D53B8D5C6838 lea rbx, ptr [r24+r29*2+0x38] +XDIS 5e56: MISC BASE D53B8D5C6939 lea rbx, ptr [r25+r29*2+0x39] +XDIS 5e5c: MISC BASE D53B8D5C6A3A lea rbx, ptr [r26+r29*2+0x3a] +XDIS 5e62: MISC BASE D53B8D5C6B3B lea rbx, ptr [r27+r29*2+0x3b] +XDIS 5e68: MISC BASE D53B8D5C6C3C lea rbx, ptr [r28+r29*2+0x3c] +XDIS 5e6e: MISC BASE D53B8D5C6D3D lea rbx, ptr [r29+r29*2+0x3d] +XDIS 5e74: MISC BASE D53B8D5C6E3E lea rbx, ptr [r30+r29*2+0x3e] +XDIS 5e7a: MISC BASE D53B8D5C6F3F lea rbx, ptr [r31+r29*2+0x3f] +XDIS 5e80: MISC BASE D52A8D5C7021 lea rbx, ptr [rax+r30*2+0x21] +XDIS 5e86: MISC BASE D52A8D5C7122 lea rbx, ptr [rcx+r30*2+0x22] +XDIS 5e8c: MISC BASE D52A8D5C7223 lea rbx, ptr [rdx+r30*2+0x23] +XDIS 5e92: MISC BASE D52A8D5C7324 lea rbx, ptr [rbx+r30*2+0x24] +XDIS 5e98: MISC BASE D52A8D5C7425 lea rbx, ptr [rsp+r30*2+0x25] +XDIS 5e9e: MISC BASE D52A8D5C7526 lea rbx, ptr [rbp+r30*2+0x26] +XDIS 5ea4: MISC BASE D52A8D5C7627 lea rbx, ptr [rsi+r30*2+0x27] +XDIS 5eaa: MISC BASE D52A8D5C7728 lea rbx, ptr [rdi+r30*2+0x28] +XDIS 5eb0: MISC BASE D52B8D5C7029 lea rbx, ptr [r8+r30*2+0x29] +XDIS 5eb6: MISC BASE D52B8D5C712A lea rbx, ptr [r9+r30*2+0x2a] +XDIS 5ebc: MISC BASE D52B8D5C722B lea rbx, ptr [r10+r30*2+0x2b] +XDIS 5ec2: MISC BASE D52B8D5C732C lea rbx, ptr [r11+r30*2+0x2c] +XDIS 5ec8: MISC BASE D52B8D5C742D lea rbx, ptr [r12+r30*2+0x2d] +XDIS 5ece: MISC BASE D52B8D5C752E lea rbx, ptr [r13+r30*2+0x2e] +XDIS 5ed4: MISC BASE D52B8D5C762F lea rbx, ptr [r14+r30*2+0x2f] +XDIS 5eda: MISC BASE D52B8D5C7730 lea rbx, ptr [r15+r30*2+0x30] +XDIS 5ee0: MISC BASE D53A8D5C7031 lea rbx, ptr [r16+r30*2+0x31] +XDIS 5ee6: MISC BASE D53A8D5C7132 lea rbx, ptr [r17+r30*2+0x32] +XDIS 5eec: MISC BASE D53A8D5C7233 lea rbx, ptr [r18+r30*2+0x33] +XDIS 5ef2: MISC BASE D53A8D5C7334 lea rbx, ptr [r19+r30*2+0x34] +XDIS 5ef8: MISC BASE D53A8D5C7435 lea rbx, ptr [r20+r30*2+0x35] +XDIS 5efe: MISC BASE D53A8D5C7536 lea rbx, ptr [r21+r30*2+0x36] +XDIS 5f04: MISC BASE D53A8D5C7637 lea rbx, ptr [r22+r30*2+0x37] +XDIS 5f0a: MISC BASE D53A8D5C7738 lea rbx, ptr [r23+r30*2+0x38] +XDIS 5f10: MISC BASE D53B8D5C7039 lea rbx, ptr [r24+r30*2+0x39] +XDIS 5f16: MISC BASE D53B8D5C713A lea rbx, ptr [r25+r30*2+0x3a] +XDIS 5f1c: MISC BASE D53B8D5C723B lea rbx, ptr [r26+r30*2+0x3b] +XDIS 5f22: MISC BASE D53B8D5C733C lea rbx, ptr [r27+r30*2+0x3c] +XDIS 5f28: MISC BASE D53B8D5C743D lea rbx, ptr [r28+r30*2+0x3d] +XDIS 5f2e: MISC BASE D53B8D5C753E lea rbx, ptr [r29+r30*2+0x3e] +XDIS 5f34: MISC BASE D53B8D5C763F lea rbx, ptr [r30+r30*2+0x3f] +XDIS 5f3a: MISC BASE D53B8D5C7740 lea rbx, ptr [r31+r30*2+0x40] +XDIS 5f40: MISC BASE D52A8D5C7822 lea rbx, ptr [rax+r31*2+0x22] +XDIS 5f46: MISC BASE D52A8D5C7923 lea rbx, ptr [rcx+r31*2+0x23] +XDIS 5f4c: MISC BASE D52A8D5C7A24 lea rbx, ptr [rdx+r31*2+0x24] +XDIS 5f52: MISC BASE D52A8D5C7B25 lea rbx, ptr [rbx+r31*2+0x25] +XDIS 5f58: MISC BASE D52A8D5C7C26 lea rbx, ptr [rsp+r31*2+0x26] +XDIS 5f5e: MISC BASE D52A8D5C7D27 lea rbx, ptr [rbp+r31*2+0x27] +XDIS 5f64: MISC BASE D52A8D5C7E28 lea rbx, ptr [rsi+r31*2+0x28] +XDIS 5f6a: MISC BASE D52A8D5C7F29 lea rbx, ptr [rdi+r31*2+0x29] +XDIS 5f70: MISC BASE D52B8D5C782A lea rbx, ptr [r8+r31*2+0x2a] +XDIS 5f76: MISC BASE D52B8D5C792B lea rbx, ptr [r9+r31*2+0x2b] +XDIS 5f7c: MISC BASE D52B8D5C7A2C lea rbx, ptr [r10+r31*2+0x2c] +XDIS 5f82: MISC BASE D52B8D5C7B2D lea rbx, ptr [r11+r31*2+0x2d] +XDIS 5f88: MISC BASE D52B8D5C7C2E lea rbx, ptr [r12+r31*2+0x2e] +XDIS 5f8e: MISC BASE D52B8D5C7D2F lea rbx, ptr [r13+r31*2+0x2f] +XDIS 5f94: MISC BASE D52B8D5C7E30 lea rbx, ptr [r14+r31*2+0x30] +XDIS 5f9a: MISC BASE D52B8D5C7F31 lea rbx, ptr [r15+r31*2+0x31] +XDIS 5fa0: MISC BASE D53A8D5C7832 lea rbx, ptr [r16+r31*2+0x32] +XDIS 5fa6: MISC BASE D53A8D5C7933 lea rbx, ptr [r17+r31*2+0x33] +XDIS 5fac: MISC BASE D53A8D5C7A34 lea rbx, ptr [r18+r31*2+0x34] +XDIS 5fb2: MISC BASE D53A8D5C7B35 lea rbx, ptr [r19+r31*2+0x35] +XDIS 5fb8: MISC BASE D53A8D5C7C36 lea rbx, ptr [r20+r31*2+0x36] +XDIS 5fbe: MISC BASE D53A8D5C7D37 lea rbx, ptr [r21+r31*2+0x37] +XDIS 5fc4: MISC BASE D53A8D5C7E38 lea rbx, ptr [r22+r31*2+0x38] +XDIS 5fca: MISC BASE D53A8D5C7F39 lea rbx, ptr [r23+r31*2+0x39] +XDIS 5fd0: MISC BASE D53B8D5C783A lea rbx, ptr [r24+r31*2+0x3a] +XDIS 5fd6: MISC BASE D53B8D5C793B lea rbx, ptr [r25+r31*2+0x3b] +XDIS 5fdc: MISC BASE D53B8D5C7A3C lea rbx, ptr [r26+r31*2+0x3c] +XDIS 5fe2: MISC BASE D53B8D5C7B3D lea rbx, ptr [r27+r31*2+0x3d] +XDIS 5fe8: MISC BASE D53B8D5C7C3E lea rbx, ptr [r28+r31*2+0x3e] +XDIS 5fee: MISC BASE D53B8D5C7D3F lea rbx, ptr [r29+r31*2+0x3f] +XDIS 5ff4: MISC BASE D53B8D5C7E40 lea rbx, ptr [r30+r31*2+0x40] +XDIS 5ffa: MISC BASE D53B8D5C7F41 lea rbx, ptr [r31+r31*2+0x41] +XDIS 6000: MISC BASE D5088D644004 lea rsp, ptr [rax+rax*2+0x4] +XDIS 6006: MISC BASE D5088D644105 lea rsp, ptr [rcx+rax*2+0x5] +XDIS 600c: MISC BASE D5088D644206 lea rsp, ptr [rdx+rax*2+0x6] +XDIS 6012: MISC BASE D5088D644307 lea rsp, ptr [rbx+rax*2+0x7] +XDIS 6018: MISC BASE D5088D644408 lea rsp, ptr [rsp+rax*2+0x8] +XDIS 601e: MISC BASE D5088D644509 lea rsp, ptr [rbp+rax*2+0x9] +XDIS 6024: MISC BASE D5088D64460A lea rsp, ptr [rsi+rax*2+0xa] +XDIS 602a: MISC BASE D5088D64470B lea rsp, ptr [rdi+rax*2+0xb] +XDIS 6030: MISC BASE D5098D64400C lea rsp, ptr [r8+rax*2+0xc] +XDIS 6036: MISC BASE D5098D64410D lea rsp, ptr [r9+rax*2+0xd] +XDIS 603c: MISC BASE D5098D64420E lea rsp, ptr [r10+rax*2+0xe] +XDIS 6042: MISC BASE D5098D64430F lea rsp, ptr [r11+rax*2+0xf] +XDIS 6048: MISC BASE D5098D644410 lea rsp, ptr [r12+rax*2+0x10] +XDIS 604e: MISC BASE D5098D644511 lea rsp, ptr [r13+rax*2+0x11] +XDIS 6054: MISC BASE D5098D644612 lea rsp, ptr [r14+rax*2+0x12] +XDIS 605a: MISC BASE D5098D644713 lea rsp, ptr [r15+rax*2+0x13] +XDIS 6060: MISC BASE D5188D644014 lea rsp, ptr [r16+rax*2+0x14] +XDIS 6066: MISC BASE D5188D644115 lea rsp, ptr [r17+rax*2+0x15] +XDIS 606c: MISC BASE D5188D644216 lea rsp, ptr [r18+rax*2+0x16] +XDIS 6072: MISC BASE D5188D644317 lea rsp, ptr [r19+rax*2+0x17] +XDIS 6078: MISC BASE D5188D644418 lea rsp, ptr [r20+rax*2+0x18] +XDIS 607e: MISC BASE D5188D644519 lea rsp, ptr [r21+rax*2+0x19] +XDIS 6084: MISC BASE D5188D64461A lea rsp, ptr [r22+rax*2+0x1a] +XDIS 608a: MISC BASE D5188D64471B lea rsp, ptr [r23+rax*2+0x1b] +XDIS 6090: MISC BASE D5198D64401C lea rsp, ptr [r24+rax*2+0x1c] +XDIS 6096: MISC BASE D5198D64411D lea rsp, ptr [r25+rax*2+0x1d] +XDIS 609c: MISC BASE D5198D64421E lea rsp, ptr [r26+rax*2+0x1e] +XDIS 60a2: MISC BASE D5198D64431F lea rsp, ptr [r27+rax*2+0x1f] +XDIS 60a8: MISC BASE D5198D644420 lea rsp, ptr [r28+rax*2+0x20] +XDIS 60ae: MISC BASE D5198D644521 lea rsp, ptr [r29+rax*2+0x21] +XDIS 60b4: MISC BASE D5198D644622 lea rsp, ptr [r30+rax*2+0x22] +XDIS 60ba: MISC BASE D5198D644723 lea rsp, ptr [r31+rax*2+0x23] +XDIS 60c0: MISC BASE D5088D644805 lea rsp, ptr [rax+rcx*2+0x5] +XDIS 60c6: MISC BASE D5088D644906 lea rsp, ptr [rcx+rcx*2+0x6] +XDIS 60cc: MISC BASE D5088D644A07 lea rsp, ptr [rdx+rcx*2+0x7] +XDIS 60d2: MISC BASE D5088D644B08 lea rsp, ptr [rbx+rcx*2+0x8] +XDIS 60d8: MISC BASE D5088D644C09 lea rsp, ptr [rsp+rcx*2+0x9] +XDIS 60de: MISC BASE D5088D644D0A lea rsp, ptr [rbp+rcx*2+0xa] +XDIS 60e4: MISC BASE D5088D644E0B lea rsp, ptr [rsi+rcx*2+0xb] +XDIS 60ea: MISC BASE D5088D644F0C lea rsp, ptr [rdi+rcx*2+0xc] +XDIS 60f0: MISC BASE D5098D64480D lea rsp, ptr [r8+rcx*2+0xd] +XDIS 60f6: MISC BASE D5098D64490E lea rsp, ptr [r9+rcx*2+0xe] +XDIS 60fc: MISC BASE D5098D644A0F lea rsp, ptr [r10+rcx*2+0xf] +XDIS 6102: MISC BASE D5098D644B10 lea rsp, ptr [r11+rcx*2+0x10] +XDIS 6108: MISC BASE D5098D644C11 lea rsp, ptr [r12+rcx*2+0x11] +XDIS 610e: MISC BASE D5098D644D12 lea rsp, ptr [r13+rcx*2+0x12] +XDIS 6114: MISC BASE D5098D644E13 lea rsp, ptr [r14+rcx*2+0x13] +XDIS 611a: MISC BASE D5098D644F14 lea rsp, ptr [r15+rcx*2+0x14] +XDIS 6120: MISC BASE D5188D644815 lea rsp, ptr [r16+rcx*2+0x15] +XDIS 6126: MISC BASE D5188D644916 lea rsp, ptr [r17+rcx*2+0x16] +XDIS 612c: MISC BASE D5188D644A17 lea rsp, ptr [r18+rcx*2+0x17] +XDIS 6132: MISC BASE D5188D644B18 lea rsp, ptr [r19+rcx*2+0x18] +XDIS 6138: MISC BASE D5188D644C19 lea rsp, ptr [r20+rcx*2+0x19] +XDIS 613e: MISC BASE D5188D644D1A lea rsp, ptr [r21+rcx*2+0x1a] +XDIS 6144: MISC BASE D5188D644E1B lea rsp, ptr [r22+rcx*2+0x1b] +XDIS 614a: MISC BASE D5188D644F1C lea rsp, ptr [r23+rcx*2+0x1c] +XDIS 6150: MISC BASE D5198D64481D lea rsp, ptr [r24+rcx*2+0x1d] +XDIS 6156: MISC BASE D5198D64491E lea rsp, ptr [r25+rcx*2+0x1e] +XDIS 615c: MISC BASE D5198D644A1F lea rsp, ptr [r26+rcx*2+0x1f] +XDIS 6162: MISC BASE D5198D644B20 lea rsp, ptr [r27+rcx*2+0x20] +XDIS 6168: MISC BASE D5198D644C21 lea rsp, ptr [r28+rcx*2+0x21] +XDIS 616e: MISC BASE D5198D644D22 lea rsp, ptr [r29+rcx*2+0x22] +XDIS 6174: MISC BASE D5198D644E23 lea rsp, ptr [r30+rcx*2+0x23] +XDIS 617a: MISC BASE D5198D644F24 lea rsp, ptr [r31+rcx*2+0x24] +XDIS 6180: MISC BASE D5088D645006 lea rsp, ptr [rax+rdx*2+0x6] +XDIS 6186: MISC BASE D5088D645107 lea rsp, ptr [rcx+rdx*2+0x7] +XDIS 618c: MISC BASE D5088D645208 lea rsp, ptr [rdx+rdx*2+0x8] +XDIS 6192: MISC BASE D5088D645309 lea rsp, ptr [rbx+rdx*2+0x9] +XDIS 6198: MISC BASE D5088D64540A lea rsp, ptr [rsp+rdx*2+0xa] +XDIS 619e: MISC BASE D5088D64550B lea rsp, ptr [rbp+rdx*2+0xb] +XDIS 61a4: MISC BASE D5088D64560C lea rsp, ptr [rsi+rdx*2+0xc] +XDIS 61aa: MISC BASE D5088D64570D lea rsp, ptr [rdi+rdx*2+0xd] +XDIS 61b0: MISC BASE D5098D64500E lea rsp, ptr [r8+rdx*2+0xe] +XDIS 61b6: MISC BASE D5098D64510F lea rsp, ptr [r9+rdx*2+0xf] +XDIS 61bc: MISC BASE D5098D645210 lea rsp, ptr [r10+rdx*2+0x10] +XDIS 61c2: MISC BASE D5098D645311 lea rsp, ptr [r11+rdx*2+0x11] +XDIS 61c8: MISC BASE D5098D645412 lea rsp, ptr [r12+rdx*2+0x12] +XDIS 61ce: MISC BASE D5098D645513 lea rsp, ptr [r13+rdx*2+0x13] +XDIS 61d4: MISC BASE D5098D645614 lea rsp, ptr [r14+rdx*2+0x14] +XDIS 61da: MISC BASE D5098D645715 lea rsp, ptr [r15+rdx*2+0x15] +XDIS 61e0: MISC BASE D5188D645016 lea rsp, ptr [r16+rdx*2+0x16] +XDIS 61e6: MISC BASE D5188D645117 lea rsp, ptr [r17+rdx*2+0x17] +XDIS 61ec: MISC BASE D5188D645218 lea rsp, ptr [r18+rdx*2+0x18] +XDIS 61f2: MISC BASE D5188D645319 lea rsp, ptr [r19+rdx*2+0x19] +XDIS 61f8: MISC BASE D5188D64541A lea rsp, ptr [r20+rdx*2+0x1a] +XDIS 61fe: MISC BASE D5188D64551B lea rsp, ptr [r21+rdx*2+0x1b] +XDIS 6204: MISC BASE D5188D64561C lea rsp, ptr [r22+rdx*2+0x1c] +XDIS 620a: MISC BASE D5188D64571D lea rsp, ptr [r23+rdx*2+0x1d] +XDIS 6210: MISC BASE D5198D64501E lea rsp, ptr [r24+rdx*2+0x1e] +XDIS 6216: MISC BASE D5198D64511F lea rsp, ptr [r25+rdx*2+0x1f] +XDIS 621c: MISC BASE D5198D645220 lea rsp, ptr [r26+rdx*2+0x20] +XDIS 6222: MISC BASE D5198D645321 lea rsp, ptr [r27+rdx*2+0x21] +XDIS 6228: MISC BASE D5198D645422 lea rsp, ptr [r28+rdx*2+0x22] +XDIS 622e: MISC BASE D5198D645523 lea rsp, ptr [r29+rdx*2+0x23] +XDIS 6234: MISC BASE D5198D645624 lea rsp, ptr [r30+rdx*2+0x24] +XDIS 623a: MISC BASE D5198D645725 lea rsp, ptr [r31+rdx*2+0x25] +XDIS 6240: MISC BASE D5088D645807 lea rsp, ptr [rax+rbx*2+0x7] +XDIS 6246: MISC BASE D5088D645908 lea rsp, ptr [rcx+rbx*2+0x8] +XDIS 624c: MISC BASE D5088D645A09 lea rsp, ptr [rdx+rbx*2+0x9] +XDIS 6252: MISC BASE D5088D645B0A lea rsp, ptr [rbx+rbx*2+0xa] +XDIS 6258: MISC BASE D5088D645C0B lea rsp, ptr [rsp+rbx*2+0xb] +XDIS 625e: MISC BASE D5088D645D0C lea rsp, ptr [rbp+rbx*2+0xc] +XDIS 6264: MISC BASE D5088D645E0D lea rsp, ptr [rsi+rbx*2+0xd] +XDIS 626a: MISC BASE D5088D645F0E lea rsp, ptr [rdi+rbx*2+0xe] +XDIS 6270: MISC BASE D5098D64580F lea rsp, ptr [r8+rbx*2+0xf] +XDIS 6276: MISC BASE D5098D645910 lea rsp, ptr [r9+rbx*2+0x10] +XDIS 627c: MISC BASE D5098D645A11 lea rsp, ptr [r10+rbx*2+0x11] +XDIS 6282: MISC BASE D5098D645B12 lea rsp, ptr [r11+rbx*2+0x12] +XDIS 6288: MISC BASE D5098D645C13 lea rsp, ptr [r12+rbx*2+0x13] +XDIS 628e: MISC BASE D5098D645D14 lea rsp, ptr [r13+rbx*2+0x14] +XDIS 6294: MISC BASE D5098D645E15 lea rsp, ptr [r14+rbx*2+0x15] +XDIS 629a: MISC BASE D5098D645F16 lea rsp, ptr [r15+rbx*2+0x16] +XDIS 62a0: MISC BASE D5188D645817 lea rsp, ptr [r16+rbx*2+0x17] +XDIS 62a6: MISC BASE D5188D645918 lea rsp, ptr [r17+rbx*2+0x18] +XDIS 62ac: MISC BASE D5188D645A19 lea rsp, ptr [r18+rbx*2+0x19] +XDIS 62b2: MISC BASE D5188D645B1A lea rsp, ptr [r19+rbx*2+0x1a] +XDIS 62b8: MISC BASE D5188D645C1B lea rsp, ptr [r20+rbx*2+0x1b] +XDIS 62be: MISC BASE D5188D645D1C lea rsp, ptr [r21+rbx*2+0x1c] +XDIS 62c4: MISC BASE D5188D645E1D lea rsp, ptr [r22+rbx*2+0x1d] +XDIS 62ca: MISC BASE D5188D645F1E lea rsp, ptr [r23+rbx*2+0x1e] +XDIS 62d0: MISC BASE D5198D64581F lea rsp, ptr [r24+rbx*2+0x1f] +XDIS 62d6: MISC BASE D5198D645920 lea rsp, ptr [r25+rbx*2+0x20] +XDIS 62dc: MISC BASE D5198D645A21 lea rsp, ptr [r26+rbx*2+0x21] +XDIS 62e2: MISC BASE D5198D645B22 lea rsp, ptr [r27+rbx*2+0x22] +XDIS 62e8: MISC BASE D5198D645C23 lea rsp, ptr [r28+rbx*2+0x23] +XDIS 62ee: MISC BASE D5198D645D24 lea rsp, ptr [r29+rbx*2+0x24] +XDIS 62f4: MISC BASE D5198D645E25 lea rsp, ptr [r30+rbx*2+0x25] +XDIS 62fa: MISC BASE D5198D645F26 lea rsp, ptr [r31+rbx*2+0x26] +XDIS 6300: MISC BASE D5088D646008 lea rsp, ptr [rax+0x8] +XDIS 6306: MISC BASE D5088D646109 lea rsp, ptr [rcx+0x9] +XDIS 630c: MISC BASE D5088D64620A lea rsp, ptr [rdx+0xa] +XDIS 6312: MISC BASE D5088D64630B lea rsp, ptr [rbx+0xb] +XDIS 6318: MISC BASE D5088D64640C lea rsp, ptr [rsp+0xc] +XDIS 631e: MISC BASE D5088D64650D lea rsp, ptr [rbp+0xd] +XDIS 6324: MISC BASE D5088D64660E lea rsp, ptr [rsi+0xe] +XDIS 632a: MISC BASE D5088D64670F lea rsp, ptr [rdi+0xf] +XDIS 6330: MISC BASE D5098D646010 lea rsp, ptr [r8+0x10] +XDIS 6336: MISC BASE D5098D646111 lea rsp, ptr [r9+0x11] +XDIS 633c: MISC BASE D5098D646212 lea rsp, ptr [r10+0x12] +XDIS 6342: MISC BASE D5098D646313 lea rsp, ptr [r11+0x13] +XDIS 6348: MISC BASE D5098D646414 lea rsp, ptr [r12+0x14] +XDIS 634e: MISC BASE D5098D646515 lea rsp, ptr [r13+0x15] +XDIS 6354: MISC BASE D5098D646616 lea rsp, ptr [r14+0x16] +XDIS 635a: MISC BASE D5098D646717 lea rsp, ptr [r15+0x17] +XDIS 6360: MISC BASE D5188D646018 lea rsp, ptr [r16+0x18] +XDIS 6366: MISC BASE D5188D646119 lea rsp, ptr [r17+0x19] +XDIS 636c: MISC BASE D5188D64621A lea rsp, ptr [r18+0x1a] +XDIS 6372: MISC BASE D5188D64631B lea rsp, ptr [r19+0x1b] +XDIS 6378: MISC BASE D5188D64641C lea rsp, ptr [r20+0x1c] +XDIS 637e: MISC BASE D5188D64651D lea rsp, ptr [r21+0x1d] +XDIS 6384: MISC BASE D5188D64661E lea rsp, ptr [r22+0x1e] +XDIS 638a: MISC BASE D5188D64671F lea rsp, ptr [r23+0x1f] +XDIS 6390: MISC BASE D5198D646020 lea rsp, ptr [r24+0x20] +XDIS 6396: MISC BASE D5198D646121 lea rsp, ptr [r25+0x21] +XDIS 639c: MISC BASE D5198D646222 lea rsp, ptr [r26+0x22] +XDIS 63a2: MISC BASE D5198D646323 lea rsp, ptr [r27+0x23] +XDIS 63a8: MISC BASE D5198D646424 lea rsp, ptr [r28+0x24] +XDIS 63ae: MISC BASE D5198D646525 lea rsp, ptr [r29+0x25] +XDIS 63b4: MISC BASE D5198D646626 lea rsp, ptr [r30+0x26] +XDIS 63ba: MISC BASE D5198D646727 lea rsp, ptr [r31+0x27] +XDIS 63c0: MISC BASE D5088D646809 lea rsp, ptr [rax+rbp*2+0x9] +XDIS 63c6: MISC BASE D5088D64690A lea rsp, ptr [rcx+rbp*2+0xa] +XDIS 63cc: MISC BASE D5088D646A0B lea rsp, ptr [rdx+rbp*2+0xb] +XDIS 63d2: MISC BASE D5088D646B0C lea rsp, ptr [rbx+rbp*2+0xc] +XDIS 63d8: MISC BASE D5088D646C0D lea rsp, ptr [rsp+rbp*2+0xd] +XDIS 63de: MISC BASE D5088D646D0E lea rsp, ptr [rbp+rbp*2+0xe] +XDIS 63e4: MISC BASE D5088D646E0F lea rsp, ptr [rsi+rbp*2+0xf] +XDIS 63ea: MISC BASE D5088D646F10 lea rsp, ptr [rdi+rbp*2+0x10] +XDIS 63f0: MISC BASE D5098D646811 lea rsp, ptr [r8+rbp*2+0x11] +XDIS 63f6: MISC BASE D5098D646912 lea rsp, ptr [r9+rbp*2+0x12] +XDIS 63fc: MISC BASE D5098D646A13 lea rsp, ptr [r10+rbp*2+0x13] +XDIS 6402: MISC BASE D5098D646B14 lea rsp, ptr [r11+rbp*2+0x14] +XDIS 6408: MISC BASE D5098D646C15 lea rsp, ptr [r12+rbp*2+0x15] +XDIS 640e: MISC BASE D5098D646D16 lea rsp, ptr [r13+rbp*2+0x16] +XDIS 6414: MISC BASE D5098D646E17 lea rsp, ptr [r14+rbp*2+0x17] +XDIS 641a: MISC BASE D5098D646F18 lea rsp, ptr [r15+rbp*2+0x18] +XDIS 6420: MISC BASE D5188D646819 lea rsp, ptr [r16+rbp*2+0x19] +XDIS 6426: MISC BASE D5188D64691A lea rsp, ptr [r17+rbp*2+0x1a] +XDIS 642c: MISC BASE D5188D646A1B lea rsp, ptr [r18+rbp*2+0x1b] +XDIS 6432: MISC BASE D5188D646B1C lea rsp, ptr [r19+rbp*2+0x1c] +XDIS 6438: MISC BASE D5188D646C1D lea rsp, ptr [r20+rbp*2+0x1d] +XDIS 643e: MISC BASE D5188D646D1E lea rsp, ptr [r21+rbp*2+0x1e] +XDIS 6444: MISC BASE D5188D646E1F lea rsp, ptr [r22+rbp*2+0x1f] +XDIS 644a: MISC BASE D5188D646F20 lea rsp, ptr [r23+rbp*2+0x20] +XDIS 6450: MISC BASE D5198D646821 lea rsp, ptr [r24+rbp*2+0x21] +XDIS 6456: MISC BASE D5198D646922 lea rsp, ptr [r25+rbp*2+0x22] +XDIS 645c: MISC BASE D5198D646A23 lea rsp, ptr [r26+rbp*2+0x23] +XDIS 6462: MISC BASE D5198D646B24 lea rsp, ptr [r27+rbp*2+0x24] +XDIS 6468: MISC BASE D5198D646C25 lea rsp, ptr [r28+rbp*2+0x25] +XDIS 646e: MISC BASE D5198D646D26 lea rsp, ptr [r29+rbp*2+0x26] +XDIS 6474: MISC BASE D5198D646E27 lea rsp, ptr [r30+rbp*2+0x27] +XDIS 647a: MISC BASE D5198D646F28 lea rsp, ptr [r31+rbp*2+0x28] +XDIS 6480: MISC BASE D5088D64700A lea rsp, ptr [rax+rsi*2+0xa] +XDIS 6486: MISC BASE D5088D64710B lea rsp, ptr [rcx+rsi*2+0xb] +XDIS 648c: MISC BASE D5088D64720C lea rsp, ptr [rdx+rsi*2+0xc] +XDIS 6492: MISC BASE D5088D64730D lea rsp, ptr [rbx+rsi*2+0xd] +XDIS 6498: MISC BASE D5088D64740E lea rsp, ptr [rsp+rsi*2+0xe] +XDIS 649e: MISC BASE D5088D64750F lea rsp, ptr [rbp+rsi*2+0xf] +XDIS 64a4: MISC BASE D5088D647610 lea rsp, ptr [rsi+rsi*2+0x10] +XDIS 64aa: MISC BASE D5088D647711 lea rsp, ptr [rdi+rsi*2+0x11] +XDIS 64b0: MISC BASE D5098D647012 lea rsp, ptr [r8+rsi*2+0x12] +XDIS 64b6: MISC BASE D5098D647113 lea rsp, ptr [r9+rsi*2+0x13] +XDIS 64bc: MISC BASE D5098D647214 lea rsp, ptr [r10+rsi*2+0x14] +XDIS 64c2: MISC BASE D5098D647315 lea rsp, ptr [r11+rsi*2+0x15] +XDIS 64c8: MISC BASE D5098D647416 lea rsp, ptr [r12+rsi*2+0x16] +XDIS 64ce: MISC BASE D5098D647517 lea rsp, ptr [r13+rsi*2+0x17] +XDIS 64d4: MISC BASE D5098D647618 lea rsp, ptr [r14+rsi*2+0x18] +XDIS 64da: MISC BASE D5098D647719 lea rsp, ptr [r15+rsi*2+0x19] +XDIS 64e0: MISC BASE D5188D64701A lea rsp, ptr [r16+rsi*2+0x1a] +XDIS 64e6: MISC BASE D5188D64711B lea rsp, ptr [r17+rsi*2+0x1b] +XDIS 64ec: MISC BASE D5188D64721C lea rsp, ptr [r18+rsi*2+0x1c] +XDIS 64f2: MISC BASE D5188D64731D lea rsp, ptr [r19+rsi*2+0x1d] +XDIS 64f8: MISC BASE D5188D64741E lea rsp, ptr [r20+rsi*2+0x1e] +XDIS 64fe: MISC BASE D5188D64751F lea rsp, ptr [r21+rsi*2+0x1f] +XDIS 6504: MISC BASE D5188D647620 lea rsp, ptr [r22+rsi*2+0x20] +XDIS 650a: MISC BASE D5188D647721 lea rsp, ptr [r23+rsi*2+0x21] +XDIS 6510: MISC BASE D5198D647022 lea rsp, ptr [r24+rsi*2+0x22] +XDIS 6516: MISC BASE D5198D647123 lea rsp, ptr [r25+rsi*2+0x23] +XDIS 651c: MISC BASE D5198D647224 lea rsp, ptr [r26+rsi*2+0x24] +XDIS 6522: MISC BASE D5198D647325 lea rsp, ptr [r27+rsi*2+0x25] +XDIS 6528: MISC BASE D5198D647426 lea rsp, ptr [r28+rsi*2+0x26] +XDIS 652e: MISC BASE D5198D647527 lea rsp, ptr [r29+rsi*2+0x27] +XDIS 6534: MISC BASE D5198D647628 lea rsp, ptr [r30+rsi*2+0x28] +XDIS 653a: MISC BASE D5198D647729 lea rsp, ptr [r31+rsi*2+0x29] +XDIS 6540: MISC BASE D5088D64780B lea rsp, ptr [rax+rdi*2+0xb] +XDIS 6546: MISC BASE D5088D64790C lea rsp, ptr [rcx+rdi*2+0xc] +XDIS 654c: MISC BASE D5088D647A0D lea rsp, ptr [rdx+rdi*2+0xd] +XDIS 6552: MISC BASE D5088D647B0E lea rsp, ptr [rbx+rdi*2+0xe] +XDIS 6558: MISC BASE D5088D647C0F lea rsp, ptr [rsp+rdi*2+0xf] +XDIS 655e: MISC BASE D5088D647D10 lea rsp, ptr [rbp+rdi*2+0x10] +XDIS 6564: MISC BASE D5088D647E11 lea rsp, ptr [rsi+rdi*2+0x11] +XDIS 656a: MISC BASE D5088D647F12 lea rsp, ptr [rdi+rdi*2+0x12] +XDIS 6570: MISC BASE D5098D647813 lea rsp, ptr [r8+rdi*2+0x13] +XDIS 6576: MISC BASE D5098D647914 lea rsp, ptr [r9+rdi*2+0x14] +XDIS 657c: MISC BASE D5098D647A15 lea rsp, ptr [r10+rdi*2+0x15] +XDIS 6582: MISC BASE D5098D647B16 lea rsp, ptr [r11+rdi*2+0x16] +XDIS 6588: MISC BASE D5098D647C17 lea rsp, ptr [r12+rdi*2+0x17] +XDIS 658e: MISC BASE D5098D647D18 lea rsp, ptr [r13+rdi*2+0x18] +XDIS 6594: MISC BASE D5098D647E19 lea rsp, ptr [r14+rdi*2+0x19] +XDIS 659a: MISC BASE D5098D647F1A lea rsp, ptr [r15+rdi*2+0x1a] +XDIS 65a0: MISC BASE D5188D64781B lea rsp, ptr [r16+rdi*2+0x1b] +XDIS 65a6: MISC BASE D5188D64791C lea rsp, ptr [r17+rdi*2+0x1c] +XDIS 65ac: MISC BASE D5188D647A1D lea rsp, ptr [r18+rdi*2+0x1d] +XDIS 65b2: MISC BASE D5188D647B1E lea rsp, ptr [r19+rdi*2+0x1e] +XDIS 65b8: MISC BASE D5188D647C1F lea rsp, ptr [r20+rdi*2+0x1f] +XDIS 65be: MISC BASE D5188D647D20 lea rsp, ptr [r21+rdi*2+0x20] +XDIS 65c4: MISC BASE D5188D647E21 lea rsp, ptr [r22+rdi*2+0x21] +XDIS 65ca: MISC BASE D5188D647F22 lea rsp, ptr [r23+rdi*2+0x22] +XDIS 65d0: MISC BASE D5198D647823 lea rsp, ptr [r24+rdi*2+0x23] +XDIS 65d6: MISC BASE D5198D647924 lea rsp, ptr [r25+rdi*2+0x24] +XDIS 65dc: MISC BASE D5198D647A25 lea rsp, ptr [r26+rdi*2+0x25] +XDIS 65e2: MISC BASE D5198D647B26 lea rsp, ptr [r27+rdi*2+0x26] +XDIS 65e8: MISC BASE D5198D647C27 lea rsp, ptr [r28+rdi*2+0x27] +XDIS 65ee: MISC BASE D5198D647D28 lea rsp, ptr [r29+rdi*2+0x28] +XDIS 65f4: MISC BASE D5198D647E29 lea rsp, ptr [r30+rdi*2+0x29] +XDIS 65fa: MISC BASE D5198D647F2A lea rsp, ptr [r31+rdi*2+0x2a] +XDIS 6600: MISC BASE D50A8D64400C lea rsp, ptr [rax+r8*2+0xc] +XDIS 6606: MISC BASE D50A8D64410D lea rsp, ptr [rcx+r8*2+0xd] +XDIS 660c: MISC BASE D50A8D64420E lea rsp, ptr [rdx+r8*2+0xe] +XDIS 6612: MISC BASE D50A8D64430F lea rsp, ptr [rbx+r8*2+0xf] +XDIS 6618: MISC BASE D50A8D644410 lea rsp, ptr [rsp+r8*2+0x10] +XDIS 661e: MISC BASE D50A8D644511 lea rsp, ptr [rbp+r8*2+0x11] +XDIS 6624: MISC BASE D50A8D644612 lea rsp, ptr [rsi+r8*2+0x12] +XDIS 662a: MISC BASE D50A8D644713 lea rsp, ptr [rdi+r8*2+0x13] +XDIS 6630: MISC BASE D50B8D644014 lea rsp, ptr [r8+r8*2+0x14] +XDIS 6636: MISC BASE D50B8D644115 lea rsp, ptr [r9+r8*2+0x15] +XDIS 663c: MISC BASE D50B8D644216 lea rsp, ptr [r10+r8*2+0x16] +XDIS 6642: MISC BASE D50B8D644317 lea rsp, ptr [r11+r8*2+0x17] +XDIS 6648: MISC BASE D50B8D644418 lea rsp, ptr [r12+r8*2+0x18] +XDIS 664e: MISC BASE D50B8D644519 lea rsp, ptr [r13+r8*2+0x19] +XDIS 6654: MISC BASE D50B8D64461A lea rsp, ptr [r14+r8*2+0x1a] +XDIS 665a: MISC BASE D50B8D64471B lea rsp, ptr [r15+r8*2+0x1b] +XDIS 6660: MISC BASE D51A8D64401C lea rsp, ptr [r16+r8*2+0x1c] +XDIS 6666: MISC BASE D51A8D64411D lea rsp, ptr [r17+r8*2+0x1d] +XDIS 666c: MISC BASE D51A8D64421E lea rsp, ptr [r18+r8*2+0x1e] +XDIS 6672: MISC BASE D51A8D64431F lea rsp, ptr [r19+r8*2+0x1f] +XDIS 6678: MISC BASE D51A8D644420 lea rsp, ptr [r20+r8*2+0x20] +XDIS 667e: MISC BASE D51A8D644521 lea rsp, ptr [r21+r8*2+0x21] +XDIS 6684: MISC BASE D51A8D644622 lea rsp, ptr [r22+r8*2+0x22] +XDIS 668a: MISC BASE D51A8D644723 lea rsp, ptr [r23+r8*2+0x23] +XDIS 6690: MISC BASE D51B8D644024 lea rsp, ptr [r24+r8*2+0x24] +XDIS 6696: MISC BASE D51B8D644125 lea rsp, ptr [r25+r8*2+0x25] +XDIS 669c: MISC BASE D51B8D644226 lea rsp, ptr [r26+r8*2+0x26] +XDIS 66a2: MISC BASE D51B8D644327 lea rsp, ptr [r27+r8*2+0x27] +XDIS 66a8: MISC BASE D51B8D644428 lea rsp, ptr [r28+r8*2+0x28] +XDIS 66ae: MISC BASE D51B8D644529 lea rsp, ptr [r29+r8*2+0x29] +XDIS 66b4: MISC BASE D51B8D64462A lea rsp, ptr [r30+r8*2+0x2a] +XDIS 66ba: MISC BASE D51B8D64472B lea rsp, ptr [r31+r8*2+0x2b] +XDIS 66c0: MISC BASE D50A8D64480D lea rsp, ptr [rax+r9*2+0xd] +XDIS 66c6: MISC BASE D50A8D64490E lea rsp, ptr [rcx+r9*2+0xe] +XDIS 66cc: MISC BASE D50A8D644A0F lea rsp, ptr [rdx+r9*2+0xf] +XDIS 66d2: MISC BASE D50A8D644B10 lea rsp, ptr [rbx+r9*2+0x10] +XDIS 66d8: MISC BASE D50A8D644C11 lea rsp, ptr [rsp+r9*2+0x11] +XDIS 66de: MISC BASE D50A8D644D12 lea rsp, ptr [rbp+r9*2+0x12] +XDIS 66e4: MISC BASE D50A8D644E13 lea rsp, ptr [rsi+r9*2+0x13] +XDIS 66ea: MISC BASE D50A8D644F14 lea rsp, ptr [rdi+r9*2+0x14] +XDIS 66f0: MISC BASE D50B8D644815 lea rsp, ptr [r8+r9*2+0x15] +XDIS 66f6: MISC BASE D50B8D644916 lea rsp, ptr [r9+r9*2+0x16] +XDIS 66fc: MISC BASE D50B8D644A17 lea rsp, ptr [r10+r9*2+0x17] +XDIS 6702: MISC BASE D50B8D644B18 lea rsp, ptr [r11+r9*2+0x18] +XDIS 6708: MISC BASE D50B8D644C19 lea rsp, ptr [r12+r9*2+0x19] +XDIS 670e: MISC BASE D50B8D644D1A lea rsp, ptr [r13+r9*2+0x1a] +XDIS 6714: MISC BASE D50B8D644E1B lea rsp, ptr [r14+r9*2+0x1b] +XDIS 671a: MISC BASE D50B8D644F1C lea rsp, ptr [r15+r9*2+0x1c] +XDIS 6720: MISC BASE D51A8D64481D lea rsp, ptr [r16+r9*2+0x1d] +XDIS 6726: MISC BASE D51A8D64491E lea rsp, ptr [r17+r9*2+0x1e] +XDIS 672c: MISC BASE D51A8D644A1F lea rsp, ptr [r18+r9*2+0x1f] +XDIS 6732: MISC BASE D51A8D644B20 lea rsp, ptr [r19+r9*2+0x20] +XDIS 6738: MISC BASE D51A8D644C21 lea rsp, ptr [r20+r9*2+0x21] +XDIS 673e: MISC BASE D51A8D644D22 lea rsp, ptr [r21+r9*2+0x22] +XDIS 6744: MISC BASE D51A8D644E23 lea rsp, ptr [r22+r9*2+0x23] +XDIS 674a: MISC BASE D51A8D644F24 lea rsp, ptr [r23+r9*2+0x24] +XDIS 6750: MISC BASE D51B8D644825 lea rsp, ptr [r24+r9*2+0x25] +XDIS 6756: MISC BASE D51B8D644926 lea rsp, ptr [r25+r9*2+0x26] +XDIS 675c: MISC BASE D51B8D644A27 lea rsp, ptr [r26+r9*2+0x27] +XDIS 6762: MISC BASE D51B8D644B28 lea rsp, ptr [r27+r9*2+0x28] +XDIS 6768: MISC BASE D51B8D644C29 lea rsp, ptr [r28+r9*2+0x29] +XDIS 676e: MISC BASE D51B8D644D2A lea rsp, ptr [r29+r9*2+0x2a] +XDIS 6774: MISC BASE D51B8D644E2B lea rsp, ptr [r30+r9*2+0x2b] +XDIS 677a: MISC BASE D51B8D644F2C lea rsp, ptr [r31+r9*2+0x2c] +XDIS 6780: MISC BASE D50A8D64500E lea rsp, ptr [rax+r10*2+0xe] +XDIS 6786: MISC BASE D50A8D64510F lea rsp, ptr [rcx+r10*2+0xf] +XDIS 678c: MISC BASE D50A8D645210 lea rsp, ptr [rdx+r10*2+0x10] +XDIS 6792: MISC BASE D50A8D645311 lea rsp, ptr [rbx+r10*2+0x11] +XDIS 6798: MISC BASE D50A8D645412 lea rsp, ptr [rsp+r10*2+0x12] +XDIS 679e: MISC BASE D50A8D645513 lea rsp, ptr [rbp+r10*2+0x13] +XDIS 67a4: MISC BASE D50A8D645614 lea rsp, ptr [rsi+r10*2+0x14] +XDIS 67aa: MISC BASE D50A8D645715 lea rsp, ptr [rdi+r10*2+0x15] +XDIS 67b0: MISC BASE D50B8D645016 lea rsp, ptr [r8+r10*2+0x16] +XDIS 67b6: MISC BASE D50B8D645117 lea rsp, ptr [r9+r10*2+0x17] +XDIS 67bc: MISC BASE D50B8D645218 lea rsp, ptr [r10+r10*2+0x18] +XDIS 67c2: MISC BASE D50B8D645319 lea rsp, ptr [r11+r10*2+0x19] +XDIS 67c8: MISC BASE D50B8D64541A lea rsp, ptr [r12+r10*2+0x1a] +XDIS 67ce: MISC BASE D50B8D64551B lea rsp, ptr [r13+r10*2+0x1b] +XDIS 67d4: MISC BASE D50B8D64561C lea rsp, ptr [r14+r10*2+0x1c] +XDIS 67da: MISC BASE D50B8D64571D lea rsp, ptr [r15+r10*2+0x1d] +XDIS 67e0: MISC BASE D51A8D64501E lea rsp, ptr [r16+r10*2+0x1e] +XDIS 67e6: MISC BASE D51A8D64511F lea rsp, ptr [r17+r10*2+0x1f] +XDIS 67ec: MISC BASE D51A8D645220 lea rsp, ptr [r18+r10*2+0x20] +XDIS 67f2: MISC BASE D51A8D645321 lea rsp, ptr [r19+r10*2+0x21] +XDIS 67f8: MISC BASE D51A8D645422 lea rsp, ptr [r20+r10*2+0x22] +XDIS 67fe: MISC BASE D51A8D645523 lea rsp, ptr [r21+r10*2+0x23] +XDIS 6804: MISC BASE D51A8D645624 lea rsp, ptr [r22+r10*2+0x24] +XDIS 680a: MISC BASE D51A8D645725 lea rsp, ptr [r23+r10*2+0x25] +XDIS 6810: MISC BASE D51B8D645026 lea rsp, ptr [r24+r10*2+0x26] +XDIS 6816: MISC BASE D51B8D645127 lea rsp, ptr [r25+r10*2+0x27] +XDIS 681c: MISC BASE D51B8D645228 lea rsp, ptr [r26+r10*2+0x28] +XDIS 6822: MISC BASE D51B8D645329 lea rsp, ptr [r27+r10*2+0x29] +XDIS 6828: MISC BASE D51B8D64542A lea rsp, ptr [r28+r10*2+0x2a] +XDIS 682e: MISC BASE D51B8D64552B lea rsp, ptr [r29+r10*2+0x2b] +XDIS 6834: MISC BASE D51B8D64562C lea rsp, ptr [r30+r10*2+0x2c] +XDIS 683a: MISC BASE D51B8D64572D lea rsp, ptr [r31+r10*2+0x2d] +XDIS 6840: MISC BASE D50A8D64580F lea rsp, ptr [rax+r11*2+0xf] +XDIS 6846: MISC BASE D50A8D645910 lea rsp, ptr [rcx+r11*2+0x10] +XDIS 684c: MISC BASE D50A8D645A11 lea rsp, ptr [rdx+r11*2+0x11] +XDIS 6852: MISC BASE D50A8D645B12 lea rsp, ptr [rbx+r11*2+0x12] +XDIS 6858: MISC BASE D50A8D645C13 lea rsp, ptr [rsp+r11*2+0x13] +XDIS 685e: MISC BASE D50A8D645D14 lea rsp, ptr [rbp+r11*2+0x14] +XDIS 6864: MISC BASE D50A8D645E15 lea rsp, ptr [rsi+r11*2+0x15] +XDIS 686a: MISC BASE D50A8D645F16 lea rsp, ptr [rdi+r11*2+0x16] +XDIS 6870: MISC BASE D50B8D645817 lea rsp, ptr [r8+r11*2+0x17] +XDIS 6876: MISC BASE D50B8D645918 lea rsp, ptr [r9+r11*2+0x18] +XDIS 687c: MISC BASE D50B8D645A19 lea rsp, ptr [r10+r11*2+0x19] +XDIS 6882: MISC BASE D50B8D645B1A lea rsp, ptr [r11+r11*2+0x1a] +XDIS 6888: MISC BASE D50B8D645C1B lea rsp, ptr [r12+r11*2+0x1b] +XDIS 688e: MISC BASE D50B8D645D1C lea rsp, ptr [r13+r11*2+0x1c] +XDIS 6894: MISC BASE D50B8D645E1D lea rsp, ptr [r14+r11*2+0x1d] +XDIS 689a: MISC BASE D50B8D645F1E lea rsp, ptr [r15+r11*2+0x1e] +XDIS 68a0: MISC BASE D51A8D64581F lea rsp, ptr [r16+r11*2+0x1f] +XDIS 68a6: MISC BASE D51A8D645920 lea rsp, ptr [r17+r11*2+0x20] +XDIS 68ac: MISC BASE D51A8D645A21 lea rsp, ptr [r18+r11*2+0x21] +XDIS 68b2: MISC BASE D51A8D645B22 lea rsp, ptr [r19+r11*2+0x22] +XDIS 68b8: MISC BASE D51A8D645C23 lea rsp, ptr [r20+r11*2+0x23] +XDIS 68be: MISC BASE D51A8D645D24 lea rsp, ptr [r21+r11*2+0x24] +XDIS 68c4: MISC BASE D51A8D645E25 lea rsp, ptr [r22+r11*2+0x25] +XDIS 68ca: MISC BASE D51A8D645F26 lea rsp, ptr [r23+r11*2+0x26] +XDIS 68d0: MISC BASE D51B8D645827 lea rsp, ptr [r24+r11*2+0x27] +XDIS 68d6: MISC BASE D51B8D645928 lea rsp, ptr [r25+r11*2+0x28] +XDIS 68dc: MISC BASE D51B8D645A29 lea rsp, ptr [r26+r11*2+0x29] +XDIS 68e2: MISC BASE D51B8D645B2A lea rsp, ptr [r27+r11*2+0x2a] +XDIS 68e8: MISC BASE D51B8D645C2B lea rsp, ptr [r28+r11*2+0x2b] +XDIS 68ee: MISC BASE D51B8D645D2C lea rsp, ptr [r29+r11*2+0x2c] +XDIS 68f4: MISC BASE D51B8D645E2D lea rsp, ptr [r30+r11*2+0x2d] +XDIS 68fa: MISC BASE D51B8D645F2E lea rsp, ptr [r31+r11*2+0x2e] +XDIS 6900: MISC BASE D50A8D646010 lea rsp, ptr [rax+r12*2+0x10] +XDIS 6906: MISC BASE D50A8D646111 lea rsp, ptr [rcx+r12*2+0x11] +XDIS 690c: MISC BASE D50A8D646212 lea rsp, ptr [rdx+r12*2+0x12] +XDIS 6912: MISC BASE D50A8D646313 lea rsp, ptr [rbx+r12*2+0x13] +XDIS 6918: MISC BASE D50A8D646414 lea rsp, ptr [rsp+r12*2+0x14] +XDIS 691e: MISC BASE D50A8D646515 lea rsp, ptr [rbp+r12*2+0x15] +XDIS 6924: MISC BASE D50A8D646616 lea rsp, ptr [rsi+r12*2+0x16] +XDIS 692a: MISC BASE D50A8D646717 lea rsp, ptr [rdi+r12*2+0x17] +XDIS 6930: MISC BASE D50B8D646018 lea rsp, ptr [r8+r12*2+0x18] +XDIS 6936: MISC BASE D50B8D646119 lea rsp, ptr [r9+r12*2+0x19] +XDIS 693c: MISC BASE D50B8D64621A lea rsp, ptr [r10+r12*2+0x1a] +XDIS 6942: MISC BASE D50B8D64631B lea rsp, ptr [r11+r12*2+0x1b] +XDIS 6948: MISC BASE D50B8D64641C lea rsp, ptr [r12+r12*2+0x1c] +XDIS 694e: MISC BASE D50B8D64651D lea rsp, ptr [r13+r12*2+0x1d] +XDIS 6954: MISC BASE D50B8D64661E lea rsp, ptr [r14+r12*2+0x1e] +XDIS 695a: MISC BASE D50B8D64671F lea rsp, ptr [r15+r12*2+0x1f] +XDIS 6960: MISC BASE D51A8D646020 lea rsp, ptr [r16+r12*2+0x20] +XDIS 6966: MISC BASE D51A8D646121 lea rsp, ptr [r17+r12*2+0x21] +XDIS 696c: MISC BASE D51A8D646222 lea rsp, ptr [r18+r12*2+0x22] +XDIS 6972: MISC BASE D51A8D646323 lea rsp, ptr [r19+r12*2+0x23] +XDIS 6978: MISC BASE D51A8D646424 lea rsp, ptr [r20+r12*2+0x24] +XDIS 697e: MISC BASE D51A8D646525 lea rsp, ptr [r21+r12*2+0x25] +XDIS 6984: MISC BASE D51A8D646626 lea rsp, ptr [r22+r12*2+0x26] +XDIS 698a: MISC BASE D51A8D646727 lea rsp, ptr [r23+r12*2+0x27] +XDIS 6990: MISC BASE D51B8D646028 lea rsp, ptr [r24+r12*2+0x28] +XDIS 6996: MISC BASE D51B8D646129 lea rsp, ptr [r25+r12*2+0x29] +XDIS 699c: MISC BASE D51B8D64622A lea rsp, ptr [r26+r12*2+0x2a] +XDIS 69a2: MISC BASE D51B8D64632B lea rsp, ptr [r27+r12*2+0x2b] +XDIS 69a8: MISC BASE D51B8D64642C lea rsp, ptr [r28+r12*2+0x2c] +XDIS 69ae: MISC BASE D51B8D64652D lea rsp, ptr [r29+r12*2+0x2d] +XDIS 69b4: MISC BASE D51B8D64662E lea rsp, ptr [r30+r12*2+0x2e] +XDIS 69ba: MISC BASE D51B8D64672F lea rsp, ptr [r31+r12*2+0x2f] +XDIS 69c0: MISC BASE D50A8D646811 lea rsp, ptr [rax+r13*2+0x11] +XDIS 69c6: MISC BASE D50A8D646912 lea rsp, ptr [rcx+r13*2+0x12] +XDIS 69cc: MISC BASE D50A8D646A13 lea rsp, ptr [rdx+r13*2+0x13] +XDIS 69d2: MISC BASE D50A8D646B14 lea rsp, ptr [rbx+r13*2+0x14] +XDIS 69d8: MISC BASE D50A8D646C15 lea rsp, ptr [rsp+r13*2+0x15] +XDIS 69de: MISC BASE D50A8D646D16 lea rsp, ptr [rbp+r13*2+0x16] +XDIS 69e4: MISC BASE D50A8D646E17 lea rsp, ptr [rsi+r13*2+0x17] +XDIS 69ea: MISC BASE D50A8D646F18 lea rsp, ptr [rdi+r13*2+0x18] +XDIS 69f0: MISC BASE D50B8D646819 lea rsp, ptr [r8+r13*2+0x19] +XDIS 69f6: MISC BASE D50B8D64691A lea rsp, ptr [r9+r13*2+0x1a] +XDIS 69fc: MISC BASE D50B8D646A1B lea rsp, ptr [r10+r13*2+0x1b] +XDIS 6a02: MISC BASE D50B8D646B1C lea rsp, ptr [r11+r13*2+0x1c] +XDIS 6a08: MISC BASE D50B8D646C1D lea rsp, ptr [r12+r13*2+0x1d] +XDIS 6a0e: MISC BASE D50B8D646D1E lea rsp, ptr [r13+r13*2+0x1e] +XDIS 6a14: MISC BASE D50B8D646E1F lea rsp, ptr [r14+r13*2+0x1f] +XDIS 6a1a: MISC BASE D50B8D646F20 lea rsp, ptr [r15+r13*2+0x20] +XDIS 6a20: MISC BASE D51A8D646821 lea rsp, ptr [r16+r13*2+0x21] +XDIS 6a26: MISC BASE D51A8D646922 lea rsp, ptr [r17+r13*2+0x22] +XDIS 6a2c: MISC BASE D51A8D646A23 lea rsp, ptr [r18+r13*2+0x23] +XDIS 6a32: MISC BASE D51A8D646B24 lea rsp, ptr [r19+r13*2+0x24] +XDIS 6a38: MISC BASE D51A8D646C25 lea rsp, ptr [r20+r13*2+0x25] +XDIS 6a3e: MISC BASE D51A8D646D26 lea rsp, ptr [r21+r13*2+0x26] +XDIS 6a44: MISC BASE D51A8D646E27 lea rsp, ptr [r22+r13*2+0x27] +XDIS 6a4a: MISC BASE D51A8D646F28 lea rsp, ptr [r23+r13*2+0x28] +XDIS 6a50: MISC BASE D51B8D646829 lea rsp, ptr [r24+r13*2+0x29] +XDIS 6a56: MISC BASE D51B8D64692A lea rsp, ptr [r25+r13*2+0x2a] +XDIS 6a5c: MISC BASE D51B8D646A2B lea rsp, ptr [r26+r13*2+0x2b] +XDIS 6a62: MISC BASE D51B8D646B2C lea rsp, ptr [r27+r13*2+0x2c] +XDIS 6a68: MISC BASE D51B8D646C2D lea rsp, ptr [r28+r13*2+0x2d] +XDIS 6a6e: MISC BASE D51B8D646D2E lea rsp, ptr [r29+r13*2+0x2e] +XDIS 6a74: MISC BASE D51B8D646E2F lea rsp, ptr [r30+r13*2+0x2f] +XDIS 6a7a: MISC BASE D51B8D646F30 lea rsp, ptr [r31+r13*2+0x30] +XDIS 6a80: MISC BASE D50A8D647012 lea rsp, ptr [rax+r14*2+0x12] +XDIS 6a86: MISC BASE D50A8D647113 lea rsp, ptr [rcx+r14*2+0x13] +XDIS 6a8c: MISC BASE D50A8D647214 lea rsp, ptr [rdx+r14*2+0x14] +XDIS 6a92: MISC BASE D50A8D647315 lea rsp, ptr [rbx+r14*2+0x15] +XDIS 6a98: MISC BASE D50A8D647416 lea rsp, ptr [rsp+r14*2+0x16] +XDIS 6a9e: MISC BASE D50A8D647517 lea rsp, ptr [rbp+r14*2+0x17] +XDIS 6aa4: MISC BASE D50A8D647618 lea rsp, ptr [rsi+r14*2+0x18] +XDIS 6aaa: MISC BASE D50A8D647719 lea rsp, ptr [rdi+r14*2+0x19] +XDIS 6ab0: MISC BASE D50B8D64701A lea rsp, ptr [r8+r14*2+0x1a] +XDIS 6ab6: MISC BASE D50B8D64711B lea rsp, ptr [r9+r14*2+0x1b] +XDIS 6abc: MISC BASE D50B8D64721C lea rsp, ptr [r10+r14*2+0x1c] +XDIS 6ac2: MISC BASE D50B8D64731D lea rsp, ptr [r11+r14*2+0x1d] +XDIS 6ac8: MISC BASE D50B8D64741E lea rsp, ptr [r12+r14*2+0x1e] +XDIS 6ace: MISC BASE D50B8D64751F lea rsp, ptr [r13+r14*2+0x1f] +XDIS 6ad4: MISC BASE D50B8D647620 lea rsp, ptr [r14+r14*2+0x20] +XDIS 6ada: MISC BASE D50B8D647721 lea rsp, ptr [r15+r14*2+0x21] +XDIS 6ae0: MISC BASE D51A8D647022 lea rsp, ptr [r16+r14*2+0x22] +XDIS 6ae6: MISC BASE D51A8D647123 lea rsp, ptr [r17+r14*2+0x23] +XDIS 6aec: MISC BASE D51A8D647224 lea rsp, ptr [r18+r14*2+0x24] +XDIS 6af2: MISC BASE D51A8D647325 lea rsp, ptr [r19+r14*2+0x25] +XDIS 6af8: MISC BASE D51A8D647426 lea rsp, ptr [r20+r14*2+0x26] +XDIS 6afe: MISC BASE D51A8D647527 lea rsp, ptr [r21+r14*2+0x27] +XDIS 6b04: MISC BASE D51A8D647628 lea rsp, ptr [r22+r14*2+0x28] +XDIS 6b0a: MISC BASE D51A8D647729 lea rsp, ptr [r23+r14*2+0x29] +XDIS 6b10: MISC BASE D51B8D64702A lea rsp, ptr [r24+r14*2+0x2a] +XDIS 6b16: MISC BASE D51B8D64712B lea rsp, ptr [r25+r14*2+0x2b] +XDIS 6b1c: MISC BASE D51B8D64722C lea rsp, ptr [r26+r14*2+0x2c] +XDIS 6b22: MISC BASE D51B8D64732D lea rsp, ptr [r27+r14*2+0x2d] +XDIS 6b28: MISC BASE D51B8D64742E lea rsp, ptr [r28+r14*2+0x2e] +XDIS 6b2e: MISC BASE D51B8D64752F lea rsp, ptr [r29+r14*2+0x2f] +XDIS 6b34: MISC BASE D51B8D647630 lea rsp, ptr [r30+r14*2+0x30] +XDIS 6b3a: MISC BASE D51B8D647731 lea rsp, ptr [r31+r14*2+0x31] +XDIS 6b40: MISC BASE D50A8D647813 lea rsp, ptr [rax+r15*2+0x13] +XDIS 6b46: MISC BASE D50A8D647914 lea rsp, ptr [rcx+r15*2+0x14] +XDIS 6b4c: MISC BASE D50A8D647A15 lea rsp, ptr [rdx+r15*2+0x15] +XDIS 6b52: MISC BASE D50A8D647B16 lea rsp, ptr [rbx+r15*2+0x16] +XDIS 6b58: MISC BASE D50A8D647C17 lea rsp, ptr [rsp+r15*2+0x17] +XDIS 6b5e: MISC BASE D50A8D647D18 lea rsp, ptr [rbp+r15*2+0x18] +XDIS 6b64: MISC BASE D50A8D647E19 lea rsp, ptr [rsi+r15*2+0x19] +XDIS 6b6a: MISC BASE D50A8D647F1A lea rsp, ptr [rdi+r15*2+0x1a] +XDIS 6b70: MISC BASE D50B8D64781B lea rsp, ptr [r8+r15*2+0x1b] +XDIS 6b76: MISC BASE D50B8D64791C lea rsp, ptr [r9+r15*2+0x1c] +XDIS 6b7c: MISC BASE D50B8D647A1D lea rsp, ptr [r10+r15*2+0x1d] +XDIS 6b82: MISC BASE D50B8D647B1E lea rsp, ptr [r11+r15*2+0x1e] +XDIS 6b88: MISC BASE D50B8D647C1F lea rsp, ptr [r12+r15*2+0x1f] +XDIS 6b8e: MISC BASE D50B8D647D20 lea rsp, ptr [r13+r15*2+0x20] +XDIS 6b94: MISC BASE D50B8D647E21 lea rsp, ptr [r14+r15*2+0x21] +XDIS 6b9a: MISC BASE D50B8D647F22 lea rsp, ptr [r15+r15*2+0x22] +XDIS 6ba0: MISC BASE D51A8D647823 lea rsp, ptr [r16+r15*2+0x23] +XDIS 6ba6: MISC BASE D51A8D647924 lea rsp, ptr [r17+r15*2+0x24] +XDIS 6bac: MISC BASE D51A8D647A25 lea rsp, ptr [r18+r15*2+0x25] +XDIS 6bb2: MISC BASE D51A8D647B26 lea rsp, ptr [r19+r15*2+0x26] +XDIS 6bb8: MISC BASE D51A8D647C27 lea rsp, ptr [r20+r15*2+0x27] +XDIS 6bbe: MISC BASE D51A8D647D28 lea rsp, ptr [r21+r15*2+0x28] +XDIS 6bc4: MISC BASE D51A8D647E29 lea rsp, ptr [r22+r15*2+0x29] +XDIS 6bca: MISC BASE D51A8D647F2A lea rsp, ptr [r23+r15*2+0x2a] +XDIS 6bd0: MISC BASE D51B8D64782B lea rsp, ptr [r24+r15*2+0x2b] +XDIS 6bd6: MISC BASE D51B8D64792C lea rsp, ptr [r25+r15*2+0x2c] +XDIS 6bdc: MISC BASE D51B8D647A2D lea rsp, ptr [r26+r15*2+0x2d] +XDIS 6be2: MISC BASE D51B8D647B2E lea rsp, ptr [r27+r15*2+0x2e] +XDIS 6be8: MISC BASE D51B8D647C2F lea rsp, ptr [r28+r15*2+0x2f] +XDIS 6bee: MISC BASE D51B8D647D30 lea rsp, ptr [r29+r15*2+0x30] +XDIS 6bf4: MISC BASE D51B8D647E31 lea rsp, ptr [r30+r15*2+0x31] +XDIS 6bfa: MISC BASE D51B8D647F32 lea rsp, ptr [r31+r15*2+0x32] +XDIS 6c00: MISC BASE D5288D644014 lea rsp, ptr [rax+r16*2+0x14] +XDIS 6c06: MISC BASE D5288D644115 lea rsp, ptr [rcx+r16*2+0x15] +XDIS 6c0c: MISC BASE D5288D644216 lea rsp, ptr [rdx+r16*2+0x16] +XDIS 6c12: MISC BASE D5288D644317 lea rsp, ptr [rbx+r16*2+0x17] +XDIS 6c18: MISC BASE D5288D644418 lea rsp, ptr [rsp+r16*2+0x18] +XDIS 6c1e: MISC BASE D5288D644519 lea rsp, ptr [rbp+r16*2+0x19] +XDIS 6c24: MISC BASE D5288D64461A lea rsp, ptr [rsi+r16*2+0x1a] +XDIS 6c2a: MISC BASE D5288D64471B lea rsp, ptr [rdi+r16*2+0x1b] +XDIS 6c30: MISC BASE D5298D64401C lea rsp, ptr [r8+r16*2+0x1c] +XDIS 6c36: MISC BASE D5298D64411D lea rsp, ptr [r9+r16*2+0x1d] +XDIS 6c3c: MISC BASE D5298D64421E lea rsp, ptr [r10+r16*2+0x1e] +XDIS 6c42: MISC BASE D5298D64431F lea rsp, ptr [r11+r16*2+0x1f] +XDIS 6c48: MISC BASE D5298D644420 lea rsp, ptr [r12+r16*2+0x20] +XDIS 6c4e: MISC BASE D5298D644521 lea rsp, ptr [r13+r16*2+0x21] +XDIS 6c54: MISC BASE D5298D644622 lea rsp, ptr [r14+r16*2+0x22] +XDIS 6c5a: MISC BASE D5298D644723 lea rsp, ptr [r15+r16*2+0x23] +XDIS 6c60: MISC BASE D5388D644024 lea rsp, ptr [r16+r16*2+0x24] +XDIS 6c66: MISC BASE D5388D644125 lea rsp, ptr [r17+r16*2+0x25] +XDIS 6c6c: MISC BASE D5388D644226 lea rsp, ptr [r18+r16*2+0x26] +XDIS 6c72: MISC BASE D5388D644327 lea rsp, ptr [r19+r16*2+0x27] +XDIS 6c78: MISC BASE D5388D644428 lea rsp, ptr [r20+r16*2+0x28] +XDIS 6c7e: MISC BASE D5388D644529 lea rsp, ptr [r21+r16*2+0x29] +XDIS 6c84: MISC BASE D5388D64462A lea rsp, ptr [r22+r16*2+0x2a] +XDIS 6c8a: MISC BASE D5388D64472B lea rsp, ptr [r23+r16*2+0x2b] +XDIS 6c90: MISC BASE D5398D64402C lea rsp, ptr [r24+r16*2+0x2c] +XDIS 6c96: MISC BASE D5398D64412D lea rsp, ptr [r25+r16*2+0x2d] +XDIS 6c9c: MISC BASE D5398D64422E lea rsp, ptr [r26+r16*2+0x2e] +XDIS 6ca2: MISC BASE D5398D64432F lea rsp, ptr [r27+r16*2+0x2f] +XDIS 6ca8: MISC BASE D5398D644430 lea rsp, ptr [r28+r16*2+0x30] +XDIS 6cae: MISC BASE D5398D644531 lea rsp, ptr [r29+r16*2+0x31] +XDIS 6cb4: MISC BASE D5398D644632 lea rsp, ptr [r30+r16*2+0x32] +XDIS 6cba: MISC BASE D5398D644733 lea rsp, ptr [r31+r16*2+0x33] +XDIS 6cc0: MISC BASE D5288D644815 lea rsp, ptr [rax+r17*2+0x15] +XDIS 6cc6: MISC BASE D5288D644916 lea rsp, ptr [rcx+r17*2+0x16] +XDIS 6ccc: MISC BASE D5288D644A17 lea rsp, ptr [rdx+r17*2+0x17] +XDIS 6cd2: MISC BASE D5288D644B18 lea rsp, ptr [rbx+r17*2+0x18] +XDIS 6cd8: MISC BASE D5288D644C19 lea rsp, ptr [rsp+r17*2+0x19] +XDIS 6cde: MISC BASE D5288D644D1A lea rsp, ptr [rbp+r17*2+0x1a] +XDIS 6ce4: MISC BASE D5288D644E1B lea rsp, ptr [rsi+r17*2+0x1b] +XDIS 6cea: MISC BASE D5288D644F1C lea rsp, ptr [rdi+r17*2+0x1c] +XDIS 6cf0: MISC BASE D5298D64481D lea rsp, ptr [r8+r17*2+0x1d] +XDIS 6cf6: MISC BASE D5298D64491E lea rsp, ptr [r9+r17*2+0x1e] +XDIS 6cfc: MISC BASE D5298D644A1F lea rsp, ptr [r10+r17*2+0x1f] +XDIS 6d02: MISC BASE D5298D644B20 lea rsp, ptr [r11+r17*2+0x20] +XDIS 6d08: MISC BASE D5298D644C21 lea rsp, ptr [r12+r17*2+0x21] +XDIS 6d0e: MISC BASE D5298D644D22 lea rsp, ptr [r13+r17*2+0x22] +XDIS 6d14: MISC BASE D5298D644E23 lea rsp, ptr [r14+r17*2+0x23] +XDIS 6d1a: MISC BASE D5298D644F24 lea rsp, ptr [r15+r17*2+0x24] +XDIS 6d20: MISC BASE D5388D644825 lea rsp, ptr [r16+r17*2+0x25] +XDIS 6d26: MISC BASE D5388D644926 lea rsp, ptr [r17+r17*2+0x26] +XDIS 6d2c: MISC BASE D5388D644A27 lea rsp, ptr [r18+r17*2+0x27] +XDIS 6d32: MISC BASE D5388D644B28 lea rsp, ptr [r19+r17*2+0x28] +XDIS 6d38: MISC BASE D5388D644C29 lea rsp, ptr [r20+r17*2+0x29] +XDIS 6d3e: MISC BASE D5388D644D2A lea rsp, ptr [r21+r17*2+0x2a] +XDIS 6d44: MISC BASE D5388D644E2B lea rsp, ptr [r22+r17*2+0x2b] +XDIS 6d4a: MISC BASE D5388D644F2C lea rsp, ptr [r23+r17*2+0x2c] +XDIS 6d50: MISC BASE D5398D64482D lea rsp, ptr [r24+r17*2+0x2d] +XDIS 6d56: MISC BASE D5398D64492E lea rsp, ptr [r25+r17*2+0x2e] +XDIS 6d5c: MISC BASE D5398D644A2F lea rsp, ptr [r26+r17*2+0x2f] +XDIS 6d62: MISC BASE D5398D644B30 lea rsp, ptr [r27+r17*2+0x30] +XDIS 6d68: MISC BASE D5398D644C31 lea rsp, ptr [r28+r17*2+0x31] +XDIS 6d6e: MISC BASE D5398D644D32 lea rsp, ptr [r29+r17*2+0x32] +XDIS 6d74: MISC BASE D5398D644E33 lea rsp, ptr [r30+r17*2+0x33] +XDIS 6d7a: MISC BASE D5398D644F34 lea rsp, ptr [r31+r17*2+0x34] +XDIS 6d80: MISC BASE D5288D645016 lea rsp, ptr [rax+r18*2+0x16] +XDIS 6d86: MISC BASE D5288D645117 lea rsp, ptr [rcx+r18*2+0x17] +XDIS 6d8c: MISC BASE D5288D645218 lea rsp, ptr [rdx+r18*2+0x18] +XDIS 6d92: MISC BASE D5288D645319 lea rsp, ptr [rbx+r18*2+0x19] +XDIS 6d98: MISC BASE D5288D64541A lea rsp, ptr [rsp+r18*2+0x1a] +XDIS 6d9e: MISC BASE D5288D64551B lea rsp, ptr [rbp+r18*2+0x1b] +XDIS 6da4: MISC BASE D5288D64561C lea rsp, ptr [rsi+r18*2+0x1c] +XDIS 6daa: MISC BASE D5288D64571D lea rsp, ptr [rdi+r18*2+0x1d] +XDIS 6db0: MISC BASE D5298D64501E lea rsp, ptr [r8+r18*2+0x1e] +XDIS 6db6: MISC BASE D5298D64511F lea rsp, ptr [r9+r18*2+0x1f] +XDIS 6dbc: MISC BASE D5298D645220 lea rsp, ptr [r10+r18*2+0x20] +XDIS 6dc2: MISC BASE D5298D645321 lea rsp, ptr [r11+r18*2+0x21] +XDIS 6dc8: MISC BASE D5298D645422 lea rsp, ptr [r12+r18*2+0x22] +XDIS 6dce: MISC BASE D5298D645523 lea rsp, ptr [r13+r18*2+0x23] +XDIS 6dd4: MISC BASE D5298D645624 lea rsp, ptr [r14+r18*2+0x24] +XDIS 6dda: MISC BASE D5298D645725 lea rsp, ptr [r15+r18*2+0x25] +XDIS 6de0: MISC BASE D5388D645026 lea rsp, ptr [r16+r18*2+0x26] +XDIS 6de6: MISC BASE D5388D645127 lea rsp, ptr [r17+r18*2+0x27] +XDIS 6dec: MISC BASE D5388D645228 lea rsp, ptr [r18+r18*2+0x28] +XDIS 6df2: MISC BASE D5388D645329 lea rsp, ptr [r19+r18*2+0x29] +XDIS 6df8: MISC BASE D5388D64542A lea rsp, ptr [r20+r18*2+0x2a] +XDIS 6dfe: MISC BASE D5388D64552B lea rsp, ptr [r21+r18*2+0x2b] +XDIS 6e04: MISC BASE D5388D64562C lea rsp, ptr [r22+r18*2+0x2c] +XDIS 6e0a: MISC BASE D5388D64572D lea rsp, ptr [r23+r18*2+0x2d] +XDIS 6e10: MISC BASE D5398D64502E lea rsp, ptr [r24+r18*2+0x2e] +XDIS 6e16: MISC BASE D5398D64512F lea rsp, ptr [r25+r18*2+0x2f] +XDIS 6e1c: MISC BASE D5398D645230 lea rsp, ptr [r26+r18*2+0x30] +XDIS 6e22: MISC BASE D5398D645331 lea rsp, ptr [r27+r18*2+0x31] +XDIS 6e28: MISC BASE D5398D645432 lea rsp, ptr [r28+r18*2+0x32] +XDIS 6e2e: MISC BASE D5398D645533 lea rsp, ptr [r29+r18*2+0x33] +XDIS 6e34: MISC BASE D5398D645634 lea rsp, ptr [r30+r18*2+0x34] +XDIS 6e3a: MISC BASE D5398D645735 lea rsp, ptr [r31+r18*2+0x35] +XDIS 6e40: MISC BASE D5288D645817 lea rsp, ptr [rax+r19*2+0x17] +XDIS 6e46: MISC BASE D5288D645918 lea rsp, ptr [rcx+r19*2+0x18] +XDIS 6e4c: MISC BASE D5288D645A19 lea rsp, ptr [rdx+r19*2+0x19] +XDIS 6e52: MISC BASE D5288D645B1A lea rsp, ptr [rbx+r19*2+0x1a] +XDIS 6e58: MISC BASE D5288D645C1B lea rsp, ptr [rsp+r19*2+0x1b] +XDIS 6e5e: MISC BASE D5288D645D1C lea rsp, ptr [rbp+r19*2+0x1c] +XDIS 6e64: MISC BASE D5288D645E1D lea rsp, ptr [rsi+r19*2+0x1d] +XDIS 6e6a: MISC BASE D5288D645F1E lea rsp, ptr [rdi+r19*2+0x1e] +XDIS 6e70: MISC BASE D5298D64581F lea rsp, ptr [r8+r19*2+0x1f] +XDIS 6e76: MISC BASE D5298D645920 lea rsp, ptr [r9+r19*2+0x20] +XDIS 6e7c: MISC BASE D5298D645A21 lea rsp, ptr [r10+r19*2+0x21] +XDIS 6e82: MISC BASE D5298D645B22 lea rsp, ptr [r11+r19*2+0x22] +XDIS 6e88: MISC BASE D5298D645C23 lea rsp, ptr [r12+r19*2+0x23] +XDIS 6e8e: MISC BASE D5298D645D24 lea rsp, ptr [r13+r19*2+0x24] +XDIS 6e94: MISC BASE D5298D645E25 lea rsp, ptr [r14+r19*2+0x25] +XDIS 6e9a: MISC BASE D5298D645F26 lea rsp, ptr [r15+r19*2+0x26] +XDIS 6ea0: MISC BASE D5388D645827 lea rsp, ptr [r16+r19*2+0x27] +XDIS 6ea6: MISC BASE D5388D645928 lea rsp, ptr [r17+r19*2+0x28] +XDIS 6eac: MISC BASE D5388D645A29 lea rsp, ptr [r18+r19*2+0x29] +XDIS 6eb2: MISC BASE D5388D645B2A lea rsp, ptr [r19+r19*2+0x2a] +XDIS 6eb8: MISC BASE D5388D645C2B lea rsp, ptr [r20+r19*2+0x2b] +XDIS 6ebe: MISC BASE D5388D645D2C lea rsp, ptr [r21+r19*2+0x2c] +XDIS 6ec4: MISC BASE D5388D645E2D lea rsp, ptr [r22+r19*2+0x2d] +XDIS 6eca: MISC BASE D5388D645F2E lea rsp, ptr [r23+r19*2+0x2e] +XDIS 6ed0: MISC BASE D5398D64582F lea rsp, ptr [r24+r19*2+0x2f] +XDIS 6ed6: MISC BASE D5398D645930 lea rsp, ptr [r25+r19*2+0x30] +XDIS 6edc: MISC BASE D5398D645A31 lea rsp, ptr [r26+r19*2+0x31] +XDIS 6ee2: MISC BASE D5398D645B32 lea rsp, ptr [r27+r19*2+0x32] +XDIS 6ee8: MISC BASE D5398D645C33 lea rsp, ptr [r28+r19*2+0x33] +XDIS 6eee: MISC BASE D5398D645D34 lea rsp, ptr [r29+r19*2+0x34] +XDIS 6ef4: MISC BASE D5398D645E35 lea rsp, ptr [r30+r19*2+0x35] +XDIS 6efa: MISC BASE D5398D645F36 lea rsp, ptr [r31+r19*2+0x36] +XDIS 6f00: MISC BASE D5288D646018 lea rsp, ptr [rax+r20*2+0x18] +XDIS 6f06: MISC BASE D5288D646119 lea rsp, ptr [rcx+r20*2+0x19] +XDIS 6f0c: MISC BASE D5288D64621A lea rsp, ptr [rdx+r20*2+0x1a] +XDIS 6f12: MISC BASE D5288D64631B lea rsp, ptr [rbx+r20*2+0x1b] +XDIS 6f18: MISC BASE D5288D64641C lea rsp, ptr [rsp+r20*2+0x1c] +XDIS 6f1e: MISC BASE D5288D64651D lea rsp, ptr [rbp+r20*2+0x1d] +XDIS 6f24: MISC BASE D5288D64661E lea rsp, ptr [rsi+r20*2+0x1e] +XDIS 6f2a: MISC BASE D5288D64671F lea rsp, ptr [rdi+r20*2+0x1f] +XDIS 6f30: MISC BASE D5298D646020 lea rsp, ptr [r8+r20*2+0x20] +XDIS 6f36: MISC BASE D5298D646121 lea rsp, ptr [r9+r20*2+0x21] +XDIS 6f3c: MISC BASE D5298D646222 lea rsp, ptr [r10+r20*2+0x22] +XDIS 6f42: MISC BASE D5298D646323 lea rsp, ptr [r11+r20*2+0x23] +XDIS 6f48: MISC BASE D5298D646424 lea rsp, ptr [r12+r20*2+0x24] +XDIS 6f4e: MISC BASE D5298D646525 lea rsp, ptr [r13+r20*2+0x25] +XDIS 6f54: MISC BASE D5298D646626 lea rsp, ptr [r14+r20*2+0x26] +XDIS 6f5a: MISC BASE D5298D646727 lea rsp, ptr [r15+r20*2+0x27] +XDIS 6f60: MISC BASE D5388D646028 lea rsp, ptr [r16+r20*2+0x28] +XDIS 6f66: MISC BASE D5388D646129 lea rsp, ptr [r17+r20*2+0x29] +XDIS 6f6c: MISC BASE D5388D64622A lea rsp, ptr [r18+r20*2+0x2a] +XDIS 6f72: MISC BASE D5388D64632B lea rsp, ptr [r19+r20*2+0x2b] +XDIS 6f78: MISC BASE D5388D64642C lea rsp, ptr [r20+r20*2+0x2c] +XDIS 6f7e: MISC BASE D5388D64652D lea rsp, ptr [r21+r20*2+0x2d] +XDIS 6f84: MISC BASE D5388D64662E lea rsp, ptr [r22+r20*2+0x2e] +XDIS 6f8a: MISC BASE D5388D64672F lea rsp, ptr [r23+r20*2+0x2f] +XDIS 6f90: MISC BASE D5398D646030 lea rsp, ptr [r24+r20*2+0x30] +XDIS 6f96: MISC BASE D5398D646131 lea rsp, ptr [r25+r20*2+0x31] +XDIS 6f9c: MISC BASE D5398D646232 lea rsp, ptr [r26+r20*2+0x32] +XDIS 6fa2: MISC BASE D5398D646333 lea rsp, ptr [r27+r20*2+0x33] +XDIS 6fa8: MISC BASE D5398D646434 lea rsp, ptr [r28+r20*2+0x34] +XDIS 6fae: MISC BASE D5398D646535 lea rsp, ptr [r29+r20*2+0x35] +XDIS 6fb4: MISC BASE D5398D646636 lea rsp, ptr [r30+r20*2+0x36] +XDIS 6fba: MISC BASE D5398D646737 lea rsp, ptr [r31+r20*2+0x37] +XDIS 6fc0: MISC BASE D5288D646819 lea rsp, ptr [rax+r21*2+0x19] +XDIS 6fc6: MISC BASE D5288D64691A lea rsp, ptr [rcx+r21*2+0x1a] +XDIS 6fcc: MISC BASE D5288D646A1B lea rsp, ptr [rdx+r21*2+0x1b] +XDIS 6fd2: MISC BASE D5288D646B1C lea rsp, ptr [rbx+r21*2+0x1c] +XDIS 6fd8: MISC BASE D5288D646C1D lea rsp, ptr [rsp+r21*2+0x1d] +XDIS 6fde: MISC BASE D5288D646D1E lea rsp, ptr [rbp+r21*2+0x1e] +XDIS 6fe4: MISC BASE D5288D646E1F lea rsp, ptr [rsi+r21*2+0x1f] +XDIS 6fea: MISC BASE D5288D646F20 lea rsp, ptr [rdi+r21*2+0x20] +XDIS 6ff0: MISC BASE D5298D646821 lea rsp, ptr [r8+r21*2+0x21] +XDIS 6ff6: MISC BASE D5298D646922 lea rsp, ptr [r9+r21*2+0x22] +XDIS 6ffc: MISC BASE D5298D646A23 lea rsp, ptr [r10+r21*2+0x23] +XDIS 7002: MISC BASE D5298D646B24 lea rsp, ptr [r11+r21*2+0x24] +XDIS 7008: MISC BASE D5298D646C25 lea rsp, ptr [r12+r21*2+0x25] +XDIS 700e: MISC BASE D5298D646D26 lea rsp, ptr [r13+r21*2+0x26] +XDIS 7014: MISC BASE D5298D646E27 lea rsp, ptr [r14+r21*2+0x27] +XDIS 701a: MISC BASE D5298D646F28 lea rsp, ptr [r15+r21*2+0x28] +XDIS 7020: MISC BASE D5388D646829 lea rsp, ptr [r16+r21*2+0x29] +XDIS 7026: MISC BASE D5388D64692A lea rsp, ptr [r17+r21*2+0x2a] +XDIS 702c: MISC BASE D5388D646A2B lea rsp, ptr [r18+r21*2+0x2b] +XDIS 7032: MISC BASE D5388D646B2C lea rsp, ptr [r19+r21*2+0x2c] +XDIS 7038: MISC BASE D5388D646C2D lea rsp, ptr [r20+r21*2+0x2d] +XDIS 703e: MISC BASE D5388D646D2E lea rsp, ptr [r21+r21*2+0x2e] +XDIS 7044: MISC BASE D5388D646E2F lea rsp, ptr [r22+r21*2+0x2f] +XDIS 704a: MISC BASE D5388D646F30 lea rsp, ptr [r23+r21*2+0x30] +XDIS 7050: MISC BASE D5398D646831 lea rsp, ptr [r24+r21*2+0x31] +XDIS 7056: MISC BASE D5398D646932 lea rsp, ptr [r25+r21*2+0x32] +XDIS 705c: MISC BASE D5398D646A33 lea rsp, ptr [r26+r21*2+0x33] +XDIS 7062: MISC BASE D5398D646B34 lea rsp, ptr [r27+r21*2+0x34] +XDIS 7068: MISC BASE D5398D646C35 lea rsp, ptr [r28+r21*2+0x35] +XDIS 706e: MISC BASE D5398D646D36 lea rsp, ptr [r29+r21*2+0x36] +XDIS 7074: MISC BASE D5398D646E37 lea rsp, ptr [r30+r21*2+0x37] +XDIS 707a: MISC BASE D5398D646F38 lea rsp, ptr [r31+r21*2+0x38] +XDIS 7080: MISC BASE D5288D64701A lea rsp, ptr [rax+r22*2+0x1a] +XDIS 7086: MISC BASE D5288D64711B lea rsp, ptr [rcx+r22*2+0x1b] +XDIS 708c: MISC BASE D5288D64721C lea rsp, ptr [rdx+r22*2+0x1c] +XDIS 7092: MISC BASE D5288D64731D lea rsp, ptr [rbx+r22*2+0x1d] +XDIS 7098: MISC BASE D5288D64741E lea rsp, ptr [rsp+r22*2+0x1e] +XDIS 709e: MISC BASE D5288D64751F lea rsp, ptr [rbp+r22*2+0x1f] +XDIS 70a4: MISC BASE D5288D647620 lea rsp, ptr [rsi+r22*2+0x20] +XDIS 70aa: MISC BASE D5288D647721 lea rsp, ptr [rdi+r22*2+0x21] +XDIS 70b0: MISC BASE D5298D647022 lea rsp, ptr [r8+r22*2+0x22] +XDIS 70b6: MISC BASE D5298D647123 lea rsp, ptr [r9+r22*2+0x23] +XDIS 70bc: MISC BASE D5298D647224 lea rsp, ptr [r10+r22*2+0x24] +XDIS 70c2: MISC BASE D5298D647325 lea rsp, ptr [r11+r22*2+0x25] +XDIS 70c8: MISC BASE D5298D647426 lea rsp, ptr [r12+r22*2+0x26] +XDIS 70ce: MISC BASE D5298D647527 lea rsp, ptr [r13+r22*2+0x27] +XDIS 70d4: MISC BASE D5298D647628 lea rsp, ptr [r14+r22*2+0x28] +XDIS 70da: MISC BASE D5298D647729 lea rsp, ptr [r15+r22*2+0x29] +XDIS 70e0: MISC BASE D5388D64702A lea rsp, ptr [r16+r22*2+0x2a] +XDIS 70e6: MISC BASE D5388D64712B lea rsp, ptr [r17+r22*2+0x2b] +XDIS 70ec: MISC BASE D5388D64722C lea rsp, ptr [r18+r22*2+0x2c] +XDIS 70f2: MISC BASE D5388D64732D lea rsp, ptr [r19+r22*2+0x2d] +XDIS 70f8: MISC BASE D5388D64742E lea rsp, ptr [r20+r22*2+0x2e] +XDIS 70fe: MISC BASE D5388D64752F lea rsp, ptr [r21+r22*2+0x2f] +XDIS 7104: MISC BASE D5388D647630 lea rsp, ptr [r22+r22*2+0x30] +XDIS 710a: MISC BASE D5388D647731 lea rsp, ptr [r23+r22*2+0x31] +XDIS 7110: MISC BASE D5398D647032 lea rsp, ptr [r24+r22*2+0x32] +XDIS 7116: MISC BASE D5398D647133 lea rsp, ptr [r25+r22*2+0x33] +XDIS 711c: MISC BASE D5398D647234 lea rsp, ptr [r26+r22*2+0x34] +XDIS 7122: MISC BASE D5398D647335 lea rsp, ptr [r27+r22*2+0x35] +XDIS 7128: MISC BASE D5398D647436 lea rsp, ptr [r28+r22*2+0x36] +XDIS 712e: MISC BASE D5398D647537 lea rsp, ptr [r29+r22*2+0x37] +XDIS 7134: MISC BASE D5398D647638 lea rsp, ptr [r30+r22*2+0x38] +XDIS 713a: MISC BASE D5398D647739 lea rsp, ptr [r31+r22*2+0x39] +XDIS 7140: MISC BASE D5288D64781B lea rsp, ptr [rax+r23*2+0x1b] +XDIS 7146: MISC BASE D5288D64791C lea rsp, ptr [rcx+r23*2+0x1c] +XDIS 714c: MISC BASE D5288D647A1D lea rsp, ptr [rdx+r23*2+0x1d] +XDIS 7152: MISC BASE D5288D647B1E lea rsp, ptr [rbx+r23*2+0x1e] +XDIS 7158: MISC BASE D5288D647C1F lea rsp, ptr [rsp+r23*2+0x1f] +XDIS 715e: MISC BASE D5288D647D20 lea rsp, ptr [rbp+r23*2+0x20] +XDIS 7164: MISC BASE D5288D647E21 lea rsp, ptr [rsi+r23*2+0x21] +XDIS 716a: MISC BASE D5288D647F22 lea rsp, ptr [rdi+r23*2+0x22] +XDIS 7170: MISC BASE D5298D647823 lea rsp, ptr [r8+r23*2+0x23] +XDIS 7176: MISC BASE D5298D647924 lea rsp, ptr [r9+r23*2+0x24] +XDIS 717c: MISC BASE D5298D647A25 lea rsp, ptr [r10+r23*2+0x25] +XDIS 7182: MISC BASE D5298D647B26 lea rsp, ptr [r11+r23*2+0x26] +XDIS 7188: MISC BASE D5298D647C27 lea rsp, ptr [r12+r23*2+0x27] +XDIS 718e: MISC BASE D5298D647D28 lea rsp, ptr [r13+r23*2+0x28] +XDIS 7194: MISC BASE D5298D647E29 lea rsp, ptr [r14+r23*2+0x29] +XDIS 719a: MISC BASE D5298D647F2A lea rsp, ptr [r15+r23*2+0x2a] +XDIS 71a0: MISC BASE D5388D64782B lea rsp, ptr [r16+r23*2+0x2b] +XDIS 71a6: MISC BASE D5388D64792C lea rsp, ptr [r17+r23*2+0x2c] +XDIS 71ac: MISC BASE D5388D647A2D lea rsp, ptr [r18+r23*2+0x2d] +XDIS 71b2: MISC BASE D5388D647B2E lea rsp, ptr [r19+r23*2+0x2e] +XDIS 71b8: MISC BASE D5388D647C2F lea rsp, ptr [r20+r23*2+0x2f] +XDIS 71be: MISC BASE D5388D647D30 lea rsp, ptr [r21+r23*2+0x30] +XDIS 71c4: MISC BASE D5388D647E31 lea rsp, ptr [r22+r23*2+0x31] +XDIS 71ca: MISC BASE D5388D647F32 lea rsp, ptr [r23+r23*2+0x32] +XDIS 71d0: MISC BASE D5398D647833 lea rsp, ptr [r24+r23*2+0x33] +XDIS 71d6: MISC BASE D5398D647934 lea rsp, ptr [r25+r23*2+0x34] +XDIS 71dc: MISC BASE D5398D647A35 lea rsp, ptr [r26+r23*2+0x35] +XDIS 71e2: MISC BASE D5398D647B36 lea rsp, ptr [r27+r23*2+0x36] +XDIS 71e8: MISC BASE D5398D647C37 lea rsp, ptr [r28+r23*2+0x37] +XDIS 71ee: MISC BASE D5398D647D38 lea rsp, ptr [r29+r23*2+0x38] +XDIS 71f4: MISC BASE D5398D647E39 lea rsp, ptr [r30+r23*2+0x39] +XDIS 71fa: MISC BASE D5398D647F3A lea rsp, ptr [r31+r23*2+0x3a] +XDIS 7200: MISC BASE D52A8D64401C lea rsp, ptr [rax+r24*2+0x1c] +XDIS 7206: MISC BASE D52A8D64411D lea rsp, ptr [rcx+r24*2+0x1d] +XDIS 720c: MISC BASE D52A8D64421E lea rsp, ptr [rdx+r24*2+0x1e] +XDIS 7212: MISC BASE D52A8D64431F lea rsp, ptr [rbx+r24*2+0x1f] +XDIS 7218: MISC BASE D52A8D644420 lea rsp, ptr [rsp+r24*2+0x20] +XDIS 721e: MISC BASE D52A8D644521 lea rsp, ptr [rbp+r24*2+0x21] +XDIS 7224: MISC BASE D52A8D644622 lea rsp, ptr [rsi+r24*2+0x22] +XDIS 722a: MISC BASE D52A8D644723 lea rsp, ptr [rdi+r24*2+0x23] +XDIS 7230: MISC BASE D52B8D644024 lea rsp, ptr [r8+r24*2+0x24] +XDIS 7236: MISC BASE D52B8D644125 lea rsp, ptr [r9+r24*2+0x25] +XDIS 723c: MISC BASE D52B8D644226 lea rsp, ptr [r10+r24*2+0x26] +XDIS 7242: MISC BASE D52B8D644327 lea rsp, ptr [r11+r24*2+0x27] +XDIS 7248: MISC BASE D52B8D644428 lea rsp, ptr [r12+r24*2+0x28] +XDIS 724e: MISC BASE D52B8D644529 lea rsp, ptr [r13+r24*2+0x29] +XDIS 7254: MISC BASE D52B8D64462A lea rsp, ptr [r14+r24*2+0x2a] +XDIS 725a: MISC BASE D52B8D64472B lea rsp, ptr [r15+r24*2+0x2b] +XDIS 7260: MISC BASE D53A8D64402C lea rsp, ptr [r16+r24*2+0x2c] +XDIS 7266: MISC BASE D53A8D64412D lea rsp, ptr [r17+r24*2+0x2d] +XDIS 726c: MISC BASE D53A8D64422E lea rsp, ptr [r18+r24*2+0x2e] +XDIS 7272: MISC BASE D53A8D64432F lea rsp, ptr [r19+r24*2+0x2f] +XDIS 7278: MISC BASE D53A8D644430 lea rsp, ptr [r20+r24*2+0x30] +XDIS 727e: MISC BASE D53A8D644531 lea rsp, ptr [r21+r24*2+0x31] +XDIS 7284: MISC BASE D53A8D644632 lea rsp, ptr [r22+r24*2+0x32] +XDIS 728a: MISC BASE D53A8D644733 lea rsp, ptr [r23+r24*2+0x33] +XDIS 7290: MISC BASE D53B8D644034 lea rsp, ptr [r24+r24*2+0x34] +XDIS 7296: MISC BASE D53B8D644135 lea rsp, ptr [r25+r24*2+0x35] +XDIS 729c: MISC BASE D53B8D644236 lea rsp, ptr [r26+r24*2+0x36] +XDIS 72a2: MISC BASE D53B8D644337 lea rsp, ptr [r27+r24*2+0x37] +XDIS 72a8: MISC BASE D53B8D644438 lea rsp, ptr [r28+r24*2+0x38] +XDIS 72ae: MISC BASE D53B8D644539 lea rsp, ptr [r29+r24*2+0x39] +XDIS 72b4: MISC BASE D53B8D64463A lea rsp, ptr [r30+r24*2+0x3a] +XDIS 72ba: MISC BASE D53B8D64473B lea rsp, ptr [r31+r24*2+0x3b] +XDIS 72c0: MISC BASE D52A8D64481D lea rsp, ptr [rax+r25*2+0x1d] +XDIS 72c6: MISC BASE D52A8D64491E lea rsp, ptr [rcx+r25*2+0x1e] +XDIS 72cc: MISC BASE D52A8D644A1F lea rsp, ptr [rdx+r25*2+0x1f] +XDIS 72d2: MISC BASE D52A8D644B20 lea rsp, ptr [rbx+r25*2+0x20] +XDIS 72d8: MISC BASE D52A8D644C21 lea rsp, ptr [rsp+r25*2+0x21] +XDIS 72de: MISC BASE D52A8D644D22 lea rsp, ptr [rbp+r25*2+0x22] +XDIS 72e4: MISC BASE D52A8D644E23 lea rsp, ptr [rsi+r25*2+0x23] +XDIS 72ea: MISC BASE D52A8D644F24 lea rsp, ptr [rdi+r25*2+0x24] +XDIS 72f0: MISC BASE D52B8D644825 lea rsp, ptr [r8+r25*2+0x25] +XDIS 72f6: MISC BASE D52B8D644926 lea rsp, ptr [r9+r25*2+0x26] +XDIS 72fc: MISC BASE D52B8D644A27 lea rsp, ptr [r10+r25*2+0x27] +XDIS 7302: MISC BASE D52B8D644B28 lea rsp, ptr [r11+r25*2+0x28] +XDIS 7308: MISC BASE D52B8D644C29 lea rsp, ptr [r12+r25*2+0x29] +XDIS 730e: MISC BASE D52B8D644D2A lea rsp, ptr [r13+r25*2+0x2a] +XDIS 7314: MISC BASE D52B8D644E2B lea rsp, ptr [r14+r25*2+0x2b] +XDIS 731a: MISC BASE D52B8D644F2C lea rsp, ptr [r15+r25*2+0x2c] +XDIS 7320: MISC BASE D53A8D64482D lea rsp, ptr [r16+r25*2+0x2d] +XDIS 7326: MISC BASE D53A8D64492E lea rsp, ptr [r17+r25*2+0x2e] +XDIS 732c: MISC BASE D53A8D644A2F lea rsp, ptr [r18+r25*2+0x2f] +XDIS 7332: MISC BASE D53A8D644B30 lea rsp, ptr [r19+r25*2+0x30] +XDIS 7338: MISC BASE D53A8D644C31 lea rsp, ptr [r20+r25*2+0x31] +XDIS 733e: MISC BASE D53A8D644D32 lea rsp, ptr [r21+r25*2+0x32] +XDIS 7344: MISC BASE D53A8D644E33 lea rsp, ptr [r22+r25*2+0x33] +XDIS 734a: MISC BASE D53A8D644F34 lea rsp, ptr [r23+r25*2+0x34] +XDIS 7350: MISC BASE D53B8D644835 lea rsp, ptr [r24+r25*2+0x35] +XDIS 7356: MISC BASE D53B8D644936 lea rsp, ptr [r25+r25*2+0x36] +XDIS 735c: MISC BASE D53B8D644A37 lea rsp, ptr [r26+r25*2+0x37] +XDIS 7362: MISC BASE D53B8D644B38 lea rsp, ptr [r27+r25*2+0x38] +XDIS 7368: MISC BASE D53B8D644C39 lea rsp, ptr [r28+r25*2+0x39] +XDIS 736e: MISC BASE D53B8D644D3A lea rsp, ptr [r29+r25*2+0x3a] +XDIS 7374: MISC BASE D53B8D644E3B lea rsp, ptr [r30+r25*2+0x3b] +XDIS 737a: MISC BASE D53B8D644F3C lea rsp, ptr [r31+r25*2+0x3c] +XDIS 7380: MISC BASE D52A8D64501E lea rsp, ptr [rax+r26*2+0x1e] +XDIS 7386: MISC BASE D52A8D64511F lea rsp, ptr [rcx+r26*2+0x1f] +XDIS 738c: MISC BASE D52A8D645220 lea rsp, ptr [rdx+r26*2+0x20] +XDIS 7392: MISC BASE D52A8D645321 lea rsp, ptr [rbx+r26*2+0x21] +XDIS 7398: MISC BASE D52A8D645422 lea rsp, ptr [rsp+r26*2+0x22] +XDIS 739e: MISC BASE D52A8D645523 lea rsp, ptr [rbp+r26*2+0x23] +XDIS 73a4: MISC BASE D52A8D645624 lea rsp, ptr [rsi+r26*2+0x24] +XDIS 73aa: MISC BASE D52A8D645725 lea rsp, ptr [rdi+r26*2+0x25] +XDIS 73b0: MISC BASE D52B8D645026 lea rsp, ptr [r8+r26*2+0x26] +XDIS 73b6: MISC BASE D52B8D645127 lea rsp, ptr [r9+r26*2+0x27] +XDIS 73bc: MISC BASE D52B8D645228 lea rsp, ptr [r10+r26*2+0x28] +XDIS 73c2: MISC BASE D52B8D645329 lea rsp, ptr [r11+r26*2+0x29] +XDIS 73c8: MISC BASE D52B8D64542A lea rsp, ptr [r12+r26*2+0x2a] +XDIS 73ce: MISC BASE D52B8D64552B lea rsp, ptr [r13+r26*2+0x2b] +XDIS 73d4: MISC BASE D52B8D64562C lea rsp, ptr [r14+r26*2+0x2c] +XDIS 73da: MISC BASE D52B8D64572D lea rsp, ptr [r15+r26*2+0x2d] +XDIS 73e0: MISC BASE D53A8D64502E lea rsp, ptr [r16+r26*2+0x2e] +XDIS 73e6: MISC BASE D53A8D64512F lea rsp, ptr [r17+r26*2+0x2f] +XDIS 73ec: MISC BASE D53A8D645230 lea rsp, ptr [r18+r26*2+0x30] +XDIS 73f2: MISC BASE D53A8D645331 lea rsp, ptr [r19+r26*2+0x31] +XDIS 73f8: MISC BASE D53A8D645432 lea rsp, ptr [r20+r26*2+0x32] +XDIS 73fe: MISC BASE D53A8D645533 lea rsp, ptr [r21+r26*2+0x33] +XDIS 7404: MISC BASE D53A8D645634 lea rsp, ptr [r22+r26*2+0x34] +XDIS 740a: MISC BASE D53A8D645735 lea rsp, ptr [r23+r26*2+0x35] +XDIS 7410: MISC BASE D53B8D645036 lea rsp, ptr [r24+r26*2+0x36] +XDIS 7416: MISC BASE D53B8D645137 lea rsp, ptr [r25+r26*2+0x37] +XDIS 741c: MISC BASE D53B8D645238 lea rsp, ptr [r26+r26*2+0x38] +XDIS 7422: MISC BASE D53B8D645339 lea rsp, ptr [r27+r26*2+0x39] +XDIS 7428: MISC BASE D53B8D64543A lea rsp, ptr [r28+r26*2+0x3a] +XDIS 742e: MISC BASE D53B8D64553B lea rsp, ptr [r29+r26*2+0x3b] +XDIS 7434: MISC BASE D53B8D64563C lea rsp, ptr [r30+r26*2+0x3c] +XDIS 743a: MISC BASE D53B8D64573D lea rsp, ptr [r31+r26*2+0x3d] +XDIS 7440: MISC BASE D52A8D64581F lea rsp, ptr [rax+r27*2+0x1f] +XDIS 7446: MISC BASE D52A8D645920 lea rsp, ptr [rcx+r27*2+0x20] +XDIS 744c: MISC BASE D52A8D645A21 lea rsp, ptr [rdx+r27*2+0x21] +XDIS 7452: MISC BASE D52A8D645B22 lea rsp, ptr [rbx+r27*2+0x22] +XDIS 7458: MISC BASE D52A8D645C23 lea rsp, ptr [rsp+r27*2+0x23] +XDIS 745e: MISC BASE D52A8D645D24 lea rsp, ptr [rbp+r27*2+0x24] +XDIS 7464: MISC BASE D52A8D645E25 lea rsp, ptr [rsi+r27*2+0x25] +XDIS 746a: MISC BASE D52A8D645F26 lea rsp, ptr [rdi+r27*2+0x26] +XDIS 7470: MISC BASE D52B8D645827 lea rsp, ptr [r8+r27*2+0x27] +XDIS 7476: MISC BASE D52B8D645928 lea rsp, ptr [r9+r27*2+0x28] +XDIS 747c: MISC BASE D52B8D645A29 lea rsp, ptr [r10+r27*2+0x29] +XDIS 7482: MISC BASE D52B8D645B2A lea rsp, ptr [r11+r27*2+0x2a] +XDIS 7488: MISC BASE D52B8D645C2B lea rsp, ptr [r12+r27*2+0x2b] +XDIS 748e: MISC BASE D52B8D645D2C lea rsp, ptr [r13+r27*2+0x2c] +XDIS 7494: MISC BASE D52B8D645E2D lea rsp, ptr [r14+r27*2+0x2d] +XDIS 749a: MISC BASE D52B8D645F2E lea rsp, ptr [r15+r27*2+0x2e] +XDIS 74a0: MISC BASE D53A8D64582F lea rsp, ptr [r16+r27*2+0x2f] +XDIS 74a6: MISC BASE D53A8D645930 lea rsp, ptr [r17+r27*2+0x30] +XDIS 74ac: MISC BASE D53A8D645A31 lea rsp, ptr [r18+r27*2+0x31] +XDIS 74b2: MISC BASE D53A8D645B32 lea rsp, ptr [r19+r27*2+0x32] +XDIS 74b8: MISC BASE D53A8D645C33 lea rsp, ptr [r20+r27*2+0x33] +XDIS 74be: MISC BASE D53A8D645D34 lea rsp, ptr [r21+r27*2+0x34] +XDIS 74c4: MISC BASE D53A8D645E35 lea rsp, ptr [r22+r27*2+0x35] +XDIS 74ca: MISC BASE D53A8D645F36 lea rsp, ptr [r23+r27*2+0x36] +XDIS 74d0: MISC BASE D53B8D645837 lea rsp, ptr [r24+r27*2+0x37] +XDIS 74d6: MISC BASE D53B8D645938 lea rsp, ptr [r25+r27*2+0x38] +XDIS 74dc: MISC BASE D53B8D645A39 lea rsp, ptr [r26+r27*2+0x39] +XDIS 74e2: MISC BASE D53B8D645B3A lea rsp, ptr [r27+r27*2+0x3a] +XDIS 74e8: MISC BASE D53B8D645C3B lea rsp, ptr [r28+r27*2+0x3b] +XDIS 74ee: MISC BASE D53B8D645D3C lea rsp, ptr [r29+r27*2+0x3c] +XDIS 74f4: MISC BASE D53B8D645E3D lea rsp, ptr [r30+r27*2+0x3d] +XDIS 74fa: MISC BASE D53B8D645F3E lea rsp, ptr [r31+r27*2+0x3e] +XDIS 7500: MISC BASE D52A8D646020 lea rsp, ptr [rax+r28*2+0x20] +XDIS 7506: MISC BASE D52A8D646121 lea rsp, ptr [rcx+r28*2+0x21] +XDIS 750c: MISC BASE D52A8D646222 lea rsp, ptr [rdx+r28*2+0x22] +XDIS 7512: MISC BASE D52A8D646323 lea rsp, ptr [rbx+r28*2+0x23] +XDIS 7518: MISC BASE D52A8D646424 lea rsp, ptr [rsp+r28*2+0x24] +XDIS 751e: MISC BASE D52A8D646525 lea rsp, ptr [rbp+r28*2+0x25] +XDIS 7524: MISC BASE D52A8D646626 lea rsp, ptr [rsi+r28*2+0x26] +XDIS 752a: MISC BASE D52A8D646727 lea rsp, ptr [rdi+r28*2+0x27] +XDIS 7530: MISC BASE D52B8D646028 lea rsp, ptr [r8+r28*2+0x28] +XDIS 7536: MISC BASE D52B8D646129 lea rsp, ptr [r9+r28*2+0x29] +XDIS 753c: MISC BASE D52B8D64622A lea rsp, ptr [r10+r28*2+0x2a] +XDIS 7542: MISC BASE D52B8D64632B lea rsp, ptr [r11+r28*2+0x2b] +XDIS 7548: MISC BASE D52B8D64642C lea rsp, ptr [r12+r28*2+0x2c] +XDIS 754e: MISC BASE D52B8D64652D lea rsp, ptr [r13+r28*2+0x2d] +XDIS 7554: MISC BASE D52B8D64662E lea rsp, ptr [r14+r28*2+0x2e] +XDIS 755a: MISC BASE D52B8D64672F lea rsp, ptr [r15+r28*2+0x2f] +XDIS 7560: MISC BASE D53A8D646030 lea rsp, ptr [r16+r28*2+0x30] +XDIS 7566: MISC BASE D53A8D646131 lea rsp, ptr [r17+r28*2+0x31] +XDIS 756c: MISC BASE D53A8D646232 lea rsp, ptr [r18+r28*2+0x32] +XDIS 7572: MISC BASE D53A8D646333 lea rsp, ptr [r19+r28*2+0x33] +XDIS 7578: MISC BASE D53A8D646434 lea rsp, ptr [r20+r28*2+0x34] +XDIS 757e: MISC BASE D53A8D646535 lea rsp, ptr [r21+r28*2+0x35] +XDIS 7584: MISC BASE D53A8D646636 lea rsp, ptr [r22+r28*2+0x36] +XDIS 758a: MISC BASE D53A8D646737 lea rsp, ptr [r23+r28*2+0x37] +XDIS 7590: MISC BASE D53B8D646038 lea rsp, ptr [r24+r28*2+0x38] +XDIS 7596: MISC BASE D53B8D646139 lea rsp, ptr [r25+r28*2+0x39] +XDIS 759c: MISC BASE D53B8D64623A lea rsp, ptr [r26+r28*2+0x3a] +XDIS 75a2: MISC BASE D53B8D64633B lea rsp, ptr [r27+r28*2+0x3b] +XDIS 75a8: MISC BASE D53B8D64643C lea rsp, ptr [r28+r28*2+0x3c] +XDIS 75ae: MISC BASE D53B8D64653D lea rsp, ptr [r29+r28*2+0x3d] +XDIS 75b4: MISC BASE D53B8D64663E lea rsp, ptr [r30+r28*2+0x3e] +XDIS 75ba: MISC BASE D53B8D64673F lea rsp, ptr [r31+r28*2+0x3f] +XDIS 75c0: MISC BASE D52A8D646821 lea rsp, ptr [rax+r29*2+0x21] +XDIS 75c6: MISC BASE D52A8D646922 lea rsp, ptr [rcx+r29*2+0x22] +XDIS 75cc: MISC BASE D52A8D646A23 lea rsp, ptr [rdx+r29*2+0x23] +XDIS 75d2: MISC BASE D52A8D646B24 lea rsp, ptr [rbx+r29*2+0x24] +XDIS 75d8: MISC BASE D52A8D646C25 lea rsp, ptr [rsp+r29*2+0x25] +XDIS 75de: MISC BASE D52A8D646D26 lea rsp, ptr [rbp+r29*2+0x26] +XDIS 75e4: MISC BASE D52A8D646E27 lea rsp, ptr [rsi+r29*2+0x27] +XDIS 75ea: MISC BASE D52A8D646F28 lea rsp, ptr [rdi+r29*2+0x28] +XDIS 75f0: MISC BASE D52B8D646829 lea rsp, ptr [r8+r29*2+0x29] +XDIS 75f6: MISC BASE D52B8D64692A lea rsp, ptr [r9+r29*2+0x2a] +XDIS 75fc: MISC BASE D52B8D646A2B lea rsp, ptr [r10+r29*2+0x2b] +XDIS 7602: MISC BASE D52B8D646B2C lea rsp, ptr [r11+r29*2+0x2c] +XDIS 7608: MISC BASE D52B8D646C2D lea rsp, ptr [r12+r29*2+0x2d] +XDIS 760e: MISC BASE D52B8D646D2E lea rsp, ptr [r13+r29*2+0x2e] +XDIS 7614: MISC BASE D52B8D646E2F lea rsp, ptr [r14+r29*2+0x2f] +XDIS 761a: MISC BASE D52B8D646F30 lea rsp, ptr [r15+r29*2+0x30] +XDIS 7620: MISC BASE D53A8D646831 lea rsp, ptr [r16+r29*2+0x31] +XDIS 7626: MISC BASE D53A8D646932 lea rsp, ptr [r17+r29*2+0x32] +XDIS 762c: MISC BASE D53A8D646A33 lea rsp, ptr [r18+r29*2+0x33] +XDIS 7632: MISC BASE D53A8D646B34 lea rsp, ptr [r19+r29*2+0x34] +XDIS 7638: MISC BASE D53A8D646C35 lea rsp, ptr [r20+r29*2+0x35] +XDIS 763e: MISC BASE D53A8D646D36 lea rsp, ptr [r21+r29*2+0x36] +XDIS 7644: MISC BASE D53A8D646E37 lea rsp, ptr [r22+r29*2+0x37] +XDIS 764a: MISC BASE D53A8D646F38 lea rsp, ptr [r23+r29*2+0x38] +XDIS 7650: MISC BASE D53B8D646839 lea rsp, ptr [r24+r29*2+0x39] +XDIS 7656: MISC BASE D53B8D64693A lea rsp, ptr [r25+r29*2+0x3a] +XDIS 765c: MISC BASE D53B8D646A3B lea rsp, ptr [r26+r29*2+0x3b] +XDIS 7662: MISC BASE D53B8D646B3C lea rsp, ptr [r27+r29*2+0x3c] +XDIS 7668: MISC BASE D53B8D646C3D lea rsp, ptr [r28+r29*2+0x3d] +XDIS 766e: MISC BASE D53B8D646D3E lea rsp, ptr [r29+r29*2+0x3e] +XDIS 7674: MISC BASE D53B8D646E3F lea rsp, ptr [r30+r29*2+0x3f] +XDIS 767a: MISC BASE D53B8D646F40 lea rsp, ptr [r31+r29*2+0x40] +XDIS 7680: MISC BASE D52A8D647022 lea rsp, ptr [rax+r30*2+0x22] +XDIS 7686: MISC BASE D52A8D647123 lea rsp, ptr [rcx+r30*2+0x23] +XDIS 768c: MISC BASE D52A8D647224 lea rsp, ptr [rdx+r30*2+0x24] +XDIS 7692: MISC BASE D52A8D647325 lea rsp, ptr [rbx+r30*2+0x25] +XDIS 7698: MISC BASE D52A8D647426 lea rsp, ptr [rsp+r30*2+0x26] +XDIS 769e: MISC BASE D52A8D647527 lea rsp, ptr [rbp+r30*2+0x27] +XDIS 76a4: MISC BASE D52A8D647628 lea rsp, ptr [rsi+r30*2+0x28] +XDIS 76aa: MISC BASE D52A8D647729 lea rsp, ptr [rdi+r30*2+0x29] +XDIS 76b0: MISC BASE D52B8D64702A lea rsp, ptr [r8+r30*2+0x2a] +XDIS 76b6: MISC BASE D52B8D64712B lea rsp, ptr [r9+r30*2+0x2b] +XDIS 76bc: MISC BASE D52B8D64722C lea rsp, ptr [r10+r30*2+0x2c] +XDIS 76c2: MISC BASE D52B8D64732D lea rsp, ptr [r11+r30*2+0x2d] +XDIS 76c8: MISC BASE D52B8D64742E lea rsp, ptr [r12+r30*2+0x2e] +XDIS 76ce: MISC BASE D52B8D64752F lea rsp, ptr [r13+r30*2+0x2f] +XDIS 76d4: MISC BASE D52B8D647630 lea rsp, ptr [r14+r30*2+0x30] +XDIS 76da: MISC BASE D52B8D647731 lea rsp, ptr [r15+r30*2+0x31] +XDIS 76e0: MISC BASE D53A8D647032 lea rsp, ptr [r16+r30*2+0x32] +XDIS 76e6: MISC BASE D53A8D647133 lea rsp, ptr [r17+r30*2+0x33] +XDIS 76ec: MISC BASE D53A8D647234 lea rsp, ptr [r18+r30*2+0x34] +XDIS 76f2: MISC BASE D53A8D647335 lea rsp, ptr [r19+r30*2+0x35] +XDIS 76f8: MISC BASE D53A8D647436 lea rsp, ptr [r20+r30*2+0x36] +XDIS 76fe: MISC BASE D53A8D647537 lea rsp, ptr [r21+r30*2+0x37] +XDIS 7704: MISC BASE D53A8D647638 lea rsp, ptr [r22+r30*2+0x38] +XDIS 770a: MISC BASE D53A8D647739 lea rsp, ptr [r23+r30*2+0x39] +XDIS 7710: MISC BASE D53B8D64703A lea rsp, ptr [r24+r30*2+0x3a] +XDIS 7716: MISC BASE D53B8D64713B lea rsp, ptr [r25+r30*2+0x3b] +XDIS 771c: MISC BASE D53B8D64723C lea rsp, ptr [r26+r30*2+0x3c] +XDIS 7722: MISC BASE D53B8D64733D lea rsp, ptr [r27+r30*2+0x3d] +XDIS 7728: MISC BASE D53B8D64743E lea rsp, ptr [r28+r30*2+0x3e] +XDIS 772e: MISC BASE D53B8D64753F lea rsp, ptr [r29+r30*2+0x3f] +XDIS 7734: MISC BASE D53B8D647640 lea rsp, ptr [r30+r30*2+0x40] +XDIS 773a: MISC BASE D53B8D647741 lea rsp, ptr [r31+r30*2+0x41] +XDIS 7740: MISC BASE D52A8D647823 lea rsp, ptr [rax+r31*2+0x23] +XDIS 7746: MISC BASE D52A8D647924 lea rsp, ptr [rcx+r31*2+0x24] +XDIS 774c: MISC BASE D52A8D647A25 lea rsp, ptr [rdx+r31*2+0x25] +XDIS 7752: MISC BASE D52A8D647B26 lea rsp, ptr [rbx+r31*2+0x26] +XDIS 7758: MISC BASE D52A8D647C27 lea rsp, ptr [rsp+r31*2+0x27] +XDIS 775e: MISC BASE D52A8D647D28 lea rsp, ptr [rbp+r31*2+0x28] +XDIS 7764: MISC BASE D52A8D647E29 lea rsp, ptr [rsi+r31*2+0x29] +XDIS 776a: MISC BASE D52A8D647F2A lea rsp, ptr [rdi+r31*2+0x2a] +XDIS 7770: MISC BASE D52B8D64782B lea rsp, ptr [r8+r31*2+0x2b] +XDIS 7776: MISC BASE D52B8D64792C lea rsp, ptr [r9+r31*2+0x2c] +XDIS 777c: MISC BASE D52B8D647A2D lea rsp, ptr [r10+r31*2+0x2d] +XDIS 7782: MISC BASE D52B8D647B2E lea rsp, ptr [r11+r31*2+0x2e] +XDIS 7788: MISC BASE D52B8D647C2F lea rsp, ptr [r12+r31*2+0x2f] +XDIS 778e: MISC BASE D52B8D647D30 lea rsp, ptr [r13+r31*2+0x30] +XDIS 7794: MISC BASE D52B8D647E31 lea rsp, ptr [r14+r31*2+0x31] +XDIS 779a: MISC BASE D52B8D647F32 lea rsp, ptr [r15+r31*2+0x32] +XDIS 77a0: MISC BASE D53A8D647833 lea rsp, ptr [r16+r31*2+0x33] +XDIS 77a6: MISC BASE D53A8D647934 lea rsp, ptr [r17+r31*2+0x34] +XDIS 77ac: MISC BASE D53A8D647A35 lea rsp, ptr [r18+r31*2+0x35] +XDIS 77b2: MISC BASE D53A8D647B36 lea rsp, ptr [r19+r31*2+0x36] +XDIS 77b8: MISC BASE D53A8D647C37 lea rsp, ptr [r20+r31*2+0x37] +XDIS 77be: MISC BASE D53A8D647D38 lea rsp, ptr [r21+r31*2+0x38] +XDIS 77c4: MISC BASE D53A8D647E39 lea rsp, ptr [r22+r31*2+0x39] +XDIS 77ca: MISC BASE D53A8D647F3A lea rsp, ptr [r23+r31*2+0x3a] +XDIS 77d0: MISC BASE D53B8D64783B lea rsp, ptr [r24+r31*2+0x3b] +XDIS 77d6: MISC BASE D53B8D64793C lea rsp, ptr [r25+r31*2+0x3c] +XDIS 77dc: MISC BASE D53B8D647A3D lea rsp, ptr [r26+r31*2+0x3d] +XDIS 77e2: MISC BASE D53B8D647B3E lea rsp, ptr [r27+r31*2+0x3e] +XDIS 77e8: MISC BASE D53B8D647C3F lea rsp, ptr [r28+r31*2+0x3f] +XDIS 77ee: MISC BASE D53B8D647D40 lea rsp, ptr [r29+r31*2+0x40] +XDIS 77f4: MISC BASE D53B8D647E41 lea rsp, ptr [r30+r31*2+0x41] +XDIS 77fa: MISC BASE D53B8D647F42 lea rsp, ptr [r31+r31*2+0x42] +XDIS 7800: MISC BASE D5088D6C4005 lea rbp, ptr [rax+rax*2+0x5] +XDIS 7806: MISC BASE D5088D6C4106 lea rbp, ptr [rcx+rax*2+0x6] +XDIS 780c: MISC BASE D5088D6C4207 lea rbp, ptr [rdx+rax*2+0x7] +XDIS 7812: MISC BASE D5088D6C4308 lea rbp, ptr [rbx+rax*2+0x8] +XDIS 7818: MISC BASE D5088D6C4409 lea rbp, ptr [rsp+rax*2+0x9] +XDIS 781e: MISC BASE D5088D6C450A lea rbp, ptr [rbp+rax*2+0xa] +XDIS 7824: MISC BASE D5088D6C460B lea rbp, ptr [rsi+rax*2+0xb] +XDIS 782a: MISC BASE D5088D6C470C lea rbp, ptr [rdi+rax*2+0xc] +XDIS 7830: MISC BASE D5098D6C400D lea rbp, ptr [r8+rax*2+0xd] +XDIS 7836: MISC BASE D5098D6C410E lea rbp, ptr [r9+rax*2+0xe] +XDIS 783c: MISC BASE D5098D6C420F lea rbp, ptr [r10+rax*2+0xf] +XDIS 7842: MISC BASE D5098D6C4310 lea rbp, ptr [r11+rax*2+0x10] +XDIS 7848: MISC BASE D5098D6C4411 lea rbp, ptr [r12+rax*2+0x11] +XDIS 784e: MISC BASE D5098D6C4512 lea rbp, ptr [r13+rax*2+0x12] +XDIS 7854: MISC BASE D5098D6C4613 lea rbp, ptr [r14+rax*2+0x13] +XDIS 785a: MISC BASE D5098D6C4714 lea rbp, ptr [r15+rax*2+0x14] +XDIS 7860: MISC BASE D5188D6C4015 lea rbp, ptr [r16+rax*2+0x15] +XDIS 7866: MISC BASE D5188D6C4116 lea rbp, ptr [r17+rax*2+0x16] +XDIS 786c: MISC BASE D5188D6C4217 lea rbp, ptr [r18+rax*2+0x17] +XDIS 7872: MISC BASE D5188D6C4318 lea rbp, ptr [r19+rax*2+0x18] +XDIS 7878: MISC BASE D5188D6C4419 lea rbp, ptr [r20+rax*2+0x19] +XDIS 787e: MISC BASE D5188D6C451A lea rbp, ptr [r21+rax*2+0x1a] +XDIS 7884: MISC BASE D5188D6C461B lea rbp, ptr [r22+rax*2+0x1b] +XDIS 788a: MISC BASE D5188D6C471C lea rbp, ptr [r23+rax*2+0x1c] +XDIS 7890: MISC BASE D5198D6C401D lea rbp, ptr [r24+rax*2+0x1d] +XDIS 7896: MISC BASE D5198D6C411E lea rbp, ptr [r25+rax*2+0x1e] +XDIS 789c: MISC BASE D5198D6C421F lea rbp, ptr [r26+rax*2+0x1f] +XDIS 78a2: MISC BASE D5198D6C4320 lea rbp, ptr [r27+rax*2+0x20] +XDIS 78a8: MISC BASE D5198D6C4421 lea rbp, ptr [r28+rax*2+0x21] +XDIS 78ae: MISC BASE D5198D6C4522 lea rbp, ptr [r29+rax*2+0x22] +XDIS 78b4: MISC BASE D5198D6C4623 lea rbp, ptr [r30+rax*2+0x23] +XDIS 78ba: MISC BASE D5198D6C4724 lea rbp, ptr [r31+rax*2+0x24] +XDIS 78c0: MISC BASE D5088D6C4806 lea rbp, ptr [rax+rcx*2+0x6] +XDIS 78c6: MISC BASE D5088D6C4907 lea rbp, ptr [rcx+rcx*2+0x7] +XDIS 78cc: MISC BASE D5088D6C4A08 lea rbp, ptr [rdx+rcx*2+0x8] +XDIS 78d2: MISC BASE D5088D6C4B09 lea rbp, ptr [rbx+rcx*2+0x9] +XDIS 78d8: MISC BASE D5088D6C4C0A lea rbp, ptr [rsp+rcx*2+0xa] +XDIS 78de: MISC BASE D5088D6C4D0B lea rbp, ptr [rbp+rcx*2+0xb] +XDIS 78e4: MISC BASE D5088D6C4E0C lea rbp, ptr [rsi+rcx*2+0xc] +XDIS 78ea: MISC BASE D5088D6C4F0D lea rbp, ptr [rdi+rcx*2+0xd] +XDIS 78f0: MISC BASE D5098D6C480E lea rbp, ptr [r8+rcx*2+0xe] +XDIS 78f6: MISC BASE D5098D6C490F lea rbp, ptr [r9+rcx*2+0xf] +XDIS 78fc: MISC BASE D5098D6C4A10 lea rbp, ptr [r10+rcx*2+0x10] +XDIS 7902: MISC BASE D5098D6C4B11 lea rbp, ptr [r11+rcx*2+0x11] +XDIS 7908: MISC BASE D5098D6C4C12 lea rbp, ptr [r12+rcx*2+0x12] +XDIS 790e: MISC BASE D5098D6C4D13 lea rbp, ptr [r13+rcx*2+0x13] +XDIS 7914: MISC BASE D5098D6C4E14 lea rbp, ptr [r14+rcx*2+0x14] +XDIS 791a: MISC BASE D5098D6C4F15 lea rbp, ptr [r15+rcx*2+0x15] +XDIS 7920: MISC BASE D5188D6C4816 lea rbp, ptr [r16+rcx*2+0x16] +XDIS 7926: MISC BASE D5188D6C4917 lea rbp, ptr [r17+rcx*2+0x17] +XDIS 792c: MISC BASE D5188D6C4A18 lea rbp, ptr [r18+rcx*2+0x18] +XDIS 7932: MISC BASE D5188D6C4B19 lea rbp, ptr [r19+rcx*2+0x19] +XDIS 7938: MISC BASE D5188D6C4C1A lea rbp, ptr [r20+rcx*2+0x1a] +XDIS 793e: MISC BASE D5188D6C4D1B lea rbp, ptr [r21+rcx*2+0x1b] +XDIS 7944: MISC BASE D5188D6C4E1C lea rbp, ptr [r22+rcx*2+0x1c] +XDIS 794a: MISC BASE D5188D6C4F1D lea rbp, ptr [r23+rcx*2+0x1d] +XDIS 7950: MISC BASE D5198D6C481E lea rbp, ptr [r24+rcx*2+0x1e] +XDIS 7956: MISC BASE D5198D6C491F lea rbp, ptr [r25+rcx*2+0x1f] +XDIS 795c: MISC BASE D5198D6C4A20 lea rbp, ptr [r26+rcx*2+0x20] +XDIS 7962: MISC BASE D5198D6C4B21 lea rbp, ptr [r27+rcx*2+0x21] +XDIS 7968: MISC BASE D5198D6C4C22 lea rbp, ptr [r28+rcx*2+0x22] +XDIS 796e: MISC BASE D5198D6C4D23 lea rbp, ptr [r29+rcx*2+0x23] +XDIS 7974: MISC BASE D5198D6C4E24 lea rbp, ptr [r30+rcx*2+0x24] +XDIS 797a: MISC BASE D5198D6C4F25 lea rbp, ptr [r31+rcx*2+0x25] +XDIS 7980: MISC BASE D5088D6C5007 lea rbp, ptr [rax+rdx*2+0x7] +XDIS 7986: MISC BASE D5088D6C5108 lea rbp, ptr [rcx+rdx*2+0x8] +XDIS 798c: MISC BASE D5088D6C5209 lea rbp, ptr [rdx+rdx*2+0x9] +XDIS 7992: MISC BASE D5088D6C530A lea rbp, ptr [rbx+rdx*2+0xa] +XDIS 7998: MISC BASE D5088D6C540B lea rbp, ptr [rsp+rdx*2+0xb] +XDIS 799e: MISC BASE D5088D6C550C lea rbp, ptr [rbp+rdx*2+0xc] +XDIS 79a4: MISC BASE D5088D6C560D lea rbp, ptr [rsi+rdx*2+0xd] +XDIS 79aa: MISC BASE D5088D6C570E lea rbp, ptr [rdi+rdx*2+0xe] +XDIS 79b0: MISC BASE D5098D6C500F lea rbp, ptr [r8+rdx*2+0xf] +XDIS 79b6: MISC BASE D5098D6C5110 lea rbp, ptr [r9+rdx*2+0x10] +XDIS 79bc: MISC BASE D5098D6C5211 lea rbp, ptr [r10+rdx*2+0x11] +XDIS 79c2: MISC BASE D5098D6C5312 lea rbp, ptr [r11+rdx*2+0x12] +XDIS 79c8: MISC BASE D5098D6C5413 lea rbp, ptr [r12+rdx*2+0x13] +XDIS 79ce: MISC BASE D5098D6C5514 lea rbp, ptr [r13+rdx*2+0x14] +XDIS 79d4: MISC BASE D5098D6C5615 lea rbp, ptr [r14+rdx*2+0x15] +XDIS 79da: MISC BASE D5098D6C5716 lea rbp, ptr [r15+rdx*2+0x16] +XDIS 79e0: MISC BASE D5188D6C5017 lea rbp, ptr [r16+rdx*2+0x17] +XDIS 79e6: MISC BASE D5188D6C5118 lea rbp, ptr [r17+rdx*2+0x18] +XDIS 79ec: MISC BASE D5188D6C5219 lea rbp, ptr [r18+rdx*2+0x19] +XDIS 79f2: MISC BASE D5188D6C531A lea rbp, ptr [r19+rdx*2+0x1a] +XDIS 79f8: MISC BASE D5188D6C541B lea rbp, ptr [r20+rdx*2+0x1b] +XDIS 79fe: MISC BASE D5188D6C551C lea rbp, ptr [r21+rdx*2+0x1c] +XDIS 7a04: MISC BASE D5188D6C561D lea rbp, ptr [r22+rdx*2+0x1d] +XDIS 7a0a: MISC BASE D5188D6C571E lea rbp, ptr [r23+rdx*2+0x1e] +XDIS 7a10: MISC BASE D5198D6C501F lea rbp, ptr [r24+rdx*2+0x1f] +XDIS 7a16: MISC BASE D5198D6C5120 lea rbp, ptr [r25+rdx*2+0x20] +XDIS 7a1c: MISC BASE D5198D6C5221 lea rbp, ptr [r26+rdx*2+0x21] +XDIS 7a22: MISC BASE D5198D6C5322 lea rbp, ptr [r27+rdx*2+0x22] +XDIS 7a28: MISC BASE D5198D6C5423 lea rbp, ptr [r28+rdx*2+0x23] +XDIS 7a2e: MISC BASE D5198D6C5524 lea rbp, ptr [r29+rdx*2+0x24] +XDIS 7a34: MISC BASE D5198D6C5625 lea rbp, ptr [r30+rdx*2+0x25] +XDIS 7a3a: MISC BASE D5198D6C5726 lea rbp, ptr [r31+rdx*2+0x26] +XDIS 7a40: MISC BASE D5088D6C5808 lea rbp, ptr [rax+rbx*2+0x8] +XDIS 7a46: MISC BASE D5088D6C5909 lea rbp, ptr [rcx+rbx*2+0x9] +XDIS 7a4c: MISC BASE D5088D6C5A0A lea rbp, ptr [rdx+rbx*2+0xa] +XDIS 7a52: MISC BASE D5088D6C5B0B lea rbp, ptr [rbx+rbx*2+0xb] +XDIS 7a58: MISC BASE D5088D6C5C0C lea rbp, ptr [rsp+rbx*2+0xc] +XDIS 7a5e: MISC BASE D5088D6C5D0D lea rbp, ptr [rbp+rbx*2+0xd] +XDIS 7a64: MISC BASE D5088D6C5E0E lea rbp, ptr [rsi+rbx*2+0xe] +XDIS 7a6a: MISC BASE D5088D6C5F0F lea rbp, ptr [rdi+rbx*2+0xf] +XDIS 7a70: MISC BASE D5098D6C5810 lea rbp, ptr [r8+rbx*2+0x10] +XDIS 7a76: MISC BASE D5098D6C5911 lea rbp, ptr [r9+rbx*2+0x11] +XDIS 7a7c: MISC BASE D5098D6C5A12 lea rbp, ptr [r10+rbx*2+0x12] +XDIS 7a82: MISC BASE D5098D6C5B13 lea rbp, ptr [r11+rbx*2+0x13] +XDIS 7a88: MISC BASE D5098D6C5C14 lea rbp, ptr [r12+rbx*2+0x14] +XDIS 7a8e: MISC BASE D5098D6C5D15 lea rbp, ptr [r13+rbx*2+0x15] +XDIS 7a94: MISC BASE D5098D6C5E16 lea rbp, ptr [r14+rbx*2+0x16] +XDIS 7a9a: MISC BASE D5098D6C5F17 lea rbp, ptr [r15+rbx*2+0x17] +XDIS 7aa0: MISC BASE D5188D6C5818 lea rbp, ptr [r16+rbx*2+0x18] +XDIS 7aa6: MISC BASE D5188D6C5919 lea rbp, ptr [r17+rbx*2+0x19] +XDIS 7aac: MISC BASE D5188D6C5A1A lea rbp, ptr [r18+rbx*2+0x1a] +XDIS 7ab2: MISC BASE D5188D6C5B1B lea rbp, ptr [r19+rbx*2+0x1b] +XDIS 7ab8: MISC BASE D5188D6C5C1C lea rbp, ptr [r20+rbx*2+0x1c] +XDIS 7abe: MISC BASE D5188D6C5D1D lea rbp, ptr [r21+rbx*2+0x1d] +XDIS 7ac4: MISC BASE D5188D6C5E1E lea rbp, ptr [r22+rbx*2+0x1e] +XDIS 7aca: MISC BASE D5188D6C5F1F lea rbp, ptr [r23+rbx*2+0x1f] +XDIS 7ad0: MISC BASE D5198D6C5820 lea rbp, ptr [r24+rbx*2+0x20] +XDIS 7ad6: MISC BASE D5198D6C5921 lea rbp, ptr [r25+rbx*2+0x21] +XDIS 7adc: MISC BASE D5198D6C5A22 lea rbp, ptr [r26+rbx*2+0x22] +XDIS 7ae2: MISC BASE D5198D6C5B23 lea rbp, ptr [r27+rbx*2+0x23] +XDIS 7ae8: MISC BASE D5198D6C5C24 lea rbp, ptr [r28+rbx*2+0x24] +XDIS 7aee: MISC BASE D5198D6C5D25 lea rbp, ptr [r29+rbx*2+0x25] +XDIS 7af4: MISC BASE D5198D6C5E26 lea rbp, ptr [r30+rbx*2+0x26] +XDIS 7afa: MISC BASE D5198D6C5F27 lea rbp, ptr [r31+rbx*2+0x27] +XDIS 7b00: MISC BASE D5088D6C6009 lea rbp, ptr [rax+0x9] +XDIS 7b06: MISC BASE D5088D6C610A lea rbp, ptr [rcx+0xa] +XDIS 7b0c: MISC BASE D5088D6C620B lea rbp, ptr [rdx+0xb] +XDIS 7b12: MISC BASE D5088D6C630C lea rbp, ptr [rbx+0xc] +XDIS 7b18: MISC BASE D5088D6C640D lea rbp, ptr [rsp+0xd] +XDIS 7b1e: MISC BASE D5088D6C650E lea rbp, ptr [rbp+0xe] +XDIS 7b24: MISC BASE D5088D6C660F lea rbp, ptr [rsi+0xf] +XDIS 7b2a: MISC BASE D5088D6C6710 lea rbp, ptr [rdi+0x10] +XDIS 7b30: MISC BASE D5098D6C6011 lea rbp, ptr [r8+0x11] +XDIS 7b36: MISC BASE D5098D6C6112 lea rbp, ptr [r9+0x12] +XDIS 7b3c: MISC BASE D5098D6C6213 lea rbp, ptr [r10+0x13] +XDIS 7b42: MISC BASE D5098D6C6314 lea rbp, ptr [r11+0x14] +XDIS 7b48: MISC BASE D5098D6C6415 lea rbp, ptr [r12+0x15] +XDIS 7b4e: MISC BASE D5098D6C6516 lea rbp, ptr [r13+0x16] +XDIS 7b54: MISC BASE D5098D6C6617 lea rbp, ptr [r14+0x17] +XDIS 7b5a: MISC BASE D5098D6C6718 lea rbp, ptr [r15+0x18] +XDIS 7b60: MISC BASE D5188D6C6019 lea rbp, ptr [r16+0x19] +XDIS 7b66: MISC BASE D5188D6C611A lea rbp, ptr [r17+0x1a] +XDIS 7b6c: MISC BASE D5188D6C621B lea rbp, ptr [r18+0x1b] +XDIS 7b72: MISC BASE D5188D6C631C lea rbp, ptr [r19+0x1c] +XDIS 7b78: MISC BASE D5188D6C641D lea rbp, ptr [r20+0x1d] +XDIS 7b7e: MISC BASE D5188D6C651E lea rbp, ptr [r21+0x1e] +XDIS 7b84: MISC BASE D5188D6C661F lea rbp, ptr [r22+0x1f] +XDIS 7b8a: MISC BASE D5188D6C6720 lea rbp, ptr [r23+0x20] +XDIS 7b90: MISC BASE D5198D6C6021 lea rbp, ptr [r24+0x21] +XDIS 7b96: MISC BASE D5198D6C6122 lea rbp, ptr [r25+0x22] +XDIS 7b9c: MISC BASE D5198D6C6223 lea rbp, ptr [r26+0x23] +XDIS 7ba2: MISC BASE D5198D6C6324 lea rbp, ptr [r27+0x24] +XDIS 7ba8: MISC BASE D5198D6C6425 lea rbp, ptr [r28+0x25] +XDIS 7bae: MISC BASE D5198D6C6526 lea rbp, ptr [r29+0x26] +XDIS 7bb4: MISC BASE D5198D6C6627 lea rbp, ptr [r30+0x27] +XDIS 7bba: MISC BASE D5198D6C6728 lea rbp, ptr [r31+0x28] +XDIS 7bc0: MISC BASE D5088D6C680A lea rbp, ptr [rax+rbp*2+0xa] +XDIS 7bc6: MISC BASE D5088D6C690B lea rbp, ptr [rcx+rbp*2+0xb] +XDIS 7bcc: MISC BASE D5088D6C6A0C lea rbp, ptr [rdx+rbp*2+0xc] +XDIS 7bd2: MISC BASE D5088D6C6B0D lea rbp, ptr [rbx+rbp*2+0xd] +XDIS 7bd8: MISC BASE D5088D6C6C0E lea rbp, ptr [rsp+rbp*2+0xe] +XDIS 7bde: MISC BASE D5088D6C6D0F lea rbp, ptr [rbp+rbp*2+0xf] +XDIS 7be4: MISC BASE D5088D6C6E10 lea rbp, ptr [rsi+rbp*2+0x10] +XDIS 7bea: MISC BASE D5088D6C6F11 lea rbp, ptr [rdi+rbp*2+0x11] +XDIS 7bf0: MISC BASE D5098D6C6812 lea rbp, ptr [r8+rbp*2+0x12] +XDIS 7bf6: MISC BASE D5098D6C6913 lea rbp, ptr [r9+rbp*2+0x13] +XDIS 7bfc: MISC BASE D5098D6C6A14 lea rbp, ptr [r10+rbp*2+0x14] +XDIS 7c02: MISC BASE D5098D6C6B15 lea rbp, ptr [r11+rbp*2+0x15] +XDIS 7c08: MISC BASE D5098D6C6C16 lea rbp, ptr [r12+rbp*2+0x16] +XDIS 7c0e: MISC BASE D5098D6C6D17 lea rbp, ptr [r13+rbp*2+0x17] +XDIS 7c14: MISC BASE D5098D6C6E18 lea rbp, ptr [r14+rbp*2+0x18] +XDIS 7c1a: MISC BASE D5098D6C6F19 lea rbp, ptr [r15+rbp*2+0x19] +XDIS 7c20: MISC BASE D5188D6C681A lea rbp, ptr [r16+rbp*2+0x1a] +XDIS 7c26: MISC BASE D5188D6C691B lea rbp, ptr [r17+rbp*2+0x1b] +XDIS 7c2c: MISC BASE D5188D6C6A1C lea rbp, ptr [r18+rbp*2+0x1c] +XDIS 7c32: MISC BASE D5188D6C6B1D lea rbp, ptr [r19+rbp*2+0x1d] +XDIS 7c38: MISC BASE D5188D6C6C1E lea rbp, ptr [r20+rbp*2+0x1e] +XDIS 7c3e: MISC BASE D5188D6C6D1F lea rbp, ptr [r21+rbp*2+0x1f] +XDIS 7c44: MISC BASE D5188D6C6E20 lea rbp, ptr [r22+rbp*2+0x20] +XDIS 7c4a: MISC BASE D5188D6C6F21 lea rbp, ptr [r23+rbp*2+0x21] +XDIS 7c50: MISC BASE D5198D6C6822 lea rbp, ptr [r24+rbp*2+0x22] +XDIS 7c56: MISC BASE D5198D6C6923 lea rbp, ptr [r25+rbp*2+0x23] +XDIS 7c5c: MISC BASE D5198D6C6A24 lea rbp, ptr [r26+rbp*2+0x24] +XDIS 7c62: MISC BASE D5198D6C6B25 lea rbp, ptr [r27+rbp*2+0x25] +XDIS 7c68: MISC BASE D5198D6C6C26 lea rbp, ptr [r28+rbp*2+0x26] +XDIS 7c6e: MISC BASE D5198D6C6D27 lea rbp, ptr [r29+rbp*2+0x27] +XDIS 7c74: MISC BASE D5198D6C6E28 lea rbp, ptr [r30+rbp*2+0x28] +XDIS 7c7a: MISC BASE D5198D6C6F29 lea rbp, ptr [r31+rbp*2+0x29] +XDIS 7c80: MISC BASE D5088D6C700B lea rbp, ptr [rax+rsi*2+0xb] +XDIS 7c86: MISC BASE D5088D6C710C lea rbp, ptr [rcx+rsi*2+0xc] +XDIS 7c8c: MISC BASE D5088D6C720D lea rbp, ptr [rdx+rsi*2+0xd] +XDIS 7c92: MISC BASE D5088D6C730E lea rbp, ptr [rbx+rsi*2+0xe] +XDIS 7c98: MISC BASE D5088D6C740F lea rbp, ptr [rsp+rsi*2+0xf] +XDIS 7c9e: MISC BASE D5088D6C7510 lea rbp, ptr [rbp+rsi*2+0x10] +XDIS 7ca4: MISC BASE D5088D6C7611 lea rbp, ptr [rsi+rsi*2+0x11] +XDIS 7caa: MISC BASE D5088D6C7712 lea rbp, ptr [rdi+rsi*2+0x12] +XDIS 7cb0: MISC BASE D5098D6C7013 lea rbp, ptr [r8+rsi*2+0x13] +XDIS 7cb6: MISC BASE D5098D6C7114 lea rbp, ptr [r9+rsi*2+0x14] +XDIS 7cbc: MISC BASE D5098D6C7215 lea rbp, ptr [r10+rsi*2+0x15] +XDIS 7cc2: MISC BASE D5098D6C7316 lea rbp, ptr [r11+rsi*2+0x16] +XDIS 7cc8: MISC BASE D5098D6C7417 lea rbp, ptr [r12+rsi*2+0x17] +XDIS 7cce: MISC BASE D5098D6C7518 lea rbp, ptr [r13+rsi*2+0x18] +XDIS 7cd4: MISC BASE D5098D6C7619 lea rbp, ptr [r14+rsi*2+0x19] +XDIS 7cda: MISC BASE D5098D6C771A lea rbp, ptr [r15+rsi*2+0x1a] +XDIS 7ce0: MISC BASE D5188D6C701B lea rbp, ptr [r16+rsi*2+0x1b] +XDIS 7ce6: MISC BASE D5188D6C711C lea rbp, ptr [r17+rsi*2+0x1c] +XDIS 7cec: MISC BASE D5188D6C721D lea rbp, ptr [r18+rsi*2+0x1d] +XDIS 7cf2: MISC BASE D5188D6C731E lea rbp, ptr [r19+rsi*2+0x1e] +XDIS 7cf8: MISC BASE D5188D6C741F lea rbp, ptr [r20+rsi*2+0x1f] +XDIS 7cfe: MISC BASE D5188D6C7520 lea rbp, ptr [r21+rsi*2+0x20] +XDIS 7d04: MISC BASE D5188D6C7621 lea rbp, ptr [r22+rsi*2+0x21] +XDIS 7d0a: MISC BASE D5188D6C7722 lea rbp, ptr [r23+rsi*2+0x22] +XDIS 7d10: MISC BASE D5198D6C7023 lea rbp, ptr [r24+rsi*2+0x23] +XDIS 7d16: MISC BASE D5198D6C7124 lea rbp, ptr [r25+rsi*2+0x24] +XDIS 7d1c: MISC BASE D5198D6C7225 lea rbp, ptr [r26+rsi*2+0x25] +XDIS 7d22: MISC BASE D5198D6C7326 lea rbp, ptr [r27+rsi*2+0x26] +XDIS 7d28: MISC BASE D5198D6C7427 lea rbp, ptr [r28+rsi*2+0x27] +XDIS 7d2e: MISC BASE D5198D6C7528 lea rbp, ptr [r29+rsi*2+0x28] +XDIS 7d34: MISC BASE D5198D6C7629 lea rbp, ptr [r30+rsi*2+0x29] +XDIS 7d3a: MISC BASE D5198D6C772A lea rbp, ptr [r31+rsi*2+0x2a] +XDIS 7d40: MISC BASE D5088D6C780C lea rbp, ptr [rax+rdi*2+0xc] +XDIS 7d46: MISC BASE D5088D6C790D lea rbp, ptr [rcx+rdi*2+0xd] +XDIS 7d4c: MISC BASE D5088D6C7A0E lea rbp, ptr [rdx+rdi*2+0xe] +XDIS 7d52: MISC BASE D5088D6C7B0F lea rbp, ptr [rbx+rdi*2+0xf] +XDIS 7d58: MISC BASE D5088D6C7C10 lea rbp, ptr [rsp+rdi*2+0x10] +XDIS 7d5e: MISC BASE D5088D6C7D11 lea rbp, ptr [rbp+rdi*2+0x11] +XDIS 7d64: MISC BASE D5088D6C7E12 lea rbp, ptr [rsi+rdi*2+0x12] +XDIS 7d6a: MISC BASE D5088D6C7F13 lea rbp, ptr [rdi+rdi*2+0x13] +XDIS 7d70: MISC BASE D5098D6C7814 lea rbp, ptr [r8+rdi*2+0x14] +XDIS 7d76: MISC BASE D5098D6C7915 lea rbp, ptr [r9+rdi*2+0x15] +XDIS 7d7c: MISC BASE D5098D6C7A16 lea rbp, ptr [r10+rdi*2+0x16] +XDIS 7d82: MISC BASE D5098D6C7B17 lea rbp, ptr [r11+rdi*2+0x17] +XDIS 7d88: MISC BASE D5098D6C7C18 lea rbp, ptr [r12+rdi*2+0x18] +XDIS 7d8e: MISC BASE D5098D6C7D19 lea rbp, ptr [r13+rdi*2+0x19] +XDIS 7d94: MISC BASE D5098D6C7E1A lea rbp, ptr [r14+rdi*2+0x1a] +XDIS 7d9a: MISC BASE D5098D6C7F1B lea rbp, ptr [r15+rdi*2+0x1b] +XDIS 7da0: MISC BASE D5188D6C781C lea rbp, ptr [r16+rdi*2+0x1c] +XDIS 7da6: MISC BASE D5188D6C791D lea rbp, ptr [r17+rdi*2+0x1d] +XDIS 7dac: MISC BASE D5188D6C7A1E lea rbp, ptr [r18+rdi*2+0x1e] +XDIS 7db2: MISC BASE D5188D6C7B1F lea rbp, ptr [r19+rdi*2+0x1f] +XDIS 7db8: MISC BASE D5188D6C7C20 lea rbp, ptr [r20+rdi*2+0x20] +XDIS 7dbe: MISC BASE D5188D6C7D21 lea rbp, ptr [r21+rdi*2+0x21] +XDIS 7dc4: MISC BASE D5188D6C7E22 lea rbp, ptr [r22+rdi*2+0x22] +XDIS 7dca: MISC BASE D5188D6C7F23 lea rbp, ptr [r23+rdi*2+0x23] +XDIS 7dd0: MISC BASE D5198D6C7824 lea rbp, ptr [r24+rdi*2+0x24] +XDIS 7dd6: MISC BASE D5198D6C7925 lea rbp, ptr [r25+rdi*2+0x25] +XDIS 7ddc: MISC BASE D5198D6C7A26 lea rbp, ptr [r26+rdi*2+0x26] +XDIS 7de2: MISC BASE D5198D6C7B27 lea rbp, ptr [r27+rdi*2+0x27] +XDIS 7de8: MISC BASE D5198D6C7C28 lea rbp, ptr [r28+rdi*2+0x28] +XDIS 7dee: MISC BASE D5198D6C7D29 lea rbp, ptr [r29+rdi*2+0x29] +XDIS 7df4: MISC BASE D5198D6C7E2A lea rbp, ptr [r30+rdi*2+0x2a] +XDIS 7dfa: MISC BASE D5198D6C7F2B lea rbp, ptr [r31+rdi*2+0x2b] +XDIS 7e00: MISC BASE D50A8D6C400D lea rbp, ptr [rax+r8*2+0xd] +XDIS 7e06: MISC BASE D50A8D6C410E lea rbp, ptr [rcx+r8*2+0xe] +XDIS 7e0c: MISC BASE D50A8D6C420F lea rbp, ptr [rdx+r8*2+0xf] +XDIS 7e12: MISC BASE D50A8D6C4310 lea rbp, ptr [rbx+r8*2+0x10] +XDIS 7e18: MISC BASE D50A8D6C4411 lea rbp, ptr [rsp+r8*2+0x11] +XDIS 7e1e: MISC BASE D50A8D6C4512 lea rbp, ptr [rbp+r8*2+0x12] +XDIS 7e24: MISC BASE D50A8D6C4613 lea rbp, ptr [rsi+r8*2+0x13] +XDIS 7e2a: MISC BASE D50A8D6C4714 lea rbp, ptr [rdi+r8*2+0x14] +XDIS 7e30: MISC BASE D50B8D6C4015 lea rbp, ptr [r8+r8*2+0x15] +XDIS 7e36: MISC BASE D50B8D6C4116 lea rbp, ptr [r9+r8*2+0x16] +XDIS 7e3c: MISC BASE D50B8D6C4217 lea rbp, ptr [r10+r8*2+0x17] +XDIS 7e42: MISC BASE D50B8D6C4318 lea rbp, ptr [r11+r8*2+0x18] +XDIS 7e48: MISC BASE D50B8D6C4419 lea rbp, ptr [r12+r8*2+0x19] +XDIS 7e4e: MISC BASE D50B8D6C451A lea rbp, ptr [r13+r8*2+0x1a] +XDIS 7e54: MISC BASE D50B8D6C461B lea rbp, ptr [r14+r8*2+0x1b] +XDIS 7e5a: MISC BASE D50B8D6C471C lea rbp, ptr [r15+r8*2+0x1c] +XDIS 7e60: MISC BASE D51A8D6C401D lea rbp, ptr [r16+r8*2+0x1d] +XDIS 7e66: MISC BASE D51A8D6C411E lea rbp, ptr [r17+r8*2+0x1e] +XDIS 7e6c: MISC BASE D51A8D6C421F lea rbp, ptr [r18+r8*2+0x1f] +XDIS 7e72: MISC BASE D51A8D6C4320 lea rbp, ptr [r19+r8*2+0x20] +XDIS 7e78: MISC BASE D51A8D6C4421 lea rbp, ptr [r20+r8*2+0x21] +XDIS 7e7e: MISC BASE D51A8D6C4522 lea rbp, ptr [r21+r8*2+0x22] +XDIS 7e84: MISC BASE D51A8D6C4623 lea rbp, ptr [r22+r8*2+0x23] +XDIS 7e8a: MISC BASE D51A8D6C4724 lea rbp, ptr [r23+r8*2+0x24] +XDIS 7e90: MISC BASE D51B8D6C4025 lea rbp, ptr [r24+r8*2+0x25] +XDIS 7e96: MISC BASE D51B8D6C4126 lea rbp, ptr [r25+r8*2+0x26] +XDIS 7e9c: MISC BASE D51B8D6C4227 lea rbp, ptr [r26+r8*2+0x27] +XDIS 7ea2: MISC BASE D51B8D6C4328 lea rbp, ptr [r27+r8*2+0x28] +XDIS 7ea8: MISC BASE D51B8D6C4429 lea rbp, ptr [r28+r8*2+0x29] +XDIS 7eae: MISC BASE D51B8D6C452A lea rbp, ptr [r29+r8*2+0x2a] +XDIS 7eb4: MISC BASE D51B8D6C462B lea rbp, ptr [r30+r8*2+0x2b] +XDIS 7eba: MISC BASE D51B8D6C472C lea rbp, ptr [r31+r8*2+0x2c] +XDIS 7ec0: MISC BASE D50A8D6C480E lea rbp, ptr [rax+r9*2+0xe] +XDIS 7ec6: MISC BASE D50A8D6C490F lea rbp, ptr [rcx+r9*2+0xf] +XDIS 7ecc: MISC BASE D50A8D6C4A10 lea rbp, ptr [rdx+r9*2+0x10] +XDIS 7ed2: MISC BASE D50A8D6C4B11 lea rbp, ptr [rbx+r9*2+0x11] +XDIS 7ed8: MISC BASE D50A8D6C4C12 lea rbp, ptr [rsp+r9*2+0x12] +XDIS 7ede: MISC BASE D50A8D6C4D13 lea rbp, ptr [rbp+r9*2+0x13] +XDIS 7ee4: MISC BASE D50A8D6C4E14 lea rbp, ptr [rsi+r9*2+0x14] +XDIS 7eea: MISC BASE D50A8D6C4F15 lea rbp, ptr [rdi+r9*2+0x15] +XDIS 7ef0: MISC BASE D50B8D6C4816 lea rbp, ptr [r8+r9*2+0x16] +XDIS 7ef6: MISC BASE D50B8D6C4917 lea rbp, ptr [r9+r9*2+0x17] +XDIS 7efc: MISC BASE D50B8D6C4A18 lea rbp, ptr [r10+r9*2+0x18] +XDIS 7f02: MISC BASE D50B8D6C4B19 lea rbp, ptr [r11+r9*2+0x19] +XDIS 7f08: MISC BASE D50B8D6C4C1A lea rbp, ptr [r12+r9*2+0x1a] +XDIS 7f0e: MISC BASE D50B8D6C4D1B lea rbp, ptr [r13+r9*2+0x1b] +XDIS 7f14: MISC BASE D50B8D6C4E1C lea rbp, ptr [r14+r9*2+0x1c] +XDIS 7f1a: MISC BASE D50B8D6C4F1D lea rbp, ptr [r15+r9*2+0x1d] +XDIS 7f20: MISC BASE D51A8D6C481E lea rbp, ptr [r16+r9*2+0x1e] +XDIS 7f26: MISC BASE D51A8D6C491F lea rbp, ptr [r17+r9*2+0x1f] +XDIS 7f2c: MISC BASE D51A8D6C4A20 lea rbp, ptr [r18+r9*2+0x20] +XDIS 7f32: MISC BASE D51A8D6C4B21 lea rbp, ptr [r19+r9*2+0x21] +XDIS 7f38: MISC BASE D51A8D6C4C22 lea rbp, ptr [r20+r9*2+0x22] +XDIS 7f3e: MISC BASE D51A8D6C4D23 lea rbp, ptr [r21+r9*2+0x23] +XDIS 7f44: MISC BASE D51A8D6C4E24 lea rbp, ptr [r22+r9*2+0x24] +XDIS 7f4a: MISC BASE D51A8D6C4F25 lea rbp, ptr [r23+r9*2+0x25] +XDIS 7f50: MISC BASE D51B8D6C4826 lea rbp, ptr [r24+r9*2+0x26] +XDIS 7f56: MISC BASE D51B8D6C4927 lea rbp, ptr [r25+r9*2+0x27] +XDIS 7f5c: MISC BASE D51B8D6C4A28 lea rbp, ptr [r26+r9*2+0x28] +XDIS 7f62: MISC BASE D51B8D6C4B29 lea rbp, ptr [r27+r9*2+0x29] +XDIS 7f68: MISC BASE D51B8D6C4C2A lea rbp, ptr [r28+r9*2+0x2a] +XDIS 7f6e: MISC BASE D51B8D6C4D2B lea rbp, ptr [r29+r9*2+0x2b] +XDIS 7f74: MISC BASE D51B8D6C4E2C lea rbp, ptr [r30+r9*2+0x2c] +XDIS 7f7a: MISC BASE D51B8D6C4F2D lea rbp, ptr [r31+r9*2+0x2d] +XDIS 7f80: MISC BASE D50A8D6C500F lea rbp, ptr [rax+r10*2+0xf] +XDIS 7f86: MISC BASE D50A8D6C5110 lea rbp, ptr [rcx+r10*2+0x10] +XDIS 7f8c: MISC BASE D50A8D6C5211 lea rbp, ptr [rdx+r10*2+0x11] +XDIS 7f92: MISC BASE D50A8D6C5312 lea rbp, ptr [rbx+r10*2+0x12] +XDIS 7f98: MISC BASE D50A8D6C5413 lea rbp, ptr [rsp+r10*2+0x13] +XDIS 7f9e: MISC BASE D50A8D6C5514 lea rbp, ptr [rbp+r10*2+0x14] +XDIS 7fa4: MISC BASE D50A8D6C5615 lea rbp, ptr [rsi+r10*2+0x15] +XDIS 7faa: MISC BASE D50A8D6C5716 lea rbp, ptr [rdi+r10*2+0x16] +XDIS 7fb0: MISC BASE D50B8D6C5017 lea rbp, ptr [r8+r10*2+0x17] +XDIS 7fb6: MISC BASE D50B8D6C5118 lea rbp, ptr [r9+r10*2+0x18] +XDIS 7fbc: MISC BASE D50B8D6C5219 lea rbp, ptr [r10+r10*2+0x19] +XDIS 7fc2: MISC BASE D50B8D6C531A lea rbp, ptr [r11+r10*2+0x1a] +XDIS 7fc8: MISC BASE D50B8D6C541B lea rbp, ptr [r12+r10*2+0x1b] +XDIS 7fce: MISC BASE D50B8D6C551C lea rbp, ptr [r13+r10*2+0x1c] +XDIS 7fd4: MISC BASE D50B8D6C561D lea rbp, ptr [r14+r10*2+0x1d] +XDIS 7fda: MISC BASE D50B8D6C571E lea rbp, ptr [r15+r10*2+0x1e] +XDIS 7fe0: MISC BASE D51A8D6C501F lea rbp, ptr [r16+r10*2+0x1f] +XDIS 7fe6: MISC BASE D51A8D6C5120 lea rbp, ptr [r17+r10*2+0x20] +XDIS 7fec: MISC BASE D51A8D6C5221 lea rbp, ptr [r18+r10*2+0x21] +XDIS 7ff2: MISC BASE D51A8D6C5322 lea rbp, ptr [r19+r10*2+0x22] +XDIS 7ff8: MISC BASE D51A8D6C5423 lea rbp, ptr [r20+r10*2+0x23] +XDIS 7ffe: MISC BASE D51A8D6C5524 lea rbp, ptr [r21+r10*2+0x24] +XDIS 8004: MISC BASE D51A8D6C5625 lea rbp, ptr [r22+r10*2+0x25] +XDIS 800a: MISC BASE D51A8D6C5726 lea rbp, ptr [r23+r10*2+0x26] +XDIS 8010: MISC BASE D51B8D6C5027 lea rbp, ptr [r24+r10*2+0x27] +XDIS 8016: MISC BASE D51B8D6C5128 lea rbp, ptr [r25+r10*2+0x28] +XDIS 801c: MISC BASE D51B8D6C5229 lea rbp, ptr [r26+r10*2+0x29] +XDIS 8022: MISC BASE D51B8D6C532A lea rbp, ptr [r27+r10*2+0x2a] +XDIS 8028: MISC BASE D51B8D6C542B lea rbp, ptr [r28+r10*2+0x2b] +XDIS 802e: MISC BASE D51B8D6C552C lea rbp, ptr [r29+r10*2+0x2c] +XDIS 8034: MISC BASE D51B8D6C562D lea rbp, ptr [r30+r10*2+0x2d] +XDIS 803a: MISC BASE D51B8D6C572E lea rbp, ptr [r31+r10*2+0x2e] +XDIS 8040: MISC BASE D50A8D6C5810 lea rbp, ptr [rax+r11*2+0x10] +XDIS 8046: MISC BASE D50A8D6C5911 lea rbp, ptr [rcx+r11*2+0x11] +XDIS 804c: MISC BASE D50A8D6C5A12 lea rbp, ptr [rdx+r11*2+0x12] +XDIS 8052: MISC BASE D50A8D6C5B13 lea rbp, ptr [rbx+r11*2+0x13] +XDIS 8058: MISC BASE D50A8D6C5C14 lea rbp, ptr [rsp+r11*2+0x14] +XDIS 805e: MISC BASE D50A8D6C5D15 lea rbp, ptr [rbp+r11*2+0x15] +XDIS 8064: MISC BASE D50A8D6C5E16 lea rbp, ptr [rsi+r11*2+0x16] +XDIS 806a: MISC BASE D50A8D6C5F17 lea rbp, ptr [rdi+r11*2+0x17] +XDIS 8070: MISC BASE D50B8D6C5818 lea rbp, ptr [r8+r11*2+0x18] +XDIS 8076: MISC BASE D50B8D6C5919 lea rbp, ptr [r9+r11*2+0x19] +XDIS 807c: MISC BASE D50B8D6C5A1A lea rbp, ptr [r10+r11*2+0x1a] +XDIS 8082: MISC BASE D50B8D6C5B1B lea rbp, ptr [r11+r11*2+0x1b] +XDIS 8088: MISC BASE D50B8D6C5C1C lea rbp, ptr [r12+r11*2+0x1c] +XDIS 808e: MISC BASE D50B8D6C5D1D lea rbp, ptr [r13+r11*2+0x1d] +XDIS 8094: MISC BASE D50B8D6C5E1E lea rbp, ptr [r14+r11*2+0x1e] +XDIS 809a: MISC BASE D50B8D6C5F1F lea rbp, ptr [r15+r11*2+0x1f] +XDIS 80a0: MISC BASE D51A8D6C5820 lea rbp, ptr [r16+r11*2+0x20] +XDIS 80a6: MISC BASE D51A8D6C5921 lea rbp, ptr [r17+r11*2+0x21] +XDIS 80ac: MISC BASE D51A8D6C5A22 lea rbp, ptr [r18+r11*2+0x22] +XDIS 80b2: MISC BASE D51A8D6C5B23 lea rbp, ptr [r19+r11*2+0x23] +XDIS 80b8: MISC BASE D51A8D6C5C24 lea rbp, ptr [r20+r11*2+0x24] +XDIS 80be: MISC BASE D51A8D6C5D25 lea rbp, ptr [r21+r11*2+0x25] +XDIS 80c4: MISC BASE D51A8D6C5E26 lea rbp, ptr [r22+r11*2+0x26] +XDIS 80ca: MISC BASE D51A8D6C5F27 lea rbp, ptr [r23+r11*2+0x27] +XDIS 80d0: MISC BASE D51B8D6C5828 lea rbp, ptr [r24+r11*2+0x28] +XDIS 80d6: MISC BASE D51B8D6C5929 lea rbp, ptr [r25+r11*2+0x29] +XDIS 80dc: MISC BASE D51B8D6C5A2A lea rbp, ptr [r26+r11*2+0x2a] +XDIS 80e2: MISC BASE D51B8D6C5B2B lea rbp, ptr [r27+r11*2+0x2b] +XDIS 80e8: MISC BASE D51B8D6C5C2C lea rbp, ptr [r28+r11*2+0x2c] +XDIS 80ee: MISC BASE D51B8D6C5D2D lea rbp, ptr [r29+r11*2+0x2d] +XDIS 80f4: MISC BASE D51B8D6C5E2E lea rbp, ptr [r30+r11*2+0x2e] +XDIS 80fa: MISC BASE D51B8D6C5F2F lea rbp, ptr [r31+r11*2+0x2f] +XDIS 8100: MISC BASE D50A8D6C6011 lea rbp, ptr [rax+r12*2+0x11] +XDIS 8106: MISC BASE D50A8D6C6112 lea rbp, ptr [rcx+r12*2+0x12] +XDIS 810c: MISC BASE D50A8D6C6213 lea rbp, ptr [rdx+r12*2+0x13] +XDIS 8112: MISC BASE D50A8D6C6314 lea rbp, ptr [rbx+r12*2+0x14] +XDIS 8118: MISC BASE D50A8D6C6415 lea rbp, ptr [rsp+r12*2+0x15] +XDIS 811e: MISC BASE D50A8D6C6516 lea rbp, ptr [rbp+r12*2+0x16] +XDIS 8124: MISC BASE D50A8D6C6617 lea rbp, ptr [rsi+r12*2+0x17] +XDIS 812a: MISC BASE D50A8D6C6718 lea rbp, ptr [rdi+r12*2+0x18] +XDIS 8130: MISC BASE D50B8D6C6019 lea rbp, ptr [r8+r12*2+0x19] +XDIS 8136: MISC BASE D50B8D6C611A lea rbp, ptr [r9+r12*2+0x1a] +XDIS 813c: MISC BASE D50B8D6C621B lea rbp, ptr [r10+r12*2+0x1b] +XDIS 8142: MISC BASE D50B8D6C631C lea rbp, ptr [r11+r12*2+0x1c] +XDIS 8148: MISC BASE D50B8D6C641D lea rbp, ptr [r12+r12*2+0x1d] +XDIS 814e: MISC BASE D50B8D6C651E lea rbp, ptr [r13+r12*2+0x1e] +XDIS 8154: MISC BASE D50B8D6C661F lea rbp, ptr [r14+r12*2+0x1f] +XDIS 815a: MISC BASE D50B8D6C6720 lea rbp, ptr [r15+r12*2+0x20] +XDIS 8160: MISC BASE D51A8D6C6021 lea rbp, ptr [r16+r12*2+0x21] +XDIS 8166: MISC BASE D51A8D6C6122 lea rbp, ptr [r17+r12*2+0x22] +XDIS 816c: MISC BASE D51A8D6C6223 lea rbp, ptr [r18+r12*2+0x23] +XDIS 8172: MISC BASE D51A8D6C6324 lea rbp, ptr [r19+r12*2+0x24] +XDIS 8178: MISC BASE D51A8D6C6425 lea rbp, ptr [r20+r12*2+0x25] +XDIS 817e: MISC BASE D51A8D6C6526 lea rbp, ptr [r21+r12*2+0x26] +XDIS 8184: MISC BASE D51A8D6C6627 lea rbp, ptr [r22+r12*2+0x27] +XDIS 818a: MISC BASE D51A8D6C6728 lea rbp, ptr [r23+r12*2+0x28] +XDIS 8190: MISC BASE D51B8D6C6029 lea rbp, ptr [r24+r12*2+0x29] +XDIS 8196: MISC BASE D51B8D6C612A lea rbp, ptr [r25+r12*2+0x2a] +XDIS 819c: MISC BASE D51B8D6C622B lea rbp, ptr [r26+r12*2+0x2b] +XDIS 81a2: MISC BASE D51B8D6C632C lea rbp, ptr [r27+r12*2+0x2c] +XDIS 81a8: MISC BASE D51B8D6C642D lea rbp, ptr [r28+r12*2+0x2d] +XDIS 81ae: MISC BASE D51B8D6C652E lea rbp, ptr [r29+r12*2+0x2e] +XDIS 81b4: MISC BASE D51B8D6C662F lea rbp, ptr [r30+r12*2+0x2f] +XDIS 81ba: MISC BASE D51B8D6C6730 lea rbp, ptr [r31+r12*2+0x30] +XDIS 81c0: MISC BASE D50A8D6C6812 lea rbp, ptr [rax+r13*2+0x12] +XDIS 81c6: MISC BASE D50A8D6C6913 lea rbp, ptr [rcx+r13*2+0x13] +XDIS 81cc: MISC BASE D50A8D6C6A14 lea rbp, ptr [rdx+r13*2+0x14] +XDIS 81d2: MISC BASE D50A8D6C6B15 lea rbp, ptr [rbx+r13*2+0x15] +XDIS 81d8: MISC BASE D50A8D6C6C16 lea rbp, ptr [rsp+r13*2+0x16] +XDIS 81de: MISC BASE D50A8D6C6D17 lea rbp, ptr [rbp+r13*2+0x17] +XDIS 81e4: MISC BASE D50A8D6C6E18 lea rbp, ptr [rsi+r13*2+0x18] +XDIS 81ea: MISC BASE D50A8D6C6F19 lea rbp, ptr [rdi+r13*2+0x19] +XDIS 81f0: MISC BASE D50B8D6C681A lea rbp, ptr [r8+r13*2+0x1a] +XDIS 81f6: MISC BASE D50B8D6C691B lea rbp, ptr [r9+r13*2+0x1b] +XDIS 81fc: MISC BASE D50B8D6C6A1C lea rbp, ptr [r10+r13*2+0x1c] +XDIS 8202: MISC BASE D50B8D6C6B1D lea rbp, ptr [r11+r13*2+0x1d] +XDIS 8208: MISC BASE D50B8D6C6C1E lea rbp, ptr [r12+r13*2+0x1e] +XDIS 820e: MISC BASE D50B8D6C6D1F lea rbp, ptr [r13+r13*2+0x1f] +XDIS 8214: MISC BASE D50B8D6C6E20 lea rbp, ptr [r14+r13*2+0x20] +XDIS 821a: MISC BASE D50B8D6C6F21 lea rbp, ptr [r15+r13*2+0x21] +XDIS 8220: MISC BASE D51A8D6C6822 lea rbp, ptr [r16+r13*2+0x22] +XDIS 8226: MISC BASE D51A8D6C6923 lea rbp, ptr [r17+r13*2+0x23] +XDIS 822c: MISC BASE D51A8D6C6A24 lea rbp, ptr [r18+r13*2+0x24] +XDIS 8232: MISC BASE D51A8D6C6B25 lea rbp, ptr [r19+r13*2+0x25] +XDIS 8238: MISC BASE D51A8D6C6C26 lea rbp, ptr [r20+r13*2+0x26] +XDIS 823e: MISC BASE D51A8D6C6D27 lea rbp, ptr [r21+r13*2+0x27] +XDIS 8244: MISC BASE D51A8D6C6E28 lea rbp, ptr [r22+r13*2+0x28] +XDIS 824a: MISC BASE D51A8D6C6F29 lea rbp, ptr [r23+r13*2+0x29] +XDIS 8250: MISC BASE D51B8D6C682A lea rbp, ptr [r24+r13*2+0x2a] +XDIS 8256: MISC BASE D51B8D6C692B lea rbp, ptr [r25+r13*2+0x2b] +XDIS 825c: MISC BASE D51B8D6C6A2C lea rbp, ptr [r26+r13*2+0x2c] +XDIS 8262: MISC BASE D51B8D6C6B2D lea rbp, ptr [r27+r13*2+0x2d] +XDIS 8268: MISC BASE D51B8D6C6C2E lea rbp, ptr [r28+r13*2+0x2e] +XDIS 826e: MISC BASE D51B8D6C6D2F lea rbp, ptr [r29+r13*2+0x2f] +XDIS 8274: MISC BASE D51B8D6C6E30 lea rbp, ptr [r30+r13*2+0x30] +XDIS 827a: MISC BASE D51B8D6C6F31 lea rbp, ptr [r31+r13*2+0x31] +XDIS 8280: MISC BASE D50A8D6C7013 lea rbp, ptr [rax+r14*2+0x13] +XDIS 8286: MISC BASE D50A8D6C7114 lea rbp, ptr [rcx+r14*2+0x14] +XDIS 828c: MISC BASE D50A8D6C7215 lea rbp, ptr [rdx+r14*2+0x15] +XDIS 8292: MISC BASE D50A8D6C7316 lea rbp, ptr [rbx+r14*2+0x16] +XDIS 8298: MISC BASE D50A8D6C7417 lea rbp, ptr [rsp+r14*2+0x17] +XDIS 829e: MISC BASE D50A8D6C7518 lea rbp, ptr [rbp+r14*2+0x18] +XDIS 82a4: MISC BASE D50A8D6C7619 lea rbp, ptr [rsi+r14*2+0x19] +XDIS 82aa: MISC BASE D50A8D6C771A lea rbp, ptr [rdi+r14*2+0x1a] +XDIS 82b0: MISC BASE D50B8D6C701B lea rbp, ptr [r8+r14*2+0x1b] +XDIS 82b6: MISC BASE D50B8D6C711C lea rbp, ptr [r9+r14*2+0x1c] +XDIS 82bc: MISC BASE D50B8D6C721D lea rbp, ptr [r10+r14*2+0x1d] +XDIS 82c2: MISC BASE D50B8D6C731E lea rbp, ptr [r11+r14*2+0x1e] +XDIS 82c8: MISC BASE D50B8D6C741F lea rbp, ptr [r12+r14*2+0x1f] +XDIS 82ce: MISC BASE D50B8D6C7520 lea rbp, ptr [r13+r14*2+0x20] +XDIS 82d4: MISC BASE D50B8D6C7621 lea rbp, ptr [r14+r14*2+0x21] +XDIS 82da: MISC BASE D50B8D6C7722 lea rbp, ptr [r15+r14*2+0x22] +XDIS 82e0: MISC BASE D51A8D6C7023 lea rbp, ptr [r16+r14*2+0x23] +XDIS 82e6: MISC BASE D51A8D6C7124 lea rbp, ptr [r17+r14*2+0x24] +XDIS 82ec: MISC BASE D51A8D6C7225 lea rbp, ptr [r18+r14*2+0x25] +XDIS 82f2: MISC BASE D51A8D6C7326 lea rbp, ptr [r19+r14*2+0x26] +XDIS 82f8: MISC BASE D51A8D6C7427 lea rbp, ptr [r20+r14*2+0x27] +XDIS 82fe: MISC BASE D51A8D6C7528 lea rbp, ptr [r21+r14*2+0x28] +XDIS 8304: MISC BASE D51A8D6C7629 lea rbp, ptr [r22+r14*2+0x29] +XDIS 830a: MISC BASE D51A8D6C772A lea rbp, ptr [r23+r14*2+0x2a] +XDIS 8310: MISC BASE D51B8D6C702B lea rbp, ptr [r24+r14*2+0x2b] +XDIS 8316: MISC BASE D51B8D6C712C lea rbp, ptr [r25+r14*2+0x2c] +XDIS 831c: MISC BASE D51B8D6C722D lea rbp, ptr [r26+r14*2+0x2d] +XDIS 8322: MISC BASE D51B8D6C732E lea rbp, ptr [r27+r14*2+0x2e] +XDIS 8328: MISC BASE D51B8D6C742F lea rbp, ptr [r28+r14*2+0x2f] +XDIS 832e: MISC BASE D51B8D6C7530 lea rbp, ptr [r29+r14*2+0x30] +XDIS 8334: MISC BASE D51B8D6C7631 lea rbp, ptr [r30+r14*2+0x31] +XDIS 833a: MISC BASE D51B8D6C7732 lea rbp, ptr [r31+r14*2+0x32] +XDIS 8340: MISC BASE D50A8D6C7814 lea rbp, ptr [rax+r15*2+0x14] +XDIS 8346: MISC BASE D50A8D6C7915 lea rbp, ptr [rcx+r15*2+0x15] +XDIS 834c: MISC BASE D50A8D6C7A16 lea rbp, ptr [rdx+r15*2+0x16] +XDIS 8352: MISC BASE D50A8D6C7B17 lea rbp, ptr [rbx+r15*2+0x17] +XDIS 8358: MISC BASE D50A8D6C7C18 lea rbp, ptr [rsp+r15*2+0x18] +XDIS 835e: MISC BASE D50A8D6C7D19 lea rbp, ptr [rbp+r15*2+0x19] +XDIS 8364: MISC BASE D50A8D6C7E1A lea rbp, ptr [rsi+r15*2+0x1a] +XDIS 836a: MISC BASE D50A8D6C7F1B lea rbp, ptr [rdi+r15*2+0x1b] +XDIS 8370: MISC BASE D50B8D6C781C lea rbp, ptr [r8+r15*2+0x1c] +XDIS 8376: MISC BASE D50B8D6C791D lea rbp, ptr [r9+r15*2+0x1d] +XDIS 837c: MISC BASE D50B8D6C7A1E lea rbp, ptr [r10+r15*2+0x1e] +XDIS 8382: MISC BASE D50B8D6C7B1F lea rbp, ptr [r11+r15*2+0x1f] +XDIS 8388: MISC BASE D50B8D6C7C20 lea rbp, ptr [r12+r15*2+0x20] +XDIS 838e: MISC BASE D50B8D6C7D21 lea rbp, ptr [r13+r15*2+0x21] +XDIS 8394: MISC BASE D50B8D6C7E22 lea rbp, ptr [r14+r15*2+0x22] +XDIS 839a: MISC BASE D50B8D6C7F23 lea rbp, ptr [r15+r15*2+0x23] +XDIS 83a0: MISC BASE D51A8D6C7824 lea rbp, ptr [r16+r15*2+0x24] +XDIS 83a6: MISC BASE D51A8D6C7925 lea rbp, ptr [r17+r15*2+0x25] +XDIS 83ac: MISC BASE D51A8D6C7A26 lea rbp, ptr [r18+r15*2+0x26] +XDIS 83b2: MISC BASE D51A8D6C7B27 lea rbp, ptr [r19+r15*2+0x27] +XDIS 83b8: MISC BASE D51A8D6C7C28 lea rbp, ptr [r20+r15*2+0x28] +XDIS 83be: MISC BASE D51A8D6C7D29 lea rbp, ptr [r21+r15*2+0x29] +XDIS 83c4: MISC BASE D51A8D6C7E2A lea rbp, ptr [r22+r15*2+0x2a] +XDIS 83ca: MISC BASE D51A8D6C7F2B lea rbp, ptr [r23+r15*2+0x2b] +XDIS 83d0: MISC BASE D51B8D6C782C lea rbp, ptr [r24+r15*2+0x2c] +XDIS 83d6: MISC BASE D51B8D6C792D lea rbp, ptr [r25+r15*2+0x2d] +XDIS 83dc: MISC BASE D51B8D6C7A2E lea rbp, ptr [r26+r15*2+0x2e] +XDIS 83e2: MISC BASE D51B8D6C7B2F lea rbp, ptr [r27+r15*2+0x2f] +XDIS 83e8: MISC BASE D51B8D6C7C30 lea rbp, ptr [r28+r15*2+0x30] +XDIS 83ee: MISC BASE D51B8D6C7D31 lea rbp, ptr [r29+r15*2+0x31] +XDIS 83f4: MISC BASE D51B8D6C7E32 lea rbp, ptr [r30+r15*2+0x32] +XDIS 83fa: MISC BASE D51B8D6C7F33 lea rbp, ptr [r31+r15*2+0x33] +XDIS 8400: MISC BASE D5288D6C4015 lea rbp, ptr [rax+r16*2+0x15] +XDIS 8406: MISC BASE D5288D6C4116 lea rbp, ptr [rcx+r16*2+0x16] +XDIS 840c: MISC BASE D5288D6C4217 lea rbp, ptr [rdx+r16*2+0x17] +XDIS 8412: MISC BASE D5288D6C4318 lea rbp, ptr [rbx+r16*2+0x18] +XDIS 8418: MISC BASE D5288D6C4419 lea rbp, ptr [rsp+r16*2+0x19] +XDIS 841e: MISC BASE D5288D6C451A lea rbp, ptr [rbp+r16*2+0x1a] +XDIS 8424: MISC BASE D5288D6C461B lea rbp, ptr [rsi+r16*2+0x1b] +XDIS 842a: MISC BASE D5288D6C471C lea rbp, ptr [rdi+r16*2+0x1c] +XDIS 8430: MISC BASE D5298D6C401D lea rbp, ptr [r8+r16*2+0x1d] +XDIS 8436: MISC BASE D5298D6C411E lea rbp, ptr [r9+r16*2+0x1e] +XDIS 843c: MISC BASE D5298D6C421F lea rbp, ptr [r10+r16*2+0x1f] +XDIS 8442: MISC BASE D5298D6C4320 lea rbp, ptr [r11+r16*2+0x20] +XDIS 8448: MISC BASE D5298D6C4421 lea rbp, ptr [r12+r16*2+0x21] +XDIS 844e: MISC BASE D5298D6C4522 lea rbp, ptr [r13+r16*2+0x22] +XDIS 8454: MISC BASE D5298D6C4623 lea rbp, ptr [r14+r16*2+0x23] +XDIS 845a: MISC BASE D5298D6C4724 lea rbp, ptr [r15+r16*2+0x24] +XDIS 8460: MISC BASE D5388D6C4025 lea rbp, ptr [r16+r16*2+0x25] +XDIS 8466: MISC BASE D5388D6C4126 lea rbp, ptr [r17+r16*2+0x26] +XDIS 846c: MISC BASE D5388D6C4227 lea rbp, ptr [r18+r16*2+0x27] +XDIS 8472: MISC BASE D5388D6C4328 lea rbp, ptr [r19+r16*2+0x28] +XDIS 8478: MISC BASE D5388D6C4429 lea rbp, ptr [r20+r16*2+0x29] +XDIS 847e: MISC BASE D5388D6C452A lea rbp, ptr [r21+r16*2+0x2a] +XDIS 8484: MISC BASE D5388D6C462B lea rbp, ptr [r22+r16*2+0x2b] +XDIS 848a: MISC BASE D5388D6C472C lea rbp, ptr [r23+r16*2+0x2c] +XDIS 8490: MISC BASE D5398D6C402D lea rbp, ptr [r24+r16*2+0x2d] +XDIS 8496: MISC BASE D5398D6C412E lea rbp, ptr [r25+r16*2+0x2e] +XDIS 849c: MISC BASE D5398D6C422F lea rbp, ptr [r26+r16*2+0x2f] +XDIS 84a2: MISC BASE D5398D6C4330 lea rbp, ptr [r27+r16*2+0x30] +XDIS 84a8: MISC BASE D5398D6C4431 lea rbp, ptr [r28+r16*2+0x31] +XDIS 84ae: MISC BASE D5398D6C4532 lea rbp, ptr [r29+r16*2+0x32] +XDIS 84b4: MISC BASE D5398D6C4633 lea rbp, ptr [r30+r16*2+0x33] +XDIS 84ba: MISC BASE D5398D6C4734 lea rbp, ptr [r31+r16*2+0x34] +XDIS 84c0: MISC BASE D5288D6C4816 lea rbp, ptr [rax+r17*2+0x16] +XDIS 84c6: MISC BASE D5288D6C4917 lea rbp, ptr [rcx+r17*2+0x17] +XDIS 84cc: MISC BASE D5288D6C4A18 lea rbp, ptr [rdx+r17*2+0x18] +XDIS 84d2: MISC BASE D5288D6C4B19 lea rbp, ptr [rbx+r17*2+0x19] +XDIS 84d8: MISC BASE D5288D6C4C1A lea rbp, ptr [rsp+r17*2+0x1a] +XDIS 84de: MISC BASE D5288D6C4D1B lea rbp, ptr [rbp+r17*2+0x1b] +XDIS 84e4: MISC BASE D5288D6C4E1C lea rbp, ptr [rsi+r17*2+0x1c] +XDIS 84ea: MISC BASE D5288D6C4F1D lea rbp, ptr [rdi+r17*2+0x1d] +XDIS 84f0: MISC BASE D5298D6C481E lea rbp, ptr [r8+r17*2+0x1e] +XDIS 84f6: MISC BASE D5298D6C491F lea rbp, ptr [r9+r17*2+0x1f] +XDIS 84fc: MISC BASE D5298D6C4A20 lea rbp, ptr [r10+r17*2+0x20] +XDIS 8502: MISC BASE D5298D6C4B21 lea rbp, ptr [r11+r17*2+0x21] +XDIS 8508: MISC BASE D5298D6C4C22 lea rbp, ptr [r12+r17*2+0x22] +XDIS 850e: MISC BASE D5298D6C4D23 lea rbp, ptr [r13+r17*2+0x23] +XDIS 8514: MISC BASE D5298D6C4E24 lea rbp, ptr [r14+r17*2+0x24] +XDIS 851a: MISC BASE D5298D6C4F25 lea rbp, ptr [r15+r17*2+0x25] +XDIS 8520: MISC BASE D5388D6C4826 lea rbp, ptr [r16+r17*2+0x26] +XDIS 8526: MISC BASE D5388D6C4927 lea rbp, ptr [r17+r17*2+0x27] +XDIS 852c: MISC BASE D5388D6C4A28 lea rbp, ptr [r18+r17*2+0x28] +XDIS 8532: MISC BASE D5388D6C4B29 lea rbp, ptr [r19+r17*2+0x29] +XDIS 8538: MISC BASE D5388D6C4C2A lea rbp, ptr [r20+r17*2+0x2a] +XDIS 853e: MISC BASE D5388D6C4D2B lea rbp, ptr [r21+r17*2+0x2b] +XDIS 8544: MISC BASE D5388D6C4E2C lea rbp, ptr [r22+r17*2+0x2c] +XDIS 854a: MISC BASE D5388D6C4F2D lea rbp, ptr [r23+r17*2+0x2d] +XDIS 8550: MISC BASE D5398D6C482E lea rbp, ptr [r24+r17*2+0x2e] +XDIS 8556: MISC BASE D5398D6C492F lea rbp, ptr [r25+r17*2+0x2f] +XDIS 855c: MISC BASE D5398D6C4A30 lea rbp, ptr [r26+r17*2+0x30] +XDIS 8562: MISC BASE D5398D6C4B31 lea rbp, ptr [r27+r17*2+0x31] +XDIS 8568: MISC BASE D5398D6C4C32 lea rbp, ptr [r28+r17*2+0x32] +XDIS 856e: MISC BASE D5398D6C4D33 lea rbp, ptr [r29+r17*2+0x33] +XDIS 8574: MISC BASE D5398D6C4E34 lea rbp, ptr [r30+r17*2+0x34] +XDIS 857a: MISC BASE D5398D6C4F35 lea rbp, ptr [r31+r17*2+0x35] +XDIS 8580: MISC BASE D5288D6C5017 lea rbp, ptr [rax+r18*2+0x17] +XDIS 8586: MISC BASE D5288D6C5118 lea rbp, ptr [rcx+r18*2+0x18] +XDIS 858c: MISC BASE D5288D6C5219 lea rbp, ptr [rdx+r18*2+0x19] +XDIS 8592: MISC BASE D5288D6C531A lea rbp, ptr [rbx+r18*2+0x1a] +XDIS 8598: MISC BASE D5288D6C541B lea rbp, ptr [rsp+r18*2+0x1b] +XDIS 859e: MISC BASE D5288D6C551C lea rbp, ptr [rbp+r18*2+0x1c] +XDIS 85a4: MISC BASE D5288D6C561D lea rbp, ptr [rsi+r18*2+0x1d] +XDIS 85aa: MISC BASE D5288D6C571E lea rbp, ptr [rdi+r18*2+0x1e] +XDIS 85b0: MISC BASE D5298D6C501F lea rbp, ptr [r8+r18*2+0x1f] +XDIS 85b6: MISC BASE D5298D6C5120 lea rbp, ptr [r9+r18*2+0x20] +XDIS 85bc: MISC BASE D5298D6C5221 lea rbp, ptr [r10+r18*2+0x21] +XDIS 85c2: MISC BASE D5298D6C5322 lea rbp, ptr [r11+r18*2+0x22] +XDIS 85c8: MISC BASE D5298D6C5423 lea rbp, ptr [r12+r18*2+0x23] +XDIS 85ce: MISC BASE D5298D6C5524 lea rbp, ptr [r13+r18*2+0x24] +XDIS 85d4: MISC BASE D5298D6C5625 lea rbp, ptr [r14+r18*2+0x25] +XDIS 85da: MISC BASE D5298D6C5726 lea rbp, ptr [r15+r18*2+0x26] +XDIS 85e0: MISC BASE D5388D6C5027 lea rbp, ptr [r16+r18*2+0x27] +XDIS 85e6: MISC BASE D5388D6C5128 lea rbp, ptr [r17+r18*2+0x28] +XDIS 85ec: MISC BASE D5388D6C5229 lea rbp, ptr [r18+r18*2+0x29] +XDIS 85f2: MISC BASE D5388D6C532A lea rbp, ptr [r19+r18*2+0x2a] +XDIS 85f8: MISC BASE D5388D6C542B lea rbp, ptr [r20+r18*2+0x2b] +XDIS 85fe: MISC BASE D5388D6C552C lea rbp, ptr [r21+r18*2+0x2c] +XDIS 8604: MISC BASE D5388D6C562D lea rbp, ptr [r22+r18*2+0x2d] +XDIS 860a: MISC BASE D5388D6C572E lea rbp, ptr [r23+r18*2+0x2e] +XDIS 8610: MISC BASE D5398D6C502F lea rbp, ptr [r24+r18*2+0x2f] +XDIS 8616: MISC BASE D5398D6C5130 lea rbp, ptr [r25+r18*2+0x30] +XDIS 861c: MISC BASE D5398D6C5231 lea rbp, ptr [r26+r18*2+0x31] +XDIS 8622: MISC BASE D5398D6C5332 lea rbp, ptr [r27+r18*2+0x32] +XDIS 8628: MISC BASE D5398D6C5433 lea rbp, ptr [r28+r18*2+0x33] +XDIS 862e: MISC BASE D5398D6C5534 lea rbp, ptr [r29+r18*2+0x34] +XDIS 8634: MISC BASE D5398D6C5635 lea rbp, ptr [r30+r18*2+0x35] +XDIS 863a: MISC BASE D5398D6C5736 lea rbp, ptr [r31+r18*2+0x36] +XDIS 8640: MISC BASE D5288D6C5818 lea rbp, ptr [rax+r19*2+0x18] +XDIS 8646: MISC BASE D5288D6C5919 lea rbp, ptr [rcx+r19*2+0x19] +XDIS 864c: MISC BASE D5288D6C5A1A lea rbp, ptr [rdx+r19*2+0x1a] +XDIS 8652: MISC BASE D5288D6C5B1B lea rbp, ptr [rbx+r19*2+0x1b] +XDIS 8658: MISC BASE D5288D6C5C1C lea rbp, ptr [rsp+r19*2+0x1c] +XDIS 865e: MISC BASE D5288D6C5D1D lea rbp, ptr [rbp+r19*2+0x1d] +XDIS 8664: MISC BASE D5288D6C5E1E lea rbp, ptr [rsi+r19*2+0x1e] +XDIS 866a: MISC BASE D5288D6C5F1F lea rbp, ptr [rdi+r19*2+0x1f] +XDIS 8670: MISC BASE D5298D6C5820 lea rbp, ptr [r8+r19*2+0x20] +XDIS 8676: MISC BASE D5298D6C5921 lea rbp, ptr [r9+r19*2+0x21] +XDIS 867c: MISC BASE D5298D6C5A22 lea rbp, ptr [r10+r19*2+0x22] +XDIS 8682: MISC BASE D5298D6C5B23 lea rbp, ptr [r11+r19*2+0x23] +XDIS 8688: MISC BASE D5298D6C5C24 lea rbp, ptr [r12+r19*2+0x24] +XDIS 868e: MISC BASE D5298D6C5D25 lea rbp, ptr [r13+r19*2+0x25] +XDIS 8694: MISC BASE D5298D6C5E26 lea rbp, ptr [r14+r19*2+0x26] +XDIS 869a: MISC BASE D5298D6C5F27 lea rbp, ptr [r15+r19*2+0x27] +XDIS 86a0: MISC BASE D5388D6C5828 lea rbp, ptr [r16+r19*2+0x28] +XDIS 86a6: MISC BASE D5388D6C5929 lea rbp, ptr [r17+r19*2+0x29] +XDIS 86ac: MISC BASE D5388D6C5A2A lea rbp, ptr [r18+r19*2+0x2a] +XDIS 86b2: MISC BASE D5388D6C5B2B lea rbp, ptr [r19+r19*2+0x2b] +XDIS 86b8: MISC BASE D5388D6C5C2C lea rbp, ptr [r20+r19*2+0x2c] +XDIS 86be: MISC BASE D5388D6C5D2D lea rbp, ptr [r21+r19*2+0x2d] +XDIS 86c4: MISC BASE D5388D6C5E2E lea rbp, ptr [r22+r19*2+0x2e] +XDIS 86ca: MISC BASE D5388D6C5F2F lea rbp, ptr [r23+r19*2+0x2f] +XDIS 86d0: MISC BASE D5398D6C5830 lea rbp, ptr [r24+r19*2+0x30] +XDIS 86d6: MISC BASE D5398D6C5931 lea rbp, ptr [r25+r19*2+0x31] +XDIS 86dc: MISC BASE D5398D6C5A32 lea rbp, ptr [r26+r19*2+0x32] +XDIS 86e2: MISC BASE D5398D6C5B33 lea rbp, ptr [r27+r19*2+0x33] +XDIS 86e8: MISC BASE D5398D6C5C34 lea rbp, ptr [r28+r19*2+0x34] +XDIS 86ee: MISC BASE D5398D6C5D35 lea rbp, ptr [r29+r19*2+0x35] +XDIS 86f4: MISC BASE D5398D6C5E36 lea rbp, ptr [r30+r19*2+0x36] +XDIS 86fa: MISC BASE D5398D6C5F37 lea rbp, ptr [r31+r19*2+0x37] +XDIS 8700: MISC BASE D5288D6C6019 lea rbp, ptr [rax+r20*2+0x19] +XDIS 8706: MISC BASE D5288D6C611A lea rbp, ptr [rcx+r20*2+0x1a] +XDIS 870c: MISC BASE D5288D6C621B lea rbp, ptr [rdx+r20*2+0x1b] +XDIS 8712: MISC BASE D5288D6C631C lea rbp, ptr [rbx+r20*2+0x1c] +XDIS 8718: MISC BASE D5288D6C641D lea rbp, ptr [rsp+r20*2+0x1d] +XDIS 871e: MISC BASE D5288D6C651E lea rbp, ptr [rbp+r20*2+0x1e] +XDIS 8724: MISC BASE D5288D6C661F lea rbp, ptr [rsi+r20*2+0x1f] +XDIS 872a: MISC BASE D5288D6C6720 lea rbp, ptr [rdi+r20*2+0x20] +XDIS 8730: MISC BASE D5298D6C6021 lea rbp, ptr [r8+r20*2+0x21] +XDIS 8736: MISC BASE D5298D6C6122 lea rbp, ptr [r9+r20*2+0x22] +XDIS 873c: MISC BASE D5298D6C6223 lea rbp, ptr [r10+r20*2+0x23] +XDIS 8742: MISC BASE D5298D6C6324 lea rbp, ptr [r11+r20*2+0x24] +XDIS 8748: MISC BASE D5298D6C6425 lea rbp, ptr [r12+r20*2+0x25] +XDIS 874e: MISC BASE D5298D6C6526 lea rbp, ptr [r13+r20*2+0x26] +XDIS 8754: MISC BASE D5298D6C6627 lea rbp, ptr [r14+r20*2+0x27] +XDIS 875a: MISC BASE D5298D6C6728 lea rbp, ptr [r15+r20*2+0x28] +XDIS 8760: MISC BASE D5388D6C6029 lea rbp, ptr [r16+r20*2+0x29] +XDIS 8766: MISC BASE D5388D6C612A lea rbp, ptr [r17+r20*2+0x2a] +XDIS 876c: MISC BASE D5388D6C622B lea rbp, ptr [r18+r20*2+0x2b] +XDIS 8772: MISC BASE D5388D6C632C lea rbp, ptr [r19+r20*2+0x2c] +XDIS 8778: MISC BASE D5388D6C642D lea rbp, ptr [r20+r20*2+0x2d] +XDIS 877e: MISC BASE D5388D6C652E lea rbp, ptr [r21+r20*2+0x2e] +XDIS 8784: MISC BASE D5388D6C662F lea rbp, ptr [r22+r20*2+0x2f] +XDIS 878a: MISC BASE D5388D6C6730 lea rbp, ptr [r23+r20*2+0x30] +XDIS 8790: MISC BASE D5398D6C6031 lea rbp, ptr [r24+r20*2+0x31] +XDIS 8796: MISC BASE D5398D6C6132 lea rbp, ptr [r25+r20*2+0x32] +XDIS 879c: MISC BASE D5398D6C6233 lea rbp, ptr [r26+r20*2+0x33] +XDIS 87a2: MISC BASE D5398D6C6334 lea rbp, ptr [r27+r20*2+0x34] +XDIS 87a8: MISC BASE D5398D6C6435 lea rbp, ptr [r28+r20*2+0x35] +XDIS 87ae: MISC BASE D5398D6C6536 lea rbp, ptr [r29+r20*2+0x36] +XDIS 87b4: MISC BASE D5398D6C6637 lea rbp, ptr [r30+r20*2+0x37] +XDIS 87ba: MISC BASE D5398D6C6738 lea rbp, ptr [r31+r20*2+0x38] +XDIS 87c0: MISC BASE D5288D6C681A lea rbp, ptr [rax+r21*2+0x1a] +XDIS 87c6: MISC BASE D5288D6C691B lea rbp, ptr [rcx+r21*2+0x1b] +XDIS 87cc: MISC BASE D5288D6C6A1C lea rbp, ptr [rdx+r21*2+0x1c] +XDIS 87d2: MISC BASE D5288D6C6B1D lea rbp, ptr [rbx+r21*2+0x1d] +XDIS 87d8: MISC BASE D5288D6C6C1E lea rbp, ptr [rsp+r21*2+0x1e] +XDIS 87de: MISC BASE D5288D6C6D1F lea rbp, ptr [rbp+r21*2+0x1f] +XDIS 87e4: MISC BASE D5288D6C6E20 lea rbp, ptr [rsi+r21*2+0x20] +XDIS 87ea: MISC BASE D5288D6C6F21 lea rbp, ptr [rdi+r21*2+0x21] +XDIS 87f0: MISC BASE D5298D6C6822 lea rbp, ptr [r8+r21*2+0x22] +XDIS 87f6: MISC BASE D5298D6C6923 lea rbp, ptr [r9+r21*2+0x23] +XDIS 87fc: MISC BASE D5298D6C6A24 lea rbp, ptr [r10+r21*2+0x24] +XDIS 8802: MISC BASE D5298D6C6B25 lea rbp, ptr [r11+r21*2+0x25] +XDIS 8808: MISC BASE D5298D6C6C26 lea rbp, ptr [r12+r21*2+0x26] +XDIS 880e: MISC BASE D5298D6C6D27 lea rbp, ptr [r13+r21*2+0x27] +XDIS 8814: MISC BASE D5298D6C6E28 lea rbp, ptr [r14+r21*2+0x28] +XDIS 881a: MISC BASE D5298D6C6F29 lea rbp, ptr [r15+r21*2+0x29] +XDIS 8820: MISC BASE D5388D6C682A lea rbp, ptr [r16+r21*2+0x2a] +XDIS 8826: MISC BASE D5388D6C692B lea rbp, ptr [r17+r21*2+0x2b] +XDIS 882c: MISC BASE D5388D6C6A2C lea rbp, ptr [r18+r21*2+0x2c] +XDIS 8832: MISC BASE D5388D6C6B2D lea rbp, ptr [r19+r21*2+0x2d] +XDIS 8838: MISC BASE D5388D6C6C2E lea rbp, ptr [r20+r21*2+0x2e] +XDIS 883e: MISC BASE D5388D6C6D2F lea rbp, ptr [r21+r21*2+0x2f] +XDIS 8844: MISC BASE D5388D6C6E30 lea rbp, ptr [r22+r21*2+0x30] +XDIS 884a: MISC BASE D5388D6C6F31 lea rbp, ptr [r23+r21*2+0x31] +XDIS 8850: MISC BASE D5398D6C6832 lea rbp, ptr [r24+r21*2+0x32] +XDIS 8856: MISC BASE D5398D6C6933 lea rbp, ptr [r25+r21*2+0x33] +XDIS 885c: MISC BASE D5398D6C6A34 lea rbp, ptr [r26+r21*2+0x34] +XDIS 8862: MISC BASE D5398D6C6B35 lea rbp, ptr [r27+r21*2+0x35] +XDIS 8868: MISC BASE D5398D6C6C36 lea rbp, ptr [r28+r21*2+0x36] +XDIS 886e: MISC BASE D5398D6C6D37 lea rbp, ptr [r29+r21*2+0x37] +XDIS 8874: MISC BASE D5398D6C6E38 lea rbp, ptr [r30+r21*2+0x38] +XDIS 887a: MISC BASE D5398D6C6F39 lea rbp, ptr [r31+r21*2+0x39] +XDIS 8880: MISC BASE D5288D6C701B lea rbp, ptr [rax+r22*2+0x1b] +XDIS 8886: MISC BASE D5288D6C711C lea rbp, ptr [rcx+r22*2+0x1c] +XDIS 888c: MISC BASE D5288D6C721D lea rbp, ptr [rdx+r22*2+0x1d] +XDIS 8892: MISC BASE D5288D6C731E lea rbp, ptr [rbx+r22*2+0x1e] +XDIS 8898: MISC BASE D5288D6C741F lea rbp, ptr [rsp+r22*2+0x1f] +XDIS 889e: MISC BASE D5288D6C7520 lea rbp, ptr [rbp+r22*2+0x20] +XDIS 88a4: MISC BASE D5288D6C7621 lea rbp, ptr [rsi+r22*2+0x21] +XDIS 88aa: MISC BASE D5288D6C7722 lea rbp, ptr [rdi+r22*2+0x22] +XDIS 88b0: MISC BASE D5298D6C7023 lea rbp, ptr [r8+r22*2+0x23] +XDIS 88b6: MISC BASE D5298D6C7124 lea rbp, ptr [r9+r22*2+0x24] +XDIS 88bc: MISC BASE D5298D6C7225 lea rbp, ptr [r10+r22*2+0x25] +XDIS 88c2: MISC BASE D5298D6C7326 lea rbp, ptr [r11+r22*2+0x26] +XDIS 88c8: MISC BASE D5298D6C7427 lea rbp, ptr [r12+r22*2+0x27] +XDIS 88ce: MISC BASE D5298D6C7528 lea rbp, ptr [r13+r22*2+0x28] +XDIS 88d4: MISC BASE D5298D6C7629 lea rbp, ptr [r14+r22*2+0x29] +XDIS 88da: MISC BASE D5298D6C772A lea rbp, ptr [r15+r22*2+0x2a] +XDIS 88e0: MISC BASE D5388D6C702B lea rbp, ptr [r16+r22*2+0x2b] +XDIS 88e6: MISC BASE D5388D6C712C lea rbp, ptr [r17+r22*2+0x2c] +XDIS 88ec: MISC BASE D5388D6C722D lea rbp, ptr [r18+r22*2+0x2d] +XDIS 88f2: MISC BASE D5388D6C732E lea rbp, ptr [r19+r22*2+0x2e] +XDIS 88f8: MISC BASE D5388D6C742F lea rbp, ptr [r20+r22*2+0x2f] +XDIS 88fe: MISC BASE D5388D6C7530 lea rbp, ptr [r21+r22*2+0x30] +XDIS 8904: MISC BASE D5388D6C7631 lea rbp, ptr [r22+r22*2+0x31] +XDIS 890a: MISC BASE D5388D6C7732 lea rbp, ptr [r23+r22*2+0x32] +XDIS 8910: MISC BASE D5398D6C7033 lea rbp, ptr [r24+r22*2+0x33] +XDIS 8916: MISC BASE D5398D6C7134 lea rbp, ptr [r25+r22*2+0x34] +XDIS 891c: MISC BASE D5398D6C7235 lea rbp, ptr [r26+r22*2+0x35] +XDIS 8922: MISC BASE D5398D6C7336 lea rbp, ptr [r27+r22*2+0x36] +XDIS 8928: MISC BASE D5398D6C7437 lea rbp, ptr [r28+r22*2+0x37] +XDIS 892e: MISC BASE D5398D6C7538 lea rbp, ptr [r29+r22*2+0x38] +XDIS 8934: MISC BASE D5398D6C7639 lea rbp, ptr [r30+r22*2+0x39] +XDIS 893a: MISC BASE D5398D6C773A lea rbp, ptr [r31+r22*2+0x3a] +XDIS 8940: MISC BASE D5288D6C781C lea rbp, ptr [rax+r23*2+0x1c] +XDIS 8946: MISC BASE D5288D6C791D lea rbp, ptr [rcx+r23*2+0x1d] +XDIS 894c: MISC BASE D5288D6C7A1E lea rbp, ptr [rdx+r23*2+0x1e] +XDIS 8952: MISC BASE D5288D6C7B1F lea rbp, ptr [rbx+r23*2+0x1f] +XDIS 8958: MISC BASE D5288D6C7C20 lea rbp, ptr [rsp+r23*2+0x20] +XDIS 895e: MISC BASE D5288D6C7D21 lea rbp, ptr [rbp+r23*2+0x21] +XDIS 8964: MISC BASE D5288D6C7E22 lea rbp, ptr [rsi+r23*2+0x22] +XDIS 896a: MISC BASE D5288D6C7F23 lea rbp, ptr [rdi+r23*2+0x23] +XDIS 8970: MISC BASE D5298D6C7824 lea rbp, ptr [r8+r23*2+0x24] +XDIS 8976: MISC BASE D5298D6C7925 lea rbp, ptr [r9+r23*2+0x25] +XDIS 897c: MISC BASE D5298D6C7A26 lea rbp, ptr [r10+r23*2+0x26] +XDIS 8982: MISC BASE D5298D6C7B27 lea rbp, ptr [r11+r23*2+0x27] +XDIS 8988: MISC BASE D5298D6C7C28 lea rbp, ptr [r12+r23*2+0x28] +XDIS 898e: MISC BASE D5298D6C7D29 lea rbp, ptr [r13+r23*2+0x29] +XDIS 8994: MISC BASE D5298D6C7E2A lea rbp, ptr [r14+r23*2+0x2a] +XDIS 899a: MISC BASE D5298D6C7F2B lea rbp, ptr [r15+r23*2+0x2b] +XDIS 89a0: MISC BASE D5388D6C782C lea rbp, ptr [r16+r23*2+0x2c] +XDIS 89a6: MISC BASE D5388D6C792D lea rbp, ptr [r17+r23*2+0x2d] +XDIS 89ac: MISC BASE D5388D6C7A2E lea rbp, ptr [r18+r23*2+0x2e] +XDIS 89b2: MISC BASE D5388D6C7B2F lea rbp, ptr [r19+r23*2+0x2f] +XDIS 89b8: MISC BASE D5388D6C7C30 lea rbp, ptr [r20+r23*2+0x30] +XDIS 89be: MISC BASE D5388D6C7D31 lea rbp, ptr [r21+r23*2+0x31] +XDIS 89c4: MISC BASE D5388D6C7E32 lea rbp, ptr [r22+r23*2+0x32] +XDIS 89ca: MISC BASE D5388D6C7F33 lea rbp, ptr [r23+r23*2+0x33] +XDIS 89d0: MISC BASE D5398D6C7834 lea rbp, ptr [r24+r23*2+0x34] +XDIS 89d6: MISC BASE D5398D6C7935 lea rbp, ptr [r25+r23*2+0x35] +XDIS 89dc: MISC BASE D5398D6C7A36 lea rbp, ptr [r26+r23*2+0x36] +XDIS 89e2: MISC BASE D5398D6C7B37 lea rbp, ptr [r27+r23*2+0x37] +XDIS 89e8: MISC BASE D5398D6C7C38 lea rbp, ptr [r28+r23*2+0x38] +XDIS 89ee: MISC BASE D5398D6C7D39 lea rbp, ptr [r29+r23*2+0x39] +XDIS 89f4: MISC BASE D5398D6C7E3A lea rbp, ptr [r30+r23*2+0x3a] +XDIS 89fa: MISC BASE D5398D6C7F3B lea rbp, ptr [r31+r23*2+0x3b] +XDIS 8a00: MISC BASE D52A8D6C401D lea rbp, ptr [rax+r24*2+0x1d] +XDIS 8a06: MISC BASE D52A8D6C411E lea rbp, ptr [rcx+r24*2+0x1e] +XDIS 8a0c: MISC BASE D52A8D6C421F lea rbp, ptr [rdx+r24*2+0x1f] +XDIS 8a12: MISC BASE D52A8D6C4320 lea rbp, ptr [rbx+r24*2+0x20] +XDIS 8a18: MISC BASE D52A8D6C4421 lea rbp, ptr [rsp+r24*2+0x21] +XDIS 8a1e: MISC BASE D52A8D6C4522 lea rbp, ptr [rbp+r24*2+0x22] +XDIS 8a24: MISC BASE D52A8D6C4623 lea rbp, ptr [rsi+r24*2+0x23] +XDIS 8a2a: MISC BASE D52A8D6C4724 lea rbp, ptr [rdi+r24*2+0x24] +XDIS 8a30: MISC BASE D52B8D6C4025 lea rbp, ptr [r8+r24*2+0x25] +XDIS 8a36: MISC BASE D52B8D6C4126 lea rbp, ptr [r9+r24*2+0x26] +XDIS 8a3c: MISC BASE D52B8D6C4227 lea rbp, ptr [r10+r24*2+0x27] +XDIS 8a42: MISC BASE D52B8D6C4328 lea rbp, ptr [r11+r24*2+0x28] +XDIS 8a48: MISC BASE D52B8D6C4429 lea rbp, ptr [r12+r24*2+0x29] +XDIS 8a4e: MISC BASE D52B8D6C452A lea rbp, ptr [r13+r24*2+0x2a] +XDIS 8a54: MISC BASE D52B8D6C462B lea rbp, ptr [r14+r24*2+0x2b] +XDIS 8a5a: MISC BASE D52B8D6C472C lea rbp, ptr [r15+r24*2+0x2c] +XDIS 8a60: MISC BASE D53A8D6C402D lea rbp, ptr [r16+r24*2+0x2d] +XDIS 8a66: MISC BASE D53A8D6C412E lea rbp, ptr [r17+r24*2+0x2e] +XDIS 8a6c: MISC BASE D53A8D6C422F lea rbp, ptr [r18+r24*2+0x2f] +XDIS 8a72: MISC BASE D53A8D6C4330 lea rbp, ptr [r19+r24*2+0x30] +XDIS 8a78: MISC BASE D53A8D6C4431 lea rbp, ptr [r20+r24*2+0x31] +XDIS 8a7e: MISC BASE D53A8D6C4532 lea rbp, ptr [r21+r24*2+0x32] +XDIS 8a84: MISC BASE D53A8D6C4633 lea rbp, ptr [r22+r24*2+0x33] +XDIS 8a8a: MISC BASE D53A8D6C4734 lea rbp, ptr [r23+r24*2+0x34] +XDIS 8a90: MISC BASE D53B8D6C4035 lea rbp, ptr [r24+r24*2+0x35] +XDIS 8a96: MISC BASE D53B8D6C4136 lea rbp, ptr [r25+r24*2+0x36] +XDIS 8a9c: MISC BASE D53B8D6C4237 lea rbp, ptr [r26+r24*2+0x37] +XDIS 8aa2: MISC BASE D53B8D6C4338 lea rbp, ptr [r27+r24*2+0x38] +XDIS 8aa8: MISC BASE D53B8D6C4439 lea rbp, ptr [r28+r24*2+0x39] +XDIS 8aae: MISC BASE D53B8D6C453A lea rbp, ptr [r29+r24*2+0x3a] +XDIS 8ab4: MISC BASE D53B8D6C463B lea rbp, ptr [r30+r24*2+0x3b] +XDIS 8aba: MISC BASE D53B8D6C473C lea rbp, ptr [r31+r24*2+0x3c] +XDIS 8ac0: MISC BASE D52A8D6C481E lea rbp, ptr [rax+r25*2+0x1e] +XDIS 8ac6: MISC BASE D52A8D6C491F lea rbp, ptr [rcx+r25*2+0x1f] +XDIS 8acc: MISC BASE D52A8D6C4A20 lea rbp, ptr [rdx+r25*2+0x20] +XDIS 8ad2: MISC BASE D52A8D6C4B21 lea rbp, ptr [rbx+r25*2+0x21] +XDIS 8ad8: MISC BASE D52A8D6C4C22 lea rbp, ptr [rsp+r25*2+0x22] +XDIS 8ade: MISC BASE D52A8D6C4D23 lea rbp, ptr [rbp+r25*2+0x23] +XDIS 8ae4: MISC BASE D52A8D6C4E24 lea rbp, ptr [rsi+r25*2+0x24] +XDIS 8aea: MISC BASE D52A8D6C4F25 lea rbp, ptr [rdi+r25*2+0x25] +XDIS 8af0: MISC BASE D52B8D6C4826 lea rbp, ptr [r8+r25*2+0x26] +XDIS 8af6: MISC BASE D52B8D6C4927 lea rbp, ptr [r9+r25*2+0x27] +XDIS 8afc: MISC BASE D52B8D6C4A28 lea rbp, ptr [r10+r25*2+0x28] +XDIS 8b02: MISC BASE D52B8D6C4B29 lea rbp, ptr [r11+r25*2+0x29] +XDIS 8b08: MISC BASE D52B8D6C4C2A lea rbp, ptr [r12+r25*2+0x2a] +XDIS 8b0e: MISC BASE D52B8D6C4D2B lea rbp, ptr [r13+r25*2+0x2b] +XDIS 8b14: MISC BASE D52B8D6C4E2C lea rbp, ptr [r14+r25*2+0x2c] +XDIS 8b1a: MISC BASE D52B8D6C4F2D lea rbp, ptr [r15+r25*2+0x2d] +XDIS 8b20: MISC BASE D53A8D6C482E lea rbp, ptr [r16+r25*2+0x2e] +XDIS 8b26: MISC BASE D53A8D6C492F lea rbp, ptr [r17+r25*2+0x2f] +XDIS 8b2c: MISC BASE D53A8D6C4A30 lea rbp, ptr [r18+r25*2+0x30] +XDIS 8b32: MISC BASE D53A8D6C4B31 lea rbp, ptr [r19+r25*2+0x31] +XDIS 8b38: MISC BASE D53A8D6C4C32 lea rbp, ptr [r20+r25*2+0x32] +XDIS 8b3e: MISC BASE D53A8D6C4D33 lea rbp, ptr [r21+r25*2+0x33] +XDIS 8b44: MISC BASE D53A8D6C4E34 lea rbp, ptr [r22+r25*2+0x34] +XDIS 8b4a: MISC BASE D53A8D6C4F35 lea rbp, ptr [r23+r25*2+0x35] +XDIS 8b50: MISC BASE D53B8D6C4836 lea rbp, ptr [r24+r25*2+0x36] +XDIS 8b56: MISC BASE D53B8D6C4937 lea rbp, ptr [r25+r25*2+0x37] +XDIS 8b5c: MISC BASE D53B8D6C4A38 lea rbp, ptr [r26+r25*2+0x38] +XDIS 8b62: MISC BASE D53B8D6C4B39 lea rbp, ptr [r27+r25*2+0x39] +XDIS 8b68: MISC BASE D53B8D6C4C3A lea rbp, ptr [r28+r25*2+0x3a] +XDIS 8b6e: MISC BASE D53B8D6C4D3B lea rbp, ptr [r29+r25*2+0x3b] +XDIS 8b74: MISC BASE D53B8D6C4E3C lea rbp, ptr [r30+r25*2+0x3c] +XDIS 8b7a: MISC BASE D53B8D6C4F3D lea rbp, ptr [r31+r25*2+0x3d] +XDIS 8b80: MISC BASE D52A8D6C501F lea rbp, ptr [rax+r26*2+0x1f] +XDIS 8b86: MISC BASE D52A8D6C5120 lea rbp, ptr [rcx+r26*2+0x20] +XDIS 8b8c: MISC BASE D52A8D6C5221 lea rbp, ptr [rdx+r26*2+0x21] +XDIS 8b92: MISC BASE D52A8D6C5322 lea rbp, ptr [rbx+r26*2+0x22] +XDIS 8b98: MISC BASE D52A8D6C5423 lea rbp, ptr [rsp+r26*2+0x23] +XDIS 8b9e: MISC BASE D52A8D6C5524 lea rbp, ptr [rbp+r26*2+0x24] +XDIS 8ba4: MISC BASE D52A8D6C5625 lea rbp, ptr [rsi+r26*2+0x25] +XDIS 8baa: MISC BASE D52A8D6C5726 lea rbp, ptr [rdi+r26*2+0x26] +XDIS 8bb0: MISC BASE D52B8D6C5027 lea rbp, ptr [r8+r26*2+0x27] +XDIS 8bb6: MISC BASE D52B8D6C5128 lea rbp, ptr [r9+r26*2+0x28] +XDIS 8bbc: MISC BASE D52B8D6C5229 lea rbp, ptr [r10+r26*2+0x29] +XDIS 8bc2: MISC BASE D52B8D6C532A lea rbp, ptr [r11+r26*2+0x2a] +XDIS 8bc8: MISC BASE D52B8D6C542B lea rbp, ptr [r12+r26*2+0x2b] +XDIS 8bce: MISC BASE D52B8D6C552C lea rbp, ptr [r13+r26*2+0x2c] +XDIS 8bd4: MISC BASE D52B8D6C562D lea rbp, ptr [r14+r26*2+0x2d] +XDIS 8bda: MISC BASE D52B8D6C572E lea rbp, ptr [r15+r26*2+0x2e] +XDIS 8be0: MISC BASE D53A8D6C502F lea rbp, ptr [r16+r26*2+0x2f] +XDIS 8be6: MISC BASE D53A8D6C5130 lea rbp, ptr [r17+r26*2+0x30] +XDIS 8bec: MISC BASE D53A8D6C5231 lea rbp, ptr [r18+r26*2+0x31] +XDIS 8bf2: MISC BASE D53A8D6C5332 lea rbp, ptr [r19+r26*2+0x32] +XDIS 8bf8: MISC BASE D53A8D6C5433 lea rbp, ptr [r20+r26*2+0x33] +XDIS 8bfe: MISC BASE D53A8D6C5534 lea rbp, ptr [r21+r26*2+0x34] +XDIS 8c04: MISC BASE D53A8D6C5635 lea rbp, ptr [r22+r26*2+0x35] +XDIS 8c0a: MISC BASE D53A8D6C5736 lea rbp, ptr [r23+r26*2+0x36] +XDIS 8c10: MISC BASE D53B8D6C5037 lea rbp, ptr [r24+r26*2+0x37] +XDIS 8c16: MISC BASE D53B8D6C5138 lea rbp, ptr [r25+r26*2+0x38] +XDIS 8c1c: MISC BASE D53B8D6C5239 lea rbp, ptr [r26+r26*2+0x39] +XDIS 8c22: MISC BASE D53B8D6C533A lea rbp, ptr [r27+r26*2+0x3a] +XDIS 8c28: MISC BASE D53B8D6C543B lea rbp, ptr [r28+r26*2+0x3b] +XDIS 8c2e: MISC BASE D53B8D6C553C lea rbp, ptr [r29+r26*2+0x3c] +XDIS 8c34: MISC BASE D53B8D6C563D lea rbp, ptr [r30+r26*2+0x3d] +XDIS 8c3a: MISC BASE D53B8D6C573E lea rbp, ptr [r31+r26*2+0x3e] +XDIS 8c40: MISC BASE D52A8D6C5820 lea rbp, ptr [rax+r27*2+0x20] +XDIS 8c46: MISC BASE D52A8D6C5921 lea rbp, ptr [rcx+r27*2+0x21] +XDIS 8c4c: MISC BASE D52A8D6C5A22 lea rbp, ptr [rdx+r27*2+0x22] +XDIS 8c52: MISC BASE D52A8D6C5B23 lea rbp, ptr [rbx+r27*2+0x23] +XDIS 8c58: MISC BASE D52A8D6C5C24 lea rbp, ptr [rsp+r27*2+0x24] +XDIS 8c5e: MISC BASE D52A8D6C5D25 lea rbp, ptr [rbp+r27*2+0x25] +XDIS 8c64: MISC BASE D52A8D6C5E26 lea rbp, ptr [rsi+r27*2+0x26] +XDIS 8c6a: MISC BASE D52A8D6C5F27 lea rbp, ptr [rdi+r27*2+0x27] +XDIS 8c70: MISC BASE D52B8D6C5828 lea rbp, ptr [r8+r27*2+0x28] +XDIS 8c76: MISC BASE D52B8D6C5929 lea rbp, ptr [r9+r27*2+0x29] +XDIS 8c7c: MISC BASE D52B8D6C5A2A lea rbp, ptr [r10+r27*2+0x2a] +XDIS 8c82: MISC BASE D52B8D6C5B2B lea rbp, ptr [r11+r27*2+0x2b] +XDIS 8c88: MISC BASE D52B8D6C5C2C lea rbp, ptr [r12+r27*2+0x2c] +XDIS 8c8e: MISC BASE D52B8D6C5D2D lea rbp, ptr [r13+r27*2+0x2d] +XDIS 8c94: MISC BASE D52B8D6C5E2E lea rbp, ptr [r14+r27*2+0x2e] +XDIS 8c9a: MISC BASE D52B8D6C5F2F lea rbp, ptr [r15+r27*2+0x2f] +XDIS 8ca0: MISC BASE D53A8D6C5830 lea rbp, ptr [r16+r27*2+0x30] +XDIS 8ca6: MISC BASE D53A8D6C5931 lea rbp, ptr [r17+r27*2+0x31] +XDIS 8cac: MISC BASE D53A8D6C5A32 lea rbp, ptr [r18+r27*2+0x32] +XDIS 8cb2: MISC BASE D53A8D6C5B33 lea rbp, ptr [r19+r27*2+0x33] +XDIS 8cb8: MISC BASE D53A8D6C5C34 lea rbp, ptr [r20+r27*2+0x34] +XDIS 8cbe: MISC BASE D53A8D6C5D35 lea rbp, ptr [r21+r27*2+0x35] +XDIS 8cc4: MISC BASE D53A8D6C5E36 lea rbp, ptr [r22+r27*2+0x36] +XDIS 8cca: MISC BASE D53A8D6C5F37 lea rbp, ptr [r23+r27*2+0x37] +XDIS 8cd0: MISC BASE D53B8D6C5838 lea rbp, ptr [r24+r27*2+0x38] +XDIS 8cd6: MISC BASE D53B8D6C5939 lea rbp, ptr [r25+r27*2+0x39] +XDIS 8cdc: MISC BASE D53B8D6C5A3A lea rbp, ptr [r26+r27*2+0x3a] +XDIS 8ce2: MISC BASE D53B8D6C5B3B lea rbp, ptr [r27+r27*2+0x3b] +XDIS 8ce8: MISC BASE D53B8D6C5C3C lea rbp, ptr [r28+r27*2+0x3c] +XDIS 8cee: MISC BASE D53B8D6C5D3D lea rbp, ptr [r29+r27*2+0x3d] +XDIS 8cf4: MISC BASE D53B8D6C5E3E lea rbp, ptr [r30+r27*2+0x3e] +XDIS 8cfa: MISC BASE D53B8D6C5F3F lea rbp, ptr [r31+r27*2+0x3f] +XDIS 8d00: MISC BASE D52A8D6C6021 lea rbp, ptr [rax+r28*2+0x21] +XDIS 8d06: MISC BASE D52A8D6C6122 lea rbp, ptr [rcx+r28*2+0x22] +XDIS 8d0c: MISC BASE D52A8D6C6223 lea rbp, ptr [rdx+r28*2+0x23] +XDIS 8d12: MISC BASE D52A8D6C6324 lea rbp, ptr [rbx+r28*2+0x24] +XDIS 8d18: MISC BASE D52A8D6C6425 lea rbp, ptr [rsp+r28*2+0x25] +XDIS 8d1e: MISC BASE D52A8D6C6526 lea rbp, ptr [rbp+r28*2+0x26] +XDIS 8d24: MISC BASE D52A8D6C6627 lea rbp, ptr [rsi+r28*2+0x27] +XDIS 8d2a: MISC BASE D52A8D6C6728 lea rbp, ptr [rdi+r28*2+0x28] +XDIS 8d30: MISC BASE D52B8D6C6029 lea rbp, ptr [r8+r28*2+0x29] +XDIS 8d36: MISC BASE D52B8D6C612A lea rbp, ptr [r9+r28*2+0x2a] +XDIS 8d3c: MISC BASE D52B8D6C622B lea rbp, ptr [r10+r28*2+0x2b] +XDIS 8d42: MISC BASE D52B8D6C632C lea rbp, ptr [r11+r28*2+0x2c] +XDIS 8d48: MISC BASE D52B8D6C642D lea rbp, ptr [r12+r28*2+0x2d] +XDIS 8d4e: MISC BASE D52B8D6C652E lea rbp, ptr [r13+r28*2+0x2e] +XDIS 8d54: MISC BASE D52B8D6C662F lea rbp, ptr [r14+r28*2+0x2f] +XDIS 8d5a: MISC BASE D52B8D6C6730 lea rbp, ptr [r15+r28*2+0x30] +XDIS 8d60: MISC BASE D53A8D6C6031 lea rbp, ptr [r16+r28*2+0x31] +XDIS 8d66: MISC BASE D53A8D6C6132 lea rbp, ptr [r17+r28*2+0x32] +XDIS 8d6c: MISC BASE D53A8D6C6233 lea rbp, ptr [r18+r28*2+0x33] +XDIS 8d72: MISC BASE D53A8D6C6334 lea rbp, ptr [r19+r28*2+0x34] +XDIS 8d78: MISC BASE D53A8D6C6435 lea rbp, ptr [r20+r28*2+0x35] +XDIS 8d7e: MISC BASE D53A8D6C6536 lea rbp, ptr [r21+r28*2+0x36] +XDIS 8d84: MISC BASE D53A8D6C6637 lea rbp, ptr [r22+r28*2+0x37] +XDIS 8d8a: MISC BASE D53A8D6C6738 lea rbp, ptr [r23+r28*2+0x38] +XDIS 8d90: MISC BASE D53B8D6C6039 lea rbp, ptr [r24+r28*2+0x39] +XDIS 8d96: MISC BASE D53B8D6C613A lea rbp, ptr [r25+r28*2+0x3a] +XDIS 8d9c: MISC BASE D53B8D6C623B lea rbp, ptr [r26+r28*2+0x3b] +XDIS 8da2: MISC BASE D53B8D6C633C lea rbp, ptr [r27+r28*2+0x3c] +XDIS 8da8: MISC BASE D53B8D6C643D lea rbp, ptr [r28+r28*2+0x3d] +XDIS 8dae: MISC BASE D53B8D6C653E lea rbp, ptr [r29+r28*2+0x3e] +XDIS 8db4: MISC BASE D53B8D6C663F lea rbp, ptr [r30+r28*2+0x3f] +XDIS 8dba: MISC BASE D53B8D6C6740 lea rbp, ptr [r31+r28*2+0x40] +XDIS 8dc0: MISC BASE D52A8D6C6822 lea rbp, ptr [rax+r29*2+0x22] +XDIS 8dc6: MISC BASE D52A8D6C6923 lea rbp, ptr [rcx+r29*2+0x23] +XDIS 8dcc: MISC BASE D52A8D6C6A24 lea rbp, ptr [rdx+r29*2+0x24] +XDIS 8dd2: MISC BASE D52A8D6C6B25 lea rbp, ptr [rbx+r29*2+0x25] +XDIS 8dd8: MISC BASE D52A8D6C6C26 lea rbp, ptr [rsp+r29*2+0x26] +XDIS 8dde: MISC BASE D52A8D6C6D27 lea rbp, ptr [rbp+r29*2+0x27] +XDIS 8de4: MISC BASE D52A8D6C6E28 lea rbp, ptr [rsi+r29*2+0x28] +XDIS 8dea: MISC BASE D52A8D6C6F29 lea rbp, ptr [rdi+r29*2+0x29] +XDIS 8df0: MISC BASE D52B8D6C682A lea rbp, ptr [r8+r29*2+0x2a] +XDIS 8df6: MISC BASE D52B8D6C692B lea rbp, ptr [r9+r29*2+0x2b] +XDIS 8dfc: MISC BASE D52B8D6C6A2C lea rbp, ptr [r10+r29*2+0x2c] +XDIS 8e02: MISC BASE D52B8D6C6B2D lea rbp, ptr [r11+r29*2+0x2d] +XDIS 8e08: MISC BASE D52B8D6C6C2E lea rbp, ptr [r12+r29*2+0x2e] +XDIS 8e0e: MISC BASE D52B8D6C6D2F lea rbp, ptr [r13+r29*2+0x2f] +XDIS 8e14: MISC BASE D52B8D6C6E30 lea rbp, ptr [r14+r29*2+0x30] +XDIS 8e1a: MISC BASE D52B8D6C6F31 lea rbp, ptr [r15+r29*2+0x31] +XDIS 8e20: MISC BASE D53A8D6C6832 lea rbp, ptr [r16+r29*2+0x32] +XDIS 8e26: MISC BASE D53A8D6C6933 lea rbp, ptr [r17+r29*2+0x33] +XDIS 8e2c: MISC BASE D53A8D6C6A34 lea rbp, ptr [r18+r29*2+0x34] +XDIS 8e32: MISC BASE D53A8D6C6B35 lea rbp, ptr [r19+r29*2+0x35] +XDIS 8e38: MISC BASE D53A8D6C6C36 lea rbp, ptr [r20+r29*2+0x36] +XDIS 8e3e: MISC BASE D53A8D6C6D37 lea rbp, ptr [r21+r29*2+0x37] +XDIS 8e44: MISC BASE D53A8D6C6E38 lea rbp, ptr [r22+r29*2+0x38] +XDIS 8e4a: MISC BASE D53A8D6C6F39 lea rbp, ptr [r23+r29*2+0x39] +XDIS 8e50: MISC BASE D53B8D6C683A lea rbp, ptr [r24+r29*2+0x3a] +XDIS 8e56: MISC BASE D53B8D6C693B lea rbp, ptr [r25+r29*2+0x3b] +XDIS 8e5c: MISC BASE D53B8D6C6A3C lea rbp, ptr [r26+r29*2+0x3c] +XDIS 8e62: MISC BASE D53B8D6C6B3D lea rbp, ptr [r27+r29*2+0x3d] +XDIS 8e68: MISC BASE D53B8D6C6C3E lea rbp, ptr [r28+r29*2+0x3e] +XDIS 8e6e: MISC BASE D53B8D6C6D3F lea rbp, ptr [r29+r29*2+0x3f] +XDIS 8e74: MISC BASE D53B8D6C6E40 lea rbp, ptr [r30+r29*2+0x40] +XDIS 8e7a: MISC BASE D53B8D6C6F41 lea rbp, ptr [r31+r29*2+0x41] +XDIS 8e80: MISC BASE D52A8D6C7023 lea rbp, ptr [rax+r30*2+0x23] +XDIS 8e86: MISC BASE D52A8D6C7124 lea rbp, ptr [rcx+r30*2+0x24] +XDIS 8e8c: MISC BASE D52A8D6C7225 lea rbp, ptr [rdx+r30*2+0x25] +XDIS 8e92: MISC BASE D52A8D6C7326 lea rbp, ptr [rbx+r30*2+0x26] +XDIS 8e98: MISC BASE D52A8D6C7427 lea rbp, ptr [rsp+r30*2+0x27] +XDIS 8e9e: MISC BASE D52A8D6C7528 lea rbp, ptr [rbp+r30*2+0x28] +XDIS 8ea4: MISC BASE D52A8D6C7629 lea rbp, ptr [rsi+r30*2+0x29] +XDIS 8eaa: MISC BASE D52A8D6C772A lea rbp, ptr [rdi+r30*2+0x2a] +XDIS 8eb0: MISC BASE D52B8D6C702B lea rbp, ptr [r8+r30*2+0x2b] +XDIS 8eb6: MISC BASE D52B8D6C712C lea rbp, ptr [r9+r30*2+0x2c] +XDIS 8ebc: MISC BASE D52B8D6C722D lea rbp, ptr [r10+r30*2+0x2d] +XDIS 8ec2: MISC BASE D52B8D6C732E lea rbp, ptr [r11+r30*2+0x2e] +XDIS 8ec8: MISC BASE D52B8D6C742F lea rbp, ptr [r12+r30*2+0x2f] +XDIS 8ece: MISC BASE D52B8D6C7530 lea rbp, ptr [r13+r30*2+0x30] +XDIS 8ed4: MISC BASE D52B8D6C7631 lea rbp, ptr [r14+r30*2+0x31] +XDIS 8eda: MISC BASE D52B8D6C7732 lea rbp, ptr [r15+r30*2+0x32] +XDIS 8ee0: MISC BASE D53A8D6C7033 lea rbp, ptr [r16+r30*2+0x33] +XDIS 8ee6: MISC BASE D53A8D6C7134 lea rbp, ptr [r17+r30*2+0x34] +XDIS 8eec: MISC BASE D53A8D6C7235 lea rbp, ptr [r18+r30*2+0x35] +XDIS 8ef2: MISC BASE D53A8D6C7336 lea rbp, ptr [r19+r30*2+0x36] +XDIS 8ef8: MISC BASE D53A8D6C7437 lea rbp, ptr [r20+r30*2+0x37] +XDIS 8efe: MISC BASE D53A8D6C7538 lea rbp, ptr [r21+r30*2+0x38] +XDIS 8f04: MISC BASE D53A8D6C7639 lea rbp, ptr [r22+r30*2+0x39] +XDIS 8f0a: MISC BASE D53A8D6C773A lea rbp, ptr [r23+r30*2+0x3a] +XDIS 8f10: MISC BASE D53B8D6C703B lea rbp, ptr [r24+r30*2+0x3b] +XDIS 8f16: MISC BASE D53B8D6C713C lea rbp, ptr [r25+r30*2+0x3c] +XDIS 8f1c: MISC BASE D53B8D6C723D lea rbp, ptr [r26+r30*2+0x3d] +XDIS 8f22: MISC BASE D53B8D6C733E lea rbp, ptr [r27+r30*2+0x3e] +XDIS 8f28: MISC BASE D53B8D6C743F lea rbp, ptr [r28+r30*2+0x3f] +XDIS 8f2e: MISC BASE D53B8D6C7540 lea rbp, ptr [r29+r30*2+0x40] +XDIS 8f34: MISC BASE D53B8D6C7641 lea rbp, ptr [r30+r30*2+0x41] +XDIS 8f3a: MISC BASE D53B8D6C7742 lea rbp, ptr [r31+r30*2+0x42] +XDIS 8f40: MISC BASE D52A8D6C7824 lea rbp, ptr [rax+r31*2+0x24] +XDIS 8f46: MISC BASE D52A8D6C7925 lea rbp, ptr [rcx+r31*2+0x25] +XDIS 8f4c: MISC BASE D52A8D6C7A26 lea rbp, ptr [rdx+r31*2+0x26] +XDIS 8f52: MISC BASE D52A8D6C7B27 lea rbp, ptr [rbx+r31*2+0x27] +XDIS 8f58: MISC BASE D52A8D6C7C28 lea rbp, ptr [rsp+r31*2+0x28] +XDIS 8f5e: MISC BASE D52A8D6C7D29 lea rbp, ptr [rbp+r31*2+0x29] +XDIS 8f64: MISC BASE D52A8D6C7E2A lea rbp, ptr [rsi+r31*2+0x2a] +XDIS 8f6a: MISC BASE D52A8D6C7F2B lea rbp, ptr [rdi+r31*2+0x2b] +XDIS 8f70: MISC BASE D52B8D6C782C lea rbp, ptr [r8+r31*2+0x2c] +XDIS 8f76: MISC BASE D52B8D6C792D lea rbp, ptr [r9+r31*2+0x2d] +XDIS 8f7c: MISC BASE D52B8D6C7A2E lea rbp, ptr [r10+r31*2+0x2e] +XDIS 8f82: MISC BASE D52B8D6C7B2F lea rbp, ptr [r11+r31*2+0x2f] +XDIS 8f88: MISC BASE D52B8D6C7C30 lea rbp, ptr [r12+r31*2+0x30] +XDIS 8f8e: MISC BASE D52B8D6C7D31 lea rbp, ptr [r13+r31*2+0x31] +XDIS 8f94: MISC BASE D52B8D6C7E32 lea rbp, ptr [r14+r31*2+0x32] +XDIS 8f9a: MISC BASE D52B8D6C7F33 lea rbp, ptr [r15+r31*2+0x33] +XDIS 8fa0: MISC BASE D53A8D6C7834 lea rbp, ptr [r16+r31*2+0x34] +XDIS 8fa6: MISC BASE D53A8D6C7935 lea rbp, ptr [r17+r31*2+0x35] +XDIS 8fac: MISC BASE D53A8D6C7A36 lea rbp, ptr [r18+r31*2+0x36] +XDIS 8fb2: MISC BASE D53A8D6C7B37 lea rbp, ptr [r19+r31*2+0x37] +XDIS 8fb8: MISC BASE D53A8D6C7C38 lea rbp, ptr [r20+r31*2+0x38] +XDIS 8fbe: MISC BASE D53A8D6C7D39 lea rbp, ptr [r21+r31*2+0x39] +XDIS 8fc4: MISC BASE D53A8D6C7E3A lea rbp, ptr [r22+r31*2+0x3a] +XDIS 8fca: MISC BASE D53A8D6C7F3B lea rbp, ptr [r23+r31*2+0x3b] +XDIS 8fd0: MISC BASE D53B8D6C783C lea rbp, ptr [r24+r31*2+0x3c] +XDIS 8fd6: MISC BASE D53B8D6C793D lea rbp, ptr [r25+r31*2+0x3d] +XDIS 8fdc: MISC BASE D53B8D6C7A3E lea rbp, ptr [r26+r31*2+0x3e] +XDIS 8fe2: MISC BASE D53B8D6C7B3F lea rbp, ptr [r27+r31*2+0x3f] +XDIS 8fe8: MISC BASE D53B8D6C7C40 lea rbp, ptr [r28+r31*2+0x40] +XDIS 8fee: MISC BASE D53B8D6C7D41 lea rbp, ptr [r29+r31*2+0x41] +XDIS 8ff4: MISC BASE D53B8D6C7E42 lea rbp, ptr [r30+r31*2+0x42] +XDIS 8ffa: MISC BASE D53B8D6C7F43 lea rbp, ptr [r31+r31*2+0x43] +XDIS 9000: MISC BASE D5088D744006 lea rsi, ptr [rax+rax*2+0x6] +XDIS 9006: MISC BASE D5088D744107 lea rsi, ptr [rcx+rax*2+0x7] +XDIS 900c: MISC BASE D5088D744208 lea rsi, ptr [rdx+rax*2+0x8] +XDIS 9012: MISC BASE D5088D744309 lea rsi, ptr [rbx+rax*2+0x9] +XDIS 9018: MISC BASE D5088D74440A lea rsi, ptr [rsp+rax*2+0xa] +XDIS 901e: MISC BASE D5088D74450B lea rsi, ptr [rbp+rax*2+0xb] +XDIS 9024: MISC BASE D5088D74460C lea rsi, ptr [rsi+rax*2+0xc] +XDIS 902a: MISC BASE D5088D74470D lea rsi, ptr [rdi+rax*2+0xd] +XDIS 9030: MISC BASE D5098D74400E lea rsi, ptr [r8+rax*2+0xe] +XDIS 9036: MISC BASE D5098D74410F lea rsi, ptr [r9+rax*2+0xf] +XDIS 903c: MISC BASE D5098D744210 lea rsi, ptr [r10+rax*2+0x10] +XDIS 9042: MISC BASE D5098D744311 lea rsi, ptr [r11+rax*2+0x11] +XDIS 9048: MISC BASE D5098D744412 lea rsi, ptr [r12+rax*2+0x12] +XDIS 904e: MISC BASE D5098D744513 lea rsi, ptr [r13+rax*2+0x13] +XDIS 9054: MISC BASE D5098D744614 lea rsi, ptr [r14+rax*2+0x14] +XDIS 905a: MISC BASE D5098D744715 lea rsi, ptr [r15+rax*2+0x15] +XDIS 9060: MISC BASE D5188D744016 lea rsi, ptr [r16+rax*2+0x16] +XDIS 9066: MISC BASE D5188D744117 lea rsi, ptr [r17+rax*2+0x17] +XDIS 906c: MISC BASE D5188D744218 lea rsi, ptr [r18+rax*2+0x18] +XDIS 9072: MISC BASE D5188D744319 lea rsi, ptr [r19+rax*2+0x19] +XDIS 9078: MISC BASE D5188D74441A lea rsi, ptr [r20+rax*2+0x1a] +XDIS 907e: MISC BASE D5188D74451B lea rsi, ptr [r21+rax*2+0x1b] +XDIS 9084: MISC BASE D5188D74461C lea rsi, ptr [r22+rax*2+0x1c] +XDIS 908a: MISC BASE D5188D74471D lea rsi, ptr [r23+rax*2+0x1d] +XDIS 9090: MISC BASE D5198D74401E lea rsi, ptr [r24+rax*2+0x1e] +XDIS 9096: MISC BASE D5198D74411F lea rsi, ptr [r25+rax*2+0x1f] +XDIS 909c: MISC BASE D5198D744220 lea rsi, ptr [r26+rax*2+0x20] +XDIS 90a2: MISC BASE D5198D744321 lea rsi, ptr [r27+rax*2+0x21] +XDIS 90a8: MISC BASE D5198D744422 lea rsi, ptr [r28+rax*2+0x22] +XDIS 90ae: MISC BASE D5198D744523 lea rsi, ptr [r29+rax*2+0x23] +XDIS 90b4: MISC BASE D5198D744624 lea rsi, ptr [r30+rax*2+0x24] +XDIS 90ba: MISC BASE D5198D744725 lea rsi, ptr [r31+rax*2+0x25] +XDIS 90c0: MISC BASE D5088D744807 lea rsi, ptr [rax+rcx*2+0x7] +XDIS 90c6: MISC BASE D5088D744908 lea rsi, ptr [rcx+rcx*2+0x8] +XDIS 90cc: MISC BASE D5088D744A09 lea rsi, ptr [rdx+rcx*2+0x9] +XDIS 90d2: MISC BASE D5088D744B0A lea rsi, ptr [rbx+rcx*2+0xa] +XDIS 90d8: MISC BASE D5088D744C0B lea rsi, ptr [rsp+rcx*2+0xb] +XDIS 90de: MISC BASE D5088D744D0C lea rsi, ptr [rbp+rcx*2+0xc] +XDIS 90e4: MISC BASE D5088D744E0D lea rsi, ptr [rsi+rcx*2+0xd] +XDIS 90ea: MISC BASE D5088D744F0E lea rsi, ptr [rdi+rcx*2+0xe] +XDIS 90f0: MISC BASE D5098D74480F lea rsi, ptr [r8+rcx*2+0xf] +XDIS 90f6: MISC BASE D5098D744910 lea rsi, ptr [r9+rcx*2+0x10] +XDIS 90fc: MISC BASE D5098D744A11 lea rsi, ptr [r10+rcx*2+0x11] +XDIS 9102: MISC BASE D5098D744B12 lea rsi, ptr [r11+rcx*2+0x12] +XDIS 9108: MISC BASE D5098D744C13 lea rsi, ptr [r12+rcx*2+0x13] +XDIS 910e: MISC BASE D5098D744D14 lea rsi, ptr [r13+rcx*2+0x14] +XDIS 9114: MISC BASE D5098D744E15 lea rsi, ptr [r14+rcx*2+0x15] +XDIS 911a: MISC BASE D5098D744F16 lea rsi, ptr [r15+rcx*2+0x16] +XDIS 9120: MISC BASE D5188D744817 lea rsi, ptr [r16+rcx*2+0x17] +XDIS 9126: MISC BASE D5188D744918 lea rsi, ptr [r17+rcx*2+0x18] +XDIS 912c: MISC BASE D5188D744A19 lea rsi, ptr [r18+rcx*2+0x19] +XDIS 9132: MISC BASE D5188D744B1A lea rsi, ptr [r19+rcx*2+0x1a] +XDIS 9138: MISC BASE D5188D744C1B lea rsi, ptr [r20+rcx*2+0x1b] +XDIS 913e: MISC BASE D5188D744D1C lea rsi, ptr [r21+rcx*2+0x1c] +XDIS 9144: MISC BASE D5188D744E1D lea rsi, ptr [r22+rcx*2+0x1d] +XDIS 914a: MISC BASE D5188D744F1E lea rsi, ptr [r23+rcx*2+0x1e] +XDIS 9150: MISC BASE D5198D74481F lea rsi, ptr [r24+rcx*2+0x1f] +XDIS 9156: MISC BASE D5198D744920 lea rsi, ptr [r25+rcx*2+0x20] +XDIS 915c: MISC BASE D5198D744A21 lea rsi, ptr [r26+rcx*2+0x21] +XDIS 9162: MISC BASE D5198D744B22 lea rsi, ptr [r27+rcx*2+0x22] +XDIS 9168: MISC BASE D5198D744C23 lea rsi, ptr [r28+rcx*2+0x23] +XDIS 916e: MISC BASE D5198D744D24 lea rsi, ptr [r29+rcx*2+0x24] +XDIS 9174: MISC BASE D5198D744E25 lea rsi, ptr [r30+rcx*2+0x25] +XDIS 917a: MISC BASE D5198D744F26 lea rsi, ptr [r31+rcx*2+0x26] +XDIS 9180: MISC BASE D5088D745008 lea rsi, ptr [rax+rdx*2+0x8] +XDIS 9186: MISC BASE D5088D745109 lea rsi, ptr [rcx+rdx*2+0x9] +XDIS 918c: MISC BASE D5088D74520A lea rsi, ptr [rdx+rdx*2+0xa] +XDIS 9192: MISC BASE D5088D74530B lea rsi, ptr [rbx+rdx*2+0xb] +XDIS 9198: MISC BASE D5088D74540C lea rsi, ptr [rsp+rdx*2+0xc] +XDIS 919e: MISC BASE D5088D74550D lea rsi, ptr [rbp+rdx*2+0xd] +XDIS 91a4: MISC BASE D5088D74560E lea rsi, ptr [rsi+rdx*2+0xe] +XDIS 91aa: MISC BASE D5088D74570F lea rsi, ptr [rdi+rdx*2+0xf] +XDIS 91b0: MISC BASE D5098D745010 lea rsi, ptr [r8+rdx*2+0x10] +XDIS 91b6: MISC BASE D5098D745111 lea rsi, ptr [r9+rdx*2+0x11] +XDIS 91bc: MISC BASE D5098D745212 lea rsi, ptr [r10+rdx*2+0x12] +XDIS 91c2: MISC BASE D5098D745313 lea rsi, ptr [r11+rdx*2+0x13] +XDIS 91c8: MISC BASE D5098D745414 lea rsi, ptr [r12+rdx*2+0x14] +XDIS 91ce: MISC BASE D5098D745515 lea rsi, ptr [r13+rdx*2+0x15] +XDIS 91d4: MISC BASE D5098D745616 lea rsi, ptr [r14+rdx*2+0x16] +XDIS 91da: MISC BASE D5098D745717 lea rsi, ptr [r15+rdx*2+0x17] +XDIS 91e0: MISC BASE D5188D745018 lea rsi, ptr [r16+rdx*2+0x18] +XDIS 91e6: MISC BASE D5188D745119 lea rsi, ptr [r17+rdx*2+0x19] +XDIS 91ec: MISC BASE D5188D74521A lea rsi, ptr [r18+rdx*2+0x1a] +XDIS 91f2: MISC BASE D5188D74531B lea rsi, ptr [r19+rdx*2+0x1b] +XDIS 91f8: MISC BASE D5188D74541C lea rsi, ptr [r20+rdx*2+0x1c] +XDIS 91fe: MISC BASE D5188D74551D lea rsi, ptr [r21+rdx*2+0x1d] +XDIS 9204: MISC BASE D5188D74561E lea rsi, ptr [r22+rdx*2+0x1e] +XDIS 920a: MISC BASE D5188D74571F lea rsi, ptr [r23+rdx*2+0x1f] +XDIS 9210: MISC BASE D5198D745020 lea rsi, ptr [r24+rdx*2+0x20] +XDIS 9216: MISC BASE D5198D745121 lea rsi, ptr [r25+rdx*2+0x21] +XDIS 921c: MISC BASE D5198D745222 lea rsi, ptr [r26+rdx*2+0x22] +XDIS 9222: MISC BASE D5198D745323 lea rsi, ptr [r27+rdx*2+0x23] +XDIS 9228: MISC BASE D5198D745424 lea rsi, ptr [r28+rdx*2+0x24] +XDIS 922e: MISC BASE D5198D745525 lea rsi, ptr [r29+rdx*2+0x25] +XDIS 9234: MISC BASE D5198D745626 lea rsi, ptr [r30+rdx*2+0x26] +XDIS 923a: MISC BASE D5198D745727 lea rsi, ptr [r31+rdx*2+0x27] +XDIS 9240: MISC BASE D5088D745809 lea rsi, ptr [rax+rbx*2+0x9] +XDIS 9246: MISC BASE D5088D74590A lea rsi, ptr [rcx+rbx*2+0xa] +XDIS 924c: MISC BASE D5088D745A0B lea rsi, ptr [rdx+rbx*2+0xb] +XDIS 9252: MISC BASE D5088D745B0C lea rsi, ptr [rbx+rbx*2+0xc] +XDIS 9258: MISC BASE D5088D745C0D lea rsi, ptr [rsp+rbx*2+0xd] +XDIS 925e: MISC BASE D5088D745D0E lea rsi, ptr [rbp+rbx*2+0xe] +XDIS 9264: MISC BASE D5088D745E0F lea rsi, ptr [rsi+rbx*2+0xf] +XDIS 926a: MISC BASE D5088D745F10 lea rsi, ptr [rdi+rbx*2+0x10] +XDIS 9270: MISC BASE D5098D745811 lea rsi, ptr [r8+rbx*2+0x11] +XDIS 9276: MISC BASE D5098D745912 lea rsi, ptr [r9+rbx*2+0x12] +XDIS 927c: MISC BASE D5098D745A13 lea rsi, ptr [r10+rbx*2+0x13] +XDIS 9282: MISC BASE D5098D745B14 lea rsi, ptr [r11+rbx*2+0x14] +XDIS 9288: MISC BASE D5098D745C15 lea rsi, ptr [r12+rbx*2+0x15] +XDIS 928e: MISC BASE D5098D745D16 lea rsi, ptr [r13+rbx*2+0x16] +XDIS 9294: MISC BASE D5098D745E17 lea rsi, ptr [r14+rbx*2+0x17] +XDIS 929a: MISC BASE D5098D745F18 lea rsi, ptr [r15+rbx*2+0x18] +XDIS 92a0: MISC BASE D5188D745819 lea rsi, ptr [r16+rbx*2+0x19] +XDIS 92a6: MISC BASE D5188D74591A lea rsi, ptr [r17+rbx*2+0x1a] +XDIS 92ac: MISC BASE D5188D745A1B lea rsi, ptr [r18+rbx*2+0x1b] +XDIS 92b2: MISC BASE D5188D745B1C lea rsi, ptr [r19+rbx*2+0x1c] +XDIS 92b8: MISC BASE D5188D745C1D lea rsi, ptr [r20+rbx*2+0x1d] +XDIS 92be: MISC BASE D5188D745D1E lea rsi, ptr [r21+rbx*2+0x1e] +XDIS 92c4: MISC BASE D5188D745E1F lea rsi, ptr [r22+rbx*2+0x1f] +XDIS 92ca: MISC BASE D5188D745F20 lea rsi, ptr [r23+rbx*2+0x20] +XDIS 92d0: MISC BASE D5198D745821 lea rsi, ptr [r24+rbx*2+0x21] +XDIS 92d6: MISC BASE D5198D745922 lea rsi, ptr [r25+rbx*2+0x22] +XDIS 92dc: MISC BASE D5198D745A23 lea rsi, ptr [r26+rbx*2+0x23] +XDIS 92e2: MISC BASE D5198D745B24 lea rsi, ptr [r27+rbx*2+0x24] +XDIS 92e8: MISC BASE D5198D745C25 lea rsi, ptr [r28+rbx*2+0x25] +XDIS 92ee: MISC BASE D5198D745D26 lea rsi, ptr [r29+rbx*2+0x26] +XDIS 92f4: MISC BASE D5198D745E27 lea rsi, ptr [r30+rbx*2+0x27] +XDIS 92fa: MISC BASE D5198D745F28 lea rsi, ptr [r31+rbx*2+0x28] +XDIS 9300: MISC BASE D5088D74600A lea rsi, ptr [rax+0xa] +XDIS 9306: MISC BASE D5088D74610B lea rsi, ptr [rcx+0xb] +XDIS 930c: MISC BASE D5088D74620C lea rsi, ptr [rdx+0xc] +XDIS 9312: MISC BASE D5088D74630D lea rsi, ptr [rbx+0xd] +XDIS 9318: MISC BASE D5088D74640E lea rsi, ptr [rsp+0xe] +XDIS 931e: MISC BASE D5088D74650F lea rsi, ptr [rbp+0xf] +XDIS 9324: MISC BASE D5088D746610 lea rsi, ptr [rsi+0x10] +XDIS 932a: MISC BASE D5088D746711 lea rsi, ptr [rdi+0x11] +XDIS 9330: MISC BASE D5098D746012 lea rsi, ptr [r8+0x12] +XDIS 9336: MISC BASE D5098D746113 lea rsi, ptr [r9+0x13] +XDIS 933c: MISC BASE D5098D746214 lea rsi, ptr [r10+0x14] +XDIS 9342: MISC BASE D5098D746315 lea rsi, ptr [r11+0x15] +XDIS 9348: MISC BASE D5098D746416 lea rsi, ptr [r12+0x16] +XDIS 934e: MISC BASE D5098D746517 lea rsi, ptr [r13+0x17] +XDIS 9354: MISC BASE D5098D746618 lea rsi, ptr [r14+0x18] +XDIS 935a: MISC BASE D5098D746719 lea rsi, ptr [r15+0x19] +XDIS 9360: MISC BASE D5188D74601A lea rsi, ptr [r16+0x1a] +XDIS 9366: MISC BASE D5188D74611B lea rsi, ptr [r17+0x1b] +XDIS 936c: MISC BASE D5188D74621C lea rsi, ptr [r18+0x1c] +XDIS 9372: MISC BASE D5188D74631D lea rsi, ptr [r19+0x1d] +XDIS 9378: MISC BASE D5188D74641E lea rsi, ptr [r20+0x1e] +XDIS 937e: MISC BASE D5188D74651F lea rsi, ptr [r21+0x1f] +XDIS 9384: MISC BASE D5188D746620 lea rsi, ptr [r22+0x20] +XDIS 938a: MISC BASE D5188D746721 lea rsi, ptr [r23+0x21] +XDIS 9390: MISC BASE D5198D746022 lea rsi, ptr [r24+0x22] +XDIS 9396: MISC BASE D5198D746123 lea rsi, ptr [r25+0x23] +XDIS 939c: MISC BASE D5198D746224 lea rsi, ptr [r26+0x24] +XDIS 93a2: MISC BASE D5198D746325 lea rsi, ptr [r27+0x25] +XDIS 93a8: MISC BASE D5198D746426 lea rsi, ptr [r28+0x26] +XDIS 93ae: MISC BASE D5198D746527 lea rsi, ptr [r29+0x27] +XDIS 93b4: MISC BASE D5198D746628 lea rsi, ptr [r30+0x28] +XDIS 93ba: MISC BASE D5198D746729 lea rsi, ptr [r31+0x29] +XDIS 93c0: MISC BASE D5088D74680B lea rsi, ptr [rax+rbp*2+0xb] +XDIS 93c6: MISC BASE D5088D74690C lea rsi, ptr [rcx+rbp*2+0xc] +XDIS 93cc: MISC BASE D5088D746A0D lea rsi, ptr [rdx+rbp*2+0xd] +XDIS 93d2: MISC BASE D5088D746B0E lea rsi, ptr [rbx+rbp*2+0xe] +XDIS 93d8: MISC BASE D5088D746C0F lea rsi, ptr [rsp+rbp*2+0xf] +XDIS 93de: MISC BASE D5088D746D10 lea rsi, ptr [rbp+rbp*2+0x10] +XDIS 93e4: MISC BASE D5088D746E11 lea rsi, ptr [rsi+rbp*2+0x11] +XDIS 93ea: MISC BASE D5088D746F12 lea rsi, ptr [rdi+rbp*2+0x12] +XDIS 93f0: MISC BASE D5098D746813 lea rsi, ptr [r8+rbp*2+0x13] +XDIS 93f6: MISC BASE D5098D746914 lea rsi, ptr [r9+rbp*2+0x14] +XDIS 93fc: MISC BASE D5098D746A15 lea rsi, ptr [r10+rbp*2+0x15] +XDIS 9402: MISC BASE D5098D746B16 lea rsi, ptr [r11+rbp*2+0x16] +XDIS 9408: MISC BASE D5098D746C17 lea rsi, ptr [r12+rbp*2+0x17] +XDIS 940e: MISC BASE D5098D746D18 lea rsi, ptr [r13+rbp*2+0x18] +XDIS 9414: MISC BASE D5098D746E19 lea rsi, ptr [r14+rbp*2+0x19] +XDIS 941a: MISC BASE D5098D746F1A lea rsi, ptr [r15+rbp*2+0x1a] +XDIS 9420: MISC BASE D5188D74681B lea rsi, ptr [r16+rbp*2+0x1b] +XDIS 9426: MISC BASE D5188D74691C lea rsi, ptr [r17+rbp*2+0x1c] +XDIS 942c: MISC BASE D5188D746A1D lea rsi, ptr [r18+rbp*2+0x1d] +XDIS 9432: MISC BASE D5188D746B1E lea rsi, ptr [r19+rbp*2+0x1e] +XDIS 9438: MISC BASE D5188D746C1F lea rsi, ptr [r20+rbp*2+0x1f] +XDIS 943e: MISC BASE D5188D746D20 lea rsi, ptr [r21+rbp*2+0x20] +XDIS 9444: MISC BASE D5188D746E21 lea rsi, ptr [r22+rbp*2+0x21] +XDIS 944a: MISC BASE D5188D746F22 lea rsi, ptr [r23+rbp*2+0x22] +XDIS 9450: MISC BASE D5198D746823 lea rsi, ptr [r24+rbp*2+0x23] +XDIS 9456: MISC BASE D5198D746924 lea rsi, ptr [r25+rbp*2+0x24] +XDIS 945c: MISC BASE D5198D746A25 lea rsi, ptr [r26+rbp*2+0x25] +XDIS 9462: MISC BASE D5198D746B26 lea rsi, ptr [r27+rbp*2+0x26] +XDIS 9468: MISC BASE D5198D746C27 lea rsi, ptr [r28+rbp*2+0x27] +XDIS 946e: MISC BASE D5198D746D28 lea rsi, ptr [r29+rbp*2+0x28] +XDIS 9474: MISC BASE D5198D746E29 lea rsi, ptr [r30+rbp*2+0x29] +XDIS 947a: MISC BASE D5198D746F2A lea rsi, ptr [r31+rbp*2+0x2a] +XDIS 9480: MISC BASE D5088D74700C lea rsi, ptr [rax+rsi*2+0xc] +XDIS 9486: MISC BASE D5088D74710D lea rsi, ptr [rcx+rsi*2+0xd] +XDIS 948c: MISC BASE D5088D74720E lea rsi, ptr [rdx+rsi*2+0xe] +XDIS 9492: MISC BASE D5088D74730F lea rsi, ptr [rbx+rsi*2+0xf] +XDIS 9498: MISC BASE D5088D747410 lea rsi, ptr [rsp+rsi*2+0x10] +XDIS 949e: MISC BASE D5088D747511 lea rsi, ptr [rbp+rsi*2+0x11] +XDIS 94a4: MISC BASE D5088D747612 lea rsi, ptr [rsi+rsi*2+0x12] +XDIS 94aa: MISC BASE D5088D747713 lea rsi, ptr [rdi+rsi*2+0x13] +XDIS 94b0: MISC BASE D5098D747014 lea rsi, ptr [r8+rsi*2+0x14] +XDIS 94b6: MISC BASE D5098D747115 lea rsi, ptr [r9+rsi*2+0x15] +XDIS 94bc: MISC BASE D5098D747216 lea rsi, ptr [r10+rsi*2+0x16] +XDIS 94c2: MISC BASE D5098D747317 lea rsi, ptr [r11+rsi*2+0x17] +XDIS 94c8: MISC BASE D5098D747418 lea rsi, ptr [r12+rsi*2+0x18] +XDIS 94ce: MISC BASE D5098D747519 lea rsi, ptr [r13+rsi*2+0x19] +XDIS 94d4: MISC BASE D5098D74761A lea rsi, ptr [r14+rsi*2+0x1a] +XDIS 94da: MISC BASE D5098D74771B lea rsi, ptr [r15+rsi*2+0x1b] +XDIS 94e0: MISC BASE D5188D74701C lea rsi, ptr [r16+rsi*2+0x1c] +XDIS 94e6: MISC BASE D5188D74711D lea rsi, ptr [r17+rsi*2+0x1d] +XDIS 94ec: MISC BASE D5188D74721E lea rsi, ptr [r18+rsi*2+0x1e] +XDIS 94f2: MISC BASE D5188D74731F lea rsi, ptr [r19+rsi*2+0x1f] +XDIS 94f8: MISC BASE D5188D747420 lea rsi, ptr [r20+rsi*2+0x20] +XDIS 94fe: MISC BASE D5188D747521 lea rsi, ptr [r21+rsi*2+0x21] +XDIS 9504: MISC BASE D5188D747622 lea rsi, ptr [r22+rsi*2+0x22] +XDIS 950a: MISC BASE D5188D747723 lea rsi, ptr [r23+rsi*2+0x23] +XDIS 9510: MISC BASE D5198D747024 lea rsi, ptr [r24+rsi*2+0x24] +XDIS 9516: MISC BASE D5198D747125 lea rsi, ptr [r25+rsi*2+0x25] +XDIS 951c: MISC BASE D5198D747226 lea rsi, ptr [r26+rsi*2+0x26] +XDIS 9522: MISC BASE D5198D747327 lea rsi, ptr [r27+rsi*2+0x27] +XDIS 9528: MISC BASE D5198D747428 lea rsi, ptr [r28+rsi*2+0x28] +XDIS 952e: MISC BASE D5198D747529 lea rsi, ptr [r29+rsi*2+0x29] +XDIS 9534: MISC BASE D5198D74762A lea rsi, ptr [r30+rsi*2+0x2a] +XDIS 953a: MISC BASE D5198D74772B lea rsi, ptr [r31+rsi*2+0x2b] +XDIS 9540: MISC BASE D5088D74780D lea rsi, ptr [rax+rdi*2+0xd] +XDIS 9546: MISC BASE D5088D74790E lea rsi, ptr [rcx+rdi*2+0xe] +XDIS 954c: MISC BASE D5088D747A0F lea rsi, ptr [rdx+rdi*2+0xf] +XDIS 9552: MISC BASE D5088D747B10 lea rsi, ptr [rbx+rdi*2+0x10] +XDIS 9558: MISC BASE D5088D747C11 lea rsi, ptr [rsp+rdi*2+0x11] +XDIS 955e: MISC BASE D5088D747D12 lea rsi, ptr [rbp+rdi*2+0x12] +XDIS 9564: MISC BASE D5088D747E13 lea rsi, ptr [rsi+rdi*2+0x13] +XDIS 956a: MISC BASE D5088D747F14 lea rsi, ptr [rdi+rdi*2+0x14] +XDIS 9570: MISC BASE D5098D747815 lea rsi, ptr [r8+rdi*2+0x15] +XDIS 9576: MISC BASE D5098D747916 lea rsi, ptr [r9+rdi*2+0x16] +XDIS 957c: MISC BASE D5098D747A17 lea rsi, ptr [r10+rdi*2+0x17] +XDIS 9582: MISC BASE D5098D747B18 lea rsi, ptr [r11+rdi*2+0x18] +XDIS 9588: MISC BASE D5098D747C19 lea rsi, ptr [r12+rdi*2+0x19] +XDIS 958e: MISC BASE D5098D747D1A lea rsi, ptr [r13+rdi*2+0x1a] +XDIS 9594: MISC BASE D5098D747E1B lea rsi, ptr [r14+rdi*2+0x1b] +XDIS 959a: MISC BASE D5098D747F1C lea rsi, ptr [r15+rdi*2+0x1c] +XDIS 95a0: MISC BASE D5188D74781D lea rsi, ptr [r16+rdi*2+0x1d] +XDIS 95a6: MISC BASE D5188D74791E lea rsi, ptr [r17+rdi*2+0x1e] +XDIS 95ac: MISC BASE D5188D747A1F lea rsi, ptr [r18+rdi*2+0x1f] +XDIS 95b2: MISC BASE D5188D747B20 lea rsi, ptr [r19+rdi*2+0x20] +XDIS 95b8: MISC BASE D5188D747C21 lea rsi, ptr [r20+rdi*2+0x21] +XDIS 95be: MISC BASE D5188D747D22 lea rsi, ptr [r21+rdi*2+0x22] +XDIS 95c4: MISC BASE D5188D747E23 lea rsi, ptr [r22+rdi*2+0x23] +XDIS 95ca: MISC BASE D5188D747F24 lea rsi, ptr [r23+rdi*2+0x24] +XDIS 95d0: MISC BASE D5198D747825 lea rsi, ptr [r24+rdi*2+0x25] +XDIS 95d6: MISC BASE D5198D747926 lea rsi, ptr [r25+rdi*2+0x26] +XDIS 95dc: MISC BASE D5198D747A27 lea rsi, ptr [r26+rdi*2+0x27] +XDIS 95e2: MISC BASE D5198D747B28 lea rsi, ptr [r27+rdi*2+0x28] +XDIS 95e8: MISC BASE D5198D747C29 lea rsi, ptr [r28+rdi*2+0x29] +XDIS 95ee: MISC BASE D5198D747D2A lea rsi, ptr [r29+rdi*2+0x2a] +XDIS 95f4: MISC BASE D5198D747E2B lea rsi, ptr [r30+rdi*2+0x2b] +XDIS 95fa: MISC BASE D5198D747F2C lea rsi, ptr [r31+rdi*2+0x2c] +XDIS 9600: MISC BASE D50A8D74400E lea rsi, ptr [rax+r8*2+0xe] +XDIS 9606: MISC BASE D50A8D74410F lea rsi, ptr [rcx+r8*2+0xf] +XDIS 960c: MISC BASE D50A8D744210 lea rsi, ptr [rdx+r8*2+0x10] +XDIS 9612: MISC BASE D50A8D744311 lea rsi, ptr [rbx+r8*2+0x11] +XDIS 9618: MISC BASE D50A8D744412 lea rsi, ptr [rsp+r8*2+0x12] +XDIS 961e: MISC BASE D50A8D744513 lea rsi, ptr [rbp+r8*2+0x13] +XDIS 9624: MISC BASE D50A8D744614 lea rsi, ptr [rsi+r8*2+0x14] +XDIS 962a: MISC BASE D50A8D744715 lea rsi, ptr [rdi+r8*2+0x15] +XDIS 9630: MISC BASE D50B8D744016 lea rsi, ptr [r8+r8*2+0x16] +XDIS 9636: MISC BASE D50B8D744117 lea rsi, ptr [r9+r8*2+0x17] +XDIS 963c: MISC BASE D50B8D744218 lea rsi, ptr [r10+r8*2+0x18] +XDIS 9642: MISC BASE D50B8D744319 lea rsi, ptr [r11+r8*2+0x19] +XDIS 9648: MISC BASE D50B8D74441A lea rsi, ptr [r12+r8*2+0x1a] +XDIS 964e: MISC BASE D50B8D74451B lea rsi, ptr [r13+r8*2+0x1b] +XDIS 9654: MISC BASE D50B8D74461C lea rsi, ptr [r14+r8*2+0x1c] +XDIS 965a: MISC BASE D50B8D74471D lea rsi, ptr [r15+r8*2+0x1d] +XDIS 9660: MISC BASE D51A8D74401E lea rsi, ptr [r16+r8*2+0x1e] +XDIS 9666: MISC BASE D51A8D74411F lea rsi, ptr [r17+r8*2+0x1f] +XDIS 966c: MISC BASE D51A8D744220 lea rsi, ptr [r18+r8*2+0x20] +XDIS 9672: MISC BASE D51A8D744321 lea rsi, ptr [r19+r8*2+0x21] +XDIS 9678: MISC BASE D51A8D744422 lea rsi, ptr [r20+r8*2+0x22] +XDIS 967e: MISC BASE D51A8D744523 lea rsi, ptr [r21+r8*2+0x23] +XDIS 9684: MISC BASE D51A8D744624 lea rsi, ptr [r22+r8*2+0x24] +XDIS 968a: MISC BASE D51A8D744725 lea rsi, ptr [r23+r8*2+0x25] +XDIS 9690: MISC BASE D51B8D744026 lea rsi, ptr [r24+r8*2+0x26] +XDIS 9696: MISC BASE D51B8D744127 lea rsi, ptr [r25+r8*2+0x27] +XDIS 969c: MISC BASE D51B8D744228 lea rsi, ptr [r26+r8*2+0x28] +XDIS 96a2: MISC BASE D51B8D744329 lea rsi, ptr [r27+r8*2+0x29] +XDIS 96a8: MISC BASE D51B8D74442A lea rsi, ptr [r28+r8*2+0x2a] +XDIS 96ae: MISC BASE D51B8D74452B lea rsi, ptr [r29+r8*2+0x2b] +XDIS 96b4: MISC BASE D51B8D74462C lea rsi, ptr [r30+r8*2+0x2c] +XDIS 96ba: MISC BASE D51B8D74472D lea rsi, ptr [r31+r8*2+0x2d] +XDIS 96c0: MISC BASE D50A8D74480F lea rsi, ptr [rax+r9*2+0xf] +XDIS 96c6: MISC BASE D50A8D744910 lea rsi, ptr [rcx+r9*2+0x10] +XDIS 96cc: MISC BASE D50A8D744A11 lea rsi, ptr [rdx+r9*2+0x11] +XDIS 96d2: MISC BASE D50A8D744B12 lea rsi, ptr [rbx+r9*2+0x12] +XDIS 96d8: MISC BASE D50A8D744C13 lea rsi, ptr [rsp+r9*2+0x13] +XDIS 96de: MISC BASE D50A8D744D14 lea rsi, ptr [rbp+r9*2+0x14] +XDIS 96e4: MISC BASE D50A8D744E15 lea rsi, ptr [rsi+r9*2+0x15] +XDIS 96ea: MISC BASE D50A8D744F16 lea rsi, ptr [rdi+r9*2+0x16] +XDIS 96f0: MISC BASE D50B8D744817 lea rsi, ptr [r8+r9*2+0x17] +XDIS 96f6: MISC BASE D50B8D744918 lea rsi, ptr [r9+r9*2+0x18] +XDIS 96fc: MISC BASE D50B8D744A19 lea rsi, ptr [r10+r9*2+0x19] +XDIS 9702: MISC BASE D50B8D744B1A lea rsi, ptr [r11+r9*2+0x1a] +XDIS 9708: MISC BASE D50B8D744C1B lea rsi, ptr [r12+r9*2+0x1b] +XDIS 970e: MISC BASE D50B8D744D1C lea rsi, ptr [r13+r9*2+0x1c] +XDIS 9714: MISC BASE D50B8D744E1D lea rsi, ptr [r14+r9*2+0x1d] +XDIS 971a: MISC BASE D50B8D744F1E lea rsi, ptr [r15+r9*2+0x1e] +XDIS 9720: MISC BASE D51A8D74481F lea rsi, ptr [r16+r9*2+0x1f] +XDIS 9726: MISC BASE D51A8D744920 lea rsi, ptr [r17+r9*2+0x20] +XDIS 972c: MISC BASE D51A8D744A21 lea rsi, ptr [r18+r9*2+0x21] +XDIS 9732: MISC BASE D51A8D744B22 lea rsi, ptr [r19+r9*2+0x22] +XDIS 9738: MISC BASE D51A8D744C23 lea rsi, ptr [r20+r9*2+0x23] +XDIS 973e: MISC BASE D51A8D744D24 lea rsi, ptr [r21+r9*2+0x24] +XDIS 9744: MISC BASE D51A8D744E25 lea rsi, ptr [r22+r9*2+0x25] +XDIS 974a: MISC BASE D51A8D744F26 lea rsi, ptr [r23+r9*2+0x26] +XDIS 9750: MISC BASE D51B8D744827 lea rsi, ptr [r24+r9*2+0x27] +XDIS 9756: MISC BASE D51B8D744928 lea rsi, ptr [r25+r9*2+0x28] +XDIS 975c: MISC BASE D51B8D744A29 lea rsi, ptr [r26+r9*2+0x29] +XDIS 9762: MISC BASE D51B8D744B2A lea rsi, ptr [r27+r9*2+0x2a] +XDIS 9768: MISC BASE D51B8D744C2B lea rsi, ptr [r28+r9*2+0x2b] +XDIS 976e: MISC BASE D51B8D744D2C lea rsi, ptr [r29+r9*2+0x2c] +XDIS 9774: MISC BASE D51B8D744E2D lea rsi, ptr [r30+r9*2+0x2d] +XDIS 977a: MISC BASE D51B8D744F2E lea rsi, ptr [r31+r9*2+0x2e] +XDIS 9780: MISC BASE D50A8D745010 lea rsi, ptr [rax+r10*2+0x10] +XDIS 9786: MISC BASE D50A8D745111 lea rsi, ptr [rcx+r10*2+0x11] +XDIS 978c: MISC BASE D50A8D745212 lea rsi, ptr [rdx+r10*2+0x12] +XDIS 9792: MISC BASE D50A8D745313 lea rsi, ptr [rbx+r10*2+0x13] +XDIS 9798: MISC BASE D50A8D745414 lea rsi, ptr [rsp+r10*2+0x14] +XDIS 979e: MISC BASE D50A8D745515 lea rsi, ptr [rbp+r10*2+0x15] +XDIS 97a4: MISC BASE D50A8D745616 lea rsi, ptr [rsi+r10*2+0x16] +XDIS 97aa: MISC BASE D50A8D745717 lea rsi, ptr [rdi+r10*2+0x17] +XDIS 97b0: MISC BASE D50B8D745018 lea rsi, ptr [r8+r10*2+0x18] +XDIS 97b6: MISC BASE D50B8D745119 lea rsi, ptr [r9+r10*2+0x19] +XDIS 97bc: MISC BASE D50B8D74521A lea rsi, ptr [r10+r10*2+0x1a] +XDIS 97c2: MISC BASE D50B8D74531B lea rsi, ptr [r11+r10*2+0x1b] +XDIS 97c8: MISC BASE D50B8D74541C lea rsi, ptr [r12+r10*2+0x1c] +XDIS 97ce: MISC BASE D50B8D74551D lea rsi, ptr [r13+r10*2+0x1d] +XDIS 97d4: MISC BASE D50B8D74561E lea rsi, ptr [r14+r10*2+0x1e] +XDIS 97da: MISC BASE D50B8D74571F lea rsi, ptr [r15+r10*2+0x1f] +XDIS 97e0: MISC BASE D51A8D745020 lea rsi, ptr [r16+r10*2+0x20] +XDIS 97e6: MISC BASE D51A8D745121 lea rsi, ptr [r17+r10*2+0x21] +XDIS 97ec: MISC BASE D51A8D745222 lea rsi, ptr [r18+r10*2+0x22] +XDIS 97f2: MISC BASE D51A8D745323 lea rsi, ptr [r19+r10*2+0x23] +XDIS 97f8: MISC BASE D51A8D745424 lea rsi, ptr [r20+r10*2+0x24] +XDIS 97fe: MISC BASE D51A8D745525 lea rsi, ptr [r21+r10*2+0x25] +XDIS 9804: MISC BASE D51A8D745626 lea rsi, ptr [r22+r10*2+0x26] +XDIS 980a: MISC BASE D51A8D745727 lea rsi, ptr [r23+r10*2+0x27] +XDIS 9810: MISC BASE D51B8D745028 lea rsi, ptr [r24+r10*2+0x28] +XDIS 9816: MISC BASE D51B8D745129 lea rsi, ptr [r25+r10*2+0x29] +XDIS 981c: MISC BASE D51B8D74522A lea rsi, ptr [r26+r10*2+0x2a] +XDIS 9822: MISC BASE D51B8D74532B lea rsi, ptr [r27+r10*2+0x2b] +XDIS 9828: MISC BASE D51B8D74542C lea rsi, ptr [r28+r10*2+0x2c] +XDIS 982e: MISC BASE D51B8D74552D lea rsi, ptr [r29+r10*2+0x2d] +XDIS 9834: MISC BASE D51B8D74562E lea rsi, ptr [r30+r10*2+0x2e] +XDIS 983a: MISC BASE D51B8D74572F lea rsi, ptr [r31+r10*2+0x2f] +XDIS 9840: MISC BASE D50A8D745811 lea rsi, ptr [rax+r11*2+0x11] +XDIS 9846: MISC BASE D50A8D745912 lea rsi, ptr [rcx+r11*2+0x12] +XDIS 984c: MISC BASE D50A8D745A13 lea rsi, ptr [rdx+r11*2+0x13] +XDIS 9852: MISC BASE D50A8D745B14 lea rsi, ptr [rbx+r11*2+0x14] +XDIS 9858: MISC BASE D50A8D745C15 lea rsi, ptr [rsp+r11*2+0x15] +XDIS 985e: MISC BASE D50A8D745D16 lea rsi, ptr [rbp+r11*2+0x16] +XDIS 9864: MISC BASE D50A8D745E17 lea rsi, ptr [rsi+r11*2+0x17] +XDIS 986a: MISC BASE D50A8D745F18 lea rsi, ptr [rdi+r11*2+0x18] +XDIS 9870: MISC BASE D50B8D745819 lea rsi, ptr [r8+r11*2+0x19] +XDIS 9876: MISC BASE D50B8D74591A lea rsi, ptr [r9+r11*2+0x1a] +XDIS 987c: MISC BASE D50B8D745A1B lea rsi, ptr [r10+r11*2+0x1b] +XDIS 9882: MISC BASE D50B8D745B1C lea rsi, ptr [r11+r11*2+0x1c] +XDIS 9888: MISC BASE D50B8D745C1D lea rsi, ptr [r12+r11*2+0x1d] +XDIS 988e: MISC BASE D50B8D745D1E lea rsi, ptr [r13+r11*2+0x1e] +XDIS 9894: MISC BASE D50B8D745E1F lea rsi, ptr [r14+r11*2+0x1f] +XDIS 989a: MISC BASE D50B8D745F20 lea rsi, ptr [r15+r11*2+0x20] +XDIS 98a0: MISC BASE D51A8D745821 lea rsi, ptr [r16+r11*2+0x21] +XDIS 98a6: MISC BASE D51A8D745922 lea rsi, ptr [r17+r11*2+0x22] +XDIS 98ac: MISC BASE D51A8D745A23 lea rsi, ptr [r18+r11*2+0x23] +XDIS 98b2: MISC BASE D51A8D745B24 lea rsi, ptr [r19+r11*2+0x24] +XDIS 98b8: MISC BASE D51A8D745C25 lea rsi, ptr [r20+r11*2+0x25] +XDIS 98be: MISC BASE D51A8D745D26 lea rsi, ptr [r21+r11*2+0x26] +XDIS 98c4: MISC BASE D51A8D745E27 lea rsi, ptr [r22+r11*2+0x27] +XDIS 98ca: MISC BASE D51A8D745F28 lea rsi, ptr [r23+r11*2+0x28] +XDIS 98d0: MISC BASE D51B8D745829 lea rsi, ptr [r24+r11*2+0x29] +XDIS 98d6: MISC BASE D51B8D74592A lea rsi, ptr [r25+r11*2+0x2a] +XDIS 98dc: MISC BASE D51B8D745A2B lea rsi, ptr [r26+r11*2+0x2b] +XDIS 98e2: MISC BASE D51B8D745B2C lea rsi, ptr [r27+r11*2+0x2c] +XDIS 98e8: MISC BASE D51B8D745C2D lea rsi, ptr [r28+r11*2+0x2d] +XDIS 98ee: MISC BASE D51B8D745D2E lea rsi, ptr [r29+r11*2+0x2e] +XDIS 98f4: MISC BASE D51B8D745E2F lea rsi, ptr [r30+r11*2+0x2f] +XDIS 98fa: MISC BASE D51B8D745F30 lea rsi, ptr [r31+r11*2+0x30] +XDIS 9900: MISC BASE D50A8D746012 lea rsi, ptr [rax+r12*2+0x12] +XDIS 9906: MISC BASE D50A8D746113 lea rsi, ptr [rcx+r12*2+0x13] +XDIS 990c: MISC BASE D50A8D746214 lea rsi, ptr [rdx+r12*2+0x14] +XDIS 9912: MISC BASE D50A8D746315 lea rsi, ptr [rbx+r12*2+0x15] +XDIS 9918: MISC BASE D50A8D746416 lea rsi, ptr [rsp+r12*2+0x16] +XDIS 991e: MISC BASE D50A8D746517 lea rsi, ptr [rbp+r12*2+0x17] +XDIS 9924: MISC BASE D50A8D746618 lea rsi, ptr [rsi+r12*2+0x18] +XDIS 992a: MISC BASE D50A8D746719 lea rsi, ptr [rdi+r12*2+0x19] +XDIS 9930: MISC BASE D50B8D74601A lea rsi, ptr [r8+r12*2+0x1a] +XDIS 9936: MISC BASE D50B8D74611B lea rsi, ptr [r9+r12*2+0x1b] +XDIS 993c: MISC BASE D50B8D74621C lea rsi, ptr [r10+r12*2+0x1c] +XDIS 9942: MISC BASE D50B8D74631D lea rsi, ptr [r11+r12*2+0x1d] +XDIS 9948: MISC BASE D50B8D74641E lea rsi, ptr [r12+r12*2+0x1e] +XDIS 994e: MISC BASE D50B8D74651F lea rsi, ptr [r13+r12*2+0x1f] +XDIS 9954: MISC BASE D50B8D746620 lea rsi, ptr [r14+r12*2+0x20] +XDIS 995a: MISC BASE D50B8D746721 lea rsi, ptr [r15+r12*2+0x21] +XDIS 9960: MISC BASE D51A8D746022 lea rsi, ptr [r16+r12*2+0x22] +XDIS 9966: MISC BASE D51A8D746123 lea rsi, ptr [r17+r12*2+0x23] +XDIS 996c: MISC BASE D51A8D746224 lea rsi, ptr [r18+r12*2+0x24] +XDIS 9972: MISC BASE D51A8D746325 lea rsi, ptr [r19+r12*2+0x25] +XDIS 9978: MISC BASE D51A8D746426 lea rsi, ptr [r20+r12*2+0x26] +XDIS 997e: MISC BASE D51A8D746527 lea rsi, ptr [r21+r12*2+0x27] +XDIS 9984: MISC BASE D51A8D746628 lea rsi, ptr [r22+r12*2+0x28] +XDIS 998a: MISC BASE D51A8D746729 lea rsi, ptr [r23+r12*2+0x29] +XDIS 9990: MISC BASE D51B8D74602A lea rsi, ptr [r24+r12*2+0x2a] +XDIS 9996: MISC BASE D51B8D74612B lea rsi, ptr [r25+r12*2+0x2b] +XDIS 999c: MISC BASE D51B8D74622C lea rsi, ptr [r26+r12*2+0x2c] +XDIS 99a2: MISC BASE D51B8D74632D lea rsi, ptr [r27+r12*2+0x2d] +XDIS 99a8: MISC BASE D51B8D74642E lea rsi, ptr [r28+r12*2+0x2e] +XDIS 99ae: MISC BASE D51B8D74652F lea rsi, ptr [r29+r12*2+0x2f] +XDIS 99b4: MISC BASE D51B8D746630 lea rsi, ptr [r30+r12*2+0x30] +XDIS 99ba: MISC BASE D51B8D746731 lea rsi, ptr [r31+r12*2+0x31] +XDIS 99c0: MISC BASE D50A8D746813 lea rsi, ptr [rax+r13*2+0x13] +XDIS 99c6: MISC BASE D50A8D746914 lea rsi, ptr [rcx+r13*2+0x14] +XDIS 99cc: MISC BASE D50A8D746A15 lea rsi, ptr [rdx+r13*2+0x15] +XDIS 99d2: MISC BASE D50A8D746B16 lea rsi, ptr [rbx+r13*2+0x16] +XDIS 99d8: MISC BASE D50A8D746C17 lea rsi, ptr [rsp+r13*2+0x17] +XDIS 99de: MISC BASE D50A8D746D18 lea rsi, ptr [rbp+r13*2+0x18] +XDIS 99e4: MISC BASE D50A8D746E19 lea rsi, ptr [rsi+r13*2+0x19] +XDIS 99ea: MISC BASE D50A8D746F1A lea rsi, ptr [rdi+r13*2+0x1a] +XDIS 99f0: MISC BASE D50B8D74681B lea rsi, ptr [r8+r13*2+0x1b] +XDIS 99f6: MISC BASE D50B8D74691C lea rsi, ptr [r9+r13*2+0x1c] +XDIS 99fc: MISC BASE D50B8D746A1D lea rsi, ptr [r10+r13*2+0x1d] +XDIS 9a02: MISC BASE D50B8D746B1E lea rsi, ptr [r11+r13*2+0x1e] +XDIS 9a08: MISC BASE D50B8D746C1F lea rsi, ptr [r12+r13*2+0x1f] +XDIS 9a0e: MISC BASE D50B8D746D20 lea rsi, ptr [r13+r13*2+0x20] +XDIS 9a14: MISC BASE D50B8D746E21 lea rsi, ptr [r14+r13*2+0x21] +XDIS 9a1a: MISC BASE D50B8D746F22 lea rsi, ptr [r15+r13*2+0x22] +XDIS 9a20: MISC BASE D51A8D746823 lea rsi, ptr [r16+r13*2+0x23] +XDIS 9a26: MISC BASE D51A8D746924 lea rsi, ptr [r17+r13*2+0x24] +XDIS 9a2c: MISC BASE D51A8D746A25 lea rsi, ptr [r18+r13*2+0x25] +XDIS 9a32: MISC BASE D51A8D746B26 lea rsi, ptr [r19+r13*2+0x26] +XDIS 9a38: MISC BASE D51A8D746C27 lea rsi, ptr [r20+r13*2+0x27] +XDIS 9a3e: MISC BASE D51A8D746D28 lea rsi, ptr [r21+r13*2+0x28] +XDIS 9a44: MISC BASE D51A8D746E29 lea rsi, ptr [r22+r13*2+0x29] +XDIS 9a4a: MISC BASE D51A8D746F2A lea rsi, ptr [r23+r13*2+0x2a] +XDIS 9a50: MISC BASE D51B8D74682B lea rsi, ptr [r24+r13*2+0x2b] +XDIS 9a56: MISC BASE D51B8D74692C lea rsi, ptr [r25+r13*2+0x2c] +XDIS 9a5c: MISC BASE D51B8D746A2D lea rsi, ptr [r26+r13*2+0x2d] +XDIS 9a62: MISC BASE D51B8D746B2E lea rsi, ptr [r27+r13*2+0x2e] +XDIS 9a68: MISC BASE D51B8D746C2F lea rsi, ptr [r28+r13*2+0x2f] +XDIS 9a6e: MISC BASE D51B8D746D30 lea rsi, ptr [r29+r13*2+0x30] +XDIS 9a74: MISC BASE D51B8D746E31 lea rsi, ptr [r30+r13*2+0x31] +XDIS 9a7a: MISC BASE D51B8D746F32 lea rsi, ptr [r31+r13*2+0x32] +XDIS 9a80: MISC BASE D50A8D747014 lea rsi, ptr [rax+r14*2+0x14] +XDIS 9a86: MISC BASE D50A8D747115 lea rsi, ptr [rcx+r14*2+0x15] +XDIS 9a8c: MISC BASE D50A8D747216 lea rsi, ptr [rdx+r14*2+0x16] +XDIS 9a92: MISC BASE D50A8D747317 lea rsi, ptr [rbx+r14*2+0x17] +XDIS 9a98: MISC BASE D50A8D747418 lea rsi, ptr [rsp+r14*2+0x18] +XDIS 9a9e: MISC BASE D50A8D747519 lea rsi, ptr [rbp+r14*2+0x19] +XDIS 9aa4: MISC BASE D50A8D74761A lea rsi, ptr [rsi+r14*2+0x1a] +XDIS 9aaa: MISC BASE D50A8D74771B lea rsi, ptr [rdi+r14*2+0x1b] +XDIS 9ab0: MISC BASE D50B8D74701C lea rsi, ptr [r8+r14*2+0x1c] +XDIS 9ab6: MISC BASE D50B8D74711D lea rsi, ptr [r9+r14*2+0x1d] +XDIS 9abc: MISC BASE D50B8D74721E lea rsi, ptr [r10+r14*2+0x1e] +XDIS 9ac2: MISC BASE D50B8D74731F lea rsi, ptr [r11+r14*2+0x1f] +XDIS 9ac8: MISC BASE D50B8D747420 lea rsi, ptr [r12+r14*2+0x20] +XDIS 9ace: MISC BASE D50B8D747521 lea rsi, ptr [r13+r14*2+0x21] +XDIS 9ad4: MISC BASE D50B8D747622 lea rsi, ptr [r14+r14*2+0x22] +XDIS 9ada: MISC BASE D50B8D747723 lea rsi, ptr [r15+r14*2+0x23] +XDIS 9ae0: MISC BASE D51A8D747024 lea rsi, ptr [r16+r14*2+0x24] +XDIS 9ae6: MISC BASE D51A8D747125 lea rsi, ptr [r17+r14*2+0x25] +XDIS 9aec: MISC BASE D51A8D747226 lea rsi, ptr [r18+r14*2+0x26] +XDIS 9af2: MISC BASE D51A8D747327 lea rsi, ptr [r19+r14*2+0x27] +XDIS 9af8: MISC BASE D51A8D747428 lea rsi, ptr [r20+r14*2+0x28] +XDIS 9afe: MISC BASE D51A8D747529 lea rsi, ptr [r21+r14*2+0x29] +XDIS 9b04: MISC BASE D51A8D74762A lea rsi, ptr [r22+r14*2+0x2a] +XDIS 9b0a: MISC BASE D51A8D74772B lea rsi, ptr [r23+r14*2+0x2b] +XDIS 9b10: MISC BASE D51B8D74702C lea rsi, ptr [r24+r14*2+0x2c] +XDIS 9b16: MISC BASE D51B8D74712D lea rsi, ptr [r25+r14*2+0x2d] +XDIS 9b1c: MISC BASE D51B8D74722E lea rsi, ptr [r26+r14*2+0x2e] +XDIS 9b22: MISC BASE D51B8D74732F lea rsi, ptr [r27+r14*2+0x2f] +XDIS 9b28: MISC BASE D51B8D747430 lea rsi, ptr [r28+r14*2+0x30] +XDIS 9b2e: MISC BASE D51B8D747531 lea rsi, ptr [r29+r14*2+0x31] +XDIS 9b34: MISC BASE D51B8D747632 lea rsi, ptr [r30+r14*2+0x32] +XDIS 9b3a: MISC BASE D51B8D747733 lea rsi, ptr [r31+r14*2+0x33] +XDIS 9b40: MISC BASE D50A8D747815 lea rsi, ptr [rax+r15*2+0x15] +XDIS 9b46: MISC BASE D50A8D747916 lea rsi, ptr [rcx+r15*2+0x16] +XDIS 9b4c: MISC BASE D50A8D747A17 lea rsi, ptr [rdx+r15*2+0x17] +XDIS 9b52: MISC BASE D50A8D747B18 lea rsi, ptr [rbx+r15*2+0x18] +XDIS 9b58: MISC BASE D50A8D747C19 lea rsi, ptr [rsp+r15*2+0x19] +XDIS 9b5e: MISC BASE D50A8D747D1A lea rsi, ptr [rbp+r15*2+0x1a] +XDIS 9b64: MISC BASE D50A8D747E1B lea rsi, ptr [rsi+r15*2+0x1b] +XDIS 9b6a: MISC BASE D50A8D747F1C lea rsi, ptr [rdi+r15*2+0x1c] +XDIS 9b70: MISC BASE D50B8D74781D lea rsi, ptr [r8+r15*2+0x1d] +XDIS 9b76: MISC BASE D50B8D74791E lea rsi, ptr [r9+r15*2+0x1e] +XDIS 9b7c: MISC BASE D50B8D747A1F lea rsi, ptr [r10+r15*2+0x1f] +XDIS 9b82: MISC BASE D50B8D747B20 lea rsi, ptr [r11+r15*2+0x20] +XDIS 9b88: MISC BASE D50B8D747C21 lea rsi, ptr [r12+r15*2+0x21] +XDIS 9b8e: MISC BASE D50B8D747D22 lea rsi, ptr [r13+r15*2+0x22] +XDIS 9b94: MISC BASE D50B8D747E23 lea rsi, ptr [r14+r15*2+0x23] +XDIS 9b9a: MISC BASE D50B8D747F24 lea rsi, ptr [r15+r15*2+0x24] +XDIS 9ba0: MISC BASE D51A8D747825 lea rsi, ptr [r16+r15*2+0x25] +XDIS 9ba6: MISC BASE D51A8D747926 lea rsi, ptr [r17+r15*2+0x26] +XDIS 9bac: MISC BASE D51A8D747A27 lea rsi, ptr [r18+r15*2+0x27] +XDIS 9bb2: MISC BASE D51A8D747B28 lea rsi, ptr [r19+r15*2+0x28] +XDIS 9bb8: MISC BASE D51A8D747C29 lea rsi, ptr [r20+r15*2+0x29] +XDIS 9bbe: MISC BASE D51A8D747D2A lea rsi, ptr [r21+r15*2+0x2a] +XDIS 9bc4: MISC BASE D51A8D747E2B lea rsi, ptr [r22+r15*2+0x2b] +XDIS 9bca: MISC BASE D51A8D747F2C lea rsi, ptr [r23+r15*2+0x2c] +XDIS 9bd0: MISC BASE D51B8D74782D lea rsi, ptr [r24+r15*2+0x2d] +XDIS 9bd6: MISC BASE D51B8D74792E lea rsi, ptr [r25+r15*2+0x2e] +XDIS 9bdc: MISC BASE D51B8D747A2F lea rsi, ptr [r26+r15*2+0x2f] +XDIS 9be2: MISC BASE D51B8D747B30 lea rsi, ptr [r27+r15*2+0x30] +XDIS 9be8: MISC BASE D51B8D747C31 lea rsi, ptr [r28+r15*2+0x31] +XDIS 9bee: MISC BASE D51B8D747D32 lea rsi, ptr [r29+r15*2+0x32] +XDIS 9bf4: MISC BASE D51B8D747E33 lea rsi, ptr [r30+r15*2+0x33] +XDIS 9bfa: MISC BASE D51B8D747F34 lea rsi, ptr [r31+r15*2+0x34] +XDIS 9c00: MISC BASE D5288D744016 lea rsi, ptr [rax+r16*2+0x16] +XDIS 9c06: MISC BASE D5288D744117 lea rsi, ptr [rcx+r16*2+0x17] +XDIS 9c0c: MISC BASE D5288D744218 lea rsi, ptr [rdx+r16*2+0x18] +XDIS 9c12: MISC BASE D5288D744319 lea rsi, ptr [rbx+r16*2+0x19] +XDIS 9c18: MISC BASE D5288D74441A lea rsi, ptr [rsp+r16*2+0x1a] +XDIS 9c1e: MISC BASE D5288D74451B lea rsi, ptr [rbp+r16*2+0x1b] +XDIS 9c24: MISC BASE D5288D74461C lea rsi, ptr [rsi+r16*2+0x1c] +XDIS 9c2a: MISC BASE D5288D74471D lea rsi, ptr [rdi+r16*2+0x1d] +XDIS 9c30: MISC BASE D5298D74401E lea rsi, ptr [r8+r16*2+0x1e] +XDIS 9c36: MISC BASE D5298D74411F lea rsi, ptr [r9+r16*2+0x1f] +XDIS 9c3c: MISC BASE D5298D744220 lea rsi, ptr [r10+r16*2+0x20] +XDIS 9c42: MISC BASE D5298D744321 lea rsi, ptr [r11+r16*2+0x21] +XDIS 9c48: MISC BASE D5298D744422 lea rsi, ptr [r12+r16*2+0x22] +XDIS 9c4e: MISC BASE D5298D744523 lea rsi, ptr [r13+r16*2+0x23] +XDIS 9c54: MISC BASE D5298D744624 lea rsi, ptr [r14+r16*2+0x24] +XDIS 9c5a: MISC BASE D5298D744725 lea rsi, ptr [r15+r16*2+0x25] +XDIS 9c60: MISC BASE D5388D744026 lea rsi, ptr [r16+r16*2+0x26] +XDIS 9c66: MISC BASE D5388D744127 lea rsi, ptr [r17+r16*2+0x27] +XDIS 9c6c: MISC BASE D5388D744228 lea rsi, ptr [r18+r16*2+0x28] +XDIS 9c72: MISC BASE D5388D744329 lea rsi, ptr [r19+r16*2+0x29] +XDIS 9c78: MISC BASE D5388D74442A lea rsi, ptr [r20+r16*2+0x2a] +XDIS 9c7e: MISC BASE D5388D74452B lea rsi, ptr [r21+r16*2+0x2b] +XDIS 9c84: MISC BASE D5388D74462C lea rsi, ptr [r22+r16*2+0x2c] +XDIS 9c8a: MISC BASE D5388D74472D lea rsi, ptr [r23+r16*2+0x2d] +XDIS 9c90: MISC BASE D5398D74402E lea rsi, ptr [r24+r16*2+0x2e] +XDIS 9c96: MISC BASE D5398D74412F lea rsi, ptr [r25+r16*2+0x2f] +XDIS 9c9c: MISC BASE D5398D744230 lea rsi, ptr [r26+r16*2+0x30] +XDIS 9ca2: MISC BASE D5398D744331 lea rsi, ptr [r27+r16*2+0x31] +XDIS 9ca8: MISC BASE D5398D744432 lea rsi, ptr [r28+r16*2+0x32] +XDIS 9cae: MISC BASE D5398D744533 lea rsi, ptr [r29+r16*2+0x33] +XDIS 9cb4: MISC BASE D5398D744634 lea rsi, ptr [r30+r16*2+0x34] +XDIS 9cba: MISC BASE D5398D744735 lea rsi, ptr [r31+r16*2+0x35] +XDIS 9cc0: MISC BASE D5288D744817 lea rsi, ptr [rax+r17*2+0x17] +XDIS 9cc6: MISC BASE D5288D744918 lea rsi, ptr [rcx+r17*2+0x18] +XDIS 9ccc: MISC BASE D5288D744A19 lea rsi, ptr [rdx+r17*2+0x19] +XDIS 9cd2: MISC BASE D5288D744B1A lea rsi, ptr [rbx+r17*2+0x1a] +XDIS 9cd8: MISC BASE D5288D744C1B lea rsi, ptr [rsp+r17*2+0x1b] +XDIS 9cde: MISC BASE D5288D744D1C lea rsi, ptr [rbp+r17*2+0x1c] +XDIS 9ce4: MISC BASE D5288D744E1D lea rsi, ptr [rsi+r17*2+0x1d] +XDIS 9cea: MISC BASE D5288D744F1E lea rsi, ptr [rdi+r17*2+0x1e] +XDIS 9cf0: MISC BASE D5298D74481F lea rsi, ptr [r8+r17*2+0x1f] +XDIS 9cf6: MISC BASE D5298D744920 lea rsi, ptr [r9+r17*2+0x20] +XDIS 9cfc: MISC BASE D5298D744A21 lea rsi, ptr [r10+r17*2+0x21] +XDIS 9d02: MISC BASE D5298D744B22 lea rsi, ptr [r11+r17*2+0x22] +XDIS 9d08: MISC BASE D5298D744C23 lea rsi, ptr [r12+r17*2+0x23] +XDIS 9d0e: MISC BASE D5298D744D24 lea rsi, ptr [r13+r17*2+0x24] +XDIS 9d14: MISC BASE D5298D744E25 lea rsi, ptr [r14+r17*2+0x25] +XDIS 9d1a: MISC BASE D5298D744F26 lea rsi, ptr [r15+r17*2+0x26] +XDIS 9d20: MISC BASE D5388D744827 lea rsi, ptr [r16+r17*2+0x27] +XDIS 9d26: MISC BASE D5388D744928 lea rsi, ptr [r17+r17*2+0x28] +XDIS 9d2c: MISC BASE D5388D744A29 lea rsi, ptr [r18+r17*2+0x29] +XDIS 9d32: MISC BASE D5388D744B2A lea rsi, ptr [r19+r17*2+0x2a] +XDIS 9d38: MISC BASE D5388D744C2B lea rsi, ptr [r20+r17*2+0x2b] +XDIS 9d3e: MISC BASE D5388D744D2C lea rsi, ptr [r21+r17*2+0x2c] +XDIS 9d44: MISC BASE D5388D744E2D lea rsi, ptr [r22+r17*2+0x2d] +XDIS 9d4a: MISC BASE D5388D744F2E lea rsi, ptr [r23+r17*2+0x2e] +XDIS 9d50: MISC BASE D5398D74482F lea rsi, ptr [r24+r17*2+0x2f] +XDIS 9d56: MISC BASE D5398D744930 lea rsi, ptr [r25+r17*2+0x30] +XDIS 9d5c: MISC BASE D5398D744A31 lea rsi, ptr [r26+r17*2+0x31] +XDIS 9d62: MISC BASE D5398D744B32 lea rsi, ptr [r27+r17*2+0x32] +XDIS 9d68: MISC BASE D5398D744C33 lea rsi, ptr [r28+r17*2+0x33] +XDIS 9d6e: MISC BASE D5398D744D34 lea rsi, ptr [r29+r17*2+0x34] +XDIS 9d74: MISC BASE D5398D744E35 lea rsi, ptr [r30+r17*2+0x35] +XDIS 9d7a: MISC BASE D5398D744F36 lea rsi, ptr [r31+r17*2+0x36] +XDIS 9d80: MISC BASE D5288D745018 lea rsi, ptr [rax+r18*2+0x18] +XDIS 9d86: MISC BASE D5288D745119 lea rsi, ptr [rcx+r18*2+0x19] +XDIS 9d8c: MISC BASE D5288D74521A lea rsi, ptr [rdx+r18*2+0x1a] +XDIS 9d92: MISC BASE D5288D74531B lea rsi, ptr [rbx+r18*2+0x1b] +XDIS 9d98: MISC BASE D5288D74541C lea rsi, ptr [rsp+r18*2+0x1c] +XDIS 9d9e: MISC BASE D5288D74551D lea rsi, ptr [rbp+r18*2+0x1d] +XDIS 9da4: MISC BASE D5288D74561E lea rsi, ptr [rsi+r18*2+0x1e] +XDIS 9daa: MISC BASE D5288D74571F lea rsi, ptr [rdi+r18*2+0x1f] +XDIS 9db0: MISC BASE D5298D745020 lea rsi, ptr [r8+r18*2+0x20] +XDIS 9db6: MISC BASE D5298D745121 lea rsi, ptr [r9+r18*2+0x21] +XDIS 9dbc: MISC BASE D5298D745222 lea rsi, ptr [r10+r18*2+0x22] +XDIS 9dc2: MISC BASE D5298D745323 lea rsi, ptr [r11+r18*2+0x23] +XDIS 9dc8: MISC BASE D5298D745424 lea rsi, ptr [r12+r18*2+0x24] +XDIS 9dce: MISC BASE D5298D745525 lea rsi, ptr [r13+r18*2+0x25] +XDIS 9dd4: MISC BASE D5298D745626 lea rsi, ptr [r14+r18*2+0x26] +XDIS 9dda: MISC BASE D5298D745727 lea rsi, ptr [r15+r18*2+0x27] +XDIS 9de0: MISC BASE D5388D745028 lea rsi, ptr [r16+r18*2+0x28] +XDIS 9de6: MISC BASE D5388D745129 lea rsi, ptr [r17+r18*2+0x29] +XDIS 9dec: MISC BASE D5388D74522A lea rsi, ptr [r18+r18*2+0x2a] +XDIS 9df2: MISC BASE D5388D74532B lea rsi, ptr [r19+r18*2+0x2b] +XDIS 9df8: MISC BASE D5388D74542C lea rsi, ptr [r20+r18*2+0x2c] +XDIS 9dfe: MISC BASE D5388D74552D lea rsi, ptr [r21+r18*2+0x2d] +XDIS 9e04: MISC BASE D5388D74562E lea rsi, ptr [r22+r18*2+0x2e] +XDIS 9e0a: MISC BASE D5388D74572F lea rsi, ptr [r23+r18*2+0x2f] +XDIS 9e10: MISC BASE D5398D745030 lea rsi, ptr [r24+r18*2+0x30] +XDIS 9e16: MISC BASE D5398D745131 lea rsi, ptr [r25+r18*2+0x31] +XDIS 9e1c: MISC BASE D5398D745232 lea rsi, ptr [r26+r18*2+0x32] +XDIS 9e22: MISC BASE D5398D745333 lea rsi, ptr [r27+r18*2+0x33] +XDIS 9e28: MISC BASE D5398D745434 lea rsi, ptr [r28+r18*2+0x34] +XDIS 9e2e: MISC BASE D5398D745535 lea rsi, ptr [r29+r18*2+0x35] +XDIS 9e34: MISC BASE D5398D745636 lea rsi, ptr [r30+r18*2+0x36] +XDIS 9e3a: MISC BASE D5398D745737 lea rsi, ptr [r31+r18*2+0x37] +XDIS 9e40: MISC BASE D5288D745819 lea rsi, ptr [rax+r19*2+0x19] +XDIS 9e46: MISC BASE D5288D74591A lea rsi, ptr [rcx+r19*2+0x1a] +XDIS 9e4c: MISC BASE D5288D745A1B lea rsi, ptr [rdx+r19*2+0x1b] +XDIS 9e52: MISC BASE D5288D745B1C lea rsi, ptr [rbx+r19*2+0x1c] +XDIS 9e58: MISC BASE D5288D745C1D lea rsi, ptr [rsp+r19*2+0x1d] +XDIS 9e5e: MISC BASE D5288D745D1E lea rsi, ptr [rbp+r19*2+0x1e] +XDIS 9e64: MISC BASE D5288D745E1F lea rsi, ptr [rsi+r19*2+0x1f] +XDIS 9e6a: MISC BASE D5288D745F20 lea rsi, ptr [rdi+r19*2+0x20] +XDIS 9e70: MISC BASE D5298D745821 lea rsi, ptr [r8+r19*2+0x21] +XDIS 9e76: MISC BASE D5298D745922 lea rsi, ptr [r9+r19*2+0x22] +XDIS 9e7c: MISC BASE D5298D745A23 lea rsi, ptr [r10+r19*2+0x23] +XDIS 9e82: MISC BASE D5298D745B24 lea rsi, ptr [r11+r19*2+0x24] +XDIS 9e88: MISC BASE D5298D745C25 lea rsi, ptr [r12+r19*2+0x25] +XDIS 9e8e: MISC BASE D5298D745D26 lea rsi, ptr [r13+r19*2+0x26] +XDIS 9e94: MISC BASE D5298D745E27 lea rsi, ptr [r14+r19*2+0x27] +XDIS 9e9a: MISC BASE D5298D745F28 lea rsi, ptr [r15+r19*2+0x28] +XDIS 9ea0: MISC BASE D5388D745829 lea rsi, ptr [r16+r19*2+0x29] +XDIS 9ea6: MISC BASE D5388D74592A lea rsi, ptr [r17+r19*2+0x2a] +XDIS 9eac: MISC BASE D5388D745A2B lea rsi, ptr [r18+r19*2+0x2b] +XDIS 9eb2: MISC BASE D5388D745B2C lea rsi, ptr [r19+r19*2+0x2c] +XDIS 9eb8: MISC BASE D5388D745C2D lea rsi, ptr [r20+r19*2+0x2d] +XDIS 9ebe: MISC BASE D5388D745D2E lea rsi, ptr [r21+r19*2+0x2e] +XDIS 9ec4: MISC BASE D5388D745E2F lea rsi, ptr [r22+r19*2+0x2f] +XDIS 9eca: MISC BASE D5388D745F30 lea rsi, ptr [r23+r19*2+0x30] +XDIS 9ed0: MISC BASE D5398D745831 lea rsi, ptr [r24+r19*2+0x31] +XDIS 9ed6: MISC BASE D5398D745932 lea rsi, ptr [r25+r19*2+0x32] +XDIS 9edc: MISC BASE D5398D745A33 lea rsi, ptr [r26+r19*2+0x33] +XDIS 9ee2: MISC BASE D5398D745B34 lea rsi, ptr [r27+r19*2+0x34] +XDIS 9ee8: MISC BASE D5398D745C35 lea rsi, ptr [r28+r19*2+0x35] +XDIS 9eee: MISC BASE D5398D745D36 lea rsi, ptr [r29+r19*2+0x36] +XDIS 9ef4: MISC BASE D5398D745E37 lea rsi, ptr [r30+r19*2+0x37] +XDIS 9efa: MISC BASE D5398D745F38 lea rsi, ptr [r31+r19*2+0x38] +XDIS 9f00: MISC BASE D5288D74601A lea rsi, ptr [rax+r20*2+0x1a] +XDIS 9f06: MISC BASE D5288D74611B lea rsi, ptr [rcx+r20*2+0x1b] +XDIS 9f0c: MISC BASE D5288D74621C lea rsi, ptr [rdx+r20*2+0x1c] +XDIS 9f12: MISC BASE D5288D74631D lea rsi, ptr [rbx+r20*2+0x1d] +XDIS 9f18: MISC BASE D5288D74641E lea rsi, ptr [rsp+r20*2+0x1e] +XDIS 9f1e: MISC BASE D5288D74651F lea rsi, ptr [rbp+r20*2+0x1f] +XDIS 9f24: MISC BASE D5288D746620 lea rsi, ptr [rsi+r20*2+0x20] +XDIS 9f2a: MISC BASE D5288D746721 lea rsi, ptr [rdi+r20*2+0x21] +XDIS 9f30: MISC BASE D5298D746022 lea rsi, ptr [r8+r20*2+0x22] +XDIS 9f36: MISC BASE D5298D746123 lea rsi, ptr [r9+r20*2+0x23] +XDIS 9f3c: MISC BASE D5298D746224 lea rsi, ptr [r10+r20*2+0x24] +XDIS 9f42: MISC BASE D5298D746325 lea rsi, ptr [r11+r20*2+0x25] +XDIS 9f48: MISC BASE D5298D746426 lea rsi, ptr [r12+r20*2+0x26] +XDIS 9f4e: MISC BASE D5298D746527 lea rsi, ptr [r13+r20*2+0x27] +XDIS 9f54: MISC BASE D5298D746628 lea rsi, ptr [r14+r20*2+0x28] +XDIS 9f5a: MISC BASE D5298D746729 lea rsi, ptr [r15+r20*2+0x29] +XDIS 9f60: MISC BASE D5388D74602A lea rsi, ptr [r16+r20*2+0x2a] +XDIS 9f66: MISC BASE D5388D74612B lea rsi, ptr [r17+r20*2+0x2b] +XDIS 9f6c: MISC BASE D5388D74622C lea rsi, ptr [r18+r20*2+0x2c] +XDIS 9f72: MISC BASE D5388D74632D lea rsi, ptr [r19+r20*2+0x2d] +XDIS 9f78: MISC BASE D5388D74642E lea rsi, ptr [r20+r20*2+0x2e] +XDIS 9f7e: MISC BASE D5388D74652F lea rsi, ptr [r21+r20*2+0x2f] +XDIS 9f84: MISC BASE D5388D746630 lea rsi, ptr [r22+r20*2+0x30] +XDIS 9f8a: MISC BASE D5388D746731 lea rsi, ptr [r23+r20*2+0x31] +XDIS 9f90: MISC BASE D5398D746032 lea rsi, ptr [r24+r20*2+0x32] +XDIS 9f96: MISC BASE D5398D746133 lea rsi, ptr [r25+r20*2+0x33] +XDIS 9f9c: MISC BASE D5398D746234 lea rsi, ptr [r26+r20*2+0x34] +XDIS 9fa2: MISC BASE D5398D746335 lea rsi, ptr [r27+r20*2+0x35] +XDIS 9fa8: MISC BASE D5398D746436 lea rsi, ptr [r28+r20*2+0x36] +XDIS 9fae: MISC BASE D5398D746537 lea rsi, ptr [r29+r20*2+0x37] +XDIS 9fb4: MISC BASE D5398D746638 lea rsi, ptr [r30+r20*2+0x38] +XDIS 9fba: MISC BASE D5398D746739 lea rsi, ptr [r31+r20*2+0x39] +XDIS 9fc0: MISC BASE D5288D74681B lea rsi, ptr [rax+r21*2+0x1b] +XDIS 9fc6: MISC BASE D5288D74691C lea rsi, ptr [rcx+r21*2+0x1c] +XDIS 9fcc: MISC BASE D5288D746A1D lea rsi, ptr [rdx+r21*2+0x1d] +XDIS 9fd2: MISC BASE D5288D746B1E lea rsi, ptr [rbx+r21*2+0x1e] +XDIS 9fd8: MISC BASE D5288D746C1F lea rsi, ptr [rsp+r21*2+0x1f] +XDIS 9fde: MISC BASE D5288D746D20 lea rsi, ptr [rbp+r21*2+0x20] +XDIS 9fe4: MISC BASE D5288D746E21 lea rsi, ptr [rsi+r21*2+0x21] +XDIS 9fea: MISC BASE D5288D746F22 lea rsi, ptr [rdi+r21*2+0x22] +XDIS 9ff0: MISC BASE D5298D746823 lea rsi, ptr [r8+r21*2+0x23] +XDIS 9ff6: MISC BASE D5298D746924 lea rsi, ptr [r9+r21*2+0x24] +XDIS 9ffc: MISC BASE D5298D746A25 lea rsi, ptr [r10+r21*2+0x25] +XDIS a002: MISC BASE D5298D746B26 lea rsi, ptr [r11+r21*2+0x26] +XDIS a008: MISC BASE D5298D746C27 lea rsi, ptr [r12+r21*2+0x27] +XDIS a00e: MISC BASE D5298D746D28 lea rsi, ptr [r13+r21*2+0x28] +XDIS a014: MISC BASE D5298D746E29 lea rsi, ptr [r14+r21*2+0x29] +XDIS a01a: MISC BASE D5298D746F2A lea rsi, ptr [r15+r21*2+0x2a] +XDIS a020: MISC BASE D5388D74682B lea rsi, ptr [r16+r21*2+0x2b] +XDIS a026: MISC BASE D5388D74692C lea rsi, ptr [r17+r21*2+0x2c] +XDIS a02c: MISC BASE D5388D746A2D lea rsi, ptr [r18+r21*2+0x2d] +XDIS a032: MISC BASE D5388D746B2E lea rsi, ptr [r19+r21*2+0x2e] +XDIS a038: MISC BASE D5388D746C2F lea rsi, ptr [r20+r21*2+0x2f] +XDIS a03e: MISC BASE D5388D746D30 lea rsi, ptr [r21+r21*2+0x30] +XDIS a044: MISC BASE D5388D746E31 lea rsi, ptr [r22+r21*2+0x31] +XDIS a04a: MISC BASE D5388D746F32 lea rsi, ptr [r23+r21*2+0x32] +XDIS a050: MISC BASE D5398D746833 lea rsi, ptr [r24+r21*2+0x33] +XDIS a056: MISC BASE D5398D746934 lea rsi, ptr [r25+r21*2+0x34] +XDIS a05c: MISC BASE D5398D746A35 lea rsi, ptr [r26+r21*2+0x35] +XDIS a062: MISC BASE D5398D746B36 lea rsi, ptr [r27+r21*2+0x36] +XDIS a068: MISC BASE D5398D746C37 lea rsi, ptr [r28+r21*2+0x37] +XDIS a06e: MISC BASE D5398D746D38 lea rsi, ptr [r29+r21*2+0x38] +XDIS a074: MISC BASE D5398D746E39 lea rsi, ptr [r30+r21*2+0x39] +XDIS a07a: MISC BASE D5398D746F3A lea rsi, ptr [r31+r21*2+0x3a] +XDIS a080: MISC BASE D5288D74701C lea rsi, ptr [rax+r22*2+0x1c] +XDIS a086: MISC BASE D5288D74711D lea rsi, ptr [rcx+r22*2+0x1d] +XDIS a08c: MISC BASE D5288D74721E lea rsi, ptr [rdx+r22*2+0x1e] +XDIS a092: MISC BASE D5288D74731F lea rsi, ptr [rbx+r22*2+0x1f] +XDIS a098: MISC BASE D5288D747420 lea rsi, ptr [rsp+r22*2+0x20] +XDIS a09e: MISC BASE D5288D747521 lea rsi, ptr [rbp+r22*2+0x21] +XDIS a0a4: MISC BASE D5288D747622 lea rsi, ptr [rsi+r22*2+0x22] +XDIS a0aa: MISC BASE D5288D747723 lea rsi, ptr [rdi+r22*2+0x23] +XDIS a0b0: MISC BASE D5298D747024 lea rsi, ptr [r8+r22*2+0x24] +XDIS a0b6: MISC BASE D5298D747125 lea rsi, ptr [r9+r22*2+0x25] +XDIS a0bc: MISC BASE D5298D747226 lea rsi, ptr [r10+r22*2+0x26] +XDIS a0c2: MISC BASE D5298D747327 lea rsi, ptr [r11+r22*2+0x27] +XDIS a0c8: MISC BASE D5298D747428 lea rsi, ptr [r12+r22*2+0x28] +XDIS a0ce: MISC BASE D5298D747529 lea rsi, ptr [r13+r22*2+0x29] +XDIS a0d4: MISC BASE D5298D74762A lea rsi, ptr [r14+r22*2+0x2a] +XDIS a0da: MISC BASE D5298D74772B lea rsi, ptr [r15+r22*2+0x2b] +XDIS a0e0: MISC BASE D5388D74702C lea rsi, ptr [r16+r22*2+0x2c] +XDIS a0e6: MISC BASE D5388D74712D lea rsi, ptr [r17+r22*2+0x2d] +XDIS a0ec: MISC BASE D5388D74722E lea rsi, ptr [r18+r22*2+0x2e] +XDIS a0f2: MISC BASE D5388D74732F lea rsi, ptr [r19+r22*2+0x2f] +XDIS a0f8: MISC BASE D5388D747430 lea rsi, ptr [r20+r22*2+0x30] +XDIS a0fe: MISC BASE D5388D747531 lea rsi, ptr [r21+r22*2+0x31] +XDIS a104: MISC BASE D5388D747632 lea rsi, ptr [r22+r22*2+0x32] +XDIS a10a: MISC BASE D5388D747733 lea rsi, ptr [r23+r22*2+0x33] +XDIS a110: MISC BASE D5398D747034 lea rsi, ptr [r24+r22*2+0x34] +XDIS a116: MISC BASE D5398D747135 lea rsi, ptr [r25+r22*2+0x35] +XDIS a11c: MISC BASE D5398D747236 lea rsi, ptr [r26+r22*2+0x36] +XDIS a122: MISC BASE D5398D747337 lea rsi, ptr [r27+r22*2+0x37] +XDIS a128: MISC BASE D5398D747438 lea rsi, ptr [r28+r22*2+0x38] +XDIS a12e: MISC BASE D5398D747539 lea rsi, ptr [r29+r22*2+0x39] +XDIS a134: MISC BASE D5398D74763A lea rsi, ptr [r30+r22*2+0x3a] +XDIS a13a: MISC BASE D5398D74773B lea rsi, ptr [r31+r22*2+0x3b] +XDIS a140: MISC BASE D5288D74781D lea rsi, ptr [rax+r23*2+0x1d] +XDIS a146: MISC BASE D5288D74791E lea rsi, ptr [rcx+r23*2+0x1e] +XDIS a14c: MISC BASE D5288D747A1F lea rsi, ptr [rdx+r23*2+0x1f] +XDIS a152: MISC BASE D5288D747B20 lea rsi, ptr [rbx+r23*2+0x20] +XDIS a158: MISC BASE D5288D747C21 lea rsi, ptr [rsp+r23*2+0x21] +XDIS a15e: MISC BASE D5288D747D22 lea rsi, ptr [rbp+r23*2+0x22] +XDIS a164: MISC BASE D5288D747E23 lea rsi, ptr [rsi+r23*2+0x23] +XDIS a16a: MISC BASE D5288D747F24 lea rsi, ptr [rdi+r23*2+0x24] +XDIS a170: MISC BASE D5298D747825 lea rsi, ptr [r8+r23*2+0x25] +XDIS a176: MISC BASE D5298D747926 lea rsi, ptr [r9+r23*2+0x26] +XDIS a17c: MISC BASE D5298D747A27 lea rsi, ptr [r10+r23*2+0x27] +XDIS a182: MISC BASE D5298D747B28 lea rsi, ptr [r11+r23*2+0x28] +XDIS a188: MISC BASE D5298D747C29 lea rsi, ptr [r12+r23*2+0x29] +XDIS a18e: MISC BASE D5298D747D2A lea rsi, ptr [r13+r23*2+0x2a] +XDIS a194: MISC BASE D5298D747E2B lea rsi, ptr [r14+r23*2+0x2b] +XDIS a19a: MISC BASE D5298D747F2C lea rsi, ptr [r15+r23*2+0x2c] +XDIS a1a0: MISC BASE D5388D74782D lea rsi, ptr [r16+r23*2+0x2d] +XDIS a1a6: MISC BASE D5388D74792E lea rsi, ptr [r17+r23*2+0x2e] +XDIS a1ac: MISC BASE D5388D747A2F lea rsi, ptr [r18+r23*2+0x2f] +XDIS a1b2: MISC BASE D5388D747B30 lea rsi, ptr [r19+r23*2+0x30] +XDIS a1b8: MISC BASE D5388D747C31 lea rsi, ptr [r20+r23*2+0x31] +XDIS a1be: MISC BASE D5388D747D32 lea rsi, ptr [r21+r23*2+0x32] +XDIS a1c4: MISC BASE D5388D747E33 lea rsi, ptr [r22+r23*2+0x33] +XDIS a1ca: MISC BASE D5388D747F34 lea rsi, ptr [r23+r23*2+0x34] +XDIS a1d0: MISC BASE D5398D747835 lea rsi, ptr [r24+r23*2+0x35] +XDIS a1d6: MISC BASE D5398D747936 lea rsi, ptr [r25+r23*2+0x36] +XDIS a1dc: MISC BASE D5398D747A37 lea rsi, ptr [r26+r23*2+0x37] +XDIS a1e2: MISC BASE D5398D747B38 lea rsi, ptr [r27+r23*2+0x38] +XDIS a1e8: MISC BASE D5398D747C39 lea rsi, ptr [r28+r23*2+0x39] +XDIS a1ee: MISC BASE D5398D747D3A lea rsi, ptr [r29+r23*2+0x3a] +XDIS a1f4: MISC BASE D5398D747E3B lea rsi, ptr [r30+r23*2+0x3b] +XDIS a1fa: MISC BASE D5398D747F3C lea rsi, ptr [r31+r23*2+0x3c] +XDIS a200: MISC BASE D52A8D74401E lea rsi, ptr [rax+r24*2+0x1e] +XDIS a206: MISC BASE D52A8D74411F lea rsi, ptr [rcx+r24*2+0x1f] +XDIS a20c: MISC BASE D52A8D744220 lea rsi, ptr [rdx+r24*2+0x20] +XDIS a212: MISC BASE D52A8D744321 lea rsi, ptr [rbx+r24*2+0x21] +XDIS a218: MISC BASE D52A8D744422 lea rsi, ptr [rsp+r24*2+0x22] +XDIS a21e: MISC BASE D52A8D744523 lea rsi, ptr [rbp+r24*2+0x23] +XDIS a224: MISC BASE D52A8D744624 lea rsi, ptr [rsi+r24*2+0x24] +XDIS a22a: MISC BASE D52A8D744725 lea rsi, ptr [rdi+r24*2+0x25] +XDIS a230: MISC BASE D52B8D744026 lea rsi, ptr [r8+r24*2+0x26] +XDIS a236: MISC BASE D52B8D744127 lea rsi, ptr [r9+r24*2+0x27] +XDIS a23c: MISC BASE D52B8D744228 lea rsi, ptr [r10+r24*2+0x28] +XDIS a242: MISC BASE D52B8D744329 lea rsi, ptr [r11+r24*2+0x29] +XDIS a248: MISC BASE D52B8D74442A lea rsi, ptr [r12+r24*2+0x2a] +XDIS a24e: MISC BASE D52B8D74452B lea rsi, ptr [r13+r24*2+0x2b] +XDIS a254: MISC BASE D52B8D74462C lea rsi, ptr [r14+r24*2+0x2c] +XDIS a25a: MISC BASE D52B8D74472D lea rsi, ptr [r15+r24*2+0x2d] +XDIS a260: MISC BASE D53A8D74402E lea rsi, ptr [r16+r24*2+0x2e] +XDIS a266: MISC BASE D53A8D74412F lea rsi, ptr [r17+r24*2+0x2f] +XDIS a26c: MISC BASE D53A8D744230 lea rsi, ptr [r18+r24*2+0x30] +XDIS a272: MISC BASE D53A8D744331 lea rsi, ptr [r19+r24*2+0x31] +XDIS a278: MISC BASE D53A8D744432 lea rsi, ptr [r20+r24*2+0x32] +XDIS a27e: MISC BASE D53A8D744533 lea rsi, ptr [r21+r24*2+0x33] +XDIS a284: MISC BASE D53A8D744634 lea rsi, ptr [r22+r24*2+0x34] +XDIS a28a: MISC BASE D53A8D744735 lea rsi, ptr [r23+r24*2+0x35] +XDIS a290: MISC BASE D53B8D744036 lea rsi, ptr [r24+r24*2+0x36] +XDIS a296: MISC BASE D53B8D744137 lea rsi, ptr [r25+r24*2+0x37] +XDIS a29c: MISC BASE D53B8D744238 lea rsi, ptr [r26+r24*2+0x38] +XDIS a2a2: MISC BASE D53B8D744339 lea rsi, ptr [r27+r24*2+0x39] +XDIS a2a8: MISC BASE D53B8D74443A lea rsi, ptr [r28+r24*2+0x3a] +XDIS a2ae: MISC BASE D53B8D74453B lea rsi, ptr [r29+r24*2+0x3b] +XDIS a2b4: MISC BASE D53B8D74463C lea rsi, ptr [r30+r24*2+0x3c] +XDIS a2ba: MISC BASE D53B8D74473D lea rsi, ptr [r31+r24*2+0x3d] +XDIS a2c0: MISC BASE D52A8D74481F lea rsi, ptr [rax+r25*2+0x1f] +XDIS a2c6: MISC BASE D52A8D744920 lea rsi, ptr [rcx+r25*2+0x20] +XDIS a2cc: MISC BASE D52A8D744A21 lea rsi, ptr [rdx+r25*2+0x21] +XDIS a2d2: MISC BASE D52A8D744B22 lea rsi, ptr [rbx+r25*2+0x22] +XDIS a2d8: MISC BASE D52A8D744C23 lea rsi, ptr [rsp+r25*2+0x23] +XDIS a2de: MISC BASE D52A8D744D24 lea rsi, ptr [rbp+r25*2+0x24] +XDIS a2e4: MISC BASE D52A8D744E25 lea rsi, ptr [rsi+r25*2+0x25] +XDIS a2ea: MISC BASE D52A8D744F26 lea rsi, ptr [rdi+r25*2+0x26] +XDIS a2f0: MISC BASE D52B8D744827 lea rsi, ptr [r8+r25*2+0x27] +XDIS a2f6: MISC BASE D52B8D744928 lea rsi, ptr [r9+r25*2+0x28] +XDIS a2fc: MISC BASE D52B8D744A29 lea rsi, ptr [r10+r25*2+0x29] +XDIS a302: MISC BASE D52B8D744B2A lea rsi, ptr [r11+r25*2+0x2a] +XDIS a308: MISC BASE D52B8D744C2B lea rsi, ptr [r12+r25*2+0x2b] +XDIS a30e: MISC BASE D52B8D744D2C lea rsi, ptr [r13+r25*2+0x2c] +XDIS a314: MISC BASE D52B8D744E2D lea rsi, ptr [r14+r25*2+0x2d] +XDIS a31a: MISC BASE D52B8D744F2E lea rsi, ptr [r15+r25*2+0x2e] +XDIS a320: MISC BASE D53A8D74482F lea rsi, ptr [r16+r25*2+0x2f] +XDIS a326: MISC BASE D53A8D744930 lea rsi, ptr [r17+r25*2+0x30] +XDIS a32c: MISC BASE D53A8D744A31 lea rsi, ptr [r18+r25*2+0x31] +XDIS a332: MISC BASE D53A8D744B32 lea rsi, ptr [r19+r25*2+0x32] +XDIS a338: MISC BASE D53A8D744C33 lea rsi, ptr [r20+r25*2+0x33] +XDIS a33e: MISC BASE D53A8D744D34 lea rsi, ptr [r21+r25*2+0x34] +XDIS a344: MISC BASE D53A8D744E35 lea rsi, ptr [r22+r25*2+0x35] +XDIS a34a: MISC BASE D53A8D744F36 lea rsi, ptr [r23+r25*2+0x36] +XDIS a350: MISC BASE D53B8D744837 lea rsi, ptr [r24+r25*2+0x37] +XDIS a356: MISC BASE D53B8D744938 lea rsi, ptr [r25+r25*2+0x38] +XDIS a35c: MISC BASE D53B8D744A39 lea rsi, ptr [r26+r25*2+0x39] +XDIS a362: MISC BASE D53B8D744B3A lea rsi, ptr [r27+r25*2+0x3a] +XDIS a368: MISC BASE D53B8D744C3B lea rsi, ptr [r28+r25*2+0x3b] +XDIS a36e: MISC BASE D53B8D744D3C lea rsi, ptr [r29+r25*2+0x3c] +XDIS a374: MISC BASE D53B8D744E3D lea rsi, ptr [r30+r25*2+0x3d] +XDIS a37a: MISC BASE D53B8D744F3E lea rsi, ptr [r31+r25*2+0x3e] +XDIS a380: MISC BASE D52A8D745020 lea rsi, ptr [rax+r26*2+0x20] +XDIS a386: MISC BASE D52A8D745121 lea rsi, ptr [rcx+r26*2+0x21] +XDIS a38c: MISC BASE D52A8D745222 lea rsi, ptr [rdx+r26*2+0x22] +XDIS a392: MISC BASE D52A8D745323 lea rsi, ptr [rbx+r26*2+0x23] +XDIS a398: MISC BASE D52A8D745424 lea rsi, ptr [rsp+r26*2+0x24] +XDIS a39e: MISC BASE D52A8D745525 lea rsi, ptr [rbp+r26*2+0x25] +XDIS a3a4: MISC BASE D52A8D745626 lea rsi, ptr [rsi+r26*2+0x26] +XDIS a3aa: MISC BASE D52A8D745727 lea rsi, ptr [rdi+r26*2+0x27] +XDIS a3b0: MISC BASE D52B8D745028 lea rsi, ptr [r8+r26*2+0x28] +XDIS a3b6: MISC BASE D52B8D745129 lea rsi, ptr [r9+r26*2+0x29] +XDIS a3bc: MISC BASE D52B8D74522A lea rsi, ptr [r10+r26*2+0x2a] +XDIS a3c2: MISC BASE D52B8D74532B lea rsi, ptr [r11+r26*2+0x2b] +XDIS a3c8: MISC BASE D52B8D74542C lea rsi, ptr [r12+r26*2+0x2c] +XDIS a3ce: MISC BASE D52B8D74552D lea rsi, ptr [r13+r26*2+0x2d] +XDIS a3d4: MISC BASE D52B8D74562E lea rsi, ptr [r14+r26*2+0x2e] +XDIS a3da: MISC BASE D52B8D74572F lea rsi, ptr [r15+r26*2+0x2f] +XDIS a3e0: MISC BASE D53A8D745030 lea rsi, ptr [r16+r26*2+0x30] +XDIS a3e6: MISC BASE D53A8D745131 lea rsi, ptr [r17+r26*2+0x31] +XDIS a3ec: MISC BASE D53A8D745232 lea rsi, ptr [r18+r26*2+0x32] +XDIS a3f2: MISC BASE D53A8D745333 lea rsi, ptr [r19+r26*2+0x33] +XDIS a3f8: MISC BASE D53A8D745434 lea rsi, ptr [r20+r26*2+0x34] +XDIS a3fe: MISC BASE D53A8D745535 lea rsi, ptr [r21+r26*2+0x35] +XDIS a404: MISC BASE D53A8D745636 lea rsi, ptr [r22+r26*2+0x36] +XDIS a40a: MISC BASE D53A8D745737 lea rsi, ptr [r23+r26*2+0x37] +XDIS a410: MISC BASE D53B8D745038 lea rsi, ptr [r24+r26*2+0x38] +XDIS a416: MISC BASE D53B8D745139 lea rsi, ptr [r25+r26*2+0x39] +XDIS a41c: MISC BASE D53B8D74523A lea rsi, ptr [r26+r26*2+0x3a] +XDIS a422: MISC BASE D53B8D74533B lea rsi, ptr [r27+r26*2+0x3b] +XDIS a428: MISC BASE D53B8D74543C lea rsi, ptr [r28+r26*2+0x3c] +XDIS a42e: MISC BASE D53B8D74553D lea rsi, ptr [r29+r26*2+0x3d] +XDIS a434: MISC BASE D53B8D74563E lea rsi, ptr [r30+r26*2+0x3e] +XDIS a43a: MISC BASE D53B8D74573F lea rsi, ptr [r31+r26*2+0x3f] +XDIS a440: MISC BASE D52A8D745821 lea rsi, ptr [rax+r27*2+0x21] +XDIS a446: MISC BASE D52A8D745922 lea rsi, ptr [rcx+r27*2+0x22] +XDIS a44c: MISC BASE D52A8D745A23 lea rsi, ptr [rdx+r27*2+0x23] +XDIS a452: MISC BASE D52A8D745B24 lea rsi, ptr [rbx+r27*2+0x24] +XDIS a458: MISC BASE D52A8D745C25 lea rsi, ptr [rsp+r27*2+0x25] +XDIS a45e: MISC BASE D52A8D745D26 lea rsi, ptr [rbp+r27*2+0x26] +XDIS a464: MISC BASE D52A8D745E27 lea rsi, ptr [rsi+r27*2+0x27] +XDIS a46a: MISC BASE D52A8D745F28 lea rsi, ptr [rdi+r27*2+0x28] +XDIS a470: MISC BASE D52B8D745829 lea rsi, ptr [r8+r27*2+0x29] +XDIS a476: MISC BASE D52B8D74592A lea rsi, ptr [r9+r27*2+0x2a] +XDIS a47c: MISC BASE D52B8D745A2B lea rsi, ptr [r10+r27*2+0x2b] +XDIS a482: MISC BASE D52B8D745B2C lea rsi, ptr [r11+r27*2+0x2c] +XDIS a488: MISC BASE D52B8D745C2D lea rsi, ptr [r12+r27*2+0x2d] +XDIS a48e: MISC BASE D52B8D745D2E lea rsi, ptr [r13+r27*2+0x2e] +XDIS a494: MISC BASE D52B8D745E2F lea rsi, ptr [r14+r27*2+0x2f] +XDIS a49a: MISC BASE D52B8D745F30 lea rsi, ptr [r15+r27*2+0x30] +XDIS a4a0: MISC BASE D53A8D745831 lea rsi, ptr [r16+r27*2+0x31] +XDIS a4a6: MISC BASE D53A8D745932 lea rsi, ptr [r17+r27*2+0x32] +XDIS a4ac: MISC BASE D53A8D745A33 lea rsi, ptr [r18+r27*2+0x33] +XDIS a4b2: MISC BASE D53A8D745B34 lea rsi, ptr [r19+r27*2+0x34] +XDIS a4b8: MISC BASE D53A8D745C35 lea rsi, ptr [r20+r27*2+0x35] +XDIS a4be: MISC BASE D53A8D745D36 lea rsi, ptr [r21+r27*2+0x36] +XDIS a4c4: MISC BASE D53A8D745E37 lea rsi, ptr [r22+r27*2+0x37] +XDIS a4ca: MISC BASE D53A8D745F38 lea rsi, ptr [r23+r27*2+0x38] +XDIS a4d0: MISC BASE D53B8D745839 lea rsi, ptr [r24+r27*2+0x39] +XDIS a4d6: MISC BASE D53B8D74593A lea rsi, ptr [r25+r27*2+0x3a] +XDIS a4dc: MISC BASE D53B8D745A3B lea rsi, ptr [r26+r27*2+0x3b] +XDIS a4e2: MISC BASE D53B8D745B3C lea rsi, ptr [r27+r27*2+0x3c] +XDIS a4e8: MISC BASE D53B8D745C3D lea rsi, ptr [r28+r27*2+0x3d] +XDIS a4ee: MISC BASE D53B8D745D3E lea rsi, ptr [r29+r27*2+0x3e] +XDIS a4f4: MISC BASE D53B8D745E3F lea rsi, ptr [r30+r27*2+0x3f] +XDIS a4fa: MISC BASE D53B8D745F40 lea rsi, ptr [r31+r27*2+0x40] +XDIS a500: MISC BASE D52A8D746022 lea rsi, ptr [rax+r28*2+0x22] +XDIS a506: MISC BASE D52A8D746123 lea rsi, ptr [rcx+r28*2+0x23] +XDIS a50c: MISC BASE D52A8D746224 lea rsi, ptr [rdx+r28*2+0x24] +XDIS a512: MISC BASE D52A8D746325 lea rsi, ptr [rbx+r28*2+0x25] +XDIS a518: MISC BASE D52A8D746426 lea rsi, ptr [rsp+r28*2+0x26] +XDIS a51e: MISC BASE D52A8D746527 lea rsi, ptr [rbp+r28*2+0x27] +XDIS a524: MISC BASE D52A8D746628 lea rsi, ptr [rsi+r28*2+0x28] +XDIS a52a: MISC BASE D52A8D746729 lea rsi, ptr [rdi+r28*2+0x29] +XDIS a530: MISC BASE D52B8D74602A lea rsi, ptr [r8+r28*2+0x2a] +XDIS a536: MISC BASE D52B8D74612B lea rsi, ptr [r9+r28*2+0x2b] +XDIS a53c: MISC BASE D52B8D74622C lea rsi, ptr [r10+r28*2+0x2c] +XDIS a542: MISC BASE D52B8D74632D lea rsi, ptr [r11+r28*2+0x2d] +XDIS a548: MISC BASE D52B8D74642E lea rsi, ptr [r12+r28*2+0x2e] +XDIS a54e: MISC BASE D52B8D74652F lea rsi, ptr [r13+r28*2+0x2f] +XDIS a554: MISC BASE D52B8D746630 lea rsi, ptr [r14+r28*2+0x30] +XDIS a55a: MISC BASE D52B8D746731 lea rsi, ptr [r15+r28*2+0x31] +XDIS a560: MISC BASE D53A8D746032 lea rsi, ptr [r16+r28*2+0x32] +XDIS a566: MISC BASE D53A8D746133 lea rsi, ptr [r17+r28*2+0x33] +XDIS a56c: MISC BASE D53A8D746234 lea rsi, ptr [r18+r28*2+0x34] +XDIS a572: MISC BASE D53A8D746335 lea rsi, ptr [r19+r28*2+0x35] +XDIS a578: MISC BASE D53A8D746436 lea rsi, ptr [r20+r28*2+0x36] +XDIS a57e: MISC BASE D53A8D746537 lea rsi, ptr [r21+r28*2+0x37] +XDIS a584: MISC BASE D53A8D746638 lea rsi, ptr [r22+r28*2+0x38] +XDIS a58a: MISC BASE D53A8D746739 lea rsi, ptr [r23+r28*2+0x39] +XDIS a590: MISC BASE D53B8D74603A lea rsi, ptr [r24+r28*2+0x3a] +XDIS a596: MISC BASE D53B8D74613B lea rsi, ptr [r25+r28*2+0x3b] +XDIS a59c: MISC BASE D53B8D74623C lea rsi, ptr [r26+r28*2+0x3c] +XDIS a5a2: MISC BASE D53B8D74633D lea rsi, ptr [r27+r28*2+0x3d] +XDIS a5a8: MISC BASE D53B8D74643E lea rsi, ptr [r28+r28*2+0x3e] +XDIS a5ae: MISC BASE D53B8D74653F lea rsi, ptr [r29+r28*2+0x3f] +XDIS a5b4: MISC BASE D53B8D746640 lea rsi, ptr [r30+r28*2+0x40] +XDIS a5ba: MISC BASE D53B8D746741 lea rsi, ptr [r31+r28*2+0x41] +XDIS a5c0: MISC BASE D52A8D746823 lea rsi, ptr [rax+r29*2+0x23] +XDIS a5c6: MISC BASE D52A8D746924 lea rsi, ptr [rcx+r29*2+0x24] +XDIS a5cc: MISC BASE D52A8D746A25 lea rsi, ptr [rdx+r29*2+0x25] +XDIS a5d2: MISC BASE D52A8D746B26 lea rsi, ptr [rbx+r29*2+0x26] +XDIS a5d8: MISC BASE D52A8D746C27 lea rsi, ptr [rsp+r29*2+0x27] +XDIS a5de: MISC BASE D52A8D746D28 lea rsi, ptr [rbp+r29*2+0x28] +XDIS a5e4: MISC BASE D52A8D746E29 lea rsi, ptr [rsi+r29*2+0x29] +XDIS a5ea: MISC BASE D52A8D746F2A lea rsi, ptr [rdi+r29*2+0x2a] +XDIS a5f0: MISC BASE D52B8D74682B lea rsi, ptr [r8+r29*2+0x2b] +XDIS a5f6: MISC BASE D52B8D74692C lea rsi, ptr [r9+r29*2+0x2c] +XDIS a5fc: MISC BASE D52B8D746A2D lea rsi, ptr [r10+r29*2+0x2d] +XDIS a602: MISC BASE D52B8D746B2E lea rsi, ptr [r11+r29*2+0x2e] +XDIS a608: MISC BASE D52B8D746C2F lea rsi, ptr [r12+r29*2+0x2f] +XDIS a60e: MISC BASE D52B8D746D30 lea rsi, ptr [r13+r29*2+0x30] +XDIS a614: MISC BASE D52B8D746E31 lea rsi, ptr [r14+r29*2+0x31] +XDIS a61a: MISC BASE D52B8D746F32 lea rsi, ptr [r15+r29*2+0x32] +XDIS a620: MISC BASE D53A8D746833 lea rsi, ptr [r16+r29*2+0x33] +XDIS a626: MISC BASE D53A8D746934 lea rsi, ptr [r17+r29*2+0x34] +XDIS a62c: MISC BASE D53A8D746A35 lea rsi, ptr [r18+r29*2+0x35] +XDIS a632: MISC BASE D53A8D746B36 lea rsi, ptr [r19+r29*2+0x36] +XDIS a638: MISC BASE D53A8D746C37 lea rsi, ptr [r20+r29*2+0x37] +XDIS a63e: MISC BASE D53A8D746D38 lea rsi, ptr [r21+r29*2+0x38] +XDIS a644: MISC BASE D53A8D746E39 lea rsi, ptr [r22+r29*2+0x39] +XDIS a64a: MISC BASE D53A8D746F3A lea rsi, ptr [r23+r29*2+0x3a] +XDIS a650: MISC BASE D53B8D74683B lea rsi, ptr [r24+r29*2+0x3b] +XDIS a656: MISC BASE D53B8D74693C lea rsi, ptr [r25+r29*2+0x3c] +XDIS a65c: MISC BASE D53B8D746A3D lea rsi, ptr [r26+r29*2+0x3d] +XDIS a662: MISC BASE D53B8D746B3E lea rsi, ptr [r27+r29*2+0x3e] +XDIS a668: MISC BASE D53B8D746C3F lea rsi, ptr [r28+r29*2+0x3f] +XDIS a66e: MISC BASE D53B8D746D40 lea rsi, ptr [r29+r29*2+0x40] +XDIS a674: MISC BASE D53B8D746E41 lea rsi, ptr [r30+r29*2+0x41] +XDIS a67a: MISC BASE D53B8D746F42 lea rsi, ptr [r31+r29*2+0x42] +XDIS a680: MISC BASE D52A8D747024 lea rsi, ptr [rax+r30*2+0x24] +XDIS a686: MISC BASE D52A8D747125 lea rsi, ptr [rcx+r30*2+0x25] +XDIS a68c: MISC BASE D52A8D747226 lea rsi, ptr [rdx+r30*2+0x26] +XDIS a692: MISC BASE D52A8D747327 lea rsi, ptr [rbx+r30*2+0x27] +XDIS a698: MISC BASE D52A8D747428 lea rsi, ptr [rsp+r30*2+0x28] +XDIS a69e: MISC BASE D52A8D747529 lea rsi, ptr [rbp+r30*2+0x29] +XDIS a6a4: MISC BASE D52A8D74762A lea rsi, ptr [rsi+r30*2+0x2a] +XDIS a6aa: MISC BASE D52A8D74772B lea rsi, ptr [rdi+r30*2+0x2b] +XDIS a6b0: MISC BASE D52B8D74702C lea rsi, ptr [r8+r30*2+0x2c] +XDIS a6b6: MISC BASE D52B8D74712D lea rsi, ptr [r9+r30*2+0x2d] +XDIS a6bc: MISC BASE D52B8D74722E lea rsi, ptr [r10+r30*2+0x2e] +XDIS a6c2: MISC BASE D52B8D74732F lea rsi, ptr [r11+r30*2+0x2f] +XDIS a6c8: MISC BASE D52B8D747430 lea rsi, ptr [r12+r30*2+0x30] +XDIS a6ce: MISC BASE D52B8D747531 lea rsi, ptr [r13+r30*2+0x31] +XDIS a6d4: MISC BASE D52B8D747632 lea rsi, ptr [r14+r30*2+0x32] +XDIS a6da: MISC BASE D52B8D747733 lea rsi, ptr [r15+r30*2+0x33] +XDIS a6e0: MISC BASE D53A8D747034 lea rsi, ptr [r16+r30*2+0x34] +XDIS a6e6: MISC BASE D53A8D747135 lea rsi, ptr [r17+r30*2+0x35] +XDIS a6ec: MISC BASE D53A8D747236 lea rsi, ptr [r18+r30*2+0x36] +XDIS a6f2: MISC BASE D53A8D747337 lea rsi, ptr [r19+r30*2+0x37] +XDIS a6f8: MISC BASE D53A8D747438 lea rsi, ptr [r20+r30*2+0x38] +XDIS a6fe: MISC BASE D53A8D747539 lea rsi, ptr [r21+r30*2+0x39] +XDIS a704: MISC BASE D53A8D74763A lea rsi, ptr [r22+r30*2+0x3a] +XDIS a70a: MISC BASE D53A8D74773B lea rsi, ptr [r23+r30*2+0x3b] +XDIS a710: MISC BASE D53B8D74703C lea rsi, ptr [r24+r30*2+0x3c] +XDIS a716: MISC BASE D53B8D74713D lea rsi, ptr [r25+r30*2+0x3d] +XDIS a71c: MISC BASE D53B8D74723E lea rsi, ptr [r26+r30*2+0x3e] +XDIS a722: MISC BASE D53B8D74733F lea rsi, ptr [r27+r30*2+0x3f] +XDIS a728: MISC BASE D53B8D747440 lea rsi, ptr [r28+r30*2+0x40] +XDIS a72e: MISC BASE D53B8D747541 lea rsi, ptr [r29+r30*2+0x41] +XDIS a734: MISC BASE D53B8D747642 lea rsi, ptr [r30+r30*2+0x42] +XDIS a73a: MISC BASE D53B8D747743 lea rsi, ptr [r31+r30*2+0x43] +XDIS a740: MISC BASE D52A8D747825 lea rsi, ptr [rax+r31*2+0x25] +XDIS a746: MISC BASE D52A8D747926 lea rsi, ptr [rcx+r31*2+0x26] +XDIS a74c: MISC BASE D52A8D747A27 lea rsi, ptr [rdx+r31*2+0x27] +XDIS a752: MISC BASE D52A8D747B28 lea rsi, ptr [rbx+r31*2+0x28] +XDIS a758: MISC BASE D52A8D747C29 lea rsi, ptr [rsp+r31*2+0x29] +XDIS a75e: MISC BASE D52A8D747D2A lea rsi, ptr [rbp+r31*2+0x2a] +XDIS a764: MISC BASE D52A8D747E2B lea rsi, ptr [rsi+r31*2+0x2b] +XDIS a76a: MISC BASE D52A8D747F2C lea rsi, ptr [rdi+r31*2+0x2c] +XDIS a770: MISC BASE D52B8D74782D lea rsi, ptr [r8+r31*2+0x2d] +XDIS a776: MISC BASE D52B8D74792E lea rsi, ptr [r9+r31*2+0x2e] +XDIS a77c: MISC BASE D52B8D747A2F lea rsi, ptr [r10+r31*2+0x2f] +XDIS a782: MISC BASE D52B8D747B30 lea rsi, ptr [r11+r31*2+0x30] +XDIS a788: MISC BASE D52B8D747C31 lea rsi, ptr [r12+r31*2+0x31] +XDIS a78e: MISC BASE D52B8D747D32 lea rsi, ptr [r13+r31*2+0x32] +XDIS a794: MISC BASE D52B8D747E33 lea rsi, ptr [r14+r31*2+0x33] +XDIS a79a: MISC BASE D52B8D747F34 lea rsi, ptr [r15+r31*2+0x34] +XDIS a7a0: MISC BASE D53A8D747835 lea rsi, ptr [r16+r31*2+0x35] +XDIS a7a6: MISC BASE D53A8D747936 lea rsi, ptr [r17+r31*2+0x36] +XDIS a7ac: MISC BASE D53A8D747A37 lea rsi, ptr [r18+r31*2+0x37] +XDIS a7b2: MISC BASE D53A8D747B38 lea rsi, ptr [r19+r31*2+0x38] +XDIS a7b8: MISC BASE D53A8D747C39 lea rsi, ptr [r20+r31*2+0x39] +XDIS a7be: MISC BASE D53A8D747D3A lea rsi, ptr [r21+r31*2+0x3a] +XDIS a7c4: MISC BASE D53A8D747E3B lea rsi, ptr [r22+r31*2+0x3b] +XDIS a7ca: MISC BASE D53A8D747F3C lea rsi, ptr [r23+r31*2+0x3c] +XDIS a7d0: MISC BASE D53B8D74783D lea rsi, ptr [r24+r31*2+0x3d] +XDIS a7d6: MISC BASE D53B8D74793E lea rsi, ptr [r25+r31*2+0x3e] +XDIS a7dc: MISC BASE D53B8D747A3F lea rsi, ptr [r26+r31*2+0x3f] +XDIS a7e2: MISC BASE D53B8D747B40 lea rsi, ptr [r27+r31*2+0x40] +XDIS a7e8: MISC BASE D53B8D747C41 lea rsi, ptr [r28+r31*2+0x41] +XDIS a7ee: MISC BASE D53B8D747D42 lea rsi, ptr [r29+r31*2+0x42] +XDIS a7f4: MISC BASE D53B8D747E43 lea rsi, ptr [r30+r31*2+0x43] +XDIS a7fa: MISC BASE D53B8D747F44 lea rsi, ptr [r31+r31*2+0x44] +XDIS a800: MISC BASE D5088D7C4007 lea rdi, ptr [rax+rax*2+0x7] +XDIS a806: MISC BASE D5088D7C4108 lea rdi, ptr [rcx+rax*2+0x8] +XDIS a80c: MISC BASE D5088D7C4209 lea rdi, ptr [rdx+rax*2+0x9] +XDIS a812: MISC BASE D5088D7C430A lea rdi, ptr [rbx+rax*2+0xa] +XDIS a818: MISC BASE D5088D7C440B lea rdi, ptr [rsp+rax*2+0xb] +XDIS a81e: MISC BASE D5088D7C450C lea rdi, ptr [rbp+rax*2+0xc] +XDIS a824: MISC BASE D5088D7C460D lea rdi, ptr [rsi+rax*2+0xd] +XDIS a82a: MISC BASE D5088D7C470E lea rdi, ptr [rdi+rax*2+0xe] +XDIS a830: MISC BASE D5098D7C400F lea rdi, ptr [r8+rax*2+0xf] +XDIS a836: MISC BASE D5098D7C4110 lea rdi, ptr [r9+rax*2+0x10] +XDIS a83c: MISC BASE D5098D7C4211 lea rdi, ptr [r10+rax*2+0x11] +XDIS a842: MISC BASE D5098D7C4312 lea rdi, ptr [r11+rax*2+0x12] +XDIS a848: MISC BASE D5098D7C4413 lea rdi, ptr [r12+rax*2+0x13] +XDIS a84e: MISC BASE D5098D7C4514 lea rdi, ptr [r13+rax*2+0x14] +XDIS a854: MISC BASE D5098D7C4615 lea rdi, ptr [r14+rax*2+0x15] +XDIS a85a: MISC BASE D5098D7C4716 lea rdi, ptr [r15+rax*2+0x16] +XDIS a860: MISC BASE D5188D7C4017 lea rdi, ptr [r16+rax*2+0x17] +XDIS a866: MISC BASE D5188D7C4118 lea rdi, ptr [r17+rax*2+0x18] +XDIS a86c: MISC BASE D5188D7C4219 lea rdi, ptr [r18+rax*2+0x19] +XDIS a872: MISC BASE D5188D7C431A lea rdi, ptr [r19+rax*2+0x1a] +XDIS a878: MISC BASE D5188D7C441B lea rdi, ptr [r20+rax*2+0x1b] +XDIS a87e: MISC BASE D5188D7C451C lea rdi, ptr [r21+rax*2+0x1c] +XDIS a884: MISC BASE D5188D7C461D lea rdi, ptr [r22+rax*2+0x1d] +XDIS a88a: MISC BASE D5188D7C471E lea rdi, ptr [r23+rax*2+0x1e] +XDIS a890: MISC BASE D5198D7C401F lea rdi, ptr [r24+rax*2+0x1f] +XDIS a896: MISC BASE D5198D7C4120 lea rdi, ptr [r25+rax*2+0x20] +XDIS a89c: MISC BASE D5198D7C4221 lea rdi, ptr [r26+rax*2+0x21] +XDIS a8a2: MISC BASE D5198D7C4322 lea rdi, ptr [r27+rax*2+0x22] +XDIS a8a8: MISC BASE D5198D7C4423 lea rdi, ptr [r28+rax*2+0x23] +XDIS a8ae: MISC BASE D5198D7C4524 lea rdi, ptr [r29+rax*2+0x24] +XDIS a8b4: MISC BASE D5198D7C4625 lea rdi, ptr [r30+rax*2+0x25] +XDIS a8ba: MISC BASE D5198D7C4726 lea rdi, ptr [r31+rax*2+0x26] +XDIS a8c0: MISC BASE D5088D7C4808 lea rdi, ptr [rax+rcx*2+0x8] +XDIS a8c6: MISC BASE D5088D7C4909 lea rdi, ptr [rcx+rcx*2+0x9] +XDIS a8cc: MISC BASE D5088D7C4A0A lea rdi, ptr [rdx+rcx*2+0xa] +XDIS a8d2: MISC BASE D5088D7C4B0B lea rdi, ptr [rbx+rcx*2+0xb] +XDIS a8d8: MISC BASE D5088D7C4C0C lea rdi, ptr [rsp+rcx*2+0xc] +XDIS a8de: MISC BASE D5088D7C4D0D lea rdi, ptr [rbp+rcx*2+0xd] +XDIS a8e4: MISC BASE D5088D7C4E0E lea rdi, ptr [rsi+rcx*2+0xe] +XDIS a8ea: MISC BASE D5088D7C4F0F lea rdi, ptr [rdi+rcx*2+0xf] +XDIS a8f0: MISC BASE D5098D7C4810 lea rdi, ptr [r8+rcx*2+0x10] +XDIS a8f6: MISC BASE D5098D7C4911 lea rdi, ptr [r9+rcx*2+0x11] +XDIS a8fc: MISC BASE D5098D7C4A12 lea rdi, ptr [r10+rcx*2+0x12] +XDIS a902: MISC BASE D5098D7C4B13 lea rdi, ptr [r11+rcx*2+0x13] +XDIS a908: MISC BASE D5098D7C4C14 lea rdi, ptr [r12+rcx*2+0x14] +XDIS a90e: MISC BASE D5098D7C4D15 lea rdi, ptr [r13+rcx*2+0x15] +XDIS a914: MISC BASE D5098D7C4E16 lea rdi, ptr [r14+rcx*2+0x16] +XDIS a91a: MISC BASE D5098D7C4F17 lea rdi, ptr [r15+rcx*2+0x17] +XDIS a920: MISC BASE D5188D7C4818 lea rdi, ptr [r16+rcx*2+0x18] +XDIS a926: MISC BASE D5188D7C4919 lea rdi, ptr [r17+rcx*2+0x19] +XDIS a92c: MISC BASE D5188D7C4A1A lea rdi, ptr [r18+rcx*2+0x1a] +XDIS a932: MISC BASE D5188D7C4B1B lea rdi, ptr [r19+rcx*2+0x1b] +XDIS a938: MISC BASE D5188D7C4C1C lea rdi, ptr [r20+rcx*2+0x1c] +XDIS a93e: MISC BASE D5188D7C4D1D lea rdi, ptr [r21+rcx*2+0x1d] +XDIS a944: MISC BASE D5188D7C4E1E lea rdi, ptr [r22+rcx*2+0x1e] +XDIS a94a: MISC BASE D5188D7C4F1F lea rdi, ptr [r23+rcx*2+0x1f] +XDIS a950: MISC BASE D5198D7C4820 lea rdi, ptr [r24+rcx*2+0x20] +XDIS a956: MISC BASE D5198D7C4921 lea rdi, ptr [r25+rcx*2+0x21] +XDIS a95c: MISC BASE D5198D7C4A22 lea rdi, ptr [r26+rcx*2+0x22] +XDIS a962: MISC BASE D5198D7C4B23 lea rdi, ptr [r27+rcx*2+0x23] +XDIS a968: MISC BASE D5198D7C4C24 lea rdi, ptr [r28+rcx*2+0x24] +XDIS a96e: MISC BASE D5198D7C4D25 lea rdi, ptr [r29+rcx*2+0x25] +XDIS a974: MISC BASE D5198D7C4E26 lea rdi, ptr [r30+rcx*2+0x26] +XDIS a97a: MISC BASE D5198D7C4F27 lea rdi, ptr [r31+rcx*2+0x27] +XDIS a980: MISC BASE D5088D7C5009 lea rdi, ptr [rax+rdx*2+0x9] +XDIS a986: MISC BASE D5088D7C510A lea rdi, ptr [rcx+rdx*2+0xa] +XDIS a98c: MISC BASE D5088D7C520B lea rdi, ptr [rdx+rdx*2+0xb] +XDIS a992: MISC BASE D5088D7C530C lea rdi, ptr [rbx+rdx*2+0xc] +XDIS a998: MISC BASE D5088D7C540D lea rdi, ptr [rsp+rdx*2+0xd] +XDIS a99e: MISC BASE D5088D7C550E lea rdi, ptr [rbp+rdx*2+0xe] +XDIS a9a4: MISC BASE D5088D7C560F lea rdi, ptr [rsi+rdx*2+0xf] +XDIS a9aa: MISC BASE D5088D7C5710 lea rdi, ptr [rdi+rdx*2+0x10] +XDIS a9b0: MISC BASE D5098D7C5011 lea rdi, ptr [r8+rdx*2+0x11] +XDIS a9b6: MISC BASE D5098D7C5112 lea rdi, ptr [r9+rdx*2+0x12] +XDIS a9bc: MISC BASE D5098D7C5213 lea rdi, ptr [r10+rdx*2+0x13] +XDIS a9c2: MISC BASE D5098D7C5314 lea rdi, ptr [r11+rdx*2+0x14] +XDIS a9c8: MISC BASE D5098D7C5415 lea rdi, ptr [r12+rdx*2+0x15] +XDIS a9ce: MISC BASE D5098D7C5516 lea rdi, ptr [r13+rdx*2+0x16] +XDIS a9d4: MISC BASE D5098D7C5617 lea rdi, ptr [r14+rdx*2+0x17] +XDIS a9da: MISC BASE D5098D7C5718 lea rdi, ptr [r15+rdx*2+0x18] +XDIS a9e0: MISC BASE D5188D7C5019 lea rdi, ptr [r16+rdx*2+0x19] +XDIS a9e6: MISC BASE D5188D7C511A lea rdi, ptr [r17+rdx*2+0x1a] +XDIS a9ec: MISC BASE D5188D7C521B lea rdi, ptr [r18+rdx*2+0x1b] +XDIS a9f2: MISC BASE D5188D7C531C lea rdi, ptr [r19+rdx*2+0x1c] +XDIS a9f8: MISC BASE D5188D7C541D lea rdi, ptr [r20+rdx*2+0x1d] +XDIS a9fe: MISC BASE D5188D7C551E lea rdi, ptr [r21+rdx*2+0x1e] +XDIS aa04: MISC BASE D5188D7C561F lea rdi, ptr [r22+rdx*2+0x1f] +XDIS aa0a: MISC BASE D5188D7C5720 lea rdi, ptr [r23+rdx*2+0x20] +XDIS aa10: MISC BASE D5198D7C5021 lea rdi, ptr [r24+rdx*2+0x21] +XDIS aa16: MISC BASE D5198D7C5122 lea rdi, ptr [r25+rdx*2+0x22] +XDIS aa1c: MISC BASE D5198D7C5223 lea rdi, ptr [r26+rdx*2+0x23] +XDIS aa22: MISC BASE D5198D7C5324 lea rdi, ptr [r27+rdx*2+0x24] +XDIS aa28: MISC BASE D5198D7C5425 lea rdi, ptr [r28+rdx*2+0x25] +XDIS aa2e: MISC BASE D5198D7C5526 lea rdi, ptr [r29+rdx*2+0x26] +XDIS aa34: MISC BASE D5198D7C5627 lea rdi, ptr [r30+rdx*2+0x27] +XDIS aa3a: MISC BASE D5198D7C5728 lea rdi, ptr [r31+rdx*2+0x28] +XDIS aa40: MISC BASE D5088D7C580A lea rdi, ptr [rax+rbx*2+0xa] +XDIS aa46: MISC BASE D5088D7C590B lea rdi, ptr [rcx+rbx*2+0xb] +XDIS aa4c: MISC BASE D5088D7C5A0C lea rdi, ptr [rdx+rbx*2+0xc] +XDIS aa52: MISC BASE D5088D7C5B0D lea rdi, ptr [rbx+rbx*2+0xd] +XDIS aa58: MISC BASE D5088D7C5C0E lea rdi, ptr [rsp+rbx*2+0xe] +XDIS aa5e: MISC BASE D5088D7C5D0F lea rdi, ptr [rbp+rbx*2+0xf] +XDIS aa64: MISC BASE D5088D7C5E10 lea rdi, ptr [rsi+rbx*2+0x10] +XDIS aa6a: MISC BASE D5088D7C5F11 lea rdi, ptr [rdi+rbx*2+0x11] +XDIS aa70: MISC BASE D5098D7C5812 lea rdi, ptr [r8+rbx*2+0x12] +XDIS aa76: MISC BASE D5098D7C5913 lea rdi, ptr [r9+rbx*2+0x13] +XDIS aa7c: MISC BASE D5098D7C5A14 lea rdi, ptr [r10+rbx*2+0x14] +XDIS aa82: MISC BASE D5098D7C5B15 lea rdi, ptr [r11+rbx*2+0x15] +XDIS aa88: MISC BASE D5098D7C5C16 lea rdi, ptr [r12+rbx*2+0x16] +XDIS aa8e: MISC BASE D5098D7C5D17 lea rdi, ptr [r13+rbx*2+0x17] +XDIS aa94: MISC BASE D5098D7C5E18 lea rdi, ptr [r14+rbx*2+0x18] +XDIS aa9a: MISC BASE D5098D7C5F19 lea rdi, ptr [r15+rbx*2+0x19] +XDIS aaa0: MISC BASE D5188D7C581A lea rdi, ptr [r16+rbx*2+0x1a] +XDIS aaa6: MISC BASE D5188D7C591B lea rdi, ptr [r17+rbx*2+0x1b] +XDIS aaac: MISC BASE D5188D7C5A1C lea rdi, ptr [r18+rbx*2+0x1c] +XDIS aab2: MISC BASE D5188D7C5B1D lea rdi, ptr [r19+rbx*2+0x1d] +XDIS aab8: MISC BASE D5188D7C5C1E lea rdi, ptr [r20+rbx*2+0x1e] +XDIS aabe: MISC BASE D5188D7C5D1F lea rdi, ptr [r21+rbx*2+0x1f] +XDIS aac4: MISC BASE D5188D7C5E20 lea rdi, ptr [r22+rbx*2+0x20] +XDIS aaca: MISC BASE D5188D7C5F21 lea rdi, ptr [r23+rbx*2+0x21] +XDIS aad0: MISC BASE D5198D7C5822 lea rdi, ptr [r24+rbx*2+0x22] +XDIS aad6: MISC BASE D5198D7C5923 lea rdi, ptr [r25+rbx*2+0x23] +XDIS aadc: MISC BASE D5198D7C5A24 lea rdi, ptr [r26+rbx*2+0x24] +XDIS aae2: MISC BASE D5198D7C5B25 lea rdi, ptr [r27+rbx*2+0x25] +XDIS aae8: MISC BASE D5198D7C5C26 lea rdi, ptr [r28+rbx*2+0x26] +XDIS aaee: MISC BASE D5198D7C5D27 lea rdi, ptr [r29+rbx*2+0x27] +XDIS aaf4: MISC BASE D5198D7C5E28 lea rdi, ptr [r30+rbx*2+0x28] +XDIS aafa: MISC BASE D5198D7C5F29 lea rdi, ptr [r31+rbx*2+0x29] +XDIS ab00: MISC BASE D5088D7C600B lea rdi, ptr [rax+0xb] +XDIS ab06: MISC BASE D5088D7C610C lea rdi, ptr [rcx+0xc] +XDIS ab0c: MISC BASE D5088D7C620D lea rdi, ptr [rdx+0xd] +XDIS ab12: MISC BASE D5088D7C630E lea rdi, ptr [rbx+0xe] +XDIS ab18: MISC BASE D5088D7C640F lea rdi, ptr [rsp+0xf] +XDIS ab1e: MISC BASE D5088D7C6510 lea rdi, ptr [rbp+0x10] +XDIS ab24: MISC BASE D5088D7C6611 lea rdi, ptr [rsi+0x11] +XDIS ab2a: MISC BASE D5088D7C6712 lea rdi, ptr [rdi+0x12] +XDIS ab30: MISC BASE D5098D7C6013 lea rdi, ptr [r8+0x13] +XDIS ab36: MISC BASE D5098D7C6114 lea rdi, ptr [r9+0x14] +XDIS ab3c: MISC BASE D5098D7C6215 lea rdi, ptr [r10+0x15] +XDIS ab42: MISC BASE D5098D7C6316 lea rdi, ptr [r11+0x16] +XDIS ab48: MISC BASE D5098D7C6417 lea rdi, ptr [r12+0x17] +XDIS ab4e: MISC BASE D5098D7C6518 lea rdi, ptr [r13+0x18] +XDIS ab54: MISC BASE D5098D7C6619 lea rdi, ptr [r14+0x19] +XDIS ab5a: MISC BASE D5098D7C671A lea rdi, ptr [r15+0x1a] +XDIS ab60: MISC BASE D5188D7C601B lea rdi, ptr [r16+0x1b] +XDIS ab66: MISC BASE D5188D7C611C lea rdi, ptr [r17+0x1c] +XDIS ab6c: MISC BASE D5188D7C621D lea rdi, ptr [r18+0x1d] +XDIS ab72: MISC BASE D5188D7C631E lea rdi, ptr [r19+0x1e] +XDIS ab78: MISC BASE D5188D7C641F lea rdi, ptr [r20+0x1f] +XDIS ab7e: MISC BASE D5188D7C6520 lea rdi, ptr [r21+0x20] +XDIS ab84: MISC BASE D5188D7C6621 lea rdi, ptr [r22+0x21] +XDIS ab8a: MISC BASE D5188D7C6722 lea rdi, ptr [r23+0x22] +XDIS ab90: MISC BASE D5198D7C6023 lea rdi, ptr [r24+0x23] +XDIS ab96: MISC BASE D5198D7C6124 lea rdi, ptr [r25+0x24] +XDIS ab9c: MISC BASE D5198D7C6225 lea rdi, ptr [r26+0x25] +XDIS aba2: MISC BASE D5198D7C6326 lea rdi, ptr [r27+0x26] +XDIS aba8: MISC BASE D5198D7C6427 lea rdi, ptr [r28+0x27] +XDIS abae: MISC BASE D5198D7C6528 lea rdi, ptr [r29+0x28] +XDIS abb4: MISC BASE D5198D7C6629 lea rdi, ptr [r30+0x29] +XDIS abba: MISC BASE D5198D7C672A lea rdi, ptr [r31+0x2a] +XDIS abc0: MISC BASE D5088D7C680C lea rdi, ptr [rax+rbp*2+0xc] +XDIS abc6: MISC BASE D5088D7C690D lea rdi, ptr [rcx+rbp*2+0xd] +XDIS abcc: MISC BASE D5088D7C6A0E lea rdi, ptr [rdx+rbp*2+0xe] +XDIS abd2: MISC BASE D5088D7C6B0F lea rdi, ptr [rbx+rbp*2+0xf] +XDIS abd8: MISC BASE D5088D7C6C10 lea rdi, ptr [rsp+rbp*2+0x10] +XDIS abde: MISC BASE D5088D7C6D11 lea rdi, ptr [rbp+rbp*2+0x11] +XDIS abe4: MISC BASE D5088D7C6E12 lea rdi, ptr [rsi+rbp*2+0x12] +XDIS abea: MISC BASE D5088D7C6F13 lea rdi, ptr [rdi+rbp*2+0x13] +XDIS abf0: MISC BASE D5098D7C6814 lea rdi, ptr [r8+rbp*2+0x14] +XDIS abf6: MISC BASE D5098D7C6915 lea rdi, ptr [r9+rbp*2+0x15] +XDIS abfc: MISC BASE D5098D7C6A16 lea rdi, ptr [r10+rbp*2+0x16] +XDIS ac02: MISC BASE D5098D7C6B17 lea rdi, ptr [r11+rbp*2+0x17] +XDIS ac08: MISC BASE D5098D7C6C18 lea rdi, ptr [r12+rbp*2+0x18] +XDIS ac0e: MISC BASE D5098D7C6D19 lea rdi, ptr [r13+rbp*2+0x19] +XDIS ac14: MISC BASE D5098D7C6E1A lea rdi, ptr [r14+rbp*2+0x1a] +XDIS ac1a: MISC BASE D5098D7C6F1B lea rdi, ptr [r15+rbp*2+0x1b] +XDIS ac20: MISC BASE D5188D7C681C lea rdi, ptr [r16+rbp*2+0x1c] +XDIS ac26: MISC BASE D5188D7C691D lea rdi, ptr [r17+rbp*2+0x1d] +XDIS ac2c: MISC BASE D5188D7C6A1E lea rdi, ptr [r18+rbp*2+0x1e] +XDIS ac32: MISC BASE D5188D7C6B1F lea rdi, ptr [r19+rbp*2+0x1f] +XDIS ac38: MISC BASE D5188D7C6C20 lea rdi, ptr [r20+rbp*2+0x20] +XDIS ac3e: MISC BASE D5188D7C6D21 lea rdi, ptr [r21+rbp*2+0x21] +XDIS ac44: MISC BASE D5188D7C6E22 lea rdi, ptr [r22+rbp*2+0x22] +XDIS ac4a: MISC BASE D5188D7C6F23 lea rdi, ptr [r23+rbp*2+0x23] +XDIS ac50: MISC BASE D5198D7C6824 lea rdi, ptr [r24+rbp*2+0x24] +XDIS ac56: MISC BASE D5198D7C6925 lea rdi, ptr [r25+rbp*2+0x25] +XDIS ac5c: MISC BASE D5198D7C6A26 lea rdi, ptr [r26+rbp*2+0x26] +XDIS ac62: MISC BASE D5198D7C6B27 lea rdi, ptr [r27+rbp*2+0x27] +XDIS ac68: MISC BASE D5198D7C6C28 lea rdi, ptr [r28+rbp*2+0x28] +XDIS ac6e: MISC BASE D5198D7C6D29 lea rdi, ptr [r29+rbp*2+0x29] +XDIS ac74: MISC BASE D5198D7C6E2A lea rdi, ptr [r30+rbp*2+0x2a] +XDIS ac7a: MISC BASE D5198D7C6F2B lea rdi, ptr [r31+rbp*2+0x2b] +XDIS ac80: MISC BASE D5088D7C700D lea rdi, ptr [rax+rsi*2+0xd] +XDIS ac86: MISC BASE D5088D7C710E lea rdi, ptr [rcx+rsi*2+0xe] +XDIS ac8c: MISC BASE D5088D7C720F lea rdi, ptr [rdx+rsi*2+0xf] +XDIS ac92: MISC BASE D5088D7C7310 lea rdi, ptr [rbx+rsi*2+0x10] +XDIS ac98: MISC BASE D5088D7C7411 lea rdi, ptr [rsp+rsi*2+0x11] +XDIS ac9e: MISC BASE D5088D7C7512 lea rdi, ptr [rbp+rsi*2+0x12] +XDIS aca4: MISC BASE D5088D7C7613 lea rdi, ptr [rsi+rsi*2+0x13] +XDIS acaa: MISC BASE D5088D7C7714 lea rdi, ptr [rdi+rsi*2+0x14] +XDIS acb0: MISC BASE D5098D7C7015 lea rdi, ptr [r8+rsi*2+0x15] +XDIS acb6: MISC BASE D5098D7C7116 lea rdi, ptr [r9+rsi*2+0x16] +XDIS acbc: MISC BASE D5098D7C7217 lea rdi, ptr [r10+rsi*2+0x17] +XDIS acc2: MISC BASE D5098D7C7318 lea rdi, ptr [r11+rsi*2+0x18] +XDIS acc8: MISC BASE D5098D7C7419 lea rdi, ptr [r12+rsi*2+0x19] +XDIS acce: MISC BASE D5098D7C751A lea rdi, ptr [r13+rsi*2+0x1a] +XDIS acd4: MISC BASE D5098D7C761B lea rdi, ptr [r14+rsi*2+0x1b] +XDIS acda: MISC BASE D5098D7C771C lea rdi, ptr [r15+rsi*2+0x1c] +XDIS ace0: MISC BASE D5188D7C701D lea rdi, ptr [r16+rsi*2+0x1d] +XDIS ace6: MISC BASE D5188D7C711E lea rdi, ptr [r17+rsi*2+0x1e] +XDIS acec: MISC BASE D5188D7C721F lea rdi, ptr [r18+rsi*2+0x1f] +XDIS acf2: MISC BASE D5188D7C7320 lea rdi, ptr [r19+rsi*2+0x20] +XDIS acf8: MISC BASE D5188D7C7421 lea rdi, ptr [r20+rsi*2+0x21] +XDIS acfe: MISC BASE D5188D7C7522 lea rdi, ptr [r21+rsi*2+0x22] +XDIS ad04: MISC BASE D5188D7C7623 lea rdi, ptr [r22+rsi*2+0x23] +XDIS ad0a: MISC BASE D5188D7C7724 lea rdi, ptr [r23+rsi*2+0x24] +XDIS ad10: MISC BASE D5198D7C7025 lea rdi, ptr [r24+rsi*2+0x25] +XDIS ad16: MISC BASE D5198D7C7126 lea rdi, ptr [r25+rsi*2+0x26] +XDIS ad1c: MISC BASE D5198D7C7227 lea rdi, ptr [r26+rsi*2+0x27] +XDIS ad22: MISC BASE D5198D7C7328 lea rdi, ptr [r27+rsi*2+0x28] +XDIS ad28: MISC BASE D5198D7C7429 lea rdi, ptr [r28+rsi*2+0x29] +XDIS ad2e: MISC BASE D5198D7C752A lea rdi, ptr [r29+rsi*2+0x2a] +XDIS ad34: MISC BASE D5198D7C762B lea rdi, ptr [r30+rsi*2+0x2b] +XDIS ad3a: MISC BASE D5198D7C772C lea rdi, ptr [r31+rsi*2+0x2c] +XDIS ad40: MISC BASE D5088D7C780E lea rdi, ptr [rax+rdi*2+0xe] +XDIS ad46: MISC BASE D5088D7C790F lea rdi, ptr [rcx+rdi*2+0xf] +XDIS ad4c: MISC BASE D5088D7C7A10 lea rdi, ptr [rdx+rdi*2+0x10] +XDIS ad52: MISC BASE D5088D7C7B11 lea rdi, ptr [rbx+rdi*2+0x11] +XDIS ad58: MISC BASE D5088D7C7C12 lea rdi, ptr [rsp+rdi*2+0x12] +XDIS ad5e: MISC BASE D5088D7C7D13 lea rdi, ptr [rbp+rdi*2+0x13] +XDIS ad64: MISC BASE D5088D7C7E14 lea rdi, ptr [rsi+rdi*2+0x14] +XDIS ad6a: MISC BASE D5088D7C7F15 lea rdi, ptr [rdi+rdi*2+0x15] +XDIS ad70: MISC BASE D5098D7C7816 lea rdi, ptr [r8+rdi*2+0x16] +XDIS ad76: MISC BASE D5098D7C7917 lea rdi, ptr [r9+rdi*2+0x17] +XDIS ad7c: MISC BASE D5098D7C7A18 lea rdi, ptr [r10+rdi*2+0x18] +XDIS ad82: MISC BASE D5098D7C7B19 lea rdi, ptr [r11+rdi*2+0x19] +XDIS ad88: MISC BASE D5098D7C7C1A lea rdi, ptr [r12+rdi*2+0x1a] +XDIS ad8e: MISC BASE D5098D7C7D1B lea rdi, ptr [r13+rdi*2+0x1b] +XDIS ad94: MISC BASE D5098D7C7E1C lea rdi, ptr [r14+rdi*2+0x1c] +XDIS ad9a: MISC BASE D5098D7C7F1D lea rdi, ptr [r15+rdi*2+0x1d] +XDIS ada0: MISC BASE D5188D7C781E lea rdi, ptr [r16+rdi*2+0x1e] +XDIS ada6: MISC BASE D5188D7C791F lea rdi, ptr [r17+rdi*2+0x1f] +XDIS adac: MISC BASE D5188D7C7A20 lea rdi, ptr [r18+rdi*2+0x20] +XDIS adb2: MISC BASE D5188D7C7B21 lea rdi, ptr [r19+rdi*2+0x21] +XDIS adb8: MISC BASE D5188D7C7C22 lea rdi, ptr [r20+rdi*2+0x22] +XDIS adbe: MISC BASE D5188D7C7D23 lea rdi, ptr [r21+rdi*2+0x23] +XDIS adc4: MISC BASE D5188D7C7E24 lea rdi, ptr [r22+rdi*2+0x24] +XDIS adca: MISC BASE D5188D7C7F25 lea rdi, ptr [r23+rdi*2+0x25] +XDIS add0: MISC BASE D5198D7C7826 lea rdi, ptr [r24+rdi*2+0x26] +XDIS add6: MISC BASE D5198D7C7927 lea rdi, ptr [r25+rdi*2+0x27] +XDIS addc: MISC BASE D5198D7C7A28 lea rdi, ptr [r26+rdi*2+0x28] +XDIS ade2: MISC BASE D5198D7C7B29 lea rdi, ptr [r27+rdi*2+0x29] +XDIS ade8: MISC BASE D5198D7C7C2A lea rdi, ptr [r28+rdi*2+0x2a] +XDIS adee: MISC BASE D5198D7C7D2B lea rdi, ptr [r29+rdi*2+0x2b] +XDIS adf4: MISC BASE D5198D7C7E2C lea rdi, ptr [r30+rdi*2+0x2c] +XDIS adfa: MISC BASE D5198D7C7F2D lea rdi, ptr [r31+rdi*2+0x2d] +XDIS ae00: MISC BASE D50A8D7C400F lea rdi, ptr [rax+r8*2+0xf] +XDIS ae06: MISC BASE D50A8D7C4110 lea rdi, ptr [rcx+r8*2+0x10] +XDIS ae0c: MISC BASE D50A8D7C4211 lea rdi, ptr [rdx+r8*2+0x11] +XDIS ae12: MISC BASE D50A8D7C4312 lea rdi, ptr [rbx+r8*2+0x12] +XDIS ae18: MISC BASE D50A8D7C4413 lea rdi, ptr [rsp+r8*2+0x13] +XDIS ae1e: MISC BASE D50A8D7C4514 lea rdi, ptr [rbp+r8*2+0x14] +XDIS ae24: MISC BASE D50A8D7C4615 lea rdi, ptr [rsi+r8*2+0x15] +XDIS ae2a: MISC BASE D50A8D7C4716 lea rdi, ptr [rdi+r8*2+0x16] +XDIS ae30: MISC BASE D50B8D7C4017 lea rdi, ptr [r8+r8*2+0x17] +XDIS ae36: MISC BASE D50B8D7C4118 lea rdi, ptr [r9+r8*2+0x18] +XDIS ae3c: MISC BASE D50B8D7C4219 lea rdi, ptr [r10+r8*2+0x19] +XDIS ae42: MISC BASE D50B8D7C431A lea rdi, ptr [r11+r8*2+0x1a] +XDIS ae48: MISC BASE D50B8D7C441B lea rdi, ptr [r12+r8*2+0x1b] +XDIS ae4e: MISC BASE D50B8D7C451C lea rdi, ptr [r13+r8*2+0x1c] +XDIS ae54: MISC BASE D50B8D7C461D lea rdi, ptr [r14+r8*2+0x1d] +XDIS ae5a: MISC BASE D50B8D7C471E lea rdi, ptr [r15+r8*2+0x1e] +XDIS ae60: MISC BASE D51A8D7C401F lea rdi, ptr [r16+r8*2+0x1f] +XDIS ae66: MISC BASE D51A8D7C4120 lea rdi, ptr [r17+r8*2+0x20] +XDIS ae6c: MISC BASE D51A8D7C4221 lea rdi, ptr [r18+r8*2+0x21] +XDIS ae72: MISC BASE D51A8D7C4322 lea rdi, ptr [r19+r8*2+0x22] +XDIS ae78: MISC BASE D51A8D7C4423 lea rdi, ptr [r20+r8*2+0x23] +XDIS ae7e: MISC BASE D51A8D7C4524 lea rdi, ptr [r21+r8*2+0x24] +XDIS ae84: MISC BASE D51A8D7C4625 lea rdi, ptr [r22+r8*2+0x25] +XDIS ae8a: MISC BASE D51A8D7C4726 lea rdi, ptr [r23+r8*2+0x26] +XDIS ae90: MISC BASE D51B8D7C4027 lea rdi, ptr [r24+r8*2+0x27] +XDIS ae96: MISC BASE D51B8D7C4128 lea rdi, ptr [r25+r8*2+0x28] +XDIS ae9c: MISC BASE D51B8D7C4229 lea rdi, ptr [r26+r8*2+0x29] +XDIS aea2: MISC BASE D51B8D7C432A lea rdi, ptr [r27+r8*2+0x2a] +XDIS aea8: MISC BASE D51B8D7C442B lea rdi, ptr [r28+r8*2+0x2b] +XDIS aeae: MISC BASE D51B8D7C452C lea rdi, ptr [r29+r8*2+0x2c] +XDIS aeb4: MISC BASE D51B8D7C462D lea rdi, ptr [r30+r8*2+0x2d] +XDIS aeba: MISC BASE D51B8D7C472E lea rdi, ptr [r31+r8*2+0x2e] +XDIS aec0: MISC BASE D50A8D7C4810 lea rdi, ptr [rax+r9*2+0x10] +XDIS aec6: MISC BASE D50A8D7C4911 lea rdi, ptr [rcx+r9*2+0x11] +XDIS aecc: MISC BASE D50A8D7C4A12 lea rdi, ptr [rdx+r9*2+0x12] +XDIS aed2: MISC BASE D50A8D7C4B13 lea rdi, ptr [rbx+r9*2+0x13] +XDIS aed8: MISC BASE D50A8D7C4C14 lea rdi, ptr [rsp+r9*2+0x14] +XDIS aede: MISC BASE D50A8D7C4D15 lea rdi, ptr [rbp+r9*2+0x15] +XDIS aee4: MISC BASE D50A8D7C4E16 lea rdi, ptr [rsi+r9*2+0x16] +XDIS aeea: MISC BASE D50A8D7C4F17 lea rdi, ptr [rdi+r9*2+0x17] +XDIS aef0: MISC BASE D50B8D7C4818 lea rdi, ptr [r8+r9*2+0x18] +XDIS aef6: MISC BASE D50B8D7C4919 lea rdi, ptr [r9+r9*2+0x19] +XDIS aefc: MISC BASE D50B8D7C4A1A lea rdi, ptr [r10+r9*2+0x1a] +XDIS af02: MISC BASE D50B8D7C4B1B lea rdi, ptr [r11+r9*2+0x1b] +XDIS af08: MISC BASE D50B8D7C4C1C lea rdi, ptr [r12+r9*2+0x1c] +XDIS af0e: MISC BASE D50B8D7C4D1D lea rdi, ptr [r13+r9*2+0x1d] +XDIS af14: MISC BASE D50B8D7C4E1E lea rdi, ptr [r14+r9*2+0x1e] +XDIS af1a: MISC BASE D50B8D7C4F1F lea rdi, ptr [r15+r9*2+0x1f] +XDIS af20: MISC BASE D51A8D7C4820 lea rdi, ptr [r16+r9*2+0x20] +XDIS af26: MISC BASE D51A8D7C4921 lea rdi, ptr [r17+r9*2+0x21] +XDIS af2c: MISC BASE D51A8D7C4A22 lea rdi, ptr [r18+r9*2+0x22] +XDIS af32: MISC BASE D51A8D7C4B23 lea rdi, ptr [r19+r9*2+0x23] +XDIS af38: MISC BASE D51A8D7C4C24 lea rdi, ptr [r20+r9*2+0x24] +XDIS af3e: MISC BASE D51A8D7C4D25 lea rdi, ptr [r21+r9*2+0x25] +XDIS af44: MISC BASE D51A8D7C4E26 lea rdi, ptr [r22+r9*2+0x26] +XDIS af4a: MISC BASE D51A8D7C4F27 lea rdi, ptr [r23+r9*2+0x27] +XDIS af50: MISC BASE D51B8D7C4828 lea rdi, ptr [r24+r9*2+0x28] +XDIS af56: MISC BASE D51B8D7C4929 lea rdi, ptr [r25+r9*2+0x29] +XDIS af5c: MISC BASE D51B8D7C4A2A lea rdi, ptr [r26+r9*2+0x2a] +XDIS af62: MISC BASE D51B8D7C4B2B lea rdi, ptr [r27+r9*2+0x2b] +XDIS af68: MISC BASE D51B8D7C4C2C lea rdi, ptr [r28+r9*2+0x2c] +XDIS af6e: MISC BASE D51B8D7C4D2D lea rdi, ptr [r29+r9*2+0x2d] +XDIS af74: MISC BASE D51B8D7C4E2E lea rdi, ptr [r30+r9*2+0x2e] +XDIS af7a: MISC BASE D51B8D7C4F2F lea rdi, ptr [r31+r9*2+0x2f] +XDIS af80: MISC BASE D50A8D7C5011 lea rdi, ptr [rax+r10*2+0x11] +XDIS af86: MISC BASE D50A8D7C5112 lea rdi, ptr [rcx+r10*2+0x12] +XDIS af8c: MISC BASE D50A8D7C5213 lea rdi, ptr [rdx+r10*2+0x13] +XDIS af92: MISC BASE D50A8D7C5314 lea rdi, ptr [rbx+r10*2+0x14] +XDIS af98: MISC BASE D50A8D7C5415 lea rdi, ptr [rsp+r10*2+0x15] +XDIS af9e: MISC BASE D50A8D7C5516 lea rdi, ptr [rbp+r10*2+0x16] +XDIS afa4: MISC BASE D50A8D7C5617 lea rdi, ptr [rsi+r10*2+0x17] +XDIS afaa: MISC BASE D50A8D7C5718 lea rdi, ptr [rdi+r10*2+0x18] +XDIS afb0: MISC BASE D50B8D7C5019 lea rdi, ptr [r8+r10*2+0x19] +XDIS afb6: MISC BASE D50B8D7C511A lea rdi, ptr [r9+r10*2+0x1a] +XDIS afbc: MISC BASE D50B8D7C521B lea rdi, ptr [r10+r10*2+0x1b] +XDIS afc2: MISC BASE D50B8D7C531C lea rdi, ptr [r11+r10*2+0x1c] +XDIS afc8: MISC BASE D50B8D7C541D lea rdi, ptr [r12+r10*2+0x1d] +XDIS afce: MISC BASE D50B8D7C551E lea rdi, ptr [r13+r10*2+0x1e] +XDIS afd4: MISC BASE D50B8D7C561F lea rdi, ptr [r14+r10*2+0x1f] +XDIS afda: MISC BASE D50B8D7C5720 lea rdi, ptr [r15+r10*2+0x20] +XDIS afe0: MISC BASE D51A8D7C5021 lea rdi, ptr [r16+r10*2+0x21] +XDIS afe6: MISC BASE D51A8D7C5122 lea rdi, ptr [r17+r10*2+0x22] +XDIS afec: MISC BASE D51A8D7C5223 lea rdi, ptr [r18+r10*2+0x23] +XDIS aff2: MISC BASE D51A8D7C5324 lea rdi, ptr [r19+r10*2+0x24] +XDIS aff8: MISC BASE D51A8D7C5425 lea rdi, ptr [r20+r10*2+0x25] +XDIS affe: MISC BASE D51A8D7C5526 lea rdi, ptr [r21+r10*2+0x26] +XDIS b004: MISC BASE D51A8D7C5627 lea rdi, ptr [r22+r10*2+0x27] +XDIS b00a: MISC BASE D51A8D7C5728 lea rdi, ptr [r23+r10*2+0x28] +XDIS b010: MISC BASE D51B8D7C5029 lea rdi, ptr [r24+r10*2+0x29] +XDIS b016: MISC BASE D51B8D7C512A lea rdi, ptr [r25+r10*2+0x2a] +XDIS b01c: MISC BASE D51B8D7C522B lea rdi, ptr [r26+r10*2+0x2b] +XDIS b022: MISC BASE D51B8D7C532C lea rdi, ptr [r27+r10*2+0x2c] +XDIS b028: MISC BASE D51B8D7C542D lea rdi, ptr [r28+r10*2+0x2d] +XDIS b02e: MISC BASE D51B8D7C552E lea rdi, ptr [r29+r10*2+0x2e] +XDIS b034: MISC BASE D51B8D7C562F lea rdi, ptr [r30+r10*2+0x2f] +XDIS b03a: MISC BASE D51B8D7C5730 lea rdi, ptr [r31+r10*2+0x30] +XDIS b040: MISC BASE D50A8D7C5812 lea rdi, ptr [rax+r11*2+0x12] +XDIS b046: MISC BASE D50A8D7C5913 lea rdi, ptr [rcx+r11*2+0x13] +XDIS b04c: MISC BASE D50A8D7C5A14 lea rdi, ptr [rdx+r11*2+0x14] +XDIS b052: MISC BASE D50A8D7C5B15 lea rdi, ptr [rbx+r11*2+0x15] +XDIS b058: MISC BASE D50A8D7C5C16 lea rdi, ptr [rsp+r11*2+0x16] +XDIS b05e: MISC BASE D50A8D7C5D17 lea rdi, ptr [rbp+r11*2+0x17] +XDIS b064: MISC BASE D50A8D7C5E18 lea rdi, ptr [rsi+r11*2+0x18] +XDIS b06a: MISC BASE D50A8D7C5F19 lea rdi, ptr [rdi+r11*2+0x19] +XDIS b070: MISC BASE D50B8D7C581A lea rdi, ptr [r8+r11*2+0x1a] +XDIS b076: MISC BASE D50B8D7C591B lea rdi, ptr [r9+r11*2+0x1b] +XDIS b07c: MISC BASE D50B8D7C5A1C lea rdi, ptr [r10+r11*2+0x1c] +XDIS b082: MISC BASE D50B8D7C5B1D lea rdi, ptr [r11+r11*2+0x1d] +XDIS b088: MISC BASE D50B8D7C5C1E lea rdi, ptr [r12+r11*2+0x1e] +XDIS b08e: MISC BASE D50B8D7C5D1F lea rdi, ptr [r13+r11*2+0x1f] +XDIS b094: MISC BASE D50B8D7C5E20 lea rdi, ptr [r14+r11*2+0x20] +XDIS b09a: MISC BASE D50B8D7C5F21 lea rdi, ptr [r15+r11*2+0x21] +XDIS b0a0: MISC BASE D51A8D7C5822 lea rdi, ptr [r16+r11*2+0x22] +XDIS b0a6: MISC BASE D51A8D7C5923 lea rdi, ptr [r17+r11*2+0x23] +XDIS b0ac: MISC BASE D51A8D7C5A24 lea rdi, ptr [r18+r11*2+0x24] +XDIS b0b2: MISC BASE D51A8D7C5B25 lea rdi, ptr [r19+r11*2+0x25] +XDIS b0b8: MISC BASE D51A8D7C5C26 lea rdi, ptr [r20+r11*2+0x26] +XDIS b0be: MISC BASE D51A8D7C5D27 lea rdi, ptr [r21+r11*2+0x27] +XDIS b0c4: MISC BASE D51A8D7C5E28 lea rdi, ptr [r22+r11*2+0x28] +XDIS b0ca: MISC BASE D51A8D7C5F29 lea rdi, ptr [r23+r11*2+0x29] +XDIS b0d0: MISC BASE D51B8D7C582A lea rdi, ptr [r24+r11*2+0x2a] +XDIS b0d6: MISC BASE D51B8D7C592B lea rdi, ptr [r25+r11*2+0x2b] +XDIS b0dc: MISC BASE D51B8D7C5A2C lea rdi, ptr [r26+r11*2+0x2c] +XDIS b0e2: MISC BASE D51B8D7C5B2D lea rdi, ptr [r27+r11*2+0x2d] +XDIS b0e8: MISC BASE D51B8D7C5C2E lea rdi, ptr [r28+r11*2+0x2e] +XDIS b0ee: MISC BASE D51B8D7C5D2F lea rdi, ptr [r29+r11*2+0x2f] +XDIS b0f4: MISC BASE D51B8D7C5E30 lea rdi, ptr [r30+r11*2+0x30] +XDIS b0fa: MISC BASE D51B8D7C5F31 lea rdi, ptr [r31+r11*2+0x31] +XDIS b100: MISC BASE D50A8D7C6013 lea rdi, ptr [rax+r12*2+0x13] +XDIS b106: MISC BASE D50A8D7C6114 lea rdi, ptr [rcx+r12*2+0x14] +XDIS b10c: MISC BASE D50A8D7C6215 lea rdi, ptr [rdx+r12*2+0x15] +XDIS b112: MISC BASE D50A8D7C6316 lea rdi, ptr [rbx+r12*2+0x16] +XDIS b118: MISC BASE D50A8D7C6417 lea rdi, ptr [rsp+r12*2+0x17] +XDIS b11e: MISC BASE D50A8D7C6518 lea rdi, ptr [rbp+r12*2+0x18] +XDIS b124: MISC BASE D50A8D7C6619 lea rdi, ptr [rsi+r12*2+0x19] +XDIS b12a: MISC BASE D50A8D7C671A lea rdi, ptr [rdi+r12*2+0x1a] +XDIS b130: MISC BASE D50B8D7C601B lea rdi, ptr [r8+r12*2+0x1b] +XDIS b136: MISC BASE D50B8D7C611C lea rdi, ptr [r9+r12*2+0x1c] +XDIS b13c: MISC BASE D50B8D7C621D lea rdi, ptr [r10+r12*2+0x1d] +XDIS b142: MISC BASE D50B8D7C631E lea rdi, ptr [r11+r12*2+0x1e] +XDIS b148: MISC BASE D50B8D7C641F lea rdi, ptr [r12+r12*2+0x1f] +XDIS b14e: MISC BASE D50B8D7C6520 lea rdi, ptr [r13+r12*2+0x20] +XDIS b154: MISC BASE D50B8D7C6621 lea rdi, ptr [r14+r12*2+0x21] +XDIS b15a: MISC BASE D50B8D7C6722 lea rdi, ptr [r15+r12*2+0x22] +XDIS b160: MISC BASE D51A8D7C6023 lea rdi, ptr [r16+r12*2+0x23] +XDIS b166: MISC BASE D51A8D7C6124 lea rdi, ptr [r17+r12*2+0x24] +XDIS b16c: MISC BASE D51A8D7C6225 lea rdi, ptr [r18+r12*2+0x25] +XDIS b172: MISC BASE D51A8D7C6326 lea rdi, ptr [r19+r12*2+0x26] +XDIS b178: MISC BASE D51A8D7C6427 lea rdi, ptr [r20+r12*2+0x27] +XDIS b17e: MISC BASE D51A8D7C6528 lea rdi, ptr [r21+r12*2+0x28] +XDIS b184: MISC BASE D51A8D7C6629 lea rdi, ptr [r22+r12*2+0x29] +XDIS b18a: MISC BASE D51A8D7C672A lea rdi, ptr [r23+r12*2+0x2a] +XDIS b190: MISC BASE D51B8D7C602B lea rdi, ptr [r24+r12*2+0x2b] +XDIS b196: MISC BASE D51B8D7C612C lea rdi, ptr [r25+r12*2+0x2c] +XDIS b19c: MISC BASE D51B8D7C622D lea rdi, ptr [r26+r12*2+0x2d] +XDIS b1a2: MISC BASE D51B8D7C632E lea rdi, ptr [r27+r12*2+0x2e] +XDIS b1a8: MISC BASE D51B8D7C642F lea rdi, ptr [r28+r12*2+0x2f] +XDIS b1ae: MISC BASE D51B8D7C6530 lea rdi, ptr [r29+r12*2+0x30] +XDIS b1b4: MISC BASE D51B8D7C6631 lea rdi, ptr [r30+r12*2+0x31] +XDIS b1ba: MISC BASE D51B8D7C6732 lea rdi, ptr [r31+r12*2+0x32] +XDIS b1c0: MISC BASE D50A8D7C6814 lea rdi, ptr [rax+r13*2+0x14] +XDIS b1c6: MISC BASE D50A8D7C6915 lea rdi, ptr [rcx+r13*2+0x15] +XDIS b1cc: MISC BASE D50A8D7C6A16 lea rdi, ptr [rdx+r13*2+0x16] +XDIS b1d2: MISC BASE D50A8D7C6B17 lea rdi, ptr [rbx+r13*2+0x17] +XDIS b1d8: MISC BASE D50A8D7C6C18 lea rdi, ptr [rsp+r13*2+0x18] +XDIS b1de: MISC BASE D50A8D7C6D19 lea rdi, ptr [rbp+r13*2+0x19] +XDIS b1e4: MISC BASE D50A8D7C6E1A lea rdi, ptr [rsi+r13*2+0x1a] +XDIS b1ea: MISC BASE D50A8D7C6F1B lea rdi, ptr [rdi+r13*2+0x1b] +XDIS b1f0: MISC BASE D50B8D7C681C lea rdi, ptr [r8+r13*2+0x1c] +XDIS b1f6: MISC BASE D50B8D7C691D lea rdi, ptr [r9+r13*2+0x1d] +XDIS b1fc: MISC BASE D50B8D7C6A1E lea rdi, ptr [r10+r13*2+0x1e] +XDIS b202: MISC BASE D50B8D7C6B1F lea rdi, ptr [r11+r13*2+0x1f] +XDIS b208: MISC BASE D50B8D7C6C20 lea rdi, ptr [r12+r13*2+0x20] +XDIS b20e: MISC BASE D50B8D7C6D21 lea rdi, ptr [r13+r13*2+0x21] +XDIS b214: MISC BASE D50B8D7C6E22 lea rdi, ptr [r14+r13*2+0x22] +XDIS b21a: MISC BASE D50B8D7C6F23 lea rdi, ptr [r15+r13*2+0x23] +XDIS b220: MISC BASE D51A8D7C6824 lea rdi, ptr [r16+r13*2+0x24] +XDIS b226: MISC BASE D51A8D7C6925 lea rdi, ptr [r17+r13*2+0x25] +XDIS b22c: MISC BASE D51A8D7C6A26 lea rdi, ptr [r18+r13*2+0x26] +XDIS b232: MISC BASE D51A8D7C6B27 lea rdi, ptr [r19+r13*2+0x27] +XDIS b238: MISC BASE D51A8D7C6C28 lea rdi, ptr [r20+r13*2+0x28] +XDIS b23e: MISC BASE D51A8D7C6D29 lea rdi, ptr [r21+r13*2+0x29] +XDIS b244: MISC BASE D51A8D7C6E2A lea rdi, ptr [r22+r13*2+0x2a] +XDIS b24a: MISC BASE D51A8D7C6F2B lea rdi, ptr [r23+r13*2+0x2b] +XDIS b250: MISC BASE D51B8D7C682C lea rdi, ptr [r24+r13*2+0x2c] +XDIS b256: MISC BASE D51B8D7C692D lea rdi, ptr [r25+r13*2+0x2d] +XDIS b25c: MISC BASE D51B8D7C6A2E lea rdi, ptr [r26+r13*2+0x2e] +XDIS b262: MISC BASE D51B8D7C6B2F lea rdi, ptr [r27+r13*2+0x2f] +XDIS b268: MISC BASE D51B8D7C6C30 lea rdi, ptr [r28+r13*2+0x30] +XDIS b26e: MISC BASE D51B8D7C6D31 lea rdi, ptr [r29+r13*2+0x31] +XDIS b274: MISC BASE D51B8D7C6E32 lea rdi, ptr [r30+r13*2+0x32] +XDIS b27a: MISC BASE D51B8D7C6F33 lea rdi, ptr [r31+r13*2+0x33] +XDIS b280: MISC BASE D50A8D7C7015 lea rdi, ptr [rax+r14*2+0x15] +XDIS b286: MISC BASE D50A8D7C7116 lea rdi, ptr [rcx+r14*2+0x16] +XDIS b28c: MISC BASE D50A8D7C7217 lea rdi, ptr [rdx+r14*2+0x17] +XDIS b292: MISC BASE D50A8D7C7318 lea rdi, ptr [rbx+r14*2+0x18] +XDIS b298: MISC BASE D50A8D7C7419 lea rdi, ptr [rsp+r14*2+0x19] +XDIS b29e: MISC BASE D50A8D7C751A lea rdi, ptr [rbp+r14*2+0x1a] +XDIS b2a4: MISC BASE D50A8D7C761B lea rdi, ptr [rsi+r14*2+0x1b] +XDIS b2aa: MISC BASE D50A8D7C771C lea rdi, ptr [rdi+r14*2+0x1c] +XDIS b2b0: MISC BASE D50B8D7C701D lea rdi, ptr [r8+r14*2+0x1d] +XDIS b2b6: MISC BASE D50B8D7C711E lea rdi, ptr [r9+r14*2+0x1e] +XDIS b2bc: MISC BASE D50B8D7C721F lea rdi, ptr [r10+r14*2+0x1f] +XDIS b2c2: MISC BASE D50B8D7C7320 lea rdi, ptr [r11+r14*2+0x20] +XDIS b2c8: MISC BASE D50B8D7C7421 lea rdi, ptr [r12+r14*2+0x21] +XDIS b2ce: MISC BASE D50B8D7C7522 lea rdi, ptr [r13+r14*2+0x22] +XDIS b2d4: MISC BASE D50B8D7C7623 lea rdi, ptr [r14+r14*2+0x23] +XDIS b2da: MISC BASE D50B8D7C7724 lea rdi, ptr [r15+r14*2+0x24] +XDIS b2e0: MISC BASE D51A8D7C7025 lea rdi, ptr [r16+r14*2+0x25] +XDIS b2e6: MISC BASE D51A8D7C7126 lea rdi, ptr [r17+r14*2+0x26] +XDIS b2ec: MISC BASE D51A8D7C7227 lea rdi, ptr [r18+r14*2+0x27] +XDIS b2f2: MISC BASE D51A8D7C7328 lea rdi, ptr [r19+r14*2+0x28] +XDIS b2f8: MISC BASE D51A8D7C7429 lea rdi, ptr [r20+r14*2+0x29] +XDIS b2fe: MISC BASE D51A8D7C752A lea rdi, ptr [r21+r14*2+0x2a] +XDIS b304: MISC BASE D51A8D7C762B lea rdi, ptr [r22+r14*2+0x2b] +XDIS b30a: MISC BASE D51A8D7C772C lea rdi, ptr [r23+r14*2+0x2c] +XDIS b310: MISC BASE D51B8D7C702D lea rdi, ptr [r24+r14*2+0x2d] +XDIS b316: MISC BASE D51B8D7C712E lea rdi, ptr [r25+r14*2+0x2e] +XDIS b31c: MISC BASE D51B8D7C722F lea rdi, ptr [r26+r14*2+0x2f] +XDIS b322: MISC BASE D51B8D7C7330 lea rdi, ptr [r27+r14*2+0x30] +XDIS b328: MISC BASE D51B8D7C7431 lea rdi, ptr [r28+r14*2+0x31] +XDIS b32e: MISC BASE D51B8D7C7532 lea rdi, ptr [r29+r14*2+0x32] +XDIS b334: MISC BASE D51B8D7C7633 lea rdi, ptr [r30+r14*2+0x33] +XDIS b33a: MISC BASE D51B8D7C7734 lea rdi, ptr [r31+r14*2+0x34] +XDIS b340: MISC BASE D50A8D7C7816 lea rdi, ptr [rax+r15*2+0x16] +XDIS b346: MISC BASE D50A8D7C7917 lea rdi, ptr [rcx+r15*2+0x17] +XDIS b34c: MISC BASE D50A8D7C7A18 lea rdi, ptr [rdx+r15*2+0x18] +XDIS b352: MISC BASE D50A8D7C7B19 lea rdi, ptr [rbx+r15*2+0x19] +XDIS b358: MISC BASE D50A8D7C7C1A lea rdi, ptr [rsp+r15*2+0x1a] +XDIS b35e: MISC BASE D50A8D7C7D1B lea rdi, ptr [rbp+r15*2+0x1b] +XDIS b364: MISC BASE D50A8D7C7E1C lea rdi, ptr [rsi+r15*2+0x1c] +XDIS b36a: MISC BASE D50A8D7C7F1D lea rdi, ptr [rdi+r15*2+0x1d] +XDIS b370: MISC BASE D50B8D7C781E lea rdi, ptr [r8+r15*2+0x1e] +XDIS b376: MISC BASE D50B8D7C791F lea rdi, ptr [r9+r15*2+0x1f] +XDIS b37c: MISC BASE D50B8D7C7A20 lea rdi, ptr [r10+r15*2+0x20] +XDIS b382: MISC BASE D50B8D7C7B21 lea rdi, ptr [r11+r15*2+0x21] +XDIS b388: MISC BASE D50B8D7C7C22 lea rdi, ptr [r12+r15*2+0x22] +XDIS b38e: MISC BASE D50B8D7C7D23 lea rdi, ptr [r13+r15*2+0x23] +XDIS b394: MISC BASE D50B8D7C7E24 lea rdi, ptr [r14+r15*2+0x24] +XDIS b39a: MISC BASE D50B8D7C7F25 lea rdi, ptr [r15+r15*2+0x25] +XDIS b3a0: MISC BASE D51A8D7C7826 lea rdi, ptr [r16+r15*2+0x26] +XDIS b3a6: MISC BASE D51A8D7C7927 lea rdi, ptr [r17+r15*2+0x27] +XDIS b3ac: MISC BASE D51A8D7C7A28 lea rdi, ptr [r18+r15*2+0x28] +XDIS b3b2: MISC BASE D51A8D7C7B29 lea rdi, ptr [r19+r15*2+0x29] +XDIS b3b8: MISC BASE D51A8D7C7C2A lea rdi, ptr [r20+r15*2+0x2a] +XDIS b3be: MISC BASE D51A8D7C7D2B lea rdi, ptr [r21+r15*2+0x2b] +XDIS b3c4: MISC BASE D51A8D7C7E2C lea rdi, ptr [r22+r15*2+0x2c] +XDIS b3ca: MISC BASE D51A8D7C7F2D lea rdi, ptr [r23+r15*2+0x2d] +XDIS b3d0: MISC BASE D51B8D7C782E lea rdi, ptr [r24+r15*2+0x2e] +XDIS b3d6: MISC BASE D51B8D7C792F lea rdi, ptr [r25+r15*2+0x2f] +XDIS b3dc: MISC BASE D51B8D7C7A30 lea rdi, ptr [r26+r15*2+0x30] +XDIS b3e2: MISC BASE D51B8D7C7B31 lea rdi, ptr [r27+r15*2+0x31] +XDIS b3e8: MISC BASE D51B8D7C7C32 lea rdi, ptr [r28+r15*2+0x32] +XDIS b3ee: MISC BASE D51B8D7C7D33 lea rdi, ptr [r29+r15*2+0x33] +XDIS b3f4: MISC BASE D51B8D7C7E34 lea rdi, ptr [r30+r15*2+0x34] +XDIS b3fa: MISC BASE D51B8D7C7F35 lea rdi, ptr [r31+r15*2+0x35] +XDIS b400: MISC BASE D5288D7C4017 lea rdi, ptr [rax+r16*2+0x17] +XDIS b406: MISC BASE D5288D7C4118 lea rdi, ptr [rcx+r16*2+0x18] +XDIS b40c: MISC BASE D5288D7C4219 lea rdi, ptr [rdx+r16*2+0x19] +XDIS b412: MISC BASE D5288D7C431A lea rdi, ptr [rbx+r16*2+0x1a] +XDIS b418: MISC BASE D5288D7C441B lea rdi, ptr [rsp+r16*2+0x1b] +XDIS b41e: MISC BASE D5288D7C451C lea rdi, ptr [rbp+r16*2+0x1c] +XDIS b424: MISC BASE D5288D7C461D lea rdi, ptr [rsi+r16*2+0x1d] +XDIS b42a: MISC BASE D5288D7C471E lea rdi, ptr [rdi+r16*2+0x1e] +XDIS b430: MISC BASE D5298D7C401F lea rdi, ptr [r8+r16*2+0x1f] +XDIS b436: MISC BASE D5298D7C4120 lea rdi, ptr [r9+r16*2+0x20] +XDIS b43c: MISC BASE D5298D7C4221 lea rdi, ptr [r10+r16*2+0x21] +XDIS b442: MISC BASE D5298D7C4322 lea rdi, ptr [r11+r16*2+0x22] +XDIS b448: MISC BASE D5298D7C4423 lea rdi, ptr [r12+r16*2+0x23] +XDIS b44e: MISC BASE D5298D7C4524 lea rdi, ptr [r13+r16*2+0x24] +XDIS b454: MISC BASE D5298D7C4625 lea rdi, ptr [r14+r16*2+0x25] +XDIS b45a: MISC BASE D5298D7C4726 lea rdi, ptr [r15+r16*2+0x26] +XDIS b460: MISC BASE D5388D7C4027 lea rdi, ptr [r16+r16*2+0x27] +XDIS b466: MISC BASE D5388D7C4128 lea rdi, ptr [r17+r16*2+0x28] +XDIS b46c: MISC BASE D5388D7C4229 lea rdi, ptr [r18+r16*2+0x29] +XDIS b472: MISC BASE D5388D7C432A lea rdi, ptr [r19+r16*2+0x2a] +XDIS b478: MISC BASE D5388D7C442B lea rdi, ptr [r20+r16*2+0x2b] +XDIS b47e: MISC BASE D5388D7C452C lea rdi, ptr [r21+r16*2+0x2c] +XDIS b484: MISC BASE D5388D7C462D lea rdi, ptr [r22+r16*2+0x2d] +XDIS b48a: MISC BASE D5388D7C472E lea rdi, ptr [r23+r16*2+0x2e] +XDIS b490: MISC BASE D5398D7C402F lea rdi, ptr [r24+r16*2+0x2f] +XDIS b496: MISC BASE D5398D7C4130 lea rdi, ptr [r25+r16*2+0x30] +XDIS b49c: MISC BASE D5398D7C4231 lea rdi, ptr [r26+r16*2+0x31] +XDIS b4a2: MISC BASE D5398D7C4332 lea rdi, ptr [r27+r16*2+0x32] +XDIS b4a8: MISC BASE D5398D7C4433 lea rdi, ptr [r28+r16*2+0x33] +XDIS b4ae: MISC BASE D5398D7C4534 lea rdi, ptr [r29+r16*2+0x34] +XDIS b4b4: MISC BASE D5398D7C4635 lea rdi, ptr [r30+r16*2+0x35] +XDIS b4ba: MISC BASE D5398D7C4736 lea rdi, ptr [r31+r16*2+0x36] +XDIS b4c0: MISC BASE D5288D7C4818 lea rdi, ptr [rax+r17*2+0x18] +XDIS b4c6: MISC BASE D5288D7C4919 lea rdi, ptr [rcx+r17*2+0x19] +XDIS b4cc: MISC BASE D5288D7C4A1A lea rdi, ptr [rdx+r17*2+0x1a] +XDIS b4d2: MISC BASE D5288D7C4B1B lea rdi, ptr [rbx+r17*2+0x1b] +XDIS b4d8: MISC BASE D5288D7C4C1C lea rdi, ptr [rsp+r17*2+0x1c] +XDIS b4de: MISC BASE D5288D7C4D1D lea rdi, ptr [rbp+r17*2+0x1d] +XDIS b4e4: MISC BASE D5288D7C4E1E lea rdi, ptr [rsi+r17*2+0x1e] +XDIS b4ea: MISC BASE D5288D7C4F1F lea rdi, ptr [rdi+r17*2+0x1f] +XDIS b4f0: MISC BASE D5298D7C4820 lea rdi, ptr [r8+r17*2+0x20] +XDIS b4f6: MISC BASE D5298D7C4921 lea rdi, ptr [r9+r17*2+0x21] +XDIS b4fc: MISC BASE D5298D7C4A22 lea rdi, ptr [r10+r17*2+0x22] +XDIS b502: MISC BASE D5298D7C4B23 lea rdi, ptr [r11+r17*2+0x23] +XDIS b508: MISC BASE D5298D7C4C24 lea rdi, ptr [r12+r17*2+0x24] +XDIS b50e: MISC BASE D5298D7C4D25 lea rdi, ptr [r13+r17*2+0x25] +XDIS b514: MISC BASE D5298D7C4E26 lea rdi, ptr [r14+r17*2+0x26] +XDIS b51a: MISC BASE D5298D7C4F27 lea rdi, ptr [r15+r17*2+0x27] +XDIS b520: MISC BASE D5388D7C4828 lea rdi, ptr [r16+r17*2+0x28] +XDIS b526: MISC BASE D5388D7C4929 lea rdi, ptr [r17+r17*2+0x29] +XDIS b52c: MISC BASE D5388D7C4A2A lea rdi, ptr [r18+r17*2+0x2a] +XDIS b532: MISC BASE D5388D7C4B2B lea rdi, ptr [r19+r17*2+0x2b] +XDIS b538: MISC BASE D5388D7C4C2C lea rdi, ptr [r20+r17*2+0x2c] +XDIS b53e: MISC BASE D5388D7C4D2D lea rdi, ptr [r21+r17*2+0x2d] +XDIS b544: MISC BASE D5388D7C4E2E lea rdi, ptr [r22+r17*2+0x2e] +XDIS b54a: MISC BASE D5388D7C4F2F lea rdi, ptr [r23+r17*2+0x2f] +XDIS b550: MISC BASE D5398D7C4830 lea rdi, ptr [r24+r17*2+0x30] +XDIS b556: MISC BASE D5398D7C4931 lea rdi, ptr [r25+r17*2+0x31] +XDIS b55c: MISC BASE D5398D7C4A32 lea rdi, ptr [r26+r17*2+0x32] +XDIS b562: MISC BASE D5398D7C4B33 lea rdi, ptr [r27+r17*2+0x33] +XDIS b568: MISC BASE D5398D7C4C34 lea rdi, ptr [r28+r17*2+0x34] +XDIS b56e: MISC BASE D5398D7C4D35 lea rdi, ptr [r29+r17*2+0x35] +XDIS b574: MISC BASE D5398D7C4E36 lea rdi, ptr [r30+r17*2+0x36] +XDIS b57a: MISC BASE D5398D7C4F37 lea rdi, ptr [r31+r17*2+0x37] +XDIS b580: MISC BASE D5288D7C5019 lea rdi, ptr [rax+r18*2+0x19] +XDIS b586: MISC BASE D5288D7C511A lea rdi, ptr [rcx+r18*2+0x1a] +XDIS b58c: MISC BASE D5288D7C521B lea rdi, ptr [rdx+r18*2+0x1b] +XDIS b592: MISC BASE D5288D7C531C lea rdi, ptr [rbx+r18*2+0x1c] +XDIS b598: MISC BASE D5288D7C541D lea rdi, ptr [rsp+r18*2+0x1d] +XDIS b59e: MISC BASE D5288D7C551E lea rdi, ptr [rbp+r18*2+0x1e] +XDIS b5a4: MISC BASE D5288D7C561F lea rdi, ptr [rsi+r18*2+0x1f] +XDIS b5aa: MISC BASE D5288D7C5720 lea rdi, ptr [rdi+r18*2+0x20] +XDIS b5b0: MISC BASE D5298D7C5021 lea rdi, ptr [r8+r18*2+0x21] +XDIS b5b6: MISC BASE D5298D7C5122 lea rdi, ptr [r9+r18*2+0x22] +XDIS b5bc: MISC BASE D5298D7C5223 lea rdi, ptr [r10+r18*2+0x23] +XDIS b5c2: MISC BASE D5298D7C5324 lea rdi, ptr [r11+r18*2+0x24] +XDIS b5c8: MISC BASE D5298D7C5425 lea rdi, ptr [r12+r18*2+0x25] +XDIS b5ce: MISC BASE D5298D7C5526 lea rdi, ptr [r13+r18*2+0x26] +XDIS b5d4: MISC BASE D5298D7C5627 lea rdi, ptr [r14+r18*2+0x27] +XDIS b5da: MISC BASE D5298D7C5728 lea rdi, ptr [r15+r18*2+0x28] +XDIS b5e0: MISC BASE D5388D7C5029 lea rdi, ptr [r16+r18*2+0x29] +XDIS b5e6: MISC BASE D5388D7C512A lea rdi, ptr [r17+r18*2+0x2a] +XDIS b5ec: MISC BASE D5388D7C522B lea rdi, ptr [r18+r18*2+0x2b] +XDIS b5f2: MISC BASE D5388D7C532C lea rdi, ptr [r19+r18*2+0x2c] +XDIS b5f8: MISC BASE D5388D7C542D lea rdi, ptr [r20+r18*2+0x2d] +XDIS b5fe: MISC BASE D5388D7C552E lea rdi, ptr [r21+r18*2+0x2e] +XDIS b604: MISC BASE D5388D7C562F lea rdi, ptr [r22+r18*2+0x2f] +XDIS b60a: MISC BASE D5388D7C5730 lea rdi, ptr [r23+r18*2+0x30] +XDIS b610: MISC BASE D5398D7C5031 lea rdi, ptr [r24+r18*2+0x31] +XDIS b616: MISC BASE D5398D7C5132 lea rdi, ptr [r25+r18*2+0x32] +XDIS b61c: MISC BASE D5398D7C5233 lea rdi, ptr [r26+r18*2+0x33] +XDIS b622: MISC BASE D5398D7C5334 lea rdi, ptr [r27+r18*2+0x34] +XDIS b628: MISC BASE D5398D7C5435 lea rdi, ptr [r28+r18*2+0x35] +XDIS b62e: MISC BASE D5398D7C5536 lea rdi, ptr [r29+r18*2+0x36] +XDIS b634: MISC BASE D5398D7C5637 lea rdi, ptr [r30+r18*2+0x37] +XDIS b63a: MISC BASE D5398D7C5738 lea rdi, ptr [r31+r18*2+0x38] +XDIS b640: MISC BASE D5288D7C581A lea rdi, ptr [rax+r19*2+0x1a] +XDIS b646: MISC BASE D5288D7C591B lea rdi, ptr [rcx+r19*2+0x1b] +XDIS b64c: MISC BASE D5288D7C5A1C lea rdi, ptr [rdx+r19*2+0x1c] +XDIS b652: MISC BASE D5288D7C5B1D lea rdi, ptr [rbx+r19*2+0x1d] +XDIS b658: MISC BASE D5288D7C5C1E lea rdi, ptr [rsp+r19*2+0x1e] +XDIS b65e: MISC BASE D5288D7C5D1F lea rdi, ptr [rbp+r19*2+0x1f] +XDIS b664: MISC BASE D5288D7C5E20 lea rdi, ptr [rsi+r19*2+0x20] +XDIS b66a: MISC BASE D5288D7C5F21 lea rdi, ptr [rdi+r19*2+0x21] +XDIS b670: MISC BASE D5298D7C5822 lea rdi, ptr [r8+r19*2+0x22] +XDIS b676: MISC BASE D5298D7C5923 lea rdi, ptr [r9+r19*2+0x23] +XDIS b67c: MISC BASE D5298D7C5A24 lea rdi, ptr [r10+r19*2+0x24] +XDIS b682: MISC BASE D5298D7C5B25 lea rdi, ptr [r11+r19*2+0x25] +XDIS b688: MISC BASE D5298D7C5C26 lea rdi, ptr [r12+r19*2+0x26] +XDIS b68e: MISC BASE D5298D7C5D27 lea rdi, ptr [r13+r19*2+0x27] +XDIS b694: MISC BASE D5298D7C5E28 lea rdi, ptr [r14+r19*2+0x28] +XDIS b69a: MISC BASE D5298D7C5F29 lea rdi, ptr [r15+r19*2+0x29] +XDIS b6a0: MISC BASE D5388D7C582A lea rdi, ptr [r16+r19*2+0x2a] +XDIS b6a6: MISC BASE D5388D7C592B lea rdi, ptr [r17+r19*2+0x2b] +XDIS b6ac: MISC BASE D5388D7C5A2C lea rdi, ptr [r18+r19*2+0x2c] +XDIS b6b2: MISC BASE D5388D7C5B2D lea rdi, ptr [r19+r19*2+0x2d] +XDIS b6b8: MISC BASE D5388D7C5C2E lea rdi, ptr [r20+r19*2+0x2e] +XDIS b6be: MISC BASE D5388D7C5D2F lea rdi, ptr [r21+r19*2+0x2f] +XDIS b6c4: MISC BASE D5388D7C5E30 lea rdi, ptr [r22+r19*2+0x30] +XDIS b6ca: MISC BASE D5388D7C5F31 lea rdi, ptr [r23+r19*2+0x31] +XDIS b6d0: MISC BASE D5398D7C5832 lea rdi, ptr [r24+r19*2+0x32] +XDIS b6d6: MISC BASE D5398D7C5933 lea rdi, ptr [r25+r19*2+0x33] +XDIS b6dc: MISC BASE D5398D7C5A34 lea rdi, ptr [r26+r19*2+0x34] +XDIS b6e2: MISC BASE D5398D7C5B35 lea rdi, ptr [r27+r19*2+0x35] +XDIS b6e8: MISC BASE D5398D7C5C36 lea rdi, ptr [r28+r19*2+0x36] +XDIS b6ee: MISC BASE D5398D7C5D37 lea rdi, ptr [r29+r19*2+0x37] +XDIS b6f4: MISC BASE D5398D7C5E38 lea rdi, ptr [r30+r19*2+0x38] +XDIS b6fa: MISC BASE D5398D7C5F39 lea rdi, ptr [r31+r19*2+0x39] +XDIS b700: MISC BASE D5288D7C601B lea rdi, ptr [rax+r20*2+0x1b] +XDIS b706: MISC BASE D5288D7C611C lea rdi, ptr [rcx+r20*2+0x1c] +XDIS b70c: MISC BASE D5288D7C621D lea rdi, ptr [rdx+r20*2+0x1d] +XDIS b712: MISC BASE D5288D7C631E lea rdi, ptr [rbx+r20*2+0x1e] +XDIS b718: MISC BASE D5288D7C641F lea rdi, ptr [rsp+r20*2+0x1f] +XDIS b71e: MISC BASE D5288D7C6520 lea rdi, ptr [rbp+r20*2+0x20] +XDIS b724: MISC BASE D5288D7C6621 lea rdi, ptr [rsi+r20*2+0x21] +XDIS b72a: MISC BASE D5288D7C6722 lea rdi, ptr [rdi+r20*2+0x22] +XDIS b730: MISC BASE D5298D7C6023 lea rdi, ptr [r8+r20*2+0x23] +XDIS b736: MISC BASE D5298D7C6124 lea rdi, ptr [r9+r20*2+0x24] +XDIS b73c: MISC BASE D5298D7C6225 lea rdi, ptr [r10+r20*2+0x25] +XDIS b742: MISC BASE D5298D7C6326 lea rdi, ptr [r11+r20*2+0x26] +XDIS b748: MISC BASE D5298D7C6427 lea rdi, ptr [r12+r20*2+0x27] +XDIS b74e: MISC BASE D5298D7C6528 lea rdi, ptr [r13+r20*2+0x28] +XDIS b754: MISC BASE D5298D7C6629 lea rdi, ptr [r14+r20*2+0x29] +XDIS b75a: MISC BASE D5298D7C672A lea rdi, ptr [r15+r20*2+0x2a] +XDIS b760: MISC BASE D5388D7C602B lea rdi, ptr [r16+r20*2+0x2b] +XDIS b766: MISC BASE D5388D7C612C lea rdi, ptr [r17+r20*2+0x2c] +XDIS b76c: MISC BASE D5388D7C622D lea rdi, ptr [r18+r20*2+0x2d] +XDIS b772: MISC BASE D5388D7C632E lea rdi, ptr [r19+r20*2+0x2e] +XDIS b778: MISC BASE D5388D7C642F lea rdi, ptr [r20+r20*2+0x2f] +XDIS b77e: MISC BASE D5388D7C6530 lea rdi, ptr [r21+r20*2+0x30] +XDIS b784: MISC BASE D5388D7C6631 lea rdi, ptr [r22+r20*2+0x31] +XDIS b78a: MISC BASE D5388D7C6732 lea rdi, ptr [r23+r20*2+0x32] +XDIS b790: MISC BASE D5398D7C6033 lea rdi, ptr [r24+r20*2+0x33] +XDIS b796: MISC BASE D5398D7C6134 lea rdi, ptr [r25+r20*2+0x34] +XDIS b79c: MISC BASE D5398D7C6235 lea rdi, ptr [r26+r20*2+0x35] +XDIS b7a2: MISC BASE D5398D7C6336 lea rdi, ptr [r27+r20*2+0x36] +XDIS b7a8: MISC BASE D5398D7C6437 lea rdi, ptr [r28+r20*2+0x37] +XDIS b7ae: MISC BASE D5398D7C6538 lea rdi, ptr [r29+r20*2+0x38] +XDIS b7b4: MISC BASE D5398D7C6639 lea rdi, ptr [r30+r20*2+0x39] +XDIS b7ba: MISC BASE D5398D7C673A lea rdi, ptr [r31+r20*2+0x3a] +XDIS b7c0: MISC BASE D5288D7C681C lea rdi, ptr [rax+r21*2+0x1c] +XDIS b7c6: MISC BASE D5288D7C691D lea rdi, ptr [rcx+r21*2+0x1d] +XDIS b7cc: MISC BASE D5288D7C6A1E lea rdi, ptr [rdx+r21*2+0x1e] +XDIS b7d2: MISC BASE D5288D7C6B1F lea rdi, ptr [rbx+r21*2+0x1f] +XDIS b7d8: MISC BASE D5288D7C6C20 lea rdi, ptr [rsp+r21*2+0x20] +XDIS b7de: MISC BASE D5288D7C6D21 lea rdi, ptr [rbp+r21*2+0x21] +XDIS b7e4: MISC BASE D5288D7C6E22 lea rdi, ptr [rsi+r21*2+0x22] +XDIS b7ea: MISC BASE D5288D7C6F23 lea rdi, ptr [rdi+r21*2+0x23] +XDIS b7f0: MISC BASE D5298D7C6824 lea rdi, ptr [r8+r21*2+0x24] +XDIS b7f6: MISC BASE D5298D7C6925 lea rdi, ptr [r9+r21*2+0x25] +XDIS b7fc: MISC BASE D5298D7C6A26 lea rdi, ptr [r10+r21*2+0x26] +XDIS b802: MISC BASE D5298D7C6B27 lea rdi, ptr [r11+r21*2+0x27] +XDIS b808: MISC BASE D5298D7C6C28 lea rdi, ptr [r12+r21*2+0x28] +XDIS b80e: MISC BASE D5298D7C6D29 lea rdi, ptr [r13+r21*2+0x29] +XDIS b814: MISC BASE D5298D7C6E2A lea rdi, ptr [r14+r21*2+0x2a] +XDIS b81a: MISC BASE D5298D7C6F2B lea rdi, ptr [r15+r21*2+0x2b] +XDIS b820: MISC BASE D5388D7C682C lea rdi, ptr [r16+r21*2+0x2c] +XDIS b826: MISC BASE D5388D7C692D lea rdi, ptr [r17+r21*2+0x2d] +XDIS b82c: MISC BASE D5388D7C6A2E lea rdi, ptr [r18+r21*2+0x2e] +XDIS b832: MISC BASE D5388D7C6B2F lea rdi, ptr [r19+r21*2+0x2f] +XDIS b838: MISC BASE D5388D7C6C30 lea rdi, ptr [r20+r21*2+0x30] +XDIS b83e: MISC BASE D5388D7C6D31 lea rdi, ptr [r21+r21*2+0x31] +XDIS b844: MISC BASE D5388D7C6E32 lea rdi, ptr [r22+r21*2+0x32] +XDIS b84a: MISC BASE D5388D7C6F33 lea rdi, ptr [r23+r21*2+0x33] +XDIS b850: MISC BASE D5398D7C6834 lea rdi, ptr [r24+r21*2+0x34] +XDIS b856: MISC BASE D5398D7C6935 lea rdi, ptr [r25+r21*2+0x35] +XDIS b85c: MISC BASE D5398D7C6A36 lea rdi, ptr [r26+r21*2+0x36] +XDIS b862: MISC BASE D5398D7C6B37 lea rdi, ptr [r27+r21*2+0x37] +XDIS b868: MISC BASE D5398D7C6C38 lea rdi, ptr [r28+r21*2+0x38] +XDIS b86e: MISC BASE D5398D7C6D39 lea rdi, ptr [r29+r21*2+0x39] +XDIS b874: MISC BASE D5398D7C6E3A lea rdi, ptr [r30+r21*2+0x3a] +XDIS b87a: MISC BASE D5398D7C6F3B lea rdi, ptr [r31+r21*2+0x3b] +XDIS b880: MISC BASE D5288D7C701D lea rdi, ptr [rax+r22*2+0x1d] +XDIS b886: MISC BASE D5288D7C711E lea rdi, ptr [rcx+r22*2+0x1e] +XDIS b88c: MISC BASE D5288D7C721F lea rdi, ptr [rdx+r22*2+0x1f] +XDIS b892: MISC BASE D5288D7C7320 lea rdi, ptr [rbx+r22*2+0x20] +XDIS b898: MISC BASE D5288D7C7421 lea rdi, ptr [rsp+r22*2+0x21] +XDIS b89e: MISC BASE D5288D7C7522 lea rdi, ptr [rbp+r22*2+0x22] +XDIS b8a4: MISC BASE D5288D7C7623 lea rdi, ptr [rsi+r22*2+0x23] +XDIS b8aa: MISC BASE D5288D7C7724 lea rdi, ptr [rdi+r22*2+0x24] +XDIS b8b0: MISC BASE D5298D7C7025 lea rdi, ptr [r8+r22*2+0x25] +XDIS b8b6: MISC BASE D5298D7C7126 lea rdi, ptr [r9+r22*2+0x26] +XDIS b8bc: MISC BASE D5298D7C7227 lea rdi, ptr [r10+r22*2+0x27] +XDIS b8c2: MISC BASE D5298D7C7328 lea rdi, ptr [r11+r22*2+0x28] +XDIS b8c8: MISC BASE D5298D7C7429 lea rdi, ptr [r12+r22*2+0x29] +XDIS b8ce: MISC BASE D5298D7C752A lea rdi, ptr [r13+r22*2+0x2a] +XDIS b8d4: MISC BASE D5298D7C762B lea rdi, ptr [r14+r22*2+0x2b] +XDIS b8da: MISC BASE D5298D7C772C lea rdi, ptr [r15+r22*2+0x2c] +XDIS b8e0: MISC BASE D5388D7C702D lea rdi, ptr [r16+r22*2+0x2d] +XDIS b8e6: MISC BASE D5388D7C712E lea rdi, ptr [r17+r22*2+0x2e] +XDIS b8ec: MISC BASE D5388D7C722F lea rdi, ptr [r18+r22*2+0x2f] +XDIS b8f2: MISC BASE D5388D7C7330 lea rdi, ptr [r19+r22*2+0x30] +XDIS b8f8: MISC BASE D5388D7C7431 lea rdi, ptr [r20+r22*2+0x31] +XDIS b8fe: MISC BASE D5388D7C7532 lea rdi, ptr [r21+r22*2+0x32] +XDIS b904: MISC BASE D5388D7C7633 lea rdi, ptr [r22+r22*2+0x33] +XDIS b90a: MISC BASE D5388D7C7734 lea rdi, ptr [r23+r22*2+0x34] +XDIS b910: MISC BASE D5398D7C7035 lea rdi, ptr [r24+r22*2+0x35] +XDIS b916: MISC BASE D5398D7C7136 lea rdi, ptr [r25+r22*2+0x36] +XDIS b91c: MISC BASE D5398D7C7237 lea rdi, ptr [r26+r22*2+0x37] +XDIS b922: MISC BASE D5398D7C7338 lea rdi, ptr [r27+r22*2+0x38] +XDIS b928: MISC BASE D5398D7C7439 lea rdi, ptr [r28+r22*2+0x39] +XDIS b92e: MISC BASE D5398D7C753A lea rdi, ptr [r29+r22*2+0x3a] +XDIS b934: MISC BASE D5398D7C763B lea rdi, ptr [r30+r22*2+0x3b] +XDIS b93a: MISC BASE D5398D7C773C lea rdi, ptr [r31+r22*2+0x3c] +XDIS b940: MISC BASE D5288D7C781E lea rdi, ptr [rax+r23*2+0x1e] +XDIS b946: MISC BASE D5288D7C791F lea rdi, ptr [rcx+r23*2+0x1f] +XDIS b94c: MISC BASE D5288D7C7A20 lea rdi, ptr [rdx+r23*2+0x20] +XDIS b952: MISC BASE D5288D7C7B21 lea rdi, ptr [rbx+r23*2+0x21] +XDIS b958: MISC BASE D5288D7C7C22 lea rdi, ptr [rsp+r23*2+0x22] +XDIS b95e: MISC BASE D5288D7C7D23 lea rdi, ptr [rbp+r23*2+0x23] +XDIS b964: MISC BASE D5288D7C7E24 lea rdi, ptr [rsi+r23*2+0x24] +XDIS b96a: MISC BASE D5288D7C7F25 lea rdi, ptr [rdi+r23*2+0x25] +XDIS b970: MISC BASE D5298D7C7826 lea rdi, ptr [r8+r23*2+0x26] +XDIS b976: MISC BASE D5298D7C7927 lea rdi, ptr [r9+r23*2+0x27] +XDIS b97c: MISC BASE D5298D7C7A28 lea rdi, ptr [r10+r23*2+0x28] +XDIS b982: MISC BASE D5298D7C7B29 lea rdi, ptr [r11+r23*2+0x29] +XDIS b988: MISC BASE D5298D7C7C2A lea rdi, ptr [r12+r23*2+0x2a] +XDIS b98e: MISC BASE D5298D7C7D2B lea rdi, ptr [r13+r23*2+0x2b] +XDIS b994: MISC BASE D5298D7C7E2C lea rdi, ptr [r14+r23*2+0x2c] +XDIS b99a: MISC BASE D5298D7C7F2D lea rdi, ptr [r15+r23*2+0x2d] +XDIS b9a0: MISC BASE D5388D7C782E lea rdi, ptr [r16+r23*2+0x2e] +XDIS b9a6: MISC BASE D5388D7C792F lea rdi, ptr [r17+r23*2+0x2f] +XDIS b9ac: MISC BASE D5388D7C7A30 lea rdi, ptr [r18+r23*2+0x30] +XDIS b9b2: MISC BASE D5388D7C7B31 lea rdi, ptr [r19+r23*2+0x31] +XDIS b9b8: MISC BASE D5388D7C7C32 lea rdi, ptr [r20+r23*2+0x32] +XDIS b9be: MISC BASE D5388D7C7D33 lea rdi, ptr [r21+r23*2+0x33] +XDIS b9c4: MISC BASE D5388D7C7E34 lea rdi, ptr [r22+r23*2+0x34] +XDIS b9ca: MISC BASE D5388D7C7F35 lea rdi, ptr [r23+r23*2+0x35] +XDIS b9d0: MISC BASE D5398D7C7836 lea rdi, ptr [r24+r23*2+0x36] +XDIS b9d6: MISC BASE D5398D7C7937 lea rdi, ptr [r25+r23*2+0x37] +XDIS b9dc: MISC BASE D5398D7C7A38 lea rdi, ptr [r26+r23*2+0x38] +XDIS b9e2: MISC BASE D5398D7C7B39 lea rdi, ptr [r27+r23*2+0x39] +XDIS b9e8: MISC BASE D5398D7C7C3A lea rdi, ptr [r28+r23*2+0x3a] +XDIS b9ee: MISC BASE D5398D7C7D3B lea rdi, ptr [r29+r23*2+0x3b] +XDIS b9f4: MISC BASE D5398D7C7E3C lea rdi, ptr [r30+r23*2+0x3c] +XDIS b9fa: MISC BASE D5398D7C7F3D lea rdi, ptr [r31+r23*2+0x3d] +XDIS ba00: MISC BASE D52A8D7C401F lea rdi, ptr [rax+r24*2+0x1f] +XDIS ba06: MISC BASE D52A8D7C4120 lea rdi, ptr [rcx+r24*2+0x20] +XDIS ba0c: MISC BASE D52A8D7C4221 lea rdi, ptr [rdx+r24*2+0x21] +XDIS ba12: MISC BASE D52A8D7C4322 lea rdi, ptr [rbx+r24*2+0x22] +XDIS ba18: MISC BASE D52A8D7C4423 lea rdi, ptr [rsp+r24*2+0x23] +XDIS ba1e: MISC BASE D52A8D7C4524 lea rdi, ptr [rbp+r24*2+0x24] +XDIS ba24: MISC BASE D52A8D7C4625 lea rdi, ptr [rsi+r24*2+0x25] +XDIS ba2a: MISC BASE D52A8D7C4726 lea rdi, ptr [rdi+r24*2+0x26] +XDIS ba30: MISC BASE D52B8D7C4027 lea rdi, ptr [r8+r24*2+0x27] +XDIS ba36: MISC BASE D52B8D7C4128 lea rdi, ptr [r9+r24*2+0x28] +XDIS ba3c: MISC BASE D52B8D7C4229 lea rdi, ptr [r10+r24*2+0x29] +XDIS ba42: MISC BASE D52B8D7C432A lea rdi, ptr [r11+r24*2+0x2a] +XDIS ba48: MISC BASE D52B8D7C442B lea rdi, ptr [r12+r24*2+0x2b] +XDIS ba4e: MISC BASE D52B8D7C452C lea rdi, ptr [r13+r24*2+0x2c] +XDIS ba54: MISC BASE D52B8D7C462D lea rdi, ptr [r14+r24*2+0x2d] +XDIS ba5a: MISC BASE D52B8D7C472E lea rdi, ptr [r15+r24*2+0x2e] +XDIS ba60: MISC BASE D53A8D7C402F lea rdi, ptr [r16+r24*2+0x2f] +XDIS ba66: MISC BASE D53A8D7C4130 lea rdi, ptr [r17+r24*2+0x30] +XDIS ba6c: MISC BASE D53A8D7C4231 lea rdi, ptr [r18+r24*2+0x31] +XDIS ba72: MISC BASE D53A8D7C4332 lea rdi, ptr [r19+r24*2+0x32] +XDIS ba78: MISC BASE D53A8D7C4433 lea rdi, ptr [r20+r24*2+0x33] +XDIS ba7e: MISC BASE D53A8D7C4534 lea rdi, ptr [r21+r24*2+0x34] +XDIS ba84: MISC BASE D53A8D7C4635 lea rdi, ptr [r22+r24*2+0x35] +XDIS ba8a: MISC BASE D53A8D7C4736 lea rdi, ptr [r23+r24*2+0x36] +XDIS ba90: MISC BASE D53B8D7C4037 lea rdi, ptr [r24+r24*2+0x37] +XDIS ba96: MISC BASE D53B8D7C4138 lea rdi, ptr [r25+r24*2+0x38] +XDIS ba9c: MISC BASE D53B8D7C4239 lea rdi, ptr [r26+r24*2+0x39] +XDIS baa2: MISC BASE D53B8D7C433A lea rdi, ptr [r27+r24*2+0x3a] +XDIS baa8: MISC BASE D53B8D7C443B lea rdi, ptr [r28+r24*2+0x3b] +XDIS baae: MISC BASE D53B8D7C453C lea rdi, ptr [r29+r24*2+0x3c] +XDIS bab4: MISC BASE D53B8D7C463D lea rdi, ptr [r30+r24*2+0x3d] +XDIS baba: MISC BASE D53B8D7C473E lea rdi, ptr [r31+r24*2+0x3e] +XDIS bac0: MISC BASE D52A8D7C4820 lea rdi, ptr [rax+r25*2+0x20] +XDIS bac6: MISC BASE D52A8D7C4921 lea rdi, ptr [rcx+r25*2+0x21] +XDIS bacc: MISC BASE D52A8D7C4A22 lea rdi, ptr [rdx+r25*2+0x22] +XDIS bad2: MISC BASE D52A8D7C4B23 lea rdi, ptr [rbx+r25*2+0x23] +XDIS bad8: MISC BASE D52A8D7C4C24 lea rdi, ptr [rsp+r25*2+0x24] +XDIS bade: MISC BASE D52A8D7C4D25 lea rdi, ptr [rbp+r25*2+0x25] +XDIS bae4: MISC BASE D52A8D7C4E26 lea rdi, ptr [rsi+r25*2+0x26] +XDIS baea: MISC BASE D52A8D7C4F27 lea rdi, ptr [rdi+r25*2+0x27] +XDIS baf0: MISC BASE D52B8D7C4828 lea rdi, ptr [r8+r25*2+0x28] +XDIS baf6: MISC BASE D52B8D7C4929 lea rdi, ptr [r9+r25*2+0x29] +XDIS bafc: MISC BASE D52B8D7C4A2A lea rdi, ptr [r10+r25*2+0x2a] +XDIS bb02: MISC BASE D52B8D7C4B2B lea rdi, ptr [r11+r25*2+0x2b] +XDIS bb08: MISC BASE D52B8D7C4C2C lea rdi, ptr [r12+r25*2+0x2c] +XDIS bb0e: MISC BASE D52B8D7C4D2D lea rdi, ptr [r13+r25*2+0x2d] +XDIS bb14: MISC BASE D52B8D7C4E2E lea rdi, ptr [r14+r25*2+0x2e] +XDIS bb1a: MISC BASE D52B8D7C4F2F lea rdi, ptr [r15+r25*2+0x2f] +XDIS bb20: MISC BASE D53A8D7C4830 lea rdi, ptr [r16+r25*2+0x30] +XDIS bb26: MISC BASE D53A8D7C4931 lea rdi, ptr [r17+r25*2+0x31] +XDIS bb2c: MISC BASE D53A8D7C4A32 lea rdi, ptr [r18+r25*2+0x32] +XDIS bb32: MISC BASE D53A8D7C4B33 lea rdi, ptr [r19+r25*2+0x33] +XDIS bb38: MISC BASE D53A8D7C4C34 lea rdi, ptr [r20+r25*2+0x34] +XDIS bb3e: MISC BASE D53A8D7C4D35 lea rdi, ptr [r21+r25*2+0x35] +XDIS bb44: MISC BASE D53A8D7C4E36 lea rdi, ptr [r22+r25*2+0x36] +XDIS bb4a: MISC BASE D53A8D7C4F37 lea rdi, ptr [r23+r25*2+0x37] +XDIS bb50: MISC BASE D53B8D7C4838 lea rdi, ptr [r24+r25*2+0x38] +XDIS bb56: MISC BASE D53B8D7C4939 lea rdi, ptr [r25+r25*2+0x39] +XDIS bb5c: MISC BASE D53B8D7C4A3A lea rdi, ptr [r26+r25*2+0x3a] +XDIS bb62: MISC BASE D53B8D7C4B3B lea rdi, ptr [r27+r25*2+0x3b] +XDIS bb68: MISC BASE D53B8D7C4C3C lea rdi, ptr [r28+r25*2+0x3c] +XDIS bb6e: MISC BASE D53B8D7C4D3D lea rdi, ptr [r29+r25*2+0x3d] +XDIS bb74: MISC BASE D53B8D7C4E3E lea rdi, ptr [r30+r25*2+0x3e] +XDIS bb7a: MISC BASE D53B8D7C4F3F lea rdi, ptr [r31+r25*2+0x3f] +XDIS bb80: MISC BASE D52A8D7C5021 lea rdi, ptr [rax+r26*2+0x21] +XDIS bb86: MISC BASE D52A8D7C5122 lea rdi, ptr [rcx+r26*2+0x22] +XDIS bb8c: MISC BASE D52A8D7C5223 lea rdi, ptr [rdx+r26*2+0x23] +XDIS bb92: MISC BASE D52A8D7C5324 lea rdi, ptr [rbx+r26*2+0x24] +XDIS bb98: MISC BASE D52A8D7C5425 lea rdi, ptr [rsp+r26*2+0x25] +XDIS bb9e: MISC BASE D52A8D7C5526 lea rdi, ptr [rbp+r26*2+0x26] +XDIS bba4: MISC BASE D52A8D7C5627 lea rdi, ptr [rsi+r26*2+0x27] +XDIS bbaa: MISC BASE D52A8D7C5728 lea rdi, ptr [rdi+r26*2+0x28] +XDIS bbb0: MISC BASE D52B8D7C5029 lea rdi, ptr [r8+r26*2+0x29] +XDIS bbb6: MISC BASE D52B8D7C512A lea rdi, ptr [r9+r26*2+0x2a] +XDIS bbbc: MISC BASE D52B8D7C522B lea rdi, ptr [r10+r26*2+0x2b] +XDIS bbc2: MISC BASE D52B8D7C532C lea rdi, ptr [r11+r26*2+0x2c] +XDIS bbc8: MISC BASE D52B8D7C542D lea rdi, ptr [r12+r26*2+0x2d] +XDIS bbce: MISC BASE D52B8D7C552E lea rdi, ptr [r13+r26*2+0x2e] +XDIS bbd4: MISC BASE D52B8D7C562F lea rdi, ptr [r14+r26*2+0x2f] +XDIS bbda: MISC BASE D52B8D7C5730 lea rdi, ptr [r15+r26*2+0x30] +XDIS bbe0: MISC BASE D53A8D7C5031 lea rdi, ptr [r16+r26*2+0x31] +XDIS bbe6: MISC BASE D53A8D7C5132 lea rdi, ptr [r17+r26*2+0x32] +XDIS bbec: MISC BASE D53A8D7C5233 lea rdi, ptr [r18+r26*2+0x33] +XDIS bbf2: MISC BASE D53A8D7C5334 lea rdi, ptr [r19+r26*2+0x34] +XDIS bbf8: MISC BASE D53A8D7C5435 lea rdi, ptr [r20+r26*2+0x35] +XDIS bbfe: MISC BASE D53A8D7C5536 lea rdi, ptr [r21+r26*2+0x36] +XDIS bc04: MISC BASE D53A8D7C5637 lea rdi, ptr [r22+r26*2+0x37] +XDIS bc0a: MISC BASE D53A8D7C5738 lea rdi, ptr [r23+r26*2+0x38] +XDIS bc10: MISC BASE D53B8D7C5039 lea rdi, ptr [r24+r26*2+0x39] +XDIS bc16: MISC BASE D53B8D7C513A lea rdi, ptr [r25+r26*2+0x3a] +XDIS bc1c: MISC BASE D53B8D7C523B lea rdi, ptr [r26+r26*2+0x3b] +XDIS bc22: MISC BASE D53B8D7C533C lea rdi, ptr [r27+r26*2+0x3c] +XDIS bc28: MISC BASE D53B8D7C543D lea rdi, ptr [r28+r26*2+0x3d] +XDIS bc2e: MISC BASE D53B8D7C553E lea rdi, ptr [r29+r26*2+0x3e] +XDIS bc34: MISC BASE D53B8D7C563F lea rdi, ptr [r30+r26*2+0x3f] +XDIS bc3a: MISC BASE D53B8D7C5740 lea rdi, ptr [r31+r26*2+0x40] +XDIS bc40: MISC BASE D52A8D7C5822 lea rdi, ptr [rax+r27*2+0x22] +XDIS bc46: MISC BASE D52A8D7C5923 lea rdi, ptr [rcx+r27*2+0x23] +XDIS bc4c: MISC BASE D52A8D7C5A24 lea rdi, ptr [rdx+r27*2+0x24] +XDIS bc52: MISC BASE D52A8D7C5B25 lea rdi, ptr [rbx+r27*2+0x25] +XDIS bc58: MISC BASE D52A8D7C5C26 lea rdi, ptr [rsp+r27*2+0x26] +XDIS bc5e: MISC BASE D52A8D7C5D27 lea rdi, ptr [rbp+r27*2+0x27] +XDIS bc64: MISC BASE D52A8D7C5E28 lea rdi, ptr [rsi+r27*2+0x28] +XDIS bc6a: MISC BASE D52A8D7C5F29 lea rdi, ptr [rdi+r27*2+0x29] +XDIS bc70: MISC BASE D52B8D7C582A lea rdi, ptr [r8+r27*2+0x2a] +XDIS bc76: MISC BASE D52B8D7C592B lea rdi, ptr [r9+r27*2+0x2b] +XDIS bc7c: MISC BASE D52B8D7C5A2C lea rdi, ptr [r10+r27*2+0x2c] +XDIS bc82: MISC BASE D52B8D7C5B2D lea rdi, ptr [r11+r27*2+0x2d] +XDIS bc88: MISC BASE D52B8D7C5C2E lea rdi, ptr [r12+r27*2+0x2e] +XDIS bc8e: MISC BASE D52B8D7C5D2F lea rdi, ptr [r13+r27*2+0x2f] +XDIS bc94: MISC BASE D52B8D7C5E30 lea rdi, ptr [r14+r27*2+0x30] +XDIS bc9a: MISC BASE D52B8D7C5F31 lea rdi, ptr [r15+r27*2+0x31] +XDIS bca0: MISC BASE D53A8D7C5832 lea rdi, ptr [r16+r27*2+0x32] +XDIS bca6: MISC BASE D53A8D7C5933 lea rdi, ptr [r17+r27*2+0x33] +XDIS bcac: MISC BASE D53A8D7C5A34 lea rdi, ptr [r18+r27*2+0x34] +XDIS bcb2: MISC BASE D53A8D7C5B35 lea rdi, ptr [r19+r27*2+0x35] +XDIS bcb8: MISC BASE D53A8D7C5C36 lea rdi, ptr [r20+r27*2+0x36] +XDIS bcbe: MISC BASE D53A8D7C5D37 lea rdi, ptr [r21+r27*2+0x37] +XDIS bcc4: MISC BASE D53A8D7C5E38 lea rdi, ptr [r22+r27*2+0x38] +XDIS bcca: MISC BASE D53A8D7C5F39 lea rdi, ptr [r23+r27*2+0x39] +XDIS bcd0: MISC BASE D53B8D7C583A lea rdi, ptr [r24+r27*2+0x3a] +XDIS bcd6: MISC BASE D53B8D7C593B lea rdi, ptr [r25+r27*2+0x3b] +XDIS bcdc: MISC BASE D53B8D7C5A3C lea rdi, ptr [r26+r27*2+0x3c] +XDIS bce2: MISC BASE D53B8D7C5B3D lea rdi, ptr [r27+r27*2+0x3d] +XDIS bce8: MISC BASE D53B8D7C5C3E lea rdi, ptr [r28+r27*2+0x3e] +XDIS bcee: MISC BASE D53B8D7C5D3F lea rdi, ptr [r29+r27*2+0x3f] +XDIS bcf4: MISC BASE D53B8D7C5E40 lea rdi, ptr [r30+r27*2+0x40] +XDIS bcfa: MISC BASE D53B8D7C5F41 lea rdi, ptr [r31+r27*2+0x41] +XDIS bd00: MISC BASE D52A8D7C6023 lea rdi, ptr [rax+r28*2+0x23] +XDIS bd06: MISC BASE D52A8D7C6124 lea rdi, ptr [rcx+r28*2+0x24] +XDIS bd0c: MISC BASE D52A8D7C6225 lea rdi, ptr [rdx+r28*2+0x25] +XDIS bd12: MISC BASE D52A8D7C6326 lea rdi, ptr [rbx+r28*2+0x26] +XDIS bd18: MISC BASE D52A8D7C6427 lea rdi, ptr [rsp+r28*2+0x27] +XDIS bd1e: MISC BASE D52A8D7C6528 lea rdi, ptr [rbp+r28*2+0x28] +XDIS bd24: MISC BASE D52A8D7C6629 lea rdi, ptr [rsi+r28*2+0x29] +XDIS bd2a: MISC BASE D52A8D7C672A lea rdi, ptr [rdi+r28*2+0x2a] +XDIS bd30: MISC BASE D52B8D7C602B lea rdi, ptr [r8+r28*2+0x2b] +XDIS bd36: MISC BASE D52B8D7C612C lea rdi, ptr [r9+r28*2+0x2c] +XDIS bd3c: MISC BASE D52B8D7C622D lea rdi, ptr [r10+r28*2+0x2d] +XDIS bd42: MISC BASE D52B8D7C632E lea rdi, ptr [r11+r28*2+0x2e] +XDIS bd48: MISC BASE D52B8D7C642F lea rdi, ptr [r12+r28*2+0x2f] +XDIS bd4e: MISC BASE D52B8D7C6530 lea rdi, ptr [r13+r28*2+0x30] +XDIS bd54: MISC BASE D52B8D7C6631 lea rdi, ptr [r14+r28*2+0x31] +XDIS bd5a: MISC BASE D52B8D7C6732 lea rdi, ptr [r15+r28*2+0x32] +XDIS bd60: MISC BASE D53A8D7C6033 lea rdi, ptr [r16+r28*2+0x33] +XDIS bd66: MISC BASE D53A8D7C6134 lea rdi, ptr [r17+r28*2+0x34] +XDIS bd6c: MISC BASE D53A8D7C6235 lea rdi, ptr [r18+r28*2+0x35] +XDIS bd72: MISC BASE D53A8D7C6336 lea rdi, ptr [r19+r28*2+0x36] +XDIS bd78: MISC BASE D53A8D7C6437 lea rdi, ptr [r20+r28*2+0x37] +XDIS bd7e: MISC BASE D53A8D7C6538 lea rdi, ptr [r21+r28*2+0x38] +XDIS bd84: MISC BASE D53A8D7C6639 lea rdi, ptr [r22+r28*2+0x39] +XDIS bd8a: MISC BASE D53A8D7C673A lea rdi, ptr [r23+r28*2+0x3a] +XDIS bd90: MISC BASE D53B8D7C603B lea rdi, ptr [r24+r28*2+0x3b] +XDIS bd96: MISC BASE D53B8D7C613C lea rdi, ptr [r25+r28*2+0x3c] +XDIS bd9c: MISC BASE D53B8D7C623D lea rdi, ptr [r26+r28*2+0x3d] +XDIS bda2: MISC BASE D53B8D7C633E lea rdi, ptr [r27+r28*2+0x3e] +XDIS bda8: MISC BASE D53B8D7C643F lea rdi, ptr [r28+r28*2+0x3f] +XDIS bdae: MISC BASE D53B8D7C6540 lea rdi, ptr [r29+r28*2+0x40] +XDIS bdb4: MISC BASE D53B8D7C6641 lea rdi, ptr [r30+r28*2+0x41] +XDIS bdba: MISC BASE D53B8D7C6742 lea rdi, ptr [r31+r28*2+0x42] +XDIS bdc0: MISC BASE D52A8D7C6824 lea rdi, ptr [rax+r29*2+0x24] +XDIS bdc6: MISC BASE D52A8D7C6925 lea rdi, ptr [rcx+r29*2+0x25] +XDIS bdcc: MISC BASE D52A8D7C6A26 lea rdi, ptr [rdx+r29*2+0x26] +XDIS bdd2: MISC BASE D52A8D7C6B27 lea rdi, ptr [rbx+r29*2+0x27] +XDIS bdd8: MISC BASE D52A8D7C6C28 lea rdi, ptr [rsp+r29*2+0x28] +XDIS bdde: MISC BASE D52A8D7C6D29 lea rdi, ptr [rbp+r29*2+0x29] +XDIS bde4: MISC BASE D52A8D7C6E2A lea rdi, ptr [rsi+r29*2+0x2a] +XDIS bdea: MISC BASE D52A8D7C6F2B lea rdi, ptr [rdi+r29*2+0x2b] +XDIS bdf0: MISC BASE D52B8D7C682C lea rdi, ptr [r8+r29*2+0x2c] +XDIS bdf6: MISC BASE D52B8D7C692D lea rdi, ptr [r9+r29*2+0x2d] +XDIS bdfc: MISC BASE D52B8D7C6A2E lea rdi, ptr [r10+r29*2+0x2e] +XDIS be02: MISC BASE D52B8D7C6B2F lea rdi, ptr [r11+r29*2+0x2f] +XDIS be08: MISC BASE D52B8D7C6C30 lea rdi, ptr [r12+r29*2+0x30] +XDIS be0e: MISC BASE D52B8D7C6D31 lea rdi, ptr [r13+r29*2+0x31] +XDIS be14: MISC BASE D52B8D7C6E32 lea rdi, ptr [r14+r29*2+0x32] +XDIS be1a: MISC BASE D52B8D7C6F33 lea rdi, ptr [r15+r29*2+0x33] +XDIS be20: MISC BASE D53A8D7C6834 lea rdi, ptr [r16+r29*2+0x34] +XDIS be26: MISC BASE D53A8D7C6935 lea rdi, ptr [r17+r29*2+0x35] +XDIS be2c: MISC BASE D53A8D7C6A36 lea rdi, ptr [r18+r29*2+0x36] +XDIS be32: MISC BASE D53A8D7C6B37 lea rdi, ptr [r19+r29*2+0x37] +XDIS be38: MISC BASE D53A8D7C6C38 lea rdi, ptr [r20+r29*2+0x38] +XDIS be3e: MISC BASE D53A8D7C6D39 lea rdi, ptr [r21+r29*2+0x39] +XDIS be44: MISC BASE D53A8D7C6E3A lea rdi, ptr [r22+r29*2+0x3a] +XDIS be4a: MISC BASE D53A8D7C6F3B lea rdi, ptr [r23+r29*2+0x3b] +XDIS be50: MISC BASE D53B8D7C683C lea rdi, ptr [r24+r29*2+0x3c] +XDIS be56: MISC BASE D53B8D7C693D lea rdi, ptr [r25+r29*2+0x3d] +XDIS be5c: MISC BASE D53B8D7C6A3E lea rdi, ptr [r26+r29*2+0x3e] +XDIS be62: MISC BASE D53B8D7C6B3F lea rdi, ptr [r27+r29*2+0x3f] +XDIS be68: MISC BASE D53B8D7C6C40 lea rdi, ptr [r28+r29*2+0x40] +XDIS be6e: MISC BASE D53B8D7C6D41 lea rdi, ptr [r29+r29*2+0x41] +XDIS be74: MISC BASE D53B8D7C6E42 lea rdi, ptr [r30+r29*2+0x42] +XDIS be7a: MISC BASE D53B8D7C6F43 lea rdi, ptr [r31+r29*2+0x43] +XDIS be80: MISC BASE D52A8D7C7025 lea rdi, ptr [rax+r30*2+0x25] +XDIS be86: MISC BASE D52A8D7C7126 lea rdi, ptr [rcx+r30*2+0x26] +XDIS be8c: MISC BASE D52A8D7C7227 lea rdi, ptr [rdx+r30*2+0x27] +XDIS be92: MISC BASE D52A8D7C7328 lea rdi, ptr [rbx+r30*2+0x28] +XDIS be98: MISC BASE D52A8D7C7429 lea rdi, ptr [rsp+r30*2+0x29] +XDIS be9e: MISC BASE D52A8D7C752A lea rdi, ptr [rbp+r30*2+0x2a] +XDIS bea4: MISC BASE D52A8D7C762B lea rdi, ptr [rsi+r30*2+0x2b] +XDIS beaa: MISC BASE D52A8D7C772C lea rdi, ptr [rdi+r30*2+0x2c] +XDIS beb0: MISC BASE D52B8D7C702D lea rdi, ptr [r8+r30*2+0x2d] +XDIS beb6: MISC BASE D52B8D7C712E lea rdi, ptr [r9+r30*2+0x2e] +XDIS bebc: MISC BASE D52B8D7C722F lea rdi, ptr [r10+r30*2+0x2f] +XDIS bec2: MISC BASE D52B8D7C7330 lea rdi, ptr [r11+r30*2+0x30] +XDIS bec8: MISC BASE D52B8D7C7431 lea rdi, ptr [r12+r30*2+0x31] +XDIS bece: MISC BASE D52B8D7C7532 lea rdi, ptr [r13+r30*2+0x32] +XDIS bed4: MISC BASE D52B8D7C7633 lea rdi, ptr [r14+r30*2+0x33] +XDIS beda: MISC BASE D52B8D7C7734 lea rdi, ptr [r15+r30*2+0x34] +XDIS bee0: MISC BASE D53A8D7C7035 lea rdi, ptr [r16+r30*2+0x35] +XDIS bee6: MISC BASE D53A8D7C7136 lea rdi, ptr [r17+r30*2+0x36] +XDIS beec: MISC BASE D53A8D7C7237 lea rdi, ptr [r18+r30*2+0x37] +XDIS bef2: MISC BASE D53A8D7C7338 lea rdi, ptr [r19+r30*2+0x38] +XDIS bef8: MISC BASE D53A8D7C7439 lea rdi, ptr [r20+r30*2+0x39] +XDIS befe: MISC BASE D53A8D7C753A lea rdi, ptr [r21+r30*2+0x3a] +XDIS bf04: MISC BASE D53A8D7C763B lea rdi, ptr [r22+r30*2+0x3b] +XDIS bf0a: MISC BASE D53A8D7C773C lea rdi, ptr [r23+r30*2+0x3c] +XDIS bf10: MISC BASE D53B8D7C703D lea rdi, ptr [r24+r30*2+0x3d] +XDIS bf16: MISC BASE D53B8D7C713E lea rdi, ptr [r25+r30*2+0x3e] +XDIS bf1c: MISC BASE D53B8D7C723F lea rdi, ptr [r26+r30*2+0x3f] +XDIS bf22: MISC BASE D53B8D7C7340 lea rdi, ptr [r27+r30*2+0x40] +XDIS bf28: MISC BASE D53B8D7C7441 lea rdi, ptr [r28+r30*2+0x41] +XDIS bf2e: MISC BASE D53B8D7C7542 lea rdi, ptr [r29+r30*2+0x42] +XDIS bf34: MISC BASE D53B8D7C7643 lea rdi, ptr [r30+r30*2+0x43] +XDIS bf3a: MISC BASE D53B8D7C7744 lea rdi, ptr [r31+r30*2+0x44] +XDIS bf40: MISC BASE D52A8D7C7826 lea rdi, ptr [rax+r31*2+0x26] +XDIS bf46: MISC BASE D52A8D7C7927 lea rdi, ptr [rcx+r31*2+0x27] +XDIS bf4c: MISC BASE D52A8D7C7A28 lea rdi, ptr [rdx+r31*2+0x28] +XDIS bf52: MISC BASE D52A8D7C7B29 lea rdi, ptr [rbx+r31*2+0x29] +XDIS bf58: MISC BASE D52A8D7C7C2A lea rdi, ptr [rsp+r31*2+0x2a] +XDIS bf5e: MISC BASE D52A8D7C7D2B lea rdi, ptr [rbp+r31*2+0x2b] +XDIS bf64: MISC BASE D52A8D7C7E2C lea rdi, ptr [rsi+r31*2+0x2c] +XDIS bf6a: MISC BASE D52A8D7C7F2D lea rdi, ptr [rdi+r31*2+0x2d] +XDIS bf70: MISC BASE D52B8D7C782E lea rdi, ptr [r8+r31*2+0x2e] +XDIS bf76: MISC BASE D52B8D7C792F lea rdi, ptr [r9+r31*2+0x2f] +XDIS bf7c: MISC BASE D52B8D7C7A30 lea rdi, ptr [r10+r31*2+0x30] +XDIS bf82: MISC BASE D52B8D7C7B31 lea rdi, ptr [r11+r31*2+0x31] +XDIS bf88: MISC BASE D52B8D7C7C32 lea rdi, ptr [r12+r31*2+0x32] +XDIS bf8e: MISC BASE D52B8D7C7D33 lea rdi, ptr [r13+r31*2+0x33] +XDIS bf94: MISC BASE D52B8D7C7E34 lea rdi, ptr [r14+r31*2+0x34] +XDIS bf9a: MISC BASE D52B8D7C7F35 lea rdi, ptr [r15+r31*2+0x35] +XDIS bfa0: MISC BASE D53A8D7C7836 lea rdi, ptr [r16+r31*2+0x36] +XDIS bfa6: MISC BASE D53A8D7C7937 lea rdi, ptr [r17+r31*2+0x37] +XDIS bfac: MISC BASE D53A8D7C7A38 lea rdi, ptr [r18+r31*2+0x38] +XDIS bfb2: MISC BASE D53A8D7C7B39 lea rdi, ptr [r19+r31*2+0x39] +XDIS bfb8: MISC BASE D53A8D7C7C3A lea rdi, ptr [r20+r31*2+0x3a] +XDIS bfbe: MISC BASE D53A8D7C7D3B lea rdi, ptr [r21+r31*2+0x3b] +XDIS bfc4: MISC BASE D53A8D7C7E3C lea rdi, ptr [r22+r31*2+0x3c] +XDIS bfca: MISC BASE D53A8D7C7F3D lea rdi, ptr [r23+r31*2+0x3d] +XDIS bfd0: MISC BASE D53B8D7C783E lea rdi, ptr [r24+r31*2+0x3e] +XDIS bfd6: MISC BASE D53B8D7C793F lea rdi, ptr [r25+r31*2+0x3f] +XDIS bfdc: MISC BASE D53B8D7C7A40 lea rdi, ptr [r26+r31*2+0x40] +XDIS bfe2: MISC BASE D53B8D7C7B41 lea rdi, ptr [r27+r31*2+0x41] +XDIS bfe8: MISC BASE D53B8D7C7C42 lea rdi, ptr [r28+r31*2+0x42] +XDIS bfee: MISC BASE D53B8D7C7D43 lea rdi, ptr [r29+r31*2+0x43] +XDIS bff4: MISC BASE D53B8D7C7E44 lea rdi, ptr [r30+r31*2+0x44] +XDIS bffa: MISC BASE D53B8D7C7F45 lea rdi, ptr [r31+r31*2+0x45] +XDIS c000: MISC BASE D50C8D444008 lea r8, ptr [rax+rax*2+0x8] +XDIS c006: MISC BASE D50C8D444109 lea r8, ptr [rcx+rax*2+0x9] +XDIS c00c: MISC BASE D50C8D44420A lea r8, ptr [rdx+rax*2+0xa] +XDIS c012: MISC BASE D50C8D44430B lea r8, ptr [rbx+rax*2+0xb] +XDIS c018: MISC BASE D50C8D44440C lea r8, ptr [rsp+rax*2+0xc] +XDIS c01e: MISC BASE D50C8D44450D lea r8, ptr [rbp+rax*2+0xd] +XDIS c024: MISC BASE D50C8D44460E lea r8, ptr [rsi+rax*2+0xe] +XDIS c02a: MISC BASE D50C8D44470F lea r8, ptr [rdi+rax*2+0xf] +XDIS c030: MISC BASE D50D8D444010 lea r8, ptr [r8+rax*2+0x10] +XDIS c036: MISC BASE D50D8D444111 lea r8, ptr [r9+rax*2+0x11] +XDIS c03c: MISC BASE D50D8D444212 lea r8, ptr [r10+rax*2+0x12] +XDIS c042: MISC BASE D50D8D444313 lea r8, ptr [r11+rax*2+0x13] +XDIS c048: MISC BASE D50D8D444414 lea r8, ptr [r12+rax*2+0x14] +XDIS c04e: MISC BASE D50D8D444515 lea r8, ptr [r13+rax*2+0x15] +XDIS c054: MISC BASE D50D8D444616 lea r8, ptr [r14+rax*2+0x16] +XDIS c05a: MISC BASE D50D8D444717 lea r8, ptr [r15+rax*2+0x17] +XDIS c060: MISC BASE D51C8D444018 lea r8, ptr [r16+rax*2+0x18] +XDIS c066: MISC BASE D51C8D444119 lea r8, ptr [r17+rax*2+0x19] +XDIS c06c: MISC BASE D51C8D44421A lea r8, ptr [r18+rax*2+0x1a] +XDIS c072: MISC BASE D51C8D44431B lea r8, ptr [r19+rax*2+0x1b] +XDIS c078: MISC BASE D51C8D44441C lea r8, ptr [r20+rax*2+0x1c] +XDIS c07e: MISC BASE D51C8D44451D lea r8, ptr [r21+rax*2+0x1d] +XDIS c084: MISC BASE D51C8D44461E lea r8, ptr [r22+rax*2+0x1e] +XDIS c08a: MISC BASE D51C8D44471F lea r8, ptr [r23+rax*2+0x1f] +XDIS c090: MISC BASE D51D8D444020 lea r8, ptr [r24+rax*2+0x20] +XDIS c096: MISC BASE D51D8D444121 lea r8, ptr [r25+rax*2+0x21] +XDIS c09c: MISC BASE D51D8D444222 lea r8, ptr [r26+rax*2+0x22] +XDIS c0a2: MISC BASE D51D8D444323 lea r8, ptr [r27+rax*2+0x23] +XDIS c0a8: MISC BASE D51D8D444424 lea r8, ptr [r28+rax*2+0x24] +XDIS c0ae: MISC BASE D51D8D444525 lea r8, ptr [r29+rax*2+0x25] +XDIS c0b4: MISC BASE D51D8D444626 lea r8, ptr [r30+rax*2+0x26] +XDIS c0ba: MISC BASE D51D8D444727 lea r8, ptr [r31+rax*2+0x27] +XDIS c0c0: MISC BASE D50C8D444809 lea r8, ptr [rax+rcx*2+0x9] +XDIS c0c6: MISC BASE D50C8D44490A lea r8, ptr [rcx+rcx*2+0xa] +XDIS c0cc: MISC BASE D50C8D444A0B lea r8, ptr [rdx+rcx*2+0xb] +XDIS c0d2: MISC BASE D50C8D444B0C lea r8, ptr [rbx+rcx*2+0xc] +XDIS c0d8: MISC BASE D50C8D444C0D lea r8, ptr [rsp+rcx*2+0xd] +XDIS c0de: MISC BASE D50C8D444D0E lea r8, ptr [rbp+rcx*2+0xe] +XDIS c0e4: MISC BASE D50C8D444E0F lea r8, ptr [rsi+rcx*2+0xf] +XDIS c0ea: MISC BASE D50C8D444F10 lea r8, ptr [rdi+rcx*2+0x10] +XDIS c0f0: MISC BASE D50D8D444811 lea r8, ptr [r8+rcx*2+0x11] +XDIS c0f6: MISC BASE D50D8D444912 lea r8, ptr [r9+rcx*2+0x12] +XDIS c0fc: MISC BASE D50D8D444A13 lea r8, ptr [r10+rcx*2+0x13] +XDIS c102: MISC BASE D50D8D444B14 lea r8, ptr [r11+rcx*2+0x14] +XDIS c108: MISC BASE D50D8D444C15 lea r8, ptr [r12+rcx*2+0x15] +XDIS c10e: MISC BASE D50D8D444D16 lea r8, ptr [r13+rcx*2+0x16] +XDIS c114: MISC BASE D50D8D444E17 lea r8, ptr [r14+rcx*2+0x17] +XDIS c11a: MISC BASE D50D8D444F18 lea r8, ptr [r15+rcx*2+0x18] +XDIS c120: MISC BASE D51C8D444819 lea r8, ptr [r16+rcx*2+0x19] +XDIS c126: MISC BASE D51C8D44491A lea r8, ptr [r17+rcx*2+0x1a] +XDIS c12c: MISC BASE D51C8D444A1B lea r8, ptr [r18+rcx*2+0x1b] +XDIS c132: MISC BASE D51C8D444B1C lea r8, ptr [r19+rcx*2+0x1c] +XDIS c138: MISC BASE D51C8D444C1D lea r8, ptr [r20+rcx*2+0x1d] +XDIS c13e: MISC BASE D51C8D444D1E lea r8, ptr [r21+rcx*2+0x1e] +XDIS c144: MISC BASE D51C8D444E1F lea r8, ptr [r22+rcx*2+0x1f] +XDIS c14a: MISC BASE D51C8D444F20 lea r8, ptr [r23+rcx*2+0x20] +XDIS c150: MISC BASE D51D8D444821 lea r8, ptr [r24+rcx*2+0x21] +XDIS c156: MISC BASE D51D8D444922 lea r8, ptr [r25+rcx*2+0x22] +XDIS c15c: MISC BASE D51D8D444A23 lea r8, ptr [r26+rcx*2+0x23] +XDIS c162: MISC BASE D51D8D444B24 lea r8, ptr [r27+rcx*2+0x24] +XDIS c168: MISC BASE D51D8D444C25 lea r8, ptr [r28+rcx*2+0x25] +XDIS c16e: MISC BASE D51D8D444D26 lea r8, ptr [r29+rcx*2+0x26] +XDIS c174: MISC BASE D51D8D444E27 lea r8, ptr [r30+rcx*2+0x27] +XDIS c17a: MISC BASE D51D8D444F28 lea r8, ptr [r31+rcx*2+0x28] +XDIS c180: MISC BASE D50C8D44500A lea r8, ptr [rax+rdx*2+0xa] +XDIS c186: MISC BASE D50C8D44510B lea r8, ptr [rcx+rdx*2+0xb] +XDIS c18c: MISC BASE D50C8D44520C lea r8, ptr [rdx+rdx*2+0xc] +XDIS c192: MISC BASE D50C8D44530D lea r8, ptr [rbx+rdx*2+0xd] +XDIS c198: MISC BASE D50C8D44540E lea r8, ptr [rsp+rdx*2+0xe] +XDIS c19e: MISC BASE D50C8D44550F lea r8, ptr [rbp+rdx*2+0xf] +XDIS c1a4: MISC BASE D50C8D445610 lea r8, ptr [rsi+rdx*2+0x10] +XDIS c1aa: MISC BASE D50C8D445711 lea r8, ptr [rdi+rdx*2+0x11] +XDIS c1b0: MISC BASE D50D8D445012 lea r8, ptr [r8+rdx*2+0x12] +XDIS c1b6: MISC BASE D50D8D445113 lea r8, ptr [r9+rdx*2+0x13] +XDIS c1bc: MISC BASE D50D8D445214 lea r8, ptr [r10+rdx*2+0x14] +XDIS c1c2: MISC BASE D50D8D445315 lea r8, ptr [r11+rdx*2+0x15] +XDIS c1c8: MISC BASE D50D8D445416 lea r8, ptr [r12+rdx*2+0x16] +XDIS c1ce: MISC BASE D50D8D445517 lea r8, ptr [r13+rdx*2+0x17] +XDIS c1d4: MISC BASE D50D8D445618 lea r8, ptr [r14+rdx*2+0x18] +XDIS c1da: MISC BASE D50D8D445719 lea r8, ptr [r15+rdx*2+0x19] +XDIS c1e0: MISC BASE D51C8D44501A lea r8, ptr [r16+rdx*2+0x1a] +XDIS c1e6: MISC BASE D51C8D44511B lea r8, ptr [r17+rdx*2+0x1b] +XDIS c1ec: MISC BASE D51C8D44521C lea r8, ptr [r18+rdx*2+0x1c] +XDIS c1f2: MISC BASE D51C8D44531D lea r8, ptr [r19+rdx*2+0x1d] +XDIS c1f8: MISC BASE D51C8D44541E lea r8, ptr [r20+rdx*2+0x1e] +XDIS c1fe: MISC BASE D51C8D44551F lea r8, ptr [r21+rdx*2+0x1f] +XDIS c204: MISC BASE D51C8D445620 lea r8, ptr [r22+rdx*2+0x20] +XDIS c20a: MISC BASE D51C8D445721 lea r8, ptr [r23+rdx*2+0x21] +XDIS c210: MISC BASE D51D8D445022 lea r8, ptr [r24+rdx*2+0x22] +XDIS c216: MISC BASE D51D8D445123 lea r8, ptr [r25+rdx*2+0x23] +XDIS c21c: MISC BASE D51D8D445224 lea r8, ptr [r26+rdx*2+0x24] +XDIS c222: MISC BASE D51D8D445325 lea r8, ptr [r27+rdx*2+0x25] +XDIS c228: MISC BASE D51D8D445426 lea r8, ptr [r28+rdx*2+0x26] +XDIS c22e: MISC BASE D51D8D445527 lea r8, ptr [r29+rdx*2+0x27] +XDIS c234: MISC BASE D51D8D445628 lea r8, ptr [r30+rdx*2+0x28] +XDIS c23a: MISC BASE D51D8D445729 lea r8, ptr [r31+rdx*2+0x29] +XDIS c240: MISC BASE D50C8D44580B lea r8, ptr [rax+rbx*2+0xb] +XDIS c246: MISC BASE D50C8D44590C lea r8, ptr [rcx+rbx*2+0xc] +XDIS c24c: MISC BASE D50C8D445A0D lea r8, ptr [rdx+rbx*2+0xd] +XDIS c252: MISC BASE D50C8D445B0E lea r8, ptr [rbx+rbx*2+0xe] +XDIS c258: MISC BASE D50C8D445C0F lea r8, ptr [rsp+rbx*2+0xf] +XDIS c25e: MISC BASE D50C8D445D10 lea r8, ptr [rbp+rbx*2+0x10] +XDIS c264: MISC BASE D50C8D445E11 lea r8, ptr [rsi+rbx*2+0x11] +XDIS c26a: MISC BASE D50C8D445F12 lea r8, ptr [rdi+rbx*2+0x12] +XDIS c270: MISC BASE D50D8D445813 lea r8, ptr [r8+rbx*2+0x13] +XDIS c276: MISC BASE D50D8D445914 lea r8, ptr [r9+rbx*2+0x14] +XDIS c27c: MISC BASE D50D8D445A15 lea r8, ptr [r10+rbx*2+0x15] +XDIS c282: MISC BASE D50D8D445B16 lea r8, ptr [r11+rbx*2+0x16] +XDIS c288: MISC BASE D50D8D445C17 lea r8, ptr [r12+rbx*2+0x17] +XDIS c28e: MISC BASE D50D8D445D18 lea r8, ptr [r13+rbx*2+0x18] +XDIS c294: MISC BASE D50D8D445E19 lea r8, ptr [r14+rbx*2+0x19] +XDIS c29a: MISC BASE D50D8D445F1A lea r8, ptr [r15+rbx*2+0x1a] +XDIS c2a0: MISC BASE D51C8D44581B lea r8, ptr [r16+rbx*2+0x1b] +XDIS c2a6: MISC BASE D51C8D44591C lea r8, ptr [r17+rbx*2+0x1c] +XDIS c2ac: MISC BASE D51C8D445A1D lea r8, ptr [r18+rbx*2+0x1d] +XDIS c2b2: MISC BASE D51C8D445B1E lea r8, ptr [r19+rbx*2+0x1e] +XDIS c2b8: MISC BASE D51C8D445C1F lea r8, ptr [r20+rbx*2+0x1f] +XDIS c2be: MISC BASE D51C8D445D20 lea r8, ptr [r21+rbx*2+0x20] +XDIS c2c4: MISC BASE D51C8D445E21 lea r8, ptr [r22+rbx*2+0x21] +XDIS c2ca: MISC BASE D51C8D445F22 lea r8, ptr [r23+rbx*2+0x22] +XDIS c2d0: MISC BASE D51D8D445823 lea r8, ptr [r24+rbx*2+0x23] +XDIS c2d6: MISC BASE D51D8D445924 lea r8, ptr [r25+rbx*2+0x24] +XDIS c2dc: MISC BASE D51D8D445A25 lea r8, ptr [r26+rbx*2+0x25] +XDIS c2e2: MISC BASE D51D8D445B26 lea r8, ptr [r27+rbx*2+0x26] +XDIS c2e8: MISC BASE D51D8D445C27 lea r8, ptr [r28+rbx*2+0x27] +XDIS c2ee: MISC BASE D51D8D445D28 lea r8, ptr [r29+rbx*2+0x28] +XDIS c2f4: MISC BASE D51D8D445E29 lea r8, ptr [r30+rbx*2+0x29] +XDIS c2fa: MISC BASE D51D8D445F2A lea r8, ptr [r31+rbx*2+0x2a] +XDIS c300: MISC BASE D50C8D44600C lea r8, ptr [rax+0xc] +XDIS c306: MISC BASE D50C8D44610D lea r8, ptr [rcx+0xd] +XDIS c30c: MISC BASE D50C8D44620E lea r8, ptr [rdx+0xe] +XDIS c312: MISC BASE D50C8D44630F lea r8, ptr [rbx+0xf] +XDIS c318: MISC BASE D50C8D446410 lea r8, ptr [rsp+0x10] +XDIS c31e: MISC BASE D50C8D446511 lea r8, ptr [rbp+0x11] +XDIS c324: MISC BASE D50C8D446612 lea r8, ptr [rsi+0x12] +XDIS c32a: MISC BASE D50C8D446713 lea r8, ptr [rdi+0x13] +XDIS c330: MISC BASE D50D8D446014 lea r8, ptr [r8+0x14] +XDIS c336: MISC BASE D50D8D446115 lea r8, ptr [r9+0x15] +XDIS c33c: MISC BASE D50D8D446216 lea r8, ptr [r10+0x16] +XDIS c342: MISC BASE D50D8D446317 lea r8, ptr [r11+0x17] +XDIS c348: MISC BASE D50D8D446418 lea r8, ptr [r12+0x18] +XDIS c34e: MISC BASE D50D8D446519 lea r8, ptr [r13+0x19] +XDIS c354: MISC BASE D50D8D44661A lea r8, ptr [r14+0x1a] +XDIS c35a: MISC BASE D50D8D44671B lea r8, ptr [r15+0x1b] +XDIS c360: MISC BASE D51C8D44601C lea r8, ptr [r16+0x1c] +XDIS c366: MISC BASE D51C8D44611D lea r8, ptr [r17+0x1d] +XDIS c36c: MISC BASE D51C8D44621E lea r8, ptr [r18+0x1e] +XDIS c372: MISC BASE D51C8D44631F lea r8, ptr [r19+0x1f] +XDIS c378: MISC BASE D51C8D446420 lea r8, ptr [r20+0x20] +XDIS c37e: MISC BASE D51C8D446521 lea r8, ptr [r21+0x21] +XDIS c384: MISC BASE D51C8D446622 lea r8, ptr [r22+0x22] +XDIS c38a: MISC BASE D51C8D446723 lea r8, ptr [r23+0x23] +XDIS c390: MISC BASE D51D8D446024 lea r8, ptr [r24+0x24] +XDIS c396: MISC BASE D51D8D446125 lea r8, ptr [r25+0x25] +XDIS c39c: MISC BASE D51D8D446226 lea r8, ptr [r26+0x26] +XDIS c3a2: MISC BASE D51D8D446327 lea r8, ptr [r27+0x27] +XDIS c3a8: MISC BASE D51D8D446428 lea r8, ptr [r28+0x28] +XDIS c3ae: MISC BASE D51D8D446529 lea r8, ptr [r29+0x29] +XDIS c3b4: MISC BASE D51D8D44662A lea r8, ptr [r30+0x2a] +XDIS c3ba: MISC BASE D51D8D44672B lea r8, ptr [r31+0x2b] +XDIS c3c0: MISC BASE D50C8D44680D lea r8, ptr [rax+rbp*2+0xd] +XDIS c3c6: MISC BASE D50C8D44690E lea r8, ptr [rcx+rbp*2+0xe] +XDIS c3cc: MISC BASE D50C8D446A0F lea r8, ptr [rdx+rbp*2+0xf] +XDIS c3d2: MISC BASE D50C8D446B10 lea r8, ptr [rbx+rbp*2+0x10] +XDIS c3d8: MISC BASE D50C8D446C11 lea r8, ptr [rsp+rbp*2+0x11] +XDIS c3de: MISC BASE D50C8D446D12 lea r8, ptr [rbp+rbp*2+0x12] +XDIS c3e4: MISC BASE D50C8D446E13 lea r8, ptr [rsi+rbp*2+0x13] +XDIS c3ea: MISC BASE D50C8D446F14 lea r8, ptr [rdi+rbp*2+0x14] +XDIS c3f0: MISC BASE D50D8D446815 lea r8, ptr [r8+rbp*2+0x15] +XDIS c3f6: MISC BASE D50D8D446916 lea r8, ptr [r9+rbp*2+0x16] +XDIS c3fc: MISC BASE D50D8D446A17 lea r8, ptr [r10+rbp*2+0x17] +XDIS c402: MISC BASE D50D8D446B18 lea r8, ptr [r11+rbp*2+0x18] +XDIS c408: MISC BASE D50D8D446C19 lea r8, ptr [r12+rbp*2+0x19] +XDIS c40e: MISC BASE D50D8D446D1A lea r8, ptr [r13+rbp*2+0x1a] +XDIS c414: MISC BASE D50D8D446E1B lea r8, ptr [r14+rbp*2+0x1b] +XDIS c41a: MISC BASE D50D8D446F1C lea r8, ptr [r15+rbp*2+0x1c] +XDIS c420: MISC BASE D51C8D44681D lea r8, ptr [r16+rbp*2+0x1d] +XDIS c426: MISC BASE D51C8D44691E lea r8, ptr [r17+rbp*2+0x1e] +XDIS c42c: MISC BASE D51C8D446A1F lea r8, ptr [r18+rbp*2+0x1f] +XDIS c432: MISC BASE D51C8D446B20 lea r8, ptr [r19+rbp*2+0x20] +XDIS c438: MISC BASE D51C8D446C21 lea r8, ptr [r20+rbp*2+0x21] +XDIS c43e: MISC BASE D51C8D446D22 lea r8, ptr [r21+rbp*2+0x22] +XDIS c444: MISC BASE D51C8D446E23 lea r8, ptr [r22+rbp*2+0x23] +XDIS c44a: MISC BASE D51C8D446F24 lea r8, ptr [r23+rbp*2+0x24] +XDIS c450: MISC BASE D51D8D446825 lea r8, ptr [r24+rbp*2+0x25] +XDIS c456: MISC BASE D51D8D446926 lea r8, ptr [r25+rbp*2+0x26] +XDIS c45c: MISC BASE D51D8D446A27 lea r8, ptr [r26+rbp*2+0x27] +XDIS c462: MISC BASE D51D8D446B28 lea r8, ptr [r27+rbp*2+0x28] +XDIS c468: MISC BASE D51D8D446C29 lea r8, ptr [r28+rbp*2+0x29] +XDIS c46e: MISC BASE D51D8D446D2A lea r8, ptr [r29+rbp*2+0x2a] +XDIS c474: MISC BASE D51D8D446E2B lea r8, ptr [r30+rbp*2+0x2b] +XDIS c47a: MISC BASE D51D8D446F2C lea r8, ptr [r31+rbp*2+0x2c] +XDIS c480: MISC BASE D50C8D44700E lea r8, ptr [rax+rsi*2+0xe] +XDIS c486: MISC BASE D50C8D44710F lea r8, ptr [rcx+rsi*2+0xf] +XDIS c48c: MISC BASE D50C8D447210 lea r8, ptr [rdx+rsi*2+0x10] +XDIS c492: MISC BASE D50C8D447311 lea r8, ptr [rbx+rsi*2+0x11] +XDIS c498: MISC BASE D50C8D447412 lea r8, ptr [rsp+rsi*2+0x12] +XDIS c49e: MISC BASE D50C8D447513 lea r8, ptr [rbp+rsi*2+0x13] +XDIS c4a4: MISC BASE D50C8D447614 lea r8, ptr [rsi+rsi*2+0x14] +XDIS c4aa: MISC BASE D50C8D447715 lea r8, ptr [rdi+rsi*2+0x15] +XDIS c4b0: MISC BASE D50D8D447016 lea r8, ptr [r8+rsi*2+0x16] +XDIS c4b6: MISC BASE D50D8D447117 lea r8, ptr [r9+rsi*2+0x17] +XDIS c4bc: MISC BASE D50D8D447218 lea r8, ptr [r10+rsi*2+0x18] +XDIS c4c2: MISC BASE D50D8D447319 lea r8, ptr [r11+rsi*2+0x19] +XDIS c4c8: MISC BASE D50D8D44741A lea r8, ptr [r12+rsi*2+0x1a] +XDIS c4ce: MISC BASE D50D8D44751B lea r8, ptr [r13+rsi*2+0x1b] +XDIS c4d4: MISC BASE D50D8D44761C lea r8, ptr [r14+rsi*2+0x1c] +XDIS c4da: MISC BASE D50D8D44771D lea r8, ptr [r15+rsi*2+0x1d] +XDIS c4e0: MISC BASE D51C8D44701E lea r8, ptr [r16+rsi*2+0x1e] +XDIS c4e6: MISC BASE D51C8D44711F lea r8, ptr [r17+rsi*2+0x1f] +XDIS c4ec: MISC BASE D51C8D447220 lea r8, ptr [r18+rsi*2+0x20] +XDIS c4f2: MISC BASE D51C8D447321 lea r8, ptr [r19+rsi*2+0x21] +XDIS c4f8: MISC BASE D51C8D447422 lea r8, ptr [r20+rsi*2+0x22] +XDIS c4fe: MISC BASE D51C8D447523 lea r8, ptr [r21+rsi*2+0x23] +XDIS c504: MISC BASE D51C8D447624 lea r8, ptr [r22+rsi*2+0x24] +XDIS c50a: MISC BASE D51C8D447725 lea r8, ptr [r23+rsi*2+0x25] +XDIS c510: MISC BASE D51D8D447026 lea r8, ptr [r24+rsi*2+0x26] +XDIS c516: MISC BASE D51D8D447127 lea r8, ptr [r25+rsi*2+0x27] +XDIS c51c: MISC BASE D51D8D447228 lea r8, ptr [r26+rsi*2+0x28] +XDIS c522: MISC BASE D51D8D447329 lea r8, ptr [r27+rsi*2+0x29] +XDIS c528: MISC BASE D51D8D44742A lea r8, ptr [r28+rsi*2+0x2a] +XDIS c52e: MISC BASE D51D8D44752B lea r8, ptr [r29+rsi*2+0x2b] +XDIS c534: MISC BASE D51D8D44762C lea r8, ptr [r30+rsi*2+0x2c] +XDIS c53a: MISC BASE D51D8D44772D lea r8, ptr [r31+rsi*2+0x2d] +XDIS c540: MISC BASE D50C8D44780F lea r8, ptr [rax+rdi*2+0xf] +XDIS c546: MISC BASE D50C8D447910 lea r8, ptr [rcx+rdi*2+0x10] +XDIS c54c: MISC BASE D50C8D447A11 lea r8, ptr [rdx+rdi*2+0x11] +XDIS c552: MISC BASE D50C8D447B12 lea r8, ptr [rbx+rdi*2+0x12] +XDIS c558: MISC BASE D50C8D447C13 lea r8, ptr [rsp+rdi*2+0x13] +XDIS c55e: MISC BASE D50C8D447D14 lea r8, ptr [rbp+rdi*2+0x14] +XDIS c564: MISC BASE D50C8D447E15 lea r8, ptr [rsi+rdi*2+0x15] +XDIS c56a: MISC BASE D50C8D447F16 lea r8, ptr [rdi+rdi*2+0x16] +XDIS c570: MISC BASE D50D8D447817 lea r8, ptr [r8+rdi*2+0x17] +XDIS c576: MISC BASE D50D8D447918 lea r8, ptr [r9+rdi*2+0x18] +XDIS c57c: MISC BASE D50D8D447A19 lea r8, ptr [r10+rdi*2+0x19] +XDIS c582: MISC BASE D50D8D447B1A lea r8, ptr [r11+rdi*2+0x1a] +XDIS c588: MISC BASE D50D8D447C1B lea r8, ptr [r12+rdi*2+0x1b] +XDIS c58e: MISC BASE D50D8D447D1C lea r8, ptr [r13+rdi*2+0x1c] +XDIS c594: MISC BASE D50D8D447E1D lea r8, ptr [r14+rdi*2+0x1d] +XDIS c59a: MISC BASE D50D8D447F1E lea r8, ptr [r15+rdi*2+0x1e] +XDIS c5a0: MISC BASE D51C8D44781F lea r8, ptr [r16+rdi*2+0x1f] +XDIS c5a6: MISC BASE D51C8D447920 lea r8, ptr [r17+rdi*2+0x20] +XDIS c5ac: MISC BASE D51C8D447A21 lea r8, ptr [r18+rdi*2+0x21] +XDIS c5b2: MISC BASE D51C8D447B22 lea r8, ptr [r19+rdi*2+0x22] +XDIS c5b8: MISC BASE D51C8D447C23 lea r8, ptr [r20+rdi*2+0x23] +XDIS c5be: MISC BASE D51C8D447D24 lea r8, ptr [r21+rdi*2+0x24] +XDIS c5c4: MISC BASE D51C8D447E25 lea r8, ptr [r22+rdi*2+0x25] +XDIS c5ca: MISC BASE D51C8D447F26 lea r8, ptr [r23+rdi*2+0x26] +XDIS c5d0: MISC BASE D51D8D447827 lea r8, ptr [r24+rdi*2+0x27] +XDIS c5d6: MISC BASE D51D8D447928 lea r8, ptr [r25+rdi*2+0x28] +XDIS c5dc: MISC BASE D51D8D447A29 lea r8, ptr [r26+rdi*2+0x29] +XDIS c5e2: MISC BASE D51D8D447B2A lea r8, ptr [r27+rdi*2+0x2a] +XDIS c5e8: MISC BASE D51D8D447C2B lea r8, ptr [r28+rdi*2+0x2b] +XDIS c5ee: MISC BASE D51D8D447D2C lea r8, ptr [r29+rdi*2+0x2c] +XDIS c5f4: MISC BASE D51D8D447E2D lea r8, ptr [r30+rdi*2+0x2d] +XDIS c5fa: MISC BASE D51D8D447F2E lea r8, ptr [r31+rdi*2+0x2e] +XDIS c600: MISC BASE D50E8D444010 lea r8, ptr [rax+r8*2+0x10] +XDIS c606: MISC BASE D50E8D444111 lea r8, ptr [rcx+r8*2+0x11] +XDIS c60c: MISC BASE D50E8D444212 lea r8, ptr [rdx+r8*2+0x12] +XDIS c612: MISC BASE D50E8D444313 lea r8, ptr [rbx+r8*2+0x13] +XDIS c618: MISC BASE D50E8D444414 lea r8, ptr [rsp+r8*2+0x14] +XDIS c61e: MISC BASE D50E8D444515 lea r8, ptr [rbp+r8*2+0x15] +XDIS c624: MISC BASE D50E8D444616 lea r8, ptr [rsi+r8*2+0x16] +XDIS c62a: MISC BASE D50E8D444717 lea r8, ptr [rdi+r8*2+0x17] +XDIS c630: MISC BASE D50F8D444018 lea r8, ptr [r8+r8*2+0x18] +XDIS c636: MISC BASE D50F8D444119 lea r8, ptr [r9+r8*2+0x19] +XDIS c63c: MISC BASE D50F8D44421A lea r8, ptr [r10+r8*2+0x1a] +XDIS c642: MISC BASE D50F8D44431B lea r8, ptr [r11+r8*2+0x1b] +XDIS c648: MISC BASE D50F8D44441C lea r8, ptr [r12+r8*2+0x1c] +XDIS c64e: MISC BASE D50F8D44451D lea r8, ptr [r13+r8*2+0x1d] +XDIS c654: MISC BASE D50F8D44461E lea r8, ptr [r14+r8*2+0x1e] +XDIS c65a: MISC BASE D50F8D44471F lea r8, ptr [r15+r8*2+0x1f] +XDIS c660: MISC BASE D51E8D444020 lea r8, ptr [r16+r8*2+0x20] +XDIS c666: MISC BASE D51E8D444121 lea r8, ptr [r17+r8*2+0x21] +XDIS c66c: MISC BASE D51E8D444222 lea r8, ptr [r18+r8*2+0x22] +XDIS c672: MISC BASE D51E8D444323 lea r8, ptr [r19+r8*2+0x23] +XDIS c678: MISC BASE D51E8D444424 lea r8, ptr [r20+r8*2+0x24] +XDIS c67e: MISC BASE D51E8D444525 lea r8, ptr [r21+r8*2+0x25] +XDIS c684: MISC BASE D51E8D444626 lea r8, ptr [r22+r8*2+0x26] +XDIS c68a: MISC BASE D51E8D444727 lea r8, ptr [r23+r8*2+0x27] +XDIS c690: MISC BASE D51F8D444028 lea r8, ptr [r24+r8*2+0x28] +XDIS c696: MISC BASE D51F8D444129 lea r8, ptr [r25+r8*2+0x29] +XDIS c69c: MISC BASE D51F8D44422A lea r8, ptr [r26+r8*2+0x2a] +XDIS c6a2: MISC BASE D51F8D44432B lea r8, ptr [r27+r8*2+0x2b] +XDIS c6a8: MISC BASE D51F8D44442C lea r8, ptr [r28+r8*2+0x2c] +XDIS c6ae: MISC BASE D51F8D44452D lea r8, ptr [r29+r8*2+0x2d] +XDIS c6b4: MISC BASE D51F8D44462E lea r8, ptr [r30+r8*2+0x2e] +XDIS c6ba: MISC BASE D51F8D44472F lea r8, ptr [r31+r8*2+0x2f] +XDIS c6c0: MISC BASE D50E8D444811 lea r8, ptr [rax+r9*2+0x11] +XDIS c6c6: MISC BASE D50E8D444912 lea r8, ptr [rcx+r9*2+0x12] +XDIS c6cc: MISC BASE D50E8D444A13 lea r8, ptr [rdx+r9*2+0x13] +XDIS c6d2: MISC BASE D50E8D444B14 lea r8, ptr [rbx+r9*2+0x14] +XDIS c6d8: MISC BASE D50E8D444C15 lea r8, ptr [rsp+r9*2+0x15] +XDIS c6de: MISC BASE D50E8D444D16 lea r8, ptr [rbp+r9*2+0x16] +XDIS c6e4: MISC BASE D50E8D444E17 lea r8, ptr [rsi+r9*2+0x17] +XDIS c6ea: MISC BASE D50E8D444F18 lea r8, ptr [rdi+r9*2+0x18] +XDIS c6f0: MISC BASE D50F8D444819 lea r8, ptr [r8+r9*2+0x19] +XDIS c6f6: MISC BASE D50F8D44491A lea r8, ptr [r9+r9*2+0x1a] +XDIS c6fc: MISC BASE D50F8D444A1B lea r8, ptr [r10+r9*2+0x1b] +XDIS c702: MISC BASE D50F8D444B1C lea r8, ptr [r11+r9*2+0x1c] +XDIS c708: MISC BASE D50F8D444C1D lea r8, ptr [r12+r9*2+0x1d] +XDIS c70e: MISC BASE D50F8D444D1E lea r8, ptr [r13+r9*2+0x1e] +XDIS c714: MISC BASE D50F8D444E1F lea r8, ptr [r14+r9*2+0x1f] +XDIS c71a: MISC BASE D50F8D444F20 lea r8, ptr [r15+r9*2+0x20] +XDIS c720: MISC BASE D51E8D444821 lea r8, ptr [r16+r9*2+0x21] +XDIS c726: MISC BASE D51E8D444922 lea r8, ptr [r17+r9*2+0x22] +XDIS c72c: MISC BASE D51E8D444A23 lea r8, ptr [r18+r9*2+0x23] +XDIS c732: MISC BASE D51E8D444B24 lea r8, ptr [r19+r9*2+0x24] +XDIS c738: MISC BASE D51E8D444C25 lea r8, ptr [r20+r9*2+0x25] +XDIS c73e: MISC BASE D51E8D444D26 lea r8, ptr [r21+r9*2+0x26] +XDIS c744: MISC BASE D51E8D444E27 lea r8, ptr [r22+r9*2+0x27] +XDIS c74a: MISC BASE D51E8D444F28 lea r8, ptr [r23+r9*2+0x28] +XDIS c750: MISC BASE D51F8D444829 lea r8, ptr [r24+r9*2+0x29] +XDIS c756: MISC BASE D51F8D44492A lea r8, ptr [r25+r9*2+0x2a] +XDIS c75c: MISC BASE D51F8D444A2B lea r8, ptr [r26+r9*2+0x2b] +XDIS c762: MISC BASE D51F8D444B2C lea r8, ptr [r27+r9*2+0x2c] +XDIS c768: MISC BASE D51F8D444C2D lea r8, ptr [r28+r9*2+0x2d] +XDIS c76e: MISC BASE D51F8D444D2E lea r8, ptr [r29+r9*2+0x2e] +XDIS c774: MISC BASE D51F8D444E2F lea r8, ptr [r30+r9*2+0x2f] +XDIS c77a: MISC BASE D51F8D444F30 lea r8, ptr [r31+r9*2+0x30] +XDIS c780: MISC BASE D50E8D445012 lea r8, ptr [rax+r10*2+0x12] +XDIS c786: MISC BASE D50E8D445113 lea r8, ptr [rcx+r10*2+0x13] +XDIS c78c: MISC BASE D50E8D445214 lea r8, ptr [rdx+r10*2+0x14] +XDIS c792: MISC BASE D50E8D445315 lea r8, ptr [rbx+r10*2+0x15] +XDIS c798: MISC BASE D50E8D445416 lea r8, ptr [rsp+r10*2+0x16] +XDIS c79e: MISC BASE D50E8D445517 lea r8, ptr [rbp+r10*2+0x17] +XDIS c7a4: MISC BASE D50E8D445618 lea r8, ptr [rsi+r10*2+0x18] +XDIS c7aa: MISC BASE D50E8D445719 lea r8, ptr [rdi+r10*2+0x19] +XDIS c7b0: MISC BASE D50F8D44501A lea r8, ptr [r8+r10*2+0x1a] +XDIS c7b6: MISC BASE D50F8D44511B lea r8, ptr [r9+r10*2+0x1b] +XDIS c7bc: MISC BASE D50F8D44521C lea r8, ptr [r10+r10*2+0x1c] +XDIS c7c2: MISC BASE D50F8D44531D lea r8, ptr [r11+r10*2+0x1d] +XDIS c7c8: MISC BASE D50F8D44541E lea r8, ptr [r12+r10*2+0x1e] +XDIS c7ce: MISC BASE D50F8D44551F lea r8, ptr [r13+r10*2+0x1f] +XDIS c7d4: MISC BASE D50F8D445620 lea r8, ptr [r14+r10*2+0x20] +XDIS c7da: MISC BASE D50F8D445721 lea r8, ptr [r15+r10*2+0x21] +XDIS c7e0: MISC BASE D51E8D445022 lea r8, ptr [r16+r10*2+0x22] +XDIS c7e6: MISC BASE D51E8D445123 lea r8, ptr [r17+r10*2+0x23] +XDIS c7ec: MISC BASE D51E8D445224 lea r8, ptr [r18+r10*2+0x24] +XDIS c7f2: MISC BASE D51E8D445325 lea r8, ptr [r19+r10*2+0x25] +XDIS c7f8: MISC BASE D51E8D445426 lea r8, ptr [r20+r10*2+0x26] +XDIS c7fe: MISC BASE D51E8D445527 lea r8, ptr [r21+r10*2+0x27] +XDIS c804: MISC BASE D51E8D445628 lea r8, ptr [r22+r10*2+0x28] +XDIS c80a: MISC BASE D51E8D445729 lea r8, ptr [r23+r10*2+0x29] +XDIS c810: MISC BASE D51F8D44502A lea r8, ptr [r24+r10*2+0x2a] +XDIS c816: MISC BASE D51F8D44512B lea r8, ptr [r25+r10*2+0x2b] +XDIS c81c: MISC BASE D51F8D44522C lea r8, ptr [r26+r10*2+0x2c] +XDIS c822: MISC BASE D51F8D44532D lea r8, ptr [r27+r10*2+0x2d] +XDIS c828: MISC BASE D51F8D44542E lea r8, ptr [r28+r10*2+0x2e] +XDIS c82e: MISC BASE D51F8D44552F lea r8, ptr [r29+r10*2+0x2f] +XDIS c834: MISC BASE D51F8D445630 lea r8, ptr [r30+r10*2+0x30] +XDIS c83a: MISC BASE D51F8D445731 lea r8, ptr [r31+r10*2+0x31] +XDIS c840: MISC BASE D50E8D445813 lea r8, ptr [rax+r11*2+0x13] +XDIS c846: MISC BASE D50E8D445914 lea r8, ptr [rcx+r11*2+0x14] +XDIS c84c: MISC BASE D50E8D445A15 lea r8, ptr [rdx+r11*2+0x15] +XDIS c852: MISC BASE D50E8D445B16 lea r8, ptr [rbx+r11*2+0x16] +XDIS c858: MISC BASE D50E8D445C17 lea r8, ptr [rsp+r11*2+0x17] +XDIS c85e: MISC BASE D50E8D445D18 lea r8, ptr [rbp+r11*2+0x18] +XDIS c864: MISC BASE D50E8D445E19 lea r8, ptr [rsi+r11*2+0x19] +XDIS c86a: MISC BASE D50E8D445F1A lea r8, ptr [rdi+r11*2+0x1a] +XDIS c870: MISC BASE D50F8D44581B lea r8, ptr [r8+r11*2+0x1b] +XDIS c876: MISC BASE D50F8D44591C lea r8, ptr [r9+r11*2+0x1c] +XDIS c87c: MISC BASE D50F8D445A1D lea r8, ptr [r10+r11*2+0x1d] +XDIS c882: MISC BASE D50F8D445B1E lea r8, ptr [r11+r11*2+0x1e] +XDIS c888: MISC BASE D50F8D445C1F lea r8, ptr [r12+r11*2+0x1f] +XDIS c88e: MISC BASE D50F8D445D20 lea r8, ptr [r13+r11*2+0x20] +XDIS c894: MISC BASE D50F8D445E21 lea r8, ptr [r14+r11*2+0x21] +XDIS c89a: MISC BASE D50F8D445F22 lea r8, ptr [r15+r11*2+0x22] +XDIS c8a0: MISC BASE D51E8D445823 lea r8, ptr [r16+r11*2+0x23] +XDIS c8a6: MISC BASE D51E8D445924 lea r8, ptr [r17+r11*2+0x24] +XDIS c8ac: MISC BASE D51E8D445A25 lea r8, ptr [r18+r11*2+0x25] +XDIS c8b2: MISC BASE D51E8D445B26 lea r8, ptr [r19+r11*2+0x26] +XDIS c8b8: MISC BASE D51E8D445C27 lea r8, ptr [r20+r11*2+0x27] +XDIS c8be: MISC BASE D51E8D445D28 lea r8, ptr [r21+r11*2+0x28] +XDIS c8c4: MISC BASE D51E8D445E29 lea r8, ptr [r22+r11*2+0x29] +XDIS c8ca: MISC BASE D51E8D445F2A lea r8, ptr [r23+r11*2+0x2a] +XDIS c8d0: MISC BASE D51F8D44582B lea r8, ptr [r24+r11*2+0x2b] +XDIS c8d6: MISC BASE D51F8D44592C lea r8, ptr [r25+r11*2+0x2c] +XDIS c8dc: MISC BASE D51F8D445A2D lea r8, ptr [r26+r11*2+0x2d] +XDIS c8e2: MISC BASE D51F8D445B2E lea r8, ptr [r27+r11*2+0x2e] +XDIS c8e8: MISC BASE D51F8D445C2F lea r8, ptr [r28+r11*2+0x2f] +XDIS c8ee: MISC BASE D51F8D445D30 lea r8, ptr [r29+r11*2+0x30] +XDIS c8f4: MISC BASE D51F8D445E31 lea r8, ptr [r30+r11*2+0x31] +XDIS c8fa: MISC BASE D51F8D445F32 lea r8, ptr [r31+r11*2+0x32] +XDIS c900: MISC BASE D50E8D446014 lea r8, ptr [rax+r12*2+0x14] +XDIS c906: MISC BASE D50E8D446115 lea r8, ptr [rcx+r12*2+0x15] +XDIS c90c: MISC BASE D50E8D446216 lea r8, ptr [rdx+r12*2+0x16] +XDIS c912: MISC BASE D50E8D446317 lea r8, ptr [rbx+r12*2+0x17] +XDIS c918: MISC BASE D50E8D446418 lea r8, ptr [rsp+r12*2+0x18] +XDIS c91e: MISC BASE D50E8D446519 lea r8, ptr [rbp+r12*2+0x19] +XDIS c924: MISC BASE D50E8D44661A lea r8, ptr [rsi+r12*2+0x1a] +XDIS c92a: MISC BASE D50E8D44671B lea r8, ptr [rdi+r12*2+0x1b] +XDIS c930: MISC BASE D50F8D44601C lea r8, ptr [r8+r12*2+0x1c] +XDIS c936: MISC BASE D50F8D44611D lea r8, ptr [r9+r12*2+0x1d] +XDIS c93c: MISC BASE D50F8D44621E lea r8, ptr [r10+r12*2+0x1e] +XDIS c942: MISC BASE D50F8D44631F lea r8, ptr [r11+r12*2+0x1f] +XDIS c948: MISC BASE D50F8D446420 lea r8, ptr [r12+r12*2+0x20] +XDIS c94e: MISC BASE D50F8D446521 lea r8, ptr [r13+r12*2+0x21] +XDIS c954: MISC BASE D50F8D446622 lea r8, ptr [r14+r12*2+0x22] +XDIS c95a: MISC BASE D50F8D446723 lea r8, ptr [r15+r12*2+0x23] +XDIS c960: MISC BASE D51E8D446024 lea r8, ptr [r16+r12*2+0x24] +XDIS c966: MISC BASE D51E8D446125 lea r8, ptr [r17+r12*2+0x25] +XDIS c96c: MISC BASE D51E8D446226 lea r8, ptr [r18+r12*2+0x26] +XDIS c972: MISC BASE D51E8D446327 lea r8, ptr [r19+r12*2+0x27] +XDIS c978: MISC BASE D51E8D446428 lea r8, ptr [r20+r12*2+0x28] +XDIS c97e: MISC BASE D51E8D446529 lea r8, ptr [r21+r12*2+0x29] +XDIS c984: MISC BASE D51E8D44662A lea r8, ptr [r22+r12*2+0x2a] +XDIS c98a: MISC BASE D51E8D44672B lea r8, ptr [r23+r12*2+0x2b] +XDIS c990: MISC BASE D51F8D44602C lea r8, ptr [r24+r12*2+0x2c] +XDIS c996: MISC BASE D51F8D44612D lea r8, ptr [r25+r12*2+0x2d] +XDIS c99c: MISC BASE D51F8D44622E lea r8, ptr [r26+r12*2+0x2e] +XDIS c9a2: MISC BASE D51F8D44632F lea r8, ptr [r27+r12*2+0x2f] +XDIS c9a8: MISC BASE D51F8D446430 lea r8, ptr [r28+r12*2+0x30] +XDIS c9ae: MISC BASE D51F8D446531 lea r8, ptr [r29+r12*2+0x31] +XDIS c9b4: MISC BASE D51F8D446632 lea r8, ptr [r30+r12*2+0x32] +XDIS c9ba: MISC BASE D51F8D446733 lea r8, ptr [r31+r12*2+0x33] +XDIS c9c0: MISC BASE D50E8D446815 lea r8, ptr [rax+r13*2+0x15] +XDIS c9c6: MISC BASE D50E8D446916 lea r8, ptr [rcx+r13*2+0x16] +XDIS c9cc: MISC BASE D50E8D446A17 lea r8, ptr [rdx+r13*2+0x17] +XDIS c9d2: MISC BASE D50E8D446B18 lea r8, ptr [rbx+r13*2+0x18] +XDIS c9d8: MISC BASE D50E8D446C19 lea r8, ptr [rsp+r13*2+0x19] +XDIS c9de: MISC BASE D50E8D446D1A lea r8, ptr [rbp+r13*2+0x1a] +XDIS c9e4: MISC BASE D50E8D446E1B lea r8, ptr [rsi+r13*2+0x1b] +XDIS c9ea: MISC BASE D50E8D446F1C lea r8, ptr [rdi+r13*2+0x1c] +XDIS c9f0: MISC BASE D50F8D44681D lea r8, ptr [r8+r13*2+0x1d] +XDIS c9f6: MISC BASE D50F8D44691E lea r8, ptr [r9+r13*2+0x1e] +XDIS c9fc: MISC BASE D50F8D446A1F lea r8, ptr [r10+r13*2+0x1f] +XDIS ca02: MISC BASE D50F8D446B20 lea r8, ptr [r11+r13*2+0x20] +XDIS ca08: MISC BASE D50F8D446C21 lea r8, ptr [r12+r13*2+0x21] +XDIS ca0e: MISC BASE D50F8D446D22 lea r8, ptr [r13+r13*2+0x22] +XDIS ca14: MISC BASE D50F8D446E23 lea r8, ptr [r14+r13*2+0x23] +XDIS ca1a: MISC BASE D50F8D446F24 lea r8, ptr [r15+r13*2+0x24] +XDIS ca20: MISC BASE D51E8D446825 lea r8, ptr [r16+r13*2+0x25] +XDIS ca26: MISC BASE D51E8D446926 lea r8, ptr [r17+r13*2+0x26] +XDIS ca2c: MISC BASE D51E8D446A27 lea r8, ptr [r18+r13*2+0x27] +XDIS ca32: MISC BASE D51E8D446B28 lea r8, ptr [r19+r13*2+0x28] +XDIS ca38: MISC BASE D51E8D446C29 lea r8, ptr [r20+r13*2+0x29] +XDIS ca3e: MISC BASE D51E8D446D2A lea r8, ptr [r21+r13*2+0x2a] +XDIS ca44: MISC BASE D51E8D446E2B lea r8, ptr [r22+r13*2+0x2b] +XDIS ca4a: MISC BASE D51E8D446F2C lea r8, ptr [r23+r13*2+0x2c] +XDIS ca50: MISC BASE D51F8D44682D lea r8, ptr [r24+r13*2+0x2d] +XDIS ca56: MISC BASE D51F8D44692E lea r8, ptr [r25+r13*2+0x2e] +XDIS ca5c: MISC BASE D51F8D446A2F lea r8, ptr [r26+r13*2+0x2f] +XDIS ca62: MISC BASE D51F8D446B30 lea r8, ptr [r27+r13*2+0x30] +XDIS ca68: MISC BASE D51F8D446C31 lea r8, ptr [r28+r13*2+0x31] +XDIS ca6e: MISC BASE D51F8D446D32 lea r8, ptr [r29+r13*2+0x32] +XDIS ca74: MISC BASE D51F8D446E33 lea r8, ptr [r30+r13*2+0x33] +XDIS ca7a: MISC BASE D51F8D446F34 lea r8, ptr [r31+r13*2+0x34] +XDIS ca80: MISC BASE D50E8D447016 lea r8, ptr [rax+r14*2+0x16] +XDIS ca86: MISC BASE D50E8D447117 lea r8, ptr [rcx+r14*2+0x17] +XDIS ca8c: MISC BASE D50E8D447218 lea r8, ptr [rdx+r14*2+0x18] +XDIS ca92: MISC BASE D50E8D447319 lea r8, ptr [rbx+r14*2+0x19] +XDIS ca98: MISC BASE D50E8D44741A lea r8, ptr [rsp+r14*2+0x1a] +XDIS ca9e: MISC BASE D50E8D44751B lea r8, ptr [rbp+r14*2+0x1b] +XDIS caa4: MISC BASE D50E8D44761C lea r8, ptr [rsi+r14*2+0x1c] +XDIS caaa: MISC BASE D50E8D44771D lea r8, ptr [rdi+r14*2+0x1d] +XDIS cab0: MISC BASE D50F8D44701E lea r8, ptr [r8+r14*2+0x1e] +XDIS cab6: MISC BASE D50F8D44711F lea r8, ptr [r9+r14*2+0x1f] +XDIS cabc: MISC BASE D50F8D447220 lea r8, ptr [r10+r14*2+0x20] +XDIS cac2: MISC BASE D50F8D447321 lea r8, ptr [r11+r14*2+0x21] +XDIS cac8: MISC BASE D50F8D447422 lea r8, ptr [r12+r14*2+0x22] +XDIS cace: MISC BASE D50F8D447523 lea r8, ptr [r13+r14*2+0x23] +XDIS cad4: MISC BASE D50F8D447624 lea r8, ptr [r14+r14*2+0x24] +XDIS cada: MISC BASE D50F8D447725 lea r8, ptr [r15+r14*2+0x25] +XDIS cae0: MISC BASE D51E8D447026 lea r8, ptr [r16+r14*2+0x26] +XDIS cae6: MISC BASE D51E8D447127 lea r8, ptr [r17+r14*2+0x27] +XDIS caec: MISC BASE D51E8D447228 lea r8, ptr [r18+r14*2+0x28] +XDIS caf2: MISC BASE D51E8D447329 lea r8, ptr [r19+r14*2+0x29] +XDIS caf8: MISC BASE D51E8D44742A lea r8, ptr [r20+r14*2+0x2a] +XDIS cafe: MISC BASE D51E8D44752B lea r8, ptr [r21+r14*2+0x2b] +XDIS cb04: MISC BASE D51E8D44762C lea r8, ptr [r22+r14*2+0x2c] +XDIS cb0a: MISC BASE D51E8D44772D lea r8, ptr [r23+r14*2+0x2d] +XDIS cb10: MISC BASE D51F8D44702E lea r8, ptr [r24+r14*2+0x2e] +XDIS cb16: MISC BASE D51F8D44712F lea r8, ptr [r25+r14*2+0x2f] +XDIS cb1c: MISC BASE D51F8D447230 lea r8, ptr [r26+r14*2+0x30] +XDIS cb22: MISC BASE D51F8D447331 lea r8, ptr [r27+r14*2+0x31] +XDIS cb28: MISC BASE D51F8D447432 lea r8, ptr [r28+r14*2+0x32] +XDIS cb2e: MISC BASE D51F8D447533 lea r8, ptr [r29+r14*2+0x33] +XDIS cb34: MISC BASE D51F8D447634 lea r8, ptr [r30+r14*2+0x34] +XDIS cb3a: MISC BASE D51F8D447735 lea r8, ptr [r31+r14*2+0x35] +XDIS cb40: MISC BASE D50E8D447817 lea r8, ptr [rax+r15*2+0x17] +XDIS cb46: MISC BASE D50E8D447918 lea r8, ptr [rcx+r15*2+0x18] +XDIS cb4c: MISC BASE D50E8D447A19 lea r8, ptr [rdx+r15*2+0x19] +XDIS cb52: MISC BASE D50E8D447B1A lea r8, ptr [rbx+r15*2+0x1a] +XDIS cb58: MISC BASE D50E8D447C1B lea r8, ptr [rsp+r15*2+0x1b] +XDIS cb5e: MISC BASE D50E8D447D1C lea r8, ptr [rbp+r15*2+0x1c] +XDIS cb64: MISC BASE D50E8D447E1D lea r8, ptr [rsi+r15*2+0x1d] +XDIS cb6a: MISC BASE D50E8D447F1E lea r8, ptr [rdi+r15*2+0x1e] +XDIS cb70: MISC BASE D50F8D44781F lea r8, ptr [r8+r15*2+0x1f] +XDIS cb76: MISC BASE D50F8D447920 lea r8, ptr [r9+r15*2+0x20] +XDIS cb7c: MISC BASE D50F8D447A21 lea r8, ptr [r10+r15*2+0x21] +XDIS cb82: MISC BASE D50F8D447B22 lea r8, ptr [r11+r15*2+0x22] +XDIS cb88: MISC BASE D50F8D447C23 lea r8, ptr [r12+r15*2+0x23] +XDIS cb8e: MISC BASE D50F8D447D24 lea r8, ptr [r13+r15*2+0x24] +XDIS cb94: MISC BASE D50F8D447E25 lea r8, ptr [r14+r15*2+0x25] +XDIS cb9a: MISC BASE D50F8D447F26 lea r8, ptr [r15+r15*2+0x26] +XDIS cba0: MISC BASE D51E8D447827 lea r8, ptr [r16+r15*2+0x27] +XDIS cba6: MISC BASE D51E8D447928 lea r8, ptr [r17+r15*2+0x28] +XDIS cbac: MISC BASE D51E8D447A29 lea r8, ptr [r18+r15*2+0x29] +XDIS cbb2: MISC BASE D51E8D447B2A lea r8, ptr [r19+r15*2+0x2a] +XDIS cbb8: MISC BASE D51E8D447C2B lea r8, ptr [r20+r15*2+0x2b] +XDIS cbbe: MISC BASE D51E8D447D2C lea r8, ptr [r21+r15*2+0x2c] +XDIS cbc4: MISC BASE D51E8D447E2D lea r8, ptr [r22+r15*2+0x2d] +XDIS cbca: MISC BASE D51E8D447F2E lea r8, ptr [r23+r15*2+0x2e] +XDIS cbd0: MISC BASE D51F8D44782F lea r8, ptr [r24+r15*2+0x2f] +XDIS cbd6: MISC BASE D51F8D447930 lea r8, ptr [r25+r15*2+0x30] +XDIS cbdc: MISC BASE D51F8D447A31 lea r8, ptr [r26+r15*2+0x31] +XDIS cbe2: MISC BASE D51F8D447B32 lea r8, ptr [r27+r15*2+0x32] +XDIS cbe8: MISC BASE D51F8D447C33 lea r8, ptr [r28+r15*2+0x33] +XDIS cbee: MISC BASE D51F8D447D34 lea r8, ptr [r29+r15*2+0x34] +XDIS cbf4: MISC BASE D51F8D447E35 lea r8, ptr [r30+r15*2+0x35] +XDIS cbfa: MISC BASE D51F8D447F36 lea r8, ptr [r31+r15*2+0x36] +XDIS cc00: MISC BASE D52C8D444018 lea r8, ptr [rax+r16*2+0x18] +XDIS cc06: MISC BASE D52C8D444119 lea r8, ptr [rcx+r16*2+0x19] +XDIS cc0c: MISC BASE D52C8D44421A lea r8, ptr [rdx+r16*2+0x1a] +XDIS cc12: MISC BASE D52C8D44431B lea r8, ptr [rbx+r16*2+0x1b] +XDIS cc18: MISC BASE D52C8D44441C lea r8, ptr [rsp+r16*2+0x1c] +XDIS cc1e: MISC BASE D52C8D44451D lea r8, ptr [rbp+r16*2+0x1d] +XDIS cc24: MISC BASE D52C8D44461E lea r8, ptr [rsi+r16*2+0x1e] +XDIS cc2a: MISC BASE D52C8D44471F lea r8, ptr [rdi+r16*2+0x1f] +XDIS cc30: MISC BASE D52D8D444020 lea r8, ptr [r8+r16*2+0x20] +XDIS cc36: MISC BASE D52D8D444121 lea r8, ptr [r9+r16*2+0x21] +XDIS cc3c: MISC BASE D52D8D444222 lea r8, ptr [r10+r16*2+0x22] +XDIS cc42: MISC BASE D52D8D444323 lea r8, ptr [r11+r16*2+0x23] +XDIS cc48: MISC BASE D52D8D444424 lea r8, ptr [r12+r16*2+0x24] +XDIS cc4e: MISC BASE D52D8D444525 lea r8, ptr [r13+r16*2+0x25] +XDIS cc54: MISC BASE D52D8D444626 lea r8, ptr [r14+r16*2+0x26] +XDIS cc5a: MISC BASE D52D8D444727 lea r8, ptr [r15+r16*2+0x27] +XDIS cc60: MISC BASE D53C8D444028 lea r8, ptr [r16+r16*2+0x28] +XDIS cc66: MISC BASE D53C8D444129 lea r8, ptr [r17+r16*2+0x29] +XDIS cc6c: MISC BASE D53C8D44422A lea r8, ptr [r18+r16*2+0x2a] +XDIS cc72: MISC BASE D53C8D44432B lea r8, ptr [r19+r16*2+0x2b] +XDIS cc78: MISC BASE D53C8D44442C lea r8, ptr [r20+r16*2+0x2c] +XDIS cc7e: MISC BASE D53C8D44452D lea r8, ptr [r21+r16*2+0x2d] +XDIS cc84: MISC BASE D53C8D44462E lea r8, ptr [r22+r16*2+0x2e] +XDIS cc8a: MISC BASE D53C8D44472F lea r8, ptr [r23+r16*2+0x2f] +XDIS cc90: MISC BASE D53D8D444030 lea r8, ptr [r24+r16*2+0x30] +XDIS cc96: MISC BASE D53D8D444131 lea r8, ptr [r25+r16*2+0x31] +XDIS cc9c: MISC BASE D53D8D444232 lea r8, ptr [r26+r16*2+0x32] +XDIS cca2: MISC BASE D53D8D444333 lea r8, ptr [r27+r16*2+0x33] +XDIS cca8: MISC BASE D53D8D444434 lea r8, ptr [r28+r16*2+0x34] +XDIS ccae: MISC BASE D53D8D444535 lea r8, ptr [r29+r16*2+0x35] +XDIS ccb4: MISC BASE D53D8D444636 lea r8, ptr [r30+r16*2+0x36] +XDIS ccba: MISC BASE D53D8D444737 lea r8, ptr [r31+r16*2+0x37] +XDIS ccc0: MISC BASE D52C8D444819 lea r8, ptr [rax+r17*2+0x19] +XDIS ccc6: MISC BASE D52C8D44491A lea r8, ptr [rcx+r17*2+0x1a] +XDIS cccc: MISC BASE D52C8D444A1B lea r8, ptr [rdx+r17*2+0x1b] +XDIS ccd2: MISC BASE D52C8D444B1C lea r8, ptr [rbx+r17*2+0x1c] +XDIS ccd8: MISC BASE D52C8D444C1D lea r8, ptr [rsp+r17*2+0x1d] +XDIS ccde: MISC BASE D52C8D444D1E lea r8, ptr [rbp+r17*2+0x1e] +XDIS cce4: MISC BASE D52C8D444E1F lea r8, ptr [rsi+r17*2+0x1f] +XDIS ccea: MISC BASE D52C8D444F20 lea r8, ptr [rdi+r17*2+0x20] +XDIS ccf0: MISC BASE D52D8D444821 lea r8, ptr [r8+r17*2+0x21] +XDIS ccf6: MISC BASE D52D8D444922 lea r8, ptr [r9+r17*2+0x22] +XDIS ccfc: MISC BASE D52D8D444A23 lea r8, ptr [r10+r17*2+0x23] +XDIS cd02: MISC BASE D52D8D444B24 lea r8, ptr [r11+r17*2+0x24] +XDIS cd08: MISC BASE D52D8D444C25 lea r8, ptr [r12+r17*2+0x25] +XDIS cd0e: MISC BASE D52D8D444D26 lea r8, ptr [r13+r17*2+0x26] +XDIS cd14: MISC BASE D52D8D444E27 lea r8, ptr [r14+r17*2+0x27] +XDIS cd1a: MISC BASE D52D8D444F28 lea r8, ptr [r15+r17*2+0x28] +XDIS cd20: MISC BASE D53C8D444829 lea r8, ptr [r16+r17*2+0x29] +XDIS cd26: MISC BASE D53C8D44492A lea r8, ptr [r17+r17*2+0x2a] +XDIS cd2c: MISC BASE D53C8D444A2B lea r8, ptr [r18+r17*2+0x2b] +XDIS cd32: MISC BASE D53C8D444B2C lea r8, ptr [r19+r17*2+0x2c] +XDIS cd38: MISC BASE D53C8D444C2D lea r8, ptr [r20+r17*2+0x2d] +XDIS cd3e: MISC BASE D53C8D444D2E lea r8, ptr [r21+r17*2+0x2e] +XDIS cd44: MISC BASE D53C8D444E2F lea r8, ptr [r22+r17*2+0x2f] +XDIS cd4a: MISC BASE D53C8D444F30 lea r8, ptr [r23+r17*2+0x30] +XDIS cd50: MISC BASE D53D8D444831 lea r8, ptr [r24+r17*2+0x31] +XDIS cd56: MISC BASE D53D8D444932 lea r8, ptr [r25+r17*2+0x32] +XDIS cd5c: MISC BASE D53D8D444A33 lea r8, ptr [r26+r17*2+0x33] +XDIS cd62: MISC BASE D53D8D444B34 lea r8, ptr [r27+r17*2+0x34] +XDIS cd68: MISC BASE D53D8D444C35 lea r8, ptr [r28+r17*2+0x35] +XDIS cd6e: MISC BASE D53D8D444D36 lea r8, ptr [r29+r17*2+0x36] +XDIS cd74: MISC BASE D53D8D444E37 lea r8, ptr [r30+r17*2+0x37] +XDIS cd7a: MISC BASE D53D8D444F38 lea r8, ptr [r31+r17*2+0x38] +XDIS cd80: MISC BASE D52C8D44501A lea r8, ptr [rax+r18*2+0x1a] +XDIS cd86: MISC BASE D52C8D44511B lea r8, ptr [rcx+r18*2+0x1b] +XDIS cd8c: MISC BASE D52C8D44521C lea r8, ptr [rdx+r18*2+0x1c] +XDIS cd92: MISC BASE D52C8D44531D lea r8, ptr [rbx+r18*2+0x1d] +XDIS cd98: MISC BASE D52C8D44541E lea r8, ptr [rsp+r18*2+0x1e] +XDIS cd9e: MISC BASE D52C8D44551F lea r8, ptr [rbp+r18*2+0x1f] +XDIS cda4: MISC BASE D52C8D445620 lea r8, ptr [rsi+r18*2+0x20] +XDIS cdaa: MISC BASE D52C8D445721 lea r8, ptr [rdi+r18*2+0x21] +XDIS cdb0: MISC BASE D52D8D445022 lea r8, ptr [r8+r18*2+0x22] +XDIS cdb6: MISC BASE D52D8D445123 lea r8, ptr [r9+r18*2+0x23] +XDIS cdbc: MISC BASE D52D8D445224 lea r8, ptr [r10+r18*2+0x24] +XDIS cdc2: MISC BASE D52D8D445325 lea r8, ptr [r11+r18*2+0x25] +XDIS cdc8: MISC BASE D52D8D445426 lea r8, ptr [r12+r18*2+0x26] +XDIS cdce: MISC BASE D52D8D445527 lea r8, ptr [r13+r18*2+0x27] +XDIS cdd4: MISC BASE D52D8D445628 lea r8, ptr [r14+r18*2+0x28] +XDIS cdda: MISC BASE D52D8D445729 lea r8, ptr [r15+r18*2+0x29] +XDIS cde0: MISC BASE D53C8D44502A lea r8, ptr [r16+r18*2+0x2a] +XDIS cde6: MISC BASE D53C8D44512B lea r8, ptr [r17+r18*2+0x2b] +XDIS cdec: MISC BASE D53C8D44522C lea r8, ptr [r18+r18*2+0x2c] +XDIS cdf2: MISC BASE D53C8D44532D lea r8, ptr [r19+r18*2+0x2d] +XDIS cdf8: MISC BASE D53C8D44542E lea r8, ptr [r20+r18*2+0x2e] +XDIS cdfe: MISC BASE D53C8D44552F lea r8, ptr [r21+r18*2+0x2f] +XDIS ce04: MISC BASE D53C8D445630 lea r8, ptr [r22+r18*2+0x30] +XDIS ce0a: MISC BASE D53C8D445731 lea r8, ptr [r23+r18*2+0x31] +XDIS ce10: MISC BASE D53D8D445032 lea r8, ptr [r24+r18*2+0x32] +XDIS ce16: MISC BASE D53D8D445133 lea r8, ptr [r25+r18*2+0x33] +XDIS ce1c: MISC BASE D53D8D445234 lea r8, ptr [r26+r18*2+0x34] +XDIS ce22: MISC BASE D53D8D445335 lea r8, ptr [r27+r18*2+0x35] +XDIS ce28: MISC BASE D53D8D445436 lea r8, ptr [r28+r18*2+0x36] +XDIS ce2e: MISC BASE D53D8D445537 lea r8, ptr [r29+r18*2+0x37] +XDIS ce34: MISC BASE D53D8D445638 lea r8, ptr [r30+r18*2+0x38] +XDIS ce3a: MISC BASE D53D8D445739 lea r8, ptr [r31+r18*2+0x39] +XDIS ce40: MISC BASE D52C8D44581B lea r8, ptr [rax+r19*2+0x1b] +XDIS ce46: MISC BASE D52C8D44591C lea r8, ptr [rcx+r19*2+0x1c] +XDIS ce4c: MISC BASE D52C8D445A1D lea r8, ptr [rdx+r19*2+0x1d] +XDIS ce52: MISC BASE D52C8D445B1E lea r8, ptr [rbx+r19*2+0x1e] +XDIS ce58: MISC BASE D52C8D445C1F lea r8, ptr [rsp+r19*2+0x1f] +XDIS ce5e: MISC BASE D52C8D445D20 lea r8, ptr [rbp+r19*2+0x20] +XDIS ce64: MISC BASE D52C8D445E21 lea r8, ptr [rsi+r19*2+0x21] +XDIS ce6a: MISC BASE D52C8D445F22 lea r8, ptr [rdi+r19*2+0x22] +XDIS ce70: MISC BASE D52D8D445823 lea r8, ptr [r8+r19*2+0x23] +XDIS ce76: MISC BASE D52D8D445924 lea r8, ptr [r9+r19*2+0x24] +XDIS ce7c: MISC BASE D52D8D445A25 lea r8, ptr [r10+r19*2+0x25] +XDIS ce82: MISC BASE D52D8D445B26 lea r8, ptr [r11+r19*2+0x26] +XDIS ce88: MISC BASE D52D8D445C27 lea r8, ptr [r12+r19*2+0x27] +XDIS ce8e: MISC BASE D52D8D445D28 lea r8, ptr [r13+r19*2+0x28] +XDIS ce94: MISC BASE D52D8D445E29 lea r8, ptr [r14+r19*2+0x29] +XDIS ce9a: MISC BASE D52D8D445F2A lea r8, ptr [r15+r19*2+0x2a] +XDIS cea0: MISC BASE D53C8D44582B lea r8, ptr [r16+r19*2+0x2b] +XDIS cea6: MISC BASE D53C8D44592C lea r8, ptr [r17+r19*2+0x2c] +XDIS ceac: MISC BASE D53C8D445A2D lea r8, ptr [r18+r19*2+0x2d] +XDIS ceb2: MISC BASE D53C8D445B2E lea r8, ptr [r19+r19*2+0x2e] +XDIS ceb8: MISC BASE D53C8D445C2F lea r8, ptr [r20+r19*2+0x2f] +XDIS cebe: MISC BASE D53C8D445D30 lea r8, ptr [r21+r19*2+0x30] +XDIS cec4: MISC BASE D53C8D445E31 lea r8, ptr [r22+r19*2+0x31] +XDIS ceca: MISC BASE D53C8D445F32 lea r8, ptr [r23+r19*2+0x32] +XDIS ced0: MISC BASE D53D8D445833 lea r8, ptr [r24+r19*2+0x33] +XDIS ced6: MISC BASE D53D8D445934 lea r8, ptr [r25+r19*2+0x34] +XDIS cedc: MISC BASE D53D8D445A35 lea r8, ptr [r26+r19*2+0x35] +XDIS cee2: MISC BASE D53D8D445B36 lea r8, ptr [r27+r19*2+0x36] +XDIS cee8: MISC BASE D53D8D445C37 lea r8, ptr [r28+r19*2+0x37] +XDIS ceee: MISC BASE D53D8D445D38 lea r8, ptr [r29+r19*2+0x38] +XDIS cef4: MISC BASE D53D8D445E39 lea r8, ptr [r30+r19*2+0x39] +XDIS cefa: MISC BASE D53D8D445F3A lea r8, ptr [r31+r19*2+0x3a] +XDIS cf00: MISC BASE D52C8D44601C lea r8, ptr [rax+r20*2+0x1c] +XDIS cf06: MISC BASE D52C8D44611D lea r8, ptr [rcx+r20*2+0x1d] +XDIS cf0c: MISC BASE D52C8D44621E lea r8, ptr [rdx+r20*2+0x1e] +XDIS cf12: MISC BASE D52C8D44631F lea r8, ptr [rbx+r20*2+0x1f] +XDIS cf18: MISC BASE D52C8D446420 lea r8, ptr [rsp+r20*2+0x20] +XDIS cf1e: MISC BASE D52C8D446521 lea r8, ptr [rbp+r20*2+0x21] +XDIS cf24: MISC BASE D52C8D446622 lea r8, ptr [rsi+r20*2+0x22] +XDIS cf2a: MISC BASE D52C8D446723 lea r8, ptr [rdi+r20*2+0x23] +XDIS cf30: MISC BASE D52D8D446024 lea r8, ptr [r8+r20*2+0x24] +XDIS cf36: MISC BASE D52D8D446125 lea r8, ptr [r9+r20*2+0x25] +XDIS cf3c: MISC BASE D52D8D446226 lea r8, ptr [r10+r20*2+0x26] +XDIS cf42: MISC BASE D52D8D446327 lea r8, ptr [r11+r20*2+0x27] +XDIS cf48: MISC BASE D52D8D446428 lea r8, ptr [r12+r20*2+0x28] +XDIS cf4e: MISC BASE D52D8D446529 lea r8, ptr [r13+r20*2+0x29] +XDIS cf54: MISC BASE D52D8D44662A lea r8, ptr [r14+r20*2+0x2a] +XDIS cf5a: MISC BASE D52D8D44672B lea r8, ptr [r15+r20*2+0x2b] +XDIS cf60: MISC BASE D53C8D44602C lea r8, ptr [r16+r20*2+0x2c] +XDIS cf66: MISC BASE D53C8D44612D lea r8, ptr [r17+r20*2+0x2d] +XDIS cf6c: MISC BASE D53C8D44622E lea r8, ptr [r18+r20*2+0x2e] +XDIS cf72: MISC BASE D53C8D44632F lea r8, ptr [r19+r20*2+0x2f] +XDIS cf78: MISC BASE D53C8D446430 lea r8, ptr [r20+r20*2+0x30] +XDIS cf7e: MISC BASE D53C8D446531 lea r8, ptr [r21+r20*2+0x31] +XDIS cf84: MISC BASE D53C8D446632 lea r8, ptr [r22+r20*2+0x32] +XDIS cf8a: MISC BASE D53C8D446733 lea r8, ptr [r23+r20*2+0x33] +XDIS cf90: MISC BASE D53D8D446034 lea r8, ptr [r24+r20*2+0x34] +XDIS cf96: MISC BASE D53D8D446135 lea r8, ptr [r25+r20*2+0x35] +XDIS cf9c: MISC BASE D53D8D446236 lea r8, ptr [r26+r20*2+0x36] +XDIS cfa2: MISC BASE D53D8D446337 lea r8, ptr [r27+r20*2+0x37] +XDIS cfa8: MISC BASE D53D8D446438 lea r8, ptr [r28+r20*2+0x38] +XDIS cfae: MISC BASE D53D8D446539 lea r8, ptr [r29+r20*2+0x39] +XDIS cfb4: MISC BASE D53D8D44663A lea r8, ptr [r30+r20*2+0x3a] +XDIS cfba: MISC BASE D53D8D44673B lea r8, ptr [r31+r20*2+0x3b] +XDIS cfc0: MISC BASE D52C8D44681D lea r8, ptr [rax+r21*2+0x1d] +XDIS cfc6: MISC BASE D52C8D44691E lea r8, ptr [rcx+r21*2+0x1e] +XDIS cfcc: MISC BASE D52C8D446A1F lea r8, ptr [rdx+r21*2+0x1f] +XDIS cfd2: MISC BASE D52C8D446B20 lea r8, ptr [rbx+r21*2+0x20] +XDIS cfd8: MISC BASE D52C8D446C21 lea r8, ptr [rsp+r21*2+0x21] +XDIS cfde: MISC BASE D52C8D446D22 lea r8, ptr [rbp+r21*2+0x22] +XDIS cfe4: MISC BASE D52C8D446E23 lea r8, ptr [rsi+r21*2+0x23] +XDIS cfea: MISC BASE D52C8D446F24 lea r8, ptr [rdi+r21*2+0x24] +XDIS cff0: MISC BASE D52D8D446825 lea r8, ptr [r8+r21*2+0x25] +XDIS cff6: MISC BASE D52D8D446926 lea r8, ptr [r9+r21*2+0x26] +XDIS cffc: MISC BASE D52D8D446A27 lea r8, ptr [r10+r21*2+0x27] +XDIS d002: MISC BASE D52D8D446B28 lea r8, ptr [r11+r21*2+0x28] +XDIS d008: MISC BASE D52D8D446C29 lea r8, ptr [r12+r21*2+0x29] +XDIS d00e: MISC BASE D52D8D446D2A lea r8, ptr [r13+r21*2+0x2a] +XDIS d014: MISC BASE D52D8D446E2B lea r8, ptr [r14+r21*2+0x2b] +XDIS d01a: MISC BASE D52D8D446F2C lea r8, ptr [r15+r21*2+0x2c] +XDIS d020: MISC BASE D53C8D44682D lea r8, ptr [r16+r21*2+0x2d] +XDIS d026: MISC BASE D53C8D44692E lea r8, ptr [r17+r21*2+0x2e] +XDIS d02c: MISC BASE D53C8D446A2F lea r8, ptr [r18+r21*2+0x2f] +XDIS d032: MISC BASE D53C8D446B30 lea r8, ptr [r19+r21*2+0x30] +XDIS d038: MISC BASE D53C8D446C31 lea r8, ptr [r20+r21*2+0x31] +XDIS d03e: MISC BASE D53C8D446D32 lea r8, ptr [r21+r21*2+0x32] +XDIS d044: MISC BASE D53C8D446E33 lea r8, ptr [r22+r21*2+0x33] +XDIS d04a: MISC BASE D53C8D446F34 lea r8, ptr [r23+r21*2+0x34] +XDIS d050: MISC BASE D53D8D446835 lea r8, ptr [r24+r21*2+0x35] +XDIS d056: MISC BASE D53D8D446936 lea r8, ptr [r25+r21*2+0x36] +XDIS d05c: MISC BASE D53D8D446A37 lea r8, ptr [r26+r21*2+0x37] +XDIS d062: MISC BASE D53D8D446B38 lea r8, ptr [r27+r21*2+0x38] +XDIS d068: MISC BASE D53D8D446C39 lea r8, ptr [r28+r21*2+0x39] +XDIS d06e: MISC BASE D53D8D446D3A lea r8, ptr [r29+r21*2+0x3a] +XDIS d074: MISC BASE D53D8D446E3B lea r8, ptr [r30+r21*2+0x3b] +XDIS d07a: MISC BASE D53D8D446F3C lea r8, ptr [r31+r21*2+0x3c] +XDIS d080: MISC BASE D52C8D44701E lea r8, ptr [rax+r22*2+0x1e] +XDIS d086: MISC BASE D52C8D44711F lea r8, ptr [rcx+r22*2+0x1f] +XDIS d08c: MISC BASE D52C8D447220 lea r8, ptr [rdx+r22*2+0x20] +XDIS d092: MISC BASE D52C8D447321 lea r8, ptr [rbx+r22*2+0x21] +XDIS d098: MISC BASE D52C8D447422 lea r8, ptr [rsp+r22*2+0x22] +XDIS d09e: MISC BASE D52C8D447523 lea r8, ptr [rbp+r22*2+0x23] +XDIS d0a4: MISC BASE D52C8D447624 lea r8, ptr [rsi+r22*2+0x24] +XDIS d0aa: MISC BASE D52C8D447725 lea r8, ptr [rdi+r22*2+0x25] +XDIS d0b0: MISC BASE D52D8D447026 lea r8, ptr [r8+r22*2+0x26] +XDIS d0b6: MISC BASE D52D8D447127 lea r8, ptr [r9+r22*2+0x27] +XDIS d0bc: MISC BASE D52D8D447228 lea r8, ptr [r10+r22*2+0x28] +XDIS d0c2: MISC BASE D52D8D447329 lea r8, ptr [r11+r22*2+0x29] +XDIS d0c8: MISC BASE D52D8D44742A lea r8, ptr [r12+r22*2+0x2a] +XDIS d0ce: MISC BASE D52D8D44752B lea r8, ptr [r13+r22*2+0x2b] +XDIS d0d4: MISC BASE D52D8D44762C lea r8, ptr [r14+r22*2+0x2c] +XDIS d0da: MISC BASE D52D8D44772D lea r8, ptr [r15+r22*2+0x2d] +XDIS d0e0: MISC BASE D53C8D44702E lea r8, ptr [r16+r22*2+0x2e] +XDIS d0e6: MISC BASE D53C8D44712F lea r8, ptr [r17+r22*2+0x2f] +XDIS d0ec: MISC BASE D53C8D447230 lea r8, ptr [r18+r22*2+0x30] +XDIS d0f2: MISC BASE D53C8D447331 lea r8, ptr [r19+r22*2+0x31] +XDIS d0f8: MISC BASE D53C8D447432 lea r8, ptr [r20+r22*2+0x32] +XDIS d0fe: MISC BASE D53C8D447533 lea r8, ptr [r21+r22*2+0x33] +XDIS d104: MISC BASE D53C8D447634 lea r8, ptr [r22+r22*2+0x34] +XDIS d10a: MISC BASE D53C8D447735 lea r8, ptr [r23+r22*2+0x35] +XDIS d110: MISC BASE D53D8D447036 lea r8, ptr [r24+r22*2+0x36] +XDIS d116: MISC BASE D53D8D447137 lea r8, ptr [r25+r22*2+0x37] +XDIS d11c: MISC BASE D53D8D447238 lea r8, ptr [r26+r22*2+0x38] +XDIS d122: MISC BASE D53D8D447339 lea r8, ptr [r27+r22*2+0x39] +XDIS d128: MISC BASE D53D8D44743A lea r8, ptr [r28+r22*2+0x3a] +XDIS d12e: MISC BASE D53D8D44753B lea r8, ptr [r29+r22*2+0x3b] +XDIS d134: MISC BASE D53D8D44763C lea r8, ptr [r30+r22*2+0x3c] +XDIS d13a: MISC BASE D53D8D44773D lea r8, ptr [r31+r22*2+0x3d] +XDIS d140: MISC BASE D52C8D44781F lea r8, ptr [rax+r23*2+0x1f] +XDIS d146: MISC BASE D52C8D447920 lea r8, ptr [rcx+r23*2+0x20] +XDIS d14c: MISC BASE D52C8D447A21 lea r8, ptr [rdx+r23*2+0x21] +XDIS d152: MISC BASE D52C8D447B22 lea r8, ptr [rbx+r23*2+0x22] +XDIS d158: MISC BASE D52C8D447C23 lea r8, ptr [rsp+r23*2+0x23] +XDIS d15e: MISC BASE D52C8D447D24 lea r8, ptr [rbp+r23*2+0x24] +XDIS d164: MISC BASE D52C8D447E25 lea r8, ptr [rsi+r23*2+0x25] +XDIS d16a: MISC BASE D52C8D447F26 lea r8, ptr [rdi+r23*2+0x26] +XDIS d170: MISC BASE D52D8D447827 lea r8, ptr [r8+r23*2+0x27] +XDIS d176: MISC BASE D52D8D447928 lea r8, ptr [r9+r23*2+0x28] +XDIS d17c: MISC BASE D52D8D447A29 lea r8, ptr [r10+r23*2+0x29] +XDIS d182: MISC BASE D52D8D447B2A lea r8, ptr [r11+r23*2+0x2a] +XDIS d188: MISC BASE D52D8D447C2B lea r8, ptr [r12+r23*2+0x2b] +XDIS d18e: MISC BASE D52D8D447D2C lea r8, ptr [r13+r23*2+0x2c] +XDIS d194: MISC BASE D52D8D447E2D lea r8, ptr [r14+r23*2+0x2d] +XDIS d19a: MISC BASE D52D8D447F2E lea r8, ptr [r15+r23*2+0x2e] +XDIS d1a0: MISC BASE D53C8D44782F lea r8, ptr [r16+r23*2+0x2f] +XDIS d1a6: MISC BASE D53C8D447930 lea r8, ptr [r17+r23*2+0x30] +XDIS d1ac: MISC BASE D53C8D447A31 lea r8, ptr [r18+r23*2+0x31] +XDIS d1b2: MISC BASE D53C8D447B32 lea r8, ptr [r19+r23*2+0x32] +XDIS d1b8: MISC BASE D53C8D447C33 lea r8, ptr [r20+r23*2+0x33] +XDIS d1be: MISC BASE D53C8D447D34 lea r8, ptr [r21+r23*2+0x34] +XDIS d1c4: MISC BASE D53C8D447E35 lea r8, ptr [r22+r23*2+0x35] +XDIS d1ca: MISC BASE D53C8D447F36 lea r8, ptr [r23+r23*2+0x36] +XDIS d1d0: MISC BASE D53D8D447837 lea r8, ptr [r24+r23*2+0x37] +XDIS d1d6: MISC BASE D53D8D447938 lea r8, ptr [r25+r23*2+0x38] +XDIS d1dc: MISC BASE D53D8D447A39 lea r8, ptr [r26+r23*2+0x39] +XDIS d1e2: MISC BASE D53D8D447B3A lea r8, ptr [r27+r23*2+0x3a] +XDIS d1e8: MISC BASE D53D8D447C3B lea r8, ptr [r28+r23*2+0x3b] +XDIS d1ee: MISC BASE D53D8D447D3C lea r8, ptr [r29+r23*2+0x3c] +XDIS d1f4: MISC BASE D53D8D447E3D lea r8, ptr [r30+r23*2+0x3d] +XDIS d1fa: MISC BASE D53D8D447F3E lea r8, ptr [r31+r23*2+0x3e] +XDIS d200: MISC BASE D52E8D444020 lea r8, ptr [rax+r24*2+0x20] +XDIS d206: MISC BASE D52E8D444121 lea r8, ptr [rcx+r24*2+0x21] +XDIS d20c: MISC BASE D52E8D444222 lea r8, ptr [rdx+r24*2+0x22] +XDIS d212: MISC BASE D52E8D444323 lea r8, ptr [rbx+r24*2+0x23] +XDIS d218: MISC BASE D52E8D444424 lea r8, ptr [rsp+r24*2+0x24] +XDIS d21e: MISC BASE D52E8D444525 lea r8, ptr [rbp+r24*2+0x25] +XDIS d224: MISC BASE D52E8D444626 lea r8, ptr [rsi+r24*2+0x26] +XDIS d22a: MISC BASE D52E8D444727 lea r8, ptr [rdi+r24*2+0x27] +XDIS d230: MISC BASE D52F8D444028 lea r8, ptr [r8+r24*2+0x28] +XDIS d236: MISC BASE D52F8D444129 lea r8, ptr [r9+r24*2+0x29] +XDIS d23c: MISC BASE D52F8D44422A lea r8, ptr [r10+r24*2+0x2a] +XDIS d242: MISC BASE D52F8D44432B lea r8, ptr [r11+r24*2+0x2b] +XDIS d248: MISC BASE D52F8D44442C lea r8, ptr [r12+r24*2+0x2c] +XDIS d24e: MISC BASE D52F8D44452D lea r8, ptr [r13+r24*2+0x2d] +XDIS d254: MISC BASE D52F8D44462E lea r8, ptr [r14+r24*2+0x2e] +XDIS d25a: MISC BASE D52F8D44472F lea r8, ptr [r15+r24*2+0x2f] +XDIS d260: MISC BASE D53E8D444030 lea r8, ptr [r16+r24*2+0x30] +XDIS d266: MISC BASE D53E8D444131 lea r8, ptr [r17+r24*2+0x31] +XDIS d26c: MISC BASE D53E8D444232 lea r8, ptr [r18+r24*2+0x32] +XDIS d272: MISC BASE D53E8D444333 lea r8, ptr [r19+r24*2+0x33] +XDIS d278: MISC BASE D53E8D444434 lea r8, ptr [r20+r24*2+0x34] +XDIS d27e: MISC BASE D53E8D444535 lea r8, ptr [r21+r24*2+0x35] +XDIS d284: MISC BASE D53E8D444636 lea r8, ptr [r22+r24*2+0x36] +XDIS d28a: MISC BASE D53E8D444737 lea r8, ptr [r23+r24*2+0x37] +XDIS d290: MISC BASE D53F8D444038 lea r8, ptr [r24+r24*2+0x38] +XDIS d296: MISC BASE D53F8D444139 lea r8, ptr [r25+r24*2+0x39] +XDIS d29c: MISC BASE D53F8D44423A lea r8, ptr [r26+r24*2+0x3a] +XDIS d2a2: MISC BASE D53F8D44433B lea r8, ptr [r27+r24*2+0x3b] +XDIS d2a8: MISC BASE D53F8D44443C lea r8, ptr [r28+r24*2+0x3c] +XDIS d2ae: MISC BASE D53F8D44453D lea r8, ptr [r29+r24*2+0x3d] +XDIS d2b4: MISC BASE D53F8D44463E lea r8, ptr [r30+r24*2+0x3e] +XDIS d2ba: MISC BASE D53F8D44473F lea r8, ptr [r31+r24*2+0x3f] +XDIS d2c0: MISC BASE D52E8D444821 lea r8, ptr [rax+r25*2+0x21] +XDIS d2c6: MISC BASE D52E8D444922 lea r8, ptr [rcx+r25*2+0x22] +XDIS d2cc: MISC BASE D52E8D444A23 lea r8, ptr [rdx+r25*2+0x23] +XDIS d2d2: MISC BASE D52E8D444B24 lea r8, ptr [rbx+r25*2+0x24] +XDIS d2d8: MISC BASE D52E8D444C25 lea r8, ptr [rsp+r25*2+0x25] +XDIS d2de: MISC BASE D52E8D444D26 lea r8, ptr [rbp+r25*2+0x26] +XDIS d2e4: MISC BASE D52E8D444E27 lea r8, ptr [rsi+r25*2+0x27] +XDIS d2ea: MISC BASE D52E8D444F28 lea r8, ptr [rdi+r25*2+0x28] +XDIS d2f0: MISC BASE D52F8D444829 lea r8, ptr [r8+r25*2+0x29] +XDIS d2f6: MISC BASE D52F8D44492A lea r8, ptr [r9+r25*2+0x2a] +XDIS d2fc: MISC BASE D52F8D444A2B lea r8, ptr [r10+r25*2+0x2b] +XDIS d302: MISC BASE D52F8D444B2C lea r8, ptr [r11+r25*2+0x2c] +XDIS d308: MISC BASE D52F8D444C2D lea r8, ptr [r12+r25*2+0x2d] +XDIS d30e: MISC BASE D52F8D444D2E lea r8, ptr [r13+r25*2+0x2e] +XDIS d314: MISC BASE D52F8D444E2F lea r8, ptr [r14+r25*2+0x2f] +XDIS d31a: MISC BASE D52F8D444F30 lea r8, ptr [r15+r25*2+0x30] +XDIS d320: MISC BASE D53E8D444831 lea r8, ptr [r16+r25*2+0x31] +XDIS d326: MISC BASE D53E8D444932 lea r8, ptr [r17+r25*2+0x32] +XDIS d32c: MISC BASE D53E8D444A33 lea r8, ptr [r18+r25*2+0x33] +XDIS d332: MISC BASE D53E8D444B34 lea r8, ptr [r19+r25*2+0x34] +XDIS d338: MISC BASE D53E8D444C35 lea r8, ptr [r20+r25*2+0x35] +XDIS d33e: MISC BASE D53E8D444D36 lea r8, ptr [r21+r25*2+0x36] +XDIS d344: MISC BASE D53E8D444E37 lea r8, ptr [r22+r25*2+0x37] +XDIS d34a: MISC BASE D53E8D444F38 lea r8, ptr [r23+r25*2+0x38] +XDIS d350: MISC BASE D53F8D444839 lea r8, ptr [r24+r25*2+0x39] +XDIS d356: MISC BASE D53F8D44493A lea r8, ptr [r25+r25*2+0x3a] +XDIS d35c: MISC BASE D53F8D444A3B lea r8, ptr [r26+r25*2+0x3b] +XDIS d362: MISC BASE D53F8D444B3C lea r8, ptr [r27+r25*2+0x3c] +XDIS d368: MISC BASE D53F8D444C3D lea r8, ptr [r28+r25*2+0x3d] +XDIS d36e: MISC BASE D53F8D444D3E lea r8, ptr [r29+r25*2+0x3e] +XDIS d374: MISC BASE D53F8D444E3F lea r8, ptr [r30+r25*2+0x3f] +XDIS d37a: MISC BASE D53F8D444F40 lea r8, ptr [r31+r25*2+0x40] +XDIS d380: MISC BASE D52E8D445022 lea r8, ptr [rax+r26*2+0x22] +XDIS d386: MISC BASE D52E8D445123 lea r8, ptr [rcx+r26*2+0x23] +XDIS d38c: MISC BASE D52E8D445224 lea r8, ptr [rdx+r26*2+0x24] +XDIS d392: MISC BASE D52E8D445325 lea r8, ptr [rbx+r26*2+0x25] +XDIS d398: MISC BASE D52E8D445426 lea r8, ptr [rsp+r26*2+0x26] +XDIS d39e: MISC BASE D52E8D445527 lea r8, ptr [rbp+r26*2+0x27] +XDIS d3a4: MISC BASE D52E8D445628 lea r8, ptr [rsi+r26*2+0x28] +XDIS d3aa: MISC BASE D52E8D445729 lea r8, ptr [rdi+r26*2+0x29] +XDIS d3b0: MISC BASE D52F8D44502A lea r8, ptr [r8+r26*2+0x2a] +XDIS d3b6: MISC BASE D52F8D44512B lea r8, ptr [r9+r26*2+0x2b] +XDIS d3bc: MISC BASE D52F8D44522C lea r8, ptr [r10+r26*2+0x2c] +XDIS d3c2: MISC BASE D52F8D44532D lea r8, ptr [r11+r26*2+0x2d] +XDIS d3c8: MISC BASE D52F8D44542E lea r8, ptr [r12+r26*2+0x2e] +XDIS d3ce: MISC BASE D52F8D44552F lea r8, ptr [r13+r26*2+0x2f] +XDIS d3d4: MISC BASE D52F8D445630 lea r8, ptr [r14+r26*2+0x30] +XDIS d3da: MISC BASE D52F8D445731 lea r8, ptr [r15+r26*2+0x31] +XDIS d3e0: MISC BASE D53E8D445032 lea r8, ptr [r16+r26*2+0x32] +XDIS d3e6: MISC BASE D53E8D445133 lea r8, ptr [r17+r26*2+0x33] +XDIS d3ec: MISC BASE D53E8D445234 lea r8, ptr [r18+r26*2+0x34] +XDIS d3f2: MISC BASE D53E8D445335 lea r8, ptr [r19+r26*2+0x35] +XDIS d3f8: MISC BASE D53E8D445436 lea r8, ptr [r20+r26*2+0x36] +XDIS d3fe: MISC BASE D53E8D445537 lea r8, ptr [r21+r26*2+0x37] +XDIS d404: MISC BASE D53E8D445638 lea r8, ptr [r22+r26*2+0x38] +XDIS d40a: MISC BASE D53E8D445739 lea r8, ptr [r23+r26*2+0x39] +XDIS d410: MISC BASE D53F8D44503A lea r8, ptr [r24+r26*2+0x3a] +XDIS d416: MISC BASE D53F8D44513B lea r8, ptr [r25+r26*2+0x3b] +XDIS d41c: MISC BASE D53F8D44523C lea r8, ptr [r26+r26*2+0x3c] +XDIS d422: MISC BASE D53F8D44533D lea r8, ptr [r27+r26*2+0x3d] +XDIS d428: MISC BASE D53F8D44543E lea r8, ptr [r28+r26*2+0x3e] +XDIS d42e: MISC BASE D53F8D44553F lea r8, ptr [r29+r26*2+0x3f] +XDIS d434: MISC BASE D53F8D445640 lea r8, ptr [r30+r26*2+0x40] +XDIS d43a: MISC BASE D53F8D445741 lea r8, ptr [r31+r26*2+0x41] +XDIS d440: MISC BASE D52E8D445823 lea r8, ptr [rax+r27*2+0x23] +XDIS d446: MISC BASE D52E8D445924 lea r8, ptr [rcx+r27*2+0x24] +XDIS d44c: MISC BASE D52E8D445A25 lea r8, ptr [rdx+r27*2+0x25] +XDIS d452: MISC BASE D52E8D445B26 lea r8, ptr [rbx+r27*2+0x26] +XDIS d458: MISC BASE D52E8D445C27 lea r8, ptr [rsp+r27*2+0x27] +XDIS d45e: MISC BASE D52E8D445D28 lea r8, ptr [rbp+r27*2+0x28] +XDIS d464: MISC BASE D52E8D445E29 lea r8, ptr [rsi+r27*2+0x29] +XDIS d46a: MISC BASE D52E8D445F2A lea r8, ptr [rdi+r27*2+0x2a] +XDIS d470: MISC BASE D52F8D44582B lea r8, ptr [r8+r27*2+0x2b] +XDIS d476: MISC BASE D52F8D44592C lea r8, ptr [r9+r27*2+0x2c] +XDIS d47c: MISC BASE D52F8D445A2D lea r8, ptr [r10+r27*2+0x2d] +XDIS d482: MISC BASE D52F8D445B2E lea r8, ptr [r11+r27*2+0x2e] +XDIS d488: MISC BASE D52F8D445C2F lea r8, ptr [r12+r27*2+0x2f] +XDIS d48e: MISC BASE D52F8D445D30 lea r8, ptr [r13+r27*2+0x30] +XDIS d494: MISC BASE D52F8D445E31 lea r8, ptr [r14+r27*2+0x31] +XDIS d49a: MISC BASE D52F8D445F32 lea r8, ptr [r15+r27*2+0x32] +XDIS d4a0: MISC BASE D53E8D445833 lea r8, ptr [r16+r27*2+0x33] +XDIS d4a6: MISC BASE D53E8D445934 lea r8, ptr [r17+r27*2+0x34] +XDIS d4ac: MISC BASE D53E8D445A35 lea r8, ptr [r18+r27*2+0x35] +XDIS d4b2: MISC BASE D53E8D445B36 lea r8, ptr [r19+r27*2+0x36] +XDIS d4b8: MISC BASE D53E8D445C37 lea r8, ptr [r20+r27*2+0x37] +XDIS d4be: MISC BASE D53E8D445D38 lea r8, ptr [r21+r27*2+0x38] +XDIS d4c4: MISC BASE D53E8D445E39 lea r8, ptr [r22+r27*2+0x39] +XDIS d4ca: MISC BASE D53E8D445F3A lea r8, ptr [r23+r27*2+0x3a] +XDIS d4d0: MISC BASE D53F8D44583B lea r8, ptr [r24+r27*2+0x3b] +XDIS d4d6: MISC BASE D53F8D44593C lea r8, ptr [r25+r27*2+0x3c] +XDIS d4dc: MISC BASE D53F8D445A3D lea r8, ptr [r26+r27*2+0x3d] +XDIS d4e2: MISC BASE D53F8D445B3E lea r8, ptr [r27+r27*2+0x3e] +XDIS d4e8: MISC BASE D53F8D445C3F lea r8, ptr [r28+r27*2+0x3f] +XDIS d4ee: MISC BASE D53F8D445D40 lea r8, ptr [r29+r27*2+0x40] +XDIS d4f4: MISC BASE D53F8D445E41 lea r8, ptr [r30+r27*2+0x41] +XDIS d4fa: MISC BASE D53F8D445F42 lea r8, ptr [r31+r27*2+0x42] +XDIS d500: MISC BASE D52E8D446024 lea r8, ptr [rax+r28*2+0x24] +XDIS d506: MISC BASE D52E8D446125 lea r8, ptr [rcx+r28*2+0x25] +XDIS d50c: MISC BASE D52E8D446226 lea r8, ptr [rdx+r28*2+0x26] +XDIS d512: MISC BASE D52E8D446327 lea r8, ptr [rbx+r28*2+0x27] +XDIS d518: MISC BASE D52E8D446428 lea r8, ptr [rsp+r28*2+0x28] +XDIS d51e: MISC BASE D52E8D446529 lea r8, ptr [rbp+r28*2+0x29] +XDIS d524: MISC BASE D52E8D44662A lea r8, ptr [rsi+r28*2+0x2a] +XDIS d52a: MISC BASE D52E8D44672B lea r8, ptr [rdi+r28*2+0x2b] +XDIS d530: MISC BASE D52F8D44602C lea r8, ptr [r8+r28*2+0x2c] +XDIS d536: MISC BASE D52F8D44612D lea r8, ptr [r9+r28*2+0x2d] +XDIS d53c: MISC BASE D52F8D44622E lea r8, ptr [r10+r28*2+0x2e] +XDIS d542: MISC BASE D52F8D44632F lea r8, ptr [r11+r28*2+0x2f] +XDIS d548: MISC BASE D52F8D446430 lea r8, ptr [r12+r28*2+0x30] +XDIS d54e: MISC BASE D52F8D446531 lea r8, ptr [r13+r28*2+0x31] +XDIS d554: MISC BASE D52F8D446632 lea r8, ptr [r14+r28*2+0x32] +XDIS d55a: MISC BASE D52F8D446733 lea r8, ptr [r15+r28*2+0x33] +XDIS d560: MISC BASE D53E8D446034 lea r8, ptr [r16+r28*2+0x34] +XDIS d566: MISC BASE D53E8D446135 lea r8, ptr [r17+r28*2+0x35] +XDIS d56c: MISC BASE D53E8D446236 lea r8, ptr [r18+r28*2+0x36] +XDIS d572: MISC BASE D53E8D446337 lea r8, ptr [r19+r28*2+0x37] +XDIS d578: MISC BASE D53E8D446438 lea r8, ptr [r20+r28*2+0x38] +XDIS d57e: MISC BASE D53E8D446539 lea r8, ptr [r21+r28*2+0x39] +XDIS d584: MISC BASE D53E8D44663A lea r8, ptr [r22+r28*2+0x3a] +XDIS d58a: MISC BASE D53E8D44673B lea r8, ptr [r23+r28*2+0x3b] +XDIS d590: MISC BASE D53F8D44603C lea r8, ptr [r24+r28*2+0x3c] +XDIS d596: MISC BASE D53F8D44613D lea r8, ptr [r25+r28*2+0x3d] +XDIS d59c: MISC BASE D53F8D44623E lea r8, ptr [r26+r28*2+0x3e] +XDIS d5a2: MISC BASE D53F8D44633F lea r8, ptr [r27+r28*2+0x3f] +XDIS d5a8: MISC BASE D53F8D446440 lea r8, ptr [r28+r28*2+0x40] +XDIS d5ae: MISC BASE D53F8D446541 lea r8, ptr [r29+r28*2+0x41] +XDIS d5b4: MISC BASE D53F8D446642 lea r8, ptr [r30+r28*2+0x42] +XDIS d5ba: MISC BASE D53F8D446743 lea r8, ptr [r31+r28*2+0x43] +XDIS d5c0: MISC BASE D52E8D446825 lea r8, ptr [rax+r29*2+0x25] +XDIS d5c6: MISC BASE D52E8D446926 lea r8, ptr [rcx+r29*2+0x26] +XDIS d5cc: MISC BASE D52E8D446A27 lea r8, ptr [rdx+r29*2+0x27] +XDIS d5d2: MISC BASE D52E8D446B28 lea r8, ptr [rbx+r29*2+0x28] +XDIS d5d8: MISC BASE D52E8D446C29 lea r8, ptr [rsp+r29*2+0x29] +XDIS d5de: MISC BASE D52E8D446D2A lea r8, ptr [rbp+r29*2+0x2a] +XDIS d5e4: MISC BASE D52E8D446E2B lea r8, ptr [rsi+r29*2+0x2b] +XDIS d5ea: MISC BASE D52E8D446F2C lea r8, ptr [rdi+r29*2+0x2c] +XDIS d5f0: MISC BASE D52F8D44682D lea r8, ptr [r8+r29*2+0x2d] +XDIS d5f6: MISC BASE D52F8D44692E lea r8, ptr [r9+r29*2+0x2e] +XDIS d5fc: MISC BASE D52F8D446A2F lea r8, ptr [r10+r29*2+0x2f] +XDIS d602: MISC BASE D52F8D446B30 lea r8, ptr [r11+r29*2+0x30] +XDIS d608: MISC BASE D52F8D446C31 lea r8, ptr [r12+r29*2+0x31] +XDIS d60e: MISC BASE D52F8D446D32 lea r8, ptr [r13+r29*2+0x32] +XDIS d614: MISC BASE D52F8D446E33 lea r8, ptr [r14+r29*2+0x33] +XDIS d61a: MISC BASE D52F8D446F34 lea r8, ptr [r15+r29*2+0x34] +XDIS d620: MISC BASE D53E8D446835 lea r8, ptr [r16+r29*2+0x35] +XDIS d626: MISC BASE D53E8D446936 lea r8, ptr [r17+r29*2+0x36] +XDIS d62c: MISC BASE D53E8D446A37 lea r8, ptr [r18+r29*2+0x37] +XDIS d632: MISC BASE D53E8D446B38 lea r8, ptr [r19+r29*2+0x38] +XDIS d638: MISC BASE D53E8D446C39 lea r8, ptr [r20+r29*2+0x39] +XDIS d63e: MISC BASE D53E8D446D3A lea r8, ptr [r21+r29*2+0x3a] +XDIS d644: MISC BASE D53E8D446E3B lea r8, ptr [r22+r29*2+0x3b] +XDIS d64a: MISC BASE D53E8D446F3C lea r8, ptr [r23+r29*2+0x3c] +XDIS d650: MISC BASE D53F8D44683D lea r8, ptr [r24+r29*2+0x3d] +XDIS d656: MISC BASE D53F8D44693E lea r8, ptr [r25+r29*2+0x3e] +XDIS d65c: MISC BASE D53F8D446A3F lea r8, ptr [r26+r29*2+0x3f] +XDIS d662: MISC BASE D53F8D446B40 lea r8, ptr [r27+r29*2+0x40] +XDIS d668: MISC BASE D53F8D446C41 lea r8, ptr [r28+r29*2+0x41] +XDIS d66e: MISC BASE D53F8D446D42 lea r8, ptr [r29+r29*2+0x42] +XDIS d674: MISC BASE D53F8D446E43 lea r8, ptr [r30+r29*2+0x43] +XDIS d67a: MISC BASE D53F8D446F44 lea r8, ptr [r31+r29*2+0x44] +XDIS d680: MISC BASE D52E8D447026 lea r8, ptr [rax+r30*2+0x26] +XDIS d686: MISC BASE D52E8D447127 lea r8, ptr [rcx+r30*2+0x27] +XDIS d68c: MISC BASE D52E8D447228 lea r8, ptr [rdx+r30*2+0x28] +XDIS d692: MISC BASE D52E8D447329 lea r8, ptr [rbx+r30*2+0x29] +XDIS d698: MISC BASE D52E8D44742A lea r8, ptr [rsp+r30*2+0x2a] +XDIS d69e: MISC BASE D52E8D44752B lea r8, ptr [rbp+r30*2+0x2b] +XDIS d6a4: MISC BASE D52E8D44762C lea r8, ptr [rsi+r30*2+0x2c] +XDIS d6aa: MISC BASE D52E8D44772D lea r8, ptr [rdi+r30*2+0x2d] +XDIS d6b0: MISC BASE D52F8D44702E lea r8, ptr [r8+r30*2+0x2e] +XDIS d6b6: MISC BASE D52F8D44712F lea r8, ptr [r9+r30*2+0x2f] +XDIS d6bc: MISC BASE D52F8D447230 lea r8, ptr [r10+r30*2+0x30] +XDIS d6c2: MISC BASE D52F8D447331 lea r8, ptr [r11+r30*2+0x31] +XDIS d6c8: MISC BASE D52F8D447432 lea r8, ptr [r12+r30*2+0x32] +XDIS d6ce: MISC BASE D52F8D447533 lea r8, ptr [r13+r30*2+0x33] +XDIS d6d4: MISC BASE D52F8D447634 lea r8, ptr [r14+r30*2+0x34] +XDIS d6da: MISC BASE D52F8D447735 lea r8, ptr [r15+r30*2+0x35] +XDIS d6e0: MISC BASE D53E8D447036 lea r8, ptr [r16+r30*2+0x36] +XDIS d6e6: MISC BASE D53E8D447137 lea r8, ptr [r17+r30*2+0x37] +XDIS d6ec: MISC BASE D53E8D447238 lea r8, ptr [r18+r30*2+0x38] +XDIS d6f2: MISC BASE D53E8D447339 lea r8, ptr [r19+r30*2+0x39] +XDIS d6f8: MISC BASE D53E8D44743A lea r8, ptr [r20+r30*2+0x3a] +XDIS d6fe: MISC BASE D53E8D44753B lea r8, ptr [r21+r30*2+0x3b] +XDIS d704: MISC BASE D53E8D44763C lea r8, ptr [r22+r30*2+0x3c] +XDIS d70a: MISC BASE D53E8D44773D lea r8, ptr [r23+r30*2+0x3d] +XDIS d710: MISC BASE D53F8D44703E lea r8, ptr [r24+r30*2+0x3e] +XDIS d716: MISC BASE D53F8D44713F lea r8, ptr [r25+r30*2+0x3f] +XDIS d71c: MISC BASE D53F8D447240 lea r8, ptr [r26+r30*2+0x40] +XDIS d722: MISC BASE D53F8D447341 lea r8, ptr [r27+r30*2+0x41] +XDIS d728: MISC BASE D53F8D447442 lea r8, ptr [r28+r30*2+0x42] +XDIS d72e: MISC BASE D53F8D447543 lea r8, ptr [r29+r30*2+0x43] +XDIS d734: MISC BASE D53F8D447644 lea r8, ptr [r30+r30*2+0x44] +XDIS d73a: MISC BASE D53F8D447745 lea r8, ptr [r31+r30*2+0x45] +XDIS d740: MISC BASE D52E8D447827 lea r8, ptr [rax+r31*2+0x27] +XDIS d746: MISC BASE D52E8D447928 lea r8, ptr [rcx+r31*2+0x28] +XDIS d74c: MISC BASE D52E8D447A29 lea r8, ptr [rdx+r31*2+0x29] +XDIS d752: MISC BASE D52E8D447B2A lea r8, ptr [rbx+r31*2+0x2a] +XDIS d758: MISC BASE D52E8D447C2B lea r8, ptr [rsp+r31*2+0x2b] +XDIS d75e: MISC BASE D52E8D447D2C lea r8, ptr [rbp+r31*2+0x2c] +XDIS d764: MISC BASE D52E8D447E2D lea r8, ptr [rsi+r31*2+0x2d] +XDIS d76a: MISC BASE D52E8D447F2E lea r8, ptr [rdi+r31*2+0x2e] +XDIS d770: MISC BASE D52F8D44782F lea r8, ptr [r8+r31*2+0x2f] +XDIS d776: MISC BASE D52F8D447930 lea r8, ptr [r9+r31*2+0x30] +XDIS d77c: MISC BASE D52F8D447A31 lea r8, ptr [r10+r31*2+0x31] +XDIS d782: MISC BASE D52F8D447B32 lea r8, ptr [r11+r31*2+0x32] +XDIS d788: MISC BASE D52F8D447C33 lea r8, ptr [r12+r31*2+0x33] +XDIS d78e: MISC BASE D52F8D447D34 lea r8, ptr [r13+r31*2+0x34] +XDIS d794: MISC BASE D52F8D447E35 lea r8, ptr [r14+r31*2+0x35] +XDIS d79a: MISC BASE D52F8D447F36 lea r8, ptr [r15+r31*2+0x36] +XDIS d7a0: MISC BASE D53E8D447837 lea r8, ptr [r16+r31*2+0x37] +XDIS d7a6: MISC BASE D53E8D447938 lea r8, ptr [r17+r31*2+0x38] +XDIS d7ac: MISC BASE D53E8D447A39 lea r8, ptr [r18+r31*2+0x39] +XDIS d7b2: MISC BASE D53E8D447B3A lea r8, ptr [r19+r31*2+0x3a] +XDIS d7b8: MISC BASE D53E8D447C3B lea r8, ptr [r20+r31*2+0x3b] +XDIS d7be: MISC BASE D53E8D447D3C lea r8, ptr [r21+r31*2+0x3c] +XDIS d7c4: MISC BASE D53E8D447E3D lea r8, ptr [r22+r31*2+0x3d] +XDIS d7ca: MISC BASE D53E8D447F3E lea r8, ptr [r23+r31*2+0x3e] +XDIS d7d0: MISC BASE D53F8D44783F lea r8, ptr [r24+r31*2+0x3f] +XDIS d7d6: MISC BASE D53F8D447940 lea r8, ptr [r25+r31*2+0x40] +XDIS d7dc: MISC BASE D53F8D447A41 lea r8, ptr [r26+r31*2+0x41] +XDIS d7e2: MISC BASE D53F8D447B42 lea r8, ptr [r27+r31*2+0x42] +XDIS d7e8: MISC BASE D53F8D447C43 lea r8, ptr [r28+r31*2+0x43] +XDIS d7ee: MISC BASE D53F8D447D44 lea r8, ptr [r29+r31*2+0x44] +XDIS d7f4: MISC BASE D53F8D447E45 lea r8, ptr [r30+r31*2+0x45] +XDIS d7fa: MISC BASE D53F8D447F46 lea r8, ptr [r31+r31*2+0x46] +XDIS d800: MISC BASE D50C8D4C4009 lea r9, ptr [rax+rax*2+0x9] +XDIS d806: MISC BASE D50C8D4C410A lea r9, ptr [rcx+rax*2+0xa] +XDIS d80c: MISC BASE D50C8D4C420B lea r9, ptr [rdx+rax*2+0xb] +XDIS d812: MISC BASE D50C8D4C430C lea r9, ptr [rbx+rax*2+0xc] +XDIS d818: MISC BASE D50C8D4C440D lea r9, ptr [rsp+rax*2+0xd] +XDIS d81e: MISC BASE D50C8D4C450E lea r9, ptr [rbp+rax*2+0xe] +XDIS d824: MISC BASE D50C8D4C460F lea r9, ptr [rsi+rax*2+0xf] +XDIS d82a: MISC BASE D50C8D4C4710 lea r9, ptr [rdi+rax*2+0x10] +XDIS d830: MISC BASE D50D8D4C4011 lea r9, ptr [r8+rax*2+0x11] +XDIS d836: MISC BASE D50D8D4C4112 lea r9, ptr [r9+rax*2+0x12] +XDIS d83c: MISC BASE D50D8D4C4213 lea r9, ptr [r10+rax*2+0x13] +XDIS d842: MISC BASE D50D8D4C4314 lea r9, ptr [r11+rax*2+0x14] +XDIS d848: MISC BASE D50D8D4C4415 lea r9, ptr [r12+rax*2+0x15] +XDIS d84e: MISC BASE D50D8D4C4516 lea r9, ptr [r13+rax*2+0x16] +XDIS d854: MISC BASE D50D8D4C4617 lea r9, ptr [r14+rax*2+0x17] +XDIS d85a: MISC BASE D50D8D4C4718 lea r9, ptr [r15+rax*2+0x18] +XDIS d860: MISC BASE D51C8D4C4019 lea r9, ptr [r16+rax*2+0x19] +XDIS d866: MISC BASE D51C8D4C411A lea r9, ptr [r17+rax*2+0x1a] +XDIS d86c: MISC BASE D51C8D4C421B lea r9, ptr [r18+rax*2+0x1b] +XDIS d872: MISC BASE D51C8D4C431C lea r9, ptr [r19+rax*2+0x1c] +XDIS d878: MISC BASE D51C8D4C441D lea r9, ptr [r20+rax*2+0x1d] +XDIS d87e: MISC BASE D51C8D4C451E lea r9, ptr [r21+rax*2+0x1e] +XDIS d884: MISC BASE D51C8D4C461F lea r9, ptr [r22+rax*2+0x1f] +XDIS d88a: MISC BASE D51C8D4C4720 lea r9, ptr [r23+rax*2+0x20] +XDIS d890: MISC BASE D51D8D4C4021 lea r9, ptr [r24+rax*2+0x21] +XDIS d896: MISC BASE D51D8D4C4122 lea r9, ptr [r25+rax*2+0x22] +XDIS d89c: MISC BASE D51D8D4C4223 lea r9, ptr [r26+rax*2+0x23] +XDIS d8a2: MISC BASE D51D8D4C4324 lea r9, ptr [r27+rax*2+0x24] +XDIS d8a8: MISC BASE D51D8D4C4425 lea r9, ptr [r28+rax*2+0x25] +XDIS d8ae: MISC BASE D51D8D4C4526 lea r9, ptr [r29+rax*2+0x26] +XDIS d8b4: MISC BASE D51D8D4C4627 lea r9, ptr [r30+rax*2+0x27] +XDIS d8ba: MISC BASE D51D8D4C4728 lea r9, ptr [r31+rax*2+0x28] +XDIS d8c0: MISC BASE D50C8D4C480A lea r9, ptr [rax+rcx*2+0xa] +XDIS d8c6: MISC BASE D50C8D4C490B lea r9, ptr [rcx+rcx*2+0xb] +XDIS d8cc: MISC BASE D50C8D4C4A0C lea r9, ptr [rdx+rcx*2+0xc] +XDIS d8d2: MISC BASE D50C8D4C4B0D lea r9, ptr [rbx+rcx*2+0xd] +XDIS d8d8: MISC BASE D50C8D4C4C0E lea r9, ptr [rsp+rcx*2+0xe] +XDIS d8de: MISC BASE D50C8D4C4D0F lea r9, ptr [rbp+rcx*2+0xf] +XDIS d8e4: MISC BASE D50C8D4C4E10 lea r9, ptr [rsi+rcx*2+0x10] +XDIS d8ea: MISC BASE D50C8D4C4F11 lea r9, ptr [rdi+rcx*2+0x11] +XDIS d8f0: MISC BASE D50D8D4C4812 lea r9, ptr [r8+rcx*2+0x12] +XDIS d8f6: MISC BASE D50D8D4C4913 lea r9, ptr [r9+rcx*2+0x13] +XDIS d8fc: MISC BASE D50D8D4C4A14 lea r9, ptr [r10+rcx*2+0x14] +XDIS d902: MISC BASE D50D8D4C4B15 lea r9, ptr [r11+rcx*2+0x15] +XDIS d908: MISC BASE D50D8D4C4C16 lea r9, ptr [r12+rcx*2+0x16] +XDIS d90e: MISC BASE D50D8D4C4D17 lea r9, ptr [r13+rcx*2+0x17] +XDIS d914: MISC BASE D50D8D4C4E18 lea r9, ptr [r14+rcx*2+0x18] +XDIS d91a: MISC BASE D50D8D4C4F19 lea r9, ptr [r15+rcx*2+0x19] +XDIS d920: MISC BASE D51C8D4C481A lea r9, ptr [r16+rcx*2+0x1a] +XDIS d926: MISC BASE D51C8D4C491B lea r9, ptr [r17+rcx*2+0x1b] +XDIS d92c: MISC BASE D51C8D4C4A1C lea r9, ptr [r18+rcx*2+0x1c] +XDIS d932: MISC BASE D51C8D4C4B1D lea r9, ptr [r19+rcx*2+0x1d] +XDIS d938: MISC BASE D51C8D4C4C1E lea r9, ptr [r20+rcx*2+0x1e] +XDIS d93e: MISC BASE D51C8D4C4D1F lea r9, ptr [r21+rcx*2+0x1f] +XDIS d944: MISC BASE D51C8D4C4E20 lea r9, ptr [r22+rcx*2+0x20] +XDIS d94a: MISC BASE D51C8D4C4F21 lea r9, ptr [r23+rcx*2+0x21] +XDIS d950: MISC BASE D51D8D4C4822 lea r9, ptr [r24+rcx*2+0x22] +XDIS d956: MISC BASE D51D8D4C4923 lea r9, ptr [r25+rcx*2+0x23] +XDIS d95c: MISC BASE D51D8D4C4A24 lea r9, ptr [r26+rcx*2+0x24] +XDIS d962: MISC BASE D51D8D4C4B25 lea r9, ptr [r27+rcx*2+0x25] +XDIS d968: MISC BASE D51D8D4C4C26 lea r9, ptr [r28+rcx*2+0x26] +XDIS d96e: MISC BASE D51D8D4C4D27 lea r9, ptr [r29+rcx*2+0x27] +XDIS d974: MISC BASE D51D8D4C4E28 lea r9, ptr [r30+rcx*2+0x28] +XDIS d97a: MISC BASE D51D8D4C4F29 lea r9, ptr [r31+rcx*2+0x29] +XDIS d980: MISC BASE D50C8D4C500B lea r9, ptr [rax+rdx*2+0xb] +XDIS d986: MISC BASE D50C8D4C510C lea r9, ptr [rcx+rdx*2+0xc] +XDIS d98c: MISC BASE D50C8D4C520D lea r9, ptr [rdx+rdx*2+0xd] +XDIS d992: MISC BASE D50C8D4C530E lea r9, ptr [rbx+rdx*2+0xe] +XDIS d998: MISC BASE D50C8D4C540F lea r9, ptr [rsp+rdx*2+0xf] +XDIS d99e: MISC BASE D50C8D4C5510 lea r9, ptr [rbp+rdx*2+0x10] +XDIS d9a4: MISC BASE D50C8D4C5611 lea r9, ptr [rsi+rdx*2+0x11] +XDIS d9aa: MISC BASE D50C8D4C5712 lea r9, ptr [rdi+rdx*2+0x12] +XDIS d9b0: MISC BASE D50D8D4C5013 lea r9, ptr [r8+rdx*2+0x13] +XDIS d9b6: MISC BASE D50D8D4C5114 lea r9, ptr [r9+rdx*2+0x14] +XDIS d9bc: MISC BASE D50D8D4C5215 lea r9, ptr [r10+rdx*2+0x15] +XDIS d9c2: MISC BASE D50D8D4C5316 lea r9, ptr [r11+rdx*2+0x16] +XDIS d9c8: MISC BASE D50D8D4C5417 lea r9, ptr [r12+rdx*2+0x17] +XDIS d9ce: MISC BASE D50D8D4C5518 lea r9, ptr [r13+rdx*2+0x18] +XDIS d9d4: MISC BASE D50D8D4C5619 lea r9, ptr [r14+rdx*2+0x19] +XDIS d9da: MISC BASE D50D8D4C571A lea r9, ptr [r15+rdx*2+0x1a] +XDIS d9e0: MISC BASE D51C8D4C501B lea r9, ptr [r16+rdx*2+0x1b] +XDIS d9e6: MISC BASE D51C8D4C511C lea r9, ptr [r17+rdx*2+0x1c] +XDIS d9ec: MISC BASE D51C8D4C521D lea r9, ptr [r18+rdx*2+0x1d] +XDIS d9f2: MISC BASE D51C8D4C531E lea r9, ptr [r19+rdx*2+0x1e] +XDIS d9f8: MISC BASE D51C8D4C541F lea r9, ptr [r20+rdx*2+0x1f] +XDIS d9fe: MISC BASE D51C8D4C5520 lea r9, ptr [r21+rdx*2+0x20] +XDIS da04: MISC BASE D51C8D4C5621 lea r9, ptr [r22+rdx*2+0x21] +XDIS da0a: MISC BASE D51C8D4C5722 lea r9, ptr [r23+rdx*2+0x22] +XDIS da10: MISC BASE D51D8D4C5023 lea r9, ptr [r24+rdx*2+0x23] +XDIS da16: MISC BASE D51D8D4C5124 lea r9, ptr [r25+rdx*2+0x24] +XDIS da1c: MISC BASE D51D8D4C5225 lea r9, ptr [r26+rdx*2+0x25] +XDIS da22: MISC BASE D51D8D4C5326 lea r9, ptr [r27+rdx*2+0x26] +XDIS da28: MISC BASE D51D8D4C5427 lea r9, ptr [r28+rdx*2+0x27] +XDIS da2e: MISC BASE D51D8D4C5528 lea r9, ptr [r29+rdx*2+0x28] +XDIS da34: MISC BASE D51D8D4C5629 lea r9, ptr [r30+rdx*2+0x29] +XDIS da3a: MISC BASE D51D8D4C572A lea r9, ptr [r31+rdx*2+0x2a] +XDIS da40: MISC BASE D50C8D4C580C lea r9, ptr [rax+rbx*2+0xc] +XDIS da46: MISC BASE D50C8D4C590D lea r9, ptr [rcx+rbx*2+0xd] +XDIS da4c: MISC BASE D50C8D4C5A0E lea r9, ptr [rdx+rbx*2+0xe] +XDIS da52: MISC BASE D50C8D4C5B0F lea r9, ptr [rbx+rbx*2+0xf] +XDIS da58: MISC BASE D50C8D4C5C10 lea r9, ptr [rsp+rbx*2+0x10] +XDIS da5e: MISC BASE D50C8D4C5D11 lea r9, ptr [rbp+rbx*2+0x11] +XDIS da64: MISC BASE D50C8D4C5E12 lea r9, ptr [rsi+rbx*2+0x12] +XDIS da6a: MISC BASE D50C8D4C5F13 lea r9, ptr [rdi+rbx*2+0x13] +XDIS da70: MISC BASE D50D8D4C5814 lea r9, ptr [r8+rbx*2+0x14] +XDIS da76: MISC BASE D50D8D4C5915 lea r9, ptr [r9+rbx*2+0x15] +XDIS da7c: MISC BASE D50D8D4C5A16 lea r9, ptr [r10+rbx*2+0x16] +XDIS da82: MISC BASE D50D8D4C5B17 lea r9, ptr [r11+rbx*2+0x17] +XDIS da88: MISC BASE D50D8D4C5C18 lea r9, ptr [r12+rbx*2+0x18] +XDIS da8e: MISC BASE D50D8D4C5D19 lea r9, ptr [r13+rbx*2+0x19] +XDIS da94: MISC BASE D50D8D4C5E1A lea r9, ptr [r14+rbx*2+0x1a] +XDIS da9a: MISC BASE D50D8D4C5F1B lea r9, ptr [r15+rbx*2+0x1b] +XDIS daa0: MISC BASE D51C8D4C581C lea r9, ptr [r16+rbx*2+0x1c] +XDIS daa6: MISC BASE D51C8D4C591D lea r9, ptr [r17+rbx*2+0x1d] +XDIS daac: MISC BASE D51C8D4C5A1E lea r9, ptr [r18+rbx*2+0x1e] +XDIS dab2: MISC BASE D51C8D4C5B1F lea r9, ptr [r19+rbx*2+0x1f] +XDIS dab8: MISC BASE D51C8D4C5C20 lea r9, ptr [r20+rbx*2+0x20] +XDIS dabe: MISC BASE D51C8D4C5D21 lea r9, ptr [r21+rbx*2+0x21] +XDIS dac4: MISC BASE D51C8D4C5E22 lea r9, ptr [r22+rbx*2+0x22] +XDIS daca: MISC BASE D51C8D4C5F23 lea r9, ptr [r23+rbx*2+0x23] +XDIS dad0: MISC BASE D51D8D4C5824 lea r9, ptr [r24+rbx*2+0x24] +XDIS dad6: MISC BASE D51D8D4C5925 lea r9, ptr [r25+rbx*2+0x25] +XDIS dadc: MISC BASE D51D8D4C5A26 lea r9, ptr [r26+rbx*2+0x26] +XDIS dae2: MISC BASE D51D8D4C5B27 lea r9, ptr [r27+rbx*2+0x27] +XDIS dae8: MISC BASE D51D8D4C5C28 lea r9, ptr [r28+rbx*2+0x28] +XDIS daee: MISC BASE D51D8D4C5D29 lea r9, ptr [r29+rbx*2+0x29] +XDIS daf4: MISC BASE D51D8D4C5E2A lea r9, ptr [r30+rbx*2+0x2a] +XDIS dafa: MISC BASE D51D8D4C5F2B lea r9, ptr [r31+rbx*2+0x2b] +XDIS db00: MISC BASE D50C8D4C600D lea r9, ptr [rax+0xd] +XDIS db06: MISC BASE D50C8D4C610E lea r9, ptr [rcx+0xe] +XDIS db0c: MISC BASE D50C8D4C620F lea r9, ptr [rdx+0xf] +XDIS db12: MISC BASE D50C8D4C6310 lea r9, ptr [rbx+0x10] +XDIS db18: MISC BASE D50C8D4C6411 lea r9, ptr [rsp+0x11] +XDIS db1e: MISC BASE D50C8D4C6512 lea r9, ptr [rbp+0x12] +XDIS db24: MISC BASE D50C8D4C6613 lea r9, ptr [rsi+0x13] +XDIS db2a: MISC BASE D50C8D4C6714 lea r9, ptr [rdi+0x14] +XDIS db30: MISC BASE D50D8D4C6015 lea r9, ptr [r8+0x15] +XDIS db36: MISC BASE D50D8D4C6116 lea r9, ptr [r9+0x16] +XDIS db3c: MISC BASE D50D8D4C6217 lea r9, ptr [r10+0x17] +XDIS db42: MISC BASE D50D8D4C6318 lea r9, ptr [r11+0x18] +XDIS db48: MISC BASE D50D8D4C6419 lea r9, ptr [r12+0x19] +XDIS db4e: MISC BASE D50D8D4C651A lea r9, ptr [r13+0x1a] +XDIS db54: MISC BASE D50D8D4C661B lea r9, ptr [r14+0x1b] +XDIS db5a: MISC BASE D50D8D4C671C lea r9, ptr [r15+0x1c] +XDIS db60: MISC BASE D51C8D4C601D lea r9, ptr [r16+0x1d] +XDIS db66: MISC BASE D51C8D4C611E lea r9, ptr [r17+0x1e] +XDIS db6c: MISC BASE D51C8D4C621F lea r9, ptr [r18+0x1f] +XDIS db72: MISC BASE D51C8D4C6320 lea r9, ptr [r19+0x20] +XDIS db78: MISC BASE D51C8D4C6421 lea r9, ptr [r20+0x21] +XDIS db7e: MISC BASE D51C8D4C6522 lea r9, ptr [r21+0x22] +XDIS db84: MISC BASE D51C8D4C6623 lea r9, ptr [r22+0x23] +XDIS db8a: MISC BASE D51C8D4C6724 lea r9, ptr [r23+0x24] +XDIS db90: MISC BASE D51D8D4C6025 lea r9, ptr [r24+0x25] +XDIS db96: MISC BASE D51D8D4C6126 lea r9, ptr [r25+0x26] +XDIS db9c: MISC BASE D51D8D4C6227 lea r9, ptr [r26+0x27] +XDIS dba2: MISC BASE D51D8D4C6328 lea r9, ptr [r27+0x28] +XDIS dba8: MISC BASE D51D8D4C6429 lea r9, ptr [r28+0x29] +XDIS dbae: MISC BASE D51D8D4C652A lea r9, ptr [r29+0x2a] +XDIS dbb4: MISC BASE D51D8D4C662B lea r9, ptr [r30+0x2b] +XDIS dbba: MISC BASE D51D8D4C672C lea r9, ptr [r31+0x2c] +XDIS dbc0: MISC BASE D50C8D4C680E lea r9, ptr [rax+rbp*2+0xe] +XDIS dbc6: MISC BASE D50C8D4C690F lea r9, ptr [rcx+rbp*2+0xf] +XDIS dbcc: MISC BASE D50C8D4C6A10 lea r9, ptr [rdx+rbp*2+0x10] +XDIS dbd2: MISC BASE D50C8D4C6B11 lea r9, ptr [rbx+rbp*2+0x11] +XDIS dbd8: MISC BASE D50C8D4C6C12 lea r9, ptr [rsp+rbp*2+0x12] +XDIS dbde: MISC BASE D50C8D4C6D13 lea r9, ptr [rbp+rbp*2+0x13] +XDIS dbe4: MISC BASE D50C8D4C6E14 lea r9, ptr [rsi+rbp*2+0x14] +XDIS dbea: MISC BASE D50C8D4C6F15 lea r9, ptr [rdi+rbp*2+0x15] +XDIS dbf0: MISC BASE D50D8D4C6816 lea r9, ptr [r8+rbp*2+0x16] +XDIS dbf6: MISC BASE D50D8D4C6917 lea r9, ptr [r9+rbp*2+0x17] +XDIS dbfc: MISC BASE D50D8D4C6A18 lea r9, ptr [r10+rbp*2+0x18] +XDIS dc02: MISC BASE D50D8D4C6B19 lea r9, ptr [r11+rbp*2+0x19] +XDIS dc08: MISC BASE D50D8D4C6C1A lea r9, ptr [r12+rbp*2+0x1a] +XDIS dc0e: MISC BASE D50D8D4C6D1B lea r9, ptr [r13+rbp*2+0x1b] +XDIS dc14: MISC BASE D50D8D4C6E1C lea r9, ptr [r14+rbp*2+0x1c] +XDIS dc1a: MISC BASE D50D8D4C6F1D lea r9, ptr [r15+rbp*2+0x1d] +XDIS dc20: MISC BASE D51C8D4C681E lea r9, ptr [r16+rbp*2+0x1e] +XDIS dc26: MISC BASE D51C8D4C691F lea r9, ptr [r17+rbp*2+0x1f] +XDIS dc2c: MISC BASE D51C8D4C6A20 lea r9, ptr [r18+rbp*2+0x20] +XDIS dc32: MISC BASE D51C8D4C6B21 lea r9, ptr [r19+rbp*2+0x21] +XDIS dc38: MISC BASE D51C8D4C6C22 lea r9, ptr [r20+rbp*2+0x22] +XDIS dc3e: MISC BASE D51C8D4C6D23 lea r9, ptr [r21+rbp*2+0x23] +XDIS dc44: MISC BASE D51C8D4C6E24 lea r9, ptr [r22+rbp*2+0x24] +XDIS dc4a: MISC BASE D51C8D4C6F25 lea r9, ptr [r23+rbp*2+0x25] +XDIS dc50: MISC BASE D51D8D4C6826 lea r9, ptr [r24+rbp*2+0x26] +XDIS dc56: MISC BASE D51D8D4C6927 lea r9, ptr [r25+rbp*2+0x27] +XDIS dc5c: MISC BASE D51D8D4C6A28 lea r9, ptr [r26+rbp*2+0x28] +XDIS dc62: MISC BASE D51D8D4C6B29 lea r9, ptr [r27+rbp*2+0x29] +XDIS dc68: MISC BASE D51D8D4C6C2A lea r9, ptr [r28+rbp*2+0x2a] +XDIS dc6e: MISC BASE D51D8D4C6D2B lea r9, ptr [r29+rbp*2+0x2b] +XDIS dc74: MISC BASE D51D8D4C6E2C lea r9, ptr [r30+rbp*2+0x2c] +XDIS dc7a: MISC BASE D51D8D4C6F2D lea r9, ptr [r31+rbp*2+0x2d] +XDIS dc80: MISC BASE D50C8D4C700F lea r9, ptr [rax+rsi*2+0xf] +XDIS dc86: MISC BASE D50C8D4C7110 lea r9, ptr [rcx+rsi*2+0x10] +XDIS dc8c: MISC BASE D50C8D4C7211 lea r9, ptr [rdx+rsi*2+0x11] +XDIS dc92: MISC BASE D50C8D4C7312 lea r9, ptr [rbx+rsi*2+0x12] +XDIS dc98: MISC BASE D50C8D4C7413 lea r9, ptr [rsp+rsi*2+0x13] +XDIS dc9e: MISC BASE D50C8D4C7514 lea r9, ptr [rbp+rsi*2+0x14] +XDIS dca4: MISC BASE D50C8D4C7615 lea r9, ptr [rsi+rsi*2+0x15] +XDIS dcaa: MISC BASE D50C8D4C7716 lea r9, ptr [rdi+rsi*2+0x16] +XDIS dcb0: MISC BASE D50D8D4C7017 lea r9, ptr [r8+rsi*2+0x17] +XDIS dcb6: MISC BASE D50D8D4C7118 lea r9, ptr [r9+rsi*2+0x18] +XDIS dcbc: MISC BASE D50D8D4C7219 lea r9, ptr [r10+rsi*2+0x19] +XDIS dcc2: MISC BASE D50D8D4C731A lea r9, ptr [r11+rsi*2+0x1a] +XDIS dcc8: MISC BASE D50D8D4C741B lea r9, ptr [r12+rsi*2+0x1b] +XDIS dcce: MISC BASE D50D8D4C751C lea r9, ptr [r13+rsi*2+0x1c] +XDIS dcd4: MISC BASE D50D8D4C761D lea r9, ptr [r14+rsi*2+0x1d] +XDIS dcda: MISC BASE D50D8D4C771E lea r9, ptr [r15+rsi*2+0x1e] +XDIS dce0: MISC BASE D51C8D4C701F lea r9, ptr [r16+rsi*2+0x1f] +XDIS dce6: MISC BASE D51C8D4C7120 lea r9, ptr [r17+rsi*2+0x20] +XDIS dcec: MISC BASE D51C8D4C7221 lea r9, ptr [r18+rsi*2+0x21] +XDIS dcf2: MISC BASE D51C8D4C7322 lea r9, ptr [r19+rsi*2+0x22] +XDIS dcf8: MISC BASE D51C8D4C7423 lea r9, ptr [r20+rsi*2+0x23] +XDIS dcfe: MISC BASE D51C8D4C7524 lea r9, ptr [r21+rsi*2+0x24] +XDIS dd04: MISC BASE D51C8D4C7625 lea r9, ptr [r22+rsi*2+0x25] +XDIS dd0a: MISC BASE D51C8D4C7726 lea r9, ptr [r23+rsi*2+0x26] +XDIS dd10: MISC BASE D51D8D4C7027 lea r9, ptr [r24+rsi*2+0x27] +XDIS dd16: MISC BASE D51D8D4C7128 lea r9, ptr [r25+rsi*2+0x28] +XDIS dd1c: MISC BASE D51D8D4C7229 lea r9, ptr [r26+rsi*2+0x29] +XDIS dd22: MISC BASE D51D8D4C732A lea r9, ptr [r27+rsi*2+0x2a] +XDIS dd28: MISC BASE D51D8D4C742B lea r9, ptr [r28+rsi*2+0x2b] +XDIS dd2e: MISC BASE D51D8D4C752C lea r9, ptr [r29+rsi*2+0x2c] +XDIS dd34: MISC BASE D51D8D4C762D lea r9, ptr [r30+rsi*2+0x2d] +XDIS dd3a: MISC BASE D51D8D4C772E lea r9, ptr [r31+rsi*2+0x2e] +XDIS dd40: MISC BASE D50C8D4C7810 lea r9, ptr [rax+rdi*2+0x10] +XDIS dd46: MISC BASE D50C8D4C7911 lea r9, ptr [rcx+rdi*2+0x11] +XDIS dd4c: MISC BASE D50C8D4C7A12 lea r9, ptr [rdx+rdi*2+0x12] +XDIS dd52: MISC BASE D50C8D4C7B13 lea r9, ptr [rbx+rdi*2+0x13] +XDIS dd58: MISC BASE D50C8D4C7C14 lea r9, ptr [rsp+rdi*2+0x14] +XDIS dd5e: MISC BASE D50C8D4C7D15 lea r9, ptr [rbp+rdi*2+0x15] +XDIS dd64: MISC BASE D50C8D4C7E16 lea r9, ptr [rsi+rdi*2+0x16] +XDIS dd6a: MISC BASE D50C8D4C7F17 lea r9, ptr [rdi+rdi*2+0x17] +XDIS dd70: MISC BASE D50D8D4C7818 lea r9, ptr [r8+rdi*2+0x18] +XDIS dd76: MISC BASE D50D8D4C7919 lea r9, ptr [r9+rdi*2+0x19] +XDIS dd7c: MISC BASE D50D8D4C7A1A lea r9, ptr [r10+rdi*2+0x1a] +XDIS dd82: MISC BASE D50D8D4C7B1B lea r9, ptr [r11+rdi*2+0x1b] +XDIS dd88: MISC BASE D50D8D4C7C1C lea r9, ptr [r12+rdi*2+0x1c] +XDIS dd8e: MISC BASE D50D8D4C7D1D lea r9, ptr [r13+rdi*2+0x1d] +XDIS dd94: MISC BASE D50D8D4C7E1E lea r9, ptr [r14+rdi*2+0x1e] +XDIS dd9a: MISC BASE D50D8D4C7F1F lea r9, ptr [r15+rdi*2+0x1f] +XDIS dda0: MISC BASE D51C8D4C7820 lea r9, ptr [r16+rdi*2+0x20] +XDIS dda6: MISC BASE D51C8D4C7921 lea r9, ptr [r17+rdi*2+0x21] +XDIS ddac: MISC BASE D51C8D4C7A22 lea r9, ptr [r18+rdi*2+0x22] +XDIS ddb2: MISC BASE D51C8D4C7B23 lea r9, ptr [r19+rdi*2+0x23] +XDIS ddb8: MISC BASE D51C8D4C7C24 lea r9, ptr [r20+rdi*2+0x24] +XDIS ddbe: MISC BASE D51C8D4C7D25 lea r9, ptr [r21+rdi*2+0x25] +XDIS ddc4: MISC BASE D51C8D4C7E26 lea r9, ptr [r22+rdi*2+0x26] +XDIS ddca: MISC BASE D51C8D4C7F27 lea r9, ptr [r23+rdi*2+0x27] +XDIS ddd0: MISC BASE D51D8D4C7828 lea r9, ptr [r24+rdi*2+0x28] +XDIS ddd6: MISC BASE D51D8D4C7929 lea r9, ptr [r25+rdi*2+0x29] +XDIS dddc: MISC BASE D51D8D4C7A2A lea r9, ptr [r26+rdi*2+0x2a] +XDIS dde2: MISC BASE D51D8D4C7B2B lea r9, ptr [r27+rdi*2+0x2b] +XDIS dde8: MISC BASE D51D8D4C7C2C lea r9, ptr [r28+rdi*2+0x2c] +XDIS ddee: MISC BASE D51D8D4C7D2D lea r9, ptr [r29+rdi*2+0x2d] +XDIS ddf4: MISC BASE D51D8D4C7E2E lea r9, ptr [r30+rdi*2+0x2e] +XDIS ddfa: MISC BASE D51D8D4C7F2F lea r9, ptr [r31+rdi*2+0x2f] +XDIS de00: MISC BASE D50E8D4C4011 lea r9, ptr [rax+r8*2+0x11] +XDIS de06: MISC BASE D50E8D4C4112 lea r9, ptr [rcx+r8*2+0x12] +XDIS de0c: MISC BASE D50E8D4C4213 lea r9, ptr [rdx+r8*2+0x13] +XDIS de12: MISC BASE D50E8D4C4314 lea r9, ptr [rbx+r8*2+0x14] +XDIS de18: MISC BASE D50E8D4C4415 lea r9, ptr [rsp+r8*2+0x15] +XDIS de1e: MISC BASE D50E8D4C4516 lea r9, ptr [rbp+r8*2+0x16] +XDIS de24: MISC BASE D50E8D4C4617 lea r9, ptr [rsi+r8*2+0x17] +XDIS de2a: MISC BASE D50E8D4C4718 lea r9, ptr [rdi+r8*2+0x18] +XDIS de30: MISC BASE D50F8D4C4019 lea r9, ptr [r8+r8*2+0x19] +XDIS de36: MISC BASE D50F8D4C411A lea r9, ptr [r9+r8*2+0x1a] +XDIS de3c: MISC BASE D50F8D4C421B lea r9, ptr [r10+r8*2+0x1b] +XDIS de42: MISC BASE D50F8D4C431C lea r9, ptr [r11+r8*2+0x1c] +XDIS de48: MISC BASE D50F8D4C441D lea r9, ptr [r12+r8*2+0x1d] +XDIS de4e: MISC BASE D50F8D4C451E lea r9, ptr [r13+r8*2+0x1e] +XDIS de54: MISC BASE D50F8D4C461F lea r9, ptr [r14+r8*2+0x1f] +XDIS de5a: MISC BASE D50F8D4C4720 lea r9, ptr [r15+r8*2+0x20] +XDIS de60: MISC BASE D51E8D4C4021 lea r9, ptr [r16+r8*2+0x21] +XDIS de66: MISC BASE D51E8D4C4122 lea r9, ptr [r17+r8*2+0x22] +XDIS de6c: MISC BASE D51E8D4C4223 lea r9, ptr [r18+r8*2+0x23] +XDIS de72: MISC BASE D51E8D4C4324 lea r9, ptr [r19+r8*2+0x24] +XDIS de78: MISC BASE D51E8D4C4425 lea r9, ptr [r20+r8*2+0x25] +XDIS de7e: MISC BASE D51E8D4C4526 lea r9, ptr [r21+r8*2+0x26] +XDIS de84: MISC BASE D51E8D4C4627 lea r9, ptr [r22+r8*2+0x27] +XDIS de8a: MISC BASE D51E8D4C4728 lea r9, ptr [r23+r8*2+0x28] +XDIS de90: MISC BASE D51F8D4C4029 lea r9, ptr [r24+r8*2+0x29] +XDIS de96: MISC BASE D51F8D4C412A lea r9, ptr [r25+r8*2+0x2a] +XDIS de9c: MISC BASE D51F8D4C422B lea r9, ptr [r26+r8*2+0x2b] +XDIS dea2: MISC BASE D51F8D4C432C lea r9, ptr [r27+r8*2+0x2c] +XDIS dea8: MISC BASE D51F8D4C442D lea r9, ptr [r28+r8*2+0x2d] +XDIS deae: MISC BASE D51F8D4C452E lea r9, ptr [r29+r8*2+0x2e] +XDIS deb4: MISC BASE D51F8D4C462F lea r9, ptr [r30+r8*2+0x2f] +XDIS deba: MISC BASE D51F8D4C4730 lea r9, ptr [r31+r8*2+0x30] +XDIS dec0: MISC BASE D50E8D4C4812 lea r9, ptr [rax+r9*2+0x12] +XDIS dec6: MISC BASE D50E8D4C4913 lea r9, ptr [rcx+r9*2+0x13] +XDIS decc: MISC BASE D50E8D4C4A14 lea r9, ptr [rdx+r9*2+0x14] +XDIS ded2: MISC BASE D50E8D4C4B15 lea r9, ptr [rbx+r9*2+0x15] +XDIS ded8: MISC BASE D50E8D4C4C16 lea r9, ptr [rsp+r9*2+0x16] +XDIS dede: MISC BASE D50E8D4C4D17 lea r9, ptr [rbp+r9*2+0x17] +XDIS dee4: MISC BASE D50E8D4C4E18 lea r9, ptr [rsi+r9*2+0x18] +XDIS deea: MISC BASE D50E8D4C4F19 lea r9, ptr [rdi+r9*2+0x19] +XDIS def0: MISC BASE D50F8D4C481A lea r9, ptr [r8+r9*2+0x1a] +XDIS def6: MISC BASE D50F8D4C491B lea r9, ptr [r9+r9*2+0x1b] +XDIS defc: MISC BASE D50F8D4C4A1C lea r9, ptr [r10+r9*2+0x1c] +XDIS df02: MISC BASE D50F8D4C4B1D lea r9, ptr [r11+r9*2+0x1d] +XDIS df08: MISC BASE D50F8D4C4C1E lea r9, ptr [r12+r9*2+0x1e] +XDIS df0e: MISC BASE D50F8D4C4D1F lea r9, ptr [r13+r9*2+0x1f] +XDIS df14: MISC BASE D50F8D4C4E20 lea r9, ptr [r14+r9*2+0x20] +XDIS df1a: MISC BASE D50F8D4C4F21 lea r9, ptr [r15+r9*2+0x21] +XDIS df20: MISC BASE D51E8D4C4822 lea r9, ptr [r16+r9*2+0x22] +XDIS df26: MISC BASE D51E8D4C4923 lea r9, ptr [r17+r9*2+0x23] +XDIS df2c: MISC BASE D51E8D4C4A24 lea r9, ptr [r18+r9*2+0x24] +XDIS df32: MISC BASE D51E8D4C4B25 lea r9, ptr [r19+r9*2+0x25] +XDIS df38: MISC BASE D51E8D4C4C26 lea r9, ptr [r20+r9*2+0x26] +XDIS df3e: MISC BASE D51E8D4C4D27 lea r9, ptr [r21+r9*2+0x27] +XDIS df44: MISC BASE D51E8D4C4E28 lea r9, ptr [r22+r9*2+0x28] +XDIS df4a: MISC BASE D51E8D4C4F29 lea r9, ptr [r23+r9*2+0x29] +XDIS df50: MISC BASE D51F8D4C482A lea r9, ptr [r24+r9*2+0x2a] +XDIS df56: MISC BASE D51F8D4C492B lea r9, ptr [r25+r9*2+0x2b] +XDIS df5c: MISC BASE D51F8D4C4A2C lea r9, ptr [r26+r9*2+0x2c] +XDIS df62: MISC BASE D51F8D4C4B2D lea r9, ptr [r27+r9*2+0x2d] +XDIS df68: MISC BASE D51F8D4C4C2E lea r9, ptr [r28+r9*2+0x2e] +XDIS df6e: MISC BASE D51F8D4C4D2F lea r9, ptr [r29+r9*2+0x2f] +XDIS df74: MISC BASE D51F8D4C4E30 lea r9, ptr [r30+r9*2+0x30] +XDIS df7a: MISC BASE D51F8D4C4F31 lea r9, ptr [r31+r9*2+0x31] +XDIS df80: MISC BASE D50E8D4C5013 lea r9, ptr [rax+r10*2+0x13] +XDIS df86: MISC BASE D50E8D4C5114 lea r9, ptr [rcx+r10*2+0x14] +XDIS df8c: MISC BASE D50E8D4C5215 lea r9, ptr [rdx+r10*2+0x15] +XDIS df92: MISC BASE D50E8D4C5316 lea r9, ptr [rbx+r10*2+0x16] +XDIS df98: MISC BASE D50E8D4C5417 lea r9, ptr [rsp+r10*2+0x17] +XDIS df9e: MISC BASE D50E8D4C5518 lea r9, ptr [rbp+r10*2+0x18] +XDIS dfa4: MISC BASE D50E8D4C5619 lea r9, ptr [rsi+r10*2+0x19] +XDIS dfaa: MISC BASE D50E8D4C571A lea r9, ptr [rdi+r10*2+0x1a] +XDIS dfb0: MISC BASE D50F8D4C501B lea r9, ptr [r8+r10*2+0x1b] +XDIS dfb6: MISC BASE D50F8D4C511C lea r9, ptr [r9+r10*2+0x1c] +XDIS dfbc: MISC BASE D50F8D4C521D lea r9, ptr [r10+r10*2+0x1d] +XDIS dfc2: MISC BASE D50F8D4C531E lea r9, ptr [r11+r10*2+0x1e] +XDIS dfc8: MISC BASE D50F8D4C541F lea r9, ptr [r12+r10*2+0x1f] +XDIS dfce: MISC BASE D50F8D4C5520 lea r9, ptr [r13+r10*2+0x20] +XDIS dfd4: MISC BASE D50F8D4C5621 lea r9, ptr [r14+r10*2+0x21] +XDIS dfda: MISC BASE D50F8D4C5722 lea r9, ptr [r15+r10*2+0x22] +XDIS dfe0: MISC BASE D51E8D4C5023 lea r9, ptr [r16+r10*2+0x23] +XDIS dfe6: MISC BASE D51E8D4C5124 lea r9, ptr [r17+r10*2+0x24] +XDIS dfec: MISC BASE D51E8D4C5225 lea r9, ptr [r18+r10*2+0x25] +XDIS dff2: MISC BASE D51E8D4C5326 lea r9, ptr [r19+r10*2+0x26] +XDIS dff8: MISC BASE D51E8D4C5427 lea r9, ptr [r20+r10*2+0x27] +XDIS dffe: MISC BASE D51E8D4C5528 lea r9, ptr [r21+r10*2+0x28] +XDIS e004: MISC BASE D51E8D4C5629 lea r9, ptr [r22+r10*2+0x29] +XDIS e00a: MISC BASE D51E8D4C572A lea r9, ptr [r23+r10*2+0x2a] +XDIS e010: MISC BASE D51F8D4C502B lea r9, ptr [r24+r10*2+0x2b] +XDIS e016: MISC BASE D51F8D4C512C lea r9, ptr [r25+r10*2+0x2c] +XDIS e01c: MISC BASE D51F8D4C522D lea r9, ptr [r26+r10*2+0x2d] +XDIS e022: MISC BASE D51F8D4C532E lea r9, ptr [r27+r10*2+0x2e] +XDIS e028: MISC BASE D51F8D4C542F lea r9, ptr [r28+r10*2+0x2f] +XDIS e02e: MISC BASE D51F8D4C5530 lea r9, ptr [r29+r10*2+0x30] +XDIS e034: MISC BASE D51F8D4C5631 lea r9, ptr [r30+r10*2+0x31] +XDIS e03a: MISC BASE D51F8D4C5732 lea r9, ptr [r31+r10*2+0x32] +XDIS e040: MISC BASE D50E8D4C5814 lea r9, ptr [rax+r11*2+0x14] +XDIS e046: MISC BASE D50E8D4C5915 lea r9, ptr [rcx+r11*2+0x15] +XDIS e04c: MISC BASE D50E8D4C5A16 lea r9, ptr [rdx+r11*2+0x16] +XDIS e052: MISC BASE D50E8D4C5B17 lea r9, ptr [rbx+r11*2+0x17] +XDIS e058: MISC BASE D50E8D4C5C18 lea r9, ptr [rsp+r11*2+0x18] +XDIS e05e: MISC BASE D50E8D4C5D19 lea r9, ptr [rbp+r11*2+0x19] +XDIS e064: MISC BASE D50E8D4C5E1A lea r9, ptr [rsi+r11*2+0x1a] +XDIS e06a: MISC BASE D50E8D4C5F1B lea r9, ptr [rdi+r11*2+0x1b] +XDIS e070: MISC BASE D50F8D4C581C lea r9, ptr [r8+r11*2+0x1c] +XDIS e076: MISC BASE D50F8D4C591D lea r9, ptr [r9+r11*2+0x1d] +XDIS e07c: MISC BASE D50F8D4C5A1E lea r9, ptr [r10+r11*2+0x1e] +XDIS e082: MISC BASE D50F8D4C5B1F lea r9, ptr [r11+r11*2+0x1f] +XDIS e088: MISC BASE D50F8D4C5C20 lea r9, ptr [r12+r11*2+0x20] +XDIS e08e: MISC BASE D50F8D4C5D21 lea r9, ptr [r13+r11*2+0x21] +XDIS e094: MISC BASE D50F8D4C5E22 lea r9, ptr [r14+r11*2+0x22] +XDIS e09a: MISC BASE D50F8D4C5F23 lea r9, ptr [r15+r11*2+0x23] +XDIS e0a0: MISC BASE D51E8D4C5824 lea r9, ptr [r16+r11*2+0x24] +XDIS e0a6: MISC BASE D51E8D4C5925 lea r9, ptr [r17+r11*2+0x25] +XDIS e0ac: MISC BASE D51E8D4C5A26 lea r9, ptr [r18+r11*2+0x26] +XDIS e0b2: MISC BASE D51E8D4C5B27 lea r9, ptr [r19+r11*2+0x27] +XDIS e0b8: MISC BASE D51E8D4C5C28 lea r9, ptr [r20+r11*2+0x28] +XDIS e0be: MISC BASE D51E8D4C5D29 lea r9, ptr [r21+r11*2+0x29] +XDIS e0c4: MISC BASE D51E8D4C5E2A lea r9, ptr [r22+r11*2+0x2a] +XDIS e0ca: MISC BASE D51E8D4C5F2B lea r9, ptr [r23+r11*2+0x2b] +XDIS e0d0: MISC BASE D51F8D4C582C lea r9, ptr [r24+r11*2+0x2c] +XDIS e0d6: MISC BASE D51F8D4C592D lea r9, ptr [r25+r11*2+0x2d] +XDIS e0dc: MISC BASE D51F8D4C5A2E lea r9, ptr [r26+r11*2+0x2e] +XDIS e0e2: MISC BASE D51F8D4C5B2F lea r9, ptr [r27+r11*2+0x2f] +XDIS e0e8: MISC BASE D51F8D4C5C30 lea r9, ptr [r28+r11*2+0x30] +XDIS e0ee: MISC BASE D51F8D4C5D31 lea r9, ptr [r29+r11*2+0x31] +XDIS e0f4: MISC BASE D51F8D4C5E32 lea r9, ptr [r30+r11*2+0x32] +XDIS e0fa: MISC BASE D51F8D4C5F33 lea r9, ptr [r31+r11*2+0x33] +XDIS e100: MISC BASE D50E8D4C6015 lea r9, ptr [rax+r12*2+0x15] +XDIS e106: MISC BASE D50E8D4C6116 lea r9, ptr [rcx+r12*2+0x16] +XDIS e10c: MISC BASE D50E8D4C6217 lea r9, ptr [rdx+r12*2+0x17] +XDIS e112: MISC BASE D50E8D4C6318 lea r9, ptr [rbx+r12*2+0x18] +XDIS e118: MISC BASE D50E8D4C6419 lea r9, ptr [rsp+r12*2+0x19] +XDIS e11e: MISC BASE D50E8D4C651A lea r9, ptr [rbp+r12*2+0x1a] +XDIS e124: MISC BASE D50E8D4C661B lea r9, ptr [rsi+r12*2+0x1b] +XDIS e12a: MISC BASE D50E8D4C671C lea r9, ptr [rdi+r12*2+0x1c] +XDIS e130: MISC BASE D50F8D4C601D lea r9, ptr [r8+r12*2+0x1d] +XDIS e136: MISC BASE D50F8D4C611E lea r9, ptr [r9+r12*2+0x1e] +XDIS e13c: MISC BASE D50F8D4C621F lea r9, ptr [r10+r12*2+0x1f] +XDIS e142: MISC BASE D50F8D4C6320 lea r9, ptr [r11+r12*2+0x20] +XDIS e148: MISC BASE D50F8D4C6421 lea r9, ptr [r12+r12*2+0x21] +XDIS e14e: MISC BASE D50F8D4C6522 lea r9, ptr [r13+r12*2+0x22] +XDIS e154: MISC BASE D50F8D4C6623 lea r9, ptr [r14+r12*2+0x23] +XDIS e15a: MISC BASE D50F8D4C6724 lea r9, ptr [r15+r12*2+0x24] +XDIS e160: MISC BASE D51E8D4C6025 lea r9, ptr [r16+r12*2+0x25] +XDIS e166: MISC BASE D51E8D4C6126 lea r9, ptr [r17+r12*2+0x26] +XDIS e16c: MISC BASE D51E8D4C6227 lea r9, ptr [r18+r12*2+0x27] +XDIS e172: MISC BASE D51E8D4C6328 lea r9, ptr [r19+r12*2+0x28] +XDIS e178: MISC BASE D51E8D4C6429 lea r9, ptr [r20+r12*2+0x29] +XDIS e17e: MISC BASE D51E8D4C652A lea r9, ptr [r21+r12*2+0x2a] +XDIS e184: MISC BASE D51E8D4C662B lea r9, ptr [r22+r12*2+0x2b] +XDIS e18a: MISC BASE D51E8D4C672C lea r9, ptr [r23+r12*2+0x2c] +XDIS e190: MISC BASE D51F8D4C602D lea r9, ptr [r24+r12*2+0x2d] +XDIS e196: MISC BASE D51F8D4C612E lea r9, ptr [r25+r12*2+0x2e] +XDIS e19c: MISC BASE D51F8D4C622F lea r9, ptr [r26+r12*2+0x2f] +XDIS e1a2: MISC BASE D51F8D4C6330 lea r9, ptr [r27+r12*2+0x30] +XDIS e1a8: MISC BASE D51F8D4C6431 lea r9, ptr [r28+r12*2+0x31] +XDIS e1ae: MISC BASE D51F8D4C6532 lea r9, ptr [r29+r12*2+0x32] +XDIS e1b4: MISC BASE D51F8D4C6633 lea r9, ptr [r30+r12*2+0x33] +XDIS e1ba: MISC BASE D51F8D4C6734 lea r9, ptr [r31+r12*2+0x34] +XDIS e1c0: MISC BASE D50E8D4C6816 lea r9, ptr [rax+r13*2+0x16] +XDIS e1c6: MISC BASE D50E8D4C6917 lea r9, ptr [rcx+r13*2+0x17] +XDIS e1cc: MISC BASE D50E8D4C6A18 lea r9, ptr [rdx+r13*2+0x18] +XDIS e1d2: MISC BASE D50E8D4C6B19 lea r9, ptr [rbx+r13*2+0x19] +XDIS e1d8: MISC BASE D50E8D4C6C1A lea r9, ptr [rsp+r13*2+0x1a] +XDIS e1de: MISC BASE D50E8D4C6D1B lea r9, ptr [rbp+r13*2+0x1b] +XDIS e1e4: MISC BASE D50E8D4C6E1C lea r9, ptr [rsi+r13*2+0x1c] +XDIS e1ea: MISC BASE D50E8D4C6F1D lea r9, ptr [rdi+r13*2+0x1d] +XDIS e1f0: MISC BASE D50F8D4C681E lea r9, ptr [r8+r13*2+0x1e] +XDIS e1f6: MISC BASE D50F8D4C691F lea r9, ptr [r9+r13*2+0x1f] +XDIS e1fc: MISC BASE D50F8D4C6A20 lea r9, ptr [r10+r13*2+0x20] +XDIS e202: MISC BASE D50F8D4C6B21 lea r9, ptr [r11+r13*2+0x21] +XDIS e208: MISC BASE D50F8D4C6C22 lea r9, ptr [r12+r13*2+0x22] +XDIS e20e: MISC BASE D50F8D4C6D23 lea r9, ptr [r13+r13*2+0x23] +XDIS e214: MISC BASE D50F8D4C6E24 lea r9, ptr [r14+r13*2+0x24] +XDIS e21a: MISC BASE D50F8D4C6F25 lea r9, ptr [r15+r13*2+0x25] +XDIS e220: MISC BASE D51E8D4C6826 lea r9, ptr [r16+r13*2+0x26] +XDIS e226: MISC BASE D51E8D4C6927 lea r9, ptr [r17+r13*2+0x27] +XDIS e22c: MISC BASE D51E8D4C6A28 lea r9, ptr [r18+r13*2+0x28] +XDIS e232: MISC BASE D51E8D4C6B29 lea r9, ptr [r19+r13*2+0x29] +XDIS e238: MISC BASE D51E8D4C6C2A lea r9, ptr [r20+r13*2+0x2a] +XDIS e23e: MISC BASE D51E8D4C6D2B lea r9, ptr [r21+r13*2+0x2b] +XDIS e244: MISC BASE D51E8D4C6E2C lea r9, ptr [r22+r13*2+0x2c] +XDIS e24a: MISC BASE D51E8D4C6F2D lea r9, ptr [r23+r13*2+0x2d] +XDIS e250: MISC BASE D51F8D4C682E lea r9, ptr [r24+r13*2+0x2e] +XDIS e256: MISC BASE D51F8D4C692F lea r9, ptr [r25+r13*2+0x2f] +XDIS e25c: MISC BASE D51F8D4C6A30 lea r9, ptr [r26+r13*2+0x30] +XDIS e262: MISC BASE D51F8D4C6B31 lea r9, ptr [r27+r13*2+0x31] +XDIS e268: MISC BASE D51F8D4C6C32 lea r9, ptr [r28+r13*2+0x32] +XDIS e26e: MISC BASE D51F8D4C6D33 lea r9, ptr [r29+r13*2+0x33] +XDIS e274: MISC BASE D51F8D4C6E34 lea r9, ptr [r30+r13*2+0x34] +XDIS e27a: MISC BASE D51F8D4C6F35 lea r9, ptr [r31+r13*2+0x35] +XDIS e280: MISC BASE D50E8D4C7017 lea r9, ptr [rax+r14*2+0x17] +XDIS e286: MISC BASE D50E8D4C7118 lea r9, ptr [rcx+r14*2+0x18] +XDIS e28c: MISC BASE D50E8D4C7219 lea r9, ptr [rdx+r14*2+0x19] +XDIS e292: MISC BASE D50E8D4C731A lea r9, ptr [rbx+r14*2+0x1a] +XDIS e298: MISC BASE D50E8D4C741B lea r9, ptr [rsp+r14*2+0x1b] +XDIS e29e: MISC BASE D50E8D4C751C lea r9, ptr [rbp+r14*2+0x1c] +XDIS e2a4: MISC BASE D50E8D4C761D lea r9, ptr [rsi+r14*2+0x1d] +XDIS e2aa: MISC BASE D50E8D4C771E lea r9, ptr [rdi+r14*2+0x1e] +XDIS e2b0: MISC BASE D50F8D4C701F lea r9, ptr [r8+r14*2+0x1f] +XDIS e2b6: MISC BASE D50F8D4C7120 lea r9, ptr [r9+r14*2+0x20] +XDIS e2bc: MISC BASE D50F8D4C7221 lea r9, ptr [r10+r14*2+0x21] +XDIS e2c2: MISC BASE D50F8D4C7322 lea r9, ptr [r11+r14*2+0x22] +XDIS e2c8: MISC BASE D50F8D4C7423 lea r9, ptr [r12+r14*2+0x23] +XDIS e2ce: MISC BASE D50F8D4C7524 lea r9, ptr [r13+r14*2+0x24] +XDIS e2d4: MISC BASE D50F8D4C7625 lea r9, ptr [r14+r14*2+0x25] +XDIS e2da: MISC BASE D50F8D4C7726 lea r9, ptr [r15+r14*2+0x26] +XDIS e2e0: MISC BASE D51E8D4C7027 lea r9, ptr [r16+r14*2+0x27] +XDIS e2e6: MISC BASE D51E8D4C7128 lea r9, ptr [r17+r14*2+0x28] +XDIS e2ec: MISC BASE D51E8D4C7229 lea r9, ptr [r18+r14*2+0x29] +XDIS e2f2: MISC BASE D51E8D4C732A lea r9, ptr [r19+r14*2+0x2a] +XDIS e2f8: MISC BASE D51E8D4C742B lea r9, ptr [r20+r14*2+0x2b] +XDIS e2fe: MISC BASE D51E8D4C752C lea r9, ptr [r21+r14*2+0x2c] +XDIS e304: MISC BASE D51E8D4C762D lea r9, ptr [r22+r14*2+0x2d] +XDIS e30a: MISC BASE D51E8D4C772E lea r9, ptr [r23+r14*2+0x2e] +XDIS e310: MISC BASE D51F8D4C702F lea r9, ptr [r24+r14*2+0x2f] +XDIS e316: MISC BASE D51F8D4C7130 lea r9, ptr [r25+r14*2+0x30] +XDIS e31c: MISC BASE D51F8D4C7231 lea r9, ptr [r26+r14*2+0x31] +XDIS e322: MISC BASE D51F8D4C7332 lea r9, ptr [r27+r14*2+0x32] +XDIS e328: MISC BASE D51F8D4C7433 lea r9, ptr [r28+r14*2+0x33] +XDIS e32e: MISC BASE D51F8D4C7534 lea r9, ptr [r29+r14*2+0x34] +XDIS e334: MISC BASE D51F8D4C7635 lea r9, ptr [r30+r14*2+0x35] +XDIS e33a: MISC BASE D51F8D4C7736 lea r9, ptr [r31+r14*2+0x36] +XDIS e340: MISC BASE D50E8D4C7818 lea r9, ptr [rax+r15*2+0x18] +XDIS e346: MISC BASE D50E8D4C7919 lea r9, ptr [rcx+r15*2+0x19] +XDIS e34c: MISC BASE D50E8D4C7A1A lea r9, ptr [rdx+r15*2+0x1a] +XDIS e352: MISC BASE D50E8D4C7B1B lea r9, ptr [rbx+r15*2+0x1b] +XDIS e358: MISC BASE D50E8D4C7C1C lea r9, ptr [rsp+r15*2+0x1c] +XDIS e35e: MISC BASE D50E8D4C7D1D lea r9, ptr [rbp+r15*2+0x1d] +XDIS e364: MISC BASE D50E8D4C7E1E lea r9, ptr [rsi+r15*2+0x1e] +XDIS e36a: MISC BASE D50E8D4C7F1F lea r9, ptr [rdi+r15*2+0x1f] +XDIS e370: MISC BASE D50F8D4C7820 lea r9, ptr [r8+r15*2+0x20] +XDIS e376: MISC BASE D50F8D4C7921 lea r9, ptr [r9+r15*2+0x21] +XDIS e37c: MISC BASE D50F8D4C7A22 lea r9, ptr [r10+r15*2+0x22] +XDIS e382: MISC BASE D50F8D4C7B23 lea r9, ptr [r11+r15*2+0x23] +XDIS e388: MISC BASE D50F8D4C7C24 lea r9, ptr [r12+r15*2+0x24] +XDIS e38e: MISC BASE D50F8D4C7D25 lea r9, ptr [r13+r15*2+0x25] +XDIS e394: MISC BASE D50F8D4C7E26 lea r9, ptr [r14+r15*2+0x26] +XDIS e39a: MISC BASE D50F8D4C7F27 lea r9, ptr [r15+r15*2+0x27] +XDIS e3a0: MISC BASE D51E8D4C7828 lea r9, ptr [r16+r15*2+0x28] +XDIS e3a6: MISC BASE D51E8D4C7929 lea r9, ptr [r17+r15*2+0x29] +XDIS e3ac: MISC BASE D51E8D4C7A2A lea r9, ptr [r18+r15*2+0x2a] +XDIS e3b2: MISC BASE D51E8D4C7B2B lea r9, ptr [r19+r15*2+0x2b] +XDIS e3b8: MISC BASE D51E8D4C7C2C lea r9, ptr [r20+r15*2+0x2c] +XDIS e3be: MISC BASE D51E8D4C7D2D lea r9, ptr [r21+r15*2+0x2d] +XDIS e3c4: MISC BASE D51E8D4C7E2E lea r9, ptr [r22+r15*2+0x2e] +XDIS e3ca: MISC BASE D51E8D4C7F2F lea r9, ptr [r23+r15*2+0x2f] +XDIS e3d0: MISC BASE D51F8D4C7830 lea r9, ptr [r24+r15*2+0x30] +XDIS e3d6: MISC BASE D51F8D4C7931 lea r9, ptr [r25+r15*2+0x31] +XDIS e3dc: MISC BASE D51F8D4C7A32 lea r9, ptr [r26+r15*2+0x32] +XDIS e3e2: MISC BASE D51F8D4C7B33 lea r9, ptr [r27+r15*2+0x33] +XDIS e3e8: MISC BASE D51F8D4C7C34 lea r9, ptr [r28+r15*2+0x34] +XDIS e3ee: MISC BASE D51F8D4C7D35 lea r9, ptr [r29+r15*2+0x35] +XDIS e3f4: MISC BASE D51F8D4C7E36 lea r9, ptr [r30+r15*2+0x36] +XDIS e3fa: MISC BASE D51F8D4C7F37 lea r9, ptr [r31+r15*2+0x37] +XDIS e400: MISC BASE D52C8D4C4019 lea r9, ptr [rax+r16*2+0x19] +XDIS e406: MISC BASE D52C8D4C411A lea r9, ptr [rcx+r16*2+0x1a] +XDIS e40c: MISC BASE D52C8D4C421B lea r9, ptr [rdx+r16*2+0x1b] +XDIS e412: MISC BASE D52C8D4C431C lea r9, ptr [rbx+r16*2+0x1c] +XDIS e418: MISC BASE D52C8D4C441D lea r9, ptr [rsp+r16*2+0x1d] +XDIS e41e: MISC BASE D52C8D4C451E lea r9, ptr [rbp+r16*2+0x1e] +XDIS e424: MISC BASE D52C8D4C461F lea r9, ptr [rsi+r16*2+0x1f] +XDIS e42a: MISC BASE D52C8D4C4720 lea r9, ptr [rdi+r16*2+0x20] +XDIS e430: MISC BASE D52D8D4C4021 lea r9, ptr [r8+r16*2+0x21] +XDIS e436: MISC BASE D52D8D4C4122 lea r9, ptr [r9+r16*2+0x22] +XDIS e43c: MISC BASE D52D8D4C4223 lea r9, ptr [r10+r16*2+0x23] +XDIS e442: MISC BASE D52D8D4C4324 lea r9, ptr [r11+r16*2+0x24] +XDIS e448: MISC BASE D52D8D4C4425 lea r9, ptr [r12+r16*2+0x25] +XDIS e44e: MISC BASE D52D8D4C4526 lea r9, ptr [r13+r16*2+0x26] +XDIS e454: MISC BASE D52D8D4C4627 lea r9, ptr [r14+r16*2+0x27] +XDIS e45a: MISC BASE D52D8D4C4728 lea r9, ptr [r15+r16*2+0x28] +XDIS e460: MISC BASE D53C8D4C4029 lea r9, ptr [r16+r16*2+0x29] +XDIS e466: MISC BASE D53C8D4C412A lea r9, ptr [r17+r16*2+0x2a] +XDIS e46c: MISC BASE D53C8D4C422B lea r9, ptr [r18+r16*2+0x2b] +XDIS e472: MISC BASE D53C8D4C432C lea r9, ptr [r19+r16*2+0x2c] +XDIS e478: MISC BASE D53C8D4C442D lea r9, ptr [r20+r16*2+0x2d] +XDIS e47e: MISC BASE D53C8D4C452E lea r9, ptr [r21+r16*2+0x2e] +XDIS e484: MISC BASE D53C8D4C462F lea r9, ptr [r22+r16*2+0x2f] +XDIS e48a: MISC BASE D53C8D4C4730 lea r9, ptr [r23+r16*2+0x30] +XDIS e490: MISC BASE D53D8D4C4031 lea r9, ptr [r24+r16*2+0x31] +XDIS e496: MISC BASE D53D8D4C4132 lea r9, ptr [r25+r16*2+0x32] +XDIS e49c: MISC BASE D53D8D4C4233 lea r9, ptr [r26+r16*2+0x33] +XDIS e4a2: MISC BASE D53D8D4C4334 lea r9, ptr [r27+r16*2+0x34] +XDIS e4a8: MISC BASE D53D8D4C4435 lea r9, ptr [r28+r16*2+0x35] +XDIS e4ae: MISC BASE D53D8D4C4536 lea r9, ptr [r29+r16*2+0x36] +XDIS e4b4: MISC BASE D53D8D4C4637 lea r9, ptr [r30+r16*2+0x37] +XDIS e4ba: MISC BASE D53D8D4C4738 lea r9, ptr [r31+r16*2+0x38] +XDIS e4c0: MISC BASE D52C8D4C481A lea r9, ptr [rax+r17*2+0x1a] +XDIS e4c6: MISC BASE D52C8D4C491B lea r9, ptr [rcx+r17*2+0x1b] +XDIS e4cc: MISC BASE D52C8D4C4A1C lea r9, ptr [rdx+r17*2+0x1c] +XDIS e4d2: MISC BASE D52C8D4C4B1D lea r9, ptr [rbx+r17*2+0x1d] +XDIS e4d8: MISC BASE D52C8D4C4C1E lea r9, ptr [rsp+r17*2+0x1e] +XDIS e4de: MISC BASE D52C8D4C4D1F lea r9, ptr [rbp+r17*2+0x1f] +XDIS e4e4: MISC BASE D52C8D4C4E20 lea r9, ptr [rsi+r17*2+0x20] +XDIS e4ea: MISC BASE D52C8D4C4F21 lea r9, ptr [rdi+r17*2+0x21] +XDIS e4f0: MISC BASE D52D8D4C4822 lea r9, ptr [r8+r17*2+0x22] +XDIS e4f6: MISC BASE D52D8D4C4923 lea r9, ptr [r9+r17*2+0x23] +XDIS e4fc: MISC BASE D52D8D4C4A24 lea r9, ptr [r10+r17*2+0x24] +XDIS e502: MISC BASE D52D8D4C4B25 lea r9, ptr [r11+r17*2+0x25] +XDIS e508: MISC BASE D52D8D4C4C26 lea r9, ptr [r12+r17*2+0x26] +XDIS e50e: MISC BASE D52D8D4C4D27 lea r9, ptr [r13+r17*2+0x27] +XDIS e514: MISC BASE D52D8D4C4E28 lea r9, ptr [r14+r17*2+0x28] +XDIS e51a: MISC BASE D52D8D4C4F29 lea r9, ptr [r15+r17*2+0x29] +XDIS e520: MISC BASE D53C8D4C482A lea r9, ptr [r16+r17*2+0x2a] +XDIS e526: MISC BASE D53C8D4C492B lea r9, ptr [r17+r17*2+0x2b] +XDIS e52c: MISC BASE D53C8D4C4A2C lea r9, ptr [r18+r17*2+0x2c] +XDIS e532: MISC BASE D53C8D4C4B2D lea r9, ptr [r19+r17*2+0x2d] +XDIS e538: MISC BASE D53C8D4C4C2E lea r9, ptr [r20+r17*2+0x2e] +XDIS e53e: MISC BASE D53C8D4C4D2F lea r9, ptr [r21+r17*2+0x2f] +XDIS e544: MISC BASE D53C8D4C4E30 lea r9, ptr [r22+r17*2+0x30] +XDIS e54a: MISC BASE D53C8D4C4F31 lea r9, ptr [r23+r17*2+0x31] +XDIS e550: MISC BASE D53D8D4C4832 lea r9, ptr [r24+r17*2+0x32] +XDIS e556: MISC BASE D53D8D4C4933 lea r9, ptr [r25+r17*2+0x33] +XDIS e55c: MISC BASE D53D8D4C4A34 lea r9, ptr [r26+r17*2+0x34] +XDIS e562: MISC BASE D53D8D4C4B35 lea r9, ptr [r27+r17*2+0x35] +XDIS e568: MISC BASE D53D8D4C4C36 lea r9, ptr [r28+r17*2+0x36] +XDIS e56e: MISC BASE D53D8D4C4D37 lea r9, ptr [r29+r17*2+0x37] +XDIS e574: MISC BASE D53D8D4C4E38 lea r9, ptr [r30+r17*2+0x38] +XDIS e57a: MISC BASE D53D8D4C4F39 lea r9, ptr [r31+r17*2+0x39] +XDIS e580: MISC BASE D52C8D4C501B lea r9, ptr [rax+r18*2+0x1b] +XDIS e586: MISC BASE D52C8D4C511C lea r9, ptr [rcx+r18*2+0x1c] +XDIS e58c: MISC BASE D52C8D4C521D lea r9, ptr [rdx+r18*2+0x1d] +XDIS e592: MISC BASE D52C8D4C531E lea r9, ptr [rbx+r18*2+0x1e] +XDIS e598: MISC BASE D52C8D4C541F lea r9, ptr [rsp+r18*2+0x1f] +XDIS e59e: MISC BASE D52C8D4C5520 lea r9, ptr [rbp+r18*2+0x20] +XDIS e5a4: MISC BASE D52C8D4C5621 lea r9, ptr [rsi+r18*2+0x21] +XDIS e5aa: MISC BASE D52C8D4C5722 lea r9, ptr [rdi+r18*2+0x22] +XDIS e5b0: MISC BASE D52D8D4C5023 lea r9, ptr [r8+r18*2+0x23] +XDIS e5b6: MISC BASE D52D8D4C5124 lea r9, ptr [r9+r18*2+0x24] +XDIS e5bc: MISC BASE D52D8D4C5225 lea r9, ptr [r10+r18*2+0x25] +XDIS e5c2: MISC BASE D52D8D4C5326 lea r9, ptr [r11+r18*2+0x26] +XDIS e5c8: MISC BASE D52D8D4C5427 lea r9, ptr [r12+r18*2+0x27] +XDIS e5ce: MISC BASE D52D8D4C5528 lea r9, ptr [r13+r18*2+0x28] +XDIS e5d4: MISC BASE D52D8D4C5629 lea r9, ptr [r14+r18*2+0x29] +XDIS e5da: MISC BASE D52D8D4C572A lea r9, ptr [r15+r18*2+0x2a] +XDIS e5e0: MISC BASE D53C8D4C502B lea r9, ptr [r16+r18*2+0x2b] +XDIS e5e6: MISC BASE D53C8D4C512C lea r9, ptr [r17+r18*2+0x2c] +XDIS e5ec: MISC BASE D53C8D4C522D lea r9, ptr [r18+r18*2+0x2d] +XDIS e5f2: MISC BASE D53C8D4C532E lea r9, ptr [r19+r18*2+0x2e] +XDIS e5f8: MISC BASE D53C8D4C542F lea r9, ptr [r20+r18*2+0x2f] +XDIS e5fe: MISC BASE D53C8D4C5530 lea r9, ptr [r21+r18*2+0x30] +XDIS e604: MISC BASE D53C8D4C5631 lea r9, ptr [r22+r18*2+0x31] +XDIS e60a: MISC BASE D53C8D4C5732 lea r9, ptr [r23+r18*2+0x32] +XDIS e610: MISC BASE D53D8D4C5033 lea r9, ptr [r24+r18*2+0x33] +XDIS e616: MISC BASE D53D8D4C5134 lea r9, ptr [r25+r18*2+0x34] +XDIS e61c: MISC BASE D53D8D4C5235 lea r9, ptr [r26+r18*2+0x35] +XDIS e622: MISC BASE D53D8D4C5336 lea r9, ptr [r27+r18*2+0x36] +XDIS e628: MISC BASE D53D8D4C5437 lea r9, ptr [r28+r18*2+0x37] +XDIS e62e: MISC BASE D53D8D4C5538 lea r9, ptr [r29+r18*2+0x38] +XDIS e634: MISC BASE D53D8D4C5639 lea r9, ptr [r30+r18*2+0x39] +XDIS e63a: MISC BASE D53D8D4C573A lea r9, ptr [r31+r18*2+0x3a] +XDIS e640: MISC BASE D52C8D4C581C lea r9, ptr [rax+r19*2+0x1c] +XDIS e646: MISC BASE D52C8D4C591D lea r9, ptr [rcx+r19*2+0x1d] +XDIS e64c: MISC BASE D52C8D4C5A1E lea r9, ptr [rdx+r19*2+0x1e] +XDIS e652: MISC BASE D52C8D4C5B1F lea r9, ptr [rbx+r19*2+0x1f] +XDIS e658: MISC BASE D52C8D4C5C20 lea r9, ptr [rsp+r19*2+0x20] +XDIS e65e: MISC BASE D52C8D4C5D21 lea r9, ptr [rbp+r19*2+0x21] +XDIS e664: MISC BASE D52C8D4C5E22 lea r9, ptr [rsi+r19*2+0x22] +XDIS e66a: MISC BASE D52C8D4C5F23 lea r9, ptr [rdi+r19*2+0x23] +XDIS e670: MISC BASE D52D8D4C5824 lea r9, ptr [r8+r19*2+0x24] +XDIS e676: MISC BASE D52D8D4C5925 lea r9, ptr [r9+r19*2+0x25] +XDIS e67c: MISC BASE D52D8D4C5A26 lea r9, ptr [r10+r19*2+0x26] +XDIS e682: MISC BASE D52D8D4C5B27 lea r9, ptr [r11+r19*2+0x27] +XDIS e688: MISC BASE D52D8D4C5C28 lea r9, ptr [r12+r19*2+0x28] +XDIS e68e: MISC BASE D52D8D4C5D29 lea r9, ptr [r13+r19*2+0x29] +XDIS e694: MISC BASE D52D8D4C5E2A lea r9, ptr [r14+r19*2+0x2a] +XDIS e69a: MISC BASE D52D8D4C5F2B lea r9, ptr [r15+r19*2+0x2b] +XDIS e6a0: MISC BASE D53C8D4C582C lea r9, ptr [r16+r19*2+0x2c] +XDIS e6a6: MISC BASE D53C8D4C592D lea r9, ptr [r17+r19*2+0x2d] +XDIS e6ac: MISC BASE D53C8D4C5A2E lea r9, ptr [r18+r19*2+0x2e] +XDIS e6b2: MISC BASE D53C8D4C5B2F lea r9, ptr [r19+r19*2+0x2f] +XDIS e6b8: MISC BASE D53C8D4C5C30 lea r9, ptr [r20+r19*2+0x30] +XDIS e6be: MISC BASE D53C8D4C5D31 lea r9, ptr [r21+r19*2+0x31] +XDIS e6c4: MISC BASE D53C8D4C5E32 lea r9, ptr [r22+r19*2+0x32] +XDIS e6ca: MISC BASE D53C8D4C5F33 lea r9, ptr [r23+r19*2+0x33] +XDIS e6d0: MISC BASE D53D8D4C5834 lea r9, ptr [r24+r19*2+0x34] +XDIS e6d6: MISC BASE D53D8D4C5935 lea r9, ptr [r25+r19*2+0x35] +XDIS e6dc: MISC BASE D53D8D4C5A36 lea r9, ptr [r26+r19*2+0x36] +XDIS e6e2: MISC BASE D53D8D4C5B37 lea r9, ptr [r27+r19*2+0x37] +XDIS e6e8: MISC BASE D53D8D4C5C38 lea r9, ptr [r28+r19*2+0x38] +XDIS e6ee: MISC BASE D53D8D4C5D39 lea r9, ptr [r29+r19*2+0x39] +XDIS e6f4: MISC BASE D53D8D4C5E3A lea r9, ptr [r30+r19*2+0x3a] +XDIS e6fa: MISC BASE D53D8D4C5F3B lea r9, ptr [r31+r19*2+0x3b] +XDIS e700: MISC BASE D52C8D4C601D lea r9, ptr [rax+r20*2+0x1d] +XDIS e706: MISC BASE D52C8D4C611E lea r9, ptr [rcx+r20*2+0x1e] +XDIS e70c: MISC BASE D52C8D4C621F lea r9, ptr [rdx+r20*2+0x1f] +XDIS e712: MISC BASE D52C8D4C6320 lea r9, ptr [rbx+r20*2+0x20] +XDIS e718: MISC BASE D52C8D4C6421 lea r9, ptr [rsp+r20*2+0x21] +XDIS e71e: MISC BASE D52C8D4C6522 lea r9, ptr [rbp+r20*2+0x22] +XDIS e724: MISC BASE D52C8D4C6623 lea r9, ptr [rsi+r20*2+0x23] +XDIS e72a: MISC BASE D52C8D4C6724 lea r9, ptr [rdi+r20*2+0x24] +XDIS e730: MISC BASE D52D8D4C6025 lea r9, ptr [r8+r20*2+0x25] +XDIS e736: MISC BASE D52D8D4C6126 lea r9, ptr [r9+r20*2+0x26] +XDIS e73c: MISC BASE D52D8D4C6227 lea r9, ptr [r10+r20*2+0x27] +XDIS e742: MISC BASE D52D8D4C6328 lea r9, ptr [r11+r20*2+0x28] +XDIS e748: MISC BASE D52D8D4C6429 lea r9, ptr [r12+r20*2+0x29] +XDIS e74e: MISC BASE D52D8D4C652A lea r9, ptr [r13+r20*2+0x2a] +XDIS e754: MISC BASE D52D8D4C662B lea r9, ptr [r14+r20*2+0x2b] +XDIS e75a: MISC BASE D52D8D4C672C lea r9, ptr [r15+r20*2+0x2c] +XDIS e760: MISC BASE D53C8D4C602D lea r9, ptr [r16+r20*2+0x2d] +XDIS e766: MISC BASE D53C8D4C612E lea r9, ptr [r17+r20*2+0x2e] +XDIS e76c: MISC BASE D53C8D4C622F lea r9, ptr [r18+r20*2+0x2f] +XDIS e772: MISC BASE D53C8D4C6330 lea r9, ptr [r19+r20*2+0x30] +XDIS e778: MISC BASE D53C8D4C6431 lea r9, ptr [r20+r20*2+0x31] +XDIS e77e: MISC BASE D53C8D4C6532 lea r9, ptr [r21+r20*2+0x32] +XDIS e784: MISC BASE D53C8D4C6633 lea r9, ptr [r22+r20*2+0x33] +XDIS e78a: MISC BASE D53C8D4C6734 lea r9, ptr [r23+r20*2+0x34] +XDIS e790: MISC BASE D53D8D4C6035 lea r9, ptr [r24+r20*2+0x35] +XDIS e796: MISC BASE D53D8D4C6136 lea r9, ptr [r25+r20*2+0x36] +XDIS e79c: MISC BASE D53D8D4C6237 lea r9, ptr [r26+r20*2+0x37] +XDIS e7a2: MISC BASE D53D8D4C6338 lea r9, ptr [r27+r20*2+0x38] +XDIS e7a8: MISC BASE D53D8D4C6439 lea r9, ptr [r28+r20*2+0x39] +XDIS e7ae: MISC BASE D53D8D4C653A lea r9, ptr [r29+r20*2+0x3a] +XDIS e7b4: MISC BASE D53D8D4C663B lea r9, ptr [r30+r20*2+0x3b] +XDIS e7ba: MISC BASE D53D8D4C673C lea r9, ptr [r31+r20*2+0x3c] +XDIS e7c0: MISC BASE D52C8D4C681E lea r9, ptr [rax+r21*2+0x1e] +XDIS e7c6: MISC BASE D52C8D4C691F lea r9, ptr [rcx+r21*2+0x1f] +XDIS e7cc: MISC BASE D52C8D4C6A20 lea r9, ptr [rdx+r21*2+0x20] +XDIS e7d2: MISC BASE D52C8D4C6B21 lea r9, ptr [rbx+r21*2+0x21] +XDIS e7d8: MISC BASE D52C8D4C6C22 lea r9, ptr [rsp+r21*2+0x22] +XDIS e7de: MISC BASE D52C8D4C6D23 lea r9, ptr [rbp+r21*2+0x23] +XDIS e7e4: MISC BASE D52C8D4C6E24 lea r9, ptr [rsi+r21*2+0x24] +XDIS e7ea: MISC BASE D52C8D4C6F25 lea r9, ptr [rdi+r21*2+0x25] +XDIS e7f0: MISC BASE D52D8D4C6826 lea r9, ptr [r8+r21*2+0x26] +XDIS e7f6: MISC BASE D52D8D4C6927 lea r9, ptr [r9+r21*2+0x27] +XDIS e7fc: MISC BASE D52D8D4C6A28 lea r9, ptr [r10+r21*2+0x28] +XDIS e802: MISC BASE D52D8D4C6B29 lea r9, ptr [r11+r21*2+0x29] +XDIS e808: MISC BASE D52D8D4C6C2A lea r9, ptr [r12+r21*2+0x2a] +XDIS e80e: MISC BASE D52D8D4C6D2B lea r9, ptr [r13+r21*2+0x2b] +XDIS e814: MISC BASE D52D8D4C6E2C lea r9, ptr [r14+r21*2+0x2c] +XDIS e81a: MISC BASE D52D8D4C6F2D lea r9, ptr [r15+r21*2+0x2d] +XDIS e820: MISC BASE D53C8D4C682E lea r9, ptr [r16+r21*2+0x2e] +XDIS e826: MISC BASE D53C8D4C692F lea r9, ptr [r17+r21*2+0x2f] +XDIS e82c: MISC BASE D53C8D4C6A30 lea r9, ptr [r18+r21*2+0x30] +XDIS e832: MISC BASE D53C8D4C6B31 lea r9, ptr [r19+r21*2+0x31] +XDIS e838: MISC BASE D53C8D4C6C32 lea r9, ptr [r20+r21*2+0x32] +XDIS e83e: MISC BASE D53C8D4C6D33 lea r9, ptr [r21+r21*2+0x33] +XDIS e844: MISC BASE D53C8D4C6E34 lea r9, ptr [r22+r21*2+0x34] +XDIS e84a: MISC BASE D53C8D4C6F35 lea r9, ptr [r23+r21*2+0x35] +XDIS e850: MISC BASE D53D8D4C6836 lea r9, ptr [r24+r21*2+0x36] +XDIS e856: MISC BASE D53D8D4C6937 lea r9, ptr [r25+r21*2+0x37] +XDIS e85c: MISC BASE D53D8D4C6A38 lea r9, ptr [r26+r21*2+0x38] +XDIS e862: MISC BASE D53D8D4C6B39 lea r9, ptr [r27+r21*2+0x39] +XDIS e868: MISC BASE D53D8D4C6C3A lea r9, ptr [r28+r21*2+0x3a] +XDIS e86e: MISC BASE D53D8D4C6D3B lea r9, ptr [r29+r21*2+0x3b] +XDIS e874: MISC BASE D53D8D4C6E3C lea r9, ptr [r30+r21*2+0x3c] +XDIS e87a: MISC BASE D53D8D4C6F3D lea r9, ptr [r31+r21*2+0x3d] +XDIS e880: MISC BASE D52C8D4C701F lea r9, ptr [rax+r22*2+0x1f] +XDIS e886: MISC BASE D52C8D4C7120 lea r9, ptr [rcx+r22*2+0x20] +XDIS e88c: MISC BASE D52C8D4C7221 lea r9, ptr [rdx+r22*2+0x21] +XDIS e892: MISC BASE D52C8D4C7322 lea r9, ptr [rbx+r22*2+0x22] +XDIS e898: MISC BASE D52C8D4C7423 lea r9, ptr [rsp+r22*2+0x23] +XDIS e89e: MISC BASE D52C8D4C7524 lea r9, ptr [rbp+r22*2+0x24] +XDIS e8a4: MISC BASE D52C8D4C7625 lea r9, ptr [rsi+r22*2+0x25] +XDIS e8aa: MISC BASE D52C8D4C7726 lea r9, ptr [rdi+r22*2+0x26] +XDIS e8b0: MISC BASE D52D8D4C7027 lea r9, ptr [r8+r22*2+0x27] +XDIS e8b6: MISC BASE D52D8D4C7128 lea r9, ptr [r9+r22*2+0x28] +XDIS e8bc: MISC BASE D52D8D4C7229 lea r9, ptr [r10+r22*2+0x29] +XDIS e8c2: MISC BASE D52D8D4C732A lea r9, ptr [r11+r22*2+0x2a] +XDIS e8c8: MISC BASE D52D8D4C742B lea r9, ptr [r12+r22*2+0x2b] +XDIS e8ce: MISC BASE D52D8D4C752C lea r9, ptr [r13+r22*2+0x2c] +XDIS e8d4: MISC BASE D52D8D4C762D lea r9, ptr [r14+r22*2+0x2d] +XDIS e8da: MISC BASE D52D8D4C772E lea r9, ptr [r15+r22*2+0x2e] +XDIS e8e0: MISC BASE D53C8D4C702F lea r9, ptr [r16+r22*2+0x2f] +XDIS e8e6: MISC BASE D53C8D4C7130 lea r9, ptr [r17+r22*2+0x30] +XDIS e8ec: MISC BASE D53C8D4C7231 lea r9, ptr [r18+r22*2+0x31] +XDIS e8f2: MISC BASE D53C8D4C7332 lea r9, ptr [r19+r22*2+0x32] +XDIS e8f8: MISC BASE D53C8D4C7433 lea r9, ptr [r20+r22*2+0x33] +XDIS e8fe: MISC BASE D53C8D4C7534 lea r9, ptr [r21+r22*2+0x34] +XDIS e904: MISC BASE D53C8D4C7635 lea r9, ptr [r22+r22*2+0x35] +XDIS e90a: MISC BASE D53C8D4C7736 lea r9, ptr [r23+r22*2+0x36] +XDIS e910: MISC BASE D53D8D4C7037 lea r9, ptr [r24+r22*2+0x37] +XDIS e916: MISC BASE D53D8D4C7138 lea r9, ptr [r25+r22*2+0x38] +XDIS e91c: MISC BASE D53D8D4C7239 lea r9, ptr [r26+r22*2+0x39] +XDIS e922: MISC BASE D53D8D4C733A lea r9, ptr [r27+r22*2+0x3a] +XDIS e928: MISC BASE D53D8D4C743B lea r9, ptr [r28+r22*2+0x3b] +XDIS e92e: MISC BASE D53D8D4C753C lea r9, ptr [r29+r22*2+0x3c] +XDIS e934: MISC BASE D53D8D4C763D lea r9, ptr [r30+r22*2+0x3d] +XDIS e93a: MISC BASE D53D8D4C773E lea r9, ptr [r31+r22*2+0x3e] +XDIS e940: MISC BASE D52C8D4C7820 lea r9, ptr [rax+r23*2+0x20] +XDIS e946: MISC BASE D52C8D4C7921 lea r9, ptr [rcx+r23*2+0x21] +XDIS e94c: MISC BASE D52C8D4C7A22 lea r9, ptr [rdx+r23*2+0x22] +XDIS e952: MISC BASE D52C8D4C7B23 lea r9, ptr [rbx+r23*2+0x23] +XDIS e958: MISC BASE D52C8D4C7C24 lea r9, ptr [rsp+r23*2+0x24] +XDIS e95e: MISC BASE D52C8D4C7D25 lea r9, ptr [rbp+r23*2+0x25] +XDIS e964: MISC BASE D52C8D4C7E26 lea r9, ptr [rsi+r23*2+0x26] +XDIS e96a: MISC BASE D52C8D4C7F27 lea r9, ptr [rdi+r23*2+0x27] +XDIS e970: MISC BASE D52D8D4C7828 lea r9, ptr [r8+r23*2+0x28] +XDIS e976: MISC BASE D52D8D4C7929 lea r9, ptr [r9+r23*2+0x29] +XDIS e97c: MISC BASE D52D8D4C7A2A lea r9, ptr [r10+r23*2+0x2a] +XDIS e982: MISC BASE D52D8D4C7B2B lea r9, ptr [r11+r23*2+0x2b] +XDIS e988: MISC BASE D52D8D4C7C2C lea r9, ptr [r12+r23*2+0x2c] +XDIS e98e: MISC BASE D52D8D4C7D2D lea r9, ptr [r13+r23*2+0x2d] +XDIS e994: MISC BASE D52D8D4C7E2E lea r9, ptr [r14+r23*2+0x2e] +XDIS e99a: MISC BASE D52D8D4C7F2F lea r9, ptr [r15+r23*2+0x2f] +XDIS e9a0: MISC BASE D53C8D4C7830 lea r9, ptr [r16+r23*2+0x30] +XDIS e9a6: MISC BASE D53C8D4C7931 lea r9, ptr [r17+r23*2+0x31] +XDIS e9ac: MISC BASE D53C8D4C7A32 lea r9, ptr [r18+r23*2+0x32] +XDIS e9b2: MISC BASE D53C8D4C7B33 lea r9, ptr [r19+r23*2+0x33] +XDIS e9b8: MISC BASE D53C8D4C7C34 lea r9, ptr [r20+r23*2+0x34] +XDIS e9be: MISC BASE D53C8D4C7D35 lea r9, ptr [r21+r23*2+0x35] +XDIS e9c4: MISC BASE D53C8D4C7E36 lea r9, ptr [r22+r23*2+0x36] +XDIS e9ca: MISC BASE D53C8D4C7F37 lea r9, ptr [r23+r23*2+0x37] +XDIS e9d0: MISC BASE D53D8D4C7838 lea r9, ptr [r24+r23*2+0x38] +XDIS e9d6: MISC BASE D53D8D4C7939 lea r9, ptr [r25+r23*2+0x39] +XDIS e9dc: MISC BASE D53D8D4C7A3A lea r9, ptr [r26+r23*2+0x3a] +XDIS e9e2: MISC BASE D53D8D4C7B3B lea r9, ptr [r27+r23*2+0x3b] +XDIS e9e8: MISC BASE D53D8D4C7C3C lea r9, ptr [r28+r23*2+0x3c] +XDIS e9ee: MISC BASE D53D8D4C7D3D lea r9, ptr [r29+r23*2+0x3d] +XDIS e9f4: MISC BASE D53D8D4C7E3E lea r9, ptr [r30+r23*2+0x3e] +XDIS e9fa: MISC BASE D53D8D4C7F3F lea r9, ptr [r31+r23*2+0x3f] +XDIS ea00: MISC BASE D52E8D4C4021 lea r9, ptr [rax+r24*2+0x21] +XDIS ea06: MISC BASE D52E8D4C4122 lea r9, ptr [rcx+r24*2+0x22] +XDIS ea0c: MISC BASE D52E8D4C4223 lea r9, ptr [rdx+r24*2+0x23] +XDIS ea12: MISC BASE D52E8D4C4324 lea r9, ptr [rbx+r24*2+0x24] +XDIS ea18: MISC BASE D52E8D4C4425 lea r9, ptr [rsp+r24*2+0x25] +XDIS ea1e: MISC BASE D52E8D4C4526 lea r9, ptr [rbp+r24*2+0x26] +XDIS ea24: MISC BASE D52E8D4C4627 lea r9, ptr [rsi+r24*2+0x27] +XDIS ea2a: MISC BASE D52E8D4C4728 lea r9, ptr [rdi+r24*2+0x28] +XDIS ea30: MISC BASE D52F8D4C4029 lea r9, ptr [r8+r24*2+0x29] +XDIS ea36: MISC BASE D52F8D4C412A lea r9, ptr [r9+r24*2+0x2a] +XDIS ea3c: MISC BASE D52F8D4C422B lea r9, ptr [r10+r24*2+0x2b] +XDIS ea42: MISC BASE D52F8D4C432C lea r9, ptr [r11+r24*2+0x2c] +XDIS ea48: MISC BASE D52F8D4C442D lea r9, ptr [r12+r24*2+0x2d] +XDIS ea4e: MISC BASE D52F8D4C452E lea r9, ptr [r13+r24*2+0x2e] +XDIS ea54: MISC BASE D52F8D4C462F lea r9, ptr [r14+r24*2+0x2f] +XDIS ea5a: MISC BASE D52F8D4C4730 lea r9, ptr [r15+r24*2+0x30] +XDIS ea60: MISC BASE D53E8D4C4031 lea r9, ptr [r16+r24*2+0x31] +XDIS ea66: MISC BASE D53E8D4C4132 lea r9, ptr [r17+r24*2+0x32] +XDIS ea6c: MISC BASE D53E8D4C4233 lea r9, ptr [r18+r24*2+0x33] +XDIS ea72: MISC BASE D53E8D4C4334 lea r9, ptr [r19+r24*2+0x34] +XDIS ea78: MISC BASE D53E8D4C4435 lea r9, ptr [r20+r24*2+0x35] +XDIS ea7e: MISC BASE D53E8D4C4536 lea r9, ptr [r21+r24*2+0x36] +XDIS ea84: MISC BASE D53E8D4C4637 lea r9, ptr [r22+r24*2+0x37] +XDIS ea8a: MISC BASE D53E8D4C4738 lea r9, ptr [r23+r24*2+0x38] +XDIS ea90: MISC BASE D53F8D4C4039 lea r9, ptr [r24+r24*2+0x39] +XDIS ea96: MISC BASE D53F8D4C413A lea r9, ptr [r25+r24*2+0x3a] +XDIS ea9c: MISC BASE D53F8D4C423B lea r9, ptr [r26+r24*2+0x3b] +XDIS eaa2: MISC BASE D53F8D4C433C lea r9, ptr [r27+r24*2+0x3c] +XDIS eaa8: MISC BASE D53F8D4C443D lea r9, ptr [r28+r24*2+0x3d] +XDIS eaae: MISC BASE D53F8D4C453E lea r9, ptr [r29+r24*2+0x3e] +XDIS eab4: MISC BASE D53F8D4C463F lea r9, ptr [r30+r24*2+0x3f] +XDIS eaba: MISC BASE D53F8D4C4740 lea r9, ptr [r31+r24*2+0x40] +XDIS eac0: MISC BASE D52E8D4C4822 lea r9, ptr [rax+r25*2+0x22] +XDIS eac6: MISC BASE D52E8D4C4923 lea r9, ptr [rcx+r25*2+0x23] +XDIS eacc: MISC BASE D52E8D4C4A24 lea r9, ptr [rdx+r25*2+0x24] +XDIS ead2: MISC BASE D52E8D4C4B25 lea r9, ptr [rbx+r25*2+0x25] +XDIS ead8: MISC BASE D52E8D4C4C26 lea r9, ptr [rsp+r25*2+0x26] +XDIS eade: MISC BASE D52E8D4C4D27 lea r9, ptr [rbp+r25*2+0x27] +XDIS eae4: MISC BASE D52E8D4C4E28 lea r9, ptr [rsi+r25*2+0x28] +XDIS eaea: MISC BASE D52E8D4C4F29 lea r9, ptr [rdi+r25*2+0x29] +XDIS eaf0: MISC BASE D52F8D4C482A lea r9, ptr [r8+r25*2+0x2a] +XDIS eaf6: MISC BASE D52F8D4C492B lea r9, ptr [r9+r25*2+0x2b] +XDIS eafc: MISC BASE D52F8D4C4A2C lea r9, ptr [r10+r25*2+0x2c] +XDIS eb02: MISC BASE D52F8D4C4B2D lea r9, ptr [r11+r25*2+0x2d] +XDIS eb08: MISC BASE D52F8D4C4C2E lea r9, ptr [r12+r25*2+0x2e] +XDIS eb0e: MISC BASE D52F8D4C4D2F lea r9, ptr [r13+r25*2+0x2f] +XDIS eb14: MISC BASE D52F8D4C4E30 lea r9, ptr [r14+r25*2+0x30] +XDIS eb1a: MISC BASE D52F8D4C4F31 lea r9, ptr [r15+r25*2+0x31] +XDIS eb20: MISC BASE D53E8D4C4832 lea r9, ptr [r16+r25*2+0x32] +XDIS eb26: MISC BASE D53E8D4C4933 lea r9, ptr [r17+r25*2+0x33] +XDIS eb2c: MISC BASE D53E8D4C4A34 lea r9, ptr [r18+r25*2+0x34] +XDIS eb32: MISC BASE D53E8D4C4B35 lea r9, ptr [r19+r25*2+0x35] +XDIS eb38: MISC BASE D53E8D4C4C36 lea r9, ptr [r20+r25*2+0x36] +XDIS eb3e: MISC BASE D53E8D4C4D37 lea r9, ptr [r21+r25*2+0x37] +XDIS eb44: MISC BASE D53E8D4C4E38 lea r9, ptr [r22+r25*2+0x38] +XDIS eb4a: MISC BASE D53E8D4C4F39 lea r9, ptr [r23+r25*2+0x39] +XDIS eb50: MISC BASE D53F8D4C483A lea r9, ptr [r24+r25*2+0x3a] +XDIS eb56: MISC BASE D53F8D4C493B lea r9, ptr [r25+r25*2+0x3b] +XDIS eb5c: MISC BASE D53F8D4C4A3C lea r9, ptr [r26+r25*2+0x3c] +XDIS eb62: MISC BASE D53F8D4C4B3D lea r9, ptr [r27+r25*2+0x3d] +XDIS eb68: MISC BASE D53F8D4C4C3E lea r9, ptr [r28+r25*2+0x3e] +XDIS eb6e: MISC BASE D53F8D4C4D3F lea r9, ptr [r29+r25*2+0x3f] +XDIS eb74: MISC BASE D53F8D4C4E40 lea r9, ptr [r30+r25*2+0x40] +XDIS eb7a: MISC BASE D53F8D4C4F41 lea r9, ptr [r31+r25*2+0x41] +XDIS eb80: MISC BASE D52E8D4C5023 lea r9, ptr [rax+r26*2+0x23] +XDIS eb86: MISC BASE D52E8D4C5124 lea r9, ptr [rcx+r26*2+0x24] +XDIS eb8c: MISC BASE D52E8D4C5225 lea r9, ptr [rdx+r26*2+0x25] +XDIS eb92: MISC BASE D52E8D4C5326 lea r9, ptr [rbx+r26*2+0x26] +XDIS eb98: MISC BASE D52E8D4C5427 lea r9, ptr [rsp+r26*2+0x27] +XDIS eb9e: MISC BASE D52E8D4C5528 lea r9, ptr [rbp+r26*2+0x28] +XDIS eba4: MISC BASE D52E8D4C5629 lea r9, ptr [rsi+r26*2+0x29] +XDIS ebaa: MISC BASE D52E8D4C572A lea r9, ptr [rdi+r26*2+0x2a] +XDIS ebb0: MISC BASE D52F8D4C502B lea r9, ptr [r8+r26*2+0x2b] +XDIS ebb6: MISC BASE D52F8D4C512C lea r9, ptr [r9+r26*2+0x2c] +XDIS ebbc: MISC BASE D52F8D4C522D lea r9, ptr [r10+r26*2+0x2d] +XDIS ebc2: MISC BASE D52F8D4C532E lea r9, ptr [r11+r26*2+0x2e] +XDIS ebc8: MISC BASE D52F8D4C542F lea r9, ptr [r12+r26*2+0x2f] +XDIS ebce: MISC BASE D52F8D4C5530 lea r9, ptr [r13+r26*2+0x30] +XDIS ebd4: MISC BASE D52F8D4C5631 lea r9, ptr [r14+r26*2+0x31] +XDIS ebda: MISC BASE D52F8D4C5732 lea r9, ptr [r15+r26*2+0x32] +XDIS ebe0: MISC BASE D53E8D4C5033 lea r9, ptr [r16+r26*2+0x33] +XDIS ebe6: MISC BASE D53E8D4C5134 lea r9, ptr [r17+r26*2+0x34] +XDIS ebec: MISC BASE D53E8D4C5235 lea r9, ptr [r18+r26*2+0x35] +XDIS ebf2: MISC BASE D53E8D4C5336 lea r9, ptr [r19+r26*2+0x36] +XDIS ebf8: MISC BASE D53E8D4C5437 lea r9, ptr [r20+r26*2+0x37] +XDIS ebfe: MISC BASE D53E8D4C5538 lea r9, ptr [r21+r26*2+0x38] +XDIS ec04: MISC BASE D53E8D4C5639 lea r9, ptr [r22+r26*2+0x39] +XDIS ec0a: MISC BASE D53E8D4C573A lea r9, ptr [r23+r26*2+0x3a] +XDIS ec10: MISC BASE D53F8D4C503B lea r9, ptr [r24+r26*2+0x3b] +XDIS ec16: MISC BASE D53F8D4C513C lea r9, ptr [r25+r26*2+0x3c] +XDIS ec1c: MISC BASE D53F8D4C523D lea r9, ptr [r26+r26*2+0x3d] +XDIS ec22: MISC BASE D53F8D4C533E lea r9, ptr [r27+r26*2+0x3e] +XDIS ec28: MISC BASE D53F8D4C543F lea r9, ptr [r28+r26*2+0x3f] +XDIS ec2e: MISC BASE D53F8D4C5540 lea r9, ptr [r29+r26*2+0x40] +XDIS ec34: MISC BASE D53F8D4C5641 lea r9, ptr [r30+r26*2+0x41] +XDIS ec3a: MISC BASE D53F8D4C5742 lea r9, ptr [r31+r26*2+0x42] +XDIS ec40: MISC BASE D52E8D4C5824 lea r9, ptr [rax+r27*2+0x24] +XDIS ec46: MISC BASE D52E8D4C5925 lea r9, ptr [rcx+r27*2+0x25] +XDIS ec4c: MISC BASE D52E8D4C5A26 lea r9, ptr [rdx+r27*2+0x26] +XDIS ec52: MISC BASE D52E8D4C5B27 lea r9, ptr [rbx+r27*2+0x27] +XDIS ec58: MISC BASE D52E8D4C5C28 lea r9, ptr [rsp+r27*2+0x28] +XDIS ec5e: MISC BASE D52E8D4C5D29 lea r9, ptr [rbp+r27*2+0x29] +XDIS ec64: MISC BASE D52E8D4C5E2A lea r9, ptr [rsi+r27*2+0x2a] +XDIS ec6a: MISC BASE D52E8D4C5F2B lea r9, ptr [rdi+r27*2+0x2b] +XDIS ec70: MISC BASE D52F8D4C582C lea r9, ptr [r8+r27*2+0x2c] +XDIS ec76: MISC BASE D52F8D4C592D lea r9, ptr [r9+r27*2+0x2d] +XDIS ec7c: MISC BASE D52F8D4C5A2E lea r9, ptr [r10+r27*2+0x2e] +XDIS ec82: MISC BASE D52F8D4C5B2F lea r9, ptr [r11+r27*2+0x2f] +XDIS ec88: MISC BASE D52F8D4C5C30 lea r9, ptr [r12+r27*2+0x30] +XDIS ec8e: MISC BASE D52F8D4C5D31 lea r9, ptr [r13+r27*2+0x31] +XDIS ec94: MISC BASE D52F8D4C5E32 lea r9, ptr [r14+r27*2+0x32] +XDIS ec9a: MISC BASE D52F8D4C5F33 lea r9, ptr [r15+r27*2+0x33] +XDIS eca0: MISC BASE D53E8D4C5834 lea r9, ptr [r16+r27*2+0x34] +XDIS eca6: MISC BASE D53E8D4C5935 lea r9, ptr [r17+r27*2+0x35] +XDIS ecac: MISC BASE D53E8D4C5A36 lea r9, ptr [r18+r27*2+0x36] +XDIS ecb2: MISC BASE D53E8D4C5B37 lea r9, ptr [r19+r27*2+0x37] +XDIS ecb8: MISC BASE D53E8D4C5C38 lea r9, ptr [r20+r27*2+0x38] +XDIS ecbe: MISC BASE D53E8D4C5D39 lea r9, ptr [r21+r27*2+0x39] +XDIS ecc4: MISC BASE D53E8D4C5E3A lea r9, ptr [r22+r27*2+0x3a] +XDIS ecca: MISC BASE D53E8D4C5F3B lea r9, ptr [r23+r27*2+0x3b] +XDIS ecd0: MISC BASE D53F8D4C583C lea r9, ptr [r24+r27*2+0x3c] +XDIS ecd6: MISC BASE D53F8D4C593D lea r9, ptr [r25+r27*2+0x3d] +XDIS ecdc: MISC BASE D53F8D4C5A3E lea r9, ptr [r26+r27*2+0x3e] +XDIS ece2: MISC BASE D53F8D4C5B3F lea r9, ptr [r27+r27*2+0x3f] +XDIS ece8: MISC BASE D53F8D4C5C40 lea r9, ptr [r28+r27*2+0x40] +XDIS ecee: MISC BASE D53F8D4C5D41 lea r9, ptr [r29+r27*2+0x41] +XDIS ecf4: MISC BASE D53F8D4C5E42 lea r9, ptr [r30+r27*2+0x42] +XDIS ecfa: MISC BASE D53F8D4C5F43 lea r9, ptr [r31+r27*2+0x43] +XDIS ed00: MISC BASE D52E8D4C6025 lea r9, ptr [rax+r28*2+0x25] +XDIS ed06: MISC BASE D52E8D4C6126 lea r9, ptr [rcx+r28*2+0x26] +XDIS ed0c: MISC BASE D52E8D4C6227 lea r9, ptr [rdx+r28*2+0x27] +XDIS ed12: MISC BASE D52E8D4C6328 lea r9, ptr [rbx+r28*2+0x28] +XDIS ed18: MISC BASE D52E8D4C6429 lea r9, ptr [rsp+r28*2+0x29] +XDIS ed1e: MISC BASE D52E8D4C652A lea r9, ptr [rbp+r28*2+0x2a] +XDIS ed24: MISC BASE D52E8D4C662B lea r9, ptr [rsi+r28*2+0x2b] +XDIS ed2a: MISC BASE D52E8D4C672C lea r9, ptr [rdi+r28*2+0x2c] +XDIS ed30: MISC BASE D52F8D4C602D lea r9, ptr [r8+r28*2+0x2d] +XDIS ed36: MISC BASE D52F8D4C612E lea r9, ptr [r9+r28*2+0x2e] +XDIS ed3c: MISC BASE D52F8D4C622F lea r9, ptr [r10+r28*2+0x2f] +XDIS ed42: MISC BASE D52F8D4C6330 lea r9, ptr [r11+r28*2+0x30] +XDIS ed48: MISC BASE D52F8D4C6431 lea r9, ptr [r12+r28*2+0x31] +XDIS ed4e: MISC BASE D52F8D4C6532 lea r9, ptr [r13+r28*2+0x32] +XDIS ed54: MISC BASE D52F8D4C6633 lea r9, ptr [r14+r28*2+0x33] +XDIS ed5a: MISC BASE D52F8D4C6734 lea r9, ptr [r15+r28*2+0x34] +XDIS ed60: MISC BASE D53E8D4C6035 lea r9, ptr [r16+r28*2+0x35] +XDIS ed66: MISC BASE D53E8D4C6136 lea r9, ptr [r17+r28*2+0x36] +XDIS ed6c: MISC BASE D53E8D4C6237 lea r9, ptr [r18+r28*2+0x37] +XDIS ed72: MISC BASE D53E8D4C6338 lea r9, ptr [r19+r28*2+0x38] +XDIS ed78: MISC BASE D53E8D4C6439 lea r9, ptr [r20+r28*2+0x39] +XDIS ed7e: MISC BASE D53E8D4C653A lea r9, ptr [r21+r28*2+0x3a] +XDIS ed84: MISC BASE D53E8D4C663B lea r9, ptr [r22+r28*2+0x3b] +XDIS ed8a: MISC BASE D53E8D4C673C lea r9, ptr [r23+r28*2+0x3c] +XDIS ed90: MISC BASE D53F8D4C603D lea r9, ptr [r24+r28*2+0x3d] +XDIS ed96: MISC BASE D53F8D4C613E lea r9, ptr [r25+r28*2+0x3e] +XDIS ed9c: MISC BASE D53F8D4C623F lea r9, ptr [r26+r28*2+0x3f] +XDIS eda2: MISC BASE D53F8D4C6340 lea r9, ptr [r27+r28*2+0x40] +XDIS eda8: MISC BASE D53F8D4C6441 lea r9, ptr [r28+r28*2+0x41] +XDIS edae: MISC BASE D53F8D4C6542 lea r9, ptr [r29+r28*2+0x42] +XDIS edb4: MISC BASE D53F8D4C6643 lea r9, ptr [r30+r28*2+0x43] +XDIS edba: MISC BASE D53F8D4C6744 lea r9, ptr [r31+r28*2+0x44] +XDIS edc0: MISC BASE D52E8D4C6826 lea r9, ptr [rax+r29*2+0x26] +XDIS edc6: MISC BASE D52E8D4C6927 lea r9, ptr [rcx+r29*2+0x27] +XDIS edcc: MISC BASE D52E8D4C6A28 lea r9, ptr [rdx+r29*2+0x28] +XDIS edd2: MISC BASE D52E8D4C6B29 lea r9, ptr [rbx+r29*2+0x29] +XDIS edd8: MISC BASE D52E8D4C6C2A lea r9, ptr [rsp+r29*2+0x2a] +XDIS edde: MISC BASE D52E8D4C6D2B lea r9, ptr [rbp+r29*2+0x2b] +XDIS ede4: MISC BASE D52E8D4C6E2C lea r9, ptr [rsi+r29*2+0x2c] +XDIS edea: MISC BASE D52E8D4C6F2D lea r9, ptr [rdi+r29*2+0x2d] +XDIS edf0: MISC BASE D52F8D4C682E lea r9, ptr [r8+r29*2+0x2e] +XDIS edf6: MISC BASE D52F8D4C692F lea r9, ptr [r9+r29*2+0x2f] +XDIS edfc: MISC BASE D52F8D4C6A30 lea r9, ptr [r10+r29*2+0x30] +XDIS ee02: MISC BASE D52F8D4C6B31 lea r9, ptr [r11+r29*2+0x31] +XDIS ee08: MISC BASE D52F8D4C6C32 lea r9, ptr [r12+r29*2+0x32] +XDIS ee0e: MISC BASE D52F8D4C6D33 lea r9, ptr [r13+r29*2+0x33] +XDIS ee14: MISC BASE D52F8D4C6E34 lea r9, ptr [r14+r29*2+0x34] +XDIS ee1a: MISC BASE D52F8D4C6F35 lea r9, ptr [r15+r29*2+0x35] +XDIS ee20: MISC BASE D53E8D4C6836 lea r9, ptr [r16+r29*2+0x36] +XDIS ee26: MISC BASE D53E8D4C6937 lea r9, ptr [r17+r29*2+0x37] +XDIS ee2c: MISC BASE D53E8D4C6A38 lea r9, ptr [r18+r29*2+0x38] +XDIS ee32: MISC BASE D53E8D4C6B39 lea r9, ptr [r19+r29*2+0x39] +XDIS ee38: MISC BASE D53E8D4C6C3A lea r9, ptr [r20+r29*2+0x3a] +XDIS ee3e: MISC BASE D53E8D4C6D3B lea r9, ptr [r21+r29*2+0x3b] +XDIS ee44: MISC BASE D53E8D4C6E3C lea r9, ptr [r22+r29*2+0x3c] +XDIS ee4a: MISC BASE D53E8D4C6F3D lea r9, ptr [r23+r29*2+0x3d] +XDIS ee50: MISC BASE D53F8D4C683E lea r9, ptr [r24+r29*2+0x3e] +XDIS ee56: MISC BASE D53F8D4C693F lea r9, ptr [r25+r29*2+0x3f] +XDIS ee5c: MISC BASE D53F8D4C6A40 lea r9, ptr [r26+r29*2+0x40] +XDIS ee62: MISC BASE D53F8D4C6B41 lea r9, ptr [r27+r29*2+0x41] +XDIS ee68: MISC BASE D53F8D4C6C42 lea r9, ptr [r28+r29*2+0x42] +XDIS ee6e: MISC BASE D53F8D4C6D43 lea r9, ptr [r29+r29*2+0x43] +XDIS ee74: MISC BASE D53F8D4C6E44 lea r9, ptr [r30+r29*2+0x44] +XDIS ee7a: MISC BASE D53F8D4C6F45 lea r9, ptr [r31+r29*2+0x45] +XDIS ee80: MISC BASE D52E8D4C7027 lea r9, ptr [rax+r30*2+0x27] +XDIS ee86: MISC BASE D52E8D4C7128 lea r9, ptr [rcx+r30*2+0x28] +XDIS ee8c: MISC BASE D52E8D4C7229 lea r9, ptr [rdx+r30*2+0x29] +XDIS ee92: MISC BASE D52E8D4C732A lea r9, ptr [rbx+r30*2+0x2a] +XDIS ee98: MISC BASE D52E8D4C742B lea r9, ptr [rsp+r30*2+0x2b] +XDIS ee9e: MISC BASE D52E8D4C752C lea r9, ptr [rbp+r30*2+0x2c] +XDIS eea4: MISC BASE D52E8D4C762D lea r9, ptr [rsi+r30*2+0x2d] +XDIS eeaa: MISC BASE D52E8D4C772E lea r9, ptr [rdi+r30*2+0x2e] +XDIS eeb0: MISC BASE D52F8D4C702F lea r9, ptr [r8+r30*2+0x2f] +XDIS eeb6: MISC BASE D52F8D4C7130 lea r9, ptr [r9+r30*2+0x30] +XDIS eebc: MISC BASE D52F8D4C7231 lea r9, ptr [r10+r30*2+0x31] +XDIS eec2: MISC BASE D52F8D4C7332 lea r9, ptr [r11+r30*2+0x32] +XDIS eec8: MISC BASE D52F8D4C7433 lea r9, ptr [r12+r30*2+0x33] +XDIS eece: MISC BASE D52F8D4C7534 lea r9, ptr [r13+r30*2+0x34] +XDIS eed4: MISC BASE D52F8D4C7635 lea r9, ptr [r14+r30*2+0x35] +XDIS eeda: MISC BASE D52F8D4C7736 lea r9, ptr [r15+r30*2+0x36] +XDIS eee0: MISC BASE D53E8D4C7037 lea r9, ptr [r16+r30*2+0x37] +XDIS eee6: MISC BASE D53E8D4C7138 lea r9, ptr [r17+r30*2+0x38] +XDIS eeec: MISC BASE D53E8D4C7239 lea r9, ptr [r18+r30*2+0x39] +XDIS eef2: MISC BASE D53E8D4C733A lea r9, ptr [r19+r30*2+0x3a] +XDIS eef8: MISC BASE D53E8D4C743B lea r9, ptr [r20+r30*2+0x3b] +XDIS eefe: MISC BASE D53E8D4C753C lea r9, ptr [r21+r30*2+0x3c] +XDIS ef04: MISC BASE D53E8D4C763D lea r9, ptr [r22+r30*2+0x3d] +XDIS ef0a: MISC BASE D53E8D4C773E lea r9, ptr [r23+r30*2+0x3e] +XDIS ef10: MISC BASE D53F8D4C703F lea r9, ptr [r24+r30*2+0x3f] +XDIS ef16: MISC BASE D53F8D4C7140 lea r9, ptr [r25+r30*2+0x40] +XDIS ef1c: MISC BASE D53F8D4C7241 lea r9, ptr [r26+r30*2+0x41] +XDIS ef22: MISC BASE D53F8D4C7342 lea r9, ptr [r27+r30*2+0x42] +XDIS ef28: MISC BASE D53F8D4C7443 lea r9, ptr [r28+r30*2+0x43] +XDIS ef2e: MISC BASE D53F8D4C7544 lea r9, ptr [r29+r30*2+0x44] +XDIS ef34: MISC BASE D53F8D4C7645 lea r9, ptr [r30+r30*2+0x45] +XDIS ef3a: MISC BASE D53F8D4C7746 lea r9, ptr [r31+r30*2+0x46] +XDIS ef40: MISC BASE D52E8D4C7828 lea r9, ptr [rax+r31*2+0x28] +XDIS ef46: MISC BASE D52E8D4C7929 lea r9, ptr [rcx+r31*2+0x29] +XDIS ef4c: MISC BASE D52E8D4C7A2A lea r9, ptr [rdx+r31*2+0x2a] +XDIS ef52: MISC BASE D52E8D4C7B2B lea r9, ptr [rbx+r31*2+0x2b] +XDIS ef58: MISC BASE D52E8D4C7C2C lea r9, ptr [rsp+r31*2+0x2c] +XDIS ef5e: MISC BASE D52E8D4C7D2D lea r9, ptr [rbp+r31*2+0x2d] +XDIS ef64: MISC BASE D52E8D4C7E2E lea r9, ptr [rsi+r31*2+0x2e] +XDIS ef6a: MISC BASE D52E8D4C7F2F lea r9, ptr [rdi+r31*2+0x2f] +XDIS ef70: MISC BASE D52F8D4C7830 lea r9, ptr [r8+r31*2+0x30] +XDIS ef76: MISC BASE D52F8D4C7931 lea r9, ptr [r9+r31*2+0x31] +XDIS ef7c: MISC BASE D52F8D4C7A32 lea r9, ptr [r10+r31*2+0x32] +XDIS ef82: MISC BASE D52F8D4C7B33 lea r9, ptr [r11+r31*2+0x33] +XDIS ef88: MISC BASE D52F8D4C7C34 lea r9, ptr [r12+r31*2+0x34] +XDIS ef8e: MISC BASE D52F8D4C7D35 lea r9, ptr [r13+r31*2+0x35] +XDIS ef94: MISC BASE D52F8D4C7E36 lea r9, ptr [r14+r31*2+0x36] +XDIS ef9a: MISC BASE D52F8D4C7F37 lea r9, ptr [r15+r31*2+0x37] +XDIS efa0: MISC BASE D53E8D4C7838 lea r9, ptr [r16+r31*2+0x38] +XDIS efa6: MISC BASE D53E8D4C7939 lea r9, ptr [r17+r31*2+0x39] +XDIS efac: MISC BASE D53E8D4C7A3A lea r9, ptr [r18+r31*2+0x3a] +XDIS efb2: MISC BASE D53E8D4C7B3B lea r9, ptr [r19+r31*2+0x3b] +XDIS efb8: MISC BASE D53E8D4C7C3C lea r9, ptr [r20+r31*2+0x3c] +XDIS efbe: MISC BASE D53E8D4C7D3D lea r9, ptr [r21+r31*2+0x3d] +XDIS efc4: MISC BASE D53E8D4C7E3E lea r9, ptr [r22+r31*2+0x3e] +XDIS efca: MISC BASE D53E8D4C7F3F lea r9, ptr [r23+r31*2+0x3f] +XDIS efd0: MISC BASE D53F8D4C7840 lea r9, ptr [r24+r31*2+0x40] +XDIS efd6: MISC BASE D53F8D4C7941 lea r9, ptr [r25+r31*2+0x41] +XDIS efdc: MISC BASE D53F8D4C7A42 lea r9, ptr [r26+r31*2+0x42] +XDIS efe2: MISC BASE D53F8D4C7B43 lea r9, ptr [r27+r31*2+0x43] +XDIS efe8: MISC BASE D53F8D4C7C44 lea r9, ptr [r28+r31*2+0x44] +XDIS efee: MISC BASE D53F8D4C7D45 lea r9, ptr [r29+r31*2+0x45] +XDIS eff4: MISC BASE D53F8D4C7E46 lea r9, ptr [r30+r31*2+0x46] +XDIS effa: MISC BASE D53F8D4C7F47 lea r9, ptr [r31+r31*2+0x47] +XDIS f000: MISC BASE D50C8D54400A lea r10, ptr [rax+rax*2+0xa] +XDIS f006: MISC BASE D50C8D54410B lea r10, ptr [rcx+rax*2+0xb] +XDIS f00c: MISC BASE D50C8D54420C lea r10, ptr [rdx+rax*2+0xc] +XDIS f012: MISC BASE D50C8D54430D lea r10, ptr [rbx+rax*2+0xd] +XDIS f018: MISC BASE D50C8D54440E lea r10, ptr [rsp+rax*2+0xe] +XDIS f01e: MISC BASE D50C8D54450F lea r10, ptr [rbp+rax*2+0xf] +XDIS f024: MISC BASE D50C8D544610 lea r10, ptr [rsi+rax*2+0x10] +XDIS f02a: MISC BASE D50C8D544711 lea r10, ptr [rdi+rax*2+0x11] +XDIS f030: MISC BASE D50D8D544012 lea r10, ptr [r8+rax*2+0x12] +XDIS f036: MISC BASE D50D8D544113 lea r10, ptr [r9+rax*2+0x13] +XDIS f03c: MISC BASE D50D8D544214 lea r10, ptr [r10+rax*2+0x14] +XDIS f042: MISC BASE D50D8D544315 lea r10, ptr [r11+rax*2+0x15] +XDIS f048: MISC BASE D50D8D544416 lea r10, ptr [r12+rax*2+0x16] +XDIS f04e: MISC BASE D50D8D544517 lea r10, ptr [r13+rax*2+0x17] +XDIS f054: MISC BASE D50D8D544618 lea r10, ptr [r14+rax*2+0x18] +XDIS f05a: MISC BASE D50D8D544719 lea r10, ptr [r15+rax*2+0x19] +XDIS f060: MISC BASE D51C8D54401A lea r10, ptr [r16+rax*2+0x1a] +XDIS f066: MISC BASE D51C8D54411B lea r10, ptr [r17+rax*2+0x1b] +XDIS f06c: MISC BASE D51C8D54421C lea r10, ptr [r18+rax*2+0x1c] +XDIS f072: MISC BASE D51C8D54431D lea r10, ptr [r19+rax*2+0x1d] +XDIS f078: MISC BASE D51C8D54441E lea r10, ptr [r20+rax*2+0x1e] +XDIS f07e: MISC BASE D51C8D54451F lea r10, ptr [r21+rax*2+0x1f] +XDIS f084: MISC BASE D51C8D544620 lea r10, ptr [r22+rax*2+0x20] +XDIS f08a: MISC BASE D51C8D544721 lea r10, ptr [r23+rax*2+0x21] +XDIS f090: MISC BASE D51D8D544022 lea r10, ptr [r24+rax*2+0x22] +XDIS f096: MISC BASE D51D8D544123 lea r10, ptr [r25+rax*2+0x23] +XDIS f09c: MISC BASE D51D8D544224 lea r10, ptr [r26+rax*2+0x24] +XDIS f0a2: MISC BASE D51D8D544325 lea r10, ptr [r27+rax*2+0x25] +XDIS f0a8: MISC BASE D51D8D544426 lea r10, ptr [r28+rax*2+0x26] +XDIS f0ae: MISC BASE D51D8D544527 lea r10, ptr [r29+rax*2+0x27] +XDIS f0b4: MISC BASE D51D8D544628 lea r10, ptr [r30+rax*2+0x28] +XDIS f0ba: MISC BASE D51D8D544729 lea r10, ptr [r31+rax*2+0x29] +XDIS f0c0: MISC BASE D50C8D54480B lea r10, ptr [rax+rcx*2+0xb] +XDIS f0c6: MISC BASE D50C8D54490C lea r10, ptr [rcx+rcx*2+0xc] +XDIS f0cc: MISC BASE D50C8D544A0D lea r10, ptr [rdx+rcx*2+0xd] +XDIS f0d2: MISC BASE D50C8D544B0E lea r10, ptr [rbx+rcx*2+0xe] +XDIS f0d8: MISC BASE D50C8D544C0F lea r10, ptr [rsp+rcx*2+0xf] +XDIS f0de: MISC BASE D50C8D544D10 lea r10, ptr [rbp+rcx*2+0x10] +XDIS f0e4: MISC BASE D50C8D544E11 lea r10, ptr [rsi+rcx*2+0x11] +XDIS f0ea: MISC BASE D50C8D544F12 lea r10, ptr [rdi+rcx*2+0x12] +XDIS f0f0: MISC BASE D50D8D544813 lea r10, ptr [r8+rcx*2+0x13] +XDIS f0f6: MISC BASE D50D8D544914 lea r10, ptr [r9+rcx*2+0x14] +XDIS f0fc: MISC BASE D50D8D544A15 lea r10, ptr [r10+rcx*2+0x15] +XDIS f102: MISC BASE D50D8D544B16 lea r10, ptr [r11+rcx*2+0x16] +XDIS f108: MISC BASE D50D8D544C17 lea r10, ptr [r12+rcx*2+0x17] +XDIS f10e: MISC BASE D50D8D544D18 lea r10, ptr [r13+rcx*2+0x18] +XDIS f114: MISC BASE D50D8D544E19 lea r10, ptr [r14+rcx*2+0x19] +XDIS f11a: MISC BASE D50D8D544F1A lea r10, ptr [r15+rcx*2+0x1a] +XDIS f120: MISC BASE D51C8D54481B lea r10, ptr [r16+rcx*2+0x1b] +XDIS f126: MISC BASE D51C8D54491C lea r10, ptr [r17+rcx*2+0x1c] +XDIS f12c: MISC BASE D51C8D544A1D lea r10, ptr [r18+rcx*2+0x1d] +XDIS f132: MISC BASE D51C8D544B1E lea r10, ptr [r19+rcx*2+0x1e] +XDIS f138: MISC BASE D51C8D544C1F lea r10, ptr [r20+rcx*2+0x1f] +XDIS f13e: MISC BASE D51C8D544D20 lea r10, ptr [r21+rcx*2+0x20] +XDIS f144: MISC BASE D51C8D544E21 lea r10, ptr [r22+rcx*2+0x21] +XDIS f14a: MISC BASE D51C8D544F22 lea r10, ptr [r23+rcx*2+0x22] +XDIS f150: MISC BASE D51D8D544823 lea r10, ptr [r24+rcx*2+0x23] +XDIS f156: MISC BASE D51D8D544924 lea r10, ptr [r25+rcx*2+0x24] +XDIS f15c: MISC BASE D51D8D544A25 lea r10, ptr [r26+rcx*2+0x25] +XDIS f162: MISC BASE D51D8D544B26 lea r10, ptr [r27+rcx*2+0x26] +XDIS f168: MISC BASE D51D8D544C27 lea r10, ptr [r28+rcx*2+0x27] +XDIS f16e: MISC BASE D51D8D544D28 lea r10, ptr [r29+rcx*2+0x28] +XDIS f174: MISC BASE D51D8D544E29 lea r10, ptr [r30+rcx*2+0x29] +XDIS f17a: MISC BASE D51D8D544F2A lea r10, ptr [r31+rcx*2+0x2a] +XDIS f180: MISC BASE D50C8D54500C lea r10, ptr [rax+rdx*2+0xc] +XDIS f186: MISC BASE D50C8D54510D lea r10, ptr [rcx+rdx*2+0xd] +XDIS f18c: MISC BASE D50C8D54520E lea r10, ptr [rdx+rdx*2+0xe] +XDIS f192: MISC BASE D50C8D54530F lea r10, ptr [rbx+rdx*2+0xf] +XDIS f198: MISC BASE D50C8D545410 lea r10, ptr [rsp+rdx*2+0x10] +XDIS f19e: MISC BASE D50C8D545511 lea r10, ptr [rbp+rdx*2+0x11] +XDIS f1a4: MISC BASE D50C8D545612 lea r10, ptr [rsi+rdx*2+0x12] +XDIS f1aa: MISC BASE D50C8D545713 lea r10, ptr [rdi+rdx*2+0x13] +XDIS f1b0: MISC BASE D50D8D545014 lea r10, ptr [r8+rdx*2+0x14] +XDIS f1b6: MISC BASE D50D8D545115 lea r10, ptr [r9+rdx*2+0x15] +XDIS f1bc: MISC BASE D50D8D545216 lea r10, ptr [r10+rdx*2+0x16] +XDIS f1c2: MISC BASE D50D8D545317 lea r10, ptr [r11+rdx*2+0x17] +XDIS f1c8: MISC BASE D50D8D545418 lea r10, ptr [r12+rdx*2+0x18] +XDIS f1ce: MISC BASE D50D8D545519 lea r10, ptr [r13+rdx*2+0x19] +XDIS f1d4: MISC BASE D50D8D54561A lea r10, ptr [r14+rdx*2+0x1a] +XDIS f1da: MISC BASE D50D8D54571B lea r10, ptr [r15+rdx*2+0x1b] +XDIS f1e0: MISC BASE D51C8D54501C lea r10, ptr [r16+rdx*2+0x1c] +XDIS f1e6: MISC BASE D51C8D54511D lea r10, ptr [r17+rdx*2+0x1d] +XDIS f1ec: MISC BASE D51C8D54521E lea r10, ptr [r18+rdx*2+0x1e] +XDIS f1f2: MISC BASE D51C8D54531F lea r10, ptr [r19+rdx*2+0x1f] +XDIS f1f8: MISC BASE D51C8D545420 lea r10, ptr [r20+rdx*2+0x20] +XDIS f1fe: MISC BASE D51C8D545521 lea r10, ptr [r21+rdx*2+0x21] +XDIS f204: MISC BASE D51C8D545622 lea r10, ptr [r22+rdx*2+0x22] +XDIS f20a: MISC BASE D51C8D545723 lea r10, ptr [r23+rdx*2+0x23] +XDIS f210: MISC BASE D51D8D545024 lea r10, ptr [r24+rdx*2+0x24] +XDIS f216: MISC BASE D51D8D545125 lea r10, ptr [r25+rdx*2+0x25] +XDIS f21c: MISC BASE D51D8D545226 lea r10, ptr [r26+rdx*2+0x26] +XDIS f222: MISC BASE D51D8D545327 lea r10, ptr [r27+rdx*2+0x27] +XDIS f228: MISC BASE D51D8D545428 lea r10, ptr [r28+rdx*2+0x28] +XDIS f22e: MISC BASE D51D8D545529 lea r10, ptr [r29+rdx*2+0x29] +XDIS f234: MISC BASE D51D8D54562A lea r10, ptr [r30+rdx*2+0x2a] +XDIS f23a: MISC BASE D51D8D54572B lea r10, ptr [r31+rdx*2+0x2b] +XDIS f240: MISC BASE D50C8D54580D lea r10, ptr [rax+rbx*2+0xd] +XDIS f246: MISC BASE D50C8D54590E lea r10, ptr [rcx+rbx*2+0xe] +XDIS f24c: MISC BASE D50C8D545A0F lea r10, ptr [rdx+rbx*2+0xf] +XDIS f252: MISC BASE D50C8D545B10 lea r10, ptr [rbx+rbx*2+0x10] +XDIS f258: MISC BASE D50C8D545C11 lea r10, ptr [rsp+rbx*2+0x11] +XDIS f25e: MISC BASE D50C8D545D12 lea r10, ptr [rbp+rbx*2+0x12] +XDIS f264: MISC BASE D50C8D545E13 lea r10, ptr [rsi+rbx*2+0x13] +XDIS f26a: MISC BASE D50C8D545F14 lea r10, ptr [rdi+rbx*2+0x14] +XDIS f270: MISC BASE D50D8D545815 lea r10, ptr [r8+rbx*2+0x15] +XDIS f276: MISC BASE D50D8D545916 lea r10, ptr [r9+rbx*2+0x16] +XDIS f27c: MISC BASE D50D8D545A17 lea r10, ptr [r10+rbx*2+0x17] +XDIS f282: MISC BASE D50D8D545B18 lea r10, ptr [r11+rbx*2+0x18] +XDIS f288: MISC BASE D50D8D545C19 lea r10, ptr [r12+rbx*2+0x19] +XDIS f28e: MISC BASE D50D8D545D1A lea r10, ptr [r13+rbx*2+0x1a] +XDIS f294: MISC BASE D50D8D545E1B lea r10, ptr [r14+rbx*2+0x1b] +XDIS f29a: MISC BASE D50D8D545F1C lea r10, ptr [r15+rbx*2+0x1c] +XDIS f2a0: MISC BASE D51C8D54581D lea r10, ptr [r16+rbx*2+0x1d] +XDIS f2a6: MISC BASE D51C8D54591E lea r10, ptr [r17+rbx*2+0x1e] +XDIS f2ac: MISC BASE D51C8D545A1F lea r10, ptr [r18+rbx*2+0x1f] +XDIS f2b2: MISC BASE D51C8D545B20 lea r10, ptr [r19+rbx*2+0x20] +XDIS f2b8: MISC BASE D51C8D545C21 lea r10, ptr [r20+rbx*2+0x21] +XDIS f2be: MISC BASE D51C8D545D22 lea r10, ptr [r21+rbx*2+0x22] +XDIS f2c4: MISC BASE D51C8D545E23 lea r10, ptr [r22+rbx*2+0x23] +XDIS f2ca: MISC BASE D51C8D545F24 lea r10, ptr [r23+rbx*2+0x24] +XDIS f2d0: MISC BASE D51D8D545825 lea r10, ptr [r24+rbx*2+0x25] +XDIS f2d6: MISC BASE D51D8D545926 lea r10, ptr [r25+rbx*2+0x26] +XDIS f2dc: MISC BASE D51D8D545A27 lea r10, ptr [r26+rbx*2+0x27] +XDIS f2e2: MISC BASE D51D8D545B28 lea r10, ptr [r27+rbx*2+0x28] +XDIS f2e8: MISC BASE D51D8D545C29 lea r10, ptr [r28+rbx*2+0x29] +XDIS f2ee: MISC BASE D51D8D545D2A lea r10, ptr [r29+rbx*2+0x2a] +XDIS f2f4: MISC BASE D51D8D545E2B lea r10, ptr [r30+rbx*2+0x2b] +XDIS f2fa: MISC BASE D51D8D545F2C lea r10, ptr [r31+rbx*2+0x2c] +XDIS f300: MISC BASE D50C8D54600E lea r10, ptr [rax+0xe] +XDIS f306: MISC BASE D50C8D54610F lea r10, ptr [rcx+0xf] +XDIS f30c: MISC BASE D50C8D546210 lea r10, ptr [rdx+0x10] +XDIS f312: MISC BASE D50C8D546311 lea r10, ptr [rbx+0x11] +XDIS f318: MISC BASE D50C8D546412 lea r10, ptr [rsp+0x12] +XDIS f31e: MISC BASE D50C8D546513 lea r10, ptr [rbp+0x13] +XDIS f324: MISC BASE D50C8D546614 lea r10, ptr [rsi+0x14] +XDIS f32a: MISC BASE D50C8D546715 lea r10, ptr [rdi+0x15] +XDIS f330: MISC BASE D50D8D546016 lea r10, ptr [r8+0x16] +XDIS f336: MISC BASE D50D8D546117 lea r10, ptr [r9+0x17] +XDIS f33c: MISC BASE D50D8D546218 lea r10, ptr [r10+0x18] +XDIS f342: MISC BASE D50D8D546319 lea r10, ptr [r11+0x19] +XDIS f348: MISC BASE D50D8D54641A lea r10, ptr [r12+0x1a] +XDIS f34e: MISC BASE D50D8D54651B lea r10, ptr [r13+0x1b] +XDIS f354: MISC BASE D50D8D54661C lea r10, ptr [r14+0x1c] +XDIS f35a: MISC BASE D50D8D54671D lea r10, ptr [r15+0x1d] +XDIS f360: MISC BASE D51C8D54601E lea r10, ptr [r16+0x1e] +XDIS f366: MISC BASE D51C8D54611F lea r10, ptr [r17+0x1f] +XDIS f36c: MISC BASE D51C8D546220 lea r10, ptr [r18+0x20] +XDIS f372: MISC BASE D51C8D546321 lea r10, ptr [r19+0x21] +XDIS f378: MISC BASE D51C8D546422 lea r10, ptr [r20+0x22] +XDIS f37e: MISC BASE D51C8D546523 lea r10, ptr [r21+0x23] +XDIS f384: MISC BASE D51C8D546624 lea r10, ptr [r22+0x24] +XDIS f38a: MISC BASE D51C8D546725 lea r10, ptr [r23+0x25] +XDIS f390: MISC BASE D51D8D546026 lea r10, ptr [r24+0x26] +XDIS f396: MISC BASE D51D8D546127 lea r10, ptr [r25+0x27] +XDIS f39c: MISC BASE D51D8D546228 lea r10, ptr [r26+0x28] +XDIS f3a2: MISC BASE D51D8D546329 lea r10, ptr [r27+0x29] +XDIS f3a8: MISC BASE D51D8D54642A lea r10, ptr [r28+0x2a] +XDIS f3ae: MISC BASE D51D8D54652B lea r10, ptr [r29+0x2b] +XDIS f3b4: MISC BASE D51D8D54662C lea r10, ptr [r30+0x2c] +XDIS f3ba: MISC BASE D51D8D54672D lea r10, ptr [r31+0x2d] +XDIS f3c0: MISC BASE D50C8D54680F lea r10, ptr [rax+rbp*2+0xf] +XDIS f3c6: MISC BASE D50C8D546910 lea r10, ptr [rcx+rbp*2+0x10] +XDIS f3cc: MISC BASE D50C8D546A11 lea r10, ptr [rdx+rbp*2+0x11] +XDIS f3d2: MISC BASE D50C8D546B12 lea r10, ptr [rbx+rbp*2+0x12] +XDIS f3d8: MISC BASE D50C8D546C13 lea r10, ptr [rsp+rbp*2+0x13] +XDIS f3de: MISC BASE D50C8D546D14 lea r10, ptr [rbp+rbp*2+0x14] +XDIS f3e4: MISC BASE D50C8D546E15 lea r10, ptr [rsi+rbp*2+0x15] +XDIS f3ea: MISC BASE D50C8D546F16 lea r10, ptr [rdi+rbp*2+0x16] +XDIS f3f0: MISC BASE D50D8D546817 lea r10, ptr [r8+rbp*2+0x17] +XDIS f3f6: MISC BASE D50D8D546918 lea r10, ptr [r9+rbp*2+0x18] +XDIS f3fc: MISC BASE D50D8D546A19 lea r10, ptr [r10+rbp*2+0x19] +XDIS f402: MISC BASE D50D8D546B1A lea r10, ptr [r11+rbp*2+0x1a] +XDIS f408: MISC BASE D50D8D546C1B lea r10, ptr [r12+rbp*2+0x1b] +XDIS f40e: MISC BASE D50D8D546D1C lea r10, ptr [r13+rbp*2+0x1c] +XDIS f414: MISC BASE D50D8D546E1D lea r10, ptr [r14+rbp*2+0x1d] +XDIS f41a: MISC BASE D50D8D546F1E lea r10, ptr [r15+rbp*2+0x1e] +XDIS f420: MISC BASE D51C8D54681F lea r10, ptr [r16+rbp*2+0x1f] +XDIS f426: MISC BASE D51C8D546920 lea r10, ptr [r17+rbp*2+0x20] +XDIS f42c: MISC BASE D51C8D546A21 lea r10, ptr [r18+rbp*2+0x21] +XDIS f432: MISC BASE D51C8D546B22 lea r10, ptr [r19+rbp*2+0x22] +XDIS f438: MISC BASE D51C8D546C23 lea r10, ptr [r20+rbp*2+0x23] +XDIS f43e: MISC BASE D51C8D546D24 lea r10, ptr [r21+rbp*2+0x24] +XDIS f444: MISC BASE D51C8D546E25 lea r10, ptr [r22+rbp*2+0x25] +XDIS f44a: MISC BASE D51C8D546F26 lea r10, ptr [r23+rbp*2+0x26] +XDIS f450: MISC BASE D51D8D546827 lea r10, ptr [r24+rbp*2+0x27] +XDIS f456: MISC BASE D51D8D546928 lea r10, ptr [r25+rbp*2+0x28] +XDIS f45c: MISC BASE D51D8D546A29 lea r10, ptr [r26+rbp*2+0x29] +XDIS f462: MISC BASE D51D8D546B2A lea r10, ptr [r27+rbp*2+0x2a] +XDIS f468: MISC BASE D51D8D546C2B lea r10, ptr [r28+rbp*2+0x2b] +XDIS f46e: MISC BASE D51D8D546D2C lea r10, ptr [r29+rbp*2+0x2c] +XDIS f474: MISC BASE D51D8D546E2D lea r10, ptr [r30+rbp*2+0x2d] +XDIS f47a: MISC BASE D51D8D546F2E lea r10, ptr [r31+rbp*2+0x2e] +XDIS f480: MISC BASE D50C8D547010 lea r10, ptr [rax+rsi*2+0x10] +XDIS f486: MISC BASE D50C8D547111 lea r10, ptr [rcx+rsi*2+0x11] +XDIS f48c: MISC BASE D50C8D547212 lea r10, ptr [rdx+rsi*2+0x12] +XDIS f492: MISC BASE D50C8D547313 lea r10, ptr [rbx+rsi*2+0x13] +XDIS f498: MISC BASE D50C8D547414 lea r10, ptr [rsp+rsi*2+0x14] +XDIS f49e: MISC BASE D50C8D547515 lea r10, ptr [rbp+rsi*2+0x15] +XDIS f4a4: MISC BASE D50C8D547616 lea r10, ptr [rsi+rsi*2+0x16] +XDIS f4aa: MISC BASE D50C8D547717 lea r10, ptr [rdi+rsi*2+0x17] +XDIS f4b0: MISC BASE D50D8D547018 lea r10, ptr [r8+rsi*2+0x18] +XDIS f4b6: MISC BASE D50D8D547119 lea r10, ptr [r9+rsi*2+0x19] +XDIS f4bc: MISC BASE D50D8D54721A lea r10, ptr [r10+rsi*2+0x1a] +XDIS f4c2: MISC BASE D50D8D54731B lea r10, ptr [r11+rsi*2+0x1b] +XDIS f4c8: MISC BASE D50D8D54741C lea r10, ptr [r12+rsi*2+0x1c] +XDIS f4ce: MISC BASE D50D8D54751D lea r10, ptr [r13+rsi*2+0x1d] +XDIS f4d4: MISC BASE D50D8D54761E lea r10, ptr [r14+rsi*2+0x1e] +XDIS f4da: MISC BASE D50D8D54771F lea r10, ptr [r15+rsi*2+0x1f] +XDIS f4e0: MISC BASE D51C8D547020 lea r10, ptr [r16+rsi*2+0x20] +XDIS f4e6: MISC BASE D51C8D547121 lea r10, ptr [r17+rsi*2+0x21] +XDIS f4ec: MISC BASE D51C8D547222 lea r10, ptr [r18+rsi*2+0x22] +XDIS f4f2: MISC BASE D51C8D547323 lea r10, ptr [r19+rsi*2+0x23] +XDIS f4f8: MISC BASE D51C8D547424 lea r10, ptr [r20+rsi*2+0x24] +XDIS f4fe: MISC BASE D51C8D547525 lea r10, ptr [r21+rsi*2+0x25] +XDIS f504: MISC BASE D51C8D547626 lea r10, ptr [r22+rsi*2+0x26] +XDIS f50a: MISC BASE D51C8D547727 lea r10, ptr [r23+rsi*2+0x27] +XDIS f510: MISC BASE D51D8D547028 lea r10, ptr [r24+rsi*2+0x28] +XDIS f516: MISC BASE D51D8D547129 lea r10, ptr [r25+rsi*2+0x29] +XDIS f51c: MISC BASE D51D8D54722A lea r10, ptr [r26+rsi*2+0x2a] +XDIS f522: MISC BASE D51D8D54732B lea r10, ptr [r27+rsi*2+0x2b] +XDIS f528: MISC BASE D51D8D54742C lea r10, ptr [r28+rsi*2+0x2c] +XDIS f52e: MISC BASE D51D8D54752D lea r10, ptr [r29+rsi*2+0x2d] +XDIS f534: MISC BASE D51D8D54762E lea r10, ptr [r30+rsi*2+0x2e] +XDIS f53a: MISC BASE D51D8D54772F lea r10, ptr [r31+rsi*2+0x2f] +XDIS f540: MISC BASE D50C8D547811 lea r10, ptr [rax+rdi*2+0x11] +XDIS f546: MISC BASE D50C8D547912 lea r10, ptr [rcx+rdi*2+0x12] +XDIS f54c: MISC BASE D50C8D547A13 lea r10, ptr [rdx+rdi*2+0x13] +XDIS f552: MISC BASE D50C8D547B14 lea r10, ptr [rbx+rdi*2+0x14] +XDIS f558: MISC BASE D50C8D547C15 lea r10, ptr [rsp+rdi*2+0x15] +XDIS f55e: MISC BASE D50C8D547D16 lea r10, ptr [rbp+rdi*2+0x16] +XDIS f564: MISC BASE D50C8D547E17 lea r10, ptr [rsi+rdi*2+0x17] +XDIS f56a: MISC BASE D50C8D547F18 lea r10, ptr [rdi+rdi*2+0x18] +XDIS f570: MISC BASE D50D8D547819 lea r10, ptr [r8+rdi*2+0x19] +XDIS f576: MISC BASE D50D8D54791A lea r10, ptr [r9+rdi*2+0x1a] +XDIS f57c: MISC BASE D50D8D547A1B lea r10, ptr [r10+rdi*2+0x1b] +XDIS f582: MISC BASE D50D8D547B1C lea r10, ptr [r11+rdi*2+0x1c] +XDIS f588: MISC BASE D50D8D547C1D lea r10, ptr [r12+rdi*2+0x1d] +XDIS f58e: MISC BASE D50D8D547D1E lea r10, ptr [r13+rdi*2+0x1e] +XDIS f594: MISC BASE D50D8D547E1F lea r10, ptr [r14+rdi*2+0x1f] +XDIS f59a: MISC BASE D50D8D547F20 lea r10, ptr [r15+rdi*2+0x20] +XDIS f5a0: MISC BASE D51C8D547821 lea r10, ptr [r16+rdi*2+0x21] +XDIS f5a6: MISC BASE D51C8D547922 lea r10, ptr [r17+rdi*2+0x22] +XDIS f5ac: MISC BASE D51C8D547A23 lea r10, ptr [r18+rdi*2+0x23] +XDIS f5b2: MISC BASE D51C8D547B24 lea r10, ptr [r19+rdi*2+0x24] +XDIS f5b8: MISC BASE D51C8D547C25 lea r10, ptr [r20+rdi*2+0x25] +XDIS f5be: MISC BASE D51C8D547D26 lea r10, ptr [r21+rdi*2+0x26] +XDIS f5c4: MISC BASE D51C8D547E27 lea r10, ptr [r22+rdi*2+0x27] +XDIS f5ca: MISC BASE D51C8D547F28 lea r10, ptr [r23+rdi*2+0x28] +XDIS f5d0: MISC BASE D51D8D547829 lea r10, ptr [r24+rdi*2+0x29] +XDIS f5d6: MISC BASE D51D8D54792A lea r10, ptr [r25+rdi*2+0x2a] +XDIS f5dc: MISC BASE D51D8D547A2B lea r10, ptr [r26+rdi*2+0x2b] +XDIS f5e2: MISC BASE D51D8D547B2C lea r10, ptr [r27+rdi*2+0x2c] +XDIS f5e8: MISC BASE D51D8D547C2D lea r10, ptr [r28+rdi*2+0x2d] +XDIS f5ee: MISC BASE D51D8D547D2E lea r10, ptr [r29+rdi*2+0x2e] +XDIS f5f4: MISC BASE D51D8D547E2F lea r10, ptr [r30+rdi*2+0x2f] +XDIS f5fa: MISC BASE D51D8D547F30 lea r10, ptr [r31+rdi*2+0x30] +XDIS f600: MISC BASE D50E8D544012 lea r10, ptr [rax+r8*2+0x12] +XDIS f606: MISC BASE D50E8D544113 lea r10, ptr [rcx+r8*2+0x13] +XDIS f60c: MISC BASE D50E8D544214 lea r10, ptr [rdx+r8*2+0x14] +XDIS f612: MISC BASE D50E8D544315 lea r10, ptr [rbx+r8*2+0x15] +XDIS f618: MISC BASE D50E8D544416 lea r10, ptr [rsp+r8*2+0x16] +XDIS f61e: MISC BASE D50E8D544517 lea r10, ptr [rbp+r8*2+0x17] +XDIS f624: MISC BASE D50E8D544618 lea r10, ptr [rsi+r8*2+0x18] +XDIS f62a: MISC BASE D50E8D544719 lea r10, ptr [rdi+r8*2+0x19] +XDIS f630: MISC BASE D50F8D54401A lea r10, ptr [r8+r8*2+0x1a] +XDIS f636: MISC BASE D50F8D54411B lea r10, ptr [r9+r8*2+0x1b] +XDIS f63c: MISC BASE D50F8D54421C lea r10, ptr [r10+r8*2+0x1c] +XDIS f642: MISC BASE D50F8D54431D lea r10, ptr [r11+r8*2+0x1d] +XDIS f648: MISC BASE D50F8D54441E lea r10, ptr [r12+r8*2+0x1e] +XDIS f64e: MISC BASE D50F8D54451F lea r10, ptr [r13+r8*2+0x1f] +XDIS f654: MISC BASE D50F8D544620 lea r10, ptr [r14+r8*2+0x20] +XDIS f65a: MISC BASE D50F8D544721 lea r10, ptr [r15+r8*2+0x21] +XDIS f660: MISC BASE D51E8D544022 lea r10, ptr [r16+r8*2+0x22] +XDIS f666: MISC BASE D51E8D544123 lea r10, ptr [r17+r8*2+0x23] +XDIS f66c: MISC BASE D51E8D544224 lea r10, ptr [r18+r8*2+0x24] +XDIS f672: MISC BASE D51E8D544325 lea r10, ptr [r19+r8*2+0x25] +XDIS f678: MISC BASE D51E8D544426 lea r10, ptr [r20+r8*2+0x26] +XDIS f67e: MISC BASE D51E8D544527 lea r10, ptr [r21+r8*2+0x27] +XDIS f684: MISC BASE D51E8D544628 lea r10, ptr [r22+r8*2+0x28] +XDIS f68a: MISC BASE D51E8D544729 lea r10, ptr [r23+r8*2+0x29] +XDIS f690: MISC BASE D51F8D54402A lea r10, ptr [r24+r8*2+0x2a] +XDIS f696: MISC BASE D51F8D54412B lea r10, ptr [r25+r8*2+0x2b] +XDIS f69c: MISC BASE D51F8D54422C lea r10, ptr [r26+r8*2+0x2c] +XDIS f6a2: MISC BASE D51F8D54432D lea r10, ptr [r27+r8*2+0x2d] +XDIS f6a8: MISC BASE D51F8D54442E lea r10, ptr [r28+r8*2+0x2e] +XDIS f6ae: MISC BASE D51F8D54452F lea r10, ptr [r29+r8*2+0x2f] +XDIS f6b4: MISC BASE D51F8D544630 lea r10, ptr [r30+r8*2+0x30] +XDIS f6ba: MISC BASE D51F8D544731 lea r10, ptr [r31+r8*2+0x31] +XDIS f6c0: MISC BASE D50E8D544813 lea r10, ptr [rax+r9*2+0x13] +XDIS f6c6: MISC BASE D50E8D544914 lea r10, ptr [rcx+r9*2+0x14] +XDIS f6cc: MISC BASE D50E8D544A15 lea r10, ptr [rdx+r9*2+0x15] +XDIS f6d2: MISC BASE D50E8D544B16 lea r10, ptr [rbx+r9*2+0x16] +XDIS f6d8: MISC BASE D50E8D544C17 lea r10, ptr [rsp+r9*2+0x17] +XDIS f6de: MISC BASE D50E8D544D18 lea r10, ptr [rbp+r9*2+0x18] +XDIS f6e4: MISC BASE D50E8D544E19 lea r10, ptr [rsi+r9*2+0x19] +XDIS f6ea: MISC BASE D50E8D544F1A lea r10, ptr [rdi+r9*2+0x1a] +XDIS f6f0: MISC BASE D50F8D54481B lea r10, ptr [r8+r9*2+0x1b] +XDIS f6f6: MISC BASE D50F8D54491C lea r10, ptr [r9+r9*2+0x1c] +XDIS f6fc: MISC BASE D50F8D544A1D lea r10, ptr [r10+r9*2+0x1d] +XDIS f702: MISC BASE D50F8D544B1E lea r10, ptr [r11+r9*2+0x1e] +XDIS f708: MISC BASE D50F8D544C1F lea r10, ptr [r12+r9*2+0x1f] +XDIS f70e: MISC BASE D50F8D544D20 lea r10, ptr [r13+r9*2+0x20] +XDIS f714: MISC BASE D50F8D544E21 lea r10, ptr [r14+r9*2+0x21] +XDIS f71a: MISC BASE D50F8D544F22 lea r10, ptr [r15+r9*2+0x22] +XDIS f720: MISC BASE D51E8D544823 lea r10, ptr [r16+r9*2+0x23] +XDIS f726: MISC BASE D51E8D544924 lea r10, ptr [r17+r9*2+0x24] +XDIS f72c: MISC BASE D51E8D544A25 lea r10, ptr [r18+r9*2+0x25] +XDIS f732: MISC BASE D51E8D544B26 lea r10, ptr [r19+r9*2+0x26] +XDIS f738: MISC BASE D51E8D544C27 lea r10, ptr [r20+r9*2+0x27] +XDIS f73e: MISC BASE D51E8D544D28 lea r10, ptr [r21+r9*2+0x28] +XDIS f744: MISC BASE D51E8D544E29 lea r10, ptr [r22+r9*2+0x29] +XDIS f74a: MISC BASE D51E8D544F2A lea r10, ptr [r23+r9*2+0x2a] +XDIS f750: MISC BASE D51F8D54482B lea r10, ptr [r24+r9*2+0x2b] +XDIS f756: MISC BASE D51F8D54492C lea r10, ptr [r25+r9*2+0x2c] +XDIS f75c: MISC BASE D51F8D544A2D lea r10, ptr [r26+r9*2+0x2d] +XDIS f762: MISC BASE D51F8D544B2E lea r10, ptr [r27+r9*2+0x2e] +XDIS f768: MISC BASE D51F8D544C2F lea r10, ptr [r28+r9*2+0x2f] +XDIS f76e: MISC BASE D51F8D544D30 lea r10, ptr [r29+r9*2+0x30] +XDIS f774: MISC BASE D51F8D544E31 lea r10, ptr [r30+r9*2+0x31] +XDIS f77a: MISC BASE D51F8D544F32 lea r10, ptr [r31+r9*2+0x32] +XDIS f780: MISC BASE D50E8D545014 lea r10, ptr [rax+r10*2+0x14] +XDIS f786: MISC BASE D50E8D545115 lea r10, ptr [rcx+r10*2+0x15] +XDIS f78c: MISC BASE D50E8D545216 lea r10, ptr [rdx+r10*2+0x16] +XDIS f792: MISC BASE D50E8D545317 lea r10, ptr [rbx+r10*2+0x17] +XDIS f798: MISC BASE D50E8D545418 lea r10, ptr [rsp+r10*2+0x18] +XDIS f79e: MISC BASE D50E8D545519 lea r10, ptr [rbp+r10*2+0x19] +XDIS f7a4: MISC BASE D50E8D54561A lea r10, ptr [rsi+r10*2+0x1a] +XDIS f7aa: MISC BASE D50E8D54571B lea r10, ptr [rdi+r10*2+0x1b] +XDIS f7b0: MISC BASE D50F8D54501C lea r10, ptr [r8+r10*2+0x1c] +XDIS f7b6: MISC BASE D50F8D54511D lea r10, ptr [r9+r10*2+0x1d] +XDIS f7bc: MISC BASE D50F8D54521E lea r10, ptr [r10+r10*2+0x1e] +XDIS f7c2: MISC BASE D50F8D54531F lea r10, ptr [r11+r10*2+0x1f] +XDIS f7c8: MISC BASE D50F8D545420 lea r10, ptr [r12+r10*2+0x20] +XDIS f7ce: MISC BASE D50F8D545521 lea r10, ptr [r13+r10*2+0x21] +XDIS f7d4: MISC BASE D50F8D545622 lea r10, ptr [r14+r10*2+0x22] +XDIS f7da: MISC BASE D50F8D545723 lea r10, ptr [r15+r10*2+0x23] +XDIS f7e0: MISC BASE D51E8D545024 lea r10, ptr [r16+r10*2+0x24] +XDIS f7e6: MISC BASE D51E8D545125 lea r10, ptr [r17+r10*2+0x25] +XDIS f7ec: MISC BASE D51E8D545226 lea r10, ptr [r18+r10*2+0x26] +XDIS f7f2: MISC BASE D51E8D545327 lea r10, ptr [r19+r10*2+0x27] +XDIS f7f8: MISC BASE D51E8D545428 lea r10, ptr [r20+r10*2+0x28] +XDIS f7fe: MISC BASE D51E8D545529 lea r10, ptr [r21+r10*2+0x29] +XDIS f804: MISC BASE D51E8D54562A lea r10, ptr [r22+r10*2+0x2a] +XDIS f80a: MISC BASE D51E8D54572B lea r10, ptr [r23+r10*2+0x2b] +XDIS f810: MISC BASE D51F8D54502C lea r10, ptr [r24+r10*2+0x2c] +XDIS f816: MISC BASE D51F8D54512D lea r10, ptr [r25+r10*2+0x2d] +XDIS f81c: MISC BASE D51F8D54522E lea r10, ptr [r26+r10*2+0x2e] +XDIS f822: MISC BASE D51F8D54532F lea r10, ptr [r27+r10*2+0x2f] +XDIS f828: MISC BASE D51F8D545430 lea r10, ptr [r28+r10*2+0x30] +XDIS f82e: MISC BASE D51F8D545531 lea r10, ptr [r29+r10*2+0x31] +XDIS f834: MISC BASE D51F8D545632 lea r10, ptr [r30+r10*2+0x32] +XDIS f83a: MISC BASE D51F8D545733 lea r10, ptr [r31+r10*2+0x33] +XDIS f840: MISC BASE D50E8D545815 lea r10, ptr [rax+r11*2+0x15] +XDIS f846: MISC BASE D50E8D545916 lea r10, ptr [rcx+r11*2+0x16] +XDIS f84c: MISC BASE D50E8D545A17 lea r10, ptr [rdx+r11*2+0x17] +XDIS f852: MISC BASE D50E8D545B18 lea r10, ptr [rbx+r11*2+0x18] +XDIS f858: MISC BASE D50E8D545C19 lea r10, ptr [rsp+r11*2+0x19] +XDIS f85e: MISC BASE D50E8D545D1A lea r10, ptr [rbp+r11*2+0x1a] +XDIS f864: MISC BASE D50E8D545E1B lea r10, ptr [rsi+r11*2+0x1b] +XDIS f86a: MISC BASE D50E8D545F1C lea r10, ptr [rdi+r11*2+0x1c] +XDIS f870: MISC BASE D50F8D54581D lea r10, ptr [r8+r11*2+0x1d] +XDIS f876: MISC BASE D50F8D54591E lea r10, ptr [r9+r11*2+0x1e] +XDIS f87c: MISC BASE D50F8D545A1F lea r10, ptr [r10+r11*2+0x1f] +XDIS f882: MISC BASE D50F8D545B20 lea r10, ptr [r11+r11*2+0x20] +XDIS f888: MISC BASE D50F8D545C21 lea r10, ptr [r12+r11*2+0x21] +XDIS f88e: MISC BASE D50F8D545D22 lea r10, ptr [r13+r11*2+0x22] +XDIS f894: MISC BASE D50F8D545E23 lea r10, ptr [r14+r11*2+0x23] +XDIS f89a: MISC BASE D50F8D545F24 lea r10, ptr [r15+r11*2+0x24] +XDIS f8a0: MISC BASE D51E8D545825 lea r10, ptr [r16+r11*2+0x25] +XDIS f8a6: MISC BASE D51E8D545926 lea r10, ptr [r17+r11*2+0x26] +XDIS f8ac: MISC BASE D51E8D545A27 lea r10, ptr [r18+r11*2+0x27] +XDIS f8b2: MISC BASE D51E8D545B28 lea r10, ptr [r19+r11*2+0x28] +XDIS f8b8: MISC BASE D51E8D545C29 lea r10, ptr [r20+r11*2+0x29] +XDIS f8be: MISC BASE D51E8D545D2A lea r10, ptr [r21+r11*2+0x2a] +XDIS f8c4: MISC BASE D51E8D545E2B lea r10, ptr [r22+r11*2+0x2b] +XDIS f8ca: MISC BASE D51E8D545F2C lea r10, ptr [r23+r11*2+0x2c] +XDIS f8d0: MISC BASE D51F8D54582D lea r10, ptr [r24+r11*2+0x2d] +XDIS f8d6: MISC BASE D51F8D54592E lea r10, ptr [r25+r11*2+0x2e] +XDIS f8dc: MISC BASE D51F8D545A2F lea r10, ptr [r26+r11*2+0x2f] +XDIS f8e2: MISC BASE D51F8D545B30 lea r10, ptr [r27+r11*2+0x30] +XDIS f8e8: MISC BASE D51F8D545C31 lea r10, ptr [r28+r11*2+0x31] +XDIS f8ee: MISC BASE D51F8D545D32 lea r10, ptr [r29+r11*2+0x32] +XDIS f8f4: MISC BASE D51F8D545E33 lea r10, ptr [r30+r11*2+0x33] +XDIS f8fa: MISC BASE D51F8D545F34 lea r10, ptr [r31+r11*2+0x34] +XDIS f900: MISC BASE D50E8D546016 lea r10, ptr [rax+r12*2+0x16] +XDIS f906: MISC BASE D50E8D546117 lea r10, ptr [rcx+r12*2+0x17] +XDIS f90c: MISC BASE D50E8D546218 lea r10, ptr [rdx+r12*2+0x18] +XDIS f912: MISC BASE D50E8D546319 lea r10, ptr [rbx+r12*2+0x19] +XDIS f918: MISC BASE D50E8D54641A lea r10, ptr [rsp+r12*2+0x1a] +XDIS f91e: MISC BASE D50E8D54651B lea r10, ptr [rbp+r12*2+0x1b] +XDIS f924: MISC BASE D50E8D54661C lea r10, ptr [rsi+r12*2+0x1c] +XDIS f92a: MISC BASE D50E8D54671D lea r10, ptr [rdi+r12*2+0x1d] +XDIS f930: MISC BASE D50F8D54601E lea r10, ptr [r8+r12*2+0x1e] +XDIS f936: MISC BASE D50F8D54611F lea r10, ptr [r9+r12*2+0x1f] +XDIS f93c: MISC BASE D50F8D546220 lea r10, ptr [r10+r12*2+0x20] +XDIS f942: MISC BASE D50F8D546321 lea r10, ptr [r11+r12*2+0x21] +XDIS f948: MISC BASE D50F8D546422 lea r10, ptr [r12+r12*2+0x22] +XDIS f94e: MISC BASE D50F8D546523 lea r10, ptr [r13+r12*2+0x23] +XDIS f954: MISC BASE D50F8D546624 lea r10, ptr [r14+r12*2+0x24] +XDIS f95a: MISC BASE D50F8D546725 lea r10, ptr [r15+r12*2+0x25] +XDIS f960: MISC BASE D51E8D546026 lea r10, ptr [r16+r12*2+0x26] +XDIS f966: MISC BASE D51E8D546127 lea r10, ptr [r17+r12*2+0x27] +XDIS f96c: MISC BASE D51E8D546228 lea r10, ptr [r18+r12*2+0x28] +XDIS f972: MISC BASE D51E8D546329 lea r10, ptr [r19+r12*2+0x29] +XDIS f978: MISC BASE D51E8D54642A lea r10, ptr [r20+r12*2+0x2a] +XDIS f97e: MISC BASE D51E8D54652B lea r10, ptr [r21+r12*2+0x2b] +XDIS f984: MISC BASE D51E8D54662C lea r10, ptr [r22+r12*2+0x2c] +XDIS f98a: MISC BASE D51E8D54672D lea r10, ptr [r23+r12*2+0x2d] +XDIS f990: MISC BASE D51F8D54602E lea r10, ptr [r24+r12*2+0x2e] +XDIS f996: MISC BASE D51F8D54612F lea r10, ptr [r25+r12*2+0x2f] +XDIS f99c: MISC BASE D51F8D546230 lea r10, ptr [r26+r12*2+0x30] +XDIS f9a2: MISC BASE D51F8D546331 lea r10, ptr [r27+r12*2+0x31] +XDIS f9a8: MISC BASE D51F8D546432 lea r10, ptr [r28+r12*2+0x32] +XDIS f9ae: MISC BASE D51F8D546533 lea r10, ptr [r29+r12*2+0x33] +XDIS f9b4: MISC BASE D51F8D546634 lea r10, ptr [r30+r12*2+0x34] +XDIS f9ba: MISC BASE D51F8D546735 lea r10, ptr [r31+r12*2+0x35] +XDIS f9c0: MISC BASE D50E8D546817 lea r10, ptr [rax+r13*2+0x17] +XDIS f9c6: MISC BASE D50E8D546918 lea r10, ptr [rcx+r13*2+0x18] +XDIS f9cc: MISC BASE D50E8D546A19 lea r10, ptr [rdx+r13*2+0x19] +XDIS f9d2: MISC BASE D50E8D546B1A lea r10, ptr [rbx+r13*2+0x1a] +XDIS f9d8: MISC BASE D50E8D546C1B lea r10, ptr [rsp+r13*2+0x1b] +XDIS f9de: MISC BASE D50E8D546D1C lea r10, ptr [rbp+r13*2+0x1c] +XDIS f9e4: MISC BASE D50E8D546E1D lea r10, ptr [rsi+r13*2+0x1d] +XDIS f9ea: MISC BASE D50E8D546F1E lea r10, ptr [rdi+r13*2+0x1e] +XDIS f9f0: MISC BASE D50F8D54681F lea r10, ptr [r8+r13*2+0x1f] +XDIS f9f6: MISC BASE D50F8D546920 lea r10, ptr [r9+r13*2+0x20] +XDIS f9fc: MISC BASE D50F8D546A21 lea r10, ptr [r10+r13*2+0x21] +XDIS fa02: MISC BASE D50F8D546B22 lea r10, ptr [r11+r13*2+0x22] +XDIS fa08: MISC BASE D50F8D546C23 lea r10, ptr [r12+r13*2+0x23] +XDIS fa0e: MISC BASE D50F8D546D24 lea r10, ptr [r13+r13*2+0x24] +XDIS fa14: MISC BASE D50F8D546E25 lea r10, ptr [r14+r13*2+0x25] +XDIS fa1a: MISC BASE D50F8D546F26 lea r10, ptr [r15+r13*2+0x26] +XDIS fa20: MISC BASE D51E8D546827 lea r10, ptr [r16+r13*2+0x27] +XDIS fa26: MISC BASE D51E8D546928 lea r10, ptr [r17+r13*2+0x28] +XDIS fa2c: MISC BASE D51E8D546A29 lea r10, ptr [r18+r13*2+0x29] +XDIS fa32: MISC BASE D51E8D546B2A lea r10, ptr [r19+r13*2+0x2a] +XDIS fa38: MISC BASE D51E8D546C2B lea r10, ptr [r20+r13*2+0x2b] +XDIS fa3e: MISC BASE D51E8D546D2C lea r10, ptr [r21+r13*2+0x2c] +XDIS fa44: MISC BASE D51E8D546E2D lea r10, ptr [r22+r13*2+0x2d] +XDIS fa4a: MISC BASE D51E8D546F2E lea r10, ptr [r23+r13*2+0x2e] +XDIS fa50: MISC BASE D51F8D54682F lea r10, ptr [r24+r13*2+0x2f] +XDIS fa56: MISC BASE D51F8D546930 lea r10, ptr [r25+r13*2+0x30] +XDIS fa5c: MISC BASE D51F8D546A31 lea r10, ptr [r26+r13*2+0x31] +XDIS fa62: MISC BASE D51F8D546B32 lea r10, ptr [r27+r13*2+0x32] +XDIS fa68: MISC BASE D51F8D546C33 lea r10, ptr [r28+r13*2+0x33] +XDIS fa6e: MISC BASE D51F8D546D34 lea r10, ptr [r29+r13*2+0x34] +XDIS fa74: MISC BASE D51F8D546E35 lea r10, ptr [r30+r13*2+0x35] +XDIS fa7a: MISC BASE D51F8D546F36 lea r10, ptr [r31+r13*2+0x36] +XDIS fa80: MISC BASE D50E8D547018 lea r10, ptr [rax+r14*2+0x18] +XDIS fa86: MISC BASE D50E8D547119 lea r10, ptr [rcx+r14*2+0x19] +XDIS fa8c: MISC BASE D50E8D54721A lea r10, ptr [rdx+r14*2+0x1a] +XDIS fa92: MISC BASE D50E8D54731B lea r10, ptr [rbx+r14*2+0x1b] +XDIS fa98: MISC BASE D50E8D54741C lea r10, ptr [rsp+r14*2+0x1c] +XDIS fa9e: MISC BASE D50E8D54751D lea r10, ptr [rbp+r14*2+0x1d] +XDIS faa4: MISC BASE D50E8D54761E lea r10, ptr [rsi+r14*2+0x1e] +XDIS faaa: MISC BASE D50E8D54771F lea r10, ptr [rdi+r14*2+0x1f] +XDIS fab0: MISC BASE D50F8D547020 lea r10, ptr [r8+r14*2+0x20] +XDIS fab6: MISC BASE D50F8D547121 lea r10, ptr [r9+r14*2+0x21] +XDIS fabc: MISC BASE D50F8D547222 lea r10, ptr [r10+r14*2+0x22] +XDIS fac2: MISC BASE D50F8D547323 lea r10, ptr [r11+r14*2+0x23] +XDIS fac8: MISC BASE D50F8D547424 lea r10, ptr [r12+r14*2+0x24] +XDIS face: MISC BASE D50F8D547525 lea r10, ptr [r13+r14*2+0x25] +XDIS fad4: MISC BASE D50F8D547626 lea r10, ptr [r14+r14*2+0x26] +XDIS fada: MISC BASE D50F8D547727 lea r10, ptr [r15+r14*2+0x27] +XDIS fae0: MISC BASE D51E8D547028 lea r10, ptr [r16+r14*2+0x28] +XDIS fae6: MISC BASE D51E8D547129 lea r10, ptr [r17+r14*2+0x29] +XDIS faec: MISC BASE D51E8D54722A lea r10, ptr [r18+r14*2+0x2a] +XDIS faf2: MISC BASE D51E8D54732B lea r10, ptr [r19+r14*2+0x2b] +XDIS faf8: MISC BASE D51E8D54742C lea r10, ptr [r20+r14*2+0x2c] +XDIS fafe: MISC BASE D51E8D54752D lea r10, ptr [r21+r14*2+0x2d] +XDIS fb04: MISC BASE D51E8D54762E lea r10, ptr [r22+r14*2+0x2e] +XDIS fb0a: MISC BASE D51E8D54772F lea r10, ptr [r23+r14*2+0x2f] +XDIS fb10: MISC BASE D51F8D547030 lea r10, ptr [r24+r14*2+0x30] +XDIS fb16: MISC BASE D51F8D547131 lea r10, ptr [r25+r14*2+0x31] +XDIS fb1c: MISC BASE D51F8D547232 lea r10, ptr [r26+r14*2+0x32] +XDIS fb22: MISC BASE D51F8D547333 lea r10, ptr [r27+r14*2+0x33] +XDIS fb28: MISC BASE D51F8D547434 lea r10, ptr [r28+r14*2+0x34] +XDIS fb2e: MISC BASE D51F8D547535 lea r10, ptr [r29+r14*2+0x35] +XDIS fb34: MISC BASE D51F8D547636 lea r10, ptr [r30+r14*2+0x36] +XDIS fb3a: MISC BASE D51F8D547737 lea r10, ptr [r31+r14*2+0x37] +XDIS fb40: MISC BASE D50E8D547819 lea r10, ptr [rax+r15*2+0x19] +XDIS fb46: MISC BASE D50E8D54791A lea r10, ptr [rcx+r15*2+0x1a] +XDIS fb4c: MISC BASE D50E8D547A1B lea r10, ptr [rdx+r15*2+0x1b] +XDIS fb52: MISC BASE D50E8D547B1C lea r10, ptr [rbx+r15*2+0x1c] +XDIS fb58: MISC BASE D50E8D547C1D lea r10, ptr [rsp+r15*2+0x1d] +XDIS fb5e: MISC BASE D50E8D547D1E lea r10, ptr [rbp+r15*2+0x1e] +XDIS fb64: MISC BASE D50E8D547E1F lea r10, ptr [rsi+r15*2+0x1f] +XDIS fb6a: MISC BASE D50E8D547F20 lea r10, ptr [rdi+r15*2+0x20] +XDIS fb70: MISC BASE D50F8D547821 lea r10, ptr [r8+r15*2+0x21] +XDIS fb76: MISC BASE D50F8D547922 lea r10, ptr [r9+r15*2+0x22] +XDIS fb7c: MISC BASE D50F8D547A23 lea r10, ptr [r10+r15*2+0x23] +XDIS fb82: MISC BASE D50F8D547B24 lea r10, ptr [r11+r15*2+0x24] +XDIS fb88: MISC BASE D50F8D547C25 lea r10, ptr [r12+r15*2+0x25] +XDIS fb8e: MISC BASE D50F8D547D26 lea r10, ptr [r13+r15*2+0x26] +XDIS fb94: MISC BASE D50F8D547E27 lea r10, ptr [r14+r15*2+0x27] +XDIS fb9a: MISC BASE D50F8D547F28 lea r10, ptr [r15+r15*2+0x28] +XDIS fba0: MISC BASE D51E8D547829 lea r10, ptr [r16+r15*2+0x29] +XDIS fba6: MISC BASE D51E8D54792A lea r10, ptr [r17+r15*2+0x2a] +XDIS fbac: MISC BASE D51E8D547A2B lea r10, ptr [r18+r15*2+0x2b] +XDIS fbb2: MISC BASE D51E8D547B2C lea r10, ptr [r19+r15*2+0x2c] +XDIS fbb8: MISC BASE D51E8D547C2D lea r10, ptr [r20+r15*2+0x2d] +XDIS fbbe: MISC BASE D51E8D547D2E lea r10, ptr [r21+r15*2+0x2e] +XDIS fbc4: MISC BASE D51E8D547E2F lea r10, ptr [r22+r15*2+0x2f] +XDIS fbca: MISC BASE D51E8D547F30 lea r10, ptr [r23+r15*2+0x30] +XDIS fbd0: MISC BASE D51F8D547831 lea r10, ptr [r24+r15*2+0x31] +XDIS fbd6: MISC BASE D51F8D547932 lea r10, ptr [r25+r15*2+0x32] +XDIS fbdc: MISC BASE D51F8D547A33 lea r10, ptr [r26+r15*2+0x33] +XDIS fbe2: MISC BASE D51F8D547B34 lea r10, ptr [r27+r15*2+0x34] +XDIS fbe8: MISC BASE D51F8D547C35 lea r10, ptr [r28+r15*2+0x35] +XDIS fbee: MISC BASE D51F8D547D36 lea r10, ptr [r29+r15*2+0x36] +XDIS fbf4: MISC BASE D51F8D547E37 lea r10, ptr [r30+r15*2+0x37] +XDIS fbfa: MISC BASE D51F8D547F38 lea r10, ptr [r31+r15*2+0x38] +XDIS fc00: MISC BASE D52C8D54401A lea r10, ptr [rax+r16*2+0x1a] +XDIS fc06: MISC BASE D52C8D54411B lea r10, ptr [rcx+r16*2+0x1b] +XDIS fc0c: MISC BASE D52C8D54421C lea r10, ptr [rdx+r16*2+0x1c] +XDIS fc12: MISC BASE D52C8D54431D lea r10, ptr [rbx+r16*2+0x1d] +XDIS fc18: MISC BASE D52C8D54441E lea r10, ptr [rsp+r16*2+0x1e] +XDIS fc1e: MISC BASE D52C8D54451F lea r10, ptr [rbp+r16*2+0x1f] +XDIS fc24: MISC BASE D52C8D544620 lea r10, ptr [rsi+r16*2+0x20] +XDIS fc2a: MISC BASE D52C8D544721 lea r10, ptr [rdi+r16*2+0x21] +XDIS fc30: MISC BASE D52D8D544022 lea r10, ptr [r8+r16*2+0x22] +XDIS fc36: MISC BASE D52D8D544123 lea r10, ptr [r9+r16*2+0x23] +XDIS fc3c: MISC BASE D52D8D544224 lea r10, ptr [r10+r16*2+0x24] +XDIS fc42: MISC BASE D52D8D544325 lea r10, ptr [r11+r16*2+0x25] +XDIS fc48: MISC BASE D52D8D544426 lea r10, ptr [r12+r16*2+0x26] +XDIS fc4e: MISC BASE D52D8D544527 lea r10, ptr [r13+r16*2+0x27] +XDIS fc54: MISC BASE D52D8D544628 lea r10, ptr [r14+r16*2+0x28] +XDIS fc5a: MISC BASE D52D8D544729 lea r10, ptr [r15+r16*2+0x29] +XDIS fc60: MISC BASE D53C8D54402A lea r10, ptr [r16+r16*2+0x2a] +XDIS fc66: MISC BASE D53C8D54412B lea r10, ptr [r17+r16*2+0x2b] +XDIS fc6c: MISC BASE D53C8D54422C lea r10, ptr [r18+r16*2+0x2c] +XDIS fc72: MISC BASE D53C8D54432D lea r10, ptr [r19+r16*2+0x2d] +XDIS fc78: MISC BASE D53C8D54442E lea r10, ptr [r20+r16*2+0x2e] +XDIS fc7e: MISC BASE D53C8D54452F lea r10, ptr [r21+r16*2+0x2f] +XDIS fc84: MISC BASE D53C8D544630 lea r10, ptr [r22+r16*2+0x30] +XDIS fc8a: MISC BASE D53C8D544731 lea r10, ptr [r23+r16*2+0x31] +XDIS fc90: MISC BASE D53D8D544032 lea r10, ptr [r24+r16*2+0x32] +XDIS fc96: MISC BASE D53D8D544133 lea r10, ptr [r25+r16*2+0x33] +XDIS fc9c: MISC BASE D53D8D544234 lea r10, ptr [r26+r16*2+0x34] +XDIS fca2: MISC BASE D53D8D544335 lea r10, ptr [r27+r16*2+0x35] +XDIS fca8: MISC BASE D53D8D544436 lea r10, ptr [r28+r16*2+0x36] +XDIS fcae: MISC BASE D53D8D544537 lea r10, ptr [r29+r16*2+0x37] +XDIS fcb4: MISC BASE D53D8D544638 lea r10, ptr [r30+r16*2+0x38] +XDIS fcba: MISC BASE D53D8D544739 lea r10, ptr [r31+r16*2+0x39] +XDIS fcc0: MISC BASE D52C8D54481B lea r10, ptr [rax+r17*2+0x1b] +XDIS fcc6: MISC BASE D52C8D54491C lea r10, ptr [rcx+r17*2+0x1c] +XDIS fccc: MISC BASE D52C8D544A1D lea r10, ptr [rdx+r17*2+0x1d] +XDIS fcd2: MISC BASE D52C8D544B1E lea r10, ptr [rbx+r17*2+0x1e] +XDIS fcd8: MISC BASE D52C8D544C1F lea r10, ptr [rsp+r17*2+0x1f] +XDIS fcde: MISC BASE D52C8D544D20 lea r10, ptr [rbp+r17*2+0x20] +XDIS fce4: MISC BASE D52C8D544E21 lea r10, ptr [rsi+r17*2+0x21] +XDIS fcea: MISC BASE D52C8D544F22 lea r10, ptr [rdi+r17*2+0x22] +XDIS fcf0: MISC BASE D52D8D544823 lea r10, ptr [r8+r17*2+0x23] +XDIS fcf6: MISC BASE D52D8D544924 lea r10, ptr [r9+r17*2+0x24] +XDIS fcfc: MISC BASE D52D8D544A25 lea r10, ptr [r10+r17*2+0x25] +XDIS fd02: MISC BASE D52D8D544B26 lea r10, ptr [r11+r17*2+0x26] +XDIS fd08: MISC BASE D52D8D544C27 lea r10, ptr [r12+r17*2+0x27] +XDIS fd0e: MISC BASE D52D8D544D28 lea r10, ptr [r13+r17*2+0x28] +XDIS fd14: MISC BASE D52D8D544E29 lea r10, ptr [r14+r17*2+0x29] +XDIS fd1a: MISC BASE D52D8D544F2A lea r10, ptr [r15+r17*2+0x2a] +XDIS fd20: MISC BASE D53C8D54482B lea r10, ptr [r16+r17*2+0x2b] +XDIS fd26: MISC BASE D53C8D54492C lea r10, ptr [r17+r17*2+0x2c] +XDIS fd2c: MISC BASE D53C8D544A2D lea r10, ptr [r18+r17*2+0x2d] +XDIS fd32: MISC BASE D53C8D544B2E lea r10, ptr [r19+r17*2+0x2e] +XDIS fd38: MISC BASE D53C8D544C2F lea r10, ptr [r20+r17*2+0x2f] +XDIS fd3e: MISC BASE D53C8D544D30 lea r10, ptr [r21+r17*2+0x30] +XDIS fd44: MISC BASE D53C8D544E31 lea r10, ptr [r22+r17*2+0x31] +XDIS fd4a: MISC BASE D53C8D544F32 lea r10, ptr [r23+r17*2+0x32] +XDIS fd50: MISC BASE D53D8D544833 lea r10, ptr [r24+r17*2+0x33] +XDIS fd56: MISC BASE D53D8D544934 lea r10, ptr [r25+r17*2+0x34] +XDIS fd5c: MISC BASE D53D8D544A35 lea r10, ptr [r26+r17*2+0x35] +XDIS fd62: MISC BASE D53D8D544B36 lea r10, ptr [r27+r17*2+0x36] +XDIS fd68: MISC BASE D53D8D544C37 lea r10, ptr [r28+r17*2+0x37] +XDIS fd6e: MISC BASE D53D8D544D38 lea r10, ptr [r29+r17*2+0x38] +XDIS fd74: MISC BASE D53D8D544E39 lea r10, ptr [r30+r17*2+0x39] +XDIS fd7a: MISC BASE D53D8D544F3A lea r10, ptr [r31+r17*2+0x3a] +XDIS fd80: MISC BASE D52C8D54501C lea r10, ptr [rax+r18*2+0x1c] +XDIS fd86: MISC BASE D52C8D54511D lea r10, ptr [rcx+r18*2+0x1d] +XDIS fd8c: MISC BASE D52C8D54521E lea r10, ptr [rdx+r18*2+0x1e] +XDIS fd92: MISC BASE D52C8D54531F lea r10, ptr [rbx+r18*2+0x1f] +XDIS fd98: MISC BASE D52C8D545420 lea r10, ptr [rsp+r18*2+0x20] +XDIS fd9e: MISC BASE D52C8D545521 lea r10, ptr [rbp+r18*2+0x21] +XDIS fda4: MISC BASE D52C8D545622 lea r10, ptr [rsi+r18*2+0x22] +XDIS fdaa: MISC BASE D52C8D545723 lea r10, ptr [rdi+r18*2+0x23] +XDIS fdb0: MISC BASE D52D8D545024 lea r10, ptr [r8+r18*2+0x24] +XDIS fdb6: MISC BASE D52D8D545125 lea r10, ptr [r9+r18*2+0x25] +XDIS fdbc: MISC BASE D52D8D545226 lea r10, ptr [r10+r18*2+0x26] +XDIS fdc2: MISC BASE D52D8D545327 lea r10, ptr [r11+r18*2+0x27] +XDIS fdc8: MISC BASE D52D8D545428 lea r10, ptr [r12+r18*2+0x28] +XDIS fdce: MISC BASE D52D8D545529 lea r10, ptr [r13+r18*2+0x29] +XDIS fdd4: MISC BASE D52D8D54562A lea r10, ptr [r14+r18*2+0x2a] +XDIS fdda: MISC BASE D52D8D54572B lea r10, ptr [r15+r18*2+0x2b] +XDIS fde0: MISC BASE D53C8D54502C lea r10, ptr [r16+r18*2+0x2c] +XDIS fde6: MISC BASE D53C8D54512D lea r10, ptr [r17+r18*2+0x2d] +XDIS fdec: MISC BASE D53C8D54522E lea r10, ptr [r18+r18*2+0x2e] +XDIS fdf2: MISC BASE D53C8D54532F lea r10, ptr [r19+r18*2+0x2f] +XDIS fdf8: MISC BASE D53C8D545430 lea r10, ptr [r20+r18*2+0x30] +XDIS fdfe: MISC BASE D53C8D545531 lea r10, ptr [r21+r18*2+0x31] +XDIS fe04: MISC BASE D53C8D545632 lea r10, ptr [r22+r18*2+0x32] +XDIS fe0a: MISC BASE D53C8D545733 lea r10, ptr [r23+r18*2+0x33] +XDIS fe10: MISC BASE D53D8D545034 lea r10, ptr [r24+r18*2+0x34] +XDIS fe16: MISC BASE D53D8D545135 lea r10, ptr [r25+r18*2+0x35] +XDIS fe1c: MISC BASE D53D8D545236 lea r10, ptr [r26+r18*2+0x36] +XDIS fe22: MISC BASE D53D8D545337 lea r10, ptr [r27+r18*2+0x37] +XDIS fe28: MISC BASE D53D8D545438 lea r10, ptr [r28+r18*2+0x38] +XDIS fe2e: MISC BASE D53D8D545539 lea r10, ptr [r29+r18*2+0x39] +XDIS fe34: MISC BASE D53D8D54563A lea r10, ptr [r30+r18*2+0x3a] +XDIS fe3a: MISC BASE D53D8D54573B lea r10, ptr [r31+r18*2+0x3b] +XDIS fe40: MISC BASE D52C8D54581D lea r10, ptr [rax+r19*2+0x1d] +XDIS fe46: MISC BASE D52C8D54591E lea r10, ptr [rcx+r19*2+0x1e] +XDIS fe4c: MISC BASE D52C8D545A1F lea r10, ptr [rdx+r19*2+0x1f] +XDIS fe52: MISC BASE D52C8D545B20 lea r10, ptr [rbx+r19*2+0x20] +XDIS fe58: MISC BASE D52C8D545C21 lea r10, ptr [rsp+r19*2+0x21] +XDIS fe5e: MISC BASE D52C8D545D22 lea r10, ptr [rbp+r19*2+0x22] +XDIS fe64: MISC BASE D52C8D545E23 lea r10, ptr [rsi+r19*2+0x23] +XDIS fe6a: MISC BASE D52C8D545F24 lea r10, ptr [rdi+r19*2+0x24] +XDIS fe70: MISC BASE D52D8D545825 lea r10, ptr [r8+r19*2+0x25] +XDIS fe76: MISC BASE D52D8D545926 lea r10, ptr [r9+r19*2+0x26] +XDIS fe7c: MISC BASE D52D8D545A27 lea r10, ptr [r10+r19*2+0x27] +XDIS fe82: MISC BASE D52D8D545B28 lea r10, ptr [r11+r19*2+0x28] +XDIS fe88: MISC BASE D52D8D545C29 lea r10, ptr [r12+r19*2+0x29] +XDIS fe8e: MISC BASE D52D8D545D2A lea r10, ptr [r13+r19*2+0x2a] +XDIS fe94: MISC BASE D52D8D545E2B lea r10, ptr [r14+r19*2+0x2b] +XDIS fe9a: MISC BASE D52D8D545F2C lea r10, ptr [r15+r19*2+0x2c] +XDIS fea0: MISC BASE D53C8D54582D lea r10, ptr [r16+r19*2+0x2d] +XDIS fea6: MISC BASE D53C8D54592E lea r10, ptr [r17+r19*2+0x2e] +XDIS feac: MISC BASE D53C8D545A2F lea r10, ptr [r18+r19*2+0x2f] +XDIS feb2: MISC BASE D53C8D545B30 lea r10, ptr [r19+r19*2+0x30] +XDIS feb8: MISC BASE D53C8D545C31 lea r10, ptr [r20+r19*2+0x31] +XDIS febe: MISC BASE D53C8D545D32 lea r10, ptr [r21+r19*2+0x32] +XDIS fec4: MISC BASE D53C8D545E33 lea r10, ptr [r22+r19*2+0x33] +XDIS feca: MISC BASE D53C8D545F34 lea r10, ptr [r23+r19*2+0x34] +XDIS fed0: MISC BASE D53D8D545835 lea r10, ptr [r24+r19*2+0x35] +XDIS fed6: MISC BASE D53D8D545936 lea r10, ptr [r25+r19*2+0x36] +XDIS fedc: MISC BASE D53D8D545A37 lea r10, ptr [r26+r19*2+0x37] +XDIS fee2: MISC BASE D53D8D545B38 lea r10, ptr [r27+r19*2+0x38] +XDIS fee8: MISC BASE D53D8D545C39 lea r10, ptr [r28+r19*2+0x39] +XDIS feee: MISC BASE D53D8D545D3A lea r10, ptr [r29+r19*2+0x3a] +XDIS fef4: MISC BASE D53D8D545E3B lea r10, ptr [r30+r19*2+0x3b] +XDIS fefa: MISC BASE D53D8D545F3C lea r10, ptr [r31+r19*2+0x3c] +XDIS ff00: MISC BASE D52C8D54601E lea r10, ptr [rax+r20*2+0x1e] +XDIS ff06: MISC BASE D52C8D54611F lea r10, ptr [rcx+r20*2+0x1f] +XDIS ff0c: MISC BASE D52C8D546220 lea r10, ptr [rdx+r20*2+0x20] +XDIS ff12: MISC BASE D52C8D546321 lea r10, ptr [rbx+r20*2+0x21] +XDIS ff18: MISC BASE D52C8D546422 lea r10, ptr [rsp+r20*2+0x22] +XDIS ff1e: MISC BASE D52C8D546523 lea r10, ptr [rbp+r20*2+0x23] +XDIS ff24: MISC BASE D52C8D546624 lea r10, ptr [rsi+r20*2+0x24] +XDIS ff2a: MISC BASE D52C8D546725 lea r10, ptr [rdi+r20*2+0x25] +XDIS ff30: MISC BASE D52D8D546026 lea r10, ptr [r8+r20*2+0x26] +XDIS ff36: MISC BASE D52D8D546127 lea r10, ptr [r9+r20*2+0x27] +XDIS ff3c: MISC BASE D52D8D546228 lea r10, ptr [r10+r20*2+0x28] +XDIS ff42: MISC BASE D52D8D546329 lea r10, ptr [r11+r20*2+0x29] +XDIS ff48: MISC BASE D52D8D54642A lea r10, ptr [r12+r20*2+0x2a] +XDIS ff4e: MISC BASE D52D8D54652B lea r10, ptr [r13+r20*2+0x2b] +XDIS ff54: MISC BASE D52D8D54662C lea r10, ptr [r14+r20*2+0x2c] +XDIS ff5a: MISC BASE D52D8D54672D lea r10, ptr [r15+r20*2+0x2d] +XDIS ff60: MISC BASE D53C8D54602E lea r10, ptr [r16+r20*2+0x2e] +XDIS ff66: MISC BASE D53C8D54612F lea r10, ptr [r17+r20*2+0x2f] +XDIS ff6c: MISC BASE D53C8D546230 lea r10, ptr [r18+r20*2+0x30] +XDIS ff72: MISC BASE D53C8D546331 lea r10, ptr [r19+r20*2+0x31] +XDIS ff78: MISC BASE D53C8D546432 lea r10, ptr [r20+r20*2+0x32] +XDIS ff7e: MISC BASE D53C8D546533 lea r10, ptr [r21+r20*2+0x33] +XDIS ff84: MISC BASE D53C8D546634 lea r10, ptr [r22+r20*2+0x34] +XDIS ff8a: MISC BASE D53C8D546735 lea r10, ptr [r23+r20*2+0x35] +XDIS ff90: MISC BASE D53D8D546036 lea r10, ptr [r24+r20*2+0x36] +XDIS ff96: MISC BASE D53D8D546137 lea r10, ptr [r25+r20*2+0x37] +XDIS ff9c: MISC BASE D53D8D546238 lea r10, ptr [r26+r20*2+0x38] +XDIS ffa2: MISC BASE D53D8D546339 lea r10, ptr [r27+r20*2+0x39] +XDIS ffa8: MISC BASE D53D8D54643A lea r10, ptr [r28+r20*2+0x3a] +XDIS ffae: MISC BASE D53D8D54653B lea r10, ptr [r29+r20*2+0x3b] +XDIS ffb4: MISC BASE D53D8D54663C lea r10, ptr [r30+r20*2+0x3c] +XDIS ffba: MISC BASE D53D8D54673D lea r10, ptr [r31+r20*2+0x3d] +XDIS ffc0: MISC BASE D52C8D54681F lea r10, ptr [rax+r21*2+0x1f] +XDIS ffc6: MISC BASE D52C8D546920 lea r10, ptr [rcx+r21*2+0x20] +XDIS ffcc: MISC BASE D52C8D546A21 lea r10, ptr [rdx+r21*2+0x21] +XDIS ffd2: MISC BASE D52C8D546B22 lea r10, ptr [rbx+r21*2+0x22] +XDIS ffd8: MISC BASE D52C8D546C23 lea r10, ptr [rsp+r21*2+0x23] +XDIS ffde: MISC BASE D52C8D546D24 lea r10, ptr [rbp+r21*2+0x24] +XDIS ffe4: MISC BASE D52C8D546E25 lea r10, ptr [rsi+r21*2+0x25] +XDIS ffea: MISC BASE D52C8D546F26 lea r10, ptr [rdi+r21*2+0x26] +XDIS fff0: MISC BASE D52D8D546827 lea r10, ptr [r8+r21*2+0x27] +XDIS fff6: MISC BASE D52D8D546928 lea r10, ptr [r9+r21*2+0x28] +XDIS fffc: MISC BASE D52D8D546A29 lea r10, ptr [r10+r21*2+0x29] +XDIS 10002: MISC BASE D52D8D546B2A lea r10, ptr [r11+r21*2+0x2a] +XDIS 10008: MISC BASE D52D8D546C2B lea r10, ptr [r12+r21*2+0x2b] +XDIS 1000e: MISC BASE D52D8D546D2C lea r10, ptr [r13+r21*2+0x2c] +XDIS 10014: MISC BASE D52D8D546E2D lea r10, ptr [r14+r21*2+0x2d] +XDIS 1001a: MISC BASE D52D8D546F2E lea r10, ptr [r15+r21*2+0x2e] +XDIS 10020: MISC BASE D53C8D54682F lea r10, ptr [r16+r21*2+0x2f] +XDIS 10026: MISC BASE D53C8D546930 lea r10, ptr [r17+r21*2+0x30] +XDIS 1002c: MISC BASE D53C8D546A31 lea r10, ptr [r18+r21*2+0x31] +XDIS 10032: MISC BASE D53C8D546B32 lea r10, ptr [r19+r21*2+0x32] +XDIS 10038: MISC BASE D53C8D546C33 lea r10, ptr [r20+r21*2+0x33] +XDIS 1003e: MISC BASE D53C8D546D34 lea r10, ptr [r21+r21*2+0x34] +XDIS 10044: MISC BASE D53C8D546E35 lea r10, ptr [r22+r21*2+0x35] +XDIS 1004a: MISC BASE D53C8D546F36 lea r10, ptr [r23+r21*2+0x36] +XDIS 10050: MISC BASE D53D8D546837 lea r10, ptr [r24+r21*2+0x37] +XDIS 10056: MISC BASE D53D8D546938 lea r10, ptr [r25+r21*2+0x38] +XDIS 1005c: MISC BASE D53D8D546A39 lea r10, ptr [r26+r21*2+0x39] +XDIS 10062: MISC BASE D53D8D546B3A lea r10, ptr [r27+r21*2+0x3a] +XDIS 10068: MISC BASE D53D8D546C3B lea r10, ptr [r28+r21*2+0x3b] +XDIS 1006e: MISC BASE D53D8D546D3C lea r10, ptr [r29+r21*2+0x3c] +XDIS 10074: MISC BASE D53D8D546E3D lea r10, ptr [r30+r21*2+0x3d] +XDIS 1007a: MISC BASE D53D8D546F3E lea r10, ptr [r31+r21*2+0x3e] +XDIS 10080: MISC BASE D52C8D547020 lea r10, ptr [rax+r22*2+0x20] +XDIS 10086: MISC BASE D52C8D547121 lea r10, ptr [rcx+r22*2+0x21] +XDIS 1008c: MISC BASE D52C8D547222 lea r10, ptr [rdx+r22*2+0x22] +XDIS 10092: MISC BASE D52C8D547323 lea r10, ptr [rbx+r22*2+0x23] +XDIS 10098: MISC BASE D52C8D547424 lea r10, ptr [rsp+r22*2+0x24] +XDIS 1009e: MISC BASE D52C8D547525 lea r10, ptr [rbp+r22*2+0x25] +XDIS 100a4: MISC BASE D52C8D547626 lea r10, ptr [rsi+r22*2+0x26] +XDIS 100aa: MISC BASE D52C8D547727 lea r10, ptr [rdi+r22*2+0x27] +XDIS 100b0: MISC BASE D52D8D547028 lea r10, ptr [r8+r22*2+0x28] +XDIS 100b6: MISC BASE D52D8D547129 lea r10, ptr [r9+r22*2+0x29] +XDIS 100bc: MISC BASE D52D8D54722A lea r10, ptr [r10+r22*2+0x2a] +XDIS 100c2: MISC BASE D52D8D54732B lea r10, ptr [r11+r22*2+0x2b] +XDIS 100c8: MISC BASE D52D8D54742C lea r10, ptr [r12+r22*2+0x2c] +XDIS 100ce: MISC BASE D52D8D54752D lea r10, ptr [r13+r22*2+0x2d] +XDIS 100d4: MISC BASE D52D8D54762E lea r10, ptr [r14+r22*2+0x2e] +XDIS 100da: MISC BASE D52D8D54772F lea r10, ptr [r15+r22*2+0x2f] +XDIS 100e0: MISC BASE D53C8D547030 lea r10, ptr [r16+r22*2+0x30] +XDIS 100e6: MISC BASE D53C8D547131 lea r10, ptr [r17+r22*2+0x31] +XDIS 100ec: MISC BASE D53C8D547232 lea r10, ptr [r18+r22*2+0x32] +XDIS 100f2: MISC BASE D53C8D547333 lea r10, ptr [r19+r22*2+0x33] +XDIS 100f8: MISC BASE D53C8D547434 lea r10, ptr [r20+r22*2+0x34] +XDIS 100fe: MISC BASE D53C8D547535 lea r10, ptr [r21+r22*2+0x35] +XDIS 10104: MISC BASE D53C8D547636 lea r10, ptr [r22+r22*2+0x36] +XDIS 1010a: MISC BASE D53C8D547737 lea r10, ptr [r23+r22*2+0x37] +XDIS 10110: MISC BASE D53D8D547038 lea r10, ptr [r24+r22*2+0x38] +XDIS 10116: MISC BASE D53D8D547139 lea r10, ptr [r25+r22*2+0x39] +XDIS 1011c: MISC BASE D53D8D54723A lea r10, ptr [r26+r22*2+0x3a] +XDIS 10122: MISC BASE D53D8D54733B lea r10, ptr [r27+r22*2+0x3b] +XDIS 10128: MISC BASE D53D8D54743C lea r10, ptr [r28+r22*2+0x3c] +XDIS 1012e: MISC BASE D53D8D54753D lea r10, ptr [r29+r22*2+0x3d] +XDIS 10134: MISC BASE D53D8D54763E lea r10, ptr [r30+r22*2+0x3e] +XDIS 1013a: MISC BASE D53D8D54773F lea r10, ptr [r31+r22*2+0x3f] +XDIS 10140: MISC BASE D52C8D547821 lea r10, ptr [rax+r23*2+0x21] +XDIS 10146: MISC BASE D52C8D547922 lea r10, ptr [rcx+r23*2+0x22] +XDIS 1014c: MISC BASE D52C8D547A23 lea r10, ptr [rdx+r23*2+0x23] +XDIS 10152: MISC BASE D52C8D547B24 lea r10, ptr [rbx+r23*2+0x24] +XDIS 10158: MISC BASE D52C8D547C25 lea r10, ptr [rsp+r23*2+0x25] +XDIS 1015e: MISC BASE D52C8D547D26 lea r10, ptr [rbp+r23*2+0x26] +XDIS 10164: MISC BASE D52C8D547E27 lea r10, ptr [rsi+r23*2+0x27] +XDIS 1016a: MISC BASE D52C8D547F28 lea r10, ptr [rdi+r23*2+0x28] +XDIS 10170: MISC BASE D52D8D547829 lea r10, ptr [r8+r23*2+0x29] +XDIS 10176: MISC BASE D52D8D54792A lea r10, ptr [r9+r23*2+0x2a] +XDIS 1017c: MISC BASE D52D8D547A2B lea r10, ptr [r10+r23*2+0x2b] +XDIS 10182: MISC BASE D52D8D547B2C lea r10, ptr [r11+r23*2+0x2c] +XDIS 10188: MISC BASE D52D8D547C2D lea r10, ptr [r12+r23*2+0x2d] +XDIS 1018e: MISC BASE D52D8D547D2E lea r10, ptr [r13+r23*2+0x2e] +XDIS 10194: MISC BASE D52D8D547E2F lea r10, ptr [r14+r23*2+0x2f] +XDIS 1019a: MISC BASE D52D8D547F30 lea r10, ptr [r15+r23*2+0x30] +XDIS 101a0: MISC BASE D53C8D547831 lea r10, ptr [r16+r23*2+0x31] +XDIS 101a6: MISC BASE D53C8D547932 lea r10, ptr [r17+r23*2+0x32] +XDIS 101ac: MISC BASE D53C8D547A33 lea r10, ptr [r18+r23*2+0x33] +XDIS 101b2: MISC BASE D53C8D547B34 lea r10, ptr [r19+r23*2+0x34] +XDIS 101b8: MISC BASE D53C8D547C35 lea r10, ptr [r20+r23*2+0x35] +XDIS 101be: MISC BASE D53C8D547D36 lea r10, ptr [r21+r23*2+0x36] +XDIS 101c4: MISC BASE D53C8D547E37 lea r10, ptr [r22+r23*2+0x37] +XDIS 101ca: MISC BASE D53C8D547F38 lea r10, ptr [r23+r23*2+0x38] +XDIS 101d0: MISC BASE D53D8D547839 lea r10, ptr [r24+r23*2+0x39] +XDIS 101d6: MISC BASE D53D8D54793A lea r10, ptr [r25+r23*2+0x3a] +XDIS 101dc: MISC BASE D53D8D547A3B lea r10, ptr [r26+r23*2+0x3b] +XDIS 101e2: MISC BASE D53D8D547B3C lea r10, ptr [r27+r23*2+0x3c] +XDIS 101e8: MISC BASE D53D8D547C3D lea r10, ptr [r28+r23*2+0x3d] +XDIS 101ee: MISC BASE D53D8D547D3E lea r10, ptr [r29+r23*2+0x3e] +XDIS 101f4: MISC BASE D53D8D547E3F lea r10, ptr [r30+r23*2+0x3f] +XDIS 101fa: MISC BASE D53D8D547F40 lea r10, ptr [r31+r23*2+0x40] +XDIS 10200: MISC BASE D52E8D544022 lea r10, ptr [rax+r24*2+0x22] +XDIS 10206: MISC BASE D52E8D544123 lea r10, ptr [rcx+r24*2+0x23] +XDIS 1020c: MISC BASE D52E8D544224 lea r10, ptr [rdx+r24*2+0x24] +XDIS 10212: MISC BASE D52E8D544325 lea r10, ptr [rbx+r24*2+0x25] +XDIS 10218: MISC BASE D52E8D544426 lea r10, ptr [rsp+r24*2+0x26] +XDIS 1021e: MISC BASE D52E8D544527 lea r10, ptr [rbp+r24*2+0x27] +XDIS 10224: MISC BASE D52E8D544628 lea r10, ptr [rsi+r24*2+0x28] +XDIS 1022a: MISC BASE D52E8D544729 lea r10, ptr [rdi+r24*2+0x29] +XDIS 10230: MISC BASE D52F8D54402A lea r10, ptr [r8+r24*2+0x2a] +XDIS 10236: MISC BASE D52F8D54412B lea r10, ptr [r9+r24*2+0x2b] +XDIS 1023c: MISC BASE D52F8D54422C lea r10, ptr [r10+r24*2+0x2c] +XDIS 10242: MISC BASE D52F8D54432D lea r10, ptr [r11+r24*2+0x2d] +XDIS 10248: MISC BASE D52F8D54442E lea r10, ptr [r12+r24*2+0x2e] +XDIS 1024e: MISC BASE D52F8D54452F lea r10, ptr [r13+r24*2+0x2f] +XDIS 10254: MISC BASE D52F8D544630 lea r10, ptr [r14+r24*2+0x30] +XDIS 1025a: MISC BASE D52F8D544731 lea r10, ptr [r15+r24*2+0x31] +XDIS 10260: MISC BASE D53E8D544032 lea r10, ptr [r16+r24*2+0x32] +XDIS 10266: MISC BASE D53E8D544133 lea r10, ptr [r17+r24*2+0x33] +XDIS 1026c: MISC BASE D53E8D544234 lea r10, ptr [r18+r24*2+0x34] +XDIS 10272: MISC BASE D53E8D544335 lea r10, ptr [r19+r24*2+0x35] +XDIS 10278: MISC BASE D53E8D544436 lea r10, ptr [r20+r24*2+0x36] +XDIS 1027e: MISC BASE D53E8D544537 lea r10, ptr [r21+r24*2+0x37] +XDIS 10284: MISC BASE D53E8D544638 lea r10, ptr [r22+r24*2+0x38] +XDIS 1028a: MISC BASE D53E8D544739 lea r10, ptr [r23+r24*2+0x39] +XDIS 10290: MISC BASE D53F8D54403A lea r10, ptr [r24+r24*2+0x3a] +XDIS 10296: MISC BASE D53F8D54413B lea r10, ptr [r25+r24*2+0x3b] +XDIS 1029c: MISC BASE D53F8D54423C lea r10, ptr [r26+r24*2+0x3c] +XDIS 102a2: MISC BASE D53F8D54433D lea r10, ptr [r27+r24*2+0x3d] +XDIS 102a8: MISC BASE D53F8D54443E lea r10, ptr [r28+r24*2+0x3e] +XDIS 102ae: MISC BASE D53F8D54453F lea r10, ptr [r29+r24*2+0x3f] +XDIS 102b4: MISC BASE D53F8D544640 lea r10, ptr [r30+r24*2+0x40] +XDIS 102ba: MISC BASE D53F8D544741 lea r10, ptr [r31+r24*2+0x41] +XDIS 102c0: MISC BASE D52E8D544823 lea r10, ptr [rax+r25*2+0x23] +XDIS 102c6: MISC BASE D52E8D544924 lea r10, ptr [rcx+r25*2+0x24] +XDIS 102cc: MISC BASE D52E8D544A25 lea r10, ptr [rdx+r25*2+0x25] +XDIS 102d2: MISC BASE D52E8D544B26 lea r10, ptr [rbx+r25*2+0x26] +XDIS 102d8: MISC BASE D52E8D544C27 lea r10, ptr [rsp+r25*2+0x27] +XDIS 102de: MISC BASE D52E8D544D28 lea r10, ptr [rbp+r25*2+0x28] +XDIS 102e4: MISC BASE D52E8D544E29 lea r10, ptr [rsi+r25*2+0x29] +XDIS 102ea: MISC BASE D52E8D544F2A lea r10, ptr [rdi+r25*2+0x2a] +XDIS 102f0: MISC BASE D52F8D54482B lea r10, ptr [r8+r25*2+0x2b] +XDIS 102f6: MISC BASE D52F8D54492C lea r10, ptr [r9+r25*2+0x2c] +XDIS 102fc: MISC BASE D52F8D544A2D lea r10, ptr [r10+r25*2+0x2d] +XDIS 10302: MISC BASE D52F8D544B2E lea r10, ptr [r11+r25*2+0x2e] +XDIS 10308: MISC BASE D52F8D544C2F lea r10, ptr [r12+r25*2+0x2f] +XDIS 1030e: MISC BASE D52F8D544D30 lea r10, ptr [r13+r25*2+0x30] +XDIS 10314: MISC BASE D52F8D544E31 lea r10, ptr [r14+r25*2+0x31] +XDIS 1031a: MISC BASE D52F8D544F32 lea r10, ptr [r15+r25*2+0x32] +XDIS 10320: MISC BASE D53E8D544833 lea r10, ptr [r16+r25*2+0x33] +XDIS 10326: MISC BASE D53E8D544934 lea r10, ptr [r17+r25*2+0x34] +XDIS 1032c: MISC BASE D53E8D544A35 lea r10, ptr [r18+r25*2+0x35] +XDIS 10332: MISC BASE D53E8D544B36 lea r10, ptr [r19+r25*2+0x36] +XDIS 10338: MISC BASE D53E8D544C37 lea r10, ptr [r20+r25*2+0x37] +XDIS 1033e: MISC BASE D53E8D544D38 lea r10, ptr [r21+r25*2+0x38] +XDIS 10344: MISC BASE D53E8D544E39 lea r10, ptr [r22+r25*2+0x39] +XDIS 1034a: MISC BASE D53E8D544F3A lea r10, ptr [r23+r25*2+0x3a] +XDIS 10350: MISC BASE D53F8D54483B lea r10, ptr [r24+r25*2+0x3b] +XDIS 10356: MISC BASE D53F8D54493C lea r10, ptr [r25+r25*2+0x3c] +XDIS 1035c: MISC BASE D53F8D544A3D lea r10, ptr [r26+r25*2+0x3d] +XDIS 10362: MISC BASE D53F8D544B3E lea r10, ptr [r27+r25*2+0x3e] +XDIS 10368: MISC BASE D53F8D544C3F lea r10, ptr [r28+r25*2+0x3f] +XDIS 1036e: MISC BASE D53F8D544D40 lea r10, ptr [r29+r25*2+0x40] +XDIS 10374: MISC BASE D53F8D544E41 lea r10, ptr [r30+r25*2+0x41] +XDIS 1037a: MISC BASE D53F8D544F42 lea r10, ptr [r31+r25*2+0x42] +XDIS 10380: MISC BASE D52E8D545024 lea r10, ptr [rax+r26*2+0x24] +XDIS 10386: MISC BASE D52E8D545125 lea r10, ptr [rcx+r26*2+0x25] +XDIS 1038c: MISC BASE D52E8D545226 lea r10, ptr [rdx+r26*2+0x26] +XDIS 10392: MISC BASE D52E8D545327 lea r10, ptr [rbx+r26*2+0x27] +XDIS 10398: MISC BASE D52E8D545428 lea r10, ptr [rsp+r26*2+0x28] +XDIS 1039e: MISC BASE D52E8D545529 lea r10, ptr [rbp+r26*2+0x29] +XDIS 103a4: MISC BASE D52E8D54562A lea r10, ptr [rsi+r26*2+0x2a] +XDIS 103aa: MISC BASE D52E8D54572B lea r10, ptr [rdi+r26*2+0x2b] +XDIS 103b0: MISC BASE D52F8D54502C lea r10, ptr [r8+r26*2+0x2c] +XDIS 103b6: MISC BASE D52F8D54512D lea r10, ptr [r9+r26*2+0x2d] +XDIS 103bc: MISC BASE D52F8D54522E lea r10, ptr [r10+r26*2+0x2e] +XDIS 103c2: MISC BASE D52F8D54532F lea r10, ptr [r11+r26*2+0x2f] +XDIS 103c8: MISC BASE D52F8D545430 lea r10, ptr [r12+r26*2+0x30] +XDIS 103ce: MISC BASE D52F8D545531 lea r10, ptr [r13+r26*2+0x31] +XDIS 103d4: MISC BASE D52F8D545632 lea r10, ptr [r14+r26*2+0x32] +XDIS 103da: MISC BASE D52F8D545733 lea r10, ptr [r15+r26*2+0x33] +XDIS 103e0: MISC BASE D53E8D545034 lea r10, ptr [r16+r26*2+0x34] +XDIS 103e6: MISC BASE D53E8D545135 lea r10, ptr [r17+r26*2+0x35] +XDIS 103ec: MISC BASE D53E8D545236 lea r10, ptr [r18+r26*2+0x36] +XDIS 103f2: MISC BASE D53E8D545337 lea r10, ptr [r19+r26*2+0x37] +XDIS 103f8: MISC BASE D53E8D545438 lea r10, ptr [r20+r26*2+0x38] +XDIS 103fe: MISC BASE D53E8D545539 lea r10, ptr [r21+r26*2+0x39] +XDIS 10404: MISC BASE D53E8D54563A lea r10, ptr [r22+r26*2+0x3a] +XDIS 1040a: MISC BASE D53E8D54573B lea r10, ptr [r23+r26*2+0x3b] +XDIS 10410: MISC BASE D53F8D54503C lea r10, ptr [r24+r26*2+0x3c] +XDIS 10416: MISC BASE D53F8D54513D lea r10, ptr [r25+r26*2+0x3d] +XDIS 1041c: MISC BASE D53F8D54523E lea r10, ptr [r26+r26*2+0x3e] +XDIS 10422: MISC BASE D53F8D54533F lea r10, ptr [r27+r26*2+0x3f] +XDIS 10428: MISC BASE D53F8D545440 lea r10, ptr [r28+r26*2+0x40] +XDIS 1042e: MISC BASE D53F8D545541 lea r10, ptr [r29+r26*2+0x41] +XDIS 10434: MISC BASE D53F8D545642 lea r10, ptr [r30+r26*2+0x42] +XDIS 1043a: MISC BASE D53F8D545743 lea r10, ptr [r31+r26*2+0x43] +XDIS 10440: MISC BASE D52E8D545825 lea r10, ptr [rax+r27*2+0x25] +XDIS 10446: MISC BASE D52E8D545926 lea r10, ptr [rcx+r27*2+0x26] +XDIS 1044c: MISC BASE D52E8D545A27 lea r10, ptr [rdx+r27*2+0x27] +XDIS 10452: MISC BASE D52E8D545B28 lea r10, ptr [rbx+r27*2+0x28] +XDIS 10458: MISC BASE D52E8D545C29 lea r10, ptr [rsp+r27*2+0x29] +XDIS 1045e: MISC BASE D52E8D545D2A lea r10, ptr [rbp+r27*2+0x2a] +XDIS 10464: MISC BASE D52E8D545E2B lea r10, ptr [rsi+r27*2+0x2b] +XDIS 1046a: MISC BASE D52E8D545F2C lea r10, ptr [rdi+r27*2+0x2c] +XDIS 10470: MISC BASE D52F8D54582D lea r10, ptr [r8+r27*2+0x2d] +XDIS 10476: MISC BASE D52F8D54592E lea r10, ptr [r9+r27*2+0x2e] +XDIS 1047c: MISC BASE D52F8D545A2F lea r10, ptr [r10+r27*2+0x2f] +XDIS 10482: MISC BASE D52F8D545B30 lea r10, ptr [r11+r27*2+0x30] +XDIS 10488: MISC BASE D52F8D545C31 lea r10, ptr [r12+r27*2+0x31] +XDIS 1048e: MISC BASE D52F8D545D32 lea r10, ptr [r13+r27*2+0x32] +XDIS 10494: MISC BASE D52F8D545E33 lea r10, ptr [r14+r27*2+0x33] +XDIS 1049a: MISC BASE D52F8D545F34 lea r10, ptr [r15+r27*2+0x34] +XDIS 104a0: MISC BASE D53E8D545835 lea r10, ptr [r16+r27*2+0x35] +XDIS 104a6: MISC BASE D53E8D545936 lea r10, ptr [r17+r27*2+0x36] +XDIS 104ac: MISC BASE D53E8D545A37 lea r10, ptr [r18+r27*2+0x37] +XDIS 104b2: MISC BASE D53E8D545B38 lea r10, ptr [r19+r27*2+0x38] +XDIS 104b8: MISC BASE D53E8D545C39 lea r10, ptr [r20+r27*2+0x39] +XDIS 104be: MISC BASE D53E8D545D3A lea r10, ptr [r21+r27*2+0x3a] +XDIS 104c4: MISC BASE D53E8D545E3B lea r10, ptr [r22+r27*2+0x3b] +XDIS 104ca: MISC BASE D53E8D545F3C lea r10, ptr [r23+r27*2+0x3c] +XDIS 104d0: MISC BASE D53F8D54583D lea r10, ptr [r24+r27*2+0x3d] +XDIS 104d6: MISC BASE D53F8D54593E lea r10, ptr [r25+r27*2+0x3e] +XDIS 104dc: MISC BASE D53F8D545A3F lea r10, ptr [r26+r27*2+0x3f] +XDIS 104e2: MISC BASE D53F8D545B40 lea r10, ptr [r27+r27*2+0x40] +XDIS 104e8: MISC BASE D53F8D545C41 lea r10, ptr [r28+r27*2+0x41] +XDIS 104ee: MISC BASE D53F8D545D42 lea r10, ptr [r29+r27*2+0x42] +XDIS 104f4: MISC BASE D53F8D545E43 lea r10, ptr [r30+r27*2+0x43] +XDIS 104fa: MISC BASE D53F8D545F44 lea r10, ptr [r31+r27*2+0x44] +XDIS 10500: MISC BASE D52E8D546026 lea r10, ptr [rax+r28*2+0x26] +XDIS 10506: MISC BASE D52E8D546127 lea r10, ptr [rcx+r28*2+0x27] +XDIS 1050c: MISC BASE D52E8D546228 lea r10, ptr [rdx+r28*2+0x28] +XDIS 10512: MISC BASE D52E8D546329 lea r10, ptr [rbx+r28*2+0x29] +XDIS 10518: MISC BASE D52E8D54642A lea r10, ptr [rsp+r28*2+0x2a] +XDIS 1051e: MISC BASE D52E8D54652B lea r10, ptr [rbp+r28*2+0x2b] +XDIS 10524: MISC BASE D52E8D54662C lea r10, ptr [rsi+r28*2+0x2c] +XDIS 1052a: MISC BASE D52E8D54672D lea r10, ptr [rdi+r28*2+0x2d] +XDIS 10530: MISC BASE D52F8D54602E lea r10, ptr [r8+r28*2+0x2e] +XDIS 10536: MISC BASE D52F8D54612F lea r10, ptr [r9+r28*2+0x2f] +XDIS 1053c: MISC BASE D52F8D546230 lea r10, ptr [r10+r28*2+0x30] +XDIS 10542: MISC BASE D52F8D546331 lea r10, ptr [r11+r28*2+0x31] +XDIS 10548: MISC BASE D52F8D546432 lea r10, ptr [r12+r28*2+0x32] +XDIS 1054e: MISC BASE D52F8D546533 lea r10, ptr [r13+r28*2+0x33] +XDIS 10554: MISC BASE D52F8D546634 lea r10, ptr [r14+r28*2+0x34] +XDIS 1055a: MISC BASE D52F8D546735 lea r10, ptr [r15+r28*2+0x35] +XDIS 10560: MISC BASE D53E8D546036 lea r10, ptr [r16+r28*2+0x36] +XDIS 10566: MISC BASE D53E8D546137 lea r10, ptr [r17+r28*2+0x37] +XDIS 1056c: MISC BASE D53E8D546238 lea r10, ptr [r18+r28*2+0x38] +XDIS 10572: MISC BASE D53E8D546339 lea r10, ptr [r19+r28*2+0x39] +XDIS 10578: MISC BASE D53E8D54643A lea r10, ptr [r20+r28*2+0x3a] +XDIS 1057e: MISC BASE D53E8D54653B lea r10, ptr [r21+r28*2+0x3b] +XDIS 10584: MISC BASE D53E8D54663C lea r10, ptr [r22+r28*2+0x3c] +XDIS 1058a: MISC BASE D53E8D54673D lea r10, ptr [r23+r28*2+0x3d] +XDIS 10590: MISC BASE D53F8D54603E lea r10, ptr [r24+r28*2+0x3e] +XDIS 10596: MISC BASE D53F8D54613F lea r10, ptr [r25+r28*2+0x3f] +XDIS 1059c: MISC BASE D53F8D546240 lea r10, ptr [r26+r28*2+0x40] +XDIS 105a2: MISC BASE D53F8D546341 lea r10, ptr [r27+r28*2+0x41] +XDIS 105a8: MISC BASE D53F8D546442 lea r10, ptr [r28+r28*2+0x42] +XDIS 105ae: MISC BASE D53F8D546543 lea r10, ptr [r29+r28*2+0x43] +XDIS 105b4: MISC BASE D53F8D546644 lea r10, ptr [r30+r28*2+0x44] +XDIS 105ba: MISC BASE D53F8D546745 lea r10, ptr [r31+r28*2+0x45] +XDIS 105c0: MISC BASE D52E8D546827 lea r10, ptr [rax+r29*2+0x27] +XDIS 105c6: MISC BASE D52E8D546928 lea r10, ptr [rcx+r29*2+0x28] +XDIS 105cc: MISC BASE D52E8D546A29 lea r10, ptr [rdx+r29*2+0x29] +XDIS 105d2: MISC BASE D52E8D546B2A lea r10, ptr [rbx+r29*2+0x2a] +XDIS 105d8: MISC BASE D52E8D546C2B lea r10, ptr [rsp+r29*2+0x2b] +XDIS 105de: MISC BASE D52E8D546D2C lea r10, ptr [rbp+r29*2+0x2c] +XDIS 105e4: MISC BASE D52E8D546E2D lea r10, ptr [rsi+r29*2+0x2d] +XDIS 105ea: MISC BASE D52E8D546F2E lea r10, ptr [rdi+r29*2+0x2e] +XDIS 105f0: MISC BASE D52F8D54682F lea r10, ptr [r8+r29*2+0x2f] +XDIS 105f6: MISC BASE D52F8D546930 lea r10, ptr [r9+r29*2+0x30] +XDIS 105fc: MISC BASE D52F8D546A31 lea r10, ptr [r10+r29*2+0x31] +XDIS 10602: MISC BASE D52F8D546B32 lea r10, ptr [r11+r29*2+0x32] +XDIS 10608: MISC BASE D52F8D546C33 lea r10, ptr [r12+r29*2+0x33] +XDIS 1060e: MISC BASE D52F8D546D34 lea r10, ptr [r13+r29*2+0x34] +XDIS 10614: MISC BASE D52F8D546E35 lea r10, ptr [r14+r29*2+0x35] +XDIS 1061a: MISC BASE D52F8D546F36 lea r10, ptr [r15+r29*2+0x36] +XDIS 10620: MISC BASE D53E8D546837 lea r10, ptr [r16+r29*2+0x37] +XDIS 10626: MISC BASE D53E8D546938 lea r10, ptr [r17+r29*2+0x38] +XDIS 1062c: MISC BASE D53E8D546A39 lea r10, ptr [r18+r29*2+0x39] +XDIS 10632: MISC BASE D53E8D546B3A lea r10, ptr [r19+r29*2+0x3a] +XDIS 10638: MISC BASE D53E8D546C3B lea r10, ptr [r20+r29*2+0x3b] +XDIS 1063e: MISC BASE D53E8D546D3C lea r10, ptr [r21+r29*2+0x3c] +XDIS 10644: MISC BASE D53E8D546E3D lea r10, ptr [r22+r29*2+0x3d] +XDIS 1064a: MISC BASE D53E8D546F3E lea r10, ptr [r23+r29*2+0x3e] +XDIS 10650: MISC BASE D53F8D54683F lea r10, ptr [r24+r29*2+0x3f] +XDIS 10656: MISC BASE D53F8D546940 lea r10, ptr [r25+r29*2+0x40] +XDIS 1065c: MISC BASE D53F8D546A41 lea r10, ptr [r26+r29*2+0x41] +XDIS 10662: MISC BASE D53F8D546B42 lea r10, ptr [r27+r29*2+0x42] +XDIS 10668: MISC BASE D53F8D546C43 lea r10, ptr [r28+r29*2+0x43] +XDIS 1066e: MISC BASE D53F8D546D44 lea r10, ptr [r29+r29*2+0x44] +XDIS 10674: MISC BASE D53F8D546E45 lea r10, ptr [r30+r29*2+0x45] +XDIS 1067a: MISC BASE D53F8D546F46 lea r10, ptr [r31+r29*2+0x46] +XDIS 10680: MISC BASE D52E8D547028 lea r10, ptr [rax+r30*2+0x28] +XDIS 10686: MISC BASE D52E8D547129 lea r10, ptr [rcx+r30*2+0x29] +XDIS 1068c: MISC BASE D52E8D54722A lea r10, ptr [rdx+r30*2+0x2a] +XDIS 10692: MISC BASE D52E8D54732B lea r10, ptr [rbx+r30*2+0x2b] +XDIS 10698: MISC BASE D52E8D54742C lea r10, ptr [rsp+r30*2+0x2c] +XDIS 1069e: MISC BASE D52E8D54752D lea r10, ptr [rbp+r30*2+0x2d] +XDIS 106a4: MISC BASE D52E8D54762E lea r10, ptr [rsi+r30*2+0x2e] +XDIS 106aa: MISC BASE D52E8D54772F lea r10, ptr [rdi+r30*2+0x2f] +XDIS 106b0: MISC BASE D52F8D547030 lea r10, ptr [r8+r30*2+0x30] +XDIS 106b6: MISC BASE D52F8D547131 lea r10, ptr [r9+r30*2+0x31] +XDIS 106bc: MISC BASE D52F8D547232 lea r10, ptr [r10+r30*2+0x32] +XDIS 106c2: MISC BASE D52F8D547333 lea r10, ptr [r11+r30*2+0x33] +XDIS 106c8: MISC BASE D52F8D547434 lea r10, ptr [r12+r30*2+0x34] +XDIS 106ce: MISC BASE D52F8D547535 lea r10, ptr [r13+r30*2+0x35] +XDIS 106d4: MISC BASE D52F8D547636 lea r10, ptr [r14+r30*2+0x36] +XDIS 106da: MISC BASE D52F8D547737 lea r10, ptr [r15+r30*2+0x37] +XDIS 106e0: MISC BASE D53E8D547038 lea r10, ptr [r16+r30*2+0x38] +XDIS 106e6: MISC BASE D53E8D547139 lea r10, ptr [r17+r30*2+0x39] +XDIS 106ec: MISC BASE D53E8D54723A lea r10, ptr [r18+r30*2+0x3a] +XDIS 106f2: MISC BASE D53E8D54733B lea r10, ptr [r19+r30*2+0x3b] +XDIS 106f8: MISC BASE D53E8D54743C lea r10, ptr [r20+r30*2+0x3c] +XDIS 106fe: MISC BASE D53E8D54753D lea r10, ptr [r21+r30*2+0x3d] +XDIS 10704: MISC BASE D53E8D54763E lea r10, ptr [r22+r30*2+0x3e] +XDIS 1070a: MISC BASE D53E8D54773F lea r10, ptr [r23+r30*2+0x3f] +XDIS 10710: MISC BASE D53F8D547040 lea r10, ptr [r24+r30*2+0x40] +XDIS 10716: MISC BASE D53F8D547141 lea r10, ptr [r25+r30*2+0x41] +XDIS 1071c: MISC BASE D53F8D547242 lea r10, ptr [r26+r30*2+0x42] +XDIS 10722: MISC BASE D53F8D547343 lea r10, ptr [r27+r30*2+0x43] +XDIS 10728: MISC BASE D53F8D547444 lea r10, ptr [r28+r30*2+0x44] +XDIS 1072e: MISC BASE D53F8D547545 lea r10, ptr [r29+r30*2+0x45] +XDIS 10734: MISC BASE D53F8D547646 lea r10, ptr [r30+r30*2+0x46] +XDIS 1073a: MISC BASE D53F8D547747 lea r10, ptr [r31+r30*2+0x47] +XDIS 10740: MISC BASE D52E8D547829 lea r10, ptr [rax+r31*2+0x29] +XDIS 10746: MISC BASE D52E8D54792A lea r10, ptr [rcx+r31*2+0x2a] +XDIS 1074c: MISC BASE D52E8D547A2B lea r10, ptr [rdx+r31*2+0x2b] +XDIS 10752: MISC BASE D52E8D547B2C lea r10, ptr [rbx+r31*2+0x2c] +XDIS 10758: MISC BASE D52E8D547C2D lea r10, ptr [rsp+r31*2+0x2d] +XDIS 1075e: MISC BASE D52E8D547D2E lea r10, ptr [rbp+r31*2+0x2e] +XDIS 10764: MISC BASE D52E8D547E2F lea r10, ptr [rsi+r31*2+0x2f] +XDIS 1076a: MISC BASE D52E8D547F30 lea r10, ptr [rdi+r31*2+0x30] +XDIS 10770: MISC BASE D52F8D547831 lea r10, ptr [r8+r31*2+0x31] +XDIS 10776: MISC BASE D52F8D547932 lea r10, ptr [r9+r31*2+0x32] +XDIS 1077c: MISC BASE D52F8D547A33 lea r10, ptr [r10+r31*2+0x33] +XDIS 10782: MISC BASE D52F8D547B34 lea r10, ptr [r11+r31*2+0x34] +XDIS 10788: MISC BASE D52F8D547C35 lea r10, ptr [r12+r31*2+0x35] +XDIS 1078e: MISC BASE D52F8D547D36 lea r10, ptr [r13+r31*2+0x36] +XDIS 10794: MISC BASE D52F8D547E37 lea r10, ptr [r14+r31*2+0x37] +XDIS 1079a: MISC BASE D52F8D547F38 lea r10, ptr [r15+r31*2+0x38] +XDIS 107a0: MISC BASE D53E8D547839 lea r10, ptr [r16+r31*2+0x39] +XDIS 107a6: MISC BASE D53E8D54793A lea r10, ptr [r17+r31*2+0x3a] +XDIS 107ac: MISC BASE D53E8D547A3B lea r10, ptr [r18+r31*2+0x3b] +XDIS 107b2: MISC BASE D53E8D547B3C lea r10, ptr [r19+r31*2+0x3c] +XDIS 107b8: MISC BASE D53E8D547C3D lea r10, ptr [r20+r31*2+0x3d] +XDIS 107be: MISC BASE D53E8D547D3E lea r10, ptr [r21+r31*2+0x3e] +XDIS 107c4: MISC BASE D53E8D547E3F lea r10, ptr [r22+r31*2+0x3f] +XDIS 107ca: MISC BASE D53E8D547F40 lea r10, ptr [r23+r31*2+0x40] +XDIS 107d0: MISC BASE D53F8D547841 lea r10, ptr [r24+r31*2+0x41] +XDIS 107d6: MISC BASE D53F8D547942 lea r10, ptr [r25+r31*2+0x42] +XDIS 107dc: MISC BASE D53F8D547A43 lea r10, ptr [r26+r31*2+0x43] +XDIS 107e2: MISC BASE D53F8D547B44 lea r10, ptr [r27+r31*2+0x44] +XDIS 107e8: MISC BASE D53F8D547C45 lea r10, ptr [r28+r31*2+0x45] +XDIS 107ee: MISC BASE D53F8D547D46 lea r10, ptr [r29+r31*2+0x46] +XDIS 107f4: MISC BASE D53F8D547E47 lea r10, ptr [r30+r31*2+0x47] +XDIS 107fa: MISC BASE D53F8D547F48 lea r10, ptr [r31+r31*2+0x48] +XDIS 10800: MISC BASE D50C8D5C400B lea r11, ptr [rax+rax*2+0xb] +XDIS 10806: MISC BASE D50C8D5C410C lea r11, ptr [rcx+rax*2+0xc] +XDIS 1080c: MISC BASE D50C8D5C420D lea r11, ptr [rdx+rax*2+0xd] +XDIS 10812: MISC BASE D50C8D5C430E lea r11, ptr [rbx+rax*2+0xe] +XDIS 10818: MISC BASE D50C8D5C440F lea r11, ptr [rsp+rax*2+0xf] +XDIS 1081e: MISC BASE D50C8D5C4510 lea r11, ptr [rbp+rax*2+0x10] +XDIS 10824: MISC BASE D50C8D5C4611 lea r11, ptr [rsi+rax*2+0x11] +XDIS 1082a: MISC BASE D50C8D5C4712 lea r11, ptr [rdi+rax*2+0x12] +XDIS 10830: MISC BASE D50D8D5C4013 lea r11, ptr [r8+rax*2+0x13] +XDIS 10836: MISC BASE D50D8D5C4114 lea r11, ptr [r9+rax*2+0x14] +XDIS 1083c: MISC BASE D50D8D5C4215 lea r11, ptr [r10+rax*2+0x15] +XDIS 10842: MISC BASE D50D8D5C4316 lea r11, ptr [r11+rax*2+0x16] +XDIS 10848: MISC BASE D50D8D5C4417 lea r11, ptr [r12+rax*2+0x17] +XDIS 1084e: MISC BASE D50D8D5C4518 lea r11, ptr [r13+rax*2+0x18] +XDIS 10854: MISC BASE D50D8D5C4619 lea r11, ptr [r14+rax*2+0x19] +XDIS 1085a: MISC BASE D50D8D5C471A lea r11, ptr [r15+rax*2+0x1a] +XDIS 10860: MISC BASE D51C8D5C401B lea r11, ptr [r16+rax*2+0x1b] +XDIS 10866: MISC BASE D51C8D5C411C lea r11, ptr [r17+rax*2+0x1c] +XDIS 1086c: MISC BASE D51C8D5C421D lea r11, ptr [r18+rax*2+0x1d] +XDIS 10872: MISC BASE D51C8D5C431E lea r11, ptr [r19+rax*2+0x1e] +XDIS 10878: MISC BASE D51C8D5C441F lea r11, ptr [r20+rax*2+0x1f] +XDIS 1087e: MISC BASE D51C8D5C4520 lea r11, ptr [r21+rax*2+0x20] +XDIS 10884: MISC BASE D51C8D5C4621 lea r11, ptr [r22+rax*2+0x21] +XDIS 1088a: MISC BASE D51C8D5C4722 lea r11, ptr [r23+rax*2+0x22] +XDIS 10890: MISC BASE D51D8D5C4023 lea r11, ptr [r24+rax*2+0x23] +XDIS 10896: MISC BASE D51D8D5C4124 lea r11, ptr [r25+rax*2+0x24] +XDIS 1089c: MISC BASE D51D8D5C4225 lea r11, ptr [r26+rax*2+0x25] +XDIS 108a2: MISC BASE D51D8D5C4326 lea r11, ptr [r27+rax*2+0x26] +XDIS 108a8: MISC BASE D51D8D5C4427 lea r11, ptr [r28+rax*2+0x27] +XDIS 108ae: MISC BASE D51D8D5C4528 lea r11, ptr [r29+rax*2+0x28] +XDIS 108b4: MISC BASE D51D8D5C4629 lea r11, ptr [r30+rax*2+0x29] +XDIS 108ba: MISC BASE D51D8D5C472A lea r11, ptr [r31+rax*2+0x2a] +XDIS 108c0: MISC BASE D50C8D5C480C lea r11, ptr [rax+rcx*2+0xc] +XDIS 108c6: MISC BASE D50C8D5C490D lea r11, ptr [rcx+rcx*2+0xd] +XDIS 108cc: MISC BASE D50C8D5C4A0E lea r11, ptr [rdx+rcx*2+0xe] +XDIS 108d2: MISC BASE D50C8D5C4B0F lea r11, ptr [rbx+rcx*2+0xf] +XDIS 108d8: MISC BASE D50C8D5C4C10 lea r11, ptr [rsp+rcx*2+0x10] +XDIS 108de: MISC BASE D50C8D5C4D11 lea r11, ptr [rbp+rcx*2+0x11] +XDIS 108e4: MISC BASE D50C8D5C4E12 lea r11, ptr [rsi+rcx*2+0x12] +XDIS 108ea: MISC BASE D50C8D5C4F13 lea r11, ptr [rdi+rcx*2+0x13] +XDIS 108f0: MISC BASE D50D8D5C4814 lea r11, ptr [r8+rcx*2+0x14] +XDIS 108f6: MISC BASE D50D8D5C4915 lea r11, ptr [r9+rcx*2+0x15] +XDIS 108fc: MISC BASE D50D8D5C4A16 lea r11, ptr [r10+rcx*2+0x16] +XDIS 10902: MISC BASE D50D8D5C4B17 lea r11, ptr [r11+rcx*2+0x17] +XDIS 10908: MISC BASE D50D8D5C4C18 lea r11, ptr [r12+rcx*2+0x18] +XDIS 1090e: MISC BASE D50D8D5C4D19 lea r11, ptr [r13+rcx*2+0x19] +XDIS 10914: MISC BASE D50D8D5C4E1A lea r11, ptr [r14+rcx*2+0x1a] +XDIS 1091a: MISC BASE D50D8D5C4F1B lea r11, ptr [r15+rcx*2+0x1b] +XDIS 10920: MISC BASE D51C8D5C481C lea r11, ptr [r16+rcx*2+0x1c] +XDIS 10926: MISC BASE D51C8D5C491D lea r11, ptr [r17+rcx*2+0x1d] +XDIS 1092c: MISC BASE D51C8D5C4A1E lea r11, ptr [r18+rcx*2+0x1e] +XDIS 10932: MISC BASE D51C8D5C4B1F lea r11, ptr [r19+rcx*2+0x1f] +XDIS 10938: MISC BASE D51C8D5C4C20 lea r11, ptr [r20+rcx*2+0x20] +XDIS 1093e: MISC BASE D51C8D5C4D21 lea r11, ptr [r21+rcx*2+0x21] +XDIS 10944: MISC BASE D51C8D5C4E22 lea r11, ptr [r22+rcx*2+0x22] +XDIS 1094a: MISC BASE D51C8D5C4F23 lea r11, ptr [r23+rcx*2+0x23] +XDIS 10950: MISC BASE D51D8D5C4824 lea r11, ptr [r24+rcx*2+0x24] +XDIS 10956: MISC BASE D51D8D5C4925 lea r11, ptr [r25+rcx*2+0x25] +XDIS 1095c: MISC BASE D51D8D5C4A26 lea r11, ptr [r26+rcx*2+0x26] +XDIS 10962: MISC BASE D51D8D5C4B27 lea r11, ptr [r27+rcx*2+0x27] +XDIS 10968: MISC BASE D51D8D5C4C28 lea r11, ptr [r28+rcx*2+0x28] +XDIS 1096e: MISC BASE D51D8D5C4D29 lea r11, ptr [r29+rcx*2+0x29] +XDIS 10974: MISC BASE D51D8D5C4E2A lea r11, ptr [r30+rcx*2+0x2a] +XDIS 1097a: MISC BASE D51D8D5C4F2B lea r11, ptr [r31+rcx*2+0x2b] +XDIS 10980: MISC BASE D50C8D5C500D lea r11, ptr [rax+rdx*2+0xd] +XDIS 10986: MISC BASE D50C8D5C510E lea r11, ptr [rcx+rdx*2+0xe] +XDIS 1098c: MISC BASE D50C8D5C520F lea r11, ptr [rdx+rdx*2+0xf] +XDIS 10992: MISC BASE D50C8D5C5310 lea r11, ptr [rbx+rdx*2+0x10] +XDIS 10998: MISC BASE D50C8D5C5411 lea r11, ptr [rsp+rdx*2+0x11] +XDIS 1099e: MISC BASE D50C8D5C5512 lea r11, ptr [rbp+rdx*2+0x12] +XDIS 109a4: MISC BASE D50C8D5C5613 lea r11, ptr [rsi+rdx*2+0x13] +XDIS 109aa: MISC BASE D50C8D5C5714 lea r11, ptr [rdi+rdx*2+0x14] +XDIS 109b0: MISC BASE D50D8D5C5015 lea r11, ptr [r8+rdx*2+0x15] +XDIS 109b6: MISC BASE D50D8D5C5116 lea r11, ptr [r9+rdx*2+0x16] +XDIS 109bc: MISC BASE D50D8D5C5217 lea r11, ptr [r10+rdx*2+0x17] +XDIS 109c2: MISC BASE D50D8D5C5318 lea r11, ptr [r11+rdx*2+0x18] +XDIS 109c8: MISC BASE D50D8D5C5419 lea r11, ptr [r12+rdx*2+0x19] +XDIS 109ce: MISC BASE D50D8D5C551A lea r11, ptr [r13+rdx*2+0x1a] +XDIS 109d4: MISC BASE D50D8D5C561B lea r11, ptr [r14+rdx*2+0x1b] +XDIS 109da: MISC BASE D50D8D5C571C lea r11, ptr [r15+rdx*2+0x1c] +XDIS 109e0: MISC BASE D51C8D5C501D lea r11, ptr [r16+rdx*2+0x1d] +XDIS 109e6: MISC BASE D51C8D5C511E lea r11, ptr [r17+rdx*2+0x1e] +XDIS 109ec: MISC BASE D51C8D5C521F lea r11, ptr [r18+rdx*2+0x1f] +XDIS 109f2: MISC BASE D51C8D5C5320 lea r11, ptr [r19+rdx*2+0x20] +XDIS 109f8: MISC BASE D51C8D5C5421 lea r11, ptr [r20+rdx*2+0x21] +XDIS 109fe: MISC BASE D51C8D5C5522 lea r11, ptr [r21+rdx*2+0x22] +XDIS 10a04: MISC BASE D51C8D5C5623 lea r11, ptr [r22+rdx*2+0x23] +XDIS 10a0a: MISC BASE D51C8D5C5724 lea r11, ptr [r23+rdx*2+0x24] +XDIS 10a10: MISC BASE D51D8D5C5025 lea r11, ptr [r24+rdx*2+0x25] +XDIS 10a16: MISC BASE D51D8D5C5126 lea r11, ptr [r25+rdx*2+0x26] +XDIS 10a1c: MISC BASE D51D8D5C5227 lea r11, ptr [r26+rdx*2+0x27] +XDIS 10a22: MISC BASE D51D8D5C5328 lea r11, ptr [r27+rdx*2+0x28] +XDIS 10a28: MISC BASE D51D8D5C5429 lea r11, ptr [r28+rdx*2+0x29] +XDIS 10a2e: MISC BASE D51D8D5C552A lea r11, ptr [r29+rdx*2+0x2a] +XDIS 10a34: MISC BASE D51D8D5C562B lea r11, ptr [r30+rdx*2+0x2b] +XDIS 10a3a: MISC BASE D51D8D5C572C lea r11, ptr [r31+rdx*2+0x2c] +XDIS 10a40: MISC BASE D50C8D5C580E lea r11, ptr [rax+rbx*2+0xe] +XDIS 10a46: MISC BASE D50C8D5C590F lea r11, ptr [rcx+rbx*2+0xf] +XDIS 10a4c: MISC BASE D50C8D5C5A10 lea r11, ptr [rdx+rbx*2+0x10] +XDIS 10a52: MISC BASE D50C8D5C5B11 lea r11, ptr [rbx+rbx*2+0x11] +XDIS 10a58: MISC BASE D50C8D5C5C12 lea r11, ptr [rsp+rbx*2+0x12] +XDIS 10a5e: MISC BASE D50C8D5C5D13 lea r11, ptr [rbp+rbx*2+0x13] +XDIS 10a64: MISC BASE D50C8D5C5E14 lea r11, ptr [rsi+rbx*2+0x14] +XDIS 10a6a: MISC BASE D50C8D5C5F15 lea r11, ptr [rdi+rbx*2+0x15] +XDIS 10a70: MISC BASE D50D8D5C5816 lea r11, ptr [r8+rbx*2+0x16] +XDIS 10a76: MISC BASE D50D8D5C5917 lea r11, ptr [r9+rbx*2+0x17] +XDIS 10a7c: MISC BASE D50D8D5C5A18 lea r11, ptr [r10+rbx*2+0x18] +XDIS 10a82: MISC BASE D50D8D5C5B19 lea r11, ptr [r11+rbx*2+0x19] +XDIS 10a88: MISC BASE D50D8D5C5C1A lea r11, ptr [r12+rbx*2+0x1a] +XDIS 10a8e: MISC BASE D50D8D5C5D1B lea r11, ptr [r13+rbx*2+0x1b] +XDIS 10a94: MISC BASE D50D8D5C5E1C lea r11, ptr [r14+rbx*2+0x1c] +XDIS 10a9a: MISC BASE D50D8D5C5F1D lea r11, ptr [r15+rbx*2+0x1d] +XDIS 10aa0: MISC BASE D51C8D5C581E lea r11, ptr [r16+rbx*2+0x1e] +XDIS 10aa6: MISC BASE D51C8D5C591F lea r11, ptr [r17+rbx*2+0x1f] +XDIS 10aac: MISC BASE D51C8D5C5A20 lea r11, ptr [r18+rbx*2+0x20] +XDIS 10ab2: MISC BASE D51C8D5C5B21 lea r11, ptr [r19+rbx*2+0x21] +XDIS 10ab8: MISC BASE D51C8D5C5C22 lea r11, ptr [r20+rbx*2+0x22] +XDIS 10abe: MISC BASE D51C8D5C5D23 lea r11, ptr [r21+rbx*2+0x23] +XDIS 10ac4: MISC BASE D51C8D5C5E24 lea r11, ptr [r22+rbx*2+0x24] +XDIS 10aca: MISC BASE D51C8D5C5F25 lea r11, ptr [r23+rbx*2+0x25] +XDIS 10ad0: MISC BASE D51D8D5C5826 lea r11, ptr [r24+rbx*2+0x26] +XDIS 10ad6: MISC BASE D51D8D5C5927 lea r11, ptr [r25+rbx*2+0x27] +XDIS 10adc: MISC BASE D51D8D5C5A28 lea r11, ptr [r26+rbx*2+0x28] +XDIS 10ae2: MISC BASE D51D8D5C5B29 lea r11, ptr [r27+rbx*2+0x29] +XDIS 10ae8: MISC BASE D51D8D5C5C2A lea r11, ptr [r28+rbx*2+0x2a] +XDIS 10aee: MISC BASE D51D8D5C5D2B lea r11, ptr [r29+rbx*2+0x2b] +XDIS 10af4: MISC BASE D51D8D5C5E2C lea r11, ptr [r30+rbx*2+0x2c] +XDIS 10afa: MISC BASE D51D8D5C5F2D lea r11, ptr [r31+rbx*2+0x2d] +XDIS 10b00: MISC BASE D50C8D5C600F lea r11, ptr [rax+0xf] +XDIS 10b06: MISC BASE D50C8D5C6110 lea r11, ptr [rcx+0x10] +XDIS 10b0c: MISC BASE D50C8D5C6211 lea r11, ptr [rdx+0x11] +XDIS 10b12: MISC BASE D50C8D5C6312 lea r11, ptr [rbx+0x12] +XDIS 10b18: MISC BASE D50C8D5C6413 lea r11, ptr [rsp+0x13] +XDIS 10b1e: MISC BASE D50C8D5C6514 lea r11, ptr [rbp+0x14] +XDIS 10b24: MISC BASE D50C8D5C6615 lea r11, ptr [rsi+0x15] +XDIS 10b2a: MISC BASE D50C8D5C6716 lea r11, ptr [rdi+0x16] +XDIS 10b30: MISC BASE D50D8D5C6017 lea r11, ptr [r8+0x17] +XDIS 10b36: MISC BASE D50D8D5C6118 lea r11, ptr [r9+0x18] +XDIS 10b3c: MISC BASE D50D8D5C6219 lea r11, ptr [r10+0x19] +XDIS 10b42: MISC BASE D50D8D5C631A lea r11, ptr [r11+0x1a] +XDIS 10b48: MISC BASE D50D8D5C641B lea r11, ptr [r12+0x1b] +XDIS 10b4e: MISC BASE D50D8D5C651C lea r11, ptr [r13+0x1c] +XDIS 10b54: MISC BASE D50D8D5C661D lea r11, ptr [r14+0x1d] +XDIS 10b5a: MISC BASE D50D8D5C671E lea r11, ptr [r15+0x1e] +XDIS 10b60: MISC BASE D51C8D5C601F lea r11, ptr [r16+0x1f] +XDIS 10b66: MISC BASE D51C8D5C6120 lea r11, ptr [r17+0x20] +XDIS 10b6c: MISC BASE D51C8D5C6221 lea r11, ptr [r18+0x21] +XDIS 10b72: MISC BASE D51C8D5C6322 lea r11, ptr [r19+0x22] +XDIS 10b78: MISC BASE D51C8D5C6423 lea r11, ptr [r20+0x23] +XDIS 10b7e: MISC BASE D51C8D5C6524 lea r11, ptr [r21+0x24] +XDIS 10b84: MISC BASE D51C8D5C6625 lea r11, ptr [r22+0x25] +XDIS 10b8a: MISC BASE D51C8D5C6726 lea r11, ptr [r23+0x26] +XDIS 10b90: MISC BASE D51D8D5C6027 lea r11, ptr [r24+0x27] +XDIS 10b96: MISC BASE D51D8D5C6128 lea r11, ptr [r25+0x28] +XDIS 10b9c: MISC BASE D51D8D5C6229 lea r11, ptr [r26+0x29] +XDIS 10ba2: MISC BASE D51D8D5C632A lea r11, ptr [r27+0x2a] +XDIS 10ba8: MISC BASE D51D8D5C642B lea r11, ptr [r28+0x2b] +XDIS 10bae: MISC BASE D51D8D5C652C lea r11, ptr [r29+0x2c] +XDIS 10bb4: MISC BASE D51D8D5C662D lea r11, ptr [r30+0x2d] +XDIS 10bba: MISC BASE D51D8D5C672E lea r11, ptr [r31+0x2e] +XDIS 10bc0: MISC BASE D50C8D5C6810 lea r11, ptr [rax+rbp*2+0x10] +XDIS 10bc6: MISC BASE D50C8D5C6911 lea r11, ptr [rcx+rbp*2+0x11] +XDIS 10bcc: MISC BASE D50C8D5C6A12 lea r11, ptr [rdx+rbp*2+0x12] +XDIS 10bd2: MISC BASE D50C8D5C6B13 lea r11, ptr [rbx+rbp*2+0x13] +XDIS 10bd8: MISC BASE D50C8D5C6C14 lea r11, ptr [rsp+rbp*2+0x14] +XDIS 10bde: MISC BASE D50C8D5C6D15 lea r11, ptr [rbp+rbp*2+0x15] +XDIS 10be4: MISC BASE D50C8D5C6E16 lea r11, ptr [rsi+rbp*2+0x16] +XDIS 10bea: MISC BASE D50C8D5C6F17 lea r11, ptr [rdi+rbp*2+0x17] +XDIS 10bf0: MISC BASE D50D8D5C6818 lea r11, ptr [r8+rbp*2+0x18] +XDIS 10bf6: MISC BASE D50D8D5C6919 lea r11, ptr [r9+rbp*2+0x19] +XDIS 10bfc: MISC BASE D50D8D5C6A1A lea r11, ptr [r10+rbp*2+0x1a] +XDIS 10c02: MISC BASE D50D8D5C6B1B lea r11, ptr [r11+rbp*2+0x1b] +XDIS 10c08: MISC BASE D50D8D5C6C1C lea r11, ptr [r12+rbp*2+0x1c] +XDIS 10c0e: MISC BASE D50D8D5C6D1D lea r11, ptr [r13+rbp*2+0x1d] +XDIS 10c14: MISC BASE D50D8D5C6E1E lea r11, ptr [r14+rbp*2+0x1e] +XDIS 10c1a: MISC BASE D50D8D5C6F1F lea r11, ptr [r15+rbp*2+0x1f] +XDIS 10c20: MISC BASE D51C8D5C6820 lea r11, ptr [r16+rbp*2+0x20] +XDIS 10c26: MISC BASE D51C8D5C6921 lea r11, ptr [r17+rbp*2+0x21] +XDIS 10c2c: MISC BASE D51C8D5C6A22 lea r11, ptr [r18+rbp*2+0x22] +XDIS 10c32: MISC BASE D51C8D5C6B23 lea r11, ptr [r19+rbp*2+0x23] +XDIS 10c38: MISC BASE D51C8D5C6C24 lea r11, ptr [r20+rbp*2+0x24] +XDIS 10c3e: MISC BASE D51C8D5C6D25 lea r11, ptr [r21+rbp*2+0x25] +XDIS 10c44: MISC BASE D51C8D5C6E26 lea r11, ptr [r22+rbp*2+0x26] +XDIS 10c4a: MISC BASE D51C8D5C6F27 lea r11, ptr [r23+rbp*2+0x27] +XDIS 10c50: MISC BASE D51D8D5C6828 lea r11, ptr [r24+rbp*2+0x28] +XDIS 10c56: MISC BASE D51D8D5C6929 lea r11, ptr [r25+rbp*2+0x29] +XDIS 10c5c: MISC BASE D51D8D5C6A2A lea r11, ptr [r26+rbp*2+0x2a] +XDIS 10c62: MISC BASE D51D8D5C6B2B lea r11, ptr [r27+rbp*2+0x2b] +XDIS 10c68: MISC BASE D51D8D5C6C2C lea r11, ptr [r28+rbp*2+0x2c] +XDIS 10c6e: MISC BASE D51D8D5C6D2D lea r11, ptr [r29+rbp*2+0x2d] +XDIS 10c74: MISC BASE D51D8D5C6E2E lea r11, ptr [r30+rbp*2+0x2e] +XDIS 10c7a: MISC BASE D51D8D5C6F2F lea r11, ptr [r31+rbp*2+0x2f] +XDIS 10c80: MISC BASE D50C8D5C7011 lea r11, ptr [rax+rsi*2+0x11] +XDIS 10c86: MISC BASE D50C8D5C7112 lea r11, ptr [rcx+rsi*2+0x12] +XDIS 10c8c: MISC BASE D50C8D5C7213 lea r11, ptr [rdx+rsi*2+0x13] +XDIS 10c92: MISC BASE D50C8D5C7314 lea r11, ptr [rbx+rsi*2+0x14] +XDIS 10c98: MISC BASE D50C8D5C7415 lea r11, ptr [rsp+rsi*2+0x15] +XDIS 10c9e: MISC BASE D50C8D5C7516 lea r11, ptr [rbp+rsi*2+0x16] +XDIS 10ca4: MISC BASE D50C8D5C7617 lea r11, ptr [rsi+rsi*2+0x17] +XDIS 10caa: MISC BASE D50C8D5C7718 lea r11, ptr [rdi+rsi*2+0x18] +XDIS 10cb0: MISC BASE D50D8D5C7019 lea r11, ptr [r8+rsi*2+0x19] +XDIS 10cb6: MISC BASE D50D8D5C711A lea r11, ptr [r9+rsi*2+0x1a] +XDIS 10cbc: MISC BASE D50D8D5C721B lea r11, ptr [r10+rsi*2+0x1b] +XDIS 10cc2: MISC BASE D50D8D5C731C lea r11, ptr [r11+rsi*2+0x1c] +XDIS 10cc8: MISC BASE D50D8D5C741D lea r11, ptr [r12+rsi*2+0x1d] +XDIS 10cce: MISC BASE D50D8D5C751E lea r11, ptr [r13+rsi*2+0x1e] +XDIS 10cd4: MISC BASE D50D8D5C761F lea r11, ptr [r14+rsi*2+0x1f] +XDIS 10cda: MISC BASE D50D8D5C7720 lea r11, ptr [r15+rsi*2+0x20] +XDIS 10ce0: MISC BASE D51C8D5C7021 lea r11, ptr [r16+rsi*2+0x21] +XDIS 10ce6: MISC BASE D51C8D5C7122 lea r11, ptr [r17+rsi*2+0x22] +XDIS 10cec: MISC BASE D51C8D5C7223 lea r11, ptr [r18+rsi*2+0x23] +XDIS 10cf2: MISC BASE D51C8D5C7324 lea r11, ptr [r19+rsi*2+0x24] +XDIS 10cf8: MISC BASE D51C8D5C7425 lea r11, ptr [r20+rsi*2+0x25] +XDIS 10cfe: MISC BASE D51C8D5C7526 lea r11, ptr [r21+rsi*2+0x26] +XDIS 10d04: MISC BASE D51C8D5C7627 lea r11, ptr [r22+rsi*2+0x27] +XDIS 10d0a: MISC BASE D51C8D5C7728 lea r11, ptr [r23+rsi*2+0x28] +XDIS 10d10: MISC BASE D51D8D5C7029 lea r11, ptr [r24+rsi*2+0x29] +XDIS 10d16: MISC BASE D51D8D5C712A lea r11, ptr [r25+rsi*2+0x2a] +XDIS 10d1c: MISC BASE D51D8D5C722B lea r11, ptr [r26+rsi*2+0x2b] +XDIS 10d22: MISC BASE D51D8D5C732C lea r11, ptr [r27+rsi*2+0x2c] +XDIS 10d28: MISC BASE D51D8D5C742D lea r11, ptr [r28+rsi*2+0x2d] +XDIS 10d2e: MISC BASE D51D8D5C752E lea r11, ptr [r29+rsi*2+0x2e] +XDIS 10d34: MISC BASE D51D8D5C762F lea r11, ptr [r30+rsi*2+0x2f] +XDIS 10d3a: MISC BASE D51D8D5C7730 lea r11, ptr [r31+rsi*2+0x30] +XDIS 10d40: MISC BASE D50C8D5C7812 lea r11, ptr [rax+rdi*2+0x12] +XDIS 10d46: MISC BASE D50C8D5C7913 lea r11, ptr [rcx+rdi*2+0x13] +XDIS 10d4c: MISC BASE D50C8D5C7A14 lea r11, ptr [rdx+rdi*2+0x14] +XDIS 10d52: MISC BASE D50C8D5C7B15 lea r11, ptr [rbx+rdi*2+0x15] +XDIS 10d58: MISC BASE D50C8D5C7C16 lea r11, ptr [rsp+rdi*2+0x16] +XDIS 10d5e: MISC BASE D50C8D5C7D17 lea r11, ptr [rbp+rdi*2+0x17] +XDIS 10d64: MISC BASE D50C8D5C7E18 lea r11, ptr [rsi+rdi*2+0x18] +XDIS 10d6a: MISC BASE D50C8D5C7F19 lea r11, ptr [rdi+rdi*2+0x19] +XDIS 10d70: MISC BASE D50D8D5C781A lea r11, ptr [r8+rdi*2+0x1a] +XDIS 10d76: MISC BASE D50D8D5C791B lea r11, ptr [r9+rdi*2+0x1b] +XDIS 10d7c: MISC BASE D50D8D5C7A1C lea r11, ptr [r10+rdi*2+0x1c] +XDIS 10d82: MISC BASE D50D8D5C7B1D lea r11, ptr [r11+rdi*2+0x1d] +XDIS 10d88: MISC BASE D50D8D5C7C1E lea r11, ptr [r12+rdi*2+0x1e] +XDIS 10d8e: MISC BASE D50D8D5C7D1F lea r11, ptr [r13+rdi*2+0x1f] +XDIS 10d94: MISC BASE D50D8D5C7E20 lea r11, ptr [r14+rdi*2+0x20] +XDIS 10d9a: MISC BASE D50D8D5C7F21 lea r11, ptr [r15+rdi*2+0x21] +XDIS 10da0: MISC BASE D51C8D5C7822 lea r11, ptr [r16+rdi*2+0x22] +XDIS 10da6: MISC BASE D51C8D5C7923 lea r11, ptr [r17+rdi*2+0x23] +XDIS 10dac: MISC BASE D51C8D5C7A24 lea r11, ptr [r18+rdi*2+0x24] +XDIS 10db2: MISC BASE D51C8D5C7B25 lea r11, ptr [r19+rdi*2+0x25] +XDIS 10db8: MISC BASE D51C8D5C7C26 lea r11, ptr [r20+rdi*2+0x26] +XDIS 10dbe: MISC BASE D51C8D5C7D27 lea r11, ptr [r21+rdi*2+0x27] +XDIS 10dc4: MISC BASE D51C8D5C7E28 lea r11, ptr [r22+rdi*2+0x28] +XDIS 10dca: MISC BASE D51C8D5C7F29 lea r11, ptr [r23+rdi*2+0x29] +XDIS 10dd0: MISC BASE D51D8D5C782A lea r11, ptr [r24+rdi*2+0x2a] +XDIS 10dd6: MISC BASE D51D8D5C792B lea r11, ptr [r25+rdi*2+0x2b] +XDIS 10ddc: MISC BASE D51D8D5C7A2C lea r11, ptr [r26+rdi*2+0x2c] +XDIS 10de2: MISC BASE D51D8D5C7B2D lea r11, ptr [r27+rdi*2+0x2d] +XDIS 10de8: MISC BASE D51D8D5C7C2E lea r11, ptr [r28+rdi*2+0x2e] +XDIS 10dee: MISC BASE D51D8D5C7D2F lea r11, ptr [r29+rdi*2+0x2f] +XDIS 10df4: MISC BASE D51D8D5C7E30 lea r11, ptr [r30+rdi*2+0x30] +XDIS 10dfa: MISC BASE D51D8D5C7F31 lea r11, ptr [r31+rdi*2+0x31] +XDIS 10e00: MISC BASE D50E8D5C4013 lea r11, ptr [rax+r8*2+0x13] +XDIS 10e06: MISC BASE D50E8D5C4114 lea r11, ptr [rcx+r8*2+0x14] +XDIS 10e0c: MISC BASE D50E8D5C4215 lea r11, ptr [rdx+r8*2+0x15] +XDIS 10e12: MISC BASE D50E8D5C4316 lea r11, ptr [rbx+r8*2+0x16] +XDIS 10e18: MISC BASE D50E8D5C4417 lea r11, ptr [rsp+r8*2+0x17] +XDIS 10e1e: MISC BASE D50E8D5C4518 lea r11, ptr [rbp+r8*2+0x18] +XDIS 10e24: MISC BASE D50E8D5C4619 lea r11, ptr [rsi+r8*2+0x19] +XDIS 10e2a: MISC BASE D50E8D5C471A lea r11, ptr [rdi+r8*2+0x1a] +XDIS 10e30: MISC BASE D50F8D5C401B lea r11, ptr [r8+r8*2+0x1b] +XDIS 10e36: MISC BASE D50F8D5C411C lea r11, ptr [r9+r8*2+0x1c] +XDIS 10e3c: MISC BASE D50F8D5C421D lea r11, ptr [r10+r8*2+0x1d] +XDIS 10e42: MISC BASE D50F8D5C431E lea r11, ptr [r11+r8*2+0x1e] +XDIS 10e48: MISC BASE D50F8D5C441F lea r11, ptr [r12+r8*2+0x1f] +XDIS 10e4e: MISC BASE D50F8D5C4520 lea r11, ptr [r13+r8*2+0x20] +XDIS 10e54: MISC BASE D50F8D5C4621 lea r11, ptr [r14+r8*2+0x21] +XDIS 10e5a: MISC BASE D50F8D5C4722 lea r11, ptr [r15+r8*2+0x22] +XDIS 10e60: MISC BASE D51E8D5C4023 lea r11, ptr [r16+r8*2+0x23] +XDIS 10e66: MISC BASE D51E8D5C4124 lea r11, ptr [r17+r8*2+0x24] +XDIS 10e6c: MISC BASE D51E8D5C4225 lea r11, ptr [r18+r8*2+0x25] +XDIS 10e72: MISC BASE D51E8D5C4326 lea r11, ptr [r19+r8*2+0x26] +XDIS 10e78: MISC BASE D51E8D5C4427 lea r11, ptr [r20+r8*2+0x27] +XDIS 10e7e: MISC BASE D51E8D5C4528 lea r11, ptr [r21+r8*2+0x28] +XDIS 10e84: MISC BASE D51E8D5C4629 lea r11, ptr [r22+r8*2+0x29] +XDIS 10e8a: MISC BASE D51E8D5C472A lea r11, ptr [r23+r8*2+0x2a] +XDIS 10e90: MISC BASE D51F8D5C402B lea r11, ptr [r24+r8*2+0x2b] +XDIS 10e96: MISC BASE D51F8D5C412C lea r11, ptr [r25+r8*2+0x2c] +XDIS 10e9c: MISC BASE D51F8D5C422D lea r11, ptr [r26+r8*2+0x2d] +XDIS 10ea2: MISC BASE D51F8D5C432E lea r11, ptr [r27+r8*2+0x2e] +XDIS 10ea8: MISC BASE D51F8D5C442F lea r11, ptr [r28+r8*2+0x2f] +XDIS 10eae: MISC BASE D51F8D5C4530 lea r11, ptr [r29+r8*2+0x30] +XDIS 10eb4: MISC BASE D51F8D5C4631 lea r11, ptr [r30+r8*2+0x31] +XDIS 10eba: MISC BASE D51F8D5C4732 lea r11, ptr [r31+r8*2+0x32] +XDIS 10ec0: MISC BASE D50E8D5C4814 lea r11, ptr [rax+r9*2+0x14] +XDIS 10ec6: MISC BASE D50E8D5C4915 lea r11, ptr [rcx+r9*2+0x15] +XDIS 10ecc: MISC BASE D50E8D5C4A16 lea r11, ptr [rdx+r9*2+0x16] +XDIS 10ed2: MISC BASE D50E8D5C4B17 lea r11, ptr [rbx+r9*2+0x17] +XDIS 10ed8: MISC BASE D50E8D5C4C18 lea r11, ptr [rsp+r9*2+0x18] +XDIS 10ede: MISC BASE D50E8D5C4D19 lea r11, ptr [rbp+r9*2+0x19] +XDIS 10ee4: MISC BASE D50E8D5C4E1A lea r11, ptr [rsi+r9*2+0x1a] +XDIS 10eea: MISC BASE D50E8D5C4F1B lea r11, ptr [rdi+r9*2+0x1b] +XDIS 10ef0: MISC BASE D50F8D5C481C lea r11, ptr [r8+r9*2+0x1c] +XDIS 10ef6: MISC BASE D50F8D5C491D lea r11, ptr [r9+r9*2+0x1d] +XDIS 10efc: MISC BASE D50F8D5C4A1E lea r11, ptr [r10+r9*2+0x1e] +XDIS 10f02: MISC BASE D50F8D5C4B1F lea r11, ptr [r11+r9*2+0x1f] +XDIS 10f08: MISC BASE D50F8D5C4C20 lea r11, ptr [r12+r9*2+0x20] +XDIS 10f0e: MISC BASE D50F8D5C4D21 lea r11, ptr [r13+r9*2+0x21] +XDIS 10f14: MISC BASE D50F8D5C4E22 lea r11, ptr [r14+r9*2+0x22] +XDIS 10f1a: MISC BASE D50F8D5C4F23 lea r11, ptr [r15+r9*2+0x23] +XDIS 10f20: MISC BASE D51E8D5C4824 lea r11, ptr [r16+r9*2+0x24] +XDIS 10f26: MISC BASE D51E8D5C4925 lea r11, ptr [r17+r9*2+0x25] +XDIS 10f2c: MISC BASE D51E8D5C4A26 lea r11, ptr [r18+r9*2+0x26] +XDIS 10f32: MISC BASE D51E8D5C4B27 lea r11, ptr [r19+r9*2+0x27] +XDIS 10f38: MISC BASE D51E8D5C4C28 lea r11, ptr [r20+r9*2+0x28] +XDIS 10f3e: MISC BASE D51E8D5C4D29 lea r11, ptr [r21+r9*2+0x29] +XDIS 10f44: MISC BASE D51E8D5C4E2A lea r11, ptr [r22+r9*2+0x2a] +XDIS 10f4a: MISC BASE D51E8D5C4F2B lea r11, ptr [r23+r9*2+0x2b] +XDIS 10f50: MISC BASE D51F8D5C482C lea r11, ptr [r24+r9*2+0x2c] +XDIS 10f56: MISC BASE D51F8D5C492D lea r11, ptr [r25+r9*2+0x2d] +XDIS 10f5c: MISC BASE D51F8D5C4A2E lea r11, ptr [r26+r9*2+0x2e] +XDIS 10f62: MISC BASE D51F8D5C4B2F lea r11, ptr [r27+r9*2+0x2f] +XDIS 10f68: MISC BASE D51F8D5C4C30 lea r11, ptr [r28+r9*2+0x30] +XDIS 10f6e: MISC BASE D51F8D5C4D31 lea r11, ptr [r29+r9*2+0x31] +XDIS 10f74: MISC BASE D51F8D5C4E32 lea r11, ptr [r30+r9*2+0x32] +XDIS 10f7a: MISC BASE D51F8D5C4F33 lea r11, ptr [r31+r9*2+0x33] +XDIS 10f80: MISC BASE D50E8D5C5015 lea r11, ptr [rax+r10*2+0x15] +XDIS 10f86: MISC BASE D50E8D5C5116 lea r11, ptr [rcx+r10*2+0x16] +XDIS 10f8c: MISC BASE D50E8D5C5217 lea r11, ptr [rdx+r10*2+0x17] +XDIS 10f92: MISC BASE D50E8D5C5318 lea r11, ptr [rbx+r10*2+0x18] +XDIS 10f98: MISC BASE D50E8D5C5419 lea r11, ptr [rsp+r10*2+0x19] +XDIS 10f9e: MISC BASE D50E8D5C551A lea r11, ptr [rbp+r10*2+0x1a] +XDIS 10fa4: MISC BASE D50E8D5C561B lea r11, ptr [rsi+r10*2+0x1b] +XDIS 10faa: MISC BASE D50E8D5C571C lea r11, ptr [rdi+r10*2+0x1c] +XDIS 10fb0: MISC BASE D50F8D5C501D lea r11, ptr [r8+r10*2+0x1d] +XDIS 10fb6: MISC BASE D50F8D5C511E lea r11, ptr [r9+r10*2+0x1e] +XDIS 10fbc: MISC BASE D50F8D5C521F lea r11, ptr [r10+r10*2+0x1f] +XDIS 10fc2: MISC BASE D50F8D5C5320 lea r11, ptr [r11+r10*2+0x20] +XDIS 10fc8: MISC BASE D50F8D5C5421 lea r11, ptr [r12+r10*2+0x21] +XDIS 10fce: MISC BASE D50F8D5C5522 lea r11, ptr [r13+r10*2+0x22] +XDIS 10fd4: MISC BASE D50F8D5C5623 lea r11, ptr [r14+r10*2+0x23] +XDIS 10fda: MISC BASE D50F8D5C5724 lea r11, ptr [r15+r10*2+0x24] +XDIS 10fe0: MISC BASE D51E8D5C5025 lea r11, ptr [r16+r10*2+0x25] +XDIS 10fe6: MISC BASE D51E8D5C5126 lea r11, ptr [r17+r10*2+0x26] +XDIS 10fec: MISC BASE D51E8D5C5227 lea r11, ptr [r18+r10*2+0x27] +XDIS 10ff2: MISC BASE D51E8D5C5328 lea r11, ptr [r19+r10*2+0x28] +XDIS 10ff8: MISC BASE D51E8D5C5429 lea r11, ptr [r20+r10*2+0x29] +XDIS 10ffe: MISC BASE D51E8D5C552A lea r11, ptr [r21+r10*2+0x2a] +XDIS 11004: MISC BASE D51E8D5C562B lea r11, ptr [r22+r10*2+0x2b] +XDIS 1100a: MISC BASE D51E8D5C572C lea r11, ptr [r23+r10*2+0x2c] +XDIS 11010: MISC BASE D51F8D5C502D lea r11, ptr [r24+r10*2+0x2d] +XDIS 11016: MISC BASE D51F8D5C512E lea r11, ptr [r25+r10*2+0x2e] +XDIS 1101c: MISC BASE D51F8D5C522F lea r11, ptr [r26+r10*2+0x2f] +XDIS 11022: MISC BASE D51F8D5C5330 lea r11, ptr [r27+r10*2+0x30] +XDIS 11028: MISC BASE D51F8D5C5431 lea r11, ptr [r28+r10*2+0x31] +XDIS 1102e: MISC BASE D51F8D5C5532 lea r11, ptr [r29+r10*2+0x32] +XDIS 11034: MISC BASE D51F8D5C5633 lea r11, ptr [r30+r10*2+0x33] +XDIS 1103a: MISC BASE D51F8D5C5734 lea r11, ptr [r31+r10*2+0x34] +XDIS 11040: MISC BASE D50E8D5C5816 lea r11, ptr [rax+r11*2+0x16] +XDIS 11046: MISC BASE D50E8D5C5917 lea r11, ptr [rcx+r11*2+0x17] +XDIS 1104c: MISC BASE D50E8D5C5A18 lea r11, ptr [rdx+r11*2+0x18] +XDIS 11052: MISC BASE D50E8D5C5B19 lea r11, ptr [rbx+r11*2+0x19] +XDIS 11058: MISC BASE D50E8D5C5C1A lea r11, ptr [rsp+r11*2+0x1a] +XDIS 1105e: MISC BASE D50E8D5C5D1B lea r11, ptr [rbp+r11*2+0x1b] +XDIS 11064: MISC BASE D50E8D5C5E1C lea r11, ptr [rsi+r11*2+0x1c] +XDIS 1106a: MISC BASE D50E8D5C5F1D lea r11, ptr [rdi+r11*2+0x1d] +XDIS 11070: MISC BASE D50F8D5C581E lea r11, ptr [r8+r11*2+0x1e] +XDIS 11076: MISC BASE D50F8D5C591F lea r11, ptr [r9+r11*2+0x1f] +XDIS 1107c: MISC BASE D50F8D5C5A20 lea r11, ptr [r10+r11*2+0x20] +XDIS 11082: MISC BASE D50F8D5C5B21 lea r11, ptr [r11+r11*2+0x21] +XDIS 11088: MISC BASE D50F8D5C5C22 lea r11, ptr [r12+r11*2+0x22] +XDIS 1108e: MISC BASE D50F8D5C5D23 lea r11, ptr [r13+r11*2+0x23] +XDIS 11094: MISC BASE D50F8D5C5E24 lea r11, ptr [r14+r11*2+0x24] +XDIS 1109a: MISC BASE D50F8D5C5F25 lea r11, ptr [r15+r11*2+0x25] +XDIS 110a0: MISC BASE D51E8D5C5826 lea r11, ptr [r16+r11*2+0x26] +XDIS 110a6: MISC BASE D51E8D5C5927 lea r11, ptr [r17+r11*2+0x27] +XDIS 110ac: MISC BASE D51E8D5C5A28 lea r11, ptr [r18+r11*2+0x28] +XDIS 110b2: MISC BASE D51E8D5C5B29 lea r11, ptr [r19+r11*2+0x29] +XDIS 110b8: MISC BASE D51E8D5C5C2A lea r11, ptr [r20+r11*2+0x2a] +XDIS 110be: MISC BASE D51E8D5C5D2B lea r11, ptr [r21+r11*2+0x2b] +XDIS 110c4: MISC BASE D51E8D5C5E2C lea r11, ptr [r22+r11*2+0x2c] +XDIS 110ca: MISC BASE D51E8D5C5F2D lea r11, ptr [r23+r11*2+0x2d] +XDIS 110d0: MISC BASE D51F8D5C582E lea r11, ptr [r24+r11*2+0x2e] +XDIS 110d6: MISC BASE D51F8D5C592F lea r11, ptr [r25+r11*2+0x2f] +XDIS 110dc: MISC BASE D51F8D5C5A30 lea r11, ptr [r26+r11*2+0x30] +XDIS 110e2: MISC BASE D51F8D5C5B31 lea r11, ptr [r27+r11*2+0x31] +XDIS 110e8: MISC BASE D51F8D5C5C32 lea r11, ptr [r28+r11*2+0x32] +XDIS 110ee: MISC BASE D51F8D5C5D33 lea r11, ptr [r29+r11*2+0x33] +XDIS 110f4: MISC BASE D51F8D5C5E34 lea r11, ptr [r30+r11*2+0x34] +XDIS 110fa: MISC BASE D51F8D5C5F35 lea r11, ptr [r31+r11*2+0x35] +XDIS 11100: MISC BASE D50E8D5C6017 lea r11, ptr [rax+r12*2+0x17] +XDIS 11106: MISC BASE D50E8D5C6118 lea r11, ptr [rcx+r12*2+0x18] +XDIS 1110c: MISC BASE D50E8D5C6219 lea r11, ptr [rdx+r12*2+0x19] +XDIS 11112: MISC BASE D50E8D5C631A lea r11, ptr [rbx+r12*2+0x1a] +XDIS 11118: MISC BASE D50E8D5C641B lea r11, ptr [rsp+r12*2+0x1b] +XDIS 1111e: MISC BASE D50E8D5C651C lea r11, ptr [rbp+r12*2+0x1c] +XDIS 11124: MISC BASE D50E8D5C661D lea r11, ptr [rsi+r12*2+0x1d] +XDIS 1112a: MISC BASE D50E8D5C671E lea r11, ptr [rdi+r12*2+0x1e] +XDIS 11130: MISC BASE D50F8D5C601F lea r11, ptr [r8+r12*2+0x1f] +XDIS 11136: MISC BASE D50F8D5C6120 lea r11, ptr [r9+r12*2+0x20] +XDIS 1113c: MISC BASE D50F8D5C6221 lea r11, ptr [r10+r12*2+0x21] +XDIS 11142: MISC BASE D50F8D5C6322 lea r11, ptr [r11+r12*2+0x22] +XDIS 11148: MISC BASE D50F8D5C6423 lea r11, ptr [r12+r12*2+0x23] +XDIS 1114e: MISC BASE D50F8D5C6524 lea r11, ptr [r13+r12*2+0x24] +XDIS 11154: MISC BASE D50F8D5C6625 lea r11, ptr [r14+r12*2+0x25] +XDIS 1115a: MISC BASE D50F8D5C6726 lea r11, ptr [r15+r12*2+0x26] +XDIS 11160: MISC BASE D51E8D5C6027 lea r11, ptr [r16+r12*2+0x27] +XDIS 11166: MISC BASE D51E8D5C6128 lea r11, ptr [r17+r12*2+0x28] +XDIS 1116c: MISC BASE D51E8D5C6229 lea r11, ptr [r18+r12*2+0x29] +XDIS 11172: MISC BASE D51E8D5C632A lea r11, ptr [r19+r12*2+0x2a] +XDIS 11178: MISC BASE D51E8D5C642B lea r11, ptr [r20+r12*2+0x2b] +XDIS 1117e: MISC BASE D51E8D5C652C lea r11, ptr [r21+r12*2+0x2c] +XDIS 11184: MISC BASE D51E8D5C662D lea r11, ptr [r22+r12*2+0x2d] +XDIS 1118a: MISC BASE D51E8D5C672E lea r11, ptr [r23+r12*2+0x2e] +XDIS 11190: MISC BASE D51F8D5C602F lea r11, ptr [r24+r12*2+0x2f] +XDIS 11196: MISC BASE D51F8D5C6130 lea r11, ptr [r25+r12*2+0x30] +XDIS 1119c: MISC BASE D51F8D5C6231 lea r11, ptr [r26+r12*2+0x31] +XDIS 111a2: MISC BASE D51F8D5C6332 lea r11, ptr [r27+r12*2+0x32] +XDIS 111a8: MISC BASE D51F8D5C6433 lea r11, ptr [r28+r12*2+0x33] +XDIS 111ae: MISC BASE D51F8D5C6534 lea r11, ptr [r29+r12*2+0x34] +XDIS 111b4: MISC BASE D51F8D5C6635 lea r11, ptr [r30+r12*2+0x35] +XDIS 111ba: MISC BASE D51F8D5C6736 lea r11, ptr [r31+r12*2+0x36] +XDIS 111c0: MISC BASE D50E8D5C6818 lea r11, ptr [rax+r13*2+0x18] +XDIS 111c6: MISC BASE D50E8D5C6919 lea r11, ptr [rcx+r13*2+0x19] +XDIS 111cc: MISC BASE D50E8D5C6A1A lea r11, ptr [rdx+r13*2+0x1a] +XDIS 111d2: MISC BASE D50E8D5C6B1B lea r11, ptr [rbx+r13*2+0x1b] +XDIS 111d8: MISC BASE D50E8D5C6C1C lea r11, ptr [rsp+r13*2+0x1c] +XDIS 111de: MISC BASE D50E8D5C6D1D lea r11, ptr [rbp+r13*2+0x1d] +XDIS 111e4: MISC BASE D50E8D5C6E1E lea r11, ptr [rsi+r13*2+0x1e] +XDIS 111ea: MISC BASE D50E8D5C6F1F lea r11, ptr [rdi+r13*2+0x1f] +XDIS 111f0: MISC BASE D50F8D5C6820 lea r11, ptr [r8+r13*2+0x20] +XDIS 111f6: MISC BASE D50F8D5C6921 lea r11, ptr [r9+r13*2+0x21] +XDIS 111fc: MISC BASE D50F8D5C6A22 lea r11, ptr [r10+r13*2+0x22] +XDIS 11202: MISC BASE D50F8D5C6B23 lea r11, ptr [r11+r13*2+0x23] +XDIS 11208: MISC BASE D50F8D5C6C24 lea r11, ptr [r12+r13*2+0x24] +XDIS 1120e: MISC BASE D50F8D5C6D25 lea r11, ptr [r13+r13*2+0x25] +XDIS 11214: MISC BASE D50F8D5C6E26 lea r11, ptr [r14+r13*2+0x26] +XDIS 1121a: MISC BASE D50F8D5C6F27 lea r11, ptr [r15+r13*2+0x27] +XDIS 11220: MISC BASE D51E8D5C6828 lea r11, ptr [r16+r13*2+0x28] +XDIS 11226: MISC BASE D51E8D5C6929 lea r11, ptr [r17+r13*2+0x29] +XDIS 1122c: MISC BASE D51E8D5C6A2A lea r11, ptr [r18+r13*2+0x2a] +XDIS 11232: MISC BASE D51E8D5C6B2B lea r11, ptr [r19+r13*2+0x2b] +XDIS 11238: MISC BASE D51E8D5C6C2C lea r11, ptr [r20+r13*2+0x2c] +XDIS 1123e: MISC BASE D51E8D5C6D2D lea r11, ptr [r21+r13*2+0x2d] +XDIS 11244: MISC BASE D51E8D5C6E2E lea r11, ptr [r22+r13*2+0x2e] +XDIS 1124a: MISC BASE D51E8D5C6F2F lea r11, ptr [r23+r13*2+0x2f] +XDIS 11250: MISC BASE D51F8D5C6830 lea r11, ptr [r24+r13*2+0x30] +XDIS 11256: MISC BASE D51F8D5C6931 lea r11, ptr [r25+r13*2+0x31] +XDIS 1125c: MISC BASE D51F8D5C6A32 lea r11, ptr [r26+r13*2+0x32] +XDIS 11262: MISC BASE D51F8D5C6B33 lea r11, ptr [r27+r13*2+0x33] +XDIS 11268: MISC BASE D51F8D5C6C34 lea r11, ptr [r28+r13*2+0x34] +XDIS 1126e: MISC BASE D51F8D5C6D35 lea r11, ptr [r29+r13*2+0x35] +XDIS 11274: MISC BASE D51F8D5C6E36 lea r11, ptr [r30+r13*2+0x36] +XDIS 1127a: MISC BASE D51F8D5C6F37 lea r11, ptr [r31+r13*2+0x37] +XDIS 11280: MISC BASE D50E8D5C7019 lea r11, ptr [rax+r14*2+0x19] +XDIS 11286: MISC BASE D50E8D5C711A lea r11, ptr [rcx+r14*2+0x1a] +XDIS 1128c: MISC BASE D50E8D5C721B lea r11, ptr [rdx+r14*2+0x1b] +XDIS 11292: MISC BASE D50E8D5C731C lea r11, ptr [rbx+r14*2+0x1c] +XDIS 11298: MISC BASE D50E8D5C741D lea r11, ptr [rsp+r14*2+0x1d] +XDIS 1129e: MISC BASE D50E8D5C751E lea r11, ptr [rbp+r14*2+0x1e] +XDIS 112a4: MISC BASE D50E8D5C761F lea r11, ptr [rsi+r14*2+0x1f] +XDIS 112aa: MISC BASE D50E8D5C7720 lea r11, ptr [rdi+r14*2+0x20] +XDIS 112b0: MISC BASE D50F8D5C7021 lea r11, ptr [r8+r14*2+0x21] +XDIS 112b6: MISC BASE D50F8D5C7122 lea r11, ptr [r9+r14*2+0x22] +XDIS 112bc: MISC BASE D50F8D5C7223 lea r11, ptr [r10+r14*2+0x23] +XDIS 112c2: MISC BASE D50F8D5C7324 lea r11, ptr [r11+r14*2+0x24] +XDIS 112c8: MISC BASE D50F8D5C7425 lea r11, ptr [r12+r14*2+0x25] +XDIS 112ce: MISC BASE D50F8D5C7526 lea r11, ptr [r13+r14*2+0x26] +XDIS 112d4: MISC BASE D50F8D5C7627 lea r11, ptr [r14+r14*2+0x27] +XDIS 112da: MISC BASE D50F8D5C7728 lea r11, ptr [r15+r14*2+0x28] +XDIS 112e0: MISC BASE D51E8D5C7029 lea r11, ptr [r16+r14*2+0x29] +XDIS 112e6: MISC BASE D51E8D5C712A lea r11, ptr [r17+r14*2+0x2a] +XDIS 112ec: MISC BASE D51E8D5C722B lea r11, ptr [r18+r14*2+0x2b] +XDIS 112f2: MISC BASE D51E8D5C732C lea r11, ptr [r19+r14*2+0x2c] +XDIS 112f8: MISC BASE D51E8D5C742D lea r11, ptr [r20+r14*2+0x2d] +XDIS 112fe: MISC BASE D51E8D5C752E lea r11, ptr [r21+r14*2+0x2e] +XDIS 11304: MISC BASE D51E8D5C762F lea r11, ptr [r22+r14*2+0x2f] +XDIS 1130a: MISC BASE D51E8D5C7730 lea r11, ptr [r23+r14*2+0x30] +XDIS 11310: MISC BASE D51F8D5C7031 lea r11, ptr [r24+r14*2+0x31] +XDIS 11316: MISC BASE D51F8D5C7132 lea r11, ptr [r25+r14*2+0x32] +XDIS 1131c: MISC BASE D51F8D5C7233 lea r11, ptr [r26+r14*2+0x33] +XDIS 11322: MISC BASE D51F8D5C7334 lea r11, ptr [r27+r14*2+0x34] +XDIS 11328: MISC BASE D51F8D5C7435 lea r11, ptr [r28+r14*2+0x35] +XDIS 1132e: MISC BASE D51F8D5C7536 lea r11, ptr [r29+r14*2+0x36] +XDIS 11334: MISC BASE D51F8D5C7637 lea r11, ptr [r30+r14*2+0x37] +XDIS 1133a: MISC BASE D51F8D5C7738 lea r11, ptr [r31+r14*2+0x38] +XDIS 11340: MISC BASE D50E8D5C781A lea r11, ptr [rax+r15*2+0x1a] +XDIS 11346: MISC BASE D50E8D5C791B lea r11, ptr [rcx+r15*2+0x1b] +XDIS 1134c: MISC BASE D50E8D5C7A1C lea r11, ptr [rdx+r15*2+0x1c] +XDIS 11352: MISC BASE D50E8D5C7B1D lea r11, ptr [rbx+r15*2+0x1d] +XDIS 11358: MISC BASE D50E8D5C7C1E lea r11, ptr [rsp+r15*2+0x1e] +XDIS 1135e: MISC BASE D50E8D5C7D1F lea r11, ptr [rbp+r15*2+0x1f] +XDIS 11364: MISC BASE D50E8D5C7E20 lea r11, ptr [rsi+r15*2+0x20] +XDIS 1136a: MISC BASE D50E8D5C7F21 lea r11, ptr [rdi+r15*2+0x21] +XDIS 11370: MISC BASE D50F8D5C7822 lea r11, ptr [r8+r15*2+0x22] +XDIS 11376: MISC BASE D50F8D5C7923 lea r11, ptr [r9+r15*2+0x23] +XDIS 1137c: MISC BASE D50F8D5C7A24 lea r11, ptr [r10+r15*2+0x24] +XDIS 11382: MISC BASE D50F8D5C7B25 lea r11, ptr [r11+r15*2+0x25] +XDIS 11388: MISC BASE D50F8D5C7C26 lea r11, ptr [r12+r15*2+0x26] +XDIS 1138e: MISC BASE D50F8D5C7D27 lea r11, ptr [r13+r15*2+0x27] +XDIS 11394: MISC BASE D50F8D5C7E28 lea r11, ptr [r14+r15*2+0x28] +XDIS 1139a: MISC BASE D50F8D5C7F29 lea r11, ptr [r15+r15*2+0x29] +XDIS 113a0: MISC BASE D51E8D5C782A lea r11, ptr [r16+r15*2+0x2a] +XDIS 113a6: MISC BASE D51E8D5C792B lea r11, ptr [r17+r15*2+0x2b] +XDIS 113ac: MISC BASE D51E8D5C7A2C lea r11, ptr [r18+r15*2+0x2c] +XDIS 113b2: MISC BASE D51E8D5C7B2D lea r11, ptr [r19+r15*2+0x2d] +XDIS 113b8: MISC BASE D51E8D5C7C2E lea r11, ptr [r20+r15*2+0x2e] +XDIS 113be: MISC BASE D51E8D5C7D2F lea r11, ptr [r21+r15*2+0x2f] +XDIS 113c4: MISC BASE D51E8D5C7E30 lea r11, ptr [r22+r15*2+0x30] +XDIS 113ca: MISC BASE D51E8D5C7F31 lea r11, ptr [r23+r15*2+0x31] +XDIS 113d0: MISC BASE D51F8D5C7832 lea r11, ptr [r24+r15*2+0x32] +XDIS 113d6: MISC BASE D51F8D5C7933 lea r11, ptr [r25+r15*2+0x33] +XDIS 113dc: MISC BASE D51F8D5C7A34 lea r11, ptr [r26+r15*2+0x34] +XDIS 113e2: MISC BASE D51F8D5C7B35 lea r11, ptr [r27+r15*2+0x35] +XDIS 113e8: MISC BASE D51F8D5C7C36 lea r11, ptr [r28+r15*2+0x36] +XDIS 113ee: MISC BASE D51F8D5C7D37 lea r11, ptr [r29+r15*2+0x37] +XDIS 113f4: MISC BASE D51F8D5C7E38 lea r11, ptr [r30+r15*2+0x38] +XDIS 113fa: MISC BASE D51F8D5C7F39 lea r11, ptr [r31+r15*2+0x39] +XDIS 11400: MISC BASE D52C8D5C401B lea r11, ptr [rax+r16*2+0x1b] +XDIS 11406: MISC BASE D52C8D5C411C lea r11, ptr [rcx+r16*2+0x1c] +XDIS 1140c: MISC BASE D52C8D5C421D lea r11, ptr [rdx+r16*2+0x1d] +XDIS 11412: MISC BASE D52C8D5C431E lea r11, ptr [rbx+r16*2+0x1e] +XDIS 11418: MISC BASE D52C8D5C441F lea r11, ptr [rsp+r16*2+0x1f] +XDIS 1141e: MISC BASE D52C8D5C4520 lea r11, ptr [rbp+r16*2+0x20] +XDIS 11424: MISC BASE D52C8D5C4621 lea r11, ptr [rsi+r16*2+0x21] +XDIS 1142a: MISC BASE D52C8D5C4722 lea r11, ptr [rdi+r16*2+0x22] +XDIS 11430: MISC BASE D52D8D5C4023 lea r11, ptr [r8+r16*2+0x23] +XDIS 11436: MISC BASE D52D8D5C4124 lea r11, ptr [r9+r16*2+0x24] +XDIS 1143c: MISC BASE D52D8D5C4225 lea r11, ptr [r10+r16*2+0x25] +XDIS 11442: MISC BASE D52D8D5C4326 lea r11, ptr [r11+r16*2+0x26] +XDIS 11448: MISC BASE D52D8D5C4427 lea r11, ptr [r12+r16*2+0x27] +XDIS 1144e: MISC BASE D52D8D5C4528 lea r11, ptr [r13+r16*2+0x28] +XDIS 11454: MISC BASE D52D8D5C4629 lea r11, ptr [r14+r16*2+0x29] +XDIS 1145a: MISC BASE D52D8D5C472A lea r11, ptr [r15+r16*2+0x2a] +XDIS 11460: MISC BASE D53C8D5C402B lea r11, ptr [r16+r16*2+0x2b] +XDIS 11466: MISC BASE D53C8D5C412C lea r11, ptr [r17+r16*2+0x2c] +XDIS 1146c: MISC BASE D53C8D5C422D lea r11, ptr [r18+r16*2+0x2d] +XDIS 11472: MISC BASE D53C8D5C432E lea r11, ptr [r19+r16*2+0x2e] +XDIS 11478: MISC BASE D53C8D5C442F lea r11, ptr [r20+r16*2+0x2f] +XDIS 1147e: MISC BASE D53C8D5C4530 lea r11, ptr [r21+r16*2+0x30] +XDIS 11484: MISC BASE D53C8D5C4631 lea r11, ptr [r22+r16*2+0x31] +XDIS 1148a: MISC BASE D53C8D5C4732 lea r11, ptr [r23+r16*2+0x32] +XDIS 11490: MISC BASE D53D8D5C4033 lea r11, ptr [r24+r16*2+0x33] +XDIS 11496: MISC BASE D53D8D5C4134 lea r11, ptr [r25+r16*2+0x34] +XDIS 1149c: MISC BASE D53D8D5C4235 lea r11, ptr [r26+r16*2+0x35] +XDIS 114a2: MISC BASE D53D8D5C4336 lea r11, ptr [r27+r16*2+0x36] +XDIS 114a8: MISC BASE D53D8D5C4437 lea r11, ptr [r28+r16*2+0x37] +XDIS 114ae: MISC BASE D53D8D5C4538 lea r11, ptr [r29+r16*2+0x38] +XDIS 114b4: MISC BASE D53D8D5C4639 lea r11, ptr [r30+r16*2+0x39] +XDIS 114ba: MISC BASE D53D8D5C473A lea r11, ptr [r31+r16*2+0x3a] +XDIS 114c0: MISC BASE D52C8D5C481C lea r11, ptr [rax+r17*2+0x1c] +XDIS 114c6: MISC BASE D52C8D5C491D lea r11, ptr [rcx+r17*2+0x1d] +XDIS 114cc: MISC BASE D52C8D5C4A1E lea r11, ptr [rdx+r17*2+0x1e] +XDIS 114d2: MISC BASE D52C8D5C4B1F lea r11, ptr [rbx+r17*2+0x1f] +XDIS 114d8: MISC BASE D52C8D5C4C20 lea r11, ptr [rsp+r17*2+0x20] +XDIS 114de: MISC BASE D52C8D5C4D21 lea r11, ptr [rbp+r17*2+0x21] +XDIS 114e4: MISC BASE D52C8D5C4E22 lea r11, ptr [rsi+r17*2+0x22] +XDIS 114ea: MISC BASE D52C8D5C4F23 lea r11, ptr [rdi+r17*2+0x23] +XDIS 114f0: MISC BASE D52D8D5C4824 lea r11, ptr [r8+r17*2+0x24] +XDIS 114f6: MISC BASE D52D8D5C4925 lea r11, ptr [r9+r17*2+0x25] +XDIS 114fc: MISC BASE D52D8D5C4A26 lea r11, ptr [r10+r17*2+0x26] +XDIS 11502: MISC BASE D52D8D5C4B27 lea r11, ptr [r11+r17*2+0x27] +XDIS 11508: MISC BASE D52D8D5C4C28 lea r11, ptr [r12+r17*2+0x28] +XDIS 1150e: MISC BASE D52D8D5C4D29 lea r11, ptr [r13+r17*2+0x29] +XDIS 11514: MISC BASE D52D8D5C4E2A lea r11, ptr [r14+r17*2+0x2a] +XDIS 1151a: MISC BASE D52D8D5C4F2B lea r11, ptr [r15+r17*2+0x2b] +XDIS 11520: MISC BASE D53C8D5C482C lea r11, ptr [r16+r17*2+0x2c] +XDIS 11526: MISC BASE D53C8D5C492D lea r11, ptr [r17+r17*2+0x2d] +XDIS 1152c: MISC BASE D53C8D5C4A2E lea r11, ptr [r18+r17*2+0x2e] +XDIS 11532: MISC BASE D53C8D5C4B2F lea r11, ptr [r19+r17*2+0x2f] +XDIS 11538: MISC BASE D53C8D5C4C30 lea r11, ptr [r20+r17*2+0x30] +XDIS 1153e: MISC BASE D53C8D5C4D31 lea r11, ptr [r21+r17*2+0x31] +XDIS 11544: MISC BASE D53C8D5C4E32 lea r11, ptr [r22+r17*2+0x32] +XDIS 1154a: MISC BASE D53C8D5C4F33 lea r11, ptr [r23+r17*2+0x33] +XDIS 11550: MISC BASE D53D8D5C4834 lea r11, ptr [r24+r17*2+0x34] +XDIS 11556: MISC BASE D53D8D5C4935 lea r11, ptr [r25+r17*2+0x35] +XDIS 1155c: MISC BASE D53D8D5C4A36 lea r11, ptr [r26+r17*2+0x36] +XDIS 11562: MISC BASE D53D8D5C4B37 lea r11, ptr [r27+r17*2+0x37] +XDIS 11568: MISC BASE D53D8D5C4C38 lea r11, ptr [r28+r17*2+0x38] +XDIS 1156e: MISC BASE D53D8D5C4D39 lea r11, ptr [r29+r17*2+0x39] +XDIS 11574: MISC BASE D53D8D5C4E3A lea r11, ptr [r30+r17*2+0x3a] +XDIS 1157a: MISC BASE D53D8D5C4F3B lea r11, ptr [r31+r17*2+0x3b] +XDIS 11580: MISC BASE D52C8D5C501D lea r11, ptr [rax+r18*2+0x1d] +XDIS 11586: MISC BASE D52C8D5C511E lea r11, ptr [rcx+r18*2+0x1e] +XDIS 1158c: MISC BASE D52C8D5C521F lea r11, ptr [rdx+r18*2+0x1f] +XDIS 11592: MISC BASE D52C8D5C5320 lea r11, ptr [rbx+r18*2+0x20] +XDIS 11598: MISC BASE D52C8D5C5421 lea r11, ptr [rsp+r18*2+0x21] +XDIS 1159e: MISC BASE D52C8D5C5522 lea r11, ptr [rbp+r18*2+0x22] +XDIS 115a4: MISC BASE D52C8D5C5623 lea r11, ptr [rsi+r18*2+0x23] +XDIS 115aa: MISC BASE D52C8D5C5724 lea r11, ptr [rdi+r18*2+0x24] +XDIS 115b0: MISC BASE D52D8D5C5025 lea r11, ptr [r8+r18*2+0x25] +XDIS 115b6: MISC BASE D52D8D5C5126 lea r11, ptr [r9+r18*2+0x26] +XDIS 115bc: MISC BASE D52D8D5C5227 lea r11, ptr [r10+r18*2+0x27] +XDIS 115c2: MISC BASE D52D8D5C5328 lea r11, ptr [r11+r18*2+0x28] +XDIS 115c8: MISC BASE D52D8D5C5429 lea r11, ptr [r12+r18*2+0x29] +XDIS 115ce: MISC BASE D52D8D5C552A lea r11, ptr [r13+r18*2+0x2a] +XDIS 115d4: MISC BASE D52D8D5C562B lea r11, ptr [r14+r18*2+0x2b] +XDIS 115da: MISC BASE D52D8D5C572C lea r11, ptr [r15+r18*2+0x2c] +XDIS 115e0: MISC BASE D53C8D5C502D lea r11, ptr [r16+r18*2+0x2d] +XDIS 115e6: MISC BASE D53C8D5C512E lea r11, ptr [r17+r18*2+0x2e] +XDIS 115ec: MISC BASE D53C8D5C522F lea r11, ptr [r18+r18*2+0x2f] +XDIS 115f2: MISC BASE D53C8D5C5330 lea r11, ptr [r19+r18*2+0x30] +XDIS 115f8: MISC BASE D53C8D5C5431 lea r11, ptr [r20+r18*2+0x31] +XDIS 115fe: MISC BASE D53C8D5C5532 lea r11, ptr [r21+r18*2+0x32] +XDIS 11604: MISC BASE D53C8D5C5633 lea r11, ptr [r22+r18*2+0x33] +XDIS 1160a: MISC BASE D53C8D5C5734 lea r11, ptr [r23+r18*2+0x34] +XDIS 11610: MISC BASE D53D8D5C5035 lea r11, ptr [r24+r18*2+0x35] +XDIS 11616: MISC BASE D53D8D5C5136 lea r11, ptr [r25+r18*2+0x36] +XDIS 1161c: MISC BASE D53D8D5C5237 lea r11, ptr [r26+r18*2+0x37] +XDIS 11622: MISC BASE D53D8D5C5338 lea r11, ptr [r27+r18*2+0x38] +XDIS 11628: MISC BASE D53D8D5C5439 lea r11, ptr [r28+r18*2+0x39] +XDIS 1162e: MISC BASE D53D8D5C553A lea r11, ptr [r29+r18*2+0x3a] +XDIS 11634: MISC BASE D53D8D5C563B lea r11, ptr [r30+r18*2+0x3b] +XDIS 1163a: MISC BASE D53D8D5C573C lea r11, ptr [r31+r18*2+0x3c] +XDIS 11640: MISC BASE D52C8D5C581E lea r11, ptr [rax+r19*2+0x1e] +XDIS 11646: MISC BASE D52C8D5C591F lea r11, ptr [rcx+r19*2+0x1f] +XDIS 1164c: MISC BASE D52C8D5C5A20 lea r11, ptr [rdx+r19*2+0x20] +XDIS 11652: MISC BASE D52C8D5C5B21 lea r11, ptr [rbx+r19*2+0x21] +XDIS 11658: MISC BASE D52C8D5C5C22 lea r11, ptr [rsp+r19*2+0x22] +XDIS 1165e: MISC BASE D52C8D5C5D23 lea r11, ptr [rbp+r19*2+0x23] +XDIS 11664: MISC BASE D52C8D5C5E24 lea r11, ptr [rsi+r19*2+0x24] +XDIS 1166a: MISC BASE D52C8D5C5F25 lea r11, ptr [rdi+r19*2+0x25] +XDIS 11670: MISC BASE D52D8D5C5826 lea r11, ptr [r8+r19*2+0x26] +XDIS 11676: MISC BASE D52D8D5C5927 lea r11, ptr [r9+r19*2+0x27] +XDIS 1167c: MISC BASE D52D8D5C5A28 lea r11, ptr [r10+r19*2+0x28] +XDIS 11682: MISC BASE D52D8D5C5B29 lea r11, ptr [r11+r19*2+0x29] +XDIS 11688: MISC BASE D52D8D5C5C2A lea r11, ptr [r12+r19*2+0x2a] +XDIS 1168e: MISC BASE D52D8D5C5D2B lea r11, ptr [r13+r19*2+0x2b] +XDIS 11694: MISC BASE D52D8D5C5E2C lea r11, ptr [r14+r19*2+0x2c] +XDIS 1169a: MISC BASE D52D8D5C5F2D lea r11, ptr [r15+r19*2+0x2d] +XDIS 116a0: MISC BASE D53C8D5C582E lea r11, ptr [r16+r19*2+0x2e] +XDIS 116a6: MISC BASE D53C8D5C592F lea r11, ptr [r17+r19*2+0x2f] +XDIS 116ac: MISC BASE D53C8D5C5A30 lea r11, ptr [r18+r19*2+0x30] +XDIS 116b2: MISC BASE D53C8D5C5B31 lea r11, ptr [r19+r19*2+0x31] +XDIS 116b8: MISC BASE D53C8D5C5C32 lea r11, ptr [r20+r19*2+0x32] +XDIS 116be: MISC BASE D53C8D5C5D33 lea r11, ptr [r21+r19*2+0x33] +XDIS 116c4: MISC BASE D53C8D5C5E34 lea r11, ptr [r22+r19*2+0x34] +XDIS 116ca: MISC BASE D53C8D5C5F35 lea r11, ptr [r23+r19*2+0x35] +XDIS 116d0: MISC BASE D53D8D5C5836 lea r11, ptr [r24+r19*2+0x36] +XDIS 116d6: MISC BASE D53D8D5C5937 lea r11, ptr [r25+r19*2+0x37] +XDIS 116dc: MISC BASE D53D8D5C5A38 lea r11, ptr [r26+r19*2+0x38] +XDIS 116e2: MISC BASE D53D8D5C5B39 lea r11, ptr [r27+r19*2+0x39] +XDIS 116e8: MISC BASE D53D8D5C5C3A lea r11, ptr [r28+r19*2+0x3a] +XDIS 116ee: MISC BASE D53D8D5C5D3B lea r11, ptr [r29+r19*2+0x3b] +XDIS 116f4: MISC BASE D53D8D5C5E3C lea r11, ptr [r30+r19*2+0x3c] +XDIS 116fa: MISC BASE D53D8D5C5F3D lea r11, ptr [r31+r19*2+0x3d] +XDIS 11700: MISC BASE D52C8D5C601F lea r11, ptr [rax+r20*2+0x1f] +XDIS 11706: MISC BASE D52C8D5C6120 lea r11, ptr [rcx+r20*2+0x20] +XDIS 1170c: MISC BASE D52C8D5C6221 lea r11, ptr [rdx+r20*2+0x21] +XDIS 11712: MISC BASE D52C8D5C6322 lea r11, ptr [rbx+r20*2+0x22] +XDIS 11718: MISC BASE D52C8D5C6423 lea r11, ptr [rsp+r20*2+0x23] +XDIS 1171e: MISC BASE D52C8D5C6524 lea r11, ptr [rbp+r20*2+0x24] +XDIS 11724: MISC BASE D52C8D5C6625 lea r11, ptr [rsi+r20*2+0x25] +XDIS 1172a: MISC BASE D52C8D5C6726 lea r11, ptr [rdi+r20*2+0x26] +XDIS 11730: MISC BASE D52D8D5C6027 lea r11, ptr [r8+r20*2+0x27] +XDIS 11736: MISC BASE D52D8D5C6128 lea r11, ptr [r9+r20*2+0x28] +XDIS 1173c: MISC BASE D52D8D5C6229 lea r11, ptr [r10+r20*2+0x29] +XDIS 11742: MISC BASE D52D8D5C632A lea r11, ptr [r11+r20*2+0x2a] +XDIS 11748: MISC BASE D52D8D5C642B lea r11, ptr [r12+r20*2+0x2b] +XDIS 1174e: MISC BASE D52D8D5C652C lea r11, ptr [r13+r20*2+0x2c] +XDIS 11754: MISC BASE D52D8D5C662D lea r11, ptr [r14+r20*2+0x2d] +XDIS 1175a: MISC BASE D52D8D5C672E lea r11, ptr [r15+r20*2+0x2e] +XDIS 11760: MISC BASE D53C8D5C602F lea r11, ptr [r16+r20*2+0x2f] +XDIS 11766: MISC BASE D53C8D5C6130 lea r11, ptr [r17+r20*2+0x30] +XDIS 1176c: MISC BASE D53C8D5C6231 lea r11, ptr [r18+r20*2+0x31] +XDIS 11772: MISC BASE D53C8D5C6332 lea r11, ptr [r19+r20*2+0x32] +XDIS 11778: MISC BASE D53C8D5C6433 lea r11, ptr [r20+r20*2+0x33] +XDIS 1177e: MISC BASE D53C8D5C6534 lea r11, ptr [r21+r20*2+0x34] +XDIS 11784: MISC BASE D53C8D5C6635 lea r11, ptr [r22+r20*2+0x35] +XDIS 1178a: MISC BASE D53C8D5C6736 lea r11, ptr [r23+r20*2+0x36] +XDIS 11790: MISC BASE D53D8D5C6037 lea r11, ptr [r24+r20*2+0x37] +XDIS 11796: MISC BASE D53D8D5C6138 lea r11, ptr [r25+r20*2+0x38] +XDIS 1179c: MISC BASE D53D8D5C6239 lea r11, ptr [r26+r20*2+0x39] +XDIS 117a2: MISC BASE D53D8D5C633A lea r11, ptr [r27+r20*2+0x3a] +XDIS 117a8: MISC BASE D53D8D5C643B lea r11, ptr [r28+r20*2+0x3b] +XDIS 117ae: MISC BASE D53D8D5C653C lea r11, ptr [r29+r20*2+0x3c] +XDIS 117b4: MISC BASE D53D8D5C663D lea r11, ptr [r30+r20*2+0x3d] +XDIS 117ba: MISC BASE D53D8D5C673E lea r11, ptr [r31+r20*2+0x3e] +XDIS 117c0: MISC BASE D52C8D5C6820 lea r11, ptr [rax+r21*2+0x20] +XDIS 117c6: MISC BASE D52C8D5C6921 lea r11, ptr [rcx+r21*2+0x21] +XDIS 117cc: MISC BASE D52C8D5C6A22 lea r11, ptr [rdx+r21*2+0x22] +XDIS 117d2: MISC BASE D52C8D5C6B23 lea r11, ptr [rbx+r21*2+0x23] +XDIS 117d8: MISC BASE D52C8D5C6C24 lea r11, ptr [rsp+r21*2+0x24] +XDIS 117de: MISC BASE D52C8D5C6D25 lea r11, ptr [rbp+r21*2+0x25] +XDIS 117e4: MISC BASE D52C8D5C6E26 lea r11, ptr [rsi+r21*2+0x26] +XDIS 117ea: MISC BASE D52C8D5C6F27 lea r11, ptr [rdi+r21*2+0x27] +XDIS 117f0: MISC BASE D52D8D5C6828 lea r11, ptr [r8+r21*2+0x28] +XDIS 117f6: MISC BASE D52D8D5C6929 lea r11, ptr [r9+r21*2+0x29] +XDIS 117fc: MISC BASE D52D8D5C6A2A lea r11, ptr [r10+r21*2+0x2a] +XDIS 11802: MISC BASE D52D8D5C6B2B lea r11, ptr [r11+r21*2+0x2b] +XDIS 11808: MISC BASE D52D8D5C6C2C lea r11, ptr [r12+r21*2+0x2c] +XDIS 1180e: MISC BASE D52D8D5C6D2D lea r11, ptr [r13+r21*2+0x2d] +XDIS 11814: MISC BASE D52D8D5C6E2E lea r11, ptr [r14+r21*2+0x2e] +XDIS 1181a: MISC BASE D52D8D5C6F2F lea r11, ptr [r15+r21*2+0x2f] +XDIS 11820: MISC BASE D53C8D5C6830 lea r11, ptr [r16+r21*2+0x30] +XDIS 11826: MISC BASE D53C8D5C6931 lea r11, ptr [r17+r21*2+0x31] +XDIS 1182c: MISC BASE D53C8D5C6A32 lea r11, ptr [r18+r21*2+0x32] +XDIS 11832: MISC BASE D53C8D5C6B33 lea r11, ptr [r19+r21*2+0x33] +XDIS 11838: MISC BASE D53C8D5C6C34 lea r11, ptr [r20+r21*2+0x34] +XDIS 1183e: MISC BASE D53C8D5C6D35 lea r11, ptr [r21+r21*2+0x35] +XDIS 11844: MISC BASE D53C8D5C6E36 lea r11, ptr [r22+r21*2+0x36] +XDIS 1184a: MISC BASE D53C8D5C6F37 lea r11, ptr [r23+r21*2+0x37] +XDIS 11850: MISC BASE D53D8D5C6838 lea r11, ptr [r24+r21*2+0x38] +XDIS 11856: MISC BASE D53D8D5C6939 lea r11, ptr [r25+r21*2+0x39] +XDIS 1185c: MISC BASE D53D8D5C6A3A lea r11, ptr [r26+r21*2+0x3a] +XDIS 11862: MISC BASE D53D8D5C6B3B lea r11, ptr [r27+r21*2+0x3b] +XDIS 11868: MISC BASE D53D8D5C6C3C lea r11, ptr [r28+r21*2+0x3c] +XDIS 1186e: MISC BASE D53D8D5C6D3D lea r11, ptr [r29+r21*2+0x3d] +XDIS 11874: MISC BASE D53D8D5C6E3E lea r11, ptr [r30+r21*2+0x3e] +XDIS 1187a: MISC BASE D53D8D5C6F3F lea r11, ptr [r31+r21*2+0x3f] +XDIS 11880: MISC BASE D52C8D5C7021 lea r11, ptr [rax+r22*2+0x21] +XDIS 11886: MISC BASE D52C8D5C7122 lea r11, ptr [rcx+r22*2+0x22] +XDIS 1188c: MISC BASE D52C8D5C7223 lea r11, ptr [rdx+r22*2+0x23] +XDIS 11892: MISC BASE D52C8D5C7324 lea r11, ptr [rbx+r22*2+0x24] +XDIS 11898: MISC BASE D52C8D5C7425 lea r11, ptr [rsp+r22*2+0x25] +XDIS 1189e: MISC BASE D52C8D5C7526 lea r11, ptr [rbp+r22*2+0x26] +XDIS 118a4: MISC BASE D52C8D5C7627 lea r11, ptr [rsi+r22*2+0x27] +XDIS 118aa: MISC BASE D52C8D5C7728 lea r11, ptr [rdi+r22*2+0x28] +XDIS 118b0: MISC BASE D52D8D5C7029 lea r11, ptr [r8+r22*2+0x29] +XDIS 118b6: MISC BASE D52D8D5C712A lea r11, ptr [r9+r22*2+0x2a] +XDIS 118bc: MISC BASE D52D8D5C722B lea r11, ptr [r10+r22*2+0x2b] +XDIS 118c2: MISC BASE D52D8D5C732C lea r11, ptr [r11+r22*2+0x2c] +XDIS 118c8: MISC BASE D52D8D5C742D lea r11, ptr [r12+r22*2+0x2d] +XDIS 118ce: MISC BASE D52D8D5C752E lea r11, ptr [r13+r22*2+0x2e] +XDIS 118d4: MISC BASE D52D8D5C762F lea r11, ptr [r14+r22*2+0x2f] +XDIS 118da: MISC BASE D52D8D5C7730 lea r11, ptr [r15+r22*2+0x30] +XDIS 118e0: MISC BASE D53C8D5C7031 lea r11, ptr [r16+r22*2+0x31] +XDIS 118e6: MISC BASE D53C8D5C7132 lea r11, ptr [r17+r22*2+0x32] +XDIS 118ec: MISC BASE D53C8D5C7233 lea r11, ptr [r18+r22*2+0x33] +XDIS 118f2: MISC BASE D53C8D5C7334 lea r11, ptr [r19+r22*2+0x34] +XDIS 118f8: MISC BASE D53C8D5C7435 lea r11, ptr [r20+r22*2+0x35] +XDIS 118fe: MISC BASE D53C8D5C7536 lea r11, ptr [r21+r22*2+0x36] +XDIS 11904: MISC BASE D53C8D5C7637 lea r11, ptr [r22+r22*2+0x37] +XDIS 1190a: MISC BASE D53C8D5C7738 lea r11, ptr [r23+r22*2+0x38] +XDIS 11910: MISC BASE D53D8D5C7039 lea r11, ptr [r24+r22*2+0x39] +XDIS 11916: MISC BASE D53D8D5C713A lea r11, ptr [r25+r22*2+0x3a] +XDIS 1191c: MISC BASE D53D8D5C723B lea r11, ptr [r26+r22*2+0x3b] +XDIS 11922: MISC BASE D53D8D5C733C lea r11, ptr [r27+r22*2+0x3c] +XDIS 11928: MISC BASE D53D8D5C743D lea r11, ptr [r28+r22*2+0x3d] +XDIS 1192e: MISC BASE D53D8D5C753E lea r11, ptr [r29+r22*2+0x3e] +XDIS 11934: MISC BASE D53D8D5C763F lea r11, ptr [r30+r22*2+0x3f] +XDIS 1193a: MISC BASE D53D8D5C7740 lea r11, ptr [r31+r22*2+0x40] +XDIS 11940: MISC BASE D52C8D5C7822 lea r11, ptr [rax+r23*2+0x22] +XDIS 11946: MISC BASE D52C8D5C7923 lea r11, ptr [rcx+r23*2+0x23] +XDIS 1194c: MISC BASE D52C8D5C7A24 lea r11, ptr [rdx+r23*2+0x24] +XDIS 11952: MISC BASE D52C8D5C7B25 lea r11, ptr [rbx+r23*2+0x25] +XDIS 11958: MISC BASE D52C8D5C7C26 lea r11, ptr [rsp+r23*2+0x26] +XDIS 1195e: MISC BASE D52C8D5C7D27 lea r11, ptr [rbp+r23*2+0x27] +XDIS 11964: MISC BASE D52C8D5C7E28 lea r11, ptr [rsi+r23*2+0x28] +XDIS 1196a: MISC BASE D52C8D5C7F29 lea r11, ptr [rdi+r23*2+0x29] +XDIS 11970: MISC BASE D52D8D5C782A lea r11, ptr [r8+r23*2+0x2a] +XDIS 11976: MISC BASE D52D8D5C792B lea r11, ptr [r9+r23*2+0x2b] +XDIS 1197c: MISC BASE D52D8D5C7A2C lea r11, ptr [r10+r23*2+0x2c] +XDIS 11982: MISC BASE D52D8D5C7B2D lea r11, ptr [r11+r23*2+0x2d] +XDIS 11988: MISC BASE D52D8D5C7C2E lea r11, ptr [r12+r23*2+0x2e] +XDIS 1198e: MISC BASE D52D8D5C7D2F lea r11, ptr [r13+r23*2+0x2f] +XDIS 11994: MISC BASE D52D8D5C7E30 lea r11, ptr [r14+r23*2+0x30] +XDIS 1199a: MISC BASE D52D8D5C7F31 lea r11, ptr [r15+r23*2+0x31] +XDIS 119a0: MISC BASE D53C8D5C7832 lea r11, ptr [r16+r23*2+0x32] +XDIS 119a6: MISC BASE D53C8D5C7933 lea r11, ptr [r17+r23*2+0x33] +XDIS 119ac: MISC BASE D53C8D5C7A34 lea r11, ptr [r18+r23*2+0x34] +XDIS 119b2: MISC BASE D53C8D5C7B35 lea r11, ptr [r19+r23*2+0x35] +XDIS 119b8: MISC BASE D53C8D5C7C36 lea r11, ptr [r20+r23*2+0x36] +XDIS 119be: MISC BASE D53C8D5C7D37 lea r11, ptr [r21+r23*2+0x37] +XDIS 119c4: MISC BASE D53C8D5C7E38 lea r11, ptr [r22+r23*2+0x38] +XDIS 119ca: MISC BASE D53C8D5C7F39 lea r11, ptr [r23+r23*2+0x39] +XDIS 119d0: MISC BASE D53D8D5C783A lea r11, ptr [r24+r23*2+0x3a] +XDIS 119d6: MISC BASE D53D8D5C793B lea r11, ptr [r25+r23*2+0x3b] +XDIS 119dc: MISC BASE D53D8D5C7A3C lea r11, ptr [r26+r23*2+0x3c] +XDIS 119e2: MISC BASE D53D8D5C7B3D lea r11, ptr [r27+r23*2+0x3d] +XDIS 119e8: MISC BASE D53D8D5C7C3E lea r11, ptr [r28+r23*2+0x3e] +XDIS 119ee: MISC BASE D53D8D5C7D3F lea r11, ptr [r29+r23*2+0x3f] +XDIS 119f4: MISC BASE D53D8D5C7E40 lea r11, ptr [r30+r23*2+0x40] +XDIS 119fa: MISC BASE D53D8D5C7F41 lea r11, ptr [r31+r23*2+0x41] +XDIS 11a00: MISC BASE D52E8D5C4023 lea r11, ptr [rax+r24*2+0x23] +XDIS 11a06: MISC BASE D52E8D5C4124 lea r11, ptr [rcx+r24*2+0x24] +XDIS 11a0c: MISC BASE D52E8D5C4225 lea r11, ptr [rdx+r24*2+0x25] +XDIS 11a12: MISC BASE D52E8D5C4326 lea r11, ptr [rbx+r24*2+0x26] +XDIS 11a18: MISC BASE D52E8D5C4427 lea r11, ptr [rsp+r24*2+0x27] +XDIS 11a1e: MISC BASE D52E8D5C4528 lea r11, ptr [rbp+r24*2+0x28] +XDIS 11a24: MISC BASE D52E8D5C4629 lea r11, ptr [rsi+r24*2+0x29] +XDIS 11a2a: MISC BASE D52E8D5C472A lea r11, ptr [rdi+r24*2+0x2a] +XDIS 11a30: MISC BASE D52F8D5C402B lea r11, ptr [r8+r24*2+0x2b] +XDIS 11a36: MISC BASE D52F8D5C412C lea r11, ptr [r9+r24*2+0x2c] +XDIS 11a3c: MISC BASE D52F8D5C422D lea r11, ptr [r10+r24*2+0x2d] +XDIS 11a42: MISC BASE D52F8D5C432E lea r11, ptr [r11+r24*2+0x2e] +XDIS 11a48: MISC BASE D52F8D5C442F lea r11, ptr [r12+r24*2+0x2f] +XDIS 11a4e: MISC BASE D52F8D5C4530 lea r11, ptr [r13+r24*2+0x30] +XDIS 11a54: MISC BASE D52F8D5C4631 lea r11, ptr [r14+r24*2+0x31] +XDIS 11a5a: MISC BASE D52F8D5C4732 lea r11, ptr [r15+r24*2+0x32] +XDIS 11a60: MISC BASE D53E8D5C4033 lea r11, ptr [r16+r24*2+0x33] +XDIS 11a66: MISC BASE D53E8D5C4134 lea r11, ptr [r17+r24*2+0x34] +XDIS 11a6c: MISC BASE D53E8D5C4235 lea r11, ptr [r18+r24*2+0x35] +XDIS 11a72: MISC BASE D53E8D5C4336 lea r11, ptr [r19+r24*2+0x36] +XDIS 11a78: MISC BASE D53E8D5C4437 lea r11, ptr [r20+r24*2+0x37] +XDIS 11a7e: MISC BASE D53E8D5C4538 lea r11, ptr [r21+r24*2+0x38] +XDIS 11a84: MISC BASE D53E8D5C4639 lea r11, ptr [r22+r24*2+0x39] +XDIS 11a8a: MISC BASE D53E8D5C473A lea r11, ptr [r23+r24*2+0x3a] +XDIS 11a90: MISC BASE D53F8D5C403B lea r11, ptr [r24+r24*2+0x3b] +XDIS 11a96: MISC BASE D53F8D5C413C lea r11, ptr [r25+r24*2+0x3c] +XDIS 11a9c: MISC BASE D53F8D5C423D lea r11, ptr [r26+r24*2+0x3d] +XDIS 11aa2: MISC BASE D53F8D5C433E lea r11, ptr [r27+r24*2+0x3e] +XDIS 11aa8: MISC BASE D53F8D5C443F lea r11, ptr [r28+r24*2+0x3f] +XDIS 11aae: MISC BASE D53F8D5C4540 lea r11, ptr [r29+r24*2+0x40] +XDIS 11ab4: MISC BASE D53F8D5C4641 lea r11, ptr [r30+r24*2+0x41] +XDIS 11aba: MISC BASE D53F8D5C4742 lea r11, ptr [r31+r24*2+0x42] +XDIS 11ac0: MISC BASE D52E8D5C4824 lea r11, ptr [rax+r25*2+0x24] +XDIS 11ac6: MISC BASE D52E8D5C4925 lea r11, ptr [rcx+r25*2+0x25] +XDIS 11acc: MISC BASE D52E8D5C4A26 lea r11, ptr [rdx+r25*2+0x26] +XDIS 11ad2: MISC BASE D52E8D5C4B27 lea r11, ptr [rbx+r25*2+0x27] +XDIS 11ad8: MISC BASE D52E8D5C4C28 lea r11, ptr [rsp+r25*2+0x28] +XDIS 11ade: MISC BASE D52E8D5C4D29 lea r11, ptr [rbp+r25*2+0x29] +XDIS 11ae4: MISC BASE D52E8D5C4E2A lea r11, ptr [rsi+r25*2+0x2a] +XDIS 11aea: MISC BASE D52E8D5C4F2B lea r11, ptr [rdi+r25*2+0x2b] +XDIS 11af0: MISC BASE D52F8D5C482C lea r11, ptr [r8+r25*2+0x2c] +XDIS 11af6: MISC BASE D52F8D5C492D lea r11, ptr [r9+r25*2+0x2d] +XDIS 11afc: MISC BASE D52F8D5C4A2E lea r11, ptr [r10+r25*2+0x2e] +XDIS 11b02: MISC BASE D52F8D5C4B2F lea r11, ptr [r11+r25*2+0x2f] +XDIS 11b08: MISC BASE D52F8D5C4C30 lea r11, ptr [r12+r25*2+0x30] +XDIS 11b0e: MISC BASE D52F8D5C4D31 lea r11, ptr [r13+r25*2+0x31] +XDIS 11b14: MISC BASE D52F8D5C4E32 lea r11, ptr [r14+r25*2+0x32] +XDIS 11b1a: MISC BASE D52F8D5C4F33 lea r11, ptr [r15+r25*2+0x33] +XDIS 11b20: MISC BASE D53E8D5C4834 lea r11, ptr [r16+r25*2+0x34] +XDIS 11b26: MISC BASE D53E8D5C4935 lea r11, ptr [r17+r25*2+0x35] +XDIS 11b2c: MISC BASE D53E8D5C4A36 lea r11, ptr [r18+r25*2+0x36] +XDIS 11b32: MISC BASE D53E8D5C4B37 lea r11, ptr [r19+r25*2+0x37] +XDIS 11b38: MISC BASE D53E8D5C4C38 lea r11, ptr [r20+r25*2+0x38] +XDIS 11b3e: MISC BASE D53E8D5C4D39 lea r11, ptr [r21+r25*2+0x39] +XDIS 11b44: MISC BASE D53E8D5C4E3A lea r11, ptr [r22+r25*2+0x3a] +XDIS 11b4a: MISC BASE D53E8D5C4F3B lea r11, ptr [r23+r25*2+0x3b] +XDIS 11b50: MISC BASE D53F8D5C483C lea r11, ptr [r24+r25*2+0x3c] +XDIS 11b56: MISC BASE D53F8D5C493D lea r11, ptr [r25+r25*2+0x3d] +XDIS 11b5c: MISC BASE D53F8D5C4A3E lea r11, ptr [r26+r25*2+0x3e] +XDIS 11b62: MISC BASE D53F8D5C4B3F lea r11, ptr [r27+r25*2+0x3f] +XDIS 11b68: MISC BASE D53F8D5C4C40 lea r11, ptr [r28+r25*2+0x40] +XDIS 11b6e: MISC BASE D53F8D5C4D41 lea r11, ptr [r29+r25*2+0x41] +XDIS 11b74: MISC BASE D53F8D5C4E42 lea r11, ptr [r30+r25*2+0x42] +XDIS 11b7a: MISC BASE D53F8D5C4F43 lea r11, ptr [r31+r25*2+0x43] +XDIS 11b80: MISC BASE D52E8D5C5025 lea r11, ptr [rax+r26*2+0x25] +XDIS 11b86: MISC BASE D52E8D5C5126 lea r11, ptr [rcx+r26*2+0x26] +XDIS 11b8c: MISC BASE D52E8D5C5227 lea r11, ptr [rdx+r26*2+0x27] +XDIS 11b92: MISC BASE D52E8D5C5328 lea r11, ptr [rbx+r26*2+0x28] +XDIS 11b98: MISC BASE D52E8D5C5429 lea r11, ptr [rsp+r26*2+0x29] +XDIS 11b9e: MISC BASE D52E8D5C552A lea r11, ptr [rbp+r26*2+0x2a] +XDIS 11ba4: MISC BASE D52E8D5C562B lea r11, ptr [rsi+r26*2+0x2b] +XDIS 11baa: MISC BASE D52E8D5C572C lea r11, ptr [rdi+r26*2+0x2c] +XDIS 11bb0: MISC BASE D52F8D5C502D lea r11, ptr [r8+r26*2+0x2d] +XDIS 11bb6: MISC BASE D52F8D5C512E lea r11, ptr [r9+r26*2+0x2e] +XDIS 11bbc: MISC BASE D52F8D5C522F lea r11, ptr [r10+r26*2+0x2f] +XDIS 11bc2: MISC BASE D52F8D5C5330 lea r11, ptr [r11+r26*2+0x30] +XDIS 11bc8: MISC BASE D52F8D5C5431 lea r11, ptr [r12+r26*2+0x31] +XDIS 11bce: MISC BASE D52F8D5C5532 lea r11, ptr [r13+r26*2+0x32] +XDIS 11bd4: MISC BASE D52F8D5C5633 lea r11, ptr [r14+r26*2+0x33] +XDIS 11bda: MISC BASE D52F8D5C5734 lea r11, ptr [r15+r26*2+0x34] +XDIS 11be0: MISC BASE D53E8D5C5035 lea r11, ptr [r16+r26*2+0x35] +XDIS 11be6: MISC BASE D53E8D5C5136 lea r11, ptr [r17+r26*2+0x36] +XDIS 11bec: MISC BASE D53E8D5C5237 lea r11, ptr [r18+r26*2+0x37] +XDIS 11bf2: MISC BASE D53E8D5C5338 lea r11, ptr [r19+r26*2+0x38] +XDIS 11bf8: MISC BASE D53E8D5C5439 lea r11, ptr [r20+r26*2+0x39] +XDIS 11bfe: MISC BASE D53E8D5C553A lea r11, ptr [r21+r26*2+0x3a] +XDIS 11c04: MISC BASE D53E8D5C563B lea r11, ptr [r22+r26*2+0x3b] +XDIS 11c0a: MISC BASE D53E8D5C573C lea r11, ptr [r23+r26*2+0x3c] +XDIS 11c10: MISC BASE D53F8D5C503D lea r11, ptr [r24+r26*2+0x3d] +XDIS 11c16: MISC BASE D53F8D5C513E lea r11, ptr [r25+r26*2+0x3e] +XDIS 11c1c: MISC BASE D53F8D5C523F lea r11, ptr [r26+r26*2+0x3f] +XDIS 11c22: MISC BASE D53F8D5C5340 lea r11, ptr [r27+r26*2+0x40] +XDIS 11c28: MISC BASE D53F8D5C5441 lea r11, ptr [r28+r26*2+0x41] +XDIS 11c2e: MISC BASE D53F8D5C5542 lea r11, ptr [r29+r26*2+0x42] +XDIS 11c34: MISC BASE D53F8D5C5643 lea r11, ptr [r30+r26*2+0x43] +XDIS 11c3a: MISC BASE D53F8D5C5744 lea r11, ptr [r31+r26*2+0x44] +XDIS 11c40: MISC BASE D52E8D5C5826 lea r11, ptr [rax+r27*2+0x26] +XDIS 11c46: MISC BASE D52E8D5C5927 lea r11, ptr [rcx+r27*2+0x27] +XDIS 11c4c: MISC BASE D52E8D5C5A28 lea r11, ptr [rdx+r27*2+0x28] +XDIS 11c52: MISC BASE D52E8D5C5B29 lea r11, ptr [rbx+r27*2+0x29] +XDIS 11c58: MISC BASE D52E8D5C5C2A lea r11, ptr [rsp+r27*2+0x2a] +XDIS 11c5e: MISC BASE D52E8D5C5D2B lea r11, ptr [rbp+r27*2+0x2b] +XDIS 11c64: MISC BASE D52E8D5C5E2C lea r11, ptr [rsi+r27*2+0x2c] +XDIS 11c6a: MISC BASE D52E8D5C5F2D lea r11, ptr [rdi+r27*2+0x2d] +XDIS 11c70: MISC BASE D52F8D5C582E lea r11, ptr [r8+r27*2+0x2e] +XDIS 11c76: MISC BASE D52F8D5C592F lea r11, ptr [r9+r27*2+0x2f] +XDIS 11c7c: MISC BASE D52F8D5C5A30 lea r11, ptr [r10+r27*2+0x30] +XDIS 11c82: MISC BASE D52F8D5C5B31 lea r11, ptr [r11+r27*2+0x31] +XDIS 11c88: MISC BASE D52F8D5C5C32 lea r11, ptr [r12+r27*2+0x32] +XDIS 11c8e: MISC BASE D52F8D5C5D33 lea r11, ptr [r13+r27*2+0x33] +XDIS 11c94: MISC BASE D52F8D5C5E34 lea r11, ptr [r14+r27*2+0x34] +XDIS 11c9a: MISC BASE D52F8D5C5F35 lea r11, ptr [r15+r27*2+0x35] +XDIS 11ca0: MISC BASE D53E8D5C5836 lea r11, ptr [r16+r27*2+0x36] +XDIS 11ca6: MISC BASE D53E8D5C5937 lea r11, ptr [r17+r27*2+0x37] +XDIS 11cac: MISC BASE D53E8D5C5A38 lea r11, ptr [r18+r27*2+0x38] +XDIS 11cb2: MISC BASE D53E8D5C5B39 lea r11, ptr [r19+r27*2+0x39] +XDIS 11cb8: MISC BASE D53E8D5C5C3A lea r11, ptr [r20+r27*2+0x3a] +XDIS 11cbe: MISC BASE D53E8D5C5D3B lea r11, ptr [r21+r27*2+0x3b] +XDIS 11cc4: MISC BASE D53E8D5C5E3C lea r11, ptr [r22+r27*2+0x3c] +XDIS 11cca: MISC BASE D53E8D5C5F3D lea r11, ptr [r23+r27*2+0x3d] +XDIS 11cd0: MISC BASE D53F8D5C583E lea r11, ptr [r24+r27*2+0x3e] +XDIS 11cd6: MISC BASE D53F8D5C593F lea r11, ptr [r25+r27*2+0x3f] +XDIS 11cdc: MISC BASE D53F8D5C5A40 lea r11, ptr [r26+r27*2+0x40] +XDIS 11ce2: MISC BASE D53F8D5C5B41 lea r11, ptr [r27+r27*2+0x41] +XDIS 11ce8: MISC BASE D53F8D5C5C42 lea r11, ptr [r28+r27*2+0x42] +XDIS 11cee: MISC BASE D53F8D5C5D43 lea r11, ptr [r29+r27*2+0x43] +XDIS 11cf4: MISC BASE D53F8D5C5E44 lea r11, ptr [r30+r27*2+0x44] +XDIS 11cfa: MISC BASE D53F8D5C5F45 lea r11, ptr [r31+r27*2+0x45] +XDIS 11d00: MISC BASE D52E8D5C6027 lea r11, ptr [rax+r28*2+0x27] +XDIS 11d06: MISC BASE D52E8D5C6128 lea r11, ptr [rcx+r28*2+0x28] +XDIS 11d0c: MISC BASE D52E8D5C6229 lea r11, ptr [rdx+r28*2+0x29] +XDIS 11d12: MISC BASE D52E8D5C632A lea r11, ptr [rbx+r28*2+0x2a] +XDIS 11d18: MISC BASE D52E8D5C642B lea r11, ptr [rsp+r28*2+0x2b] +XDIS 11d1e: MISC BASE D52E8D5C652C lea r11, ptr [rbp+r28*2+0x2c] +XDIS 11d24: MISC BASE D52E8D5C662D lea r11, ptr [rsi+r28*2+0x2d] +XDIS 11d2a: MISC BASE D52E8D5C672E lea r11, ptr [rdi+r28*2+0x2e] +XDIS 11d30: MISC BASE D52F8D5C602F lea r11, ptr [r8+r28*2+0x2f] +XDIS 11d36: MISC BASE D52F8D5C6130 lea r11, ptr [r9+r28*2+0x30] +XDIS 11d3c: MISC BASE D52F8D5C6231 lea r11, ptr [r10+r28*2+0x31] +XDIS 11d42: MISC BASE D52F8D5C6332 lea r11, ptr [r11+r28*2+0x32] +XDIS 11d48: MISC BASE D52F8D5C6433 lea r11, ptr [r12+r28*2+0x33] +XDIS 11d4e: MISC BASE D52F8D5C6534 lea r11, ptr [r13+r28*2+0x34] +XDIS 11d54: MISC BASE D52F8D5C6635 lea r11, ptr [r14+r28*2+0x35] +XDIS 11d5a: MISC BASE D52F8D5C6736 lea r11, ptr [r15+r28*2+0x36] +XDIS 11d60: MISC BASE D53E8D5C6037 lea r11, ptr [r16+r28*2+0x37] +XDIS 11d66: MISC BASE D53E8D5C6138 lea r11, ptr [r17+r28*2+0x38] +XDIS 11d6c: MISC BASE D53E8D5C6239 lea r11, ptr [r18+r28*2+0x39] +XDIS 11d72: MISC BASE D53E8D5C633A lea r11, ptr [r19+r28*2+0x3a] +XDIS 11d78: MISC BASE D53E8D5C643B lea r11, ptr [r20+r28*2+0x3b] +XDIS 11d7e: MISC BASE D53E8D5C653C lea r11, ptr [r21+r28*2+0x3c] +XDIS 11d84: MISC BASE D53E8D5C663D lea r11, ptr [r22+r28*2+0x3d] +XDIS 11d8a: MISC BASE D53E8D5C673E lea r11, ptr [r23+r28*2+0x3e] +XDIS 11d90: MISC BASE D53F8D5C603F lea r11, ptr [r24+r28*2+0x3f] +XDIS 11d96: MISC BASE D53F8D5C6140 lea r11, ptr [r25+r28*2+0x40] +XDIS 11d9c: MISC BASE D53F8D5C6241 lea r11, ptr [r26+r28*2+0x41] +XDIS 11da2: MISC BASE D53F8D5C6342 lea r11, ptr [r27+r28*2+0x42] +XDIS 11da8: MISC BASE D53F8D5C6443 lea r11, ptr [r28+r28*2+0x43] +XDIS 11dae: MISC BASE D53F8D5C6544 lea r11, ptr [r29+r28*2+0x44] +XDIS 11db4: MISC BASE D53F8D5C6645 lea r11, ptr [r30+r28*2+0x45] +XDIS 11dba: MISC BASE D53F8D5C6746 lea r11, ptr [r31+r28*2+0x46] +XDIS 11dc0: MISC BASE D52E8D5C6828 lea r11, ptr [rax+r29*2+0x28] +XDIS 11dc6: MISC BASE D52E8D5C6929 lea r11, ptr [rcx+r29*2+0x29] +XDIS 11dcc: MISC BASE D52E8D5C6A2A lea r11, ptr [rdx+r29*2+0x2a] +XDIS 11dd2: MISC BASE D52E8D5C6B2B lea r11, ptr [rbx+r29*2+0x2b] +XDIS 11dd8: MISC BASE D52E8D5C6C2C lea r11, ptr [rsp+r29*2+0x2c] +XDIS 11dde: MISC BASE D52E8D5C6D2D lea r11, ptr [rbp+r29*2+0x2d] +XDIS 11de4: MISC BASE D52E8D5C6E2E lea r11, ptr [rsi+r29*2+0x2e] +XDIS 11dea: MISC BASE D52E8D5C6F2F lea r11, ptr [rdi+r29*2+0x2f] +XDIS 11df0: MISC BASE D52F8D5C6830 lea r11, ptr [r8+r29*2+0x30] +XDIS 11df6: MISC BASE D52F8D5C6931 lea r11, ptr [r9+r29*2+0x31] +XDIS 11dfc: MISC BASE D52F8D5C6A32 lea r11, ptr [r10+r29*2+0x32] +XDIS 11e02: MISC BASE D52F8D5C6B33 lea r11, ptr [r11+r29*2+0x33] +XDIS 11e08: MISC BASE D52F8D5C6C34 lea r11, ptr [r12+r29*2+0x34] +XDIS 11e0e: MISC BASE D52F8D5C6D35 lea r11, ptr [r13+r29*2+0x35] +XDIS 11e14: MISC BASE D52F8D5C6E36 lea r11, ptr [r14+r29*2+0x36] +XDIS 11e1a: MISC BASE D52F8D5C6F37 lea r11, ptr [r15+r29*2+0x37] +XDIS 11e20: MISC BASE D53E8D5C6838 lea r11, ptr [r16+r29*2+0x38] +XDIS 11e26: MISC BASE D53E8D5C6939 lea r11, ptr [r17+r29*2+0x39] +XDIS 11e2c: MISC BASE D53E8D5C6A3A lea r11, ptr [r18+r29*2+0x3a] +XDIS 11e32: MISC BASE D53E8D5C6B3B lea r11, ptr [r19+r29*2+0x3b] +XDIS 11e38: MISC BASE D53E8D5C6C3C lea r11, ptr [r20+r29*2+0x3c] +XDIS 11e3e: MISC BASE D53E8D5C6D3D lea r11, ptr [r21+r29*2+0x3d] +XDIS 11e44: MISC BASE D53E8D5C6E3E lea r11, ptr [r22+r29*2+0x3e] +XDIS 11e4a: MISC BASE D53E8D5C6F3F lea r11, ptr [r23+r29*2+0x3f] +XDIS 11e50: MISC BASE D53F8D5C6840 lea r11, ptr [r24+r29*2+0x40] +XDIS 11e56: MISC BASE D53F8D5C6941 lea r11, ptr [r25+r29*2+0x41] +XDIS 11e5c: MISC BASE D53F8D5C6A42 lea r11, ptr [r26+r29*2+0x42] +XDIS 11e62: MISC BASE D53F8D5C6B43 lea r11, ptr [r27+r29*2+0x43] +XDIS 11e68: MISC BASE D53F8D5C6C44 lea r11, ptr [r28+r29*2+0x44] +XDIS 11e6e: MISC BASE D53F8D5C6D45 lea r11, ptr [r29+r29*2+0x45] +XDIS 11e74: MISC BASE D53F8D5C6E46 lea r11, ptr [r30+r29*2+0x46] +XDIS 11e7a: MISC BASE D53F8D5C6F47 lea r11, ptr [r31+r29*2+0x47] +XDIS 11e80: MISC BASE D52E8D5C7029 lea r11, ptr [rax+r30*2+0x29] +XDIS 11e86: MISC BASE D52E8D5C712A lea r11, ptr [rcx+r30*2+0x2a] +XDIS 11e8c: MISC BASE D52E8D5C722B lea r11, ptr [rdx+r30*2+0x2b] +XDIS 11e92: MISC BASE D52E8D5C732C lea r11, ptr [rbx+r30*2+0x2c] +XDIS 11e98: MISC BASE D52E8D5C742D lea r11, ptr [rsp+r30*2+0x2d] +XDIS 11e9e: MISC BASE D52E8D5C752E lea r11, ptr [rbp+r30*2+0x2e] +XDIS 11ea4: MISC BASE D52E8D5C762F lea r11, ptr [rsi+r30*2+0x2f] +XDIS 11eaa: MISC BASE D52E8D5C7730 lea r11, ptr [rdi+r30*2+0x30] +XDIS 11eb0: MISC BASE D52F8D5C7031 lea r11, ptr [r8+r30*2+0x31] +XDIS 11eb6: MISC BASE D52F8D5C7132 lea r11, ptr [r9+r30*2+0x32] +XDIS 11ebc: MISC BASE D52F8D5C7233 lea r11, ptr [r10+r30*2+0x33] +XDIS 11ec2: MISC BASE D52F8D5C7334 lea r11, ptr [r11+r30*2+0x34] +XDIS 11ec8: MISC BASE D52F8D5C7435 lea r11, ptr [r12+r30*2+0x35] +XDIS 11ece: MISC BASE D52F8D5C7536 lea r11, ptr [r13+r30*2+0x36] +XDIS 11ed4: MISC BASE D52F8D5C7637 lea r11, ptr [r14+r30*2+0x37] +XDIS 11eda: MISC BASE D52F8D5C7738 lea r11, ptr [r15+r30*2+0x38] +XDIS 11ee0: MISC BASE D53E8D5C7039 lea r11, ptr [r16+r30*2+0x39] +XDIS 11ee6: MISC BASE D53E8D5C713A lea r11, ptr [r17+r30*2+0x3a] +XDIS 11eec: MISC BASE D53E8D5C723B lea r11, ptr [r18+r30*2+0x3b] +XDIS 11ef2: MISC BASE D53E8D5C733C lea r11, ptr [r19+r30*2+0x3c] +XDIS 11ef8: MISC BASE D53E8D5C743D lea r11, ptr [r20+r30*2+0x3d] +XDIS 11efe: MISC BASE D53E8D5C753E lea r11, ptr [r21+r30*2+0x3e] +XDIS 11f04: MISC BASE D53E8D5C763F lea r11, ptr [r22+r30*2+0x3f] +XDIS 11f0a: MISC BASE D53E8D5C7740 lea r11, ptr [r23+r30*2+0x40] +XDIS 11f10: MISC BASE D53F8D5C7041 lea r11, ptr [r24+r30*2+0x41] +XDIS 11f16: MISC BASE D53F8D5C7142 lea r11, ptr [r25+r30*2+0x42] +XDIS 11f1c: MISC BASE D53F8D5C7243 lea r11, ptr [r26+r30*2+0x43] +XDIS 11f22: MISC BASE D53F8D5C7344 lea r11, ptr [r27+r30*2+0x44] +XDIS 11f28: MISC BASE D53F8D5C7445 lea r11, ptr [r28+r30*2+0x45] +XDIS 11f2e: MISC BASE D53F8D5C7546 lea r11, ptr [r29+r30*2+0x46] +XDIS 11f34: MISC BASE D53F8D5C7647 lea r11, ptr [r30+r30*2+0x47] +XDIS 11f3a: MISC BASE D53F8D5C7748 lea r11, ptr [r31+r30*2+0x48] +XDIS 11f40: MISC BASE D52E8D5C782A lea r11, ptr [rax+r31*2+0x2a] +XDIS 11f46: MISC BASE D52E8D5C792B lea r11, ptr [rcx+r31*2+0x2b] +XDIS 11f4c: MISC BASE D52E8D5C7A2C lea r11, ptr [rdx+r31*2+0x2c] +XDIS 11f52: MISC BASE D52E8D5C7B2D lea r11, ptr [rbx+r31*2+0x2d] +XDIS 11f58: MISC BASE D52E8D5C7C2E lea r11, ptr [rsp+r31*2+0x2e] +XDIS 11f5e: MISC BASE D52E8D5C7D2F lea r11, ptr [rbp+r31*2+0x2f] +XDIS 11f64: MISC BASE D52E8D5C7E30 lea r11, ptr [rsi+r31*2+0x30] +XDIS 11f6a: MISC BASE D52E8D5C7F31 lea r11, ptr [rdi+r31*2+0x31] +XDIS 11f70: MISC BASE D52F8D5C7832 lea r11, ptr [r8+r31*2+0x32] +XDIS 11f76: MISC BASE D52F8D5C7933 lea r11, ptr [r9+r31*2+0x33] +XDIS 11f7c: MISC BASE D52F8D5C7A34 lea r11, ptr [r10+r31*2+0x34] +XDIS 11f82: MISC BASE D52F8D5C7B35 lea r11, ptr [r11+r31*2+0x35] +XDIS 11f88: MISC BASE D52F8D5C7C36 lea r11, ptr [r12+r31*2+0x36] +XDIS 11f8e: MISC BASE D52F8D5C7D37 lea r11, ptr [r13+r31*2+0x37] +XDIS 11f94: MISC BASE D52F8D5C7E38 lea r11, ptr [r14+r31*2+0x38] +XDIS 11f9a: MISC BASE D52F8D5C7F39 lea r11, ptr [r15+r31*2+0x39] +XDIS 11fa0: MISC BASE D53E8D5C783A lea r11, ptr [r16+r31*2+0x3a] +XDIS 11fa6: MISC BASE D53E8D5C793B lea r11, ptr [r17+r31*2+0x3b] +XDIS 11fac: MISC BASE D53E8D5C7A3C lea r11, ptr [r18+r31*2+0x3c] +XDIS 11fb2: MISC BASE D53E8D5C7B3D lea r11, ptr [r19+r31*2+0x3d] +XDIS 11fb8: MISC BASE D53E8D5C7C3E lea r11, ptr [r20+r31*2+0x3e] +XDIS 11fbe: MISC BASE D53E8D5C7D3F lea r11, ptr [r21+r31*2+0x3f] +XDIS 11fc4: MISC BASE D53E8D5C7E40 lea r11, ptr [r22+r31*2+0x40] +XDIS 11fca: MISC BASE D53E8D5C7F41 lea r11, ptr [r23+r31*2+0x41] +XDIS 11fd0: MISC BASE D53F8D5C7842 lea r11, ptr [r24+r31*2+0x42] +XDIS 11fd6: MISC BASE D53F8D5C7943 lea r11, ptr [r25+r31*2+0x43] +XDIS 11fdc: MISC BASE D53F8D5C7A44 lea r11, ptr [r26+r31*2+0x44] +XDIS 11fe2: MISC BASE D53F8D5C7B45 lea r11, ptr [r27+r31*2+0x45] +XDIS 11fe8: MISC BASE D53F8D5C7C46 lea r11, ptr [r28+r31*2+0x46] +XDIS 11fee: MISC BASE D53F8D5C7D47 lea r11, ptr [r29+r31*2+0x47] +XDIS 11ff4: MISC BASE D53F8D5C7E48 lea r11, ptr [r30+r31*2+0x48] +XDIS 11ffa: MISC BASE D53F8D5C7F49 lea r11, ptr [r31+r31*2+0x49] +XDIS 12000: MISC BASE D50C8D64400C lea r12, ptr [rax+rax*2+0xc] +XDIS 12006: MISC BASE D50C8D64410D lea r12, ptr [rcx+rax*2+0xd] +XDIS 1200c: MISC BASE D50C8D64420E lea r12, ptr [rdx+rax*2+0xe] +XDIS 12012: MISC BASE D50C8D64430F lea r12, ptr [rbx+rax*2+0xf] +XDIS 12018: MISC BASE D50C8D644410 lea r12, ptr [rsp+rax*2+0x10] +XDIS 1201e: MISC BASE D50C8D644511 lea r12, ptr [rbp+rax*2+0x11] +XDIS 12024: MISC BASE D50C8D644612 lea r12, ptr [rsi+rax*2+0x12] +XDIS 1202a: MISC BASE D50C8D644713 lea r12, ptr [rdi+rax*2+0x13] +XDIS 12030: MISC BASE D50D8D644014 lea r12, ptr [r8+rax*2+0x14] +XDIS 12036: MISC BASE D50D8D644115 lea r12, ptr [r9+rax*2+0x15] +XDIS 1203c: MISC BASE D50D8D644216 lea r12, ptr [r10+rax*2+0x16] +XDIS 12042: MISC BASE D50D8D644317 lea r12, ptr [r11+rax*2+0x17] +XDIS 12048: MISC BASE D50D8D644418 lea r12, ptr [r12+rax*2+0x18] +XDIS 1204e: MISC BASE D50D8D644519 lea r12, ptr [r13+rax*2+0x19] +XDIS 12054: MISC BASE D50D8D64461A lea r12, ptr [r14+rax*2+0x1a] +XDIS 1205a: MISC BASE D50D8D64471B lea r12, ptr [r15+rax*2+0x1b] +XDIS 12060: MISC BASE D51C8D64401C lea r12, ptr [r16+rax*2+0x1c] +XDIS 12066: MISC BASE D51C8D64411D lea r12, ptr [r17+rax*2+0x1d] +XDIS 1206c: MISC BASE D51C8D64421E lea r12, ptr [r18+rax*2+0x1e] +XDIS 12072: MISC BASE D51C8D64431F lea r12, ptr [r19+rax*2+0x1f] +XDIS 12078: MISC BASE D51C8D644420 lea r12, ptr [r20+rax*2+0x20] +XDIS 1207e: MISC BASE D51C8D644521 lea r12, ptr [r21+rax*2+0x21] +XDIS 12084: MISC BASE D51C8D644622 lea r12, ptr [r22+rax*2+0x22] +XDIS 1208a: MISC BASE D51C8D644723 lea r12, ptr [r23+rax*2+0x23] +XDIS 12090: MISC BASE D51D8D644024 lea r12, ptr [r24+rax*2+0x24] +XDIS 12096: MISC BASE D51D8D644125 lea r12, ptr [r25+rax*2+0x25] +XDIS 1209c: MISC BASE D51D8D644226 lea r12, ptr [r26+rax*2+0x26] +XDIS 120a2: MISC BASE D51D8D644327 lea r12, ptr [r27+rax*2+0x27] +XDIS 120a8: MISC BASE D51D8D644428 lea r12, ptr [r28+rax*2+0x28] +XDIS 120ae: MISC BASE D51D8D644529 lea r12, ptr [r29+rax*2+0x29] +XDIS 120b4: MISC BASE D51D8D64462A lea r12, ptr [r30+rax*2+0x2a] +XDIS 120ba: MISC BASE D51D8D64472B lea r12, ptr [r31+rax*2+0x2b] +XDIS 120c0: MISC BASE D50C8D64480D lea r12, ptr [rax+rcx*2+0xd] +XDIS 120c6: MISC BASE D50C8D64490E lea r12, ptr [rcx+rcx*2+0xe] +XDIS 120cc: MISC BASE D50C8D644A0F lea r12, ptr [rdx+rcx*2+0xf] +XDIS 120d2: MISC BASE D50C8D644B10 lea r12, ptr [rbx+rcx*2+0x10] +XDIS 120d8: MISC BASE D50C8D644C11 lea r12, ptr [rsp+rcx*2+0x11] +XDIS 120de: MISC BASE D50C8D644D12 lea r12, ptr [rbp+rcx*2+0x12] +XDIS 120e4: MISC BASE D50C8D644E13 lea r12, ptr [rsi+rcx*2+0x13] +XDIS 120ea: MISC BASE D50C8D644F14 lea r12, ptr [rdi+rcx*2+0x14] +XDIS 120f0: MISC BASE D50D8D644815 lea r12, ptr [r8+rcx*2+0x15] +XDIS 120f6: MISC BASE D50D8D644916 lea r12, ptr [r9+rcx*2+0x16] +XDIS 120fc: MISC BASE D50D8D644A17 lea r12, ptr [r10+rcx*2+0x17] +XDIS 12102: MISC BASE D50D8D644B18 lea r12, ptr [r11+rcx*2+0x18] +XDIS 12108: MISC BASE D50D8D644C19 lea r12, ptr [r12+rcx*2+0x19] +XDIS 1210e: MISC BASE D50D8D644D1A lea r12, ptr [r13+rcx*2+0x1a] +XDIS 12114: MISC BASE D50D8D644E1B lea r12, ptr [r14+rcx*2+0x1b] +XDIS 1211a: MISC BASE D50D8D644F1C lea r12, ptr [r15+rcx*2+0x1c] +XDIS 12120: MISC BASE D51C8D64481D lea r12, ptr [r16+rcx*2+0x1d] +XDIS 12126: MISC BASE D51C8D64491E lea r12, ptr [r17+rcx*2+0x1e] +XDIS 1212c: MISC BASE D51C8D644A1F lea r12, ptr [r18+rcx*2+0x1f] +XDIS 12132: MISC BASE D51C8D644B20 lea r12, ptr [r19+rcx*2+0x20] +XDIS 12138: MISC BASE D51C8D644C21 lea r12, ptr [r20+rcx*2+0x21] +XDIS 1213e: MISC BASE D51C8D644D22 lea r12, ptr [r21+rcx*2+0x22] +XDIS 12144: MISC BASE D51C8D644E23 lea r12, ptr [r22+rcx*2+0x23] +XDIS 1214a: MISC BASE D51C8D644F24 lea r12, ptr [r23+rcx*2+0x24] +XDIS 12150: MISC BASE D51D8D644825 lea r12, ptr [r24+rcx*2+0x25] +XDIS 12156: MISC BASE D51D8D644926 lea r12, ptr [r25+rcx*2+0x26] +XDIS 1215c: MISC BASE D51D8D644A27 lea r12, ptr [r26+rcx*2+0x27] +XDIS 12162: MISC BASE D51D8D644B28 lea r12, ptr [r27+rcx*2+0x28] +XDIS 12168: MISC BASE D51D8D644C29 lea r12, ptr [r28+rcx*2+0x29] +XDIS 1216e: MISC BASE D51D8D644D2A lea r12, ptr [r29+rcx*2+0x2a] +XDIS 12174: MISC BASE D51D8D644E2B lea r12, ptr [r30+rcx*2+0x2b] +XDIS 1217a: MISC BASE D51D8D644F2C lea r12, ptr [r31+rcx*2+0x2c] +XDIS 12180: MISC BASE D50C8D64500E lea r12, ptr [rax+rdx*2+0xe] +XDIS 12186: MISC BASE D50C8D64510F lea r12, ptr [rcx+rdx*2+0xf] +XDIS 1218c: MISC BASE D50C8D645210 lea r12, ptr [rdx+rdx*2+0x10] +XDIS 12192: MISC BASE D50C8D645311 lea r12, ptr [rbx+rdx*2+0x11] +XDIS 12198: MISC BASE D50C8D645412 lea r12, ptr [rsp+rdx*2+0x12] +XDIS 1219e: MISC BASE D50C8D645513 lea r12, ptr [rbp+rdx*2+0x13] +XDIS 121a4: MISC BASE D50C8D645614 lea r12, ptr [rsi+rdx*2+0x14] +XDIS 121aa: MISC BASE D50C8D645715 lea r12, ptr [rdi+rdx*2+0x15] +XDIS 121b0: MISC BASE D50D8D645016 lea r12, ptr [r8+rdx*2+0x16] +XDIS 121b6: MISC BASE D50D8D645117 lea r12, ptr [r9+rdx*2+0x17] +XDIS 121bc: MISC BASE D50D8D645218 lea r12, ptr [r10+rdx*2+0x18] +XDIS 121c2: MISC BASE D50D8D645319 lea r12, ptr [r11+rdx*2+0x19] +XDIS 121c8: MISC BASE D50D8D64541A lea r12, ptr [r12+rdx*2+0x1a] +XDIS 121ce: MISC BASE D50D8D64551B lea r12, ptr [r13+rdx*2+0x1b] +XDIS 121d4: MISC BASE D50D8D64561C lea r12, ptr [r14+rdx*2+0x1c] +XDIS 121da: MISC BASE D50D8D64571D lea r12, ptr [r15+rdx*2+0x1d] +XDIS 121e0: MISC BASE D51C8D64501E lea r12, ptr [r16+rdx*2+0x1e] +XDIS 121e6: MISC BASE D51C8D64511F lea r12, ptr [r17+rdx*2+0x1f] +XDIS 121ec: MISC BASE D51C8D645220 lea r12, ptr [r18+rdx*2+0x20] +XDIS 121f2: MISC BASE D51C8D645321 lea r12, ptr [r19+rdx*2+0x21] +XDIS 121f8: MISC BASE D51C8D645422 lea r12, ptr [r20+rdx*2+0x22] +XDIS 121fe: MISC BASE D51C8D645523 lea r12, ptr [r21+rdx*2+0x23] +XDIS 12204: MISC BASE D51C8D645624 lea r12, ptr [r22+rdx*2+0x24] +XDIS 1220a: MISC BASE D51C8D645725 lea r12, ptr [r23+rdx*2+0x25] +XDIS 12210: MISC BASE D51D8D645026 lea r12, ptr [r24+rdx*2+0x26] +XDIS 12216: MISC BASE D51D8D645127 lea r12, ptr [r25+rdx*2+0x27] +XDIS 1221c: MISC BASE D51D8D645228 lea r12, ptr [r26+rdx*2+0x28] +XDIS 12222: MISC BASE D51D8D645329 lea r12, ptr [r27+rdx*2+0x29] +XDIS 12228: MISC BASE D51D8D64542A lea r12, ptr [r28+rdx*2+0x2a] +XDIS 1222e: MISC BASE D51D8D64552B lea r12, ptr [r29+rdx*2+0x2b] +XDIS 12234: MISC BASE D51D8D64562C lea r12, ptr [r30+rdx*2+0x2c] +XDIS 1223a: MISC BASE D51D8D64572D lea r12, ptr [r31+rdx*2+0x2d] +XDIS 12240: MISC BASE D50C8D64580F lea r12, ptr [rax+rbx*2+0xf] +XDIS 12246: MISC BASE D50C8D645910 lea r12, ptr [rcx+rbx*2+0x10] +XDIS 1224c: MISC BASE D50C8D645A11 lea r12, ptr [rdx+rbx*2+0x11] +XDIS 12252: MISC BASE D50C8D645B12 lea r12, ptr [rbx+rbx*2+0x12] +XDIS 12258: MISC BASE D50C8D645C13 lea r12, ptr [rsp+rbx*2+0x13] +XDIS 1225e: MISC BASE D50C8D645D14 lea r12, ptr [rbp+rbx*2+0x14] +XDIS 12264: MISC BASE D50C8D645E15 lea r12, ptr [rsi+rbx*2+0x15] +XDIS 1226a: MISC BASE D50C8D645F16 lea r12, ptr [rdi+rbx*2+0x16] +XDIS 12270: MISC BASE D50D8D645817 lea r12, ptr [r8+rbx*2+0x17] +XDIS 12276: MISC BASE D50D8D645918 lea r12, ptr [r9+rbx*2+0x18] +XDIS 1227c: MISC BASE D50D8D645A19 lea r12, ptr [r10+rbx*2+0x19] +XDIS 12282: MISC BASE D50D8D645B1A lea r12, ptr [r11+rbx*2+0x1a] +XDIS 12288: MISC BASE D50D8D645C1B lea r12, ptr [r12+rbx*2+0x1b] +XDIS 1228e: MISC BASE D50D8D645D1C lea r12, ptr [r13+rbx*2+0x1c] +XDIS 12294: MISC BASE D50D8D645E1D lea r12, ptr [r14+rbx*2+0x1d] +XDIS 1229a: MISC BASE D50D8D645F1E lea r12, ptr [r15+rbx*2+0x1e] +XDIS 122a0: MISC BASE D51C8D64581F lea r12, ptr [r16+rbx*2+0x1f] +XDIS 122a6: MISC BASE D51C8D645920 lea r12, ptr [r17+rbx*2+0x20] +XDIS 122ac: MISC BASE D51C8D645A21 lea r12, ptr [r18+rbx*2+0x21] +XDIS 122b2: MISC BASE D51C8D645B22 lea r12, ptr [r19+rbx*2+0x22] +XDIS 122b8: MISC BASE D51C8D645C23 lea r12, ptr [r20+rbx*2+0x23] +XDIS 122be: MISC BASE D51C8D645D24 lea r12, ptr [r21+rbx*2+0x24] +XDIS 122c4: MISC BASE D51C8D645E25 lea r12, ptr [r22+rbx*2+0x25] +XDIS 122ca: MISC BASE D51C8D645F26 lea r12, ptr [r23+rbx*2+0x26] +XDIS 122d0: MISC BASE D51D8D645827 lea r12, ptr [r24+rbx*2+0x27] +XDIS 122d6: MISC BASE D51D8D645928 lea r12, ptr [r25+rbx*2+0x28] +XDIS 122dc: MISC BASE D51D8D645A29 lea r12, ptr [r26+rbx*2+0x29] +XDIS 122e2: MISC BASE D51D8D645B2A lea r12, ptr [r27+rbx*2+0x2a] +XDIS 122e8: MISC BASE D51D8D645C2B lea r12, ptr [r28+rbx*2+0x2b] +XDIS 122ee: MISC BASE D51D8D645D2C lea r12, ptr [r29+rbx*2+0x2c] +XDIS 122f4: MISC BASE D51D8D645E2D lea r12, ptr [r30+rbx*2+0x2d] +XDIS 122fa: MISC BASE D51D8D645F2E lea r12, ptr [r31+rbx*2+0x2e] +XDIS 12300: MISC BASE D50C8D646010 lea r12, ptr [rax+0x10] +XDIS 12306: MISC BASE D50C8D646111 lea r12, ptr [rcx+0x11] +XDIS 1230c: MISC BASE D50C8D646212 lea r12, ptr [rdx+0x12] +XDIS 12312: MISC BASE D50C8D646313 lea r12, ptr [rbx+0x13] +XDIS 12318: MISC BASE D50C8D646414 lea r12, ptr [rsp+0x14] +XDIS 1231e: MISC BASE D50C8D646515 lea r12, ptr [rbp+0x15] +XDIS 12324: MISC BASE D50C8D646616 lea r12, ptr [rsi+0x16] +XDIS 1232a: MISC BASE D50C8D646717 lea r12, ptr [rdi+0x17] +XDIS 12330: MISC BASE D50D8D646018 lea r12, ptr [r8+0x18] +XDIS 12336: MISC BASE D50D8D646119 lea r12, ptr [r9+0x19] +XDIS 1233c: MISC BASE D50D8D64621A lea r12, ptr [r10+0x1a] +XDIS 12342: MISC BASE D50D8D64631B lea r12, ptr [r11+0x1b] +XDIS 12348: MISC BASE D50D8D64641C lea r12, ptr [r12+0x1c] +XDIS 1234e: MISC BASE D50D8D64651D lea r12, ptr [r13+0x1d] +XDIS 12354: MISC BASE D50D8D64661E lea r12, ptr [r14+0x1e] +XDIS 1235a: MISC BASE D50D8D64671F lea r12, ptr [r15+0x1f] +XDIS 12360: MISC BASE D51C8D646020 lea r12, ptr [r16+0x20] +XDIS 12366: MISC BASE D51C8D646121 lea r12, ptr [r17+0x21] +XDIS 1236c: MISC BASE D51C8D646222 lea r12, ptr [r18+0x22] +XDIS 12372: MISC BASE D51C8D646323 lea r12, ptr [r19+0x23] +XDIS 12378: MISC BASE D51C8D646424 lea r12, ptr [r20+0x24] +XDIS 1237e: MISC BASE D51C8D646525 lea r12, ptr [r21+0x25] +XDIS 12384: MISC BASE D51C8D646626 lea r12, ptr [r22+0x26] +XDIS 1238a: MISC BASE D51C8D646727 lea r12, ptr [r23+0x27] +XDIS 12390: MISC BASE D51D8D646028 lea r12, ptr [r24+0x28] +XDIS 12396: MISC BASE D51D8D646129 lea r12, ptr [r25+0x29] +XDIS 1239c: MISC BASE D51D8D64622A lea r12, ptr [r26+0x2a] +XDIS 123a2: MISC BASE D51D8D64632B lea r12, ptr [r27+0x2b] +XDIS 123a8: MISC BASE D51D8D64642C lea r12, ptr [r28+0x2c] +XDIS 123ae: MISC BASE D51D8D64652D lea r12, ptr [r29+0x2d] +XDIS 123b4: MISC BASE D51D8D64662E lea r12, ptr [r30+0x2e] +XDIS 123ba: MISC BASE D51D8D64672F lea r12, ptr [r31+0x2f] +XDIS 123c0: MISC BASE D50C8D646811 lea r12, ptr [rax+rbp*2+0x11] +XDIS 123c6: MISC BASE D50C8D646912 lea r12, ptr [rcx+rbp*2+0x12] +XDIS 123cc: MISC BASE D50C8D646A13 lea r12, ptr [rdx+rbp*2+0x13] +XDIS 123d2: MISC BASE D50C8D646B14 lea r12, ptr [rbx+rbp*2+0x14] +XDIS 123d8: MISC BASE D50C8D646C15 lea r12, ptr [rsp+rbp*2+0x15] +XDIS 123de: MISC BASE D50C8D646D16 lea r12, ptr [rbp+rbp*2+0x16] +XDIS 123e4: MISC BASE D50C8D646E17 lea r12, ptr [rsi+rbp*2+0x17] +XDIS 123ea: MISC BASE D50C8D646F18 lea r12, ptr [rdi+rbp*2+0x18] +XDIS 123f0: MISC BASE D50D8D646819 lea r12, ptr [r8+rbp*2+0x19] +XDIS 123f6: MISC BASE D50D8D64691A lea r12, ptr [r9+rbp*2+0x1a] +XDIS 123fc: MISC BASE D50D8D646A1B lea r12, ptr [r10+rbp*2+0x1b] +XDIS 12402: MISC BASE D50D8D646B1C lea r12, ptr [r11+rbp*2+0x1c] +XDIS 12408: MISC BASE D50D8D646C1D lea r12, ptr [r12+rbp*2+0x1d] +XDIS 1240e: MISC BASE D50D8D646D1E lea r12, ptr [r13+rbp*2+0x1e] +XDIS 12414: MISC BASE D50D8D646E1F lea r12, ptr [r14+rbp*2+0x1f] +XDIS 1241a: MISC BASE D50D8D646F20 lea r12, ptr [r15+rbp*2+0x20] +XDIS 12420: MISC BASE D51C8D646821 lea r12, ptr [r16+rbp*2+0x21] +XDIS 12426: MISC BASE D51C8D646922 lea r12, ptr [r17+rbp*2+0x22] +XDIS 1242c: MISC BASE D51C8D646A23 lea r12, ptr [r18+rbp*2+0x23] +XDIS 12432: MISC BASE D51C8D646B24 lea r12, ptr [r19+rbp*2+0x24] +XDIS 12438: MISC BASE D51C8D646C25 lea r12, ptr [r20+rbp*2+0x25] +XDIS 1243e: MISC BASE D51C8D646D26 lea r12, ptr [r21+rbp*2+0x26] +XDIS 12444: MISC BASE D51C8D646E27 lea r12, ptr [r22+rbp*2+0x27] +XDIS 1244a: MISC BASE D51C8D646F28 lea r12, ptr [r23+rbp*2+0x28] +XDIS 12450: MISC BASE D51D8D646829 lea r12, ptr [r24+rbp*2+0x29] +XDIS 12456: MISC BASE D51D8D64692A lea r12, ptr [r25+rbp*2+0x2a] +XDIS 1245c: MISC BASE D51D8D646A2B lea r12, ptr [r26+rbp*2+0x2b] +XDIS 12462: MISC BASE D51D8D646B2C lea r12, ptr [r27+rbp*2+0x2c] +XDIS 12468: MISC BASE D51D8D646C2D lea r12, ptr [r28+rbp*2+0x2d] +XDIS 1246e: MISC BASE D51D8D646D2E lea r12, ptr [r29+rbp*2+0x2e] +XDIS 12474: MISC BASE D51D8D646E2F lea r12, ptr [r30+rbp*2+0x2f] +XDIS 1247a: MISC BASE D51D8D646F30 lea r12, ptr [r31+rbp*2+0x30] +XDIS 12480: MISC BASE D50C8D647012 lea r12, ptr [rax+rsi*2+0x12] +XDIS 12486: MISC BASE D50C8D647113 lea r12, ptr [rcx+rsi*2+0x13] +XDIS 1248c: MISC BASE D50C8D647214 lea r12, ptr [rdx+rsi*2+0x14] +XDIS 12492: MISC BASE D50C8D647315 lea r12, ptr [rbx+rsi*2+0x15] +XDIS 12498: MISC BASE D50C8D647416 lea r12, ptr [rsp+rsi*2+0x16] +XDIS 1249e: MISC BASE D50C8D647517 lea r12, ptr [rbp+rsi*2+0x17] +XDIS 124a4: MISC BASE D50C8D647618 lea r12, ptr [rsi+rsi*2+0x18] +XDIS 124aa: MISC BASE D50C8D647719 lea r12, ptr [rdi+rsi*2+0x19] +XDIS 124b0: MISC BASE D50D8D64701A lea r12, ptr [r8+rsi*2+0x1a] +XDIS 124b6: MISC BASE D50D8D64711B lea r12, ptr [r9+rsi*2+0x1b] +XDIS 124bc: MISC BASE D50D8D64721C lea r12, ptr [r10+rsi*2+0x1c] +XDIS 124c2: MISC BASE D50D8D64731D lea r12, ptr [r11+rsi*2+0x1d] +XDIS 124c8: MISC BASE D50D8D64741E lea r12, ptr [r12+rsi*2+0x1e] +XDIS 124ce: MISC BASE D50D8D64751F lea r12, ptr [r13+rsi*2+0x1f] +XDIS 124d4: MISC BASE D50D8D647620 lea r12, ptr [r14+rsi*2+0x20] +XDIS 124da: MISC BASE D50D8D647721 lea r12, ptr [r15+rsi*2+0x21] +XDIS 124e0: MISC BASE D51C8D647022 lea r12, ptr [r16+rsi*2+0x22] +XDIS 124e6: MISC BASE D51C8D647123 lea r12, ptr [r17+rsi*2+0x23] +XDIS 124ec: MISC BASE D51C8D647224 lea r12, ptr [r18+rsi*2+0x24] +XDIS 124f2: MISC BASE D51C8D647325 lea r12, ptr [r19+rsi*2+0x25] +XDIS 124f8: MISC BASE D51C8D647426 lea r12, ptr [r20+rsi*2+0x26] +XDIS 124fe: MISC BASE D51C8D647527 lea r12, ptr [r21+rsi*2+0x27] +XDIS 12504: MISC BASE D51C8D647628 lea r12, ptr [r22+rsi*2+0x28] +XDIS 1250a: MISC BASE D51C8D647729 lea r12, ptr [r23+rsi*2+0x29] +XDIS 12510: MISC BASE D51D8D64702A lea r12, ptr [r24+rsi*2+0x2a] +XDIS 12516: MISC BASE D51D8D64712B lea r12, ptr [r25+rsi*2+0x2b] +XDIS 1251c: MISC BASE D51D8D64722C lea r12, ptr [r26+rsi*2+0x2c] +XDIS 12522: MISC BASE D51D8D64732D lea r12, ptr [r27+rsi*2+0x2d] +XDIS 12528: MISC BASE D51D8D64742E lea r12, ptr [r28+rsi*2+0x2e] +XDIS 1252e: MISC BASE D51D8D64752F lea r12, ptr [r29+rsi*2+0x2f] +XDIS 12534: MISC BASE D51D8D647630 lea r12, ptr [r30+rsi*2+0x30] +XDIS 1253a: MISC BASE D51D8D647731 lea r12, ptr [r31+rsi*2+0x31] +XDIS 12540: MISC BASE D50C8D647813 lea r12, ptr [rax+rdi*2+0x13] +XDIS 12546: MISC BASE D50C8D647914 lea r12, ptr [rcx+rdi*2+0x14] +XDIS 1254c: MISC BASE D50C8D647A15 lea r12, ptr [rdx+rdi*2+0x15] +XDIS 12552: MISC BASE D50C8D647B16 lea r12, ptr [rbx+rdi*2+0x16] +XDIS 12558: MISC BASE D50C8D647C17 lea r12, ptr [rsp+rdi*2+0x17] +XDIS 1255e: MISC BASE D50C8D647D18 lea r12, ptr [rbp+rdi*2+0x18] +XDIS 12564: MISC BASE D50C8D647E19 lea r12, ptr [rsi+rdi*2+0x19] +XDIS 1256a: MISC BASE D50C8D647F1A lea r12, ptr [rdi+rdi*2+0x1a] +XDIS 12570: MISC BASE D50D8D64781B lea r12, ptr [r8+rdi*2+0x1b] +XDIS 12576: MISC BASE D50D8D64791C lea r12, ptr [r9+rdi*2+0x1c] +XDIS 1257c: MISC BASE D50D8D647A1D lea r12, ptr [r10+rdi*2+0x1d] +XDIS 12582: MISC BASE D50D8D647B1E lea r12, ptr [r11+rdi*2+0x1e] +XDIS 12588: MISC BASE D50D8D647C1F lea r12, ptr [r12+rdi*2+0x1f] +XDIS 1258e: MISC BASE D50D8D647D20 lea r12, ptr [r13+rdi*2+0x20] +XDIS 12594: MISC BASE D50D8D647E21 lea r12, ptr [r14+rdi*2+0x21] +XDIS 1259a: MISC BASE D50D8D647F22 lea r12, ptr [r15+rdi*2+0x22] +XDIS 125a0: MISC BASE D51C8D647823 lea r12, ptr [r16+rdi*2+0x23] +XDIS 125a6: MISC BASE D51C8D647924 lea r12, ptr [r17+rdi*2+0x24] +XDIS 125ac: MISC BASE D51C8D647A25 lea r12, ptr [r18+rdi*2+0x25] +XDIS 125b2: MISC BASE D51C8D647B26 lea r12, ptr [r19+rdi*2+0x26] +XDIS 125b8: MISC BASE D51C8D647C27 lea r12, ptr [r20+rdi*2+0x27] +XDIS 125be: MISC BASE D51C8D647D28 lea r12, ptr [r21+rdi*2+0x28] +XDIS 125c4: MISC BASE D51C8D647E29 lea r12, ptr [r22+rdi*2+0x29] +XDIS 125ca: MISC BASE D51C8D647F2A lea r12, ptr [r23+rdi*2+0x2a] +XDIS 125d0: MISC BASE D51D8D64782B lea r12, ptr [r24+rdi*2+0x2b] +XDIS 125d6: MISC BASE D51D8D64792C lea r12, ptr [r25+rdi*2+0x2c] +XDIS 125dc: MISC BASE D51D8D647A2D lea r12, ptr [r26+rdi*2+0x2d] +XDIS 125e2: MISC BASE D51D8D647B2E lea r12, ptr [r27+rdi*2+0x2e] +XDIS 125e8: MISC BASE D51D8D647C2F lea r12, ptr [r28+rdi*2+0x2f] +XDIS 125ee: MISC BASE D51D8D647D30 lea r12, ptr [r29+rdi*2+0x30] +XDIS 125f4: MISC BASE D51D8D647E31 lea r12, ptr [r30+rdi*2+0x31] +XDIS 125fa: MISC BASE D51D8D647F32 lea r12, ptr [r31+rdi*2+0x32] +XDIS 12600: MISC BASE D50E8D644014 lea r12, ptr [rax+r8*2+0x14] +XDIS 12606: MISC BASE D50E8D644115 lea r12, ptr [rcx+r8*2+0x15] +XDIS 1260c: MISC BASE D50E8D644216 lea r12, ptr [rdx+r8*2+0x16] +XDIS 12612: MISC BASE D50E8D644317 lea r12, ptr [rbx+r8*2+0x17] +XDIS 12618: MISC BASE D50E8D644418 lea r12, ptr [rsp+r8*2+0x18] +XDIS 1261e: MISC BASE D50E8D644519 lea r12, ptr [rbp+r8*2+0x19] +XDIS 12624: MISC BASE D50E8D64461A lea r12, ptr [rsi+r8*2+0x1a] +XDIS 1262a: MISC BASE D50E8D64471B lea r12, ptr [rdi+r8*2+0x1b] +XDIS 12630: MISC BASE D50F8D64401C lea r12, ptr [r8+r8*2+0x1c] +XDIS 12636: MISC BASE D50F8D64411D lea r12, ptr [r9+r8*2+0x1d] +XDIS 1263c: MISC BASE D50F8D64421E lea r12, ptr [r10+r8*2+0x1e] +XDIS 12642: MISC BASE D50F8D64431F lea r12, ptr [r11+r8*2+0x1f] +XDIS 12648: MISC BASE D50F8D644420 lea r12, ptr [r12+r8*2+0x20] +XDIS 1264e: MISC BASE D50F8D644521 lea r12, ptr [r13+r8*2+0x21] +XDIS 12654: MISC BASE D50F8D644622 lea r12, ptr [r14+r8*2+0x22] +XDIS 1265a: MISC BASE D50F8D644723 lea r12, ptr [r15+r8*2+0x23] +XDIS 12660: MISC BASE D51E8D644024 lea r12, ptr [r16+r8*2+0x24] +XDIS 12666: MISC BASE D51E8D644125 lea r12, ptr [r17+r8*2+0x25] +XDIS 1266c: MISC BASE D51E8D644226 lea r12, ptr [r18+r8*2+0x26] +XDIS 12672: MISC BASE D51E8D644327 lea r12, ptr [r19+r8*2+0x27] +XDIS 12678: MISC BASE D51E8D644428 lea r12, ptr [r20+r8*2+0x28] +XDIS 1267e: MISC BASE D51E8D644529 lea r12, ptr [r21+r8*2+0x29] +XDIS 12684: MISC BASE D51E8D64462A lea r12, ptr [r22+r8*2+0x2a] +XDIS 1268a: MISC BASE D51E8D64472B lea r12, ptr [r23+r8*2+0x2b] +XDIS 12690: MISC BASE D51F8D64402C lea r12, ptr [r24+r8*2+0x2c] +XDIS 12696: MISC BASE D51F8D64412D lea r12, ptr [r25+r8*2+0x2d] +XDIS 1269c: MISC BASE D51F8D64422E lea r12, ptr [r26+r8*2+0x2e] +XDIS 126a2: MISC BASE D51F8D64432F lea r12, ptr [r27+r8*2+0x2f] +XDIS 126a8: MISC BASE D51F8D644430 lea r12, ptr [r28+r8*2+0x30] +XDIS 126ae: MISC BASE D51F8D644531 lea r12, ptr [r29+r8*2+0x31] +XDIS 126b4: MISC BASE D51F8D644632 lea r12, ptr [r30+r8*2+0x32] +XDIS 126ba: MISC BASE D51F8D644733 lea r12, ptr [r31+r8*2+0x33] +XDIS 126c0: MISC BASE D50E8D644815 lea r12, ptr [rax+r9*2+0x15] +XDIS 126c6: MISC BASE D50E8D644916 lea r12, ptr [rcx+r9*2+0x16] +XDIS 126cc: MISC BASE D50E8D644A17 lea r12, ptr [rdx+r9*2+0x17] +XDIS 126d2: MISC BASE D50E8D644B18 lea r12, ptr [rbx+r9*2+0x18] +XDIS 126d8: MISC BASE D50E8D644C19 lea r12, ptr [rsp+r9*2+0x19] +XDIS 126de: MISC BASE D50E8D644D1A lea r12, ptr [rbp+r9*2+0x1a] +XDIS 126e4: MISC BASE D50E8D644E1B lea r12, ptr [rsi+r9*2+0x1b] +XDIS 126ea: MISC BASE D50E8D644F1C lea r12, ptr [rdi+r9*2+0x1c] +XDIS 126f0: MISC BASE D50F8D64481D lea r12, ptr [r8+r9*2+0x1d] +XDIS 126f6: MISC BASE D50F8D64491E lea r12, ptr [r9+r9*2+0x1e] +XDIS 126fc: MISC BASE D50F8D644A1F lea r12, ptr [r10+r9*2+0x1f] +XDIS 12702: MISC BASE D50F8D644B20 lea r12, ptr [r11+r9*2+0x20] +XDIS 12708: MISC BASE D50F8D644C21 lea r12, ptr [r12+r9*2+0x21] +XDIS 1270e: MISC BASE D50F8D644D22 lea r12, ptr [r13+r9*2+0x22] +XDIS 12714: MISC BASE D50F8D644E23 lea r12, ptr [r14+r9*2+0x23] +XDIS 1271a: MISC BASE D50F8D644F24 lea r12, ptr [r15+r9*2+0x24] +XDIS 12720: MISC BASE D51E8D644825 lea r12, ptr [r16+r9*2+0x25] +XDIS 12726: MISC BASE D51E8D644926 lea r12, ptr [r17+r9*2+0x26] +XDIS 1272c: MISC BASE D51E8D644A27 lea r12, ptr [r18+r9*2+0x27] +XDIS 12732: MISC BASE D51E8D644B28 lea r12, ptr [r19+r9*2+0x28] +XDIS 12738: MISC BASE D51E8D644C29 lea r12, ptr [r20+r9*2+0x29] +XDIS 1273e: MISC BASE D51E8D644D2A lea r12, ptr [r21+r9*2+0x2a] +XDIS 12744: MISC BASE D51E8D644E2B lea r12, ptr [r22+r9*2+0x2b] +XDIS 1274a: MISC BASE D51E8D644F2C lea r12, ptr [r23+r9*2+0x2c] +XDIS 12750: MISC BASE D51F8D64482D lea r12, ptr [r24+r9*2+0x2d] +XDIS 12756: MISC BASE D51F8D64492E lea r12, ptr [r25+r9*2+0x2e] +XDIS 1275c: MISC BASE D51F8D644A2F lea r12, ptr [r26+r9*2+0x2f] +XDIS 12762: MISC BASE D51F8D644B30 lea r12, ptr [r27+r9*2+0x30] +XDIS 12768: MISC BASE D51F8D644C31 lea r12, ptr [r28+r9*2+0x31] +XDIS 1276e: MISC BASE D51F8D644D32 lea r12, ptr [r29+r9*2+0x32] +XDIS 12774: MISC BASE D51F8D644E33 lea r12, ptr [r30+r9*2+0x33] +XDIS 1277a: MISC BASE D51F8D644F34 lea r12, ptr [r31+r9*2+0x34] +XDIS 12780: MISC BASE D50E8D645016 lea r12, ptr [rax+r10*2+0x16] +XDIS 12786: MISC BASE D50E8D645117 lea r12, ptr [rcx+r10*2+0x17] +XDIS 1278c: MISC BASE D50E8D645218 lea r12, ptr [rdx+r10*2+0x18] +XDIS 12792: MISC BASE D50E8D645319 lea r12, ptr [rbx+r10*2+0x19] +XDIS 12798: MISC BASE D50E8D64541A lea r12, ptr [rsp+r10*2+0x1a] +XDIS 1279e: MISC BASE D50E8D64551B lea r12, ptr [rbp+r10*2+0x1b] +XDIS 127a4: MISC BASE D50E8D64561C lea r12, ptr [rsi+r10*2+0x1c] +XDIS 127aa: MISC BASE D50E8D64571D lea r12, ptr [rdi+r10*2+0x1d] +XDIS 127b0: MISC BASE D50F8D64501E lea r12, ptr [r8+r10*2+0x1e] +XDIS 127b6: MISC BASE D50F8D64511F lea r12, ptr [r9+r10*2+0x1f] +XDIS 127bc: MISC BASE D50F8D645220 lea r12, ptr [r10+r10*2+0x20] +XDIS 127c2: MISC BASE D50F8D645321 lea r12, ptr [r11+r10*2+0x21] +XDIS 127c8: MISC BASE D50F8D645422 lea r12, ptr [r12+r10*2+0x22] +XDIS 127ce: MISC BASE D50F8D645523 lea r12, ptr [r13+r10*2+0x23] +XDIS 127d4: MISC BASE D50F8D645624 lea r12, ptr [r14+r10*2+0x24] +XDIS 127da: MISC BASE D50F8D645725 lea r12, ptr [r15+r10*2+0x25] +XDIS 127e0: MISC BASE D51E8D645026 lea r12, ptr [r16+r10*2+0x26] +XDIS 127e6: MISC BASE D51E8D645127 lea r12, ptr [r17+r10*2+0x27] +XDIS 127ec: MISC BASE D51E8D645228 lea r12, ptr [r18+r10*2+0x28] +XDIS 127f2: MISC BASE D51E8D645329 lea r12, ptr [r19+r10*2+0x29] +XDIS 127f8: MISC BASE D51E8D64542A lea r12, ptr [r20+r10*2+0x2a] +XDIS 127fe: MISC BASE D51E8D64552B lea r12, ptr [r21+r10*2+0x2b] +XDIS 12804: MISC BASE D51E8D64562C lea r12, ptr [r22+r10*2+0x2c] +XDIS 1280a: MISC BASE D51E8D64572D lea r12, ptr [r23+r10*2+0x2d] +XDIS 12810: MISC BASE D51F8D64502E lea r12, ptr [r24+r10*2+0x2e] +XDIS 12816: MISC BASE D51F8D64512F lea r12, ptr [r25+r10*2+0x2f] +XDIS 1281c: MISC BASE D51F8D645230 lea r12, ptr [r26+r10*2+0x30] +XDIS 12822: MISC BASE D51F8D645331 lea r12, ptr [r27+r10*2+0x31] +XDIS 12828: MISC BASE D51F8D645432 lea r12, ptr [r28+r10*2+0x32] +XDIS 1282e: MISC BASE D51F8D645533 lea r12, ptr [r29+r10*2+0x33] +XDIS 12834: MISC BASE D51F8D645634 lea r12, ptr [r30+r10*2+0x34] +XDIS 1283a: MISC BASE D51F8D645735 lea r12, ptr [r31+r10*2+0x35] +XDIS 12840: MISC BASE D50E8D645817 lea r12, ptr [rax+r11*2+0x17] +XDIS 12846: MISC BASE D50E8D645918 lea r12, ptr [rcx+r11*2+0x18] +XDIS 1284c: MISC BASE D50E8D645A19 lea r12, ptr [rdx+r11*2+0x19] +XDIS 12852: MISC BASE D50E8D645B1A lea r12, ptr [rbx+r11*2+0x1a] +XDIS 12858: MISC BASE D50E8D645C1B lea r12, ptr [rsp+r11*2+0x1b] +XDIS 1285e: MISC BASE D50E8D645D1C lea r12, ptr [rbp+r11*2+0x1c] +XDIS 12864: MISC BASE D50E8D645E1D lea r12, ptr [rsi+r11*2+0x1d] +XDIS 1286a: MISC BASE D50E8D645F1E lea r12, ptr [rdi+r11*2+0x1e] +XDIS 12870: MISC BASE D50F8D64581F lea r12, ptr [r8+r11*2+0x1f] +XDIS 12876: MISC BASE D50F8D645920 lea r12, ptr [r9+r11*2+0x20] +XDIS 1287c: MISC BASE D50F8D645A21 lea r12, ptr [r10+r11*2+0x21] +XDIS 12882: MISC BASE D50F8D645B22 lea r12, ptr [r11+r11*2+0x22] +XDIS 12888: MISC BASE D50F8D645C23 lea r12, ptr [r12+r11*2+0x23] +XDIS 1288e: MISC BASE D50F8D645D24 lea r12, ptr [r13+r11*2+0x24] +XDIS 12894: MISC BASE D50F8D645E25 lea r12, ptr [r14+r11*2+0x25] +XDIS 1289a: MISC BASE D50F8D645F26 lea r12, ptr [r15+r11*2+0x26] +XDIS 128a0: MISC BASE D51E8D645827 lea r12, ptr [r16+r11*2+0x27] +XDIS 128a6: MISC BASE D51E8D645928 lea r12, ptr [r17+r11*2+0x28] +XDIS 128ac: MISC BASE D51E8D645A29 lea r12, ptr [r18+r11*2+0x29] +XDIS 128b2: MISC BASE D51E8D645B2A lea r12, ptr [r19+r11*2+0x2a] +XDIS 128b8: MISC BASE D51E8D645C2B lea r12, ptr [r20+r11*2+0x2b] +XDIS 128be: MISC BASE D51E8D645D2C lea r12, ptr [r21+r11*2+0x2c] +XDIS 128c4: MISC BASE D51E8D645E2D lea r12, ptr [r22+r11*2+0x2d] +XDIS 128ca: MISC BASE D51E8D645F2E lea r12, ptr [r23+r11*2+0x2e] +XDIS 128d0: MISC BASE D51F8D64582F lea r12, ptr [r24+r11*2+0x2f] +XDIS 128d6: MISC BASE D51F8D645930 lea r12, ptr [r25+r11*2+0x30] +XDIS 128dc: MISC BASE D51F8D645A31 lea r12, ptr [r26+r11*2+0x31] +XDIS 128e2: MISC BASE D51F8D645B32 lea r12, ptr [r27+r11*2+0x32] +XDIS 128e8: MISC BASE D51F8D645C33 lea r12, ptr [r28+r11*2+0x33] +XDIS 128ee: MISC BASE D51F8D645D34 lea r12, ptr [r29+r11*2+0x34] +XDIS 128f4: MISC BASE D51F8D645E35 lea r12, ptr [r30+r11*2+0x35] +XDIS 128fa: MISC BASE D51F8D645F36 lea r12, ptr [r31+r11*2+0x36] +XDIS 12900: MISC BASE D50E8D646018 lea r12, ptr [rax+r12*2+0x18] +XDIS 12906: MISC BASE D50E8D646119 lea r12, ptr [rcx+r12*2+0x19] +XDIS 1290c: MISC BASE D50E8D64621A lea r12, ptr [rdx+r12*2+0x1a] +XDIS 12912: MISC BASE D50E8D64631B lea r12, ptr [rbx+r12*2+0x1b] +XDIS 12918: MISC BASE D50E8D64641C lea r12, ptr [rsp+r12*2+0x1c] +XDIS 1291e: MISC BASE D50E8D64651D lea r12, ptr [rbp+r12*2+0x1d] +XDIS 12924: MISC BASE D50E8D64661E lea r12, ptr [rsi+r12*2+0x1e] +XDIS 1292a: MISC BASE D50E8D64671F lea r12, ptr [rdi+r12*2+0x1f] +XDIS 12930: MISC BASE D50F8D646020 lea r12, ptr [r8+r12*2+0x20] +XDIS 12936: MISC BASE D50F8D646121 lea r12, ptr [r9+r12*2+0x21] +XDIS 1293c: MISC BASE D50F8D646222 lea r12, ptr [r10+r12*2+0x22] +XDIS 12942: MISC BASE D50F8D646323 lea r12, ptr [r11+r12*2+0x23] +XDIS 12948: MISC BASE D50F8D646424 lea r12, ptr [r12+r12*2+0x24] +XDIS 1294e: MISC BASE D50F8D646525 lea r12, ptr [r13+r12*2+0x25] +XDIS 12954: MISC BASE D50F8D646626 lea r12, ptr [r14+r12*2+0x26] +XDIS 1295a: MISC BASE D50F8D646727 lea r12, ptr [r15+r12*2+0x27] +XDIS 12960: MISC BASE D51E8D646028 lea r12, ptr [r16+r12*2+0x28] +XDIS 12966: MISC BASE D51E8D646129 lea r12, ptr [r17+r12*2+0x29] +XDIS 1296c: MISC BASE D51E8D64622A lea r12, ptr [r18+r12*2+0x2a] +XDIS 12972: MISC BASE D51E8D64632B lea r12, ptr [r19+r12*2+0x2b] +XDIS 12978: MISC BASE D51E8D64642C lea r12, ptr [r20+r12*2+0x2c] +XDIS 1297e: MISC BASE D51E8D64652D lea r12, ptr [r21+r12*2+0x2d] +XDIS 12984: MISC BASE D51E8D64662E lea r12, ptr [r22+r12*2+0x2e] +XDIS 1298a: MISC BASE D51E8D64672F lea r12, ptr [r23+r12*2+0x2f] +XDIS 12990: MISC BASE D51F8D646030 lea r12, ptr [r24+r12*2+0x30] +XDIS 12996: MISC BASE D51F8D646131 lea r12, ptr [r25+r12*2+0x31] +XDIS 1299c: MISC BASE D51F8D646232 lea r12, ptr [r26+r12*2+0x32] +XDIS 129a2: MISC BASE D51F8D646333 lea r12, ptr [r27+r12*2+0x33] +XDIS 129a8: MISC BASE D51F8D646434 lea r12, ptr [r28+r12*2+0x34] +XDIS 129ae: MISC BASE D51F8D646535 lea r12, ptr [r29+r12*2+0x35] +XDIS 129b4: MISC BASE D51F8D646636 lea r12, ptr [r30+r12*2+0x36] +XDIS 129ba: MISC BASE D51F8D646737 lea r12, ptr [r31+r12*2+0x37] +XDIS 129c0: MISC BASE D50E8D646819 lea r12, ptr [rax+r13*2+0x19] +XDIS 129c6: MISC BASE D50E8D64691A lea r12, ptr [rcx+r13*2+0x1a] +XDIS 129cc: MISC BASE D50E8D646A1B lea r12, ptr [rdx+r13*2+0x1b] +XDIS 129d2: MISC BASE D50E8D646B1C lea r12, ptr [rbx+r13*2+0x1c] +XDIS 129d8: MISC BASE D50E8D646C1D lea r12, ptr [rsp+r13*2+0x1d] +XDIS 129de: MISC BASE D50E8D646D1E lea r12, ptr [rbp+r13*2+0x1e] +XDIS 129e4: MISC BASE D50E8D646E1F lea r12, ptr [rsi+r13*2+0x1f] +XDIS 129ea: MISC BASE D50E8D646F20 lea r12, ptr [rdi+r13*2+0x20] +XDIS 129f0: MISC BASE D50F8D646821 lea r12, ptr [r8+r13*2+0x21] +XDIS 129f6: MISC BASE D50F8D646922 lea r12, ptr [r9+r13*2+0x22] +XDIS 129fc: MISC BASE D50F8D646A23 lea r12, ptr [r10+r13*2+0x23] +XDIS 12a02: MISC BASE D50F8D646B24 lea r12, ptr [r11+r13*2+0x24] +XDIS 12a08: MISC BASE D50F8D646C25 lea r12, ptr [r12+r13*2+0x25] +XDIS 12a0e: MISC BASE D50F8D646D26 lea r12, ptr [r13+r13*2+0x26] +XDIS 12a14: MISC BASE D50F8D646E27 lea r12, ptr [r14+r13*2+0x27] +XDIS 12a1a: MISC BASE D50F8D646F28 lea r12, ptr [r15+r13*2+0x28] +XDIS 12a20: MISC BASE D51E8D646829 lea r12, ptr [r16+r13*2+0x29] +XDIS 12a26: MISC BASE D51E8D64692A lea r12, ptr [r17+r13*2+0x2a] +XDIS 12a2c: MISC BASE D51E8D646A2B lea r12, ptr [r18+r13*2+0x2b] +XDIS 12a32: MISC BASE D51E8D646B2C lea r12, ptr [r19+r13*2+0x2c] +XDIS 12a38: MISC BASE D51E8D646C2D lea r12, ptr [r20+r13*2+0x2d] +XDIS 12a3e: MISC BASE D51E8D646D2E lea r12, ptr [r21+r13*2+0x2e] +XDIS 12a44: MISC BASE D51E8D646E2F lea r12, ptr [r22+r13*2+0x2f] +XDIS 12a4a: MISC BASE D51E8D646F30 lea r12, ptr [r23+r13*2+0x30] +XDIS 12a50: MISC BASE D51F8D646831 lea r12, ptr [r24+r13*2+0x31] +XDIS 12a56: MISC BASE D51F8D646932 lea r12, ptr [r25+r13*2+0x32] +XDIS 12a5c: MISC BASE D51F8D646A33 lea r12, ptr [r26+r13*2+0x33] +XDIS 12a62: MISC BASE D51F8D646B34 lea r12, ptr [r27+r13*2+0x34] +XDIS 12a68: MISC BASE D51F8D646C35 lea r12, ptr [r28+r13*2+0x35] +XDIS 12a6e: MISC BASE D51F8D646D36 lea r12, ptr [r29+r13*2+0x36] +XDIS 12a74: MISC BASE D51F8D646E37 lea r12, ptr [r30+r13*2+0x37] +XDIS 12a7a: MISC BASE D51F8D646F38 lea r12, ptr [r31+r13*2+0x38] +XDIS 12a80: MISC BASE D50E8D64701A lea r12, ptr [rax+r14*2+0x1a] +XDIS 12a86: MISC BASE D50E8D64711B lea r12, ptr [rcx+r14*2+0x1b] +XDIS 12a8c: MISC BASE D50E8D64721C lea r12, ptr [rdx+r14*2+0x1c] +XDIS 12a92: MISC BASE D50E8D64731D lea r12, ptr [rbx+r14*2+0x1d] +XDIS 12a98: MISC BASE D50E8D64741E lea r12, ptr [rsp+r14*2+0x1e] +XDIS 12a9e: MISC BASE D50E8D64751F lea r12, ptr [rbp+r14*2+0x1f] +XDIS 12aa4: MISC BASE D50E8D647620 lea r12, ptr [rsi+r14*2+0x20] +XDIS 12aaa: MISC BASE D50E8D647721 lea r12, ptr [rdi+r14*2+0x21] +XDIS 12ab0: MISC BASE D50F8D647022 lea r12, ptr [r8+r14*2+0x22] +XDIS 12ab6: MISC BASE D50F8D647123 lea r12, ptr [r9+r14*2+0x23] +XDIS 12abc: MISC BASE D50F8D647224 lea r12, ptr [r10+r14*2+0x24] +XDIS 12ac2: MISC BASE D50F8D647325 lea r12, ptr [r11+r14*2+0x25] +XDIS 12ac8: MISC BASE D50F8D647426 lea r12, ptr [r12+r14*2+0x26] +XDIS 12ace: MISC BASE D50F8D647527 lea r12, ptr [r13+r14*2+0x27] +XDIS 12ad4: MISC BASE D50F8D647628 lea r12, ptr [r14+r14*2+0x28] +XDIS 12ada: MISC BASE D50F8D647729 lea r12, ptr [r15+r14*2+0x29] +XDIS 12ae0: MISC BASE D51E8D64702A lea r12, ptr [r16+r14*2+0x2a] +XDIS 12ae6: MISC BASE D51E8D64712B lea r12, ptr [r17+r14*2+0x2b] +XDIS 12aec: MISC BASE D51E8D64722C lea r12, ptr [r18+r14*2+0x2c] +XDIS 12af2: MISC BASE D51E8D64732D lea r12, ptr [r19+r14*2+0x2d] +XDIS 12af8: MISC BASE D51E8D64742E lea r12, ptr [r20+r14*2+0x2e] +XDIS 12afe: MISC BASE D51E8D64752F lea r12, ptr [r21+r14*2+0x2f] +XDIS 12b04: MISC BASE D51E8D647630 lea r12, ptr [r22+r14*2+0x30] +XDIS 12b0a: MISC BASE D51E8D647731 lea r12, ptr [r23+r14*2+0x31] +XDIS 12b10: MISC BASE D51F8D647032 lea r12, ptr [r24+r14*2+0x32] +XDIS 12b16: MISC BASE D51F8D647133 lea r12, ptr [r25+r14*2+0x33] +XDIS 12b1c: MISC BASE D51F8D647234 lea r12, ptr [r26+r14*2+0x34] +XDIS 12b22: MISC BASE D51F8D647335 lea r12, ptr [r27+r14*2+0x35] +XDIS 12b28: MISC BASE D51F8D647436 lea r12, ptr [r28+r14*2+0x36] +XDIS 12b2e: MISC BASE D51F8D647537 lea r12, ptr [r29+r14*2+0x37] +XDIS 12b34: MISC BASE D51F8D647638 lea r12, ptr [r30+r14*2+0x38] +XDIS 12b3a: MISC BASE D51F8D647739 lea r12, ptr [r31+r14*2+0x39] +XDIS 12b40: MISC BASE D50E8D64781B lea r12, ptr [rax+r15*2+0x1b] +XDIS 12b46: MISC BASE D50E8D64791C lea r12, ptr [rcx+r15*2+0x1c] +XDIS 12b4c: MISC BASE D50E8D647A1D lea r12, ptr [rdx+r15*2+0x1d] +XDIS 12b52: MISC BASE D50E8D647B1E lea r12, ptr [rbx+r15*2+0x1e] +XDIS 12b58: MISC BASE D50E8D647C1F lea r12, ptr [rsp+r15*2+0x1f] +XDIS 12b5e: MISC BASE D50E8D647D20 lea r12, ptr [rbp+r15*2+0x20] +XDIS 12b64: MISC BASE D50E8D647E21 lea r12, ptr [rsi+r15*2+0x21] +XDIS 12b6a: MISC BASE D50E8D647F22 lea r12, ptr [rdi+r15*2+0x22] +XDIS 12b70: MISC BASE D50F8D647823 lea r12, ptr [r8+r15*2+0x23] +XDIS 12b76: MISC BASE D50F8D647924 lea r12, ptr [r9+r15*2+0x24] +XDIS 12b7c: MISC BASE D50F8D647A25 lea r12, ptr [r10+r15*2+0x25] +XDIS 12b82: MISC BASE D50F8D647B26 lea r12, ptr [r11+r15*2+0x26] +XDIS 12b88: MISC BASE D50F8D647C27 lea r12, ptr [r12+r15*2+0x27] +XDIS 12b8e: MISC BASE D50F8D647D28 lea r12, ptr [r13+r15*2+0x28] +XDIS 12b94: MISC BASE D50F8D647E29 lea r12, ptr [r14+r15*2+0x29] +XDIS 12b9a: MISC BASE D50F8D647F2A lea r12, ptr [r15+r15*2+0x2a] +XDIS 12ba0: MISC BASE D51E8D64782B lea r12, ptr [r16+r15*2+0x2b] +XDIS 12ba6: MISC BASE D51E8D64792C lea r12, ptr [r17+r15*2+0x2c] +XDIS 12bac: MISC BASE D51E8D647A2D lea r12, ptr [r18+r15*2+0x2d] +XDIS 12bb2: MISC BASE D51E8D647B2E lea r12, ptr [r19+r15*2+0x2e] +XDIS 12bb8: MISC BASE D51E8D647C2F lea r12, ptr [r20+r15*2+0x2f] +XDIS 12bbe: MISC BASE D51E8D647D30 lea r12, ptr [r21+r15*2+0x30] +XDIS 12bc4: MISC BASE D51E8D647E31 lea r12, ptr [r22+r15*2+0x31] +XDIS 12bca: MISC BASE D51E8D647F32 lea r12, ptr [r23+r15*2+0x32] +XDIS 12bd0: MISC BASE D51F8D647833 lea r12, ptr [r24+r15*2+0x33] +XDIS 12bd6: MISC BASE D51F8D647934 lea r12, ptr [r25+r15*2+0x34] +XDIS 12bdc: MISC BASE D51F8D647A35 lea r12, ptr [r26+r15*2+0x35] +XDIS 12be2: MISC BASE D51F8D647B36 lea r12, ptr [r27+r15*2+0x36] +XDIS 12be8: MISC BASE D51F8D647C37 lea r12, ptr [r28+r15*2+0x37] +XDIS 12bee: MISC BASE D51F8D647D38 lea r12, ptr [r29+r15*2+0x38] +XDIS 12bf4: MISC BASE D51F8D647E39 lea r12, ptr [r30+r15*2+0x39] +XDIS 12bfa: MISC BASE D51F8D647F3A lea r12, ptr [r31+r15*2+0x3a] +XDIS 12c00: MISC BASE D52C8D64401C lea r12, ptr [rax+r16*2+0x1c] +XDIS 12c06: MISC BASE D52C8D64411D lea r12, ptr [rcx+r16*2+0x1d] +XDIS 12c0c: MISC BASE D52C8D64421E lea r12, ptr [rdx+r16*2+0x1e] +XDIS 12c12: MISC BASE D52C8D64431F lea r12, ptr [rbx+r16*2+0x1f] +XDIS 12c18: MISC BASE D52C8D644420 lea r12, ptr [rsp+r16*2+0x20] +XDIS 12c1e: MISC BASE D52C8D644521 lea r12, ptr [rbp+r16*2+0x21] +XDIS 12c24: MISC BASE D52C8D644622 lea r12, ptr [rsi+r16*2+0x22] +XDIS 12c2a: MISC BASE D52C8D644723 lea r12, ptr [rdi+r16*2+0x23] +XDIS 12c30: MISC BASE D52D8D644024 lea r12, ptr [r8+r16*2+0x24] +XDIS 12c36: MISC BASE D52D8D644125 lea r12, ptr [r9+r16*2+0x25] +XDIS 12c3c: MISC BASE D52D8D644226 lea r12, ptr [r10+r16*2+0x26] +XDIS 12c42: MISC BASE D52D8D644327 lea r12, ptr [r11+r16*2+0x27] +XDIS 12c48: MISC BASE D52D8D644428 lea r12, ptr [r12+r16*2+0x28] +XDIS 12c4e: MISC BASE D52D8D644529 lea r12, ptr [r13+r16*2+0x29] +XDIS 12c54: MISC BASE D52D8D64462A lea r12, ptr [r14+r16*2+0x2a] +XDIS 12c5a: MISC BASE D52D8D64472B lea r12, ptr [r15+r16*2+0x2b] +XDIS 12c60: MISC BASE D53C8D64402C lea r12, ptr [r16+r16*2+0x2c] +XDIS 12c66: MISC BASE D53C8D64412D lea r12, ptr [r17+r16*2+0x2d] +XDIS 12c6c: MISC BASE D53C8D64422E lea r12, ptr [r18+r16*2+0x2e] +XDIS 12c72: MISC BASE D53C8D64432F lea r12, ptr [r19+r16*2+0x2f] +XDIS 12c78: MISC BASE D53C8D644430 lea r12, ptr [r20+r16*2+0x30] +XDIS 12c7e: MISC BASE D53C8D644531 lea r12, ptr [r21+r16*2+0x31] +XDIS 12c84: MISC BASE D53C8D644632 lea r12, ptr [r22+r16*2+0x32] +XDIS 12c8a: MISC BASE D53C8D644733 lea r12, ptr [r23+r16*2+0x33] +XDIS 12c90: MISC BASE D53D8D644034 lea r12, ptr [r24+r16*2+0x34] +XDIS 12c96: MISC BASE D53D8D644135 lea r12, ptr [r25+r16*2+0x35] +XDIS 12c9c: MISC BASE D53D8D644236 lea r12, ptr [r26+r16*2+0x36] +XDIS 12ca2: MISC BASE D53D8D644337 lea r12, ptr [r27+r16*2+0x37] +XDIS 12ca8: MISC BASE D53D8D644438 lea r12, ptr [r28+r16*2+0x38] +XDIS 12cae: MISC BASE D53D8D644539 lea r12, ptr [r29+r16*2+0x39] +XDIS 12cb4: MISC BASE D53D8D64463A lea r12, ptr [r30+r16*2+0x3a] +XDIS 12cba: MISC BASE D53D8D64473B lea r12, ptr [r31+r16*2+0x3b] +XDIS 12cc0: MISC BASE D52C8D64481D lea r12, ptr [rax+r17*2+0x1d] +XDIS 12cc6: MISC BASE D52C8D64491E lea r12, ptr [rcx+r17*2+0x1e] +XDIS 12ccc: MISC BASE D52C8D644A1F lea r12, ptr [rdx+r17*2+0x1f] +XDIS 12cd2: MISC BASE D52C8D644B20 lea r12, ptr [rbx+r17*2+0x20] +XDIS 12cd8: MISC BASE D52C8D644C21 lea r12, ptr [rsp+r17*2+0x21] +XDIS 12cde: MISC BASE D52C8D644D22 lea r12, ptr [rbp+r17*2+0x22] +XDIS 12ce4: MISC BASE D52C8D644E23 lea r12, ptr [rsi+r17*2+0x23] +XDIS 12cea: MISC BASE D52C8D644F24 lea r12, ptr [rdi+r17*2+0x24] +XDIS 12cf0: MISC BASE D52D8D644825 lea r12, ptr [r8+r17*2+0x25] +XDIS 12cf6: MISC BASE D52D8D644926 lea r12, ptr [r9+r17*2+0x26] +XDIS 12cfc: MISC BASE D52D8D644A27 lea r12, ptr [r10+r17*2+0x27] +XDIS 12d02: MISC BASE D52D8D644B28 lea r12, ptr [r11+r17*2+0x28] +XDIS 12d08: MISC BASE D52D8D644C29 lea r12, ptr [r12+r17*2+0x29] +XDIS 12d0e: MISC BASE D52D8D644D2A lea r12, ptr [r13+r17*2+0x2a] +XDIS 12d14: MISC BASE D52D8D644E2B lea r12, ptr [r14+r17*2+0x2b] +XDIS 12d1a: MISC BASE D52D8D644F2C lea r12, ptr [r15+r17*2+0x2c] +XDIS 12d20: MISC BASE D53C8D64482D lea r12, ptr [r16+r17*2+0x2d] +XDIS 12d26: MISC BASE D53C8D64492E lea r12, ptr [r17+r17*2+0x2e] +XDIS 12d2c: MISC BASE D53C8D644A2F lea r12, ptr [r18+r17*2+0x2f] +XDIS 12d32: MISC BASE D53C8D644B30 lea r12, ptr [r19+r17*2+0x30] +XDIS 12d38: MISC BASE D53C8D644C31 lea r12, ptr [r20+r17*2+0x31] +XDIS 12d3e: MISC BASE D53C8D644D32 lea r12, ptr [r21+r17*2+0x32] +XDIS 12d44: MISC BASE D53C8D644E33 lea r12, ptr [r22+r17*2+0x33] +XDIS 12d4a: MISC BASE D53C8D644F34 lea r12, ptr [r23+r17*2+0x34] +XDIS 12d50: MISC BASE D53D8D644835 lea r12, ptr [r24+r17*2+0x35] +XDIS 12d56: MISC BASE D53D8D644936 lea r12, ptr [r25+r17*2+0x36] +XDIS 12d5c: MISC BASE D53D8D644A37 lea r12, ptr [r26+r17*2+0x37] +XDIS 12d62: MISC BASE D53D8D644B38 lea r12, ptr [r27+r17*2+0x38] +XDIS 12d68: MISC BASE D53D8D644C39 lea r12, ptr [r28+r17*2+0x39] +XDIS 12d6e: MISC BASE D53D8D644D3A lea r12, ptr [r29+r17*2+0x3a] +XDIS 12d74: MISC BASE D53D8D644E3B lea r12, ptr [r30+r17*2+0x3b] +XDIS 12d7a: MISC BASE D53D8D644F3C lea r12, ptr [r31+r17*2+0x3c] +XDIS 12d80: MISC BASE D52C8D64501E lea r12, ptr [rax+r18*2+0x1e] +XDIS 12d86: MISC BASE D52C8D64511F lea r12, ptr [rcx+r18*2+0x1f] +XDIS 12d8c: MISC BASE D52C8D645220 lea r12, ptr [rdx+r18*2+0x20] +XDIS 12d92: MISC BASE D52C8D645321 lea r12, ptr [rbx+r18*2+0x21] +XDIS 12d98: MISC BASE D52C8D645422 lea r12, ptr [rsp+r18*2+0x22] +XDIS 12d9e: MISC BASE D52C8D645523 lea r12, ptr [rbp+r18*2+0x23] +XDIS 12da4: MISC BASE D52C8D645624 lea r12, ptr [rsi+r18*2+0x24] +XDIS 12daa: MISC BASE D52C8D645725 lea r12, ptr [rdi+r18*2+0x25] +XDIS 12db0: MISC BASE D52D8D645026 lea r12, ptr [r8+r18*2+0x26] +XDIS 12db6: MISC BASE D52D8D645127 lea r12, ptr [r9+r18*2+0x27] +XDIS 12dbc: MISC BASE D52D8D645228 lea r12, ptr [r10+r18*2+0x28] +XDIS 12dc2: MISC BASE D52D8D645329 lea r12, ptr [r11+r18*2+0x29] +XDIS 12dc8: MISC BASE D52D8D64542A lea r12, ptr [r12+r18*2+0x2a] +XDIS 12dce: MISC BASE D52D8D64552B lea r12, ptr [r13+r18*2+0x2b] +XDIS 12dd4: MISC BASE D52D8D64562C lea r12, ptr [r14+r18*2+0x2c] +XDIS 12dda: MISC BASE D52D8D64572D lea r12, ptr [r15+r18*2+0x2d] +XDIS 12de0: MISC BASE D53C8D64502E lea r12, ptr [r16+r18*2+0x2e] +XDIS 12de6: MISC BASE D53C8D64512F lea r12, ptr [r17+r18*2+0x2f] +XDIS 12dec: MISC BASE D53C8D645230 lea r12, ptr [r18+r18*2+0x30] +XDIS 12df2: MISC BASE D53C8D645331 lea r12, ptr [r19+r18*2+0x31] +XDIS 12df8: MISC BASE D53C8D645432 lea r12, ptr [r20+r18*2+0x32] +XDIS 12dfe: MISC BASE D53C8D645533 lea r12, ptr [r21+r18*2+0x33] +XDIS 12e04: MISC BASE D53C8D645634 lea r12, ptr [r22+r18*2+0x34] +XDIS 12e0a: MISC BASE D53C8D645735 lea r12, ptr [r23+r18*2+0x35] +XDIS 12e10: MISC BASE D53D8D645036 lea r12, ptr [r24+r18*2+0x36] +XDIS 12e16: MISC BASE D53D8D645137 lea r12, ptr [r25+r18*2+0x37] +XDIS 12e1c: MISC BASE D53D8D645238 lea r12, ptr [r26+r18*2+0x38] +XDIS 12e22: MISC BASE D53D8D645339 lea r12, ptr [r27+r18*2+0x39] +XDIS 12e28: MISC BASE D53D8D64543A lea r12, ptr [r28+r18*2+0x3a] +XDIS 12e2e: MISC BASE D53D8D64553B lea r12, ptr [r29+r18*2+0x3b] +XDIS 12e34: MISC BASE D53D8D64563C lea r12, ptr [r30+r18*2+0x3c] +XDIS 12e3a: MISC BASE D53D8D64573D lea r12, ptr [r31+r18*2+0x3d] +XDIS 12e40: MISC BASE D52C8D64581F lea r12, ptr [rax+r19*2+0x1f] +XDIS 12e46: MISC BASE D52C8D645920 lea r12, ptr [rcx+r19*2+0x20] +XDIS 12e4c: MISC BASE D52C8D645A21 lea r12, ptr [rdx+r19*2+0x21] +XDIS 12e52: MISC BASE D52C8D645B22 lea r12, ptr [rbx+r19*2+0x22] +XDIS 12e58: MISC BASE D52C8D645C23 lea r12, ptr [rsp+r19*2+0x23] +XDIS 12e5e: MISC BASE D52C8D645D24 lea r12, ptr [rbp+r19*2+0x24] +XDIS 12e64: MISC BASE D52C8D645E25 lea r12, ptr [rsi+r19*2+0x25] +XDIS 12e6a: MISC BASE D52C8D645F26 lea r12, ptr [rdi+r19*2+0x26] +XDIS 12e70: MISC BASE D52D8D645827 lea r12, ptr [r8+r19*2+0x27] +XDIS 12e76: MISC BASE D52D8D645928 lea r12, ptr [r9+r19*2+0x28] +XDIS 12e7c: MISC BASE D52D8D645A29 lea r12, ptr [r10+r19*2+0x29] +XDIS 12e82: MISC BASE D52D8D645B2A lea r12, ptr [r11+r19*2+0x2a] +XDIS 12e88: MISC BASE D52D8D645C2B lea r12, ptr [r12+r19*2+0x2b] +XDIS 12e8e: MISC BASE D52D8D645D2C lea r12, ptr [r13+r19*2+0x2c] +XDIS 12e94: MISC BASE D52D8D645E2D lea r12, ptr [r14+r19*2+0x2d] +XDIS 12e9a: MISC BASE D52D8D645F2E lea r12, ptr [r15+r19*2+0x2e] +XDIS 12ea0: MISC BASE D53C8D64582F lea r12, ptr [r16+r19*2+0x2f] +XDIS 12ea6: MISC BASE D53C8D645930 lea r12, ptr [r17+r19*2+0x30] +XDIS 12eac: MISC BASE D53C8D645A31 lea r12, ptr [r18+r19*2+0x31] +XDIS 12eb2: MISC BASE D53C8D645B32 lea r12, ptr [r19+r19*2+0x32] +XDIS 12eb8: MISC BASE D53C8D645C33 lea r12, ptr [r20+r19*2+0x33] +XDIS 12ebe: MISC BASE D53C8D645D34 lea r12, ptr [r21+r19*2+0x34] +XDIS 12ec4: MISC BASE D53C8D645E35 lea r12, ptr [r22+r19*2+0x35] +XDIS 12eca: MISC BASE D53C8D645F36 lea r12, ptr [r23+r19*2+0x36] +XDIS 12ed0: MISC BASE D53D8D645837 lea r12, ptr [r24+r19*2+0x37] +XDIS 12ed6: MISC BASE D53D8D645938 lea r12, ptr [r25+r19*2+0x38] +XDIS 12edc: MISC BASE D53D8D645A39 lea r12, ptr [r26+r19*2+0x39] +XDIS 12ee2: MISC BASE D53D8D645B3A lea r12, ptr [r27+r19*2+0x3a] +XDIS 12ee8: MISC BASE D53D8D645C3B lea r12, ptr [r28+r19*2+0x3b] +XDIS 12eee: MISC BASE D53D8D645D3C lea r12, ptr [r29+r19*2+0x3c] +XDIS 12ef4: MISC BASE D53D8D645E3D lea r12, ptr [r30+r19*2+0x3d] +XDIS 12efa: MISC BASE D53D8D645F3E lea r12, ptr [r31+r19*2+0x3e] +XDIS 12f00: MISC BASE D52C8D646020 lea r12, ptr [rax+r20*2+0x20] +XDIS 12f06: MISC BASE D52C8D646121 lea r12, ptr [rcx+r20*2+0x21] +XDIS 12f0c: MISC BASE D52C8D646222 lea r12, ptr [rdx+r20*2+0x22] +XDIS 12f12: MISC BASE D52C8D646323 lea r12, ptr [rbx+r20*2+0x23] +XDIS 12f18: MISC BASE D52C8D646424 lea r12, ptr [rsp+r20*2+0x24] +XDIS 12f1e: MISC BASE D52C8D646525 lea r12, ptr [rbp+r20*2+0x25] +XDIS 12f24: MISC BASE D52C8D646626 lea r12, ptr [rsi+r20*2+0x26] +XDIS 12f2a: MISC BASE D52C8D646727 lea r12, ptr [rdi+r20*2+0x27] +XDIS 12f30: MISC BASE D52D8D646028 lea r12, ptr [r8+r20*2+0x28] +XDIS 12f36: MISC BASE D52D8D646129 lea r12, ptr [r9+r20*2+0x29] +XDIS 12f3c: MISC BASE D52D8D64622A lea r12, ptr [r10+r20*2+0x2a] +XDIS 12f42: MISC BASE D52D8D64632B lea r12, ptr [r11+r20*2+0x2b] +XDIS 12f48: MISC BASE D52D8D64642C lea r12, ptr [r12+r20*2+0x2c] +XDIS 12f4e: MISC BASE D52D8D64652D lea r12, ptr [r13+r20*2+0x2d] +XDIS 12f54: MISC BASE D52D8D64662E lea r12, ptr [r14+r20*2+0x2e] +XDIS 12f5a: MISC BASE D52D8D64672F lea r12, ptr [r15+r20*2+0x2f] +XDIS 12f60: MISC BASE D53C8D646030 lea r12, ptr [r16+r20*2+0x30] +XDIS 12f66: MISC BASE D53C8D646131 lea r12, ptr [r17+r20*2+0x31] +XDIS 12f6c: MISC BASE D53C8D646232 lea r12, ptr [r18+r20*2+0x32] +XDIS 12f72: MISC BASE D53C8D646333 lea r12, ptr [r19+r20*2+0x33] +XDIS 12f78: MISC BASE D53C8D646434 lea r12, ptr [r20+r20*2+0x34] +XDIS 12f7e: MISC BASE D53C8D646535 lea r12, ptr [r21+r20*2+0x35] +XDIS 12f84: MISC BASE D53C8D646636 lea r12, ptr [r22+r20*2+0x36] +XDIS 12f8a: MISC BASE D53C8D646737 lea r12, ptr [r23+r20*2+0x37] +XDIS 12f90: MISC BASE D53D8D646038 lea r12, ptr [r24+r20*2+0x38] +XDIS 12f96: MISC BASE D53D8D646139 lea r12, ptr [r25+r20*2+0x39] +XDIS 12f9c: MISC BASE D53D8D64623A lea r12, ptr [r26+r20*2+0x3a] +XDIS 12fa2: MISC BASE D53D8D64633B lea r12, ptr [r27+r20*2+0x3b] +XDIS 12fa8: MISC BASE D53D8D64643C lea r12, ptr [r28+r20*2+0x3c] +XDIS 12fae: MISC BASE D53D8D64653D lea r12, ptr [r29+r20*2+0x3d] +XDIS 12fb4: MISC BASE D53D8D64663E lea r12, ptr [r30+r20*2+0x3e] +XDIS 12fba: MISC BASE D53D8D64673F lea r12, ptr [r31+r20*2+0x3f] +XDIS 12fc0: MISC BASE D52C8D646821 lea r12, ptr [rax+r21*2+0x21] +XDIS 12fc6: MISC BASE D52C8D646922 lea r12, ptr [rcx+r21*2+0x22] +XDIS 12fcc: MISC BASE D52C8D646A23 lea r12, ptr [rdx+r21*2+0x23] +XDIS 12fd2: MISC BASE D52C8D646B24 lea r12, ptr [rbx+r21*2+0x24] +XDIS 12fd8: MISC BASE D52C8D646C25 lea r12, ptr [rsp+r21*2+0x25] +XDIS 12fde: MISC BASE D52C8D646D26 lea r12, ptr [rbp+r21*2+0x26] +XDIS 12fe4: MISC BASE D52C8D646E27 lea r12, ptr [rsi+r21*2+0x27] +XDIS 12fea: MISC BASE D52C8D646F28 lea r12, ptr [rdi+r21*2+0x28] +XDIS 12ff0: MISC BASE D52D8D646829 lea r12, ptr [r8+r21*2+0x29] +XDIS 12ff6: MISC BASE D52D8D64692A lea r12, ptr [r9+r21*2+0x2a] +XDIS 12ffc: MISC BASE D52D8D646A2B lea r12, ptr [r10+r21*2+0x2b] +XDIS 13002: MISC BASE D52D8D646B2C lea r12, ptr [r11+r21*2+0x2c] +XDIS 13008: MISC BASE D52D8D646C2D lea r12, ptr [r12+r21*2+0x2d] +XDIS 1300e: MISC BASE D52D8D646D2E lea r12, ptr [r13+r21*2+0x2e] +XDIS 13014: MISC BASE D52D8D646E2F lea r12, ptr [r14+r21*2+0x2f] +XDIS 1301a: MISC BASE D52D8D646F30 lea r12, ptr [r15+r21*2+0x30] +XDIS 13020: MISC BASE D53C8D646831 lea r12, ptr [r16+r21*2+0x31] +XDIS 13026: MISC BASE D53C8D646932 lea r12, ptr [r17+r21*2+0x32] +XDIS 1302c: MISC BASE D53C8D646A33 lea r12, ptr [r18+r21*2+0x33] +XDIS 13032: MISC BASE D53C8D646B34 lea r12, ptr [r19+r21*2+0x34] +XDIS 13038: MISC BASE D53C8D646C35 lea r12, ptr [r20+r21*2+0x35] +XDIS 1303e: MISC BASE D53C8D646D36 lea r12, ptr [r21+r21*2+0x36] +XDIS 13044: MISC BASE D53C8D646E37 lea r12, ptr [r22+r21*2+0x37] +XDIS 1304a: MISC BASE D53C8D646F38 lea r12, ptr [r23+r21*2+0x38] +XDIS 13050: MISC BASE D53D8D646839 lea r12, ptr [r24+r21*2+0x39] +XDIS 13056: MISC BASE D53D8D64693A lea r12, ptr [r25+r21*2+0x3a] +XDIS 1305c: MISC BASE D53D8D646A3B lea r12, ptr [r26+r21*2+0x3b] +XDIS 13062: MISC BASE D53D8D646B3C lea r12, ptr [r27+r21*2+0x3c] +XDIS 13068: MISC BASE D53D8D646C3D lea r12, ptr [r28+r21*2+0x3d] +XDIS 1306e: MISC BASE D53D8D646D3E lea r12, ptr [r29+r21*2+0x3e] +XDIS 13074: MISC BASE D53D8D646E3F lea r12, ptr [r30+r21*2+0x3f] +XDIS 1307a: MISC BASE D53D8D646F40 lea r12, ptr [r31+r21*2+0x40] +XDIS 13080: MISC BASE D52C8D647022 lea r12, ptr [rax+r22*2+0x22] +XDIS 13086: MISC BASE D52C8D647123 lea r12, ptr [rcx+r22*2+0x23] +XDIS 1308c: MISC BASE D52C8D647224 lea r12, ptr [rdx+r22*2+0x24] +XDIS 13092: MISC BASE D52C8D647325 lea r12, ptr [rbx+r22*2+0x25] +XDIS 13098: MISC BASE D52C8D647426 lea r12, ptr [rsp+r22*2+0x26] +XDIS 1309e: MISC BASE D52C8D647527 lea r12, ptr [rbp+r22*2+0x27] +XDIS 130a4: MISC BASE D52C8D647628 lea r12, ptr [rsi+r22*2+0x28] +XDIS 130aa: MISC BASE D52C8D647729 lea r12, ptr [rdi+r22*2+0x29] +XDIS 130b0: MISC BASE D52D8D64702A lea r12, ptr [r8+r22*2+0x2a] +XDIS 130b6: MISC BASE D52D8D64712B lea r12, ptr [r9+r22*2+0x2b] +XDIS 130bc: MISC BASE D52D8D64722C lea r12, ptr [r10+r22*2+0x2c] +XDIS 130c2: MISC BASE D52D8D64732D lea r12, ptr [r11+r22*2+0x2d] +XDIS 130c8: MISC BASE D52D8D64742E lea r12, ptr [r12+r22*2+0x2e] +XDIS 130ce: MISC BASE D52D8D64752F lea r12, ptr [r13+r22*2+0x2f] +XDIS 130d4: MISC BASE D52D8D647630 lea r12, ptr [r14+r22*2+0x30] +XDIS 130da: MISC BASE D52D8D647731 lea r12, ptr [r15+r22*2+0x31] +XDIS 130e0: MISC BASE D53C8D647032 lea r12, ptr [r16+r22*2+0x32] +XDIS 130e6: MISC BASE D53C8D647133 lea r12, ptr [r17+r22*2+0x33] +XDIS 130ec: MISC BASE D53C8D647234 lea r12, ptr [r18+r22*2+0x34] +XDIS 130f2: MISC BASE D53C8D647335 lea r12, ptr [r19+r22*2+0x35] +XDIS 130f8: MISC BASE D53C8D647436 lea r12, ptr [r20+r22*2+0x36] +XDIS 130fe: MISC BASE D53C8D647537 lea r12, ptr [r21+r22*2+0x37] +XDIS 13104: MISC BASE D53C8D647638 lea r12, ptr [r22+r22*2+0x38] +XDIS 1310a: MISC BASE D53C8D647739 lea r12, ptr [r23+r22*2+0x39] +XDIS 13110: MISC BASE D53D8D64703A lea r12, ptr [r24+r22*2+0x3a] +XDIS 13116: MISC BASE D53D8D64713B lea r12, ptr [r25+r22*2+0x3b] +XDIS 1311c: MISC BASE D53D8D64723C lea r12, ptr [r26+r22*2+0x3c] +XDIS 13122: MISC BASE D53D8D64733D lea r12, ptr [r27+r22*2+0x3d] +XDIS 13128: MISC BASE D53D8D64743E lea r12, ptr [r28+r22*2+0x3e] +XDIS 1312e: MISC BASE D53D8D64753F lea r12, ptr [r29+r22*2+0x3f] +XDIS 13134: MISC BASE D53D8D647640 lea r12, ptr [r30+r22*2+0x40] +XDIS 1313a: MISC BASE D53D8D647741 lea r12, ptr [r31+r22*2+0x41] +XDIS 13140: MISC BASE D52C8D647823 lea r12, ptr [rax+r23*2+0x23] +XDIS 13146: MISC BASE D52C8D647924 lea r12, ptr [rcx+r23*2+0x24] +XDIS 1314c: MISC BASE D52C8D647A25 lea r12, ptr [rdx+r23*2+0x25] +XDIS 13152: MISC BASE D52C8D647B26 lea r12, ptr [rbx+r23*2+0x26] +XDIS 13158: MISC BASE D52C8D647C27 lea r12, ptr [rsp+r23*2+0x27] +XDIS 1315e: MISC BASE D52C8D647D28 lea r12, ptr [rbp+r23*2+0x28] +XDIS 13164: MISC BASE D52C8D647E29 lea r12, ptr [rsi+r23*2+0x29] +XDIS 1316a: MISC BASE D52C8D647F2A lea r12, ptr [rdi+r23*2+0x2a] +XDIS 13170: MISC BASE D52D8D64782B lea r12, ptr [r8+r23*2+0x2b] +XDIS 13176: MISC BASE D52D8D64792C lea r12, ptr [r9+r23*2+0x2c] +XDIS 1317c: MISC BASE D52D8D647A2D lea r12, ptr [r10+r23*2+0x2d] +XDIS 13182: MISC BASE D52D8D647B2E lea r12, ptr [r11+r23*2+0x2e] +XDIS 13188: MISC BASE D52D8D647C2F lea r12, ptr [r12+r23*2+0x2f] +XDIS 1318e: MISC BASE D52D8D647D30 lea r12, ptr [r13+r23*2+0x30] +XDIS 13194: MISC BASE D52D8D647E31 lea r12, ptr [r14+r23*2+0x31] +XDIS 1319a: MISC BASE D52D8D647F32 lea r12, ptr [r15+r23*2+0x32] +XDIS 131a0: MISC BASE D53C8D647833 lea r12, ptr [r16+r23*2+0x33] +XDIS 131a6: MISC BASE D53C8D647934 lea r12, ptr [r17+r23*2+0x34] +XDIS 131ac: MISC BASE D53C8D647A35 lea r12, ptr [r18+r23*2+0x35] +XDIS 131b2: MISC BASE D53C8D647B36 lea r12, ptr [r19+r23*2+0x36] +XDIS 131b8: MISC BASE D53C8D647C37 lea r12, ptr [r20+r23*2+0x37] +XDIS 131be: MISC BASE D53C8D647D38 lea r12, ptr [r21+r23*2+0x38] +XDIS 131c4: MISC BASE D53C8D647E39 lea r12, ptr [r22+r23*2+0x39] +XDIS 131ca: MISC BASE D53C8D647F3A lea r12, ptr [r23+r23*2+0x3a] +XDIS 131d0: MISC BASE D53D8D64783B lea r12, ptr [r24+r23*2+0x3b] +XDIS 131d6: MISC BASE D53D8D64793C lea r12, ptr [r25+r23*2+0x3c] +XDIS 131dc: MISC BASE D53D8D647A3D lea r12, ptr [r26+r23*2+0x3d] +XDIS 131e2: MISC BASE D53D8D647B3E lea r12, ptr [r27+r23*2+0x3e] +XDIS 131e8: MISC BASE D53D8D647C3F lea r12, ptr [r28+r23*2+0x3f] +XDIS 131ee: MISC BASE D53D8D647D40 lea r12, ptr [r29+r23*2+0x40] +XDIS 131f4: MISC BASE D53D8D647E41 lea r12, ptr [r30+r23*2+0x41] +XDIS 131fa: MISC BASE D53D8D647F42 lea r12, ptr [r31+r23*2+0x42] +XDIS 13200: MISC BASE D52E8D644024 lea r12, ptr [rax+r24*2+0x24] +XDIS 13206: MISC BASE D52E8D644125 lea r12, ptr [rcx+r24*2+0x25] +XDIS 1320c: MISC BASE D52E8D644226 lea r12, ptr [rdx+r24*2+0x26] +XDIS 13212: MISC BASE D52E8D644327 lea r12, ptr [rbx+r24*2+0x27] +XDIS 13218: MISC BASE D52E8D644428 lea r12, ptr [rsp+r24*2+0x28] +XDIS 1321e: MISC BASE D52E8D644529 lea r12, ptr [rbp+r24*2+0x29] +XDIS 13224: MISC BASE D52E8D64462A lea r12, ptr [rsi+r24*2+0x2a] +XDIS 1322a: MISC BASE D52E8D64472B lea r12, ptr [rdi+r24*2+0x2b] +XDIS 13230: MISC BASE D52F8D64402C lea r12, ptr [r8+r24*2+0x2c] +XDIS 13236: MISC BASE D52F8D64412D lea r12, ptr [r9+r24*2+0x2d] +XDIS 1323c: MISC BASE D52F8D64422E lea r12, ptr [r10+r24*2+0x2e] +XDIS 13242: MISC BASE D52F8D64432F lea r12, ptr [r11+r24*2+0x2f] +XDIS 13248: MISC BASE D52F8D644430 lea r12, ptr [r12+r24*2+0x30] +XDIS 1324e: MISC BASE D52F8D644531 lea r12, ptr [r13+r24*2+0x31] +XDIS 13254: MISC BASE D52F8D644632 lea r12, ptr [r14+r24*2+0x32] +XDIS 1325a: MISC BASE D52F8D644733 lea r12, ptr [r15+r24*2+0x33] +XDIS 13260: MISC BASE D53E8D644034 lea r12, ptr [r16+r24*2+0x34] +XDIS 13266: MISC BASE D53E8D644135 lea r12, ptr [r17+r24*2+0x35] +XDIS 1326c: MISC BASE D53E8D644236 lea r12, ptr [r18+r24*2+0x36] +XDIS 13272: MISC BASE D53E8D644337 lea r12, ptr [r19+r24*2+0x37] +XDIS 13278: MISC BASE D53E8D644438 lea r12, ptr [r20+r24*2+0x38] +XDIS 1327e: MISC BASE D53E8D644539 lea r12, ptr [r21+r24*2+0x39] +XDIS 13284: MISC BASE D53E8D64463A lea r12, ptr [r22+r24*2+0x3a] +XDIS 1328a: MISC BASE D53E8D64473B lea r12, ptr [r23+r24*2+0x3b] +XDIS 13290: MISC BASE D53F8D64403C lea r12, ptr [r24+r24*2+0x3c] +XDIS 13296: MISC BASE D53F8D64413D lea r12, ptr [r25+r24*2+0x3d] +XDIS 1329c: MISC BASE D53F8D64423E lea r12, ptr [r26+r24*2+0x3e] +XDIS 132a2: MISC BASE D53F8D64433F lea r12, ptr [r27+r24*2+0x3f] +XDIS 132a8: MISC BASE D53F8D644440 lea r12, ptr [r28+r24*2+0x40] +XDIS 132ae: MISC BASE D53F8D644541 lea r12, ptr [r29+r24*2+0x41] +XDIS 132b4: MISC BASE D53F8D644642 lea r12, ptr [r30+r24*2+0x42] +XDIS 132ba: MISC BASE D53F8D644743 lea r12, ptr [r31+r24*2+0x43] +XDIS 132c0: MISC BASE D52E8D644825 lea r12, ptr [rax+r25*2+0x25] +XDIS 132c6: MISC BASE D52E8D644926 lea r12, ptr [rcx+r25*2+0x26] +XDIS 132cc: MISC BASE D52E8D644A27 lea r12, ptr [rdx+r25*2+0x27] +XDIS 132d2: MISC BASE D52E8D644B28 lea r12, ptr [rbx+r25*2+0x28] +XDIS 132d8: MISC BASE D52E8D644C29 lea r12, ptr [rsp+r25*2+0x29] +XDIS 132de: MISC BASE D52E8D644D2A lea r12, ptr [rbp+r25*2+0x2a] +XDIS 132e4: MISC BASE D52E8D644E2B lea r12, ptr [rsi+r25*2+0x2b] +XDIS 132ea: MISC BASE D52E8D644F2C lea r12, ptr [rdi+r25*2+0x2c] +XDIS 132f0: MISC BASE D52F8D64482D lea r12, ptr [r8+r25*2+0x2d] +XDIS 132f6: MISC BASE D52F8D64492E lea r12, ptr [r9+r25*2+0x2e] +XDIS 132fc: MISC BASE D52F8D644A2F lea r12, ptr [r10+r25*2+0x2f] +XDIS 13302: MISC BASE D52F8D644B30 lea r12, ptr [r11+r25*2+0x30] +XDIS 13308: MISC BASE D52F8D644C31 lea r12, ptr [r12+r25*2+0x31] +XDIS 1330e: MISC BASE D52F8D644D32 lea r12, ptr [r13+r25*2+0x32] +XDIS 13314: MISC BASE D52F8D644E33 lea r12, ptr [r14+r25*2+0x33] +XDIS 1331a: MISC BASE D52F8D644F34 lea r12, ptr [r15+r25*2+0x34] +XDIS 13320: MISC BASE D53E8D644835 lea r12, ptr [r16+r25*2+0x35] +XDIS 13326: MISC BASE D53E8D644936 lea r12, ptr [r17+r25*2+0x36] +XDIS 1332c: MISC BASE D53E8D644A37 lea r12, ptr [r18+r25*2+0x37] +XDIS 13332: MISC BASE D53E8D644B38 lea r12, ptr [r19+r25*2+0x38] +XDIS 13338: MISC BASE D53E8D644C39 lea r12, ptr [r20+r25*2+0x39] +XDIS 1333e: MISC BASE D53E8D644D3A lea r12, ptr [r21+r25*2+0x3a] +XDIS 13344: MISC BASE D53E8D644E3B lea r12, ptr [r22+r25*2+0x3b] +XDIS 1334a: MISC BASE D53E8D644F3C lea r12, ptr [r23+r25*2+0x3c] +XDIS 13350: MISC BASE D53F8D64483D lea r12, ptr [r24+r25*2+0x3d] +XDIS 13356: MISC BASE D53F8D64493E lea r12, ptr [r25+r25*2+0x3e] +XDIS 1335c: MISC BASE D53F8D644A3F lea r12, ptr [r26+r25*2+0x3f] +XDIS 13362: MISC BASE D53F8D644B40 lea r12, ptr [r27+r25*2+0x40] +XDIS 13368: MISC BASE D53F8D644C41 lea r12, ptr [r28+r25*2+0x41] +XDIS 1336e: MISC BASE D53F8D644D42 lea r12, ptr [r29+r25*2+0x42] +XDIS 13374: MISC BASE D53F8D644E43 lea r12, ptr [r30+r25*2+0x43] +XDIS 1337a: MISC BASE D53F8D644F44 lea r12, ptr [r31+r25*2+0x44] +XDIS 13380: MISC BASE D52E8D645026 lea r12, ptr [rax+r26*2+0x26] +XDIS 13386: MISC BASE D52E8D645127 lea r12, ptr [rcx+r26*2+0x27] +XDIS 1338c: MISC BASE D52E8D645228 lea r12, ptr [rdx+r26*2+0x28] +XDIS 13392: MISC BASE D52E8D645329 lea r12, ptr [rbx+r26*2+0x29] +XDIS 13398: MISC BASE D52E8D64542A lea r12, ptr [rsp+r26*2+0x2a] +XDIS 1339e: MISC BASE D52E8D64552B lea r12, ptr [rbp+r26*2+0x2b] +XDIS 133a4: MISC BASE D52E8D64562C lea r12, ptr [rsi+r26*2+0x2c] +XDIS 133aa: MISC BASE D52E8D64572D lea r12, ptr [rdi+r26*2+0x2d] +XDIS 133b0: MISC BASE D52F8D64502E lea r12, ptr [r8+r26*2+0x2e] +XDIS 133b6: MISC BASE D52F8D64512F lea r12, ptr [r9+r26*2+0x2f] +XDIS 133bc: MISC BASE D52F8D645230 lea r12, ptr [r10+r26*2+0x30] +XDIS 133c2: MISC BASE D52F8D645331 lea r12, ptr [r11+r26*2+0x31] +XDIS 133c8: MISC BASE D52F8D645432 lea r12, ptr [r12+r26*2+0x32] +XDIS 133ce: MISC BASE D52F8D645533 lea r12, ptr [r13+r26*2+0x33] +XDIS 133d4: MISC BASE D52F8D645634 lea r12, ptr [r14+r26*2+0x34] +XDIS 133da: MISC BASE D52F8D645735 lea r12, ptr [r15+r26*2+0x35] +XDIS 133e0: MISC BASE D53E8D645036 lea r12, ptr [r16+r26*2+0x36] +XDIS 133e6: MISC BASE D53E8D645137 lea r12, ptr [r17+r26*2+0x37] +XDIS 133ec: MISC BASE D53E8D645238 lea r12, ptr [r18+r26*2+0x38] +XDIS 133f2: MISC BASE D53E8D645339 lea r12, ptr [r19+r26*2+0x39] +XDIS 133f8: MISC BASE D53E8D64543A lea r12, ptr [r20+r26*2+0x3a] +XDIS 133fe: MISC BASE D53E8D64553B lea r12, ptr [r21+r26*2+0x3b] +XDIS 13404: MISC BASE D53E8D64563C lea r12, ptr [r22+r26*2+0x3c] +XDIS 1340a: MISC BASE D53E8D64573D lea r12, ptr [r23+r26*2+0x3d] +XDIS 13410: MISC BASE D53F8D64503E lea r12, ptr [r24+r26*2+0x3e] +XDIS 13416: MISC BASE D53F8D64513F lea r12, ptr [r25+r26*2+0x3f] +XDIS 1341c: MISC BASE D53F8D645240 lea r12, ptr [r26+r26*2+0x40] +XDIS 13422: MISC BASE D53F8D645341 lea r12, ptr [r27+r26*2+0x41] +XDIS 13428: MISC BASE D53F8D645442 lea r12, ptr [r28+r26*2+0x42] +XDIS 1342e: MISC BASE D53F8D645543 lea r12, ptr [r29+r26*2+0x43] +XDIS 13434: MISC BASE D53F8D645644 lea r12, ptr [r30+r26*2+0x44] +XDIS 1343a: MISC BASE D53F8D645745 lea r12, ptr [r31+r26*2+0x45] +XDIS 13440: MISC BASE D52E8D645827 lea r12, ptr [rax+r27*2+0x27] +XDIS 13446: MISC BASE D52E8D645928 lea r12, ptr [rcx+r27*2+0x28] +XDIS 1344c: MISC BASE D52E8D645A29 lea r12, ptr [rdx+r27*2+0x29] +XDIS 13452: MISC BASE D52E8D645B2A lea r12, ptr [rbx+r27*2+0x2a] +XDIS 13458: MISC BASE D52E8D645C2B lea r12, ptr [rsp+r27*2+0x2b] +XDIS 1345e: MISC BASE D52E8D645D2C lea r12, ptr [rbp+r27*2+0x2c] +XDIS 13464: MISC BASE D52E8D645E2D lea r12, ptr [rsi+r27*2+0x2d] +XDIS 1346a: MISC BASE D52E8D645F2E lea r12, ptr [rdi+r27*2+0x2e] +XDIS 13470: MISC BASE D52F8D64582F lea r12, ptr [r8+r27*2+0x2f] +XDIS 13476: MISC BASE D52F8D645930 lea r12, ptr [r9+r27*2+0x30] +XDIS 1347c: MISC BASE D52F8D645A31 lea r12, ptr [r10+r27*2+0x31] +XDIS 13482: MISC BASE D52F8D645B32 lea r12, ptr [r11+r27*2+0x32] +XDIS 13488: MISC BASE D52F8D645C33 lea r12, ptr [r12+r27*2+0x33] +XDIS 1348e: MISC BASE D52F8D645D34 lea r12, ptr [r13+r27*2+0x34] +XDIS 13494: MISC BASE D52F8D645E35 lea r12, ptr [r14+r27*2+0x35] +XDIS 1349a: MISC BASE D52F8D645F36 lea r12, ptr [r15+r27*2+0x36] +XDIS 134a0: MISC BASE D53E8D645837 lea r12, ptr [r16+r27*2+0x37] +XDIS 134a6: MISC BASE D53E8D645938 lea r12, ptr [r17+r27*2+0x38] +XDIS 134ac: MISC BASE D53E8D645A39 lea r12, ptr [r18+r27*2+0x39] +XDIS 134b2: MISC BASE D53E8D645B3A lea r12, ptr [r19+r27*2+0x3a] +XDIS 134b8: MISC BASE D53E8D645C3B lea r12, ptr [r20+r27*2+0x3b] +XDIS 134be: MISC BASE D53E8D645D3C lea r12, ptr [r21+r27*2+0x3c] +XDIS 134c4: MISC BASE D53E8D645E3D lea r12, ptr [r22+r27*2+0x3d] +XDIS 134ca: MISC BASE D53E8D645F3E lea r12, ptr [r23+r27*2+0x3e] +XDIS 134d0: MISC BASE D53F8D64583F lea r12, ptr [r24+r27*2+0x3f] +XDIS 134d6: MISC BASE D53F8D645940 lea r12, ptr [r25+r27*2+0x40] +XDIS 134dc: MISC BASE D53F8D645A41 lea r12, ptr [r26+r27*2+0x41] +XDIS 134e2: MISC BASE D53F8D645B42 lea r12, ptr [r27+r27*2+0x42] +XDIS 134e8: MISC BASE D53F8D645C43 lea r12, ptr [r28+r27*2+0x43] +XDIS 134ee: MISC BASE D53F8D645D44 lea r12, ptr [r29+r27*2+0x44] +XDIS 134f4: MISC BASE D53F8D645E45 lea r12, ptr [r30+r27*2+0x45] +XDIS 134fa: MISC BASE D53F8D645F46 lea r12, ptr [r31+r27*2+0x46] +XDIS 13500: MISC BASE D52E8D646028 lea r12, ptr [rax+r28*2+0x28] +XDIS 13506: MISC BASE D52E8D646129 lea r12, ptr [rcx+r28*2+0x29] +XDIS 1350c: MISC BASE D52E8D64622A lea r12, ptr [rdx+r28*2+0x2a] +XDIS 13512: MISC BASE D52E8D64632B lea r12, ptr [rbx+r28*2+0x2b] +XDIS 13518: MISC BASE D52E8D64642C lea r12, ptr [rsp+r28*2+0x2c] +XDIS 1351e: MISC BASE D52E8D64652D lea r12, ptr [rbp+r28*2+0x2d] +XDIS 13524: MISC BASE D52E8D64662E lea r12, ptr [rsi+r28*2+0x2e] +XDIS 1352a: MISC BASE D52E8D64672F lea r12, ptr [rdi+r28*2+0x2f] +XDIS 13530: MISC BASE D52F8D646030 lea r12, ptr [r8+r28*2+0x30] +XDIS 13536: MISC BASE D52F8D646131 lea r12, ptr [r9+r28*2+0x31] +XDIS 1353c: MISC BASE D52F8D646232 lea r12, ptr [r10+r28*2+0x32] +XDIS 13542: MISC BASE D52F8D646333 lea r12, ptr [r11+r28*2+0x33] +XDIS 13548: MISC BASE D52F8D646434 lea r12, ptr [r12+r28*2+0x34] +XDIS 1354e: MISC BASE D52F8D646535 lea r12, ptr [r13+r28*2+0x35] +XDIS 13554: MISC BASE D52F8D646636 lea r12, ptr [r14+r28*2+0x36] +XDIS 1355a: MISC BASE D52F8D646737 lea r12, ptr [r15+r28*2+0x37] +XDIS 13560: MISC BASE D53E8D646038 lea r12, ptr [r16+r28*2+0x38] +XDIS 13566: MISC BASE D53E8D646139 lea r12, ptr [r17+r28*2+0x39] +XDIS 1356c: MISC BASE D53E8D64623A lea r12, ptr [r18+r28*2+0x3a] +XDIS 13572: MISC BASE D53E8D64633B lea r12, ptr [r19+r28*2+0x3b] +XDIS 13578: MISC BASE D53E8D64643C lea r12, ptr [r20+r28*2+0x3c] +XDIS 1357e: MISC BASE D53E8D64653D lea r12, ptr [r21+r28*2+0x3d] +XDIS 13584: MISC BASE D53E8D64663E lea r12, ptr [r22+r28*2+0x3e] +XDIS 1358a: MISC BASE D53E8D64673F lea r12, ptr [r23+r28*2+0x3f] +XDIS 13590: MISC BASE D53F8D646040 lea r12, ptr [r24+r28*2+0x40] +XDIS 13596: MISC BASE D53F8D646141 lea r12, ptr [r25+r28*2+0x41] +XDIS 1359c: MISC BASE D53F8D646242 lea r12, ptr [r26+r28*2+0x42] +XDIS 135a2: MISC BASE D53F8D646343 lea r12, ptr [r27+r28*2+0x43] +XDIS 135a8: MISC BASE D53F8D646444 lea r12, ptr [r28+r28*2+0x44] +XDIS 135ae: MISC BASE D53F8D646545 lea r12, ptr [r29+r28*2+0x45] +XDIS 135b4: MISC BASE D53F8D646646 lea r12, ptr [r30+r28*2+0x46] +XDIS 135ba: MISC BASE D53F8D646747 lea r12, ptr [r31+r28*2+0x47] +XDIS 135c0: MISC BASE D52E8D646829 lea r12, ptr [rax+r29*2+0x29] +XDIS 135c6: MISC BASE D52E8D64692A lea r12, ptr [rcx+r29*2+0x2a] +XDIS 135cc: MISC BASE D52E8D646A2B lea r12, ptr [rdx+r29*2+0x2b] +XDIS 135d2: MISC BASE D52E8D646B2C lea r12, ptr [rbx+r29*2+0x2c] +XDIS 135d8: MISC BASE D52E8D646C2D lea r12, ptr [rsp+r29*2+0x2d] +XDIS 135de: MISC BASE D52E8D646D2E lea r12, ptr [rbp+r29*2+0x2e] +XDIS 135e4: MISC BASE D52E8D646E2F lea r12, ptr [rsi+r29*2+0x2f] +XDIS 135ea: MISC BASE D52E8D646F30 lea r12, ptr [rdi+r29*2+0x30] +XDIS 135f0: MISC BASE D52F8D646831 lea r12, ptr [r8+r29*2+0x31] +XDIS 135f6: MISC BASE D52F8D646932 lea r12, ptr [r9+r29*2+0x32] +XDIS 135fc: MISC BASE D52F8D646A33 lea r12, ptr [r10+r29*2+0x33] +XDIS 13602: MISC BASE D52F8D646B34 lea r12, ptr [r11+r29*2+0x34] +XDIS 13608: MISC BASE D52F8D646C35 lea r12, ptr [r12+r29*2+0x35] +XDIS 1360e: MISC BASE D52F8D646D36 lea r12, ptr [r13+r29*2+0x36] +XDIS 13614: MISC BASE D52F8D646E37 lea r12, ptr [r14+r29*2+0x37] +XDIS 1361a: MISC BASE D52F8D646F38 lea r12, ptr [r15+r29*2+0x38] +XDIS 13620: MISC BASE D53E8D646839 lea r12, ptr [r16+r29*2+0x39] +XDIS 13626: MISC BASE D53E8D64693A lea r12, ptr [r17+r29*2+0x3a] +XDIS 1362c: MISC BASE D53E8D646A3B lea r12, ptr [r18+r29*2+0x3b] +XDIS 13632: MISC BASE D53E8D646B3C lea r12, ptr [r19+r29*2+0x3c] +XDIS 13638: MISC BASE D53E8D646C3D lea r12, ptr [r20+r29*2+0x3d] +XDIS 1363e: MISC BASE D53E8D646D3E lea r12, ptr [r21+r29*2+0x3e] +XDIS 13644: MISC BASE D53E8D646E3F lea r12, ptr [r22+r29*2+0x3f] +XDIS 1364a: MISC BASE D53E8D646F40 lea r12, ptr [r23+r29*2+0x40] +XDIS 13650: MISC BASE D53F8D646841 lea r12, ptr [r24+r29*2+0x41] +XDIS 13656: MISC BASE D53F8D646942 lea r12, ptr [r25+r29*2+0x42] +XDIS 1365c: MISC BASE D53F8D646A43 lea r12, ptr [r26+r29*2+0x43] +XDIS 13662: MISC BASE D53F8D646B44 lea r12, ptr [r27+r29*2+0x44] +XDIS 13668: MISC BASE D53F8D646C45 lea r12, ptr [r28+r29*2+0x45] +XDIS 1366e: MISC BASE D53F8D646D46 lea r12, ptr [r29+r29*2+0x46] +XDIS 13674: MISC BASE D53F8D646E47 lea r12, ptr [r30+r29*2+0x47] +XDIS 1367a: MISC BASE D53F8D646F48 lea r12, ptr [r31+r29*2+0x48] +XDIS 13680: MISC BASE D52E8D64702A lea r12, ptr [rax+r30*2+0x2a] +XDIS 13686: MISC BASE D52E8D64712B lea r12, ptr [rcx+r30*2+0x2b] +XDIS 1368c: MISC BASE D52E8D64722C lea r12, ptr [rdx+r30*2+0x2c] +XDIS 13692: MISC BASE D52E8D64732D lea r12, ptr [rbx+r30*2+0x2d] +XDIS 13698: MISC BASE D52E8D64742E lea r12, ptr [rsp+r30*2+0x2e] +XDIS 1369e: MISC BASE D52E8D64752F lea r12, ptr [rbp+r30*2+0x2f] +XDIS 136a4: MISC BASE D52E8D647630 lea r12, ptr [rsi+r30*2+0x30] +XDIS 136aa: MISC BASE D52E8D647731 lea r12, ptr [rdi+r30*2+0x31] +XDIS 136b0: MISC BASE D52F8D647032 lea r12, ptr [r8+r30*2+0x32] +XDIS 136b6: MISC BASE D52F8D647133 lea r12, ptr [r9+r30*2+0x33] +XDIS 136bc: MISC BASE D52F8D647234 lea r12, ptr [r10+r30*2+0x34] +XDIS 136c2: MISC BASE D52F8D647335 lea r12, ptr [r11+r30*2+0x35] +XDIS 136c8: MISC BASE D52F8D647436 lea r12, ptr [r12+r30*2+0x36] +XDIS 136ce: MISC BASE D52F8D647537 lea r12, ptr [r13+r30*2+0x37] +XDIS 136d4: MISC BASE D52F8D647638 lea r12, ptr [r14+r30*2+0x38] +XDIS 136da: MISC BASE D52F8D647739 lea r12, ptr [r15+r30*2+0x39] +XDIS 136e0: MISC BASE D53E8D64703A lea r12, ptr [r16+r30*2+0x3a] +XDIS 136e6: MISC BASE D53E8D64713B lea r12, ptr [r17+r30*2+0x3b] +XDIS 136ec: MISC BASE D53E8D64723C lea r12, ptr [r18+r30*2+0x3c] +XDIS 136f2: MISC BASE D53E8D64733D lea r12, ptr [r19+r30*2+0x3d] +XDIS 136f8: MISC BASE D53E8D64743E lea r12, ptr [r20+r30*2+0x3e] +XDIS 136fe: MISC BASE D53E8D64753F lea r12, ptr [r21+r30*2+0x3f] +XDIS 13704: MISC BASE D53E8D647640 lea r12, ptr [r22+r30*2+0x40] +XDIS 1370a: MISC BASE D53E8D647741 lea r12, ptr [r23+r30*2+0x41] +XDIS 13710: MISC BASE D53F8D647042 lea r12, ptr [r24+r30*2+0x42] +XDIS 13716: MISC BASE D53F8D647143 lea r12, ptr [r25+r30*2+0x43] +XDIS 1371c: MISC BASE D53F8D647244 lea r12, ptr [r26+r30*2+0x44] +XDIS 13722: MISC BASE D53F8D647345 lea r12, ptr [r27+r30*2+0x45] +XDIS 13728: MISC BASE D53F8D647446 lea r12, ptr [r28+r30*2+0x46] +XDIS 1372e: MISC BASE D53F8D647547 lea r12, ptr [r29+r30*2+0x47] +XDIS 13734: MISC BASE D53F8D647648 lea r12, ptr [r30+r30*2+0x48] +XDIS 1373a: MISC BASE D53F8D647749 lea r12, ptr [r31+r30*2+0x49] +XDIS 13740: MISC BASE D52E8D64782B lea r12, ptr [rax+r31*2+0x2b] +XDIS 13746: MISC BASE D52E8D64792C lea r12, ptr [rcx+r31*2+0x2c] +XDIS 1374c: MISC BASE D52E8D647A2D lea r12, ptr [rdx+r31*2+0x2d] +XDIS 13752: MISC BASE D52E8D647B2E lea r12, ptr [rbx+r31*2+0x2e] +XDIS 13758: MISC BASE D52E8D647C2F lea r12, ptr [rsp+r31*2+0x2f] +XDIS 1375e: MISC BASE D52E8D647D30 lea r12, ptr [rbp+r31*2+0x30] +XDIS 13764: MISC BASE D52E8D647E31 lea r12, ptr [rsi+r31*2+0x31] +XDIS 1376a: MISC BASE D52E8D647F32 lea r12, ptr [rdi+r31*2+0x32] +XDIS 13770: MISC BASE D52F8D647833 lea r12, ptr [r8+r31*2+0x33] +XDIS 13776: MISC BASE D52F8D647934 lea r12, ptr [r9+r31*2+0x34] +XDIS 1377c: MISC BASE D52F8D647A35 lea r12, ptr [r10+r31*2+0x35] +XDIS 13782: MISC BASE D52F8D647B36 lea r12, ptr [r11+r31*2+0x36] +XDIS 13788: MISC BASE D52F8D647C37 lea r12, ptr [r12+r31*2+0x37] +XDIS 1378e: MISC BASE D52F8D647D38 lea r12, ptr [r13+r31*2+0x38] +XDIS 13794: MISC BASE D52F8D647E39 lea r12, ptr [r14+r31*2+0x39] +XDIS 1379a: MISC BASE D52F8D647F3A lea r12, ptr [r15+r31*2+0x3a] +XDIS 137a0: MISC BASE D53E8D64783B lea r12, ptr [r16+r31*2+0x3b] +XDIS 137a6: MISC BASE D53E8D64793C lea r12, ptr [r17+r31*2+0x3c] +XDIS 137ac: MISC BASE D53E8D647A3D lea r12, ptr [r18+r31*2+0x3d] +XDIS 137b2: MISC BASE D53E8D647B3E lea r12, ptr [r19+r31*2+0x3e] +XDIS 137b8: MISC BASE D53E8D647C3F lea r12, ptr [r20+r31*2+0x3f] +XDIS 137be: MISC BASE D53E8D647D40 lea r12, ptr [r21+r31*2+0x40] +XDIS 137c4: MISC BASE D53E8D647E41 lea r12, ptr [r22+r31*2+0x41] +XDIS 137ca: MISC BASE D53E8D647F42 lea r12, ptr [r23+r31*2+0x42] +XDIS 137d0: MISC BASE D53F8D647843 lea r12, ptr [r24+r31*2+0x43] +XDIS 137d6: MISC BASE D53F8D647944 lea r12, ptr [r25+r31*2+0x44] +XDIS 137dc: MISC BASE D53F8D647A45 lea r12, ptr [r26+r31*2+0x45] +XDIS 137e2: MISC BASE D53F8D647B46 lea r12, ptr [r27+r31*2+0x46] +XDIS 137e8: MISC BASE D53F8D647C47 lea r12, ptr [r28+r31*2+0x47] +XDIS 137ee: MISC BASE D53F8D647D48 lea r12, ptr [r29+r31*2+0x48] +XDIS 137f4: MISC BASE D53F8D647E49 lea r12, ptr [r30+r31*2+0x49] +XDIS 137fa: MISC BASE D53F8D647F4A lea r12, ptr [r31+r31*2+0x4a] +XDIS 13800: MISC BASE D50C8D6C400D lea r13, ptr [rax+rax*2+0xd] +XDIS 13806: MISC BASE D50C8D6C410E lea r13, ptr [rcx+rax*2+0xe] +XDIS 1380c: MISC BASE D50C8D6C420F lea r13, ptr [rdx+rax*2+0xf] +XDIS 13812: MISC BASE D50C8D6C4310 lea r13, ptr [rbx+rax*2+0x10] +XDIS 13818: MISC BASE D50C8D6C4411 lea r13, ptr [rsp+rax*2+0x11] +XDIS 1381e: MISC BASE D50C8D6C4512 lea r13, ptr [rbp+rax*2+0x12] +XDIS 13824: MISC BASE D50C8D6C4613 lea r13, ptr [rsi+rax*2+0x13] +XDIS 1382a: MISC BASE D50C8D6C4714 lea r13, ptr [rdi+rax*2+0x14] +XDIS 13830: MISC BASE D50D8D6C4015 lea r13, ptr [r8+rax*2+0x15] +XDIS 13836: MISC BASE D50D8D6C4116 lea r13, ptr [r9+rax*2+0x16] +XDIS 1383c: MISC BASE D50D8D6C4217 lea r13, ptr [r10+rax*2+0x17] +XDIS 13842: MISC BASE D50D8D6C4318 lea r13, ptr [r11+rax*2+0x18] +XDIS 13848: MISC BASE D50D8D6C4419 lea r13, ptr [r12+rax*2+0x19] +XDIS 1384e: MISC BASE D50D8D6C451A lea r13, ptr [r13+rax*2+0x1a] +XDIS 13854: MISC BASE D50D8D6C461B lea r13, ptr [r14+rax*2+0x1b] +XDIS 1385a: MISC BASE D50D8D6C471C lea r13, ptr [r15+rax*2+0x1c] +XDIS 13860: MISC BASE D51C8D6C401D lea r13, ptr [r16+rax*2+0x1d] +XDIS 13866: MISC BASE D51C8D6C411E lea r13, ptr [r17+rax*2+0x1e] +XDIS 1386c: MISC BASE D51C8D6C421F lea r13, ptr [r18+rax*2+0x1f] +XDIS 13872: MISC BASE D51C8D6C4320 lea r13, ptr [r19+rax*2+0x20] +XDIS 13878: MISC BASE D51C8D6C4421 lea r13, ptr [r20+rax*2+0x21] +XDIS 1387e: MISC BASE D51C8D6C4522 lea r13, ptr [r21+rax*2+0x22] +XDIS 13884: MISC BASE D51C8D6C4623 lea r13, ptr [r22+rax*2+0x23] +XDIS 1388a: MISC BASE D51C8D6C4724 lea r13, ptr [r23+rax*2+0x24] +XDIS 13890: MISC BASE D51D8D6C4025 lea r13, ptr [r24+rax*2+0x25] +XDIS 13896: MISC BASE D51D8D6C4126 lea r13, ptr [r25+rax*2+0x26] +XDIS 1389c: MISC BASE D51D8D6C4227 lea r13, ptr [r26+rax*2+0x27] +XDIS 138a2: MISC BASE D51D8D6C4328 lea r13, ptr [r27+rax*2+0x28] +XDIS 138a8: MISC BASE D51D8D6C4429 lea r13, ptr [r28+rax*2+0x29] +XDIS 138ae: MISC BASE D51D8D6C452A lea r13, ptr [r29+rax*2+0x2a] +XDIS 138b4: MISC BASE D51D8D6C462B lea r13, ptr [r30+rax*2+0x2b] +XDIS 138ba: MISC BASE D51D8D6C472C lea r13, ptr [r31+rax*2+0x2c] +XDIS 138c0: MISC BASE D50C8D6C480E lea r13, ptr [rax+rcx*2+0xe] +XDIS 138c6: MISC BASE D50C8D6C490F lea r13, ptr [rcx+rcx*2+0xf] +XDIS 138cc: MISC BASE D50C8D6C4A10 lea r13, ptr [rdx+rcx*2+0x10] +XDIS 138d2: MISC BASE D50C8D6C4B11 lea r13, ptr [rbx+rcx*2+0x11] +XDIS 138d8: MISC BASE D50C8D6C4C12 lea r13, ptr [rsp+rcx*2+0x12] +XDIS 138de: MISC BASE D50C8D6C4D13 lea r13, ptr [rbp+rcx*2+0x13] +XDIS 138e4: MISC BASE D50C8D6C4E14 lea r13, ptr [rsi+rcx*2+0x14] +XDIS 138ea: MISC BASE D50C8D6C4F15 lea r13, ptr [rdi+rcx*2+0x15] +XDIS 138f0: MISC BASE D50D8D6C4816 lea r13, ptr [r8+rcx*2+0x16] +XDIS 138f6: MISC BASE D50D8D6C4917 lea r13, ptr [r9+rcx*2+0x17] +XDIS 138fc: MISC BASE D50D8D6C4A18 lea r13, ptr [r10+rcx*2+0x18] +XDIS 13902: MISC BASE D50D8D6C4B19 lea r13, ptr [r11+rcx*2+0x19] +XDIS 13908: MISC BASE D50D8D6C4C1A lea r13, ptr [r12+rcx*2+0x1a] +XDIS 1390e: MISC BASE D50D8D6C4D1B lea r13, ptr [r13+rcx*2+0x1b] +XDIS 13914: MISC BASE D50D8D6C4E1C lea r13, ptr [r14+rcx*2+0x1c] +XDIS 1391a: MISC BASE D50D8D6C4F1D lea r13, ptr [r15+rcx*2+0x1d] +XDIS 13920: MISC BASE D51C8D6C481E lea r13, ptr [r16+rcx*2+0x1e] +XDIS 13926: MISC BASE D51C8D6C491F lea r13, ptr [r17+rcx*2+0x1f] +XDIS 1392c: MISC BASE D51C8D6C4A20 lea r13, ptr [r18+rcx*2+0x20] +XDIS 13932: MISC BASE D51C8D6C4B21 lea r13, ptr [r19+rcx*2+0x21] +XDIS 13938: MISC BASE D51C8D6C4C22 lea r13, ptr [r20+rcx*2+0x22] +XDIS 1393e: MISC BASE D51C8D6C4D23 lea r13, ptr [r21+rcx*2+0x23] +XDIS 13944: MISC BASE D51C8D6C4E24 lea r13, ptr [r22+rcx*2+0x24] +XDIS 1394a: MISC BASE D51C8D6C4F25 lea r13, ptr [r23+rcx*2+0x25] +XDIS 13950: MISC BASE D51D8D6C4826 lea r13, ptr [r24+rcx*2+0x26] +XDIS 13956: MISC BASE D51D8D6C4927 lea r13, ptr [r25+rcx*2+0x27] +XDIS 1395c: MISC BASE D51D8D6C4A28 lea r13, ptr [r26+rcx*2+0x28] +XDIS 13962: MISC BASE D51D8D6C4B29 lea r13, ptr [r27+rcx*2+0x29] +XDIS 13968: MISC BASE D51D8D6C4C2A lea r13, ptr [r28+rcx*2+0x2a] +XDIS 1396e: MISC BASE D51D8D6C4D2B lea r13, ptr [r29+rcx*2+0x2b] +XDIS 13974: MISC BASE D51D8D6C4E2C lea r13, ptr [r30+rcx*2+0x2c] +XDIS 1397a: MISC BASE D51D8D6C4F2D lea r13, ptr [r31+rcx*2+0x2d] +XDIS 13980: MISC BASE D50C8D6C500F lea r13, ptr [rax+rdx*2+0xf] +XDIS 13986: MISC BASE D50C8D6C5110 lea r13, ptr [rcx+rdx*2+0x10] +XDIS 1398c: MISC BASE D50C8D6C5211 lea r13, ptr [rdx+rdx*2+0x11] +XDIS 13992: MISC BASE D50C8D6C5312 lea r13, ptr [rbx+rdx*2+0x12] +XDIS 13998: MISC BASE D50C8D6C5413 lea r13, ptr [rsp+rdx*2+0x13] +XDIS 1399e: MISC BASE D50C8D6C5514 lea r13, ptr [rbp+rdx*2+0x14] +XDIS 139a4: MISC BASE D50C8D6C5615 lea r13, ptr [rsi+rdx*2+0x15] +XDIS 139aa: MISC BASE D50C8D6C5716 lea r13, ptr [rdi+rdx*2+0x16] +XDIS 139b0: MISC BASE D50D8D6C5017 lea r13, ptr [r8+rdx*2+0x17] +XDIS 139b6: MISC BASE D50D8D6C5118 lea r13, ptr [r9+rdx*2+0x18] +XDIS 139bc: MISC BASE D50D8D6C5219 lea r13, ptr [r10+rdx*2+0x19] +XDIS 139c2: MISC BASE D50D8D6C531A lea r13, ptr [r11+rdx*2+0x1a] +XDIS 139c8: MISC BASE D50D8D6C541B lea r13, ptr [r12+rdx*2+0x1b] +XDIS 139ce: MISC BASE D50D8D6C551C lea r13, ptr [r13+rdx*2+0x1c] +XDIS 139d4: MISC BASE D50D8D6C561D lea r13, ptr [r14+rdx*2+0x1d] +XDIS 139da: MISC BASE D50D8D6C571E lea r13, ptr [r15+rdx*2+0x1e] +XDIS 139e0: MISC BASE D51C8D6C501F lea r13, ptr [r16+rdx*2+0x1f] +XDIS 139e6: MISC BASE D51C8D6C5120 lea r13, ptr [r17+rdx*2+0x20] +XDIS 139ec: MISC BASE D51C8D6C5221 lea r13, ptr [r18+rdx*2+0x21] +XDIS 139f2: MISC BASE D51C8D6C5322 lea r13, ptr [r19+rdx*2+0x22] +XDIS 139f8: MISC BASE D51C8D6C5423 lea r13, ptr [r20+rdx*2+0x23] +XDIS 139fe: MISC BASE D51C8D6C5524 lea r13, ptr [r21+rdx*2+0x24] +XDIS 13a04: MISC BASE D51C8D6C5625 lea r13, ptr [r22+rdx*2+0x25] +XDIS 13a0a: MISC BASE D51C8D6C5726 lea r13, ptr [r23+rdx*2+0x26] +XDIS 13a10: MISC BASE D51D8D6C5027 lea r13, ptr [r24+rdx*2+0x27] +XDIS 13a16: MISC BASE D51D8D6C5128 lea r13, ptr [r25+rdx*2+0x28] +XDIS 13a1c: MISC BASE D51D8D6C5229 lea r13, ptr [r26+rdx*2+0x29] +XDIS 13a22: MISC BASE D51D8D6C532A lea r13, ptr [r27+rdx*2+0x2a] +XDIS 13a28: MISC BASE D51D8D6C542B lea r13, ptr [r28+rdx*2+0x2b] +XDIS 13a2e: MISC BASE D51D8D6C552C lea r13, ptr [r29+rdx*2+0x2c] +XDIS 13a34: MISC BASE D51D8D6C562D lea r13, ptr [r30+rdx*2+0x2d] +XDIS 13a3a: MISC BASE D51D8D6C572E lea r13, ptr [r31+rdx*2+0x2e] +XDIS 13a40: MISC BASE D50C8D6C5810 lea r13, ptr [rax+rbx*2+0x10] +XDIS 13a46: MISC BASE D50C8D6C5911 lea r13, ptr [rcx+rbx*2+0x11] +XDIS 13a4c: MISC BASE D50C8D6C5A12 lea r13, ptr [rdx+rbx*2+0x12] +XDIS 13a52: MISC BASE D50C8D6C5B13 lea r13, ptr [rbx+rbx*2+0x13] +XDIS 13a58: MISC BASE D50C8D6C5C14 lea r13, ptr [rsp+rbx*2+0x14] +XDIS 13a5e: MISC BASE D50C8D6C5D15 lea r13, ptr [rbp+rbx*2+0x15] +XDIS 13a64: MISC BASE D50C8D6C5E16 lea r13, ptr [rsi+rbx*2+0x16] +XDIS 13a6a: MISC BASE D50C8D6C5F17 lea r13, ptr [rdi+rbx*2+0x17] +XDIS 13a70: MISC BASE D50D8D6C5818 lea r13, ptr [r8+rbx*2+0x18] +XDIS 13a76: MISC BASE D50D8D6C5919 lea r13, ptr [r9+rbx*2+0x19] +XDIS 13a7c: MISC BASE D50D8D6C5A1A lea r13, ptr [r10+rbx*2+0x1a] +XDIS 13a82: MISC BASE D50D8D6C5B1B lea r13, ptr [r11+rbx*2+0x1b] +XDIS 13a88: MISC BASE D50D8D6C5C1C lea r13, ptr [r12+rbx*2+0x1c] +XDIS 13a8e: MISC BASE D50D8D6C5D1D lea r13, ptr [r13+rbx*2+0x1d] +XDIS 13a94: MISC BASE D50D8D6C5E1E lea r13, ptr [r14+rbx*2+0x1e] +XDIS 13a9a: MISC BASE D50D8D6C5F1F lea r13, ptr [r15+rbx*2+0x1f] +XDIS 13aa0: MISC BASE D51C8D6C5820 lea r13, ptr [r16+rbx*2+0x20] +XDIS 13aa6: MISC BASE D51C8D6C5921 lea r13, ptr [r17+rbx*2+0x21] +XDIS 13aac: MISC BASE D51C8D6C5A22 lea r13, ptr [r18+rbx*2+0x22] +XDIS 13ab2: MISC BASE D51C8D6C5B23 lea r13, ptr [r19+rbx*2+0x23] +XDIS 13ab8: MISC BASE D51C8D6C5C24 lea r13, ptr [r20+rbx*2+0x24] +XDIS 13abe: MISC BASE D51C8D6C5D25 lea r13, ptr [r21+rbx*2+0x25] +XDIS 13ac4: MISC BASE D51C8D6C5E26 lea r13, ptr [r22+rbx*2+0x26] +XDIS 13aca: MISC BASE D51C8D6C5F27 lea r13, ptr [r23+rbx*2+0x27] +XDIS 13ad0: MISC BASE D51D8D6C5828 lea r13, ptr [r24+rbx*2+0x28] +XDIS 13ad6: MISC BASE D51D8D6C5929 lea r13, ptr [r25+rbx*2+0x29] +XDIS 13adc: MISC BASE D51D8D6C5A2A lea r13, ptr [r26+rbx*2+0x2a] +XDIS 13ae2: MISC BASE D51D8D6C5B2B lea r13, ptr [r27+rbx*2+0x2b] +XDIS 13ae8: MISC BASE D51D8D6C5C2C lea r13, ptr [r28+rbx*2+0x2c] +XDIS 13aee: MISC BASE D51D8D6C5D2D lea r13, ptr [r29+rbx*2+0x2d] +XDIS 13af4: MISC BASE D51D8D6C5E2E lea r13, ptr [r30+rbx*2+0x2e] +XDIS 13afa: MISC BASE D51D8D6C5F2F lea r13, ptr [r31+rbx*2+0x2f] +XDIS 13b00: MISC BASE D50C8D6C6011 lea r13, ptr [rax+0x11] +XDIS 13b06: MISC BASE D50C8D6C6112 lea r13, ptr [rcx+0x12] +XDIS 13b0c: MISC BASE D50C8D6C6213 lea r13, ptr [rdx+0x13] +XDIS 13b12: MISC BASE D50C8D6C6314 lea r13, ptr [rbx+0x14] +XDIS 13b18: MISC BASE D50C8D6C6415 lea r13, ptr [rsp+0x15] +XDIS 13b1e: MISC BASE D50C8D6C6516 lea r13, ptr [rbp+0x16] +XDIS 13b24: MISC BASE D50C8D6C6617 lea r13, ptr [rsi+0x17] +XDIS 13b2a: MISC BASE D50C8D6C6718 lea r13, ptr [rdi+0x18] +XDIS 13b30: MISC BASE D50D8D6C6019 lea r13, ptr [r8+0x19] +XDIS 13b36: MISC BASE D50D8D6C611A lea r13, ptr [r9+0x1a] +XDIS 13b3c: MISC BASE D50D8D6C621B lea r13, ptr [r10+0x1b] +XDIS 13b42: MISC BASE D50D8D6C631C lea r13, ptr [r11+0x1c] +XDIS 13b48: MISC BASE D50D8D6C641D lea r13, ptr [r12+0x1d] +XDIS 13b4e: MISC BASE D50D8D6C651E lea r13, ptr [r13+0x1e] +XDIS 13b54: MISC BASE D50D8D6C661F lea r13, ptr [r14+0x1f] +XDIS 13b5a: MISC BASE D50D8D6C6720 lea r13, ptr [r15+0x20] +XDIS 13b60: MISC BASE D51C8D6C6021 lea r13, ptr [r16+0x21] +XDIS 13b66: MISC BASE D51C8D6C6122 lea r13, ptr [r17+0x22] +XDIS 13b6c: MISC BASE D51C8D6C6223 lea r13, ptr [r18+0x23] +XDIS 13b72: MISC BASE D51C8D6C6324 lea r13, ptr [r19+0x24] +XDIS 13b78: MISC BASE D51C8D6C6425 lea r13, ptr [r20+0x25] +XDIS 13b7e: MISC BASE D51C8D6C6526 lea r13, ptr [r21+0x26] +XDIS 13b84: MISC BASE D51C8D6C6627 lea r13, ptr [r22+0x27] +XDIS 13b8a: MISC BASE D51C8D6C6728 lea r13, ptr [r23+0x28] +XDIS 13b90: MISC BASE D51D8D6C6029 lea r13, ptr [r24+0x29] +XDIS 13b96: MISC BASE D51D8D6C612A lea r13, ptr [r25+0x2a] +XDIS 13b9c: MISC BASE D51D8D6C622B lea r13, ptr [r26+0x2b] +XDIS 13ba2: MISC BASE D51D8D6C632C lea r13, ptr [r27+0x2c] +XDIS 13ba8: MISC BASE D51D8D6C642D lea r13, ptr [r28+0x2d] +XDIS 13bae: MISC BASE D51D8D6C652E lea r13, ptr [r29+0x2e] +XDIS 13bb4: MISC BASE D51D8D6C662F lea r13, ptr [r30+0x2f] +XDIS 13bba: MISC BASE D51D8D6C6730 lea r13, ptr [r31+0x30] +XDIS 13bc0: MISC BASE D50C8D6C6812 lea r13, ptr [rax+rbp*2+0x12] +XDIS 13bc6: MISC BASE D50C8D6C6913 lea r13, ptr [rcx+rbp*2+0x13] +XDIS 13bcc: MISC BASE D50C8D6C6A14 lea r13, ptr [rdx+rbp*2+0x14] +XDIS 13bd2: MISC BASE D50C8D6C6B15 lea r13, ptr [rbx+rbp*2+0x15] +XDIS 13bd8: MISC BASE D50C8D6C6C16 lea r13, ptr [rsp+rbp*2+0x16] +XDIS 13bde: MISC BASE D50C8D6C6D17 lea r13, ptr [rbp+rbp*2+0x17] +XDIS 13be4: MISC BASE D50C8D6C6E18 lea r13, ptr [rsi+rbp*2+0x18] +XDIS 13bea: MISC BASE D50C8D6C6F19 lea r13, ptr [rdi+rbp*2+0x19] +XDIS 13bf0: MISC BASE D50D8D6C681A lea r13, ptr [r8+rbp*2+0x1a] +XDIS 13bf6: MISC BASE D50D8D6C691B lea r13, ptr [r9+rbp*2+0x1b] +XDIS 13bfc: MISC BASE D50D8D6C6A1C lea r13, ptr [r10+rbp*2+0x1c] +XDIS 13c02: MISC BASE D50D8D6C6B1D lea r13, ptr [r11+rbp*2+0x1d] +XDIS 13c08: MISC BASE D50D8D6C6C1E lea r13, ptr [r12+rbp*2+0x1e] +XDIS 13c0e: MISC BASE D50D8D6C6D1F lea r13, ptr [r13+rbp*2+0x1f] +XDIS 13c14: MISC BASE D50D8D6C6E20 lea r13, ptr [r14+rbp*2+0x20] +XDIS 13c1a: MISC BASE D50D8D6C6F21 lea r13, ptr [r15+rbp*2+0x21] +XDIS 13c20: MISC BASE D51C8D6C6822 lea r13, ptr [r16+rbp*2+0x22] +XDIS 13c26: MISC BASE D51C8D6C6923 lea r13, ptr [r17+rbp*2+0x23] +XDIS 13c2c: MISC BASE D51C8D6C6A24 lea r13, ptr [r18+rbp*2+0x24] +XDIS 13c32: MISC BASE D51C8D6C6B25 lea r13, ptr [r19+rbp*2+0x25] +XDIS 13c38: MISC BASE D51C8D6C6C26 lea r13, ptr [r20+rbp*2+0x26] +XDIS 13c3e: MISC BASE D51C8D6C6D27 lea r13, ptr [r21+rbp*2+0x27] +XDIS 13c44: MISC BASE D51C8D6C6E28 lea r13, ptr [r22+rbp*2+0x28] +XDIS 13c4a: MISC BASE D51C8D6C6F29 lea r13, ptr [r23+rbp*2+0x29] +XDIS 13c50: MISC BASE D51D8D6C682A lea r13, ptr [r24+rbp*2+0x2a] +XDIS 13c56: MISC BASE D51D8D6C692B lea r13, ptr [r25+rbp*2+0x2b] +XDIS 13c5c: MISC BASE D51D8D6C6A2C lea r13, ptr [r26+rbp*2+0x2c] +XDIS 13c62: MISC BASE D51D8D6C6B2D lea r13, ptr [r27+rbp*2+0x2d] +XDIS 13c68: MISC BASE D51D8D6C6C2E lea r13, ptr [r28+rbp*2+0x2e] +XDIS 13c6e: MISC BASE D51D8D6C6D2F lea r13, ptr [r29+rbp*2+0x2f] +XDIS 13c74: MISC BASE D51D8D6C6E30 lea r13, ptr [r30+rbp*2+0x30] +XDIS 13c7a: MISC BASE D51D8D6C6F31 lea r13, ptr [r31+rbp*2+0x31] +XDIS 13c80: MISC BASE D50C8D6C7013 lea r13, ptr [rax+rsi*2+0x13] +XDIS 13c86: MISC BASE D50C8D6C7114 lea r13, ptr [rcx+rsi*2+0x14] +XDIS 13c8c: MISC BASE D50C8D6C7215 lea r13, ptr [rdx+rsi*2+0x15] +XDIS 13c92: MISC BASE D50C8D6C7316 lea r13, ptr [rbx+rsi*2+0x16] +XDIS 13c98: MISC BASE D50C8D6C7417 lea r13, ptr [rsp+rsi*2+0x17] +XDIS 13c9e: MISC BASE D50C8D6C7518 lea r13, ptr [rbp+rsi*2+0x18] +XDIS 13ca4: MISC BASE D50C8D6C7619 lea r13, ptr [rsi+rsi*2+0x19] +XDIS 13caa: MISC BASE D50C8D6C771A lea r13, ptr [rdi+rsi*2+0x1a] +XDIS 13cb0: MISC BASE D50D8D6C701B lea r13, ptr [r8+rsi*2+0x1b] +XDIS 13cb6: MISC BASE D50D8D6C711C lea r13, ptr [r9+rsi*2+0x1c] +XDIS 13cbc: MISC BASE D50D8D6C721D lea r13, ptr [r10+rsi*2+0x1d] +XDIS 13cc2: MISC BASE D50D8D6C731E lea r13, ptr [r11+rsi*2+0x1e] +XDIS 13cc8: MISC BASE D50D8D6C741F lea r13, ptr [r12+rsi*2+0x1f] +XDIS 13cce: MISC BASE D50D8D6C7520 lea r13, ptr [r13+rsi*2+0x20] +XDIS 13cd4: MISC BASE D50D8D6C7621 lea r13, ptr [r14+rsi*2+0x21] +XDIS 13cda: MISC BASE D50D8D6C7722 lea r13, ptr [r15+rsi*2+0x22] +XDIS 13ce0: MISC BASE D51C8D6C7023 lea r13, ptr [r16+rsi*2+0x23] +XDIS 13ce6: MISC BASE D51C8D6C7124 lea r13, ptr [r17+rsi*2+0x24] +XDIS 13cec: MISC BASE D51C8D6C7225 lea r13, ptr [r18+rsi*2+0x25] +XDIS 13cf2: MISC BASE D51C8D6C7326 lea r13, ptr [r19+rsi*2+0x26] +XDIS 13cf8: MISC BASE D51C8D6C7427 lea r13, ptr [r20+rsi*2+0x27] +XDIS 13cfe: MISC BASE D51C8D6C7528 lea r13, ptr [r21+rsi*2+0x28] +XDIS 13d04: MISC BASE D51C8D6C7629 lea r13, ptr [r22+rsi*2+0x29] +XDIS 13d0a: MISC BASE D51C8D6C772A lea r13, ptr [r23+rsi*2+0x2a] +XDIS 13d10: MISC BASE D51D8D6C702B lea r13, ptr [r24+rsi*2+0x2b] +XDIS 13d16: MISC BASE D51D8D6C712C lea r13, ptr [r25+rsi*2+0x2c] +XDIS 13d1c: MISC BASE D51D8D6C722D lea r13, ptr [r26+rsi*2+0x2d] +XDIS 13d22: MISC BASE D51D8D6C732E lea r13, ptr [r27+rsi*2+0x2e] +XDIS 13d28: MISC BASE D51D8D6C742F lea r13, ptr [r28+rsi*2+0x2f] +XDIS 13d2e: MISC BASE D51D8D6C7530 lea r13, ptr [r29+rsi*2+0x30] +XDIS 13d34: MISC BASE D51D8D6C7631 lea r13, ptr [r30+rsi*2+0x31] +XDIS 13d3a: MISC BASE D51D8D6C7732 lea r13, ptr [r31+rsi*2+0x32] +XDIS 13d40: MISC BASE D50C8D6C7814 lea r13, ptr [rax+rdi*2+0x14] +XDIS 13d46: MISC BASE D50C8D6C7915 lea r13, ptr [rcx+rdi*2+0x15] +XDIS 13d4c: MISC BASE D50C8D6C7A16 lea r13, ptr [rdx+rdi*2+0x16] +XDIS 13d52: MISC BASE D50C8D6C7B17 lea r13, ptr [rbx+rdi*2+0x17] +XDIS 13d58: MISC BASE D50C8D6C7C18 lea r13, ptr [rsp+rdi*2+0x18] +XDIS 13d5e: MISC BASE D50C8D6C7D19 lea r13, ptr [rbp+rdi*2+0x19] +XDIS 13d64: MISC BASE D50C8D6C7E1A lea r13, ptr [rsi+rdi*2+0x1a] +XDIS 13d6a: MISC BASE D50C8D6C7F1B lea r13, ptr [rdi+rdi*2+0x1b] +XDIS 13d70: MISC BASE D50D8D6C781C lea r13, ptr [r8+rdi*2+0x1c] +XDIS 13d76: MISC BASE D50D8D6C791D lea r13, ptr [r9+rdi*2+0x1d] +XDIS 13d7c: MISC BASE D50D8D6C7A1E lea r13, ptr [r10+rdi*2+0x1e] +XDIS 13d82: MISC BASE D50D8D6C7B1F lea r13, ptr [r11+rdi*2+0x1f] +XDIS 13d88: MISC BASE D50D8D6C7C20 lea r13, ptr [r12+rdi*2+0x20] +XDIS 13d8e: MISC BASE D50D8D6C7D21 lea r13, ptr [r13+rdi*2+0x21] +XDIS 13d94: MISC BASE D50D8D6C7E22 lea r13, ptr [r14+rdi*2+0x22] +XDIS 13d9a: MISC BASE D50D8D6C7F23 lea r13, ptr [r15+rdi*2+0x23] +XDIS 13da0: MISC BASE D51C8D6C7824 lea r13, ptr [r16+rdi*2+0x24] +XDIS 13da6: MISC BASE D51C8D6C7925 lea r13, ptr [r17+rdi*2+0x25] +XDIS 13dac: MISC BASE D51C8D6C7A26 lea r13, ptr [r18+rdi*2+0x26] +XDIS 13db2: MISC BASE D51C8D6C7B27 lea r13, ptr [r19+rdi*2+0x27] +XDIS 13db8: MISC BASE D51C8D6C7C28 lea r13, ptr [r20+rdi*2+0x28] +XDIS 13dbe: MISC BASE D51C8D6C7D29 lea r13, ptr [r21+rdi*2+0x29] +XDIS 13dc4: MISC BASE D51C8D6C7E2A lea r13, ptr [r22+rdi*2+0x2a] +XDIS 13dca: MISC BASE D51C8D6C7F2B lea r13, ptr [r23+rdi*2+0x2b] +XDIS 13dd0: MISC BASE D51D8D6C782C lea r13, ptr [r24+rdi*2+0x2c] +XDIS 13dd6: MISC BASE D51D8D6C792D lea r13, ptr [r25+rdi*2+0x2d] +XDIS 13ddc: MISC BASE D51D8D6C7A2E lea r13, ptr [r26+rdi*2+0x2e] +XDIS 13de2: MISC BASE D51D8D6C7B2F lea r13, ptr [r27+rdi*2+0x2f] +XDIS 13de8: MISC BASE D51D8D6C7C30 lea r13, ptr [r28+rdi*2+0x30] +XDIS 13dee: MISC BASE D51D8D6C7D31 lea r13, ptr [r29+rdi*2+0x31] +XDIS 13df4: MISC BASE D51D8D6C7E32 lea r13, ptr [r30+rdi*2+0x32] +XDIS 13dfa: MISC BASE D51D8D6C7F33 lea r13, ptr [r31+rdi*2+0x33] +XDIS 13e00: MISC BASE D50E8D6C4015 lea r13, ptr [rax+r8*2+0x15] +XDIS 13e06: MISC BASE D50E8D6C4116 lea r13, ptr [rcx+r8*2+0x16] +XDIS 13e0c: MISC BASE D50E8D6C4217 lea r13, ptr [rdx+r8*2+0x17] +XDIS 13e12: MISC BASE D50E8D6C4318 lea r13, ptr [rbx+r8*2+0x18] +XDIS 13e18: MISC BASE D50E8D6C4419 lea r13, ptr [rsp+r8*2+0x19] +XDIS 13e1e: MISC BASE D50E8D6C451A lea r13, ptr [rbp+r8*2+0x1a] +XDIS 13e24: MISC BASE D50E8D6C461B lea r13, ptr [rsi+r8*2+0x1b] +XDIS 13e2a: MISC BASE D50E8D6C471C lea r13, ptr [rdi+r8*2+0x1c] +XDIS 13e30: MISC BASE D50F8D6C401D lea r13, ptr [r8+r8*2+0x1d] +XDIS 13e36: MISC BASE D50F8D6C411E lea r13, ptr [r9+r8*2+0x1e] +XDIS 13e3c: MISC BASE D50F8D6C421F lea r13, ptr [r10+r8*2+0x1f] +XDIS 13e42: MISC BASE D50F8D6C4320 lea r13, ptr [r11+r8*2+0x20] +XDIS 13e48: MISC BASE D50F8D6C4421 lea r13, ptr [r12+r8*2+0x21] +XDIS 13e4e: MISC BASE D50F8D6C4522 lea r13, ptr [r13+r8*2+0x22] +XDIS 13e54: MISC BASE D50F8D6C4623 lea r13, ptr [r14+r8*2+0x23] +XDIS 13e5a: MISC BASE D50F8D6C4724 lea r13, ptr [r15+r8*2+0x24] +XDIS 13e60: MISC BASE D51E8D6C4025 lea r13, ptr [r16+r8*2+0x25] +XDIS 13e66: MISC BASE D51E8D6C4126 lea r13, ptr [r17+r8*2+0x26] +XDIS 13e6c: MISC BASE D51E8D6C4227 lea r13, ptr [r18+r8*2+0x27] +XDIS 13e72: MISC BASE D51E8D6C4328 lea r13, ptr [r19+r8*2+0x28] +XDIS 13e78: MISC BASE D51E8D6C4429 lea r13, ptr [r20+r8*2+0x29] +XDIS 13e7e: MISC BASE D51E8D6C452A lea r13, ptr [r21+r8*2+0x2a] +XDIS 13e84: MISC BASE D51E8D6C462B lea r13, ptr [r22+r8*2+0x2b] +XDIS 13e8a: MISC BASE D51E8D6C472C lea r13, ptr [r23+r8*2+0x2c] +XDIS 13e90: MISC BASE D51F8D6C402D lea r13, ptr [r24+r8*2+0x2d] +XDIS 13e96: MISC BASE D51F8D6C412E lea r13, ptr [r25+r8*2+0x2e] +XDIS 13e9c: MISC BASE D51F8D6C422F lea r13, ptr [r26+r8*2+0x2f] +XDIS 13ea2: MISC BASE D51F8D6C4330 lea r13, ptr [r27+r8*2+0x30] +XDIS 13ea8: MISC BASE D51F8D6C4431 lea r13, ptr [r28+r8*2+0x31] +XDIS 13eae: MISC BASE D51F8D6C4532 lea r13, ptr [r29+r8*2+0x32] +XDIS 13eb4: MISC BASE D51F8D6C4633 lea r13, ptr [r30+r8*2+0x33] +XDIS 13eba: MISC BASE D51F8D6C4734 lea r13, ptr [r31+r8*2+0x34] +XDIS 13ec0: MISC BASE D50E8D6C4816 lea r13, ptr [rax+r9*2+0x16] +XDIS 13ec6: MISC BASE D50E8D6C4917 lea r13, ptr [rcx+r9*2+0x17] +XDIS 13ecc: MISC BASE D50E8D6C4A18 lea r13, ptr [rdx+r9*2+0x18] +XDIS 13ed2: MISC BASE D50E8D6C4B19 lea r13, ptr [rbx+r9*2+0x19] +XDIS 13ed8: MISC BASE D50E8D6C4C1A lea r13, ptr [rsp+r9*2+0x1a] +XDIS 13ede: MISC BASE D50E8D6C4D1B lea r13, ptr [rbp+r9*2+0x1b] +XDIS 13ee4: MISC BASE D50E8D6C4E1C lea r13, ptr [rsi+r9*2+0x1c] +XDIS 13eea: MISC BASE D50E8D6C4F1D lea r13, ptr [rdi+r9*2+0x1d] +XDIS 13ef0: MISC BASE D50F8D6C481E lea r13, ptr [r8+r9*2+0x1e] +XDIS 13ef6: MISC BASE D50F8D6C491F lea r13, ptr [r9+r9*2+0x1f] +XDIS 13efc: MISC BASE D50F8D6C4A20 lea r13, ptr [r10+r9*2+0x20] +XDIS 13f02: MISC BASE D50F8D6C4B21 lea r13, ptr [r11+r9*2+0x21] +XDIS 13f08: MISC BASE D50F8D6C4C22 lea r13, ptr [r12+r9*2+0x22] +XDIS 13f0e: MISC BASE D50F8D6C4D23 lea r13, ptr [r13+r9*2+0x23] +XDIS 13f14: MISC BASE D50F8D6C4E24 lea r13, ptr [r14+r9*2+0x24] +XDIS 13f1a: MISC BASE D50F8D6C4F25 lea r13, ptr [r15+r9*2+0x25] +XDIS 13f20: MISC BASE D51E8D6C4826 lea r13, ptr [r16+r9*2+0x26] +XDIS 13f26: MISC BASE D51E8D6C4927 lea r13, ptr [r17+r9*2+0x27] +XDIS 13f2c: MISC BASE D51E8D6C4A28 lea r13, ptr [r18+r9*2+0x28] +XDIS 13f32: MISC BASE D51E8D6C4B29 lea r13, ptr [r19+r9*2+0x29] +XDIS 13f38: MISC BASE D51E8D6C4C2A lea r13, ptr [r20+r9*2+0x2a] +XDIS 13f3e: MISC BASE D51E8D6C4D2B lea r13, ptr [r21+r9*2+0x2b] +XDIS 13f44: MISC BASE D51E8D6C4E2C lea r13, ptr [r22+r9*2+0x2c] +XDIS 13f4a: MISC BASE D51E8D6C4F2D lea r13, ptr [r23+r9*2+0x2d] +XDIS 13f50: MISC BASE D51F8D6C482E lea r13, ptr [r24+r9*2+0x2e] +XDIS 13f56: MISC BASE D51F8D6C492F lea r13, ptr [r25+r9*2+0x2f] +XDIS 13f5c: MISC BASE D51F8D6C4A30 lea r13, ptr [r26+r9*2+0x30] +XDIS 13f62: MISC BASE D51F8D6C4B31 lea r13, ptr [r27+r9*2+0x31] +XDIS 13f68: MISC BASE D51F8D6C4C32 lea r13, ptr [r28+r9*2+0x32] +XDIS 13f6e: MISC BASE D51F8D6C4D33 lea r13, ptr [r29+r9*2+0x33] +XDIS 13f74: MISC BASE D51F8D6C4E34 lea r13, ptr [r30+r9*2+0x34] +XDIS 13f7a: MISC BASE D51F8D6C4F35 lea r13, ptr [r31+r9*2+0x35] +XDIS 13f80: MISC BASE D50E8D6C5017 lea r13, ptr [rax+r10*2+0x17] +XDIS 13f86: MISC BASE D50E8D6C5118 lea r13, ptr [rcx+r10*2+0x18] +XDIS 13f8c: MISC BASE D50E8D6C5219 lea r13, ptr [rdx+r10*2+0x19] +XDIS 13f92: MISC BASE D50E8D6C531A lea r13, ptr [rbx+r10*2+0x1a] +XDIS 13f98: MISC BASE D50E8D6C541B lea r13, ptr [rsp+r10*2+0x1b] +XDIS 13f9e: MISC BASE D50E8D6C551C lea r13, ptr [rbp+r10*2+0x1c] +XDIS 13fa4: MISC BASE D50E8D6C561D lea r13, ptr [rsi+r10*2+0x1d] +XDIS 13faa: MISC BASE D50E8D6C571E lea r13, ptr [rdi+r10*2+0x1e] +XDIS 13fb0: MISC BASE D50F8D6C501F lea r13, ptr [r8+r10*2+0x1f] +XDIS 13fb6: MISC BASE D50F8D6C5120 lea r13, ptr [r9+r10*2+0x20] +XDIS 13fbc: MISC BASE D50F8D6C5221 lea r13, ptr [r10+r10*2+0x21] +XDIS 13fc2: MISC BASE D50F8D6C5322 lea r13, ptr [r11+r10*2+0x22] +XDIS 13fc8: MISC BASE D50F8D6C5423 lea r13, ptr [r12+r10*2+0x23] +XDIS 13fce: MISC BASE D50F8D6C5524 lea r13, ptr [r13+r10*2+0x24] +XDIS 13fd4: MISC BASE D50F8D6C5625 lea r13, ptr [r14+r10*2+0x25] +XDIS 13fda: MISC BASE D50F8D6C5726 lea r13, ptr [r15+r10*2+0x26] +XDIS 13fe0: MISC BASE D51E8D6C5027 lea r13, ptr [r16+r10*2+0x27] +XDIS 13fe6: MISC BASE D51E8D6C5128 lea r13, ptr [r17+r10*2+0x28] +XDIS 13fec: MISC BASE D51E8D6C5229 lea r13, ptr [r18+r10*2+0x29] +XDIS 13ff2: MISC BASE D51E8D6C532A lea r13, ptr [r19+r10*2+0x2a] +XDIS 13ff8: MISC BASE D51E8D6C542B lea r13, ptr [r20+r10*2+0x2b] +XDIS 13ffe: MISC BASE D51E8D6C552C lea r13, ptr [r21+r10*2+0x2c] +XDIS 14004: MISC BASE D51E8D6C562D lea r13, ptr [r22+r10*2+0x2d] +XDIS 1400a: MISC BASE D51E8D6C572E lea r13, ptr [r23+r10*2+0x2e] +XDIS 14010: MISC BASE D51F8D6C502F lea r13, ptr [r24+r10*2+0x2f] +XDIS 14016: MISC BASE D51F8D6C5130 lea r13, ptr [r25+r10*2+0x30] +XDIS 1401c: MISC BASE D51F8D6C5231 lea r13, ptr [r26+r10*2+0x31] +XDIS 14022: MISC BASE D51F8D6C5332 lea r13, ptr [r27+r10*2+0x32] +XDIS 14028: MISC BASE D51F8D6C5433 lea r13, ptr [r28+r10*2+0x33] +XDIS 1402e: MISC BASE D51F8D6C5534 lea r13, ptr [r29+r10*2+0x34] +XDIS 14034: MISC BASE D51F8D6C5635 lea r13, ptr [r30+r10*2+0x35] +XDIS 1403a: MISC BASE D51F8D6C5736 lea r13, ptr [r31+r10*2+0x36] +XDIS 14040: MISC BASE D50E8D6C5818 lea r13, ptr [rax+r11*2+0x18] +XDIS 14046: MISC BASE D50E8D6C5919 lea r13, ptr [rcx+r11*2+0x19] +XDIS 1404c: MISC BASE D50E8D6C5A1A lea r13, ptr [rdx+r11*2+0x1a] +XDIS 14052: MISC BASE D50E8D6C5B1B lea r13, ptr [rbx+r11*2+0x1b] +XDIS 14058: MISC BASE D50E8D6C5C1C lea r13, ptr [rsp+r11*2+0x1c] +XDIS 1405e: MISC BASE D50E8D6C5D1D lea r13, ptr [rbp+r11*2+0x1d] +XDIS 14064: MISC BASE D50E8D6C5E1E lea r13, ptr [rsi+r11*2+0x1e] +XDIS 1406a: MISC BASE D50E8D6C5F1F lea r13, ptr [rdi+r11*2+0x1f] +XDIS 14070: MISC BASE D50F8D6C5820 lea r13, ptr [r8+r11*2+0x20] +XDIS 14076: MISC BASE D50F8D6C5921 lea r13, ptr [r9+r11*2+0x21] +XDIS 1407c: MISC BASE D50F8D6C5A22 lea r13, ptr [r10+r11*2+0x22] +XDIS 14082: MISC BASE D50F8D6C5B23 lea r13, ptr [r11+r11*2+0x23] +XDIS 14088: MISC BASE D50F8D6C5C24 lea r13, ptr [r12+r11*2+0x24] +XDIS 1408e: MISC BASE D50F8D6C5D25 lea r13, ptr [r13+r11*2+0x25] +XDIS 14094: MISC BASE D50F8D6C5E26 lea r13, ptr [r14+r11*2+0x26] +XDIS 1409a: MISC BASE D50F8D6C5F27 lea r13, ptr [r15+r11*2+0x27] +XDIS 140a0: MISC BASE D51E8D6C5828 lea r13, ptr [r16+r11*2+0x28] +XDIS 140a6: MISC BASE D51E8D6C5929 lea r13, ptr [r17+r11*2+0x29] +XDIS 140ac: MISC BASE D51E8D6C5A2A lea r13, ptr [r18+r11*2+0x2a] +XDIS 140b2: MISC BASE D51E8D6C5B2B lea r13, ptr [r19+r11*2+0x2b] +XDIS 140b8: MISC BASE D51E8D6C5C2C lea r13, ptr [r20+r11*2+0x2c] +XDIS 140be: MISC BASE D51E8D6C5D2D lea r13, ptr [r21+r11*2+0x2d] +XDIS 140c4: MISC BASE D51E8D6C5E2E lea r13, ptr [r22+r11*2+0x2e] +XDIS 140ca: MISC BASE D51E8D6C5F2F lea r13, ptr [r23+r11*2+0x2f] +XDIS 140d0: MISC BASE D51F8D6C5830 lea r13, ptr [r24+r11*2+0x30] +XDIS 140d6: MISC BASE D51F8D6C5931 lea r13, ptr [r25+r11*2+0x31] +XDIS 140dc: MISC BASE D51F8D6C5A32 lea r13, ptr [r26+r11*2+0x32] +XDIS 140e2: MISC BASE D51F8D6C5B33 lea r13, ptr [r27+r11*2+0x33] +XDIS 140e8: MISC BASE D51F8D6C5C34 lea r13, ptr [r28+r11*2+0x34] +XDIS 140ee: MISC BASE D51F8D6C5D35 lea r13, ptr [r29+r11*2+0x35] +XDIS 140f4: MISC BASE D51F8D6C5E36 lea r13, ptr [r30+r11*2+0x36] +XDIS 140fa: MISC BASE D51F8D6C5F37 lea r13, ptr [r31+r11*2+0x37] +XDIS 14100: MISC BASE D50E8D6C6019 lea r13, ptr [rax+r12*2+0x19] +XDIS 14106: MISC BASE D50E8D6C611A lea r13, ptr [rcx+r12*2+0x1a] +XDIS 1410c: MISC BASE D50E8D6C621B lea r13, ptr [rdx+r12*2+0x1b] +XDIS 14112: MISC BASE D50E8D6C631C lea r13, ptr [rbx+r12*2+0x1c] +XDIS 14118: MISC BASE D50E8D6C641D lea r13, ptr [rsp+r12*2+0x1d] +XDIS 1411e: MISC BASE D50E8D6C651E lea r13, ptr [rbp+r12*2+0x1e] +XDIS 14124: MISC BASE D50E8D6C661F lea r13, ptr [rsi+r12*2+0x1f] +XDIS 1412a: MISC BASE D50E8D6C6720 lea r13, ptr [rdi+r12*2+0x20] +XDIS 14130: MISC BASE D50F8D6C6021 lea r13, ptr [r8+r12*2+0x21] +XDIS 14136: MISC BASE D50F8D6C6122 lea r13, ptr [r9+r12*2+0x22] +XDIS 1413c: MISC BASE D50F8D6C6223 lea r13, ptr [r10+r12*2+0x23] +XDIS 14142: MISC BASE D50F8D6C6324 lea r13, ptr [r11+r12*2+0x24] +XDIS 14148: MISC BASE D50F8D6C6425 lea r13, ptr [r12+r12*2+0x25] +XDIS 1414e: MISC BASE D50F8D6C6526 lea r13, ptr [r13+r12*2+0x26] +XDIS 14154: MISC BASE D50F8D6C6627 lea r13, ptr [r14+r12*2+0x27] +XDIS 1415a: MISC BASE D50F8D6C6728 lea r13, ptr [r15+r12*2+0x28] +XDIS 14160: MISC BASE D51E8D6C6029 lea r13, ptr [r16+r12*2+0x29] +XDIS 14166: MISC BASE D51E8D6C612A lea r13, ptr [r17+r12*2+0x2a] +XDIS 1416c: MISC BASE D51E8D6C622B lea r13, ptr [r18+r12*2+0x2b] +XDIS 14172: MISC BASE D51E8D6C632C lea r13, ptr [r19+r12*2+0x2c] +XDIS 14178: MISC BASE D51E8D6C642D lea r13, ptr [r20+r12*2+0x2d] +XDIS 1417e: MISC BASE D51E8D6C652E lea r13, ptr [r21+r12*2+0x2e] +XDIS 14184: MISC BASE D51E8D6C662F lea r13, ptr [r22+r12*2+0x2f] +XDIS 1418a: MISC BASE D51E8D6C6730 lea r13, ptr [r23+r12*2+0x30] +XDIS 14190: MISC BASE D51F8D6C6031 lea r13, ptr [r24+r12*2+0x31] +XDIS 14196: MISC BASE D51F8D6C6132 lea r13, ptr [r25+r12*2+0x32] +XDIS 1419c: MISC BASE D51F8D6C6233 lea r13, ptr [r26+r12*2+0x33] +XDIS 141a2: MISC BASE D51F8D6C6334 lea r13, ptr [r27+r12*2+0x34] +XDIS 141a8: MISC BASE D51F8D6C6435 lea r13, ptr [r28+r12*2+0x35] +XDIS 141ae: MISC BASE D51F8D6C6536 lea r13, ptr [r29+r12*2+0x36] +XDIS 141b4: MISC BASE D51F8D6C6637 lea r13, ptr [r30+r12*2+0x37] +XDIS 141ba: MISC BASE D51F8D6C6738 lea r13, ptr [r31+r12*2+0x38] +XDIS 141c0: MISC BASE D50E8D6C681A lea r13, ptr [rax+r13*2+0x1a] +XDIS 141c6: MISC BASE D50E8D6C691B lea r13, ptr [rcx+r13*2+0x1b] +XDIS 141cc: MISC BASE D50E8D6C6A1C lea r13, ptr [rdx+r13*2+0x1c] +XDIS 141d2: MISC BASE D50E8D6C6B1D lea r13, ptr [rbx+r13*2+0x1d] +XDIS 141d8: MISC BASE D50E8D6C6C1E lea r13, ptr [rsp+r13*2+0x1e] +XDIS 141de: MISC BASE D50E8D6C6D1F lea r13, ptr [rbp+r13*2+0x1f] +XDIS 141e4: MISC BASE D50E8D6C6E20 lea r13, ptr [rsi+r13*2+0x20] +XDIS 141ea: MISC BASE D50E8D6C6F21 lea r13, ptr [rdi+r13*2+0x21] +XDIS 141f0: MISC BASE D50F8D6C6822 lea r13, ptr [r8+r13*2+0x22] +XDIS 141f6: MISC BASE D50F8D6C6923 lea r13, ptr [r9+r13*2+0x23] +XDIS 141fc: MISC BASE D50F8D6C6A24 lea r13, ptr [r10+r13*2+0x24] +XDIS 14202: MISC BASE D50F8D6C6B25 lea r13, ptr [r11+r13*2+0x25] +XDIS 14208: MISC BASE D50F8D6C6C26 lea r13, ptr [r12+r13*2+0x26] +XDIS 1420e: MISC BASE D50F8D6C6D27 lea r13, ptr [r13+r13*2+0x27] +XDIS 14214: MISC BASE D50F8D6C6E28 lea r13, ptr [r14+r13*2+0x28] +XDIS 1421a: MISC BASE D50F8D6C6F29 lea r13, ptr [r15+r13*2+0x29] +XDIS 14220: MISC BASE D51E8D6C682A lea r13, ptr [r16+r13*2+0x2a] +XDIS 14226: MISC BASE D51E8D6C692B lea r13, ptr [r17+r13*2+0x2b] +XDIS 1422c: MISC BASE D51E8D6C6A2C lea r13, ptr [r18+r13*2+0x2c] +XDIS 14232: MISC BASE D51E8D6C6B2D lea r13, ptr [r19+r13*2+0x2d] +XDIS 14238: MISC BASE D51E8D6C6C2E lea r13, ptr [r20+r13*2+0x2e] +XDIS 1423e: MISC BASE D51E8D6C6D2F lea r13, ptr [r21+r13*2+0x2f] +XDIS 14244: MISC BASE D51E8D6C6E30 lea r13, ptr [r22+r13*2+0x30] +XDIS 1424a: MISC BASE D51E8D6C6F31 lea r13, ptr [r23+r13*2+0x31] +XDIS 14250: MISC BASE D51F8D6C6832 lea r13, ptr [r24+r13*2+0x32] +XDIS 14256: MISC BASE D51F8D6C6933 lea r13, ptr [r25+r13*2+0x33] +XDIS 1425c: MISC BASE D51F8D6C6A34 lea r13, ptr [r26+r13*2+0x34] +XDIS 14262: MISC BASE D51F8D6C6B35 lea r13, ptr [r27+r13*2+0x35] +XDIS 14268: MISC BASE D51F8D6C6C36 lea r13, ptr [r28+r13*2+0x36] +XDIS 1426e: MISC BASE D51F8D6C6D37 lea r13, ptr [r29+r13*2+0x37] +XDIS 14274: MISC BASE D51F8D6C6E38 lea r13, ptr [r30+r13*2+0x38] +XDIS 1427a: MISC BASE D51F8D6C6F39 lea r13, ptr [r31+r13*2+0x39] +XDIS 14280: MISC BASE D50E8D6C701B lea r13, ptr [rax+r14*2+0x1b] +XDIS 14286: MISC BASE D50E8D6C711C lea r13, ptr [rcx+r14*2+0x1c] +XDIS 1428c: MISC BASE D50E8D6C721D lea r13, ptr [rdx+r14*2+0x1d] +XDIS 14292: MISC BASE D50E8D6C731E lea r13, ptr [rbx+r14*2+0x1e] +XDIS 14298: MISC BASE D50E8D6C741F lea r13, ptr [rsp+r14*2+0x1f] +XDIS 1429e: MISC BASE D50E8D6C7520 lea r13, ptr [rbp+r14*2+0x20] +XDIS 142a4: MISC BASE D50E8D6C7621 lea r13, ptr [rsi+r14*2+0x21] +XDIS 142aa: MISC BASE D50E8D6C7722 lea r13, ptr [rdi+r14*2+0x22] +XDIS 142b0: MISC BASE D50F8D6C7023 lea r13, ptr [r8+r14*2+0x23] +XDIS 142b6: MISC BASE D50F8D6C7124 lea r13, ptr [r9+r14*2+0x24] +XDIS 142bc: MISC BASE D50F8D6C7225 lea r13, ptr [r10+r14*2+0x25] +XDIS 142c2: MISC BASE D50F8D6C7326 lea r13, ptr [r11+r14*2+0x26] +XDIS 142c8: MISC BASE D50F8D6C7427 lea r13, ptr [r12+r14*2+0x27] +XDIS 142ce: MISC BASE D50F8D6C7528 lea r13, ptr [r13+r14*2+0x28] +XDIS 142d4: MISC BASE D50F8D6C7629 lea r13, ptr [r14+r14*2+0x29] +XDIS 142da: MISC BASE D50F8D6C772A lea r13, ptr [r15+r14*2+0x2a] +XDIS 142e0: MISC BASE D51E8D6C702B lea r13, ptr [r16+r14*2+0x2b] +XDIS 142e6: MISC BASE D51E8D6C712C lea r13, ptr [r17+r14*2+0x2c] +XDIS 142ec: MISC BASE D51E8D6C722D lea r13, ptr [r18+r14*2+0x2d] +XDIS 142f2: MISC BASE D51E8D6C732E lea r13, ptr [r19+r14*2+0x2e] +XDIS 142f8: MISC BASE D51E8D6C742F lea r13, ptr [r20+r14*2+0x2f] +XDIS 142fe: MISC BASE D51E8D6C7530 lea r13, ptr [r21+r14*2+0x30] +XDIS 14304: MISC BASE D51E8D6C7631 lea r13, ptr [r22+r14*2+0x31] +XDIS 1430a: MISC BASE D51E8D6C7732 lea r13, ptr [r23+r14*2+0x32] +XDIS 14310: MISC BASE D51F8D6C7033 lea r13, ptr [r24+r14*2+0x33] +XDIS 14316: MISC BASE D51F8D6C7134 lea r13, ptr [r25+r14*2+0x34] +XDIS 1431c: MISC BASE D51F8D6C7235 lea r13, ptr [r26+r14*2+0x35] +XDIS 14322: MISC BASE D51F8D6C7336 lea r13, ptr [r27+r14*2+0x36] +XDIS 14328: MISC BASE D51F8D6C7437 lea r13, ptr [r28+r14*2+0x37] +XDIS 1432e: MISC BASE D51F8D6C7538 lea r13, ptr [r29+r14*2+0x38] +XDIS 14334: MISC BASE D51F8D6C7639 lea r13, ptr [r30+r14*2+0x39] +XDIS 1433a: MISC BASE D51F8D6C773A lea r13, ptr [r31+r14*2+0x3a] +XDIS 14340: MISC BASE D50E8D6C781C lea r13, ptr [rax+r15*2+0x1c] +XDIS 14346: MISC BASE D50E8D6C791D lea r13, ptr [rcx+r15*2+0x1d] +XDIS 1434c: MISC BASE D50E8D6C7A1E lea r13, ptr [rdx+r15*2+0x1e] +XDIS 14352: MISC BASE D50E8D6C7B1F lea r13, ptr [rbx+r15*2+0x1f] +XDIS 14358: MISC BASE D50E8D6C7C20 lea r13, ptr [rsp+r15*2+0x20] +XDIS 1435e: MISC BASE D50E8D6C7D21 lea r13, ptr [rbp+r15*2+0x21] +XDIS 14364: MISC BASE D50E8D6C7E22 lea r13, ptr [rsi+r15*2+0x22] +XDIS 1436a: MISC BASE D50E8D6C7F23 lea r13, ptr [rdi+r15*2+0x23] +XDIS 14370: MISC BASE D50F8D6C7824 lea r13, ptr [r8+r15*2+0x24] +XDIS 14376: MISC BASE D50F8D6C7925 lea r13, ptr [r9+r15*2+0x25] +XDIS 1437c: MISC BASE D50F8D6C7A26 lea r13, ptr [r10+r15*2+0x26] +XDIS 14382: MISC BASE D50F8D6C7B27 lea r13, ptr [r11+r15*2+0x27] +XDIS 14388: MISC BASE D50F8D6C7C28 lea r13, ptr [r12+r15*2+0x28] +XDIS 1438e: MISC BASE D50F8D6C7D29 lea r13, ptr [r13+r15*2+0x29] +XDIS 14394: MISC BASE D50F8D6C7E2A lea r13, ptr [r14+r15*2+0x2a] +XDIS 1439a: MISC BASE D50F8D6C7F2B lea r13, ptr [r15+r15*2+0x2b] +XDIS 143a0: MISC BASE D51E8D6C782C lea r13, ptr [r16+r15*2+0x2c] +XDIS 143a6: MISC BASE D51E8D6C792D lea r13, ptr [r17+r15*2+0x2d] +XDIS 143ac: MISC BASE D51E8D6C7A2E lea r13, ptr [r18+r15*2+0x2e] +XDIS 143b2: MISC BASE D51E8D6C7B2F lea r13, ptr [r19+r15*2+0x2f] +XDIS 143b8: MISC BASE D51E8D6C7C30 lea r13, ptr [r20+r15*2+0x30] +XDIS 143be: MISC BASE D51E8D6C7D31 lea r13, ptr [r21+r15*2+0x31] +XDIS 143c4: MISC BASE D51E8D6C7E32 lea r13, ptr [r22+r15*2+0x32] +XDIS 143ca: MISC BASE D51E8D6C7F33 lea r13, ptr [r23+r15*2+0x33] +XDIS 143d0: MISC BASE D51F8D6C7834 lea r13, ptr [r24+r15*2+0x34] +XDIS 143d6: MISC BASE D51F8D6C7935 lea r13, ptr [r25+r15*2+0x35] +XDIS 143dc: MISC BASE D51F8D6C7A36 lea r13, ptr [r26+r15*2+0x36] +XDIS 143e2: MISC BASE D51F8D6C7B37 lea r13, ptr [r27+r15*2+0x37] +XDIS 143e8: MISC BASE D51F8D6C7C38 lea r13, ptr [r28+r15*2+0x38] +XDIS 143ee: MISC BASE D51F8D6C7D39 lea r13, ptr [r29+r15*2+0x39] +XDIS 143f4: MISC BASE D51F8D6C7E3A lea r13, ptr [r30+r15*2+0x3a] +XDIS 143fa: MISC BASE D51F8D6C7F3B lea r13, ptr [r31+r15*2+0x3b] +XDIS 14400: MISC BASE D52C8D6C401D lea r13, ptr [rax+r16*2+0x1d] +XDIS 14406: MISC BASE D52C8D6C411E lea r13, ptr [rcx+r16*2+0x1e] +XDIS 1440c: MISC BASE D52C8D6C421F lea r13, ptr [rdx+r16*2+0x1f] +XDIS 14412: MISC BASE D52C8D6C4320 lea r13, ptr [rbx+r16*2+0x20] +XDIS 14418: MISC BASE D52C8D6C4421 lea r13, ptr [rsp+r16*2+0x21] +XDIS 1441e: MISC BASE D52C8D6C4522 lea r13, ptr [rbp+r16*2+0x22] +XDIS 14424: MISC BASE D52C8D6C4623 lea r13, ptr [rsi+r16*2+0x23] +XDIS 1442a: MISC BASE D52C8D6C4724 lea r13, ptr [rdi+r16*2+0x24] +XDIS 14430: MISC BASE D52D8D6C4025 lea r13, ptr [r8+r16*2+0x25] +XDIS 14436: MISC BASE D52D8D6C4126 lea r13, ptr [r9+r16*2+0x26] +XDIS 1443c: MISC BASE D52D8D6C4227 lea r13, ptr [r10+r16*2+0x27] +XDIS 14442: MISC BASE D52D8D6C4328 lea r13, ptr [r11+r16*2+0x28] +XDIS 14448: MISC BASE D52D8D6C4429 lea r13, ptr [r12+r16*2+0x29] +XDIS 1444e: MISC BASE D52D8D6C452A lea r13, ptr [r13+r16*2+0x2a] +XDIS 14454: MISC BASE D52D8D6C462B lea r13, ptr [r14+r16*2+0x2b] +XDIS 1445a: MISC BASE D52D8D6C472C lea r13, ptr [r15+r16*2+0x2c] +XDIS 14460: MISC BASE D53C8D6C402D lea r13, ptr [r16+r16*2+0x2d] +XDIS 14466: MISC BASE D53C8D6C412E lea r13, ptr [r17+r16*2+0x2e] +XDIS 1446c: MISC BASE D53C8D6C422F lea r13, ptr [r18+r16*2+0x2f] +XDIS 14472: MISC BASE D53C8D6C4330 lea r13, ptr [r19+r16*2+0x30] +XDIS 14478: MISC BASE D53C8D6C4431 lea r13, ptr [r20+r16*2+0x31] +XDIS 1447e: MISC BASE D53C8D6C4532 lea r13, ptr [r21+r16*2+0x32] +XDIS 14484: MISC BASE D53C8D6C4633 lea r13, ptr [r22+r16*2+0x33] +XDIS 1448a: MISC BASE D53C8D6C4734 lea r13, ptr [r23+r16*2+0x34] +XDIS 14490: MISC BASE D53D8D6C4035 lea r13, ptr [r24+r16*2+0x35] +XDIS 14496: MISC BASE D53D8D6C4136 lea r13, ptr [r25+r16*2+0x36] +XDIS 1449c: MISC BASE D53D8D6C4237 lea r13, ptr [r26+r16*2+0x37] +XDIS 144a2: MISC BASE D53D8D6C4338 lea r13, ptr [r27+r16*2+0x38] +XDIS 144a8: MISC BASE D53D8D6C4439 lea r13, ptr [r28+r16*2+0x39] +XDIS 144ae: MISC BASE D53D8D6C453A lea r13, ptr [r29+r16*2+0x3a] +XDIS 144b4: MISC BASE D53D8D6C463B lea r13, ptr [r30+r16*2+0x3b] +XDIS 144ba: MISC BASE D53D8D6C473C lea r13, ptr [r31+r16*2+0x3c] +XDIS 144c0: MISC BASE D52C8D6C481E lea r13, ptr [rax+r17*2+0x1e] +XDIS 144c6: MISC BASE D52C8D6C491F lea r13, ptr [rcx+r17*2+0x1f] +XDIS 144cc: MISC BASE D52C8D6C4A20 lea r13, ptr [rdx+r17*2+0x20] +XDIS 144d2: MISC BASE D52C8D6C4B21 lea r13, ptr [rbx+r17*2+0x21] +XDIS 144d8: MISC BASE D52C8D6C4C22 lea r13, ptr [rsp+r17*2+0x22] +XDIS 144de: MISC BASE D52C8D6C4D23 lea r13, ptr [rbp+r17*2+0x23] +XDIS 144e4: MISC BASE D52C8D6C4E24 lea r13, ptr [rsi+r17*2+0x24] +XDIS 144ea: MISC BASE D52C8D6C4F25 lea r13, ptr [rdi+r17*2+0x25] +XDIS 144f0: MISC BASE D52D8D6C4826 lea r13, ptr [r8+r17*2+0x26] +XDIS 144f6: MISC BASE D52D8D6C4927 lea r13, ptr [r9+r17*2+0x27] +XDIS 144fc: MISC BASE D52D8D6C4A28 lea r13, ptr [r10+r17*2+0x28] +XDIS 14502: MISC BASE D52D8D6C4B29 lea r13, ptr [r11+r17*2+0x29] +XDIS 14508: MISC BASE D52D8D6C4C2A lea r13, ptr [r12+r17*2+0x2a] +XDIS 1450e: MISC BASE D52D8D6C4D2B lea r13, ptr [r13+r17*2+0x2b] +XDIS 14514: MISC BASE D52D8D6C4E2C lea r13, ptr [r14+r17*2+0x2c] +XDIS 1451a: MISC BASE D52D8D6C4F2D lea r13, ptr [r15+r17*2+0x2d] +XDIS 14520: MISC BASE D53C8D6C482E lea r13, ptr [r16+r17*2+0x2e] +XDIS 14526: MISC BASE D53C8D6C492F lea r13, ptr [r17+r17*2+0x2f] +XDIS 1452c: MISC BASE D53C8D6C4A30 lea r13, ptr [r18+r17*2+0x30] +XDIS 14532: MISC BASE D53C8D6C4B31 lea r13, ptr [r19+r17*2+0x31] +XDIS 14538: MISC BASE D53C8D6C4C32 lea r13, ptr [r20+r17*2+0x32] +XDIS 1453e: MISC BASE D53C8D6C4D33 lea r13, ptr [r21+r17*2+0x33] +XDIS 14544: MISC BASE D53C8D6C4E34 lea r13, ptr [r22+r17*2+0x34] +XDIS 1454a: MISC BASE D53C8D6C4F35 lea r13, ptr [r23+r17*2+0x35] +XDIS 14550: MISC BASE D53D8D6C4836 lea r13, ptr [r24+r17*2+0x36] +XDIS 14556: MISC BASE D53D8D6C4937 lea r13, ptr [r25+r17*2+0x37] +XDIS 1455c: MISC BASE D53D8D6C4A38 lea r13, ptr [r26+r17*2+0x38] +XDIS 14562: MISC BASE D53D8D6C4B39 lea r13, ptr [r27+r17*2+0x39] +XDIS 14568: MISC BASE D53D8D6C4C3A lea r13, ptr [r28+r17*2+0x3a] +XDIS 1456e: MISC BASE D53D8D6C4D3B lea r13, ptr [r29+r17*2+0x3b] +XDIS 14574: MISC BASE D53D8D6C4E3C lea r13, ptr [r30+r17*2+0x3c] +XDIS 1457a: MISC BASE D53D8D6C4F3D lea r13, ptr [r31+r17*2+0x3d] +XDIS 14580: MISC BASE D52C8D6C501F lea r13, ptr [rax+r18*2+0x1f] +XDIS 14586: MISC BASE D52C8D6C5120 lea r13, ptr [rcx+r18*2+0x20] +XDIS 1458c: MISC BASE D52C8D6C5221 lea r13, ptr [rdx+r18*2+0x21] +XDIS 14592: MISC BASE D52C8D6C5322 lea r13, ptr [rbx+r18*2+0x22] +XDIS 14598: MISC BASE D52C8D6C5423 lea r13, ptr [rsp+r18*2+0x23] +XDIS 1459e: MISC BASE D52C8D6C5524 lea r13, ptr [rbp+r18*2+0x24] +XDIS 145a4: MISC BASE D52C8D6C5625 lea r13, ptr [rsi+r18*2+0x25] +XDIS 145aa: MISC BASE D52C8D6C5726 lea r13, ptr [rdi+r18*2+0x26] +XDIS 145b0: MISC BASE D52D8D6C5027 lea r13, ptr [r8+r18*2+0x27] +XDIS 145b6: MISC BASE D52D8D6C5128 lea r13, ptr [r9+r18*2+0x28] +XDIS 145bc: MISC BASE D52D8D6C5229 lea r13, ptr [r10+r18*2+0x29] +XDIS 145c2: MISC BASE D52D8D6C532A lea r13, ptr [r11+r18*2+0x2a] +XDIS 145c8: MISC BASE D52D8D6C542B lea r13, ptr [r12+r18*2+0x2b] +XDIS 145ce: MISC BASE D52D8D6C552C lea r13, ptr [r13+r18*2+0x2c] +XDIS 145d4: MISC BASE D52D8D6C562D lea r13, ptr [r14+r18*2+0x2d] +XDIS 145da: MISC BASE D52D8D6C572E lea r13, ptr [r15+r18*2+0x2e] +XDIS 145e0: MISC BASE D53C8D6C502F lea r13, ptr [r16+r18*2+0x2f] +XDIS 145e6: MISC BASE D53C8D6C5130 lea r13, ptr [r17+r18*2+0x30] +XDIS 145ec: MISC BASE D53C8D6C5231 lea r13, ptr [r18+r18*2+0x31] +XDIS 145f2: MISC BASE D53C8D6C5332 lea r13, ptr [r19+r18*2+0x32] +XDIS 145f8: MISC BASE D53C8D6C5433 lea r13, ptr [r20+r18*2+0x33] +XDIS 145fe: MISC BASE D53C8D6C5534 lea r13, ptr [r21+r18*2+0x34] +XDIS 14604: MISC BASE D53C8D6C5635 lea r13, ptr [r22+r18*2+0x35] +XDIS 1460a: MISC BASE D53C8D6C5736 lea r13, ptr [r23+r18*2+0x36] +XDIS 14610: MISC BASE D53D8D6C5037 lea r13, ptr [r24+r18*2+0x37] +XDIS 14616: MISC BASE D53D8D6C5138 lea r13, ptr [r25+r18*2+0x38] +XDIS 1461c: MISC BASE D53D8D6C5239 lea r13, ptr [r26+r18*2+0x39] +XDIS 14622: MISC BASE D53D8D6C533A lea r13, ptr [r27+r18*2+0x3a] +XDIS 14628: MISC BASE D53D8D6C543B lea r13, ptr [r28+r18*2+0x3b] +XDIS 1462e: MISC BASE D53D8D6C553C lea r13, ptr [r29+r18*2+0x3c] +XDIS 14634: MISC BASE D53D8D6C563D lea r13, ptr [r30+r18*2+0x3d] +XDIS 1463a: MISC BASE D53D8D6C573E lea r13, ptr [r31+r18*2+0x3e] +XDIS 14640: MISC BASE D52C8D6C5820 lea r13, ptr [rax+r19*2+0x20] +XDIS 14646: MISC BASE D52C8D6C5921 lea r13, ptr [rcx+r19*2+0x21] +XDIS 1464c: MISC BASE D52C8D6C5A22 lea r13, ptr [rdx+r19*2+0x22] +XDIS 14652: MISC BASE D52C8D6C5B23 lea r13, ptr [rbx+r19*2+0x23] +XDIS 14658: MISC BASE D52C8D6C5C24 lea r13, ptr [rsp+r19*2+0x24] +XDIS 1465e: MISC BASE D52C8D6C5D25 lea r13, ptr [rbp+r19*2+0x25] +XDIS 14664: MISC BASE D52C8D6C5E26 lea r13, ptr [rsi+r19*2+0x26] +XDIS 1466a: MISC BASE D52C8D6C5F27 lea r13, ptr [rdi+r19*2+0x27] +XDIS 14670: MISC BASE D52D8D6C5828 lea r13, ptr [r8+r19*2+0x28] +XDIS 14676: MISC BASE D52D8D6C5929 lea r13, ptr [r9+r19*2+0x29] +XDIS 1467c: MISC BASE D52D8D6C5A2A lea r13, ptr [r10+r19*2+0x2a] +XDIS 14682: MISC BASE D52D8D6C5B2B lea r13, ptr [r11+r19*2+0x2b] +XDIS 14688: MISC BASE D52D8D6C5C2C lea r13, ptr [r12+r19*2+0x2c] +XDIS 1468e: MISC BASE D52D8D6C5D2D lea r13, ptr [r13+r19*2+0x2d] +XDIS 14694: MISC BASE D52D8D6C5E2E lea r13, ptr [r14+r19*2+0x2e] +XDIS 1469a: MISC BASE D52D8D6C5F2F lea r13, ptr [r15+r19*2+0x2f] +XDIS 146a0: MISC BASE D53C8D6C5830 lea r13, ptr [r16+r19*2+0x30] +XDIS 146a6: MISC BASE D53C8D6C5931 lea r13, ptr [r17+r19*2+0x31] +XDIS 146ac: MISC BASE D53C8D6C5A32 lea r13, ptr [r18+r19*2+0x32] +XDIS 146b2: MISC BASE D53C8D6C5B33 lea r13, ptr [r19+r19*2+0x33] +XDIS 146b8: MISC BASE D53C8D6C5C34 lea r13, ptr [r20+r19*2+0x34] +XDIS 146be: MISC BASE D53C8D6C5D35 lea r13, ptr [r21+r19*2+0x35] +XDIS 146c4: MISC BASE D53C8D6C5E36 lea r13, ptr [r22+r19*2+0x36] +XDIS 146ca: MISC BASE D53C8D6C5F37 lea r13, ptr [r23+r19*2+0x37] +XDIS 146d0: MISC BASE D53D8D6C5838 lea r13, ptr [r24+r19*2+0x38] +XDIS 146d6: MISC BASE D53D8D6C5939 lea r13, ptr [r25+r19*2+0x39] +XDIS 146dc: MISC BASE D53D8D6C5A3A lea r13, ptr [r26+r19*2+0x3a] +XDIS 146e2: MISC BASE D53D8D6C5B3B lea r13, ptr [r27+r19*2+0x3b] +XDIS 146e8: MISC BASE D53D8D6C5C3C lea r13, ptr [r28+r19*2+0x3c] +XDIS 146ee: MISC BASE D53D8D6C5D3D lea r13, ptr [r29+r19*2+0x3d] +XDIS 146f4: MISC BASE D53D8D6C5E3E lea r13, ptr [r30+r19*2+0x3e] +XDIS 146fa: MISC BASE D53D8D6C5F3F lea r13, ptr [r31+r19*2+0x3f] +XDIS 14700: MISC BASE D52C8D6C6021 lea r13, ptr [rax+r20*2+0x21] +XDIS 14706: MISC BASE D52C8D6C6122 lea r13, ptr [rcx+r20*2+0x22] +XDIS 1470c: MISC BASE D52C8D6C6223 lea r13, ptr [rdx+r20*2+0x23] +XDIS 14712: MISC BASE D52C8D6C6324 lea r13, ptr [rbx+r20*2+0x24] +XDIS 14718: MISC BASE D52C8D6C6425 lea r13, ptr [rsp+r20*2+0x25] +XDIS 1471e: MISC BASE D52C8D6C6526 lea r13, ptr [rbp+r20*2+0x26] +XDIS 14724: MISC BASE D52C8D6C6627 lea r13, ptr [rsi+r20*2+0x27] +XDIS 1472a: MISC BASE D52C8D6C6728 lea r13, ptr [rdi+r20*2+0x28] +XDIS 14730: MISC BASE D52D8D6C6029 lea r13, ptr [r8+r20*2+0x29] +XDIS 14736: MISC BASE D52D8D6C612A lea r13, ptr [r9+r20*2+0x2a] +XDIS 1473c: MISC BASE D52D8D6C622B lea r13, ptr [r10+r20*2+0x2b] +XDIS 14742: MISC BASE D52D8D6C632C lea r13, ptr [r11+r20*2+0x2c] +XDIS 14748: MISC BASE D52D8D6C642D lea r13, ptr [r12+r20*2+0x2d] +XDIS 1474e: MISC BASE D52D8D6C652E lea r13, ptr [r13+r20*2+0x2e] +XDIS 14754: MISC BASE D52D8D6C662F lea r13, ptr [r14+r20*2+0x2f] +XDIS 1475a: MISC BASE D52D8D6C6730 lea r13, ptr [r15+r20*2+0x30] +XDIS 14760: MISC BASE D53C8D6C6031 lea r13, ptr [r16+r20*2+0x31] +XDIS 14766: MISC BASE D53C8D6C6132 lea r13, ptr [r17+r20*2+0x32] +XDIS 1476c: MISC BASE D53C8D6C6233 lea r13, ptr [r18+r20*2+0x33] +XDIS 14772: MISC BASE D53C8D6C6334 lea r13, ptr [r19+r20*2+0x34] +XDIS 14778: MISC BASE D53C8D6C6435 lea r13, ptr [r20+r20*2+0x35] +XDIS 1477e: MISC BASE D53C8D6C6536 lea r13, ptr [r21+r20*2+0x36] +XDIS 14784: MISC BASE D53C8D6C6637 lea r13, ptr [r22+r20*2+0x37] +XDIS 1478a: MISC BASE D53C8D6C6738 lea r13, ptr [r23+r20*2+0x38] +XDIS 14790: MISC BASE D53D8D6C6039 lea r13, ptr [r24+r20*2+0x39] +XDIS 14796: MISC BASE D53D8D6C613A lea r13, ptr [r25+r20*2+0x3a] +XDIS 1479c: MISC BASE D53D8D6C623B lea r13, ptr [r26+r20*2+0x3b] +XDIS 147a2: MISC BASE D53D8D6C633C lea r13, ptr [r27+r20*2+0x3c] +XDIS 147a8: MISC BASE D53D8D6C643D lea r13, ptr [r28+r20*2+0x3d] +XDIS 147ae: MISC BASE D53D8D6C653E lea r13, ptr [r29+r20*2+0x3e] +XDIS 147b4: MISC BASE D53D8D6C663F lea r13, ptr [r30+r20*2+0x3f] +XDIS 147ba: MISC BASE D53D8D6C6740 lea r13, ptr [r31+r20*2+0x40] +XDIS 147c0: MISC BASE D52C8D6C6822 lea r13, ptr [rax+r21*2+0x22] +XDIS 147c6: MISC BASE D52C8D6C6923 lea r13, ptr [rcx+r21*2+0x23] +XDIS 147cc: MISC BASE D52C8D6C6A24 lea r13, ptr [rdx+r21*2+0x24] +XDIS 147d2: MISC BASE D52C8D6C6B25 lea r13, ptr [rbx+r21*2+0x25] +XDIS 147d8: MISC BASE D52C8D6C6C26 lea r13, ptr [rsp+r21*2+0x26] +XDIS 147de: MISC BASE D52C8D6C6D27 lea r13, ptr [rbp+r21*2+0x27] +XDIS 147e4: MISC BASE D52C8D6C6E28 lea r13, ptr [rsi+r21*2+0x28] +XDIS 147ea: MISC BASE D52C8D6C6F29 lea r13, ptr [rdi+r21*2+0x29] +XDIS 147f0: MISC BASE D52D8D6C682A lea r13, ptr [r8+r21*2+0x2a] +XDIS 147f6: MISC BASE D52D8D6C692B lea r13, ptr [r9+r21*2+0x2b] +XDIS 147fc: MISC BASE D52D8D6C6A2C lea r13, ptr [r10+r21*2+0x2c] +XDIS 14802: MISC BASE D52D8D6C6B2D lea r13, ptr [r11+r21*2+0x2d] +XDIS 14808: MISC BASE D52D8D6C6C2E lea r13, ptr [r12+r21*2+0x2e] +XDIS 1480e: MISC BASE D52D8D6C6D2F lea r13, ptr [r13+r21*2+0x2f] +XDIS 14814: MISC BASE D52D8D6C6E30 lea r13, ptr [r14+r21*2+0x30] +XDIS 1481a: MISC BASE D52D8D6C6F31 lea r13, ptr [r15+r21*2+0x31] +XDIS 14820: MISC BASE D53C8D6C6832 lea r13, ptr [r16+r21*2+0x32] +XDIS 14826: MISC BASE D53C8D6C6933 lea r13, ptr [r17+r21*2+0x33] +XDIS 1482c: MISC BASE D53C8D6C6A34 lea r13, ptr [r18+r21*2+0x34] +XDIS 14832: MISC BASE D53C8D6C6B35 lea r13, ptr [r19+r21*2+0x35] +XDIS 14838: MISC BASE D53C8D6C6C36 lea r13, ptr [r20+r21*2+0x36] +XDIS 1483e: MISC BASE D53C8D6C6D37 lea r13, ptr [r21+r21*2+0x37] +XDIS 14844: MISC BASE D53C8D6C6E38 lea r13, ptr [r22+r21*2+0x38] +XDIS 1484a: MISC BASE D53C8D6C6F39 lea r13, ptr [r23+r21*2+0x39] +XDIS 14850: MISC BASE D53D8D6C683A lea r13, ptr [r24+r21*2+0x3a] +XDIS 14856: MISC BASE D53D8D6C693B lea r13, ptr [r25+r21*2+0x3b] +XDIS 1485c: MISC BASE D53D8D6C6A3C lea r13, ptr [r26+r21*2+0x3c] +XDIS 14862: MISC BASE D53D8D6C6B3D lea r13, ptr [r27+r21*2+0x3d] +XDIS 14868: MISC BASE D53D8D6C6C3E lea r13, ptr [r28+r21*2+0x3e] +XDIS 1486e: MISC BASE D53D8D6C6D3F lea r13, ptr [r29+r21*2+0x3f] +XDIS 14874: MISC BASE D53D8D6C6E40 lea r13, ptr [r30+r21*2+0x40] +XDIS 1487a: MISC BASE D53D8D6C6F41 lea r13, ptr [r31+r21*2+0x41] +XDIS 14880: MISC BASE D52C8D6C7023 lea r13, ptr [rax+r22*2+0x23] +XDIS 14886: MISC BASE D52C8D6C7124 lea r13, ptr [rcx+r22*2+0x24] +XDIS 1488c: MISC BASE D52C8D6C7225 lea r13, ptr [rdx+r22*2+0x25] +XDIS 14892: MISC BASE D52C8D6C7326 lea r13, ptr [rbx+r22*2+0x26] +XDIS 14898: MISC BASE D52C8D6C7427 lea r13, ptr [rsp+r22*2+0x27] +XDIS 1489e: MISC BASE D52C8D6C7528 lea r13, ptr [rbp+r22*2+0x28] +XDIS 148a4: MISC BASE D52C8D6C7629 lea r13, ptr [rsi+r22*2+0x29] +XDIS 148aa: MISC BASE D52C8D6C772A lea r13, ptr [rdi+r22*2+0x2a] +XDIS 148b0: MISC BASE D52D8D6C702B lea r13, ptr [r8+r22*2+0x2b] +XDIS 148b6: MISC BASE D52D8D6C712C lea r13, ptr [r9+r22*2+0x2c] +XDIS 148bc: MISC BASE D52D8D6C722D lea r13, ptr [r10+r22*2+0x2d] +XDIS 148c2: MISC BASE D52D8D6C732E lea r13, ptr [r11+r22*2+0x2e] +XDIS 148c8: MISC BASE D52D8D6C742F lea r13, ptr [r12+r22*2+0x2f] +XDIS 148ce: MISC BASE D52D8D6C7530 lea r13, ptr [r13+r22*2+0x30] +XDIS 148d4: MISC BASE D52D8D6C7631 lea r13, ptr [r14+r22*2+0x31] +XDIS 148da: MISC BASE D52D8D6C7732 lea r13, ptr [r15+r22*2+0x32] +XDIS 148e0: MISC BASE D53C8D6C7033 lea r13, ptr [r16+r22*2+0x33] +XDIS 148e6: MISC BASE D53C8D6C7134 lea r13, ptr [r17+r22*2+0x34] +XDIS 148ec: MISC BASE D53C8D6C7235 lea r13, ptr [r18+r22*2+0x35] +XDIS 148f2: MISC BASE D53C8D6C7336 lea r13, ptr [r19+r22*2+0x36] +XDIS 148f8: MISC BASE D53C8D6C7437 lea r13, ptr [r20+r22*2+0x37] +XDIS 148fe: MISC BASE D53C8D6C7538 lea r13, ptr [r21+r22*2+0x38] +XDIS 14904: MISC BASE D53C8D6C7639 lea r13, ptr [r22+r22*2+0x39] +XDIS 1490a: MISC BASE D53C8D6C773A lea r13, ptr [r23+r22*2+0x3a] +XDIS 14910: MISC BASE D53D8D6C703B lea r13, ptr [r24+r22*2+0x3b] +XDIS 14916: MISC BASE D53D8D6C713C lea r13, ptr [r25+r22*2+0x3c] +XDIS 1491c: MISC BASE D53D8D6C723D lea r13, ptr [r26+r22*2+0x3d] +XDIS 14922: MISC BASE D53D8D6C733E lea r13, ptr [r27+r22*2+0x3e] +XDIS 14928: MISC BASE D53D8D6C743F lea r13, ptr [r28+r22*2+0x3f] +XDIS 1492e: MISC BASE D53D8D6C7540 lea r13, ptr [r29+r22*2+0x40] +XDIS 14934: MISC BASE D53D8D6C7641 lea r13, ptr [r30+r22*2+0x41] +XDIS 1493a: MISC BASE D53D8D6C7742 lea r13, ptr [r31+r22*2+0x42] +XDIS 14940: MISC BASE D52C8D6C7824 lea r13, ptr [rax+r23*2+0x24] +XDIS 14946: MISC BASE D52C8D6C7925 lea r13, ptr [rcx+r23*2+0x25] +XDIS 1494c: MISC BASE D52C8D6C7A26 lea r13, ptr [rdx+r23*2+0x26] +XDIS 14952: MISC BASE D52C8D6C7B27 lea r13, ptr [rbx+r23*2+0x27] +XDIS 14958: MISC BASE D52C8D6C7C28 lea r13, ptr [rsp+r23*2+0x28] +XDIS 1495e: MISC BASE D52C8D6C7D29 lea r13, ptr [rbp+r23*2+0x29] +XDIS 14964: MISC BASE D52C8D6C7E2A lea r13, ptr [rsi+r23*2+0x2a] +XDIS 1496a: MISC BASE D52C8D6C7F2B lea r13, ptr [rdi+r23*2+0x2b] +XDIS 14970: MISC BASE D52D8D6C782C lea r13, ptr [r8+r23*2+0x2c] +XDIS 14976: MISC BASE D52D8D6C792D lea r13, ptr [r9+r23*2+0x2d] +XDIS 1497c: MISC BASE D52D8D6C7A2E lea r13, ptr [r10+r23*2+0x2e] +XDIS 14982: MISC BASE D52D8D6C7B2F lea r13, ptr [r11+r23*2+0x2f] +XDIS 14988: MISC BASE D52D8D6C7C30 lea r13, ptr [r12+r23*2+0x30] +XDIS 1498e: MISC BASE D52D8D6C7D31 lea r13, ptr [r13+r23*2+0x31] +XDIS 14994: MISC BASE D52D8D6C7E32 lea r13, ptr [r14+r23*2+0x32] +XDIS 1499a: MISC BASE D52D8D6C7F33 lea r13, ptr [r15+r23*2+0x33] +XDIS 149a0: MISC BASE D53C8D6C7834 lea r13, ptr [r16+r23*2+0x34] +XDIS 149a6: MISC BASE D53C8D6C7935 lea r13, ptr [r17+r23*2+0x35] +XDIS 149ac: MISC BASE D53C8D6C7A36 lea r13, ptr [r18+r23*2+0x36] +XDIS 149b2: MISC BASE D53C8D6C7B37 lea r13, ptr [r19+r23*2+0x37] +XDIS 149b8: MISC BASE D53C8D6C7C38 lea r13, ptr [r20+r23*2+0x38] +XDIS 149be: MISC BASE D53C8D6C7D39 lea r13, ptr [r21+r23*2+0x39] +XDIS 149c4: MISC BASE D53C8D6C7E3A lea r13, ptr [r22+r23*2+0x3a] +XDIS 149ca: MISC BASE D53C8D6C7F3B lea r13, ptr [r23+r23*2+0x3b] +XDIS 149d0: MISC BASE D53D8D6C783C lea r13, ptr [r24+r23*2+0x3c] +XDIS 149d6: MISC BASE D53D8D6C793D lea r13, ptr [r25+r23*2+0x3d] +XDIS 149dc: MISC BASE D53D8D6C7A3E lea r13, ptr [r26+r23*2+0x3e] +XDIS 149e2: MISC BASE D53D8D6C7B3F lea r13, ptr [r27+r23*2+0x3f] +XDIS 149e8: MISC BASE D53D8D6C7C40 lea r13, ptr [r28+r23*2+0x40] +XDIS 149ee: MISC BASE D53D8D6C7D41 lea r13, ptr [r29+r23*2+0x41] +XDIS 149f4: MISC BASE D53D8D6C7E42 lea r13, ptr [r30+r23*2+0x42] +XDIS 149fa: MISC BASE D53D8D6C7F43 lea r13, ptr [r31+r23*2+0x43] +XDIS 14a00: MISC BASE D52E8D6C4025 lea r13, ptr [rax+r24*2+0x25] +XDIS 14a06: MISC BASE D52E8D6C4126 lea r13, ptr [rcx+r24*2+0x26] +XDIS 14a0c: MISC BASE D52E8D6C4227 lea r13, ptr [rdx+r24*2+0x27] +XDIS 14a12: MISC BASE D52E8D6C4328 lea r13, ptr [rbx+r24*2+0x28] +XDIS 14a18: MISC BASE D52E8D6C4429 lea r13, ptr [rsp+r24*2+0x29] +XDIS 14a1e: MISC BASE D52E8D6C452A lea r13, ptr [rbp+r24*2+0x2a] +XDIS 14a24: MISC BASE D52E8D6C462B lea r13, ptr [rsi+r24*2+0x2b] +XDIS 14a2a: MISC BASE D52E8D6C472C lea r13, ptr [rdi+r24*2+0x2c] +XDIS 14a30: MISC BASE D52F8D6C402D lea r13, ptr [r8+r24*2+0x2d] +XDIS 14a36: MISC BASE D52F8D6C412E lea r13, ptr [r9+r24*2+0x2e] +XDIS 14a3c: MISC BASE D52F8D6C422F lea r13, ptr [r10+r24*2+0x2f] +XDIS 14a42: MISC BASE D52F8D6C4330 lea r13, ptr [r11+r24*2+0x30] +XDIS 14a48: MISC BASE D52F8D6C4431 lea r13, ptr [r12+r24*2+0x31] +XDIS 14a4e: MISC BASE D52F8D6C4532 lea r13, ptr [r13+r24*2+0x32] +XDIS 14a54: MISC BASE D52F8D6C4633 lea r13, ptr [r14+r24*2+0x33] +XDIS 14a5a: MISC BASE D52F8D6C4734 lea r13, ptr [r15+r24*2+0x34] +XDIS 14a60: MISC BASE D53E8D6C4035 lea r13, ptr [r16+r24*2+0x35] +XDIS 14a66: MISC BASE D53E8D6C4136 lea r13, ptr [r17+r24*2+0x36] +XDIS 14a6c: MISC BASE D53E8D6C4237 lea r13, ptr [r18+r24*2+0x37] +XDIS 14a72: MISC BASE D53E8D6C4338 lea r13, ptr [r19+r24*2+0x38] +XDIS 14a78: MISC BASE D53E8D6C4439 lea r13, ptr [r20+r24*2+0x39] +XDIS 14a7e: MISC BASE D53E8D6C453A lea r13, ptr [r21+r24*2+0x3a] +XDIS 14a84: MISC BASE D53E8D6C463B lea r13, ptr [r22+r24*2+0x3b] +XDIS 14a8a: MISC BASE D53E8D6C473C lea r13, ptr [r23+r24*2+0x3c] +XDIS 14a90: MISC BASE D53F8D6C403D lea r13, ptr [r24+r24*2+0x3d] +XDIS 14a96: MISC BASE D53F8D6C413E lea r13, ptr [r25+r24*2+0x3e] +XDIS 14a9c: MISC BASE D53F8D6C423F lea r13, ptr [r26+r24*2+0x3f] +XDIS 14aa2: MISC BASE D53F8D6C4340 lea r13, ptr [r27+r24*2+0x40] +XDIS 14aa8: MISC BASE D53F8D6C4441 lea r13, ptr [r28+r24*2+0x41] +XDIS 14aae: MISC BASE D53F8D6C4542 lea r13, ptr [r29+r24*2+0x42] +XDIS 14ab4: MISC BASE D53F8D6C4643 lea r13, ptr [r30+r24*2+0x43] +XDIS 14aba: MISC BASE D53F8D6C4744 lea r13, ptr [r31+r24*2+0x44] +XDIS 14ac0: MISC BASE D52E8D6C4826 lea r13, ptr [rax+r25*2+0x26] +XDIS 14ac6: MISC BASE D52E8D6C4927 lea r13, ptr [rcx+r25*2+0x27] +XDIS 14acc: MISC BASE D52E8D6C4A28 lea r13, ptr [rdx+r25*2+0x28] +XDIS 14ad2: MISC BASE D52E8D6C4B29 lea r13, ptr [rbx+r25*2+0x29] +XDIS 14ad8: MISC BASE D52E8D6C4C2A lea r13, ptr [rsp+r25*2+0x2a] +XDIS 14ade: MISC BASE D52E8D6C4D2B lea r13, ptr [rbp+r25*2+0x2b] +XDIS 14ae4: MISC BASE D52E8D6C4E2C lea r13, ptr [rsi+r25*2+0x2c] +XDIS 14aea: MISC BASE D52E8D6C4F2D lea r13, ptr [rdi+r25*2+0x2d] +XDIS 14af0: MISC BASE D52F8D6C482E lea r13, ptr [r8+r25*2+0x2e] +XDIS 14af6: MISC BASE D52F8D6C492F lea r13, ptr [r9+r25*2+0x2f] +XDIS 14afc: MISC BASE D52F8D6C4A30 lea r13, ptr [r10+r25*2+0x30] +XDIS 14b02: MISC BASE D52F8D6C4B31 lea r13, ptr [r11+r25*2+0x31] +XDIS 14b08: MISC BASE D52F8D6C4C32 lea r13, ptr [r12+r25*2+0x32] +XDIS 14b0e: MISC BASE D52F8D6C4D33 lea r13, ptr [r13+r25*2+0x33] +XDIS 14b14: MISC BASE D52F8D6C4E34 lea r13, ptr [r14+r25*2+0x34] +XDIS 14b1a: MISC BASE D52F8D6C4F35 lea r13, ptr [r15+r25*2+0x35] +XDIS 14b20: MISC BASE D53E8D6C4836 lea r13, ptr [r16+r25*2+0x36] +XDIS 14b26: MISC BASE D53E8D6C4937 lea r13, ptr [r17+r25*2+0x37] +XDIS 14b2c: MISC BASE D53E8D6C4A38 lea r13, ptr [r18+r25*2+0x38] +XDIS 14b32: MISC BASE D53E8D6C4B39 lea r13, ptr [r19+r25*2+0x39] +XDIS 14b38: MISC BASE D53E8D6C4C3A lea r13, ptr [r20+r25*2+0x3a] +XDIS 14b3e: MISC BASE D53E8D6C4D3B lea r13, ptr [r21+r25*2+0x3b] +XDIS 14b44: MISC BASE D53E8D6C4E3C lea r13, ptr [r22+r25*2+0x3c] +XDIS 14b4a: MISC BASE D53E8D6C4F3D lea r13, ptr [r23+r25*2+0x3d] +XDIS 14b50: MISC BASE D53F8D6C483E lea r13, ptr [r24+r25*2+0x3e] +XDIS 14b56: MISC BASE D53F8D6C493F lea r13, ptr [r25+r25*2+0x3f] +XDIS 14b5c: MISC BASE D53F8D6C4A40 lea r13, ptr [r26+r25*2+0x40] +XDIS 14b62: MISC BASE D53F8D6C4B41 lea r13, ptr [r27+r25*2+0x41] +XDIS 14b68: MISC BASE D53F8D6C4C42 lea r13, ptr [r28+r25*2+0x42] +XDIS 14b6e: MISC BASE D53F8D6C4D43 lea r13, ptr [r29+r25*2+0x43] +XDIS 14b74: MISC BASE D53F8D6C4E44 lea r13, ptr [r30+r25*2+0x44] +XDIS 14b7a: MISC BASE D53F8D6C4F45 lea r13, ptr [r31+r25*2+0x45] +XDIS 14b80: MISC BASE D52E8D6C5027 lea r13, ptr [rax+r26*2+0x27] +XDIS 14b86: MISC BASE D52E8D6C5128 lea r13, ptr [rcx+r26*2+0x28] +XDIS 14b8c: MISC BASE D52E8D6C5229 lea r13, ptr [rdx+r26*2+0x29] +XDIS 14b92: MISC BASE D52E8D6C532A lea r13, ptr [rbx+r26*2+0x2a] +XDIS 14b98: MISC BASE D52E8D6C542B lea r13, ptr [rsp+r26*2+0x2b] +XDIS 14b9e: MISC BASE D52E8D6C552C lea r13, ptr [rbp+r26*2+0x2c] +XDIS 14ba4: MISC BASE D52E8D6C562D lea r13, ptr [rsi+r26*2+0x2d] +XDIS 14baa: MISC BASE D52E8D6C572E lea r13, ptr [rdi+r26*2+0x2e] +XDIS 14bb0: MISC BASE D52F8D6C502F lea r13, ptr [r8+r26*2+0x2f] +XDIS 14bb6: MISC BASE D52F8D6C5130 lea r13, ptr [r9+r26*2+0x30] +XDIS 14bbc: MISC BASE D52F8D6C5231 lea r13, ptr [r10+r26*2+0x31] +XDIS 14bc2: MISC BASE D52F8D6C5332 lea r13, ptr [r11+r26*2+0x32] +XDIS 14bc8: MISC BASE D52F8D6C5433 lea r13, ptr [r12+r26*2+0x33] +XDIS 14bce: MISC BASE D52F8D6C5534 lea r13, ptr [r13+r26*2+0x34] +XDIS 14bd4: MISC BASE D52F8D6C5635 lea r13, ptr [r14+r26*2+0x35] +XDIS 14bda: MISC BASE D52F8D6C5736 lea r13, ptr [r15+r26*2+0x36] +XDIS 14be0: MISC BASE D53E8D6C5037 lea r13, ptr [r16+r26*2+0x37] +XDIS 14be6: MISC BASE D53E8D6C5138 lea r13, ptr [r17+r26*2+0x38] +XDIS 14bec: MISC BASE D53E8D6C5239 lea r13, ptr [r18+r26*2+0x39] +XDIS 14bf2: MISC BASE D53E8D6C533A lea r13, ptr [r19+r26*2+0x3a] +XDIS 14bf8: MISC BASE D53E8D6C543B lea r13, ptr [r20+r26*2+0x3b] +XDIS 14bfe: MISC BASE D53E8D6C553C lea r13, ptr [r21+r26*2+0x3c] +XDIS 14c04: MISC BASE D53E8D6C563D lea r13, ptr [r22+r26*2+0x3d] +XDIS 14c0a: MISC BASE D53E8D6C573E lea r13, ptr [r23+r26*2+0x3e] +XDIS 14c10: MISC BASE D53F8D6C503F lea r13, ptr [r24+r26*2+0x3f] +XDIS 14c16: MISC BASE D53F8D6C5140 lea r13, ptr [r25+r26*2+0x40] +XDIS 14c1c: MISC BASE D53F8D6C5241 lea r13, ptr [r26+r26*2+0x41] +XDIS 14c22: MISC BASE D53F8D6C5342 lea r13, ptr [r27+r26*2+0x42] +XDIS 14c28: MISC BASE D53F8D6C5443 lea r13, ptr [r28+r26*2+0x43] +XDIS 14c2e: MISC BASE D53F8D6C5544 lea r13, ptr [r29+r26*2+0x44] +XDIS 14c34: MISC BASE D53F8D6C5645 lea r13, ptr [r30+r26*2+0x45] +XDIS 14c3a: MISC BASE D53F8D6C5746 lea r13, ptr [r31+r26*2+0x46] +XDIS 14c40: MISC BASE D52E8D6C5828 lea r13, ptr [rax+r27*2+0x28] +XDIS 14c46: MISC BASE D52E8D6C5929 lea r13, ptr [rcx+r27*2+0x29] +XDIS 14c4c: MISC BASE D52E8D6C5A2A lea r13, ptr [rdx+r27*2+0x2a] +XDIS 14c52: MISC BASE D52E8D6C5B2B lea r13, ptr [rbx+r27*2+0x2b] +XDIS 14c58: MISC BASE D52E8D6C5C2C lea r13, ptr [rsp+r27*2+0x2c] +XDIS 14c5e: MISC BASE D52E8D6C5D2D lea r13, ptr [rbp+r27*2+0x2d] +XDIS 14c64: MISC BASE D52E8D6C5E2E lea r13, ptr [rsi+r27*2+0x2e] +XDIS 14c6a: MISC BASE D52E8D6C5F2F lea r13, ptr [rdi+r27*2+0x2f] +XDIS 14c70: MISC BASE D52F8D6C5830 lea r13, ptr [r8+r27*2+0x30] +XDIS 14c76: MISC BASE D52F8D6C5931 lea r13, ptr [r9+r27*2+0x31] +XDIS 14c7c: MISC BASE D52F8D6C5A32 lea r13, ptr [r10+r27*2+0x32] +XDIS 14c82: MISC BASE D52F8D6C5B33 lea r13, ptr [r11+r27*2+0x33] +XDIS 14c88: MISC BASE D52F8D6C5C34 lea r13, ptr [r12+r27*2+0x34] +XDIS 14c8e: MISC BASE D52F8D6C5D35 lea r13, ptr [r13+r27*2+0x35] +XDIS 14c94: MISC BASE D52F8D6C5E36 lea r13, ptr [r14+r27*2+0x36] +XDIS 14c9a: MISC BASE D52F8D6C5F37 lea r13, ptr [r15+r27*2+0x37] +XDIS 14ca0: MISC BASE D53E8D6C5838 lea r13, ptr [r16+r27*2+0x38] +XDIS 14ca6: MISC BASE D53E8D6C5939 lea r13, ptr [r17+r27*2+0x39] +XDIS 14cac: MISC BASE D53E8D6C5A3A lea r13, ptr [r18+r27*2+0x3a] +XDIS 14cb2: MISC BASE D53E8D6C5B3B lea r13, ptr [r19+r27*2+0x3b] +XDIS 14cb8: MISC BASE D53E8D6C5C3C lea r13, ptr [r20+r27*2+0x3c] +XDIS 14cbe: MISC BASE D53E8D6C5D3D lea r13, ptr [r21+r27*2+0x3d] +XDIS 14cc4: MISC BASE D53E8D6C5E3E lea r13, ptr [r22+r27*2+0x3e] +XDIS 14cca: MISC BASE D53E8D6C5F3F lea r13, ptr [r23+r27*2+0x3f] +XDIS 14cd0: MISC BASE D53F8D6C5840 lea r13, ptr [r24+r27*2+0x40] +XDIS 14cd6: MISC BASE D53F8D6C5941 lea r13, ptr [r25+r27*2+0x41] +XDIS 14cdc: MISC BASE D53F8D6C5A42 lea r13, ptr [r26+r27*2+0x42] +XDIS 14ce2: MISC BASE D53F8D6C5B43 lea r13, ptr [r27+r27*2+0x43] +XDIS 14ce8: MISC BASE D53F8D6C5C44 lea r13, ptr [r28+r27*2+0x44] +XDIS 14cee: MISC BASE D53F8D6C5D45 lea r13, ptr [r29+r27*2+0x45] +XDIS 14cf4: MISC BASE D53F8D6C5E46 lea r13, ptr [r30+r27*2+0x46] +XDIS 14cfa: MISC BASE D53F8D6C5F47 lea r13, ptr [r31+r27*2+0x47] +XDIS 14d00: MISC BASE D52E8D6C6029 lea r13, ptr [rax+r28*2+0x29] +XDIS 14d06: MISC BASE D52E8D6C612A lea r13, ptr [rcx+r28*2+0x2a] +XDIS 14d0c: MISC BASE D52E8D6C622B lea r13, ptr [rdx+r28*2+0x2b] +XDIS 14d12: MISC BASE D52E8D6C632C lea r13, ptr [rbx+r28*2+0x2c] +XDIS 14d18: MISC BASE D52E8D6C642D lea r13, ptr [rsp+r28*2+0x2d] +XDIS 14d1e: MISC BASE D52E8D6C652E lea r13, ptr [rbp+r28*2+0x2e] +XDIS 14d24: MISC BASE D52E8D6C662F lea r13, ptr [rsi+r28*2+0x2f] +XDIS 14d2a: MISC BASE D52E8D6C6730 lea r13, ptr [rdi+r28*2+0x30] +XDIS 14d30: MISC BASE D52F8D6C6031 lea r13, ptr [r8+r28*2+0x31] +XDIS 14d36: MISC BASE D52F8D6C6132 lea r13, ptr [r9+r28*2+0x32] +XDIS 14d3c: MISC BASE D52F8D6C6233 lea r13, ptr [r10+r28*2+0x33] +XDIS 14d42: MISC BASE D52F8D6C6334 lea r13, ptr [r11+r28*2+0x34] +XDIS 14d48: MISC BASE D52F8D6C6435 lea r13, ptr [r12+r28*2+0x35] +XDIS 14d4e: MISC BASE D52F8D6C6536 lea r13, ptr [r13+r28*2+0x36] +XDIS 14d54: MISC BASE D52F8D6C6637 lea r13, ptr [r14+r28*2+0x37] +XDIS 14d5a: MISC BASE D52F8D6C6738 lea r13, ptr [r15+r28*2+0x38] +XDIS 14d60: MISC BASE D53E8D6C6039 lea r13, ptr [r16+r28*2+0x39] +XDIS 14d66: MISC BASE D53E8D6C613A lea r13, ptr [r17+r28*2+0x3a] +XDIS 14d6c: MISC BASE D53E8D6C623B lea r13, ptr [r18+r28*2+0x3b] +XDIS 14d72: MISC BASE D53E8D6C633C lea r13, ptr [r19+r28*2+0x3c] +XDIS 14d78: MISC BASE D53E8D6C643D lea r13, ptr [r20+r28*2+0x3d] +XDIS 14d7e: MISC BASE D53E8D6C653E lea r13, ptr [r21+r28*2+0x3e] +XDIS 14d84: MISC BASE D53E8D6C663F lea r13, ptr [r22+r28*2+0x3f] +XDIS 14d8a: MISC BASE D53E8D6C6740 lea r13, ptr [r23+r28*2+0x40] +XDIS 14d90: MISC BASE D53F8D6C6041 lea r13, ptr [r24+r28*2+0x41] +XDIS 14d96: MISC BASE D53F8D6C6142 lea r13, ptr [r25+r28*2+0x42] +XDIS 14d9c: MISC BASE D53F8D6C6243 lea r13, ptr [r26+r28*2+0x43] +XDIS 14da2: MISC BASE D53F8D6C6344 lea r13, ptr [r27+r28*2+0x44] +XDIS 14da8: MISC BASE D53F8D6C6445 lea r13, ptr [r28+r28*2+0x45] +XDIS 14dae: MISC BASE D53F8D6C6546 lea r13, ptr [r29+r28*2+0x46] +XDIS 14db4: MISC BASE D53F8D6C6647 lea r13, ptr [r30+r28*2+0x47] +XDIS 14dba: MISC BASE D53F8D6C6748 lea r13, ptr [r31+r28*2+0x48] +XDIS 14dc0: MISC BASE D52E8D6C682A lea r13, ptr [rax+r29*2+0x2a] +XDIS 14dc6: MISC BASE D52E8D6C692B lea r13, ptr [rcx+r29*2+0x2b] +XDIS 14dcc: MISC BASE D52E8D6C6A2C lea r13, ptr [rdx+r29*2+0x2c] +XDIS 14dd2: MISC BASE D52E8D6C6B2D lea r13, ptr [rbx+r29*2+0x2d] +XDIS 14dd8: MISC BASE D52E8D6C6C2E lea r13, ptr [rsp+r29*2+0x2e] +XDIS 14dde: MISC BASE D52E8D6C6D2F lea r13, ptr [rbp+r29*2+0x2f] +XDIS 14de4: MISC BASE D52E8D6C6E30 lea r13, ptr [rsi+r29*2+0x30] +XDIS 14dea: MISC BASE D52E8D6C6F31 lea r13, ptr [rdi+r29*2+0x31] +XDIS 14df0: MISC BASE D52F8D6C6832 lea r13, ptr [r8+r29*2+0x32] +XDIS 14df6: MISC BASE D52F8D6C6933 lea r13, ptr [r9+r29*2+0x33] +XDIS 14dfc: MISC BASE D52F8D6C6A34 lea r13, ptr [r10+r29*2+0x34] +XDIS 14e02: MISC BASE D52F8D6C6B35 lea r13, ptr [r11+r29*2+0x35] +XDIS 14e08: MISC BASE D52F8D6C6C36 lea r13, ptr [r12+r29*2+0x36] +XDIS 14e0e: MISC BASE D52F8D6C6D37 lea r13, ptr [r13+r29*2+0x37] +XDIS 14e14: MISC BASE D52F8D6C6E38 lea r13, ptr [r14+r29*2+0x38] +XDIS 14e1a: MISC BASE D52F8D6C6F39 lea r13, ptr [r15+r29*2+0x39] +XDIS 14e20: MISC BASE D53E8D6C683A lea r13, ptr [r16+r29*2+0x3a] +XDIS 14e26: MISC BASE D53E8D6C693B lea r13, ptr [r17+r29*2+0x3b] +XDIS 14e2c: MISC BASE D53E8D6C6A3C lea r13, ptr [r18+r29*2+0x3c] +XDIS 14e32: MISC BASE D53E8D6C6B3D lea r13, ptr [r19+r29*2+0x3d] +XDIS 14e38: MISC BASE D53E8D6C6C3E lea r13, ptr [r20+r29*2+0x3e] +XDIS 14e3e: MISC BASE D53E8D6C6D3F lea r13, ptr [r21+r29*2+0x3f] +XDIS 14e44: MISC BASE D53E8D6C6E40 lea r13, ptr [r22+r29*2+0x40] +XDIS 14e4a: MISC BASE D53E8D6C6F41 lea r13, ptr [r23+r29*2+0x41] +XDIS 14e50: MISC BASE D53F8D6C6842 lea r13, ptr [r24+r29*2+0x42] +XDIS 14e56: MISC BASE D53F8D6C6943 lea r13, ptr [r25+r29*2+0x43] +XDIS 14e5c: MISC BASE D53F8D6C6A44 lea r13, ptr [r26+r29*2+0x44] +XDIS 14e62: MISC BASE D53F8D6C6B45 lea r13, ptr [r27+r29*2+0x45] +XDIS 14e68: MISC BASE D53F8D6C6C46 lea r13, ptr [r28+r29*2+0x46] +XDIS 14e6e: MISC BASE D53F8D6C6D47 lea r13, ptr [r29+r29*2+0x47] +XDIS 14e74: MISC BASE D53F8D6C6E48 lea r13, ptr [r30+r29*2+0x48] +XDIS 14e7a: MISC BASE D53F8D6C6F49 lea r13, ptr [r31+r29*2+0x49] +XDIS 14e80: MISC BASE D52E8D6C702B lea r13, ptr [rax+r30*2+0x2b] +XDIS 14e86: MISC BASE D52E8D6C712C lea r13, ptr [rcx+r30*2+0x2c] +XDIS 14e8c: MISC BASE D52E8D6C722D lea r13, ptr [rdx+r30*2+0x2d] +XDIS 14e92: MISC BASE D52E8D6C732E lea r13, ptr [rbx+r30*2+0x2e] +XDIS 14e98: MISC BASE D52E8D6C742F lea r13, ptr [rsp+r30*2+0x2f] +XDIS 14e9e: MISC BASE D52E8D6C7530 lea r13, ptr [rbp+r30*2+0x30] +XDIS 14ea4: MISC BASE D52E8D6C7631 lea r13, ptr [rsi+r30*2+0x31] +XDIS 14eaa: MISC BASE D52E8D6C7732 lea r13, ptr [rdi+r30*2+0x32] +XDIS 14eb0: MISC BASE D52F8D6C7033 lea r13, ptr [r8+r30*2+0x33] +XDIS 14eb6: MISC BASE D52F8D6C7134 lea r13, ptr [r9+r30*2+0x34] +XDIS 14ebc: MISC BASE D52F8D6C7235 lea r13, ptr [r10+r30*2+0x35] +XDIS 14ec2: MISC BASE D52F8D6C7336 lea r13, ptr [r11+r30*2+0x36] +XDIS 14ec8: MISC BASE D52F8D6C7437 lea r13, ptr [r12+r30*2+0x37] +XDIS 14ece: MISC BASE D52F8D6C7538 lea r13, ptr [r13+r30*2+0x38] +XDIS 14ed4: MISC BASE D52F8D6C7639 lea r13, ptr [r14+r30*2+0x39] +XDIS 14eda: MISC BASE D52F8D6C773A lea r13, ptr [r15+r30*2+0x3a] +XDIS 14ee0: MISC BASE D53E8D6C703B lea r13, ptr [r16+r30*2+0x3b] +XDIS 14ee6: MISC BASE D53E8D6C713C lea r13, ptr [r17+r30*2+0x3c] +XDIS 14eec: MISC BASE D53E8D6C723D lea r13, ptr [r18+r30*2+0x3d] +XDIS 14ef2: MISC BASE D53E8D6C733E lea r13, ptr [r19+r30*2+0x3e] +XDIS 14ef8: MISC BASE D53E8D6C743F lea r13, ptr [r20+r30*2+0x3f] +XDIS 14efe: MISC BASE D53E8D6C7540 lea r13, ptr [r21+r30*2+0x40] +XDIS 14f04: MISC BASE D53E8D6C7641 lea r13, ptr [r22+r30*2+0x41] +XDIS 14f0a: MISC BASE D53E8D6C7742 lea r13, ptr [r23+r30*2+0x42] +XDIS 14f10: MISC BASE D53F8D6C7043 lea r13, ptr [r24+r30*2+0x43] +XDIS 14f16: MISC BASE D53F8D6C7144 lea r13, ptr [r25+r30*2+0x44] +XDIS 14f1c: MISC BASE D53F8D6C7245 lea r13, ptr [r26+r30*2+0x45] +XDIS 14f22: MISC BASE D53F8D6C7346 lea r13, ptr [r27+r30*2+0x46] +XDIS 14f28: MISC BASE D53F8D6C7447 lea r13, ptr [r28+r30*2+0x47] +XDIS 14f2e: MISC BASE D53F8D6C7548 lea r13, ptr [r29+r30*2+0x48] +XDIS 14f34: MISC BASE D53F8D6C7649 lea r13, ptr [r30+r30*2+0x49] +XDIS 14f3a: MISC BASE D53F8D6C774A lea r13, ptr [r31+r30*2+0x4a] +XDIS 14f40: MISC BASE D52E8D6C782C lea r13, ptr [rax+r31*2+0x2c] +XDIS 14f46: MISC BASE D52E8D6C792D lea r13, ptr [rcx+r31*2+0x2d] +XDIS 14f4c: MISC BASE D52E8D6C7A2E lea r13, ptr [rdx+r31*2+0x2e] +XDIS 14f52: MISC BASE D52E8D6C7B2F lea r13, ptr [rbx+r31*2+0x2f] +XDIS 14f58: MISC BASE D52E8D6C7C30 lea r13, ptr [rsp+r31*2+0x30] +XDIS 14f5e: MISC BASE D52E8D6C7D31 lea r13, ptr [rbp+r31*2+0x31] +XDIS 14f64: MISC BASE D52E8D6C7E32 lea r13, ptr [rsi+r31*2+0x32] +XDIS 14f6a: MISC BASE D52E8D6C7F33 lea r13, ptr [rdi+r31*2+0x33] +XDIS 14f70: MISC BASE D52F8D6C7834 lea r13, ptr [r8+r31*2+0x34] +XDIS 14f76: MISC BASE D52F8D6C7935 lea r13, ptr [r9+r31*2+0x35] +XDIS 14f7c: MISC BASE D52F8D6C7A36 lea r13, ptr [r10+r31*2+0x36] +XDIS 14f82: MISC BASE D52F8D6C7B37 lea r13, ptr [r11+r31*2+0x37] +XDIS 14f88: MISC BASE D52F8D6C7C38 lea r13, ptr [r12+r31*2+0x38] +XDIS 14f8e: MISC BASE D52F8D6C7D39 lea r13, ptr [r13+r31*2+0x39] +XDIS 14f94: MISC BASE D52F8D6C7E3A lea r13, ptr [r14+r31*2+0x3a] +XDIS 14f9a: MISC BASE D52F8D6C7F3B lea r13, ptr [r15+r31*2+0x3b] +XDIS 14fa0: MISC BASE D53E8D6C783C lea r13, ptr [r16+r31*2+0x3c] +XDIS 14fa6: MISC BASE D53E8D6C793D lea r13, ptr [r17+r31*2+0x3d] +XDIS 14fac: MISC BASE D53E8D6C7A3E lea r13, ptr [r18+r31*2+0x3e] +XDIS 14fb2: MISC BASE D53E8D6C7B3F lea r13, ptr [r19+r31*2+0x3f] +XDIS 14fb8: MISC BASE D53E8D6C7C40 lea r13, ptr [r20+r31*2+0x40] +XDIS 14fbe: MISC BASE D53E8D6C7D41 lea r13, ptr [r21+r31*2+0x41] +XDIS 14fc4: MISC BASE D53E8D6C7E42 lea r13, ptr [r22+r31*2+0x42] +XDIS 14fca: MISC BASE D53E8D6C7F43 lea r13, ptr [r23+r31*2+0x43] +XDIS 14fd0: MISC BASE D53F8D6C7844 lea r13, ptr [r24+r31*2+0x44] +XDIS 14fd6: MISC BASE D53F8D6C7945 lea r13, ptr [r25+r31*2+0x45] +XDIS 14fdc: MISC BASE D53F8D6C7A46 lea r13, ptr [r26+r31*2+0x46] +XDIS 14fe2: MISC BASE D53F8D6C7B47 lea r13, ptr [r27+r31*2+0x47] +XDIS 14fe8: MISC BASE D53F8D6C7C48 lea r13, ptr [r28+r31*2+0x48] +XDIS 14fee: MISC BASE D53F8D6C7D49 lea r13, ptr [r29+r31*2+0x49] +XDIS 14ff4: MISC BASE D53F8D6C7E4A lea r13, ptr [r30+r31*2+0x4a] +XDIS 14ffa: MISC BASE D53F8D6C7F4B lea r13, ptr [r31+r31*2+0x4b] +XDIS 15000: MISC BASE D50C8D74400E lea r14, ptr [rax+rax*2+0xe] +XDIS 15006: MISC BASE D50C8D74410F lea r14, ptr [rcx+rax*2+0xf] +XDIS 1500c: MISC BASE D50C8D744210 lea r14, ptr [rdx+rax*2+0x10] +XDIS 15012: MISC BASE D50C8D744311 lea r14, ptr [rbx+rax*2+0x11] +XDIS 15018: MISC BASE D50C8D744412 lea r14, ptr [rsp+rax*2+0x12] +XDIS 1501e: MISC BASE D50C8D744513 lea r14, ptr [rbp+rax*2+0x13] +XDIS 15024: MISC BASE D50C8D744614 lea r14, ptr [rsi+rax*2+0x14] +XDIS 1502a: MISC BASE D50C8D744715 lea r14, ptr [rdi+rax*2+0x15] +XDIS 15030: MISC BASE D50D8D744016 lea r14, ptr [r8+rax*2+0x16] +XDIS 15036: MISC BASE D50D8D744117 lea r14, ptr [r9+rax*2+0x17] +XDIS 1503c: MISC BASE D50D8D744218 lea r14, ptr [r10+rax*2+0x18] +XDIS 15042: MISC BASE D50D8D744319 lea r14, ptr [r11+rax*2+0x19] +XDIS 15048: MISC BASE D50D8D74441A lea r14, ptr [r12+rax*2+0x1a] +XDIS 1504e: MISC BASE D50D8D74451B lea r14, ptr [r13+rax*2+0x1b] +XDIS 15054: MISC BASE D50D8D74461C lea r14, ptr [r14+rax*2+0x1c] +XDIS 1505a: MISC BASE D50D8D74471D lea r14, ptr [r15+rax*2+0x1d] +XDIS 15060: MISC BASE D51C8D74401E lea r14, ptr [r16+rax*2+0x1e] +XDIS 15066: MISC BASE D51C8D74411F lea r14, ptr [r17+rax*2+0x1f] +XDIS 1506c: MISC BASE D51C8D744220 lea r14, ptr [r18+rax*2+0x20] +XDIS 15072: MISC BASE D51C8D744321 lea r14, ptr [r19+rax*2+0x21] +XDIS 15078: MISC BASE D51C8D744422 lea r14, ptr [r20+rax*2+0x22] +XDIS 1507e: MISC BASE D51C8D744523 lea r14, ptr [r21+rax*2+0x23] +XDIS 15084: MISC BASE D51C8D744624 lea r14, ptr [r22+rax*2+0x24] +XDIS 1508a: MISC BASE D51C8D744725 lea r14, ptr [r23+rax*2+0x25] +XDIS 15090: MISC BASE D51D8D744026 lea r14, ptr [r24+rax*2+0x26] +XDIS 15096: MISC BASE D51D8D744127 lea r14, ptr [r25+rax*2+0x27] +XDIS 1509c: MISC BASE D51D8D744228 lea r14, ptr [r26+rax*2+0x28] +XDIS 150a2: MISC BASE D51D8D744329 lea r14, ptr [r27+rax*2+0x29] +XDIS 150a8: MISC BASE D51D8D74442A lea r14, ptr [r28+rax*2+0x2a] +XDIS 150ae: MISC BASE D51D8D74452B lea r14, ptr [r29+rax*2+0x2b] +XDIS 150b4: MISC BASE D51D8D74462C lea r14, ptr [r30+rax*2+0x2c] +XDIS 150ba: MISC BASE D51D8D74472D lea r14, ptr [r31+rax*2+0x2d] +XDIS 150c0: MISC BASE D50C8D74480F lea r14, ptr [rax+rcx*2+0xf] +XDIS 150c6: MISC BASE D50C8D744910 lea r14, ptr [rcx+rcx*2+0x10] +XDIS 150cc: MISC BASE D50C8D744A11 lea r14, ptr [rdx+rcx*2+0x11] +XDIS 150d2: MISC BASE D50C8D744B12 lea r14, ptr [rbx+rcx*2+0x12] +XDIS 150d8: MISC BASE D50C8D744C13 lea r14, ptr [rsp+rcx*2+0x13] +XDIS 150de: MISC BASE D50C8D744D14 lea r14, ptr [rbp+rcx*2+0x14] +XDIS 150e4: MISC BASE D50C8D744E15 lea r14, ptr [rsi+rcx*2+0x15] +XDIS 150ea: MISC BASE D50C8D744F16 lea r14, ptr [rdi+rcx*2+0x16] +XDIS 150f0: MISC BASE D50D8D744817 lea r14, ptr [r8+rcx*2+0x17] +XDIS 150f6: MISC BASE D50D8D744918 lea r14, ptr [r9+rcx*2+0x18] +XDIS 150fc: MISC BASE D50D8D744A19 lea r14, ptr [r10+rcx*2+0x19] +XDIS 15102: MISC BASE D50D8D744B1A lea r14, ptr [r11+rcx*2+0x1a] +XDIS 15108: MISC BASE D50D8D744C1B lea r14, ptr [r12+rcx*2+0x1b] +XDIS 1510e: MISC BASE D50D8D744D1C lea r14, ptr [r13+rcx*2+0x1c] +XDIS 15114: MISC BASE D50D8D744E1D lea r14, ptr [r14+rcx*2+0x1d] +XDIS 1511a: MISC BASE D50D8D744F1E lea r14, ptr [r15+rcx*2+0x1e] +XDIS 15120: MISC BASE D51C8D74481F lea r14, ptr [r16+rcx*2+0x1f] +XDIS 15126: MISC BASE D51C8D744920 lea r14, ptr [r17+rcx*2+0x20] +XDIS 1512c: MISC BASE D51C8D744A21 lea r14, ptr [r18+rcx*2+0x21] +XDIS 15132: MISC BASE D51C8D744B22 lea r14, ptr [r19+rcx*2+0x22] +XDIS 15138: MISC BASE D51C8D744C23 lea r14, ptr [r20+rcx*2+0x23] +XDIS 1513e: MISC BASE D51C8D744D24 lea r14, ptr [r21+rcx*2+0x24] +XDIS 15144: MISC BASE D51C8D744E25 lea r14, ptr [r22+rcx*2+0x25] +XDIS 1514a: MISC BASE D51C8D744F26 lea r14, ptr [r23+rcx*2+0x26] +XDIS 15150: MISC BASE D51D8D744827 lea r14, ptr [r24+rcx*2+0x27] +XDIS 15156: MISC BASE D51D8D744928 lea r14, ptr [r25+rcx*2+0x28] +XDIS 1515c: MISC BASE D51D8D744A29 lea r14, ptr [r26+rcx*2+0x29] +XDIS 15162: MISC BASE D51D8D744B2A lea r14, ptr [r27+rcx*2+0x2a] +XDIS 15168: MISC BASE D51D8D744C2B lea r14, ptr [r28+rcx*2+0x2b] +XDIS 1516e: MISC BASE D51D8D744D2C lea r14, ptr [r29+rcx*2+0x2c] +XDIS 15174: MISC BASE D51D8D744E2D lea r14, ptr [r30+rcx*2+0x2d] +XDIS 1517a: MISC BASE D51D8D744F2E lea r14, ptr [r31+rcx*2+0x2e] +XDIS 15180: MISC BASE D50C8D745010 lea r14, ptr [rax+rdx*2+0x10] +XDIS 15186: MISC BASE D50C8D745111 lea r14, ptr [rcx+rdx*2+0x11] +XDIS 1518c: MISC BASE D50C8D745212 lea r14, ptr [rdx+rdx*2+0x12] +XDIS 15192: MISC BASE D50C8D745313 lea r14, ptr [rbx+rdx*2+0x13] +XDIS 15198: MISC BASE D50C8D745414 lea r14, ptr [rsp+rdx*2+0x14] +XDIS 1519e: MISC BASE D50C8D745515 lea r14, ptr [rbp+rdx*2+0x15] +XDIS 151a4: MISC BASE D50C8D745616 lea r14, ptr [rsi+rdx*2+0x16] +XDIS 151aa: MISC BASE D50C8D745717 lea r14, ptr [rdi+rdx*2+0x17] +XDIS 151b0: MISC BASE D50D8D745018 lea r14, ptr [r8+rdx*2+0x18] +XDIS 151b6: MISC BASE D50D8D745119 lea r14, ptr [r9+rdx*2+0x19] +XDIS 151bc: MISC BASE D50D8D74521A lea r14, ptr [r10+rdx*2+0x1a] +XDIS 151c2: MISC BASE D50D8D74531B lea r14, ptr [r11+rdx*2+0x1b] +XDIS 151c8: MISC BASE D50D8D74541C lea r14, ptr [r12+rdx*2+0x1c] +XDIS 151ce: MISC BASE D50D8D74551D lea r14, ptr [r13+rdx*2+0x1d] +XDIS 151d4: MISC BASE D50D8D74561E lea r14, ptr [r14+rdx*2+0x1e] +XDIS 151da: MISC BASE D50D8D74571F lea r14, ptr [r15+rdx*2+0x1f] +XDIS 151e0: MISC BASE D51C8D745020 lea r14, ptr [r16+rdx*2+0x20] +XDIS 151e6: MISC BASE D51C8D745121 lea r14, ptr [r17+rdx*2+0x21] +XDIS 151ec: MISC BASE D51C8D745222 lea r14, ptr [r18+rdx*2+0x22] +XDIS 151f2: MISC BASE D51C8D745323 lea r14, ptr [r19+rdx*2+0x23] +XDIS 151f8: MISC BASE D51C8D745424 lea r14, ptr [r20+rdx*2+0x24] +XDIS 151fe: MISC BASE D51C8D745525 lea r14, ptr [r21+rdx*2+0x25] +XDIS 15204: MISC BASE D51C8D745626 lea r14, ptr [r22+rdx*2+0x26] +XDIS 1520a: MISC BASE D51C8D745727 lea r14, ptr [r23+rdx*2+0x27] +XDIS 15210: MISC BASE D51D8D745028 lea r14, ptr [r24+rdx*2+0x28] +XDIS 15216: MISC BASE D51D8D745129 lea r14, ptr [r25+rdx*2+0x29] +XDIS 1521c: MISC BASE D51D8D74522A lea r14, ptr [r26+rdx*2+0x2a] +XDIS 15222: MISC BASE D51D8D74532B lea r14, ptr [r27+rdx*2+0x2b] +XDIS 15228: MISC BASE D51D8D74542C lea r14, ptr [r28+rdx*2+0x2c] +XDIS 1522e: MISC BASE D51D8D74552D lea r14, ptr [r29+rdx*2+0x2d] +XDIS 15234: MISC BASE D51D8D74562E lea r14, ptr [r30+rdx*2+0x2e] +XDIS 1523a: MISC BASE D51D8D74572F lea r14, ptr [r31+rdx*2+0x2f] +XDIS 15240: MISC BASE D50C8D745811 lea r14, ptr [rax+rbx*2+0x11] +XDIS 15246: MISC BASE D50C8D745912 lea r14, ptr [rcx+rbx*2+0x12] +XDIS 1524c: MISC BASE D50C8D745A13 lea r14, ptr [rdx+rbx*2+0x13] +XDIS 15252: MISC BASE D50C8D745B14 lea r14, ptr [rbx+rbx*2+0x14] +XDIS 15258: MISC BASE D50C8D745C15 lea r14, ptr [rsp+rbx*2+0x15] +XDIS 1525e: MISC BASE D50C8D745D16 lea r14, ptr [rbp+rbx*2+0x16] +XDIS 15264: MISC BASE D50C8D745E17 lea r14, ptr [rsi+rbx*2+0x17] +XDIS 1526a: MISC BASE D50C8D745F18 lea r14, ptr [rdi+rbx*2+0x18] +XDIS 15270: MISC BASE D50D8D745819 lea r14, ptr [r8+rbx*2+0x19] +XDIS 15276: MISC BASE D50D8D74591A lea r14, ptr [r9+rbx*2+0x1a] +XDIS 1527c: MISC BASE D50D8D745A1B lea r14, ptr [r10+rbx*2+0x1b] +XDIS 15282: MISC BASE D50D8D745B1C lea r14, ptr [r11+rbx*2+0x1c] +XDIS 15288: MISC BASE D50D8D745C1D lea r14, ptr [r12+rbx*2+0x1d] +XDIS 1528e: MISC BASE D50D8D745D1E lea r14, ptr [r13+rbx*2+0x1e] +XDIS 15294: MISC BASE D50D8D745E1F lea r14, ptr [r14+rbx*2+0x1f] +XDIS 1529a: MISC BASE D50D8D745F20 lea r14, ptr [r15+rbx*2+0x20] +XDIS 152a0: MISC BASE D51C8D745821 lea r14, ptr [r16+rbx*2+0x21] +XDIS 152a6: MISC BASE D51C8D745922 lea r14, ptr [r17+rbx*2+0x22] +XDIS 152ac: MISC BASE D51C8D745A23 lea r14, ptr [r18+rbx*2+0x23] +XDIS 152b2: MISC BASE D51C8D745B24 lea r14, ptr [r19+rbx*2+0x24] +XDIS 152b8: MISC BASE D51C8D745C25 lea r14, ptr [r20+rbx*2+0x25] +XDIS 152be: MISC BASE D51C8D745D26 lea r14, ptr [r21+rbx*2+0x26] +XDIS 152c4: MISC BASE D51C8D745E27 lea r14, ptr [r22+rbx*2+0x27] +XDIS 152ca: MISC BASE D51C8D745F28 lea r14, ptr [r23+rbx*2+0x28] +XDIS 152d0: MISC BASE D51D8D745829 lea r14, ptr [r24+rbx*2+0x29] +XDIS 152d6: MISC BASE D51D8D74592A lea r14, ptr [r25+rbx*2+0x2a] +XDIS 152dc: MISC BASE D51D8D745A2B lea r14, ptr [r26+rbx*2+0x2b] +XDIS 152e2: MISC BASE D51D8D745B2C lea r14, ptr [r27+rbx*2+0x2c] +XDIS 152e8: MISC BASE D51D8D745C2D lea r14, ptr [r28+rbx*2+0x2d] +XDIS 152ee: MISC BASE D51D8D745D2E lea r14, ptr [r29+rbx*2+0x2e] +XDIS 152f4: MISC BASE D51D8D745E2F lea r14, ptr [r30+rbx*2+0x2f] +XDIS 152fa: MISC BASE D51D8D745F30 lea r14, ptr [r31+rbx*2+0x30] +XDIS 15300: MISC BASE D50C8D746012 lea r14, ptr [rax+0x12] +XDIS 15306: MISC BASE D50C8D746113 lea r14, ptr [rcx+0x13] +XDIS 1530c: MISC BASE D50C8D746214 lea r14, ptr [rdx+0x14] +XDIS 15312: MISC BASE D50C8D746315 lea r14, ptr [rbx+0x15] +XDIS 15318: MISC BASE D50C8D746416 lea r14, ptr [rsp+0x16] +XDIS 1531e: MISC BASE D50C8D746517 lea r14, ptr [rbp+0x17] +XDIS 15324: MISC BASE D50C8D746618 lea r14, ptr [rsi+0x18] +XDIS 1532a: MISC BASE D50C8D746719 lea r14, ptr [rdi+0x19] +XDIS 15330: MISC BASE D50D8D74601A lea r14, ptr [r8+0x1a] +XDIS 15336: MISC BASE D50D8D74611B lea r14, ptr [r9+0x1b] +XDIS 1533c: MISC BASE D50D8D74621C lea r14, ptr [r10+0x1c] +XDIS 15342: MISC BASE D50D8D74631D lea r14, ptr [r11+0x1d] +XDIS 15348: MISC BASE D50D8D74641E lea r14, ptr [r12+0x1e] +XDIS 1534e: MISC BASE D50D8D74651F lea r14, ptr [r13+0x1f] +XDIS 15354: MISC BASE D50D8D746620 lea r14, ptr [r14+0x20] +XDIS 1535a: MISC BASE D50D8D746721 lea r14, ptr [r15+0x21] +XDIS 15360: MISC BASE D51C8D746022 lea r14, ptr [r16+0x22] +XDIS 15366: MISC BASE D51C8D746123 lea r14, ptr [r17+0x23] +XDIS 1536c: MISC BASE D51C8D746224 lea r14, ptr [r18+0x24] +XDIS 15372: MISC BASE D51C8D746325 lea r14, ptr [r19+0x25] +XDIS 15378: MISC BASE D51C8D746426 lea r14, ptr [r20+0x26] +XDIS 1537e: MISC BASE D51C8D746527 lea r14, ptr [r21+0x27] +XDIS 15384: MISC BASE D51C8D746628 lea r14, ptr [r22+0x28] +XDIS 1538a: MISC BASE D51C8D746729 lea r14, ptr [r23+0x29] +XDIS 15390: MISC BASE D51D8D74602A lea r14, ptr [r24+0x2a] +XDIS 15396: MISC BASE D51D8D74612B lea r14, ptr [r25+0x2b] +XDIS 1539c: MISC BASE D51D8D74622C lea r14, ptr [r26+0x2c] +XDIS 153a2: MISC BASE D51D8D74632D lea r14, ptr [r27+0x2d] +XDIS 153a8: MISC BASE D51D8D74642E lea r14, ptr [r28+0x2e] +XDIS 153ae: MISC BASE D51D8D74652F lea r14, ptr [r29+0x2f] +XDIS 153b4: MISC BASE D51D8D746630 lea r14, ptr [r30+0x30] +XDIS 153ba: MISC BASE D51D8D746731 lea r14, ptr [r31+0x31] +XDIS 153c0: MISC BASE D50C8D746813 lea r14, ptr [rax+rbp*2+0x13] +XDIS 153c6: MISC BASE D50C8D746914 lea r14, ptr [rcx+rbp*2+0x14] +XDIS 153cc: MISC BASE D50C8D746A15 lea r14, ptr [rdx+rbp*2+0x15] +XDIS 153d2: MISC BASE D50C8D746B16 lea r14, ptr [rbx+rbp*2+0x16] +XDIS 153d8: MISC BASE D50C8D746C17 lea r14, ptr [rsp+rbp*2+0x17] +XDIS 153de: MISC BASE D50C8D746D18 lea r14, ptr [rbp+rbp*2+0x18] +XDIS 153e4: MISC BASE D50C8D746E19 lea r14, ptr [rsi+rbp*2+0x19] +XDIS 153ea: MISC BASE D50C8D746F1A lea r14, ptr [rdi+rbp*2+0x1a] +XDIS 153f0: MISC BASE D50D8D74681B lea r14, ptr [r8+rbp*2+0x1b] +XDIS 153f6: MISC BASE D50D8D74691C lea r14, ptr [r9+rbp*2+0x1c] +XDIS 153fc: MISC BASE D50D8D746A1D lea r14, ptr [r10+rbp*2+0x1d] +XDIS 15402: MISC BASE D50D8D746B1E lea r14, ptr [r11+rbp*2+0x1e] +XDIS 15408: MISC BASE D50D8D746C1F lea r14, ptr [r12+rbp*2+0x1f] +XDIS 1540e: MISC BASE D50D8D746D20 lea r14, ptr [r13+rbp*2+0x20] +XDIS 15414: MISC BASE D50D8D746E21 lea r14, ptr [r14+rbp*2+0x21] +XDIS 1541a: MISC BASE D50D8D746F22 lea r14, ptr [r15+rbp*2+0x22] +XDIS 15420: MISC BASE D51C8D746823 lea r14, ptr [r16+rbp*2+0x23] +XDIS 15426: MISC BASE D51C8D746924 lea r14, ptr [r17+rbp*2+0x24] +XDIS 1542c: MISC BASE D51C8D746A25 lea r14, ptr [r18+rbp*2+0x25] +XDIS 15432: MISC BASE D51C8D746B26 lea r14, ptr [r19+rbp*2+0x26] +XDIS 15438: MISC BASE D51C8D746C27 lea r14, ptr [r20+rbp*2+0x27] +XDIS 1543e: MISC BASE D51C8D746D28 lea r14, ptr [r21+rbp*2+0x28] +XDIS 15444: MISC BASE D51C8D746E29 lea r14, ptr [r22+rbp*2+0x29] +XDIS 1544a: MISC BASE D51C8D746F2A lea r14, ptr [r23+rbp*2+0x2a] +XDIS 15450: MISC BASE D51D8D74682B lea r14, ptr [r24+rbp*2+0x2b] +XDIS 15456: MISC BASE D51D8D74692C lea r14, ptr [r25+rbp*2+0x2c] +XDIS 1545c: MISC BASE D51D8D746A2D lea r14, ptr [r26+rbp*2+0x2d] +XDIS 15462: MISC BASE D51D8D746B2E lea r14, ptr [r27+rbp*2+0x2e] +XDIS 15468: MISC BASE D51D8D746C2F lea r14, ptr [r28+rbp*2+0x2f] +XDIS 1546e: MISC BASE D51D8D746D30 lea r14, ptr [r29+rbp*2+0x30] +XDIS 15474: MISC BASE D51D8D746E31 lea r14, ptr [r30+rbp*2+0x31] +XDIS 1547a: MISC BASE D51D8D746F32 lea r14, ptr [r31+rbp*2+0x32] +XDIS 15480: MISC BASE D50C8D747014 lea r14, ptr [rax+rsi*2+0x14] +XDIS 15486: MISC BASE D50C8D747115 lea r14, ptr [rcx+rsi*2+0x15] +XDIS 1548c: MISC BASE D50C8D747216 lea r14, ptr [rdx+rsi*2+0x16] +XDIS 15492: MISC BASE D50C8D747317 lea r14, ptr [rbx+rsi*2+0x17] +XDIS 15498: MISC BASE D50C8D747418 lea r14, ptr [rsp+rsi*2+0x18] +XDIS 1549e: MISC BASE D50C8D747519 lea r14, ptr [rbp+rsi*2+0x19] +XDIS 154a4: MISC BASE D50C8D74761A lea r14, ptr [rsi+rsi*2+0x1a] +XDIS 154aa: MISC BASE D50C8D74771B lea r14, ptr [rdi+rsi*2+0x1b] +XDIS 154b0: MISC BASE D50D8D74701C lea r14, ptr [r8+rsi*2+0x1c] +XDIS 154b6: MISC BASE D50D8D74711D lea r14, ptr [r9+rsi*2+0x1d] +XDIS 154bc: MISC BASE D50D8D74721E lea r14, ptr [r10+rsi*2+0x1e] +XDIS 154c2: MISC BASE D50D8D74731F lea r14, ptr [r11+rsi*2+0x1f] +XDIS 154c8: MISC BASE D50D8D747420 lea r14, ptr [r12+rsi*2+0x20] +XDIS 154ce: MISC BASE D50D8D747521 lea r14, ptr [r13+rsi*2+0x21] +XDIS 154d4: MISC BASE D50D8D747622 lea r14, ptr [r14+rsi*2+0x22] +XDIS 154da: MISC BASE D50D8D747723 lea r14, ptr [r15+rsi*2+0x23] +XDIS 154e0: MISC BASE D51C8D747024 lea r14, ptr [r16+rsi*2+0x24] +XDIS 154e6: MISC BASE D51C8D747125 lea r14, ptr [r17+rsi*2+0x25] +XDIS 154ec: MISC BASE D51C8D747226 lea r14, ptr [r18+rsi*2+0x26] +XDIS 154f2: MISC BASE D51C8D747327 lea r14, ptr [r19+rsi*2+0x27] +XDIS 154f8: MISC BASE D51C8D747428 lea r14, ptr [r20+rsi*2+0x28] +XDIS 154fe: MISC BASE D51C8D747529 lea r14, ptr [r21+rsi*2+0x29] +XDIS 15504: MISC BASE D51C8D74762A lea r14, ptr [r22+rsi*2+0x2a] +XDIS 1550a: MISC BASE D51C8D74772B lea r14, ptr [r23+rsi*2+0x2b] +XDIS 15510: MISC BASE D51D8D74702C lea r14, ptr [r24+rsi*2+0x2c] +XDIS 15516: MISC BASE D51D8D74712D lea r14, ptr [r25+rsi*2+0x2d] +XDIS 1551c: MISC BASE D51D8D74722E lea r14, ptr [r26+rsi*2+0x2e] +XDIS 15522: MISC BASE D51D8D74732F lea r14, ptr [r27+rsi*2+0x2f] +XDIS 15528: MISC BASE D51D8D747430 lea r14, ptr [r28+rsi*2+0x30] +XDIS 1552e: MISC BASE D51D8D747531 lea r14, ptr [r29+rsi*2+0x31] +XDIS 15534: MISC BASE D51D8D747632 lea r14, ptr [r30+rsi*2+0x32] +XDIS 1553a: MISC BASE D51D8D747733 lea r14, ptr [r31+rsi*2+0x33] +XDIS 15540: MISC BASE D50C8D747815 lea r14, ptr [rax+rdi*2+0x15] +XDIS 15546: MISC BASE D50C8D747916 lea r14, ptr [rcx+rdi*2+0x16] +XDIS 1554c: MISC BASE D50C8D747A17 lea r14, ptr [rdx+rdi*2+0x17] +XDIS 15552: MISC BASE D50C8D747B18 lea r14, ptr [rbx+rdi*2+0x18] +XDIS 15558: MISC BASE D50C8D747C19 lea r14, ptr [rsp+rdi*2+0x19] +XDIS 1555e: MISC BASE D50C8D747D1A lea r14, ptr [rbp+rdi*2+0x1a] +XDIS 15564: MISC BASE D50C8D747E1B lea r14, ptr [rsi+rdi*2+0x1b] +XDIS 1556a: MISC BASE D50C8D747F1C lea r14, ptr [rdi+rdi*2+0x1c] +XDIS 15570: MISC BASE D50D8D74781D lea r14, ptr [r8+rdi*2+0x1d] +XDIS 15576: MISC BASE D50D8D74791E lea r14, ptr [r9+rdi*2+0x1e] +XDIS 1557c: MISC BASE D50D8D747A1F lea r14, ptr [r10+rdi*2+0x1f] +XDIS 15582: MISC BASE D50D8D747B20 lea r14, ptr [r11+rdi*2+0x20] +XDIS 15588: MISC BASE D50D8D747C21 lea r14, ptr [r12+rdi*2+0x21] +XDIS 1558e: MISC BASE D50D8D747D22 lea r14, ptr [r13+rdi*2+0x22] +XDIS 15594: MISC BASE D50D8D747E23 lea r14, ptr [r14+rdi*2+0x23] +XDIS 1559a: MISC BASE D50D8D747F24 lea r14, ptr [r15+rdi*2+0x24] +XDIS 155a0: MISC BASE D51C8D747825 lea r14, ptr [r16+rdi*2+0x25] +XDIS 155a6: MISC BASE D51C8D747926 lea r14, ptr [r17+rdi*2+0x26] +XDIS 155ac: MISC BASE D51C8D747A27 lea r14, ptr [r18+rdi*2+0x27] +XDIS 155b2: MISC BASE D51C8D747B28 lea r14, ptr [r19+rdi*2+0x28] +XDIS 155b8: MISC BASE D51C8D747C29 lea r14, ptr [r20+rdi*2+0x29] +XDIS 155be: MISC BASE D51C8D747D2A lea r14, ptr [r21+rdi*2+0x2a] +XDIS 155c4: MISC BASE D51C8D747E2B lea r14, ptr [r22+rdi*2+0x2b] +XDIS 155ca: MISC BASE D51C8D747F2C lea r14, ptr [r23+rdi*2+0x2c] +XDIS 155d0: MISC BASE D51D8D74782D lea r14, ptr [r24+rdi*2+0x2d] +XDIS 155d6: MISC BASE D51D8D74792E lea r14, ptr [r25+rdi*2+0x2e] +XDIS 155dc: MISC BASE D51D8D747A2F lea r14, ptr [r26+rdi*2+0x2f] +XDIS 155e2: MISC BASE D51D8D747B30 lea r14, ptr [r27+rdi*2+0x30] +XDIS 155e8: MISC BASE D51D8D747C31 lea r14, ptr [r28+rdi*2+0x31] +XDIS 155ee: MISC BASE D51D8D747D32 lea r14, ptr [r29+rdi*2+0x32] +XDIS 155f4: MISC BASE D51D8D747E33 lea r14, ptr [r30+rdi*2+0x33] +XDIS 155fa: MISC BASE D51D8D747F34 lea r14, ptr [r31+rdi*2+0x34] +XDIS 15600: MISC BASE D50E8D744016 lea r14, ptr [rax+r8*2+0x16] +XDIS 15606: MISC BASE D50E8D744117 lea r14, ptr [rcx+r8*2+0x17] +XDIS 1560c: MISC BASE D50E8D744218 lea r14, ptr [rdx+r8*2+0x18] +XDIS 15612: MISC BASE D50E8D744319 lea r14, ptr [rbx+r8*2+0x19] +XDIS 15618: MISC BASE D50E8D74441A lea r14, ptr [rsp+r8*2+0x1a] +XDIS 1561e: MISC BASE D50E8D74451B lea r14, ptr [rbp+r8*2+0x1b] +XDIS 15624: MISC BASE D50E8D74461C lea r14, ptr [rsi+r8*2+0x1c] +XDIS 1562a: MISC BASE D50E8D74471D lea r14, ptr [rdi+r8*2+0x1d] +XDIS 15630: MISC BASE D50F8D74401E lea r14, ptr [r8+r8*2+0x1e] +XDIS 15636: MISC BASE D50F8D74411F lea r14, ptr [r9+r8*2+0x1f] +XDIS 1563c: MISC BASE D50F8D744220 lea r14, ptr [r10+r8*2+0x20] +XDIS 15642: MISC BASE D50F8D744321 lea r14, ptr [r11+r8*2+0x21] +XDIS 15648: MISC BASE D50F8D744422 lea r14, ptr [r12+r8*2+0x22] +XDIS 1564e: MISC BASE D50F8D744523 lea r14, ptr [r13+r8*2+0x23] +XDIS 15654: MISC BASE D50F8D744624 lea r14, ptr [r14+r8*2+0x24] +XDIS 1565a: MISC BASE D50F8D744725 lea r14, ptr [r15+r8*2+0x25] +XDIS 15660: MISC BASE D51E8D744026 lea r14, ptr [r16+r8*2+0x26] +XDIS 15666: MISC BASE D51E8D744127 lea r14, ptr [r17+r8*2+0x27] +XDIS 1566c: MISC BASE D51E8D744228 lea r14, ptr [r18+r8*2+0x28] +XDIS 15672: MISC BASE D51E8D744329 lea r14, ptr [r19+r8*2+0x29] +XDIS 15678: MISC BASE D51E8D74442A lea r14, ptr [r20+r8*2+0x2a] +XDIS 1567e: MISC BASE D51E8D74452B lea r14, ptr [r21+r8*2+0x2b] +XDIS 15684: MISC BASE D51E8D74462C lea r14, ptr [r22+r8*2+0x2c] +XDIS 1568a: MISC BASE D51E8D74472D lea r14, ptr [r23+r8*2+0x2d] +XDIS 15690: MISC BASE D51F8D74402E lea r14, ptr [r24+r8*2+0x2e] +XDIS 15696: MISC BASE D51F8D74412F lea r14, ptr [r25+r8*2+0x2f] +XDIS 1569c: MISC BASE D51F8D744230 lea r14, ptr [r26+r8*2+0x30] +XDIS 156a2: MISC BASE D51F8D744331 lea r14, ptr [r27+r8*2+0x31] +XDIS 156a8: MISC BASE D51F8D744432 lea r14, ptr [r28+r8*2+0x32] +XDIS 156ae: MISC BASE D51F8D744533 lea r14, ptr [r29+r8*2+0x33] +XDIS 156b4: MISC BASE D51F8D744634 lea r14, ptr [r30+r8*2+0x34] +XDIS 156ba: MISC BASE D51F8D744735 lea r14, ptr [r31+r8*2+0x35] +XDIS 156c0: MISC BASE D50E8D744817 lea r14, ptr [rax+r9*2+0x17] +XDIS 156c6: MISC BASE D50E8D744918 lea r14, ptr [rcx+r9*2+0x18] +XDIS 156cc: MISC BASE D50E8D744A19 lea r14, ptr [rdx+r9*2+0x19] +XDIS 156d2: MISC BASE D50E8D744B1A lea r14, ptr [rbx+r9*2+0x1a] +XDIS 156d8: MISC BASE D50E8D744C1B lea r14, ptr [rsp+r9*2+0x1b] +XDIS 156de: MISC BASE D50E8D744D1C lea r14, ptr [rbp+r9*2+0x1c] +XDIS 156e4: MISC BASE D50E8D744E1D lea r14, ptr [rsi+r9*2+0x1d] +XDIS 156ea: MISC BASE D50E8D744F1E lea r14, ptr [rdi+r9*2+0x1e] +XDIS 156f0: MISC BASE D50F8D74481F lea r14, ptr [r8+r9*2+0x1f] +XDIS 156f6: MISC BASE D50F8D744920 lea r14, ptr [r9+r9*2+0x20] +XDIS 156fc: MISC BASE D50F8D744A21 lea r14, ptr [r10+r9*2+0x21] +XDIS 15702: MISC BASE D50F8D744B22 lea r14, ptr [r11+r9*2+0x22] +XDIS 15708: MISC BASE D50F8D744C23 lea r14, ptr [r12+r9*2+0x23] +XDIS 1570e: MISC BASE D50F8D744D24 lea r14, ptr [r13+r9*2+0x24] +XDIS 15714: MISC BASE D50F8D744E25 lea r14, ptr [r14+r9*2+0x25] +XDIS 1571a: MISC BASE D50F8D744F26 lea r14, ptr [r15+r9*2+0x26] +XDIS 15720: MISC BASE D51E8D744827 lea r14, ptr [r16+r9*2+0x27] +XDIS 15726: MISC BASE D51E8D744928 lea r14, ptr [r17+r9*2+0x28] +XDIS 1572c: MISC BASE D51E8D744A29 lea r14, ptr [r18+r9*2+0x29] +XDIS 15732: MISC BASE D51E8D744B2A lea r14, ptr [r19+r9*2+0x2a] +XDIS 15738: MISC BASE D51E8D744C2B lea r14, ptr [r20+r9*2+0x2b] +XDIS 1573e: MISC BASE D51E8D744D2C lea r14, ptr [r21+r9*2+0x2c] +XDIS 15744: MISC BASE D51E8D744E2D lea r14, ptr [r22+r9*2+0x2d] +XDIS 1574a: MISC BASE D51E8D744F2E lea r14, ptr [r23+r9*2+0x2e] +XDIS 15750: MISC BASE D51F8D74482F lea r14, ptr [r24+r9*2+0x2f] +XDIS 15756: MISC BASE D51F8D744930 lea r14, ptr [r25+r9*2+0x30] +XDIS 1575c: MISC BASE D51F8D744A31 lea r14, ptr [r26+r9*2+0x31] +XDIS 15762: MISC BASE D51F8D744B32 lea r14, ptr [r27+r9*2+0x32] +XDIS 15768: MISC BASE D51F8D744C33 lea r14, ptr [r28+r9*2+0x33] +XDIS 1576e: MISC BASE D51F8D744D34 lea r14, ptr [r29+r9*2+0x34] +XDIS 15774: MISC BASE D51F8D744E35 lea r14, ptr [r30+r9*2+0x35] +XDIS 1577a: MISC BASE D51F8D744F36 lea r14, ptr [r31+r9*2+0x36] +XDIS 15780: MISC BASE D50E8D745018 lea r14, ptr [rax+r10*2+0x18] +XDIS 15786: MISC BASE D50E8D745119 lea r14, ptr [rcx+r10*2+0x19] +XDIS 1578c: MISC BASE D50E8D74521A lea r14, ptr [rdx+r10*2+0x1a] +XDIS 15792: MISC BASE D50E8D74531B lea r14, ptr [rbx+r10*2+0x1b] +XDIS 15798: MISC BASE D50E8D74541C lea r14, ptr [rsp+r10*2+0x1c] +XDIS 1579e: MISC BASE D50E8D74551D lea r14, ptr [rbp+r10*2+0x1d] +XDIS 157a4: MISC BASE D50E8D74561E lea r14, ptr [rsi+r10*2+0x1e] +XDIS 157aa: MISC BASE D50E8D74571F lea r14, ptr [rdi+r10*2+0x1f] +XDIS 157b0: MISC BASE D50F8D745020 lea r14, ptr [r8+r10*2+0x20] +XDIS 157b6: MISC BASE D50F8D745121 lea r14, ptr [r9+r10*2+0x21] +XDIS 157bc: MISC BASE D50F8D745222 lea r14, ptr [r10+r10*2+0x22] +XDIS 157c2: MISC BASE D50F8D745323 lea r14, ptr [r11+r10*2+0x23] +XDIS 157c8: MISC BASE D50F8D745424 lea r14, ptr [r12+r10*2+0x24] +XDIS 157ce: MISC BASE D50F8D745525 lea r14, ptr [r13+r10*2+0x25] +XDIS 157d4: MISC BASE D50F8D745626 lea r14, ptr [r14+r10*2+0x26] +XDIS 157da: MISC BASE D50F8D745727 lea r14, ptr [r15+r10*2+0x27] +XDIS 157e0: MISC BASE D51E8D745028 lea r14, ptr [r16+r10*2+0x28] +XDIS 157e6: MISC BASE D51E8D745129 lea r14, ptr [r17+r10*2+0x29] +XDIS 157ec: MISC BASE D51E8D74522A lea r14, ptr [r18+r10*2+0x2a] +XDIS 157f2: MISC BASE D51E8D74532B lea r14, ptr [r19+r10*2+0x2b] +XDIS 157f8: MISC BASE D51E8D74542C lea r14, ptr [r20+r10*2+0x2c] +XDIS 157fe: MISC BASE D51E8D74552D lea r14, ptr [r21+r10*2+0x2d] +XDIS 15804: MISC BASE D51E8D74562E lea r14, ptr [r22+r10*2+0x2e] +XDIS 1580a: MISC BASE D51E8D74572F lea r14, ptr [r23+r10*2+0x2f] +XDIS 15810: MISC BASE D51F8D745030 lea r14, ptr [r24+r10*2+0x30] +XDIS 15816: MISC BASE D51F8D745131 lea r14, ptr [r25+r10*2+0x31] +XDIS 1581c: MISC BASE D51F8D745232 lea r14, ptr [r26+r10*2+0x32] +XDIS 15822: MISC BASE D51F8D745333 lea r14, ptr [r27+r10*2+0x33] +XDIS 15828: MISC BASE D51F8D745434 lea r14, ptr [r28+r10*2+0x34] +XDIS 1582e: MISC BASE D51F8D745535 lea r14, ptr [r29+r10*2+0x35] +XDIS 15834: MISC BASE D51F8D745636 lea r14, ptr [r30+r10*2+0x36] +XDIS 1583a: MISC BASE D51F8D745737 lea r14, ptr [r31+r10*2+0x37] +XDIS 15840: MISC BASE D50E8D745819 lea r14, ptr [rax+r11*2+0x19] +XDIS 15846: MISC BASE D50E8D74591A lea r14, ptr [rcx+r11*2+0x1a] +XDIS 1584c: MISC BASE D50E8D745A1B lea r14, ptr [rdx+r11*2+0x1b] +XDIS 15852: MISC BASE D50E8D745B1C lea r14, ptr [rbx+r11*2+0x1c] +XDIS 15858: MISC BASE D50E8D745C1D lea r14, ptr [rsp+r11*2+0x1d] +XDIS 1585e: MISC BASE D50E8D745D1E lea r14, ptr [rbp+r11*2+0x1e] +XDIS 15864: MISC BASE D50E8D745E1F lea r14, ptr [rsi+r11*2+0x1f] +XDIS 1586a: MISC BASE D50E8D745F20 lea r14, ptr [rdi+r11*2+0x20] +XDIS 15870: MISC BASE D50F8D745821 lea r14, ptr [r8+r11*2+0x21] +XDIS 15876: MISC BASE D50F8D745922 lea r14, ptr [r9+r11*2+0x22] +XDIS 1587c: MISC BASE D50F8D745A23 lea r14, ptr [r10+r11*2+0x23] +XDIS 15882: MISC BASE D50F8D745B24 lea r14, ptr [r11+r11*2+0x24] +XDIS 15888: MISC BASE D50F8D745C25 lea r14, ptr [r12+r11*2+0x25] +XDIS 1588e: MISC BASE D50F8D745D26 lea r14, ptr [r13+r11*2+0x26] +XDIS 15894: MISC BASE D50F8D745E27 lea r14, ptr [r14+r11*2+0x27] +XDIS 1589a: MISC BASE D50F8D745F28 lea r14, ptr [r15+r11*2+0x28] +XDIS 158a0: MISC BASE D51E8D745829 lea r14, ptr [r16+r11*2+0x29] +XDIS 158a6: MISC BASE D51E8D74592A lea r14, ptr [r17+r11*2+0x2a] +XDIS 158ac: MISC BASE D51E8D745A2B lea r14, ptr [r18+r11*2+0x2b] +XDIS 158b2: MISC BASE D51E8D745B2C lea r14, ptr [r19+r11*2+0x2c] +XDIS 158b8: MISC BASE D51E8D745C2D lea r14, ptr [r20+r11*2+0x2d] +XDIS 158be: MISC BASE D51E8D745D2E lea r14, ptr [r21+r11*2+0x2e] +XDIS 158c4: MISC BASE D51E8D745E2F lea r14, ptr [r22+r11*2+0x2f] +XDIS 158ca: MISC BASE D51E8D745F30 lea r14, ptr [r23+r11*2+0x30] +XDIS 158d0: MISC BASE D51F8D745831 lea r14, ptr [r24+r11*2+0x31] +XDIS 158d6: MISC BASE D51F8D745932 lea r14, ptr [r25+r11*2+0x32] +XDIS 158dc: MISC BASE D51F8D745A33 lea r14, ptr [r26+r11*2+0x33] +XDIS 158e2: MISC BASE D51F8D745B34 lea r14, ptr [r27+r11*2+0x34] +XDIS 158e8: MISC BASE D51F8D745C35 lea r14, ptr [r28+r11*2+0x35] +XDIS 158ee: MISC BASE D51F8D745D36 lea r14, ptr [r29+r11*2+0x36] +XDIS 158f4: MISC BASE D51F8D745E37 lea r14, ptr [r30+r11*2+0x37] +XDIS 158fa: MISC BASE D51F8D745F38 lea r14, ptr [r31+r11*2+0x38] +XDIS 15900: MISC BASE D50E8D74601A lea r14, ptr [rax+r12*2+0x1a] +XDIS 15906: MISC BASE D50E8D74611B lea r14, ptr [rcx+r12*2+0x1b] +XDIS 1590c: MISC BASE D50E8D74621C lea r14, ptr [rdx+r12*2+0x1c] +XDIS 15912: MISC BASE D50E8D74631D lea r14, ptr [rbx+r12*2+0x1d] +XDIS 15918: MISC BASE D50E8D74641E lea r14, ptr [rsp+r12*2+0x1e] +XDIS 1591e: MISC BASE D50E8D74651F lea r14, ptr [rbp+r12*2+0x1f] +XDIS 15924: MISC BASE D50E8D746620 lea r14, ptr [rsi+r12*2+0x20] +XDIS 1592a: MISC BASE D50E8D746721 lea r14, ptr [rdi+r12*2+0x21] +XDIS 15930: MISC BASE D50F8D746022 lea r14, ptr [r8+r12*2+0x22] +XDIS 15936: MISC BASE D50F8D746123 lea r14, ptr [r9+r12*2+0x23] +XDIS 1593c: MISC BASE D50F8D746224 lea r14, ptr [r10+r12*2+0x24] +XDIS 15942: MISC BASE D50F8D746325 lea r14, ptr [r11+r12*2+0x25] +XDIS 15948: MISC BASE D50F8D746426 lea r14, ptr [r12+r12*2+0x26] +XDIS 1594e: MISC BASE D50F8D746527 lea r14, ptr [r13+r12*2+0x27] +XDIS 15954: MISC BASE D50F8D746628 lea r14, ptr [r14+r12*2+0x28] +XDIS 1595a: MISC BASE D50F8D746729 lea r14, ptr [r15+r12*2+0x29] +XDIS 15960: MISC BASE D51E8D74602A lea r14, ptr [r16+r12*2+0x2a] +XDIS 15966: MISC BASE D51E8D74612B lea r14, ptr [r17+r12*2+0x2b] +XDIS 1596c: MISC BASE D51E8D74622C lea r14, ptr [r18+r12*2+0x2c] +XDIS 15972: MISC BASE D51E8D74632D lea r14, ptr [r19+r12*2+0x2d] +XDIS 15978: MISC BASE D51E8D74642E lea r14, ptr [r20+r12*2+0x2e] +XDIS 1597e: MISC BASE D51E8D74652F lea r14, ptr [r21+r12*2+0x2f] +XDIS 15984: MISC BASE D51E8D746630 lea r14, ptr [r22+r12*2+0x30] +XDIS 1598a: MISC BASE D51E8D746731 lea r14, ptr [r23+r12*2+0x31] +XDIS 15990: MISC BASE D51F8D746032 lea r14, ptr [r24+r12*2+0x32] +XDIS 15996: MISC BASE D51F8D746133 lea r14, ptr [r25+r12*2+0x33] +XDIS 1599c: MISC BASE D51F8D746234 lea r14, ptr [r26+r12*2+0x34] +XDIS 159a2: MISC BASE D51F8D746335 lea r14, ptr [r27+r12*2+0x35] +XDIS 159a8: MISC BASE D51F8D746436 lea r14, ptr [r28+r12*2+0x36] +XDIS 159ae: MISC BASE D51F8D746537 lea r14, ptr [r29+r12*2+0x37] +XDIS 159b4: MISC BASE D51F8D746638 lea r14, ptr [r30+r12*2+0x38] +XDIS 159ba: MISC BASE D51F8D746739 lea r14, ptr [r31+r12*2+0x39] +XDIS 159c0: MISC BASE D50E8D74681B lea r14, ptr [rax+r13*2+0x1b] +XDIS 159c6: MISC BASE D50E8D74691C lea r14, ptr [rcx+r13*2+0x1c] +XDIS 159cc: MISC BASE D50E8D746A1D lea r14, ptr [rdx+r13*2+0x1d] +XDIS 159d2: MISC BASE D50E8D746B1E lea r14, ptr [rbx+r13*2+0x1e] +XDIS 159d8: MISC BASE D50E8D746C1F lea r14, ptr [rsp+r13*2+0x1f] +XDIS 159de: MISC BASE D50E8D746D20 lea r14, ptr [rbp+r13*2+0x20] +XDIS 159e4: MISC BASE D50E8D746E21 lea r14, ptr [rsi+r13*2+0x21] +XDIS 159ea: MISC BASE D50E8D746F22 lea r14, ptr [rdi+r13*2+0x22] +XDIS 159f0: MISC BASE D50F8D746823 lea r14, ptr [r8+r13*2+0x23] +XDIS 159f6: MISC BASE D50F8D746924 lea r14, ptr [r9+r13*2+0x24] +XDIS 159fc: MISC BASE D50F8D746A25 lea r14, ptr [r10+r13*2+0x25] +XDIS 15a02: MISC BASE D50F8D746B26 lea r14, ptr [r11+r13*2+0x26] +XDIS 15a08: MISC BASE D50F8D746C27 lea r14, ptr [r12+r13*2+0x27] +XDIS 15a0e: MISC BASE D50F8D746D28 lea r14, ptr [r13+r13*2+0x28] +XDIS 15a14: MISC BASE D50F8D746E29 lea r14, ptr [r14+r13*2+0x29] +XDIS 15a1a: MISC BASE D50F8D746F2A lea r14, ptr [r15+r13*2+0x2a] +XDIS 15a20: MISC BASE D51E8D74682B lea r14, ptr [r16+r13*2+0x2b] +XDIS 15a26: MISC BASE D51E8D74692C lea r14, ptr [r17+r13*2+0x2c] +XDIS 15a2c: MISC BASE D51E8D746A2D lea r14, ptr [r18+r13*2+0x2d] +XDIS 15a32: MISC BASE D51E8D746B2E lea r14, ptr [r19+r13*2+0x2e] +XDIS 15a38: MISC BASE D51E8D746C2F lea r14, ptr [r20+r13*2+0x2f] +XDIS 15a3e: MISC BASE D51E8D746D30 lea r14, ptr [r21+r13*2+0x30] +XDIS 15a44: MISC BASE D51E8D746E31 lea r14, ptr [r22+r13*2+0x31] +XDIS 15a4a: MISC BASE D51E8D746F32 lea r14, ptr [r23+r13*2+0x32] +XDIS 15a50: MISC BASE D51F8D746833 lea r14, ptr [r24+r13*2+0x33] +XDIS 15a56: MISC BASE D51F8D746934 lea r14, ptr [r25+r13*2+0x34] +XDIS 15a5c: MISC BASE D51F8D746A35 lea r14, ptr [r26+r13*2+0x35] +XDIS 15a62: MISC BASE D51F8D746B36 lea r14, ptr [r27+r13*2+0x36] +XDIS 15a68: MISC BASE D51F8D746C37 lea r14, ptr [r28+r13*2+0x37] +XDIS 15a6e: MISC BASE D51F8D746D38 lea r14, ptr [r29+r13*2+0x38] +XDIS 15a74: MISC BASE D51F8D746E39 lea r14, ptr [r30+r13*2+0x39] +XDIS 15a7a: MISC BASE D51F8D746F3A lea r14, ptr [r31+r13*2+0x3a] +XDIS 15a80: MISC BASE D50E8D74701C lea r14, ptr [rax+r14*2+0x1c] +XDIS 15a86: MISC BASE D50E8D74711D lea r14, ptr [rcx+r14*2+0x1d] +XDIS 15a8c: MISC BASE D50E8D74721E lea r14, ptr [rdx+r14*2+0x1e] +XDIS 15a92: MISC BASE D50E8D74731F lea r14, ptr [rbx+r14*2+0x1f] +XDIS 15a98: MISC BASE D50E8D747420 lea r14, ptr [rsp+r14*2+0x20] +XDIS 15a9e: MISC BASE D50E8D747521 lea r14, ptr [rbp+r14*2+0x21] +XDIS 15aa4: MISC BASE D50E8D747622 lea r14, ptr [rsi+r14*2+0x22] +XDIS 15aaa: MISC BASE D50E8D747723 lea r14, ptr [rdi+r14*2+0x23] +XDIS 15ab0: MISC BASE D50F8D747024 lea r14, ptr [r8+r14*2+0x24] +XDIS 15ab6: MISC BASE D50F8D747125 lea r14, ptr [r9+r14*2+0x25] +XDIS 15abc: MISC BASE D50F8D747226 lea r14, ptr [r10+r14*2+0x26] +XDIS 15ac2: MISC BASE D50F8D747327 lea r14, ptr [r11+r14*2+0x27] +XDIS 15ac8: MISC BASE D50F8D747428 lea r14, ptr [r12+r14*2+0x28] +XDIS 15ace: MISC BASE D50F8D747529 lea r14, ptr [r13+r14*2+0x29] +XDIS 15ad4: MISC BASE D50F8D74762A lea r14, ptr [r14+r14*2+0x2a] +XDIS 15ada: MISC BASE D50F8D74772B lea r14, ptr [r15+r14*2+0x2b] +XDIS 15ae0: MISC BASE D51E8D74702C lea r14, ptr [r16+r14*2+0x2c] +XDIS 15ae6: MISC BASE D51E8D74712D lea r14, ptr [r17+r14*2+0x2d] +XDIS 15aec: MISC BASE D51E8D74722E lea r14, ptr [r18+r14*2+0x2e] +XDIS 15af2: MISC BASE D51E8D74732F lea r14, ptr [r19+r14*2+0x2f] +XDIS 15af8: MISC BASE D51E8D747430 lea r14, ptr [r20+r14*2+0x30] +XDIS 15afe: MISC BASE D51E8D747531 lea r14, ptr [r21+r14*2+0x31] +XDIS 15b04: MISC BASE D51E8D747632 lea r14, ptr [r22+r14*2+0x32] +XDIS 15b0a: MISC BASE D51E8D747733 lea r14, ptr [r23+r14*2+0x33] +XDIS 15b10: MISC BASE D51F8D747034 lea r14, ptr [r24+r14*2+0x34] +XDIS 15b16: MISC BASE D51F8D747135 lea r14, ptr [r25+r14*2+0x35] +XDIS 15b1c: MISC BASE D51F8D747236 lea r14, ptr [r26+r14*2+0x36] +XDIS 15b22: MISC BASE D51F8D747337 lea r14, ptr [r27+r14*2+0x37] +XDIS 15b28: MISC BASE D51F8D747438 lea r14, ptr [r28+r14*2+0x38] +XDIS 15b2e: MISC BASE D51F8D747539 lea r14, ptr [r29+r14*2+0x39] +XDIS 15b34: MISC BASE D51F8D74763A lea r14, ptr [r30+r14*2+0x3a] +XDIS 15b3a: MISC BASE D51F8D74773B lea r14, ptr [r31+r14*2+0x3b] +XDIS 15b40: MISC BASE D50E8D74781D lea r14, ptr [rax+r15*2+0x1d] +XDIS 15b46: MISC BASE D50E8D74791E lea r14, ptr [rcx+r15*2+0x1e] +XDIS 15b4c: MISC BASE D50E8D747A1F lea r14, ptr [rdx+r15*2+0x1f] +XDIS 15b52: MISC BASE D50E8D747B20 lea r14, ptr [rbx+r15*2+0x20] +XDIS 15b58: MISC BASE D50E8D747C21 lea r14, ptr [rsp+r15*2+0x21] +XDIS 15b5e: MISC BASE D50E8D747D22 lea r14, ptr [rbp+r15*2+0x22] +XDIS 15b64: MISC BASE D50E8D747E23 lea r14, ptr [rsi+r15*2+0x23] +XDIS 15b6a: MISC BASE D50E8D747F24 lea r14, ptr [rdi+r15*2+0x24] +XDIS 15b70: MISC BASE D50F8D747825 lea r14, ptr [r8+r15*2+0x25] +XDIS 15b76: MISC BASE D50F8D747926 lea r14, ptr [r9+r15*2+0x26] +XDIS 15b7c: MISC BASE D50F8D747A27 lea r14, ptr [r10+r15*2+0x27] +XDIS 15b82: MISC BASE D50F8D747B28 lea r14, ptr [r11+r15*2+0x28] +XDIS 15b88: MISC BASE D50F8D747C29 lea r14, ptr [r12+r15*2+0x29] +XDIS 15b8e: MISC BASE D50F8D747D2A lea r14, ptr [r13+r15*2+0x2a] +XDIS 15b94: MISC BASE D50F8D747E2B lea r14, ptr [r14+r15*2+0x2b] +XDIS 15b9a: MISC BASE D50F8D747F2C lea r14, ptr [r15+r15*2+0x2c] +XDIS 15ba0: MISC BASE D51E8D74782D lea r14, ptr [r16+r15*2+0x2d] +XDIS 15ba6: MISC BASE D51E8D74792E lea r14, ptr [r17+r15*2+0x2e] +XDIS 15bac: MISC BASE D51E8D747A2F lea r14, ptr [r18+r15*2+0x2f] +XDIS 15bb2: MISC BASE D51E8D747B30 lea r14, ptr [r19+r15*2+0x30] +XDIS 15bb8: MISC BASE D51E8D747C31 lea r14, ptr [r20+r15*2+0x31] +XDIS 15bbe: MISC BASE D51E8D747D32 lea r14, ptr [r21+r15*2+0x32] +XDIS 15bc4: MISC BASE D51E8D747E33 lea r14, ptr [r22+r15*2+0x33] +XDIS 15bca: MISC BASE D51E8D747F34 lea r14, ptr [r23+r15*2+0x34] +XDIS 15bd0: MISC BASE D51F8D747835 lea r14, ptr [r24+r15*2+0x35] +XDIS 15bd6: MISC BASE D51F8D747936 lea r14, ptr [r25+r15*2+0x36] +XDIS 15bdc: MISC BASE D51F8D747A37 lea r14, ptr [r26+r15*2+0x37] +XDIS 15be2: MISC BASE D51F8D747B38 lea r14, ptr [r27+r15*2+0x38] +XDIS 15be8: MISC BASE D51F8D747C39 lea r14, ptr [r28+r15*2+0x39] +XDIS 15bee: MISC BASE D51F8D747D3A lea r14, ptr [r29+r15*2+0x3a] +XDIS 15bf4: MISC BASE D51F8D747E3B lea r14, ptr [r30+r15*2+0x3b] +XDIS 15bfa: MISC BASE D51F8D747F3C lea r14, ptr [r31+r15*2+0x3c] +XDIS 15c00: MISC BASE D52C8D74401E lea r14, ptr [rax+r16*2+0x1e] +XDIS 15c06: MISC BASE D52C8D74411F lea r14, ptr [rcx+r16*2+0x1f] +XDIS 15c0c: MISC BASE D52C8D744220 lea r14, ptr [rdx+r16*2+0x20] +XDIS 15c12: MISC BASE D52C8D744321 lea r14, ptr [rbx+r16*2+0x21] +XDIS 15c18: MISC BASE D52C8D744422 lea r14, ptr [rsp+r16*2+0x22] +XDIS 15c1e: MISC BASE D52C8D744523 lea r14, ptr [rbp+r16*2+0x23] +XDIS 15c24: MISC BASE D52C8D744624 lea r14, ptr [rsi+r16*2+0x24] +XDIS 15c2a: MISC BASE D52C8D744725 lea r14, ptr [rdi+r16*2+0x25] +XDIS 15c30: MISC BASE D52D8D744026 lea r14, ptr [r8+r16*2+0x26] +XDIS 15c36: MISC BASE D52D8D744127 lea r14, ptr [r9+r16*2+0x27] +XDIS 15c3c: MISC BASE D52D8D744228 lea r14, ptr [r10+r16*2+0x28] +XDIS 15c42: MISC BASE D52D8D744329 lea r14, ptr [r11+r16*2+0x29] +XDIS 15c48: MISC BASE D52D8D74442A lea r14, ptr [r12+r16*2+0x2a] +XDIS 15c4e: MISC BASE D52D8D74452B lea r14, ptr [r13+r16*2+0x2b] +XDIS 15c54: MISC BASE D52D8D74462C lea r14, ptr [r14+r16*2+0x2c] +XDIS 15c5a: MISC BASE D52D8D74472D lea r14, ptr [r15+r16*2+0x2d] +XDIS 15c60: MISC BASE D53C8D74402E lea r14, ptr [r16+r16*2+0x2e] +XDIS 15c66: MISC BASE D53C8D74412F lea r14, ptr [r17+r16*2+0x2f] +XDIS 15c6c: MISC BASE D53C8D744230 lea r14, ptr [r18+r16*2+0x30] +XDIS 15c72: MISC BASE D53C8D744331 lea r14, ptr [r19+r16*2+0x31] +XDIS 15c78: MISC BASE D53C8D744432 lea r14, ptr [r20+r16*2+0x32] +XDIS 15c7e: MISC BASE D53C8D744533 lea r14, ptr [r21+r16*2+0x33] +XDIS 15c84: MISC BASE D53C8D744634 lea r14, ptr [r22+r16*2+0x34] +XDIS 15c8a: MISC BASE D53C8D744735 lea r14, ptr [r23+r16*2+0x35] +XDIS 15c90: MISC BASE D53D8D744036 lea r14, ptr [r24+r16*2+0x36] +XDIS 15c96: MISC BASE D53D8D744137 lea r14, ptr [r25+r16*2+0x37] +XDIS 15c9c: MISC BASE D53D8D744238 lea r14, ptr [r26+r16*2+0x38] +XDIS 15ca2: MISC BASE D53D8D744339 lea r14, ptr [r27+r16*2+0x39] +XDIS 15ca8: MISC BASE D53D8D74443A lea r14, ptr [r28+r16*2+0x3a] +XDIS 15cae: MISC BASE D53D8D74453B lea r14, ptr [r29+r16*2+0x3b] +XDIS 15cb4: MISC BASE D53D8D74463C lea r14, ptr [r30+r16*2+0x3c] +XDIS 15cba: MISC BASE D53D8D74473D lea r14, ptr [r31+r16*2+0x3d] +XDIS 15cc0: MISC BASE D52C8D74481F lea r14, ptr [rax+r17*2+0x1f] +XDIS 15cc6: MISC BASE D52C8D744920 lea r14, ptr [rcx+r17*2+0x20] +XDIS 15ccc: MISC BASE D52C8D744A21 lea r14, ptr [rdx+r17*2+0x21] +XDIS 15cd2: MISC BASE D52C8D744B22 lea r14, ptr [rbx+r17*2+0x22] +XDIS 15cd8: MISC BASE D52C8D744C23 lea r14, ptr [rsp+r17*2+0x23] +XDIS 15cde: MISC BASE D52C8D744D24 lea r14, ptr [rbp+r17*2+0x24] +XDIS 15ce4: MISC BASE D52C8D744E25 lea r14, ptr [rsi+r17*2+0x25] +XDIS 15cea: MISC BASE D52C8D744F26 lea r14, ptr [rdi+r17*2+0x26] +XDIS 15cf0: MISC BASE D52D8D744827 lea r14, ptr [r8+r17*2+0x27] +XDIS 15cf6: MISC BASE D52D8D744928 lea r14, ptr [r9+r17*2+0x28] +XDIS 15cfc: MISC BASE D52D8D744A29 lea r14, ptr [r10+r17*2+0x29] +XDIS 15d02: MISC BASE D52D8D744B2A lea r14, ptr [r11+r17*2+0x2a] +XDIS 15d08: MISC BASE D52D8D744C2B lea r14, ptr [r12+r17*2+0x2b] +XDIS 15d0e: MISC BASE D52D8D744D2C lea r14, ptr [r13+r17*2+0x2c] +XDIS 15d14: MISC BASE D52D8D744E2D lea r14, ptr [r14+r17*2+0x2d] +XDIS 15d1a: MISC BASE D52D8D744F2E lea r14, ptr [r15+r17*2+0x2e] +XDIS 15d20: MISC BASE D53C8D74482F lea r14, ptr [r16+r17*2+0x2f] +XDIS 15d26: MISC BASE D53C8D744930 lea r14, ptr [r17+r17*2+0x30] +XDIS 15d2c: MISC BASE D53C8D744A31 lea r14, ptr [r18+r17*2+0x31] +XDIS 15d32: MISC BASE D53C8D744B32 lea r14, ptr [r19+r17*2+0x32] +XDIS 15d38: MISC BASE D53C8D744C33 lea r14, ptr [r20+r17*2+0x33] +XDIS 15d3e: MISC BASE D53C8D744D34 lea r14, ptr [r21+r17*2+0x34] +XDIS 15d44: MISC BASE D53C8D744E35 lea r14, ptr [r22+r17*2+0x35] +XDIS 15d4a: MISC BASE D53C8D744F36 lea r14, ptr [r23+r17*2+0x36] +XDIS 15d50: MISC BASE D53D8D744837 lea r14, ptr [r24+r17*2+0x37] +XDIS 15d56: MISC BASE D53D8D744938 lea r14, ptr [r25+r17*2+0x38] +XDIS 15d5c: MISC BASE D53D8D744A39 lea r14, ptr [r26+r17*2+0x39] +XDIS 15d62: MISC BASE D53D8D744B3A lea r14, ptr [r27+r17*2+0x3a] +XDIS 15d68: MISC BASE D53D8D744C3B lea r14, ptr [r28+r17*2+0x3b] +XDIS 15d6e: MISC BASE D53D8D744D3C lea r14, ptr [r29+r17*2+0x3c] +XDIS 15d74: MISC BASE D53D8D744E3D lea r14, ptr [r30+r17*2+0x3d] +XDIS 15d7a: MISC BASE D53D8D744F3E lea r14, ptr [r31+r17*2+0x3e] +XDIS 15d80: MISC BASE D52C8D745020 lea r14, ptr [rax+r18*2+0x20] +XDIS 15d86: MISC BASE D52C8D745121 lea r14, ptr [rcx+r18*2+0x21] +XDIS 15d8c: MISC BASE D52C8D745222 lea r14, ptr [rdx+r18*2+0x22] +XDIS 15d92: MISC BASE D52C8D745323 lea r14, ptr [rbx+r18*2+0x23] +XDIS 15d98: MISC BASE D52C8D745424 lea r14, ptr [rsp+r18*2+0x24] +XDIS 15d9e: MISC BASE D52C8D745525 lea r14, ptr [rbp+r18*2+0x25] +XDIS 15da4: MISC BASE D52C8D745626 lea r14, ptr [rsi+r18*2+0x26] +XDIS 15daa: MISC BASE D52C8D745727 lea r14, ptr [rdi+r18*2+0x27] +XDIS 15db0: MISC BASE D52D8D745028 lea r14, ptr [r8+r18*2+0x28] +XDIS 15db6: MISC BASE D52D8D745129 lea r14, ptr [r9+r18*2+0x29] +XDIS 15dbc: MISC BASE D52D8D74522A lea r14, ptr [r10+r18*2+0x2a] +XDIS 15dc2: MISC BASE D52D8D74532B lea r14, ptr [r11+r18*2+0x2b] +XDIS 15dc8: MISC BASE D52D8D74542C lea r14, ptr [r12+r18*2+0x2c] +XDIS 15dce: MISC BASE D52D8D74552D lea r14, ptr [r13+r18*2+0x2d] +XDIS 15dd4: MISC BASE D52D8D74562E lea r14, ptr [r14+r18*2+0x2e] +XDIS 15dda: MISC BASE D52D8D74572F lea r14, ptr [r15+r18*2+0x2f] +XDIS 15de0: MISC BASE D53C8D745030 lea r14, ptr [r16+r18*2+0x30] +XDIS 15de6: MISC BASE D53C8D745131 lea r14, ptr [r17+r18*2+0x31] +XDIS 15dec: MISC BASE D53C8D745232 lea r14, ptr [r18+r18*2+0x32] +XDIS 15df2: MISC BASE D53C8D745333 lea r14, ptr [r19+r18*2+0x33] +XDIS 15df8: MISC BASE D53C8D745434 lea r14, ptr [r20+r18*2+0x34] +XDIS 15dfe: MISC BASE D53C8D745535 lea r14, ptr [r21+r18*2+0x35] +XDIS 15e04: MISC BASE D53C8D745636 lea r14, ptr [r22+r18*2+0x36] +XDIS 15e0a: MISC BASE D53C8D745737 lea r14, ptr [r23+r18*2+0x37] +XDIS 15e10: MISC BASE D53D8D745038 lea r14, ptr [r24+r18*2+0x38] +XDIS 15e16: MISC BASE D53D8D745139 lea r14, ptr [r25+r18*2+0x39] +XDIS 15e1c: MISC BASE D53D8D74523A lea r14, ptr [r26+r18*2+0x3a] +XDIS 15e22: MISC BASE D53D8D74533B lea r14, ptr [r27+r18*2+0x3b] +XDIS 15e28: MISC BASE D53D8D74543C lea r14, ptr [r28+r18*2+0x3c] +XDIS 15e2e: MISC BASE D53D8D74553D lea r14, ptr [r29+r18*2+0x3d] +XDIS 15e34: MISC BASE D53D8D74563E lea r14, ptr [r30+r18*2+0x3e] +XDIS 15e3a: MISC BASE D53D8D74573F lea r14, ptr [r31+r18*2+0x3f] +XDIS 15e40: MISC BASE D52C8D745821 lea r14, ptr [rax+r19*2+0x21] +XDIS 15e46: MISC BASE D52C8D745922 lea r14, ptr [rcx+r19*2+0x22] +XDIS 15e4c: MISC BASE D52C8D745A23 lea r14, ptr [rdx+r19*2+0x23] +XDIS 15e52: MISC BASE D52C8D745B24 lea r14, ptr [rbx+r19*2+0x24] +XDIS 15e58: MISC BASE D52C8D745C25 lea r14, ptr [rsp+r19*2+0x25] +XDIS 15e5e: MISC BASE D52C8D745D26 lea r14, ptr [rbp+r19*2+0x26] +XDIS 15e64: MISC BASE D52C8D745E27 lea r14, ptr [rsi+r19*2+0x27] +XDIS 15e6a: MISC BASE D52C8D745F28 lea r14, ptr [rdi+r19*2+0x28] +XDIS 15e70: MISC BASE D52D8D745829 lea r14, ptr [r8+r19*2+0x29] +XDIS 15e76: MISC BASE D52D8D74592A lea r14, ptr [r9+r19*2+0x2a] +XDIS 15e7c: MISC BASE D52D8D745A2B lea r14, ptr [r10+r19*2+0x2b] +XDIS 15e82: MISC BASE D52D8D745B2C lea r14, ptr [r11+r19*2+0x2c] +XDIS 15e88: MISC BASE D52D8D745C2D lea r14, ptr [r12+r19*2+0x2d] +XDIS 15e8e: MISC BASE D52D8D745D2E lea r14, ptr [r13+r19*2+0x2e] +XDIS 15e94: MISC BASE D52D8D745E2F lea r14, ptr [r14+r19*2+0x2f] +XDIS 15e9a: MISC BASE D52D8D745F30 lea r14, ptr [r15+r19*2+0x30] +XDIS 15ea0: MISC BASE D53C8D745831 lea r14, ptr [r16+r19*2+0x31] +XDIS 15ea6: MISC BASE D53C8D745932 lea r14, ptr [r17+r19*2+0x32] +XDIS 15eac: MISC BASE D53C8D745A33 lea r14, ptr [r18+r19*2+0x33] +XDIS 15eb2: MISC BASE D53C8D745B34 lea r14, ptr [r19+r19*2+0x34] +XDIS 15eb8: MISC BASE D53C8D745C35 lea r14, ptr [r20+r19*2+0x35] +XDIS 15ebe: MISC BASE D53C8D745D36 lea r14, ptr [r21+r19*2+0x36] +XDIS 15ec4: MISC BASE D53C8D745E37 lea r14, ptr [r22+r19*2+0x37] +XDIS 15eca: MISC BASE D53C8D745F38 lea r14, ptr [r23+r19*2+0x38] +XDIS 15ed0: MISC BASE D53D8D745839 lea r14, ptr [r24+r19*2+0x39] +XDIS 15ed6: MISC BASE D53D8D74593A lea r14, ptr [r25+r19*2+0x3a] +XDIS 15edc: MISC BASE D53D8D745A3B lea r14, ptr [r26+r19*2+0x3b] +XDIS 15ee2: MISC BASE D53D8D745B3C lea r14, ptr [r27+r19*2+0x3c] +XDIS 15ee8: MISC BASE D53D8D745C3D lea r14, ptr [r28+r19*2+0x3d] +XDIS 15eee: MISC BASE D53D8D745D3E lea r14, ptr [r29+r19*2+0x3e] +XDIS 15ef4: MISC BASE D53D8D745E3F lea r14, ptr [r30+r19*2+0x3f] +XDIS 15efa: MISC BASE D53D8D745F40 lea r14, ptr [r31+r19*2+0x40] +XDIS 15f00: MISC BASE D52C8D746022 lea r14, ptr [rax+r20*2+0x22] +XDIS 15f06: MISC BASE D52C8D746123 lea r14, ptr [rcx+r20*2+0x23] +XDIS 15f0c: MISC BASE D52C8D746224 lea r14, ptr [rdx+r20*2+0x24] +XDIS 15f12: MISC BASE D52C8D746325 lea r14, ptr [rbx+r20*2+0x25] +XDIS 15f18: MISC BASE D52C8D746426 lea r14, ptr [rsp+r20*2+0x26] +XDIS 15f1e: MISC BASE D52C8D746527 lea r14, ptr [rbp+r20*2+0x27] +XDIS 15f24: MISC BASE D52C8D746628 lea r14, ptr [rsi+r20*2+0x28] +XDIS 15f2a: MISC BASE D52C8D746729 lea r14, ptr [rdi+r20*2+0x29] +XDIS 15f30: MISC BASE D52D8D74602A lea r14, ptr [r8+r20*2+0x2a] +XDIS 15f36: MISC BASE D52D8D74612B lea r14, ptr [r9+r20*2+0x2b] +XDIS 15f3c: MISC BASE D52D8D74622C lea r14, ptr [r10+r20*2+0x2c] +XDIS 15f42: MISC BASE D52D8D74632D lea r14, ptr [r11+r20*2+0x2d] +XDIS 15f48: MISC BASE D52D8D74642E lea r14, ptr [r12+r20*2+0x2e] +XDIS 15f4e: MISC BASE D52D8D74652F lea r14, ptr [r13+r20*2+0x2f] +XDIS 15f54: MISC BASE D52D8D746630 lea r14, ptr [r14+r20*2+0x30] +XDIS 15f5a: MISC BASE D52D8D746731 lea r14, ptr [r15+r20*2+0x31] +XDIS 15f60: MISC BASE D53C8D746032 lea r14, ptr [r16+r20*2+0x32] +XDIS 15f66: MISC BASE D53C8D746133 lea r14, ptr [r17+r20*2+0x33] +XDIS 15f6c: MISC BASE D53C8D746234 lea r14, ptr [r18+r20*2+0x34] +XDIS 15f72: MISC BASE D53C8D746335 lea r14, ptr [r19+r20*2+0x35] +XDIS 15f78: MISC BASE D53C8D746436 lea r14, ptr [r20+r20*2+0x36] +XDIS 15f7e: MISC BASE D53C8D746537 lea r14, ptr [r21+r20*2+0x37] +XDIS 15f84: MISC BASE D53C8D746638 lea r14, ptr [r22+r20*2+0x38] +XDIS 15f8a: MISC BASE D53C8D746739 lea r14, ptr [r23+r20*2+0x39] +XDIS 15f90: MISC BASE D53D8D74603A lea r14, ptr [r24+r20*2+0x3a] +XDIS 15f96: MISC BASE D53D8D74613B lea r14, ptr [r25+r20*2+0x3b] +XDIS 15f9c: MISC BASE D53D8D74623C lea r14, ptr [r26+r20*2+0x3c] +XDIS 15fa2: MISC BASE D53D8D74633D lea r14, ptr [r27+r20*2+0x3d] +XDIS 15fa8: MISC BASE D53D8D74643E lea r14, ptr [r28+r20*2+0x3e] +XDIS 15fae: MISC BASE D53D8D74653F lea r14, ptr [r29+r20*2+0x3f] +XDIS 15fb4: MISC BASE D53D8D746640 lea r14, ptr [r30+r20*2+0x40] +XDIS 15fba: MISC BASE D53D8D746741 lea r14, ptr [r31+r20*2+0x41] +XDIS 15fc0: MISC BASE D52C8D746823 lea r14, ptr [rax+r21*2+0x23] +XDIS 15fc6: MISC BASE D52C8D746924 lea r14, ptr [rcx+r21*2+0x24] +XDIS 15fcc: MISC BASE D52C8D746A25 lea r14, ptr [rdx+r21*2+0x25] +XDIS 15fd2: MISC BASE D52C8D746B26 lea r14, ptr [rbx+r21*2+0x26] +XDIS 15fd8: MISC BASE D52C8D746C27 lea r14, ptr [rsp+r21*2+0x27] +XDIS 15fde: MISC BASE D52C8D746D28 lea r14, ptr [rbp+r21*2+0x28] +XDIS 15fe4: MISC BASE D52C8D746E29 lea r14, ptr [rsi+r21*2+0x29] +XDIS 15fea: MISC BASE D52C8D746F2A lea r14, ptr [rdi+r21*2+0x2a] +XDIS 15ff0: MISC BASE D52D8D74682B lea r14, ptr [r8+r21*2+0x2b] +XDIS 15ff6: MISC BASE D52D8D74692C lea r14, ptr [r9+r21*2+0x2c] +XDIS 15ffc: MISC BASE D52D8D746A2D lea r14, ptr [r10+r21*2+0x2d] +XDIS 16002: MISC BASE D52D8D746B2E lea r14, ptr [r11+r21*2+0x2e] +XDIS 16008: MISC BASE D52D8D746C2F lea r14, ptr [r12+r21*2+0x2f] +XDIS 1600e: MISC BASE D52D8D746D30 lea r14, ptr [r13+r21*2+0x30] +XDIS 16014: MISC BASE D52D8D746E31 lea r14, ptr [r14+r21*2+0x31] +XDIS 1601a: MISC BASE D52D8D746F32 lea r14, ptr [r15+r21*2+0x32] +XDIS 16020: MISC BASE D53C8D746833 lea r14, ptr [r16+r21*2+0x33] +XDIS 16026: MISC BASE D53C8D746934 lea r14, ptr [r17+r21*2+0x34] +XDIS 1602c: MISC BASE D53C8D746A35 lea r14, ptr [r18+r21*2+0x35] +XDIS 16032: MISC BASE D53C8D746B36 lea r14, ptr [r19+r21*2+0x36] +XDIS 16038: MISC BASE D53C8D746C37 lea r14, ptr [r20+r21*2+0x37] +XDIS 1603e: MISC BASE D53C8D746D38 lea r14, ptr [r21+r21*2+0x38] +XDIS 16044: MISC BASE D53C8D746E39 lea r14, ptr [r22+r21*2+0x39] +XDIS 1604a: MISC BASE D53C8D746F3A lea r14, ptr [r23+r21*2+0x3a] +XDIS 16050: MISC BASE D53D8D74683B lea r14, ptr [r24+r21*2+0x3b] +XDIS 16056: MISC BASE D53D8D74693C lea r14, ptr [r25+r21*2+0x3c] +XDIS 1605c: MISC BASE D53D8D746A3D lea r14, ptr [r26+r21*2+0x3d] +XDIS 16062: MISC BASE D53D8D746B3E lea r14, ptr [r27+r21*2+0x3e] +XDIS 16068: MISC BASE D53D8D746C3F lea r14, ptr [r28+r21*2+0x3f] +XDIS 1606e: MISC BASE D53D8D746D40 lea r14, ptr [r29+r21*2+0x40] +XDIS 16074: MISC BASE D53D8D746E41 lea r14, ptr [r30+r21*2+0x41] +XDIS 1607a: MISC BASE D53D8D746F42 lea r14, ptr [r31+r21*2+0x42] +XDIS 16080: MISC BASE D52C8D747024 lea r14, ptr [rax+r22*2+0x24] +XDIS 16086: MISC BASE D52C8D747125 lea r14, ptr [rcx+r22*2+0x25] +XDIS 1608c: MISC BASE D52C8D747226 lea r14, ptr [rdx+r22*2+0x26] +XDIS 16092: MISC BASE D52C8D747327 lea r14, ptr [rbx+r22*2+0x27] +XDIS 16098: MISC BASE D52C8D747428 lea r14, ptr [rsp+r22*2+0x28] +XDIS 1609e: MISC BASE D52C8D747529 lea r14, ptr [rbp+r22*2+0x29] +XDIS 160a4: MISC BASE D52C8D74762A lea r14, ptr [rsi+r22*2+0x2a] +XDIS 160aa: MISC BASE D52C8D74772B lea r14, ptr [rdi+r22*2+0x2b] +XDIS 160b0: MISC BASE D52D8D74702C lea r14, ptr [r8+r22*2+0x2c] +XDIS 160b6: MISC BASE D52D8D74712D lea r14, ptr [r9+r22*2+0x2d] +XDIS 160bc: MISC BASE D52D8D74722E lea r14, ptr [r10+r22*2+0x2e] +XDIS 160c2: MISC BASE D52D8D74732F lea r14, ptr [r11+r22*2+0x2f] +XDIS 160c8: MISC BASE D52D8D747430 lea r14, ptr [r12+r22*2+0x30] +XDIS 160ce: MISC BASE D52D8D747531 lea r14, ptr [r13+r22*2+0x31] +XDIS 160d4: MISC BASE D52D8D747632 lea r14, ptr [r14+r22*2+0x32] +XDIS 160da: MISC BASE D52D8D747733 lea r14, ptr [r15+r22*2+0x33] +XDIS 160e0: MISC BASE D53C8D747034 lea r14, ptr [r16+r22*2+0x34] +XDIS 160e6: MISC BASE D53C8D747135 lea r14, ptr [r17+r22*2+0x35] +XDIS 160ec: MISC BASE D53C8D747236 lea r14, ptr [r18+r22*2+0x36] +XDIS 160f2: MISC BASE D53C8D747337 lea r14, ptr [r19+r22*2+0x37] +XDIS 160f8: MISC BASE D53C8D747438 lea r14, ptr [r20+r22*2+0x38] +XDIS 160fe: MISC BASE D53C8D747539 lea r14, ptr [r21+r22*2+0x39] +XDIS 16104: MISC BASE D53C8D74763A lea r14, ptr [r22+r22*2+0x3a] +XDIS 1610a: MISC BASE D53C8D74773B lea r14, ptr [r23+r22*2+0x3b] +XDIS 16110: MISC BASE D53D8D74703C lea r14, ptr [r24+r22*2+0x3c] +XDIS 16116: MISC BASE D53D8D74713D lea r14, ptr [r25+r22*2+0x3d] +XDIS 1611c: MISC BASE D53D8D74723E lea r14, ptr [r26+r22*2+0x3e] +XDIS 16122: MISC BASE D53D8D74733F lea r14, ptr [r27+r22*2+0x3f] +XDIS 16128: MISC BASE D53D8D747440 lea r14, ptr [r28+r22*2+0x40] +XDIS 1612e: MISC BASE D53D8D747541 lea r14, ptr [r29+r22*2+0x41] +XDIS 16134: MISC BASE D53D8D747642 lea r14, ptr [r30+r22*2+0x42] +XDIS 1613a: MISC BASE D53D8D747743 lea r14, ptr [r31+r22*2+0x43] +XDIS 16140: MISC BASE D52C8D747825 lea r14, ptr [rax+r23*2+0x25] +XDIS 16146: MISC BASE D52C8D747926 lea r14, ptr [rcx+r23*2+0x26] +XDIS 1614c: MISC BASE D52C8D747A27 lea r14, ptr [rdx+r23*2+0x27] +XDIS 16152: MISC BASE D52C8D747B28 lea r14, ptr [rbx+r23*2+0x28] +XDIS 16158: MISC BASE D52C8D747C29 lea r14, ptr [rsp+r23*2+0x29] +XDIS 1615e: MISC BASE D52C8D747D2A lea r14, ptr [rbp+r23*2+0x2a] +XDIS 16164: MISC BASE D52C8D747E2B lea r14, ptr [rsi+r23*2+0x2b] +XDIS 1616a: MISC BASE D52C8D747F2C lea r14, ptr [rdi+r23*2+0x2c] +XDIS 16170: MISC BASE D52D8D74782D lea r14, ptr [r8+r23*2+0x2d] +XDIS 16176: MISC BASE D52D8D74792E lea r14, ptr [r9+r23*2+0x2e] +XDIS 1617c: MISC BASE D52D8D747A2F lea r14, ptr [r10+r23*2+0x2f] +XDIS 16182: MISC BASE D52D8D747B30 lea r14, ptr [r11+r23*2+0x30] +XDIS 16188: MISC BASE D52D8D747C31 lea r14, ptr [r12+r23*2+0x31] +XDIS 1618e: MISC BASE D52D8D747D32 lea r14, ptr [r13+r23*2+0x32] +XDIS 16194: MISC BASE D52D8D747E33 lea r14, ptr [r14+r23*2+0x33] +XDIS 1619a: MISC BASE D52D8D747F34 lea r14, ptr [r15+r23*2+0x34] +XDIS 161a0: MISC BASE D53C8D747835 lea r14, ptr [r16+r23*2+0x35] +XDIS 161a6: MISC BASE D53C8D747936 lea r14, ptr [r17+r23*2+0x36] +XDIS 161ac: MISC BASE D53C8D747A37 lea r14, ptr [r18+r23*2+0x37] +XDIS 161b2: MISC BASE D53C8D747B38 lea r14, ptr [r19+r23*2+0x38] +XDIS 161b8: MISC BASE D53C8D747C39 lea r14, ptr [r20+r23*2+0x39] +XDIS 161be: MISC BASE D53C8D747D3A lea r14, ptr [r21+r23*2+0x3a] +XDIS 161c4: MISC BASE D53C8D747E3B lea r14, ptr [r22+r23*2+0x3b] +XDIS 161ca: MISC BASE D53C8D747F3C lea r14, ptr [r23+r23*2+0x3c] +XDIS 161d0: MISC BASE D53D8D74783D lea r14, ptr [r24+r23*2+0x3d] +XDIS 161d6: MISC BASE D53D8D74793E lea r14, ptr [r25+r23*2+0x3e] +XDIS 161dc: MISC BASE D53D8D747A3F lea r14, ptr [r26+r23*2+0x3f] +XDIS 161e2: MISC BASE D53D8D747B40 lea r14, ptr [r27+r23*2+0x40] +XDIS 161e8: MISC BASE D53D8D747C41 lea r14, ptr [r28+r23*2+0x41] +XDIS 161ee: MISC BASE D53D8D747D42 lea r14, ptr [r29+r23*2+0x42] +XDIS 161f4: MISC BASE D53D8D747E43 lea r14, ptr [r30+r23*2+0x43] +XDIS 161fa: MISC BASE D53D8D747F44 lea r14, ptr [r31+r23*2+0x44] +XDIS 16200: MISC BASE D52E8D744026 lea r14, ptr [rax+r24*2+0x26] +XDIS 16206: MISC BASE D52E8D744127 lea r14, ptr [rcx+r24*2+0x27] +XDIS 1620c: MISC BASE D52E8D744228 lea r14, ptr [rdx+r24*2+0x28] +XDIS 16212: MISC BASE D52E8D744329 lea r14, ptr [rbx+r24*2+0x29] +XDIS 16218: MISC BASE D52E8D74442A lea r14, ptr [rsp+r24*2+0x2a] +XDIS 1621e: MISC BASE D52E8D74452B lea r14, ptr [rbp+r24*2+0x2b] +XDIS 16224: MISC BASE D52E8D74462C lea r14, ptr [rsi+r24*2+0x2c] +XDIS 1622a: MISC BASE D52E8D74472D lea r14, ptr [rdi+r24*2+0x2d] +XDIS 16230: MISC BASE D52F8D74402E lea r14, ptr [r8+r24*2+0x2e] +XDIS 16236: MISC BASE D52F8D74412F lea r14, ptr [r9+r24*2+0x2f] +XDIS 1623c: MISC BASE D52F8D744230 lea r14, ptr [r10+r24*2+0x30] +XDIS 16242: MISC BASE D52F8D744331 lea r14, ptr [r11+r24*2+0x31] +XDIS 16248: MISC BASE D52F8D744432 lea r14, ptr [r12+r24*2+0x32] +XDIS 1624e: MISC BASE D52F8D744533 lea r14, ptr [r13+r24*2+0x33] +XDIS 16254: MISC BASE D52F8D744634 lea r14, ptr [r14+r24*2+0x34] +XDIS 1625a: MISC BASE D52F8D744735 lea r14, ptr [r15+r24*2+0x35] +XDIS 16260: MISC BASE D53E8D744036 lea r14, ptr [r16+r24*2+0x36] +XDIS 16266: MISC BASE D53E8D744137 lea r14, ptr [r17+r24*2+0x37] +XDIS 1626c: MISC BASE D53E8D744238 lea r14, ptr [r18+r24*2+0x38] +XDIS 16272: MISC BASE D53E8D744339 lea r14, ptr [r19+r24*2+0x39] +XDIS 16278: MISC BASE D53E8D74443A lea r14, ptr [r20+r24*2+0x3a] +XDIS 1627e: MISC BASE D53E8D74453B lea r14, ptr [r21+r24*2+0x3b] +XDIS 16284: MISC BASE D53E8D74463C lea r14, ptr [r22+r24*2+0x3c] +XDIS 1628a: MISC BASE D53E8D74473D lea r14, ptr [r23+r24*2+0x3d] +XDIS 16290: MISC BASE D53F8D74403E lea r14, ptr [r24+r24*2+0x3e] +XDIS 16296: MISC BASE D53F8D74413F lea r14, ptr [r25+r24*2+0x3f] +XDIS 1629c: MISC BASE D53F8D744240 lea r14, ptr [r26+r24*2+0x40] +XDIS 162a2: MISC BASE D53F8D744341 lea r14, ptr [r27+r24*2+0x41] +XDIS 162a8: MISC BASE D53F8D744442 lea r14, ptr [r28+r24*2+0x42] +XDIS 162ae: MISC BASE D53F8D744543 lea r14, ptr [r29+r24*2+0x43] +XDIS 162b4: MISC BASE D53F8D744644 lea r14, ptr [r30+r24*2+0x44] +XDIS 162ba: MISC BASE D53F8D744745 lea r14, ptr [r31+r24*2+0x45] +XDIS 162c0: MISC BASE D52E8D744827 lea r14, ptr [rax+r25*2+0x27] +XDIS 162c6: MISC BASE D52E8D744928 lea r14, ptr [rcx+r25*2+0x28] +XDIS 162cc: MISC BASE D52E8D744A29 lea r14, ptr [rdx+r25*2+0x29] +XDIS 162d2: MISC BASE D52E8D744B2A lea r14, ptr [rbx+r25*2+0x2a] +XDIS 162d8: MISC BASE D52E8D744C2B lea r14, ptr [rsp+r25*2+0x2b] +XDIS 162de: MISC BASE D52E8D744D2C lea r14, ptr [rbp+r25*2+0x2c] +XDIS 162e4: MISC BASE D52E8D744E2D lea r14, ptr [rsi+r25*2+0x2d] +XDIS 162ea: MISC BASE D52E8D744F2E lea r14, ptr [rdi+r25*2+0x2e] +XDIS 162f0: MISC BASE D52F8D74482F lea r14, ptr [r8+r25*2+0x2f] +XDIS 162f6: MISC BASE D52F8D744930 lea r14, ptr [r9+r25*2+0x30] +XDIS 162fc: MISC BASE D52F8D744A31 lea r14, ptr [r10+r25*2+0x31] +XDIS 16302: MISC BASE D52F8D744B32 lea r14, ptr [r11+r25*2+0x32] +XDIS 16308: MISC BASE D52F8D744C33 lea r14, ptr [r12+r25*2+0x33] +XDIS 1630e: MISC BASE D52F8D744D34 lea r14, ptr [r13+r25*2+0x34] +XDIS 16314: MISC BASE D52F8D744E35 lea r14, ptr [r14+r25*2+0x35] +XDIS 1631a: MISC BASE D52F8D744F36 lea r14, ptr [r15+r25*2+0x36] +XDIS 16320: MISC BASE D53E8D744837 lea r14, ptr [r16+r25*2+0x37] +XDIS 16326: MISC BASE D53E8D744938 lea r14, ptr [r17+r25*2+0x38] +XDIS 1632c: MISC BASE D53E8D744A39 lea r14, ptr [r18+r25*2+0x39] +XDIS 16332: MISC BASE D53E8D744B3A lea r14, ptr [r19+r25*2+0x3a] +XDIS 16338: MISC BASE D53E8D744C3B lea r14, ptr [r20+r25*2+0x3b] +XDIS 1633e: MISC BASE D53E8D744D3C lea r14, ptr [r21+r25*2+0x3c] +XDIS 16344: MISC BASE D53E8D744E3D lea r14, ptr [r22+r25*2+0x3d] +XDIS 1634a: MISC BASE D53E8D744F3E lea r14, ptr [r23+r25*2+0x3e] +XDIS 16350: MISC BASE D53F8D74483F lea r14, ptr [r24+r25*2+0x3f] +XDIS 16356: MISC BASE D53F8D744940 lea r14, ptr [r25+r25*2+0x40] +XDIS 1635c: MISC BASE D53F8D744A41 lea r14, ptr [r26+r25*2+0x41] +XDIS 16362: MISC BASE D53F8D744B42 lea r14, ptr [r27+r25*2+0x42] +XDIS 16368: MISC BASE D53F8D744C43 lea r14, ptr [r28+r25*2+0x43] +XDIS 1636e: MISC BASE D53F8D744D44 lea r14, ptr [r29+r25*2+0x44] +XDIS 16374: MISC BASE D53F8D744E45 lea r14, ptr [r30+r25*2+0x45] +XDIS 1637a: MISC BASE D53F8D744F46 lea r14, ptr [r31+r25*2+0x46] +XDIS 16380: MISC BASE D52E8D745028 lea r14, ptr [rax+r26*2+0x28] +XDIS 16386: MISC BASE D52E8D745129 lea r14, ptr [rcx+r26*2+0x29] +XDIS 1638c: MISC BASE D52E8D74522A lea r14, ptr [rdx+r26*2+0x2a] +XDIS 16392: MISC BASE D52E8D74532B lea r14, ptr [rbx+r26*2+0x2b] +XDIS 16398: MISC BASE D52E8D74542C lea r14, ptr [rsp+r26*2+0x2c] +XDIS 1639e: MISC BASE D52E8D74552D lea r14, ptr [rbp+r26*2+0x2d] +XDIS 163a4: MISC BASE D52E8D74562E lea r14, ptr [rsi+r26*2+0x2e] +XDIS 163aa: MISC BASE D52E8D74572F lea r14, ptr [rdi+r26*2+0x2f] +XDIS 163b0: MISC BASE D52F8D745030 lea r14, ptr [r8+r26*2+0x30] +XDIS 163b6: MISC BASE D52F8D745131 lea r14, ptr [r9+r26*2+0x31] +XDIS 163bc: MISC BASE D52F8D745232 lea r14, ptr [r10+r26*2+0x32] +XDIS 163c2: MISC BASE D52F8D745333 lea r14, ptr [r11+r26*2+0x33] +XDIS 163c8: MISC BASE D52F8D745434 lea r14, ptr [r12+r26*2+0x34] +XDIS 163ce: MISC BASE D52F8D745535 lea r14, ptr [r13+r26*2+0x35] +XDIS 163d4: MISC BASE D52F8D745636 lea r14, ptr [r14+r26*2+0x36] +XDIS 163da: MISC BASE D52F8D745737 lea r14, ptr [r15+r26*2+0x37] +XDIS 163e0: MISC BASE D53E8D745038 lea r14, ptr [r16+r26*2+0x38] +XDIS 163e6: MISC BASE D53E8D745139 lea r14, ptr [r17+r26*2+0x39] +XDIS 163ec: MISC BASE D53E8D74523A lea r14, ptr [r18+r26*2+0x3a] +XDIS 163f2: MISC BASE D53E8D74533B lea r14, ptr [r19+r26*2+0x3b] +XDIS 163f8: MISC BASE D53E8D74543C lea r14, ptr [r20+r26*2+0x3c] +XDIS 163fe: MISC BASE D53E8D74553D lea r14, ptr [r21+r26*2+0x3d] +XDIS 16404: MISC BASE D53E8D74563E lea r14, ptr [r22+r26*2+0x3e] +XDIS 1640a: MISC BASE D53E8D74573F lea r14, ptr [r23+r26*2+0x3f] +XDIS 16410: MISC BASE D53F8D745040 lea r14, ptr [r24+r26*2+0x40] +XDIS 16416: MISC BASE D53F8D745141 lea r14, ptr [r25+r26*2+0x41] +XDIS 1641c: MISC BASE D53F8D745242 lea r14, ptr [r26+r26*2+0x42] +XDIS 16422: MISC BASE D53F8D745343 lea r14, ptr [r27+r26*2+0x43] +XDIS 16428: MISC BASE D53F8D745444 lea r14, ptr [r28+r26*2+0x44] +XDIS 1642e: MISC BASE D53F8D745545 lea r14, ptr [r29+r26*2+0x45] +XDIS 16434: MISC BASE D53F8D745646 lea r14, ptr [r30+r26*2+0x46] +XDIS 1643a: MISC BASE D53F8D745747 lea r14, ptr [r31+r26*2+0x47] +XDIS 16440: MISC BASE D52E8D745829 lea r14, ptr [rax+r27*2+0x29] +XDIS 16446: MISC BASE D52E8D74592A lea r14, ptr [rcx+r27*2+0x2a] +XDIS 1644c: MISC BASE D52E8D745A2B lea r14, ptr [rdx+r27*2+0x2b] +XDIS 16452: MISC BASE D52E8D745B2C lea r14, ptr [rbx+r27*2+0x2c] +XDIS 16458: MISC BASE D52E8D745C2D lea r14, ptr [rsp+r27*2+0x2d] +XDIS 1645e: MISC BASE D52E8D745D2E lea r14, ptr [rbp+r27*2+0x2e] +XDIS 16464: MISC BASE D52E8D745E2F lea r14, ptr [rsi+r27*2+0x2f] +XDIS 1646a: MISC BASE D52E8D745F30 lea r14, ptr [rdi+r27*2+0x30] +XDIS 16470: MISC BASE D52F8D745831 lea r14, ptr [r8+r27*2+0x31] +XDIS 16476: MISC BASE D52F8D745932 lea r14, ptr [r9+r27*2+0x32] +XDIS 1647c: MISC BASE D52F8D745A33 lea r14, ptr [r10+r27*2+0x33] +XDIS 16482: MISC BASE D52F8D745B34 lea r14, ptr [r11+r27*2+0x34] +XDIS 16488: MISC BASE D52F8D745C35 lea r14, ptr [r12+r27*2+0x35] +XDIS 1648e: MISC BASE D52F8D745D36 lea r14, ptr [r13+r27*2+0x36] +XDIS 16494: MISC BASE D52F8D745E37 lea r14, ptr [r14+r27*2+0x37] +XDIS 1649a: MISC BASE D52F8D745F38 lea r14, ptr [r15+r27*2+0x38] +XDIS 164a0: MISC BASE D53E8D745839 lea r14, ptr [r16+r27*2+0x39] +XDIS 164a6: MISC BASE D53E8D74593A lea r14, ptr [r17+r27*2+0x3a] +XDIS 164ac: MISC BASE D53E8D745A3B lea r14, ptr [r18+r27*2+0x3b] +XDIS 164b2: MISC BASE D53E8D745B3C lea r14, ptr [r19+r27*2+0x3c] +XDIS 164b8: MISC BASE D53E8D745C3D lea r14, ptr [r20+r27*2+0x3d] +XDIS 164be: MISC BASE D53E8D745D3E lea r14, ptr [r21+r27*2+0x3e] +XDIS 164c4: MISC BASE D53E8D745E3F lea r14, ptr [r22+r27*2+0x3f] +XDIS 164ca: MISC BASE D53E8D745F40 lea r14, ptr [r23+r27*2+0x40] +XDIS 164d0: MISC BASE D53F8D745841 lea r14, ptr [r24+r27*2+0x41] +XDIS 164d6: MISC BASE D53F8D745942 lea r14, ptr [r25+r27*2+0x42] +XDIS 164dc: MISC BASE D53F8D745A43 lea r14, ptr [r26+r27*2+0x43] +XDIS 164e2: MISC BASE D53F8D745B44 lea r14, ptr [r27+r27*2+0x44] +XDIS 164e8: MISC BASE D53F8D745C45 lea r14, ptr [r28+r27*2+0x45] +XDIS 164ee: MISC BASE D53F8D745D46 lea r14, ptr [r29+r27*2+0x46] +XDIS 164f4: MISC BASE D53F8D745E47 lea r14, ptr [r30+r27*2+0x47] +XDIS 164fa: MISC BASE D53F8D745F48 lea r14, ptr [r31+r27*2+0x48] +XDIS 16500: MISC BASE D52E8D74602A lea r14, ptr [rax+r28*2+0x2a] +XDIS 16506: MISC BASE D52E8D74612B lea r14, ptr [rcx+r28*2+0x2b] +XDIS 1650c: MISC BASE D52E8D74622C lea r14, ptr [rdx+r28*2+0x2c] +XDIS 16512: MISC BASE D52E8D74632D lea r14, ptr [rbx+r28*2+0x2d] +XDIS 16518: MISC BASE D52E8D74642E lea r14, ptr [rsp+r28*2+0x2e] +XDIS 1651e: MISC BASE D52E8D74652F lea r14, ptr [rbp+r28*2+0x2f] +XDIS 16524: MISC BASE D52E8D746630 lea r14, ptr [rsi+r28*2+0x30] +XDIS 1652a: MISC BASE D52E8D746731 lea r14, ptr [rdi+r28*2+0x31] +XDIS 16530: MISC BASE D52F8D746032 lea r14, ptr [r8+r28*2+0x32] +XDIS 16536: MISC BASE D52F8D746133 lea r14, ptr [r9+r28*2+0x33] +XDIS 1653c: MISC BASE D52F8D746234 lea r14, ptr [r10+r28*2+0x34] +XDIS 16542: MISC BASE D52F8D746335 lea r14, ptr [r11+r28*2+0x35] +XDIS 16548: MISC BASE D52F8D746436 lea r14, ptr [r12+r28*2+0x36] +XDIS 1654e: MISC BASE D52F8D746537 lea r14, ptr [r13+r28*2+0x37] +XDIS 16554: MISC BASE D52F8D746638 lea r14, ptr [r14+r28*2+0x38] +XDIS 1655a: MISC BASE D52F8D746739 lea r14, ptr [r15+r28*2+0x39] +XDIS 16560: MISC BASE D53E8D74603A lea r14, ptr [r16+r28*2+0x3a] +XDIS 16566: MISC BASE D53E8D74613B lea r14, ptr [r17+r28*2+0x3b] +XDIS 1656c: MISC BASE D53E8D74623C lea r14, ptr [r18+r28*2+0x3c] +XDIS 16572: MISC BASE D53E8D74633D lea r14, ptr [r19+r28*2+0x3d] +XDIS 16578: MISC BASE D53E8D74643E lea r14, ptr [r20+r28*2+0x3e] +XDIS 1657e: MISC BASE D53E8D74653F lea r14, ptr [r21+r28*2+0x3f] +XDIS 16584: MISC BASE D53E8D746640 lea r14, ptr [r22+r28*2+0x40] +XDIS 1658a: MISC BASE D53E8D746741 lea r14, ptr [r23+r28*2+0x41] +XDIS 16590: MISC BASE D53F8D746042 lea r14, ptr [r24+r28*2+0x42] +XDIS 16596: MISC BASE D53F8D746143 lea r14, ptr [r25+r28*2+0x43] +XDIS 1659c: MISC BASE D53F8D746244 lea r14, ptr [r26+r28*2+0x44] +XDIS 165a2: MISC BASE D53F8D746345 lea r14, ptr [r27+r28*2+0x45] +XDIS 165a8: MISC BASE D53F8D746446 lea r14, ptr [r28+r28*2+0x46] +XDIS 165ae: MISC BASE D53F8D746547 lea r14, ptr [r29+r28*2+0x47] +XDIS 165b4: MISC BASE D53F8D746648 lea r14, ptr [r30+r28*2+0x48] +XDIS 165ba: MISC BASE D53F8D746749 lea r14, ptr [r31+r28*2+0x49] +XDIS 165c0: MISC BASE D52E8D74682B lea r14, ptr [rax+r29*2+0x2b] +XDIS 165c6: MISC BASE D52E8D74692C lea r14, ptr [rcx+r29*2+0x2c] +XDIS 165cc: MISC BASE D52E8D746A2D lea r14, ptr [rdx+r29*2+0x2d] +XDIS 165d2: MISC BASE D52E8D746B2E lea r14, ptr [rbx+r29*2+0x2e] +XDIS 165d8: MISC BASE D52E8D746C2F lea r14, ptr [rsp+r29*2+0x2f] +XDIS 165de: MISC BASE D52E8D746D30 lea r14, ptr [rbp+r29*2+0x30] +XDIS 165e4: MISC BASE D52E8D746E31 lea r14, ptr [rsi+r29*2+0x31] +XDIS 165ea: MISC BASE D52E8D746F32 lea r14, ptr [rdi+r29*2+0x32] +XDIS 165f0: MISC BASE D52F8D746833 lea r14, ptr [r8+r29*2+0x33] +XDIS 165f6: MISC BASE D52F8D746934 lea r14, ptr [r9+r29*2+0x34] +XDIS 165fc: MISC BASE D52F8D746A35 lea r14, ptr [r10+r29*2+0x35] +XDIS 16602: MISC BASE D52F8D746B36 lea r14, ptr [r11+r29*2+0x36] +XDIS 16608: MISC BASE D52F8D746C37 lea r14, ptr [r12+r29*2+0x37] +XDIS 1660e: MISC BASE D52F8D746D38 lea r14, ptr [r13+r29*2+0x38] +XDIS 16614: MISC BASE D52F8D746E39 lea r14, ptr [r14+r29*2+0x39] +XDIS 1661a: MISC BASE D52F8D746F3A lea r14, ptr [r15+r29*2+0x3a] +XDIS 16620: MISC BASE D53E8D74683B lea r14, ptr [r16+r29*2+0x3b] +XDIS 16626: MISC BASE D53E8D74693C lea r14, ptr [r17+r29*2+0x3c] +XDIS 1662c: MISC BASE D53E8D746A3D lea r14, ptr [r18+r29*2+0x3d] +XDIS 16632: MISC BASE D53E8D746B3E lea r14, ptr [r19+r29*2+0x3e] +XDIS 16638: MISC BASE D53E8D746C3F lea r14, ptr [r20+r29*2+0x3f] +XDIS 1663e: MISC BASE D53E8D746D40 lea r14, ptr [r21+r29*2+0x40] +XDIS 16644: MISC BASE D53E8D746E41 lea r14, ptr [r22+r29*2+0x41] +XDIS 1664a: MISC BASE D53E8D746F42 lea r14, ptr [r23+r29*2+0x42] +XDIS 16650: MISC BASE D53F8D746843 lea r14, ptr [r24+r29*2+0x43] +XDIS 16656: MISC BASE D53F8D746944 lea r14, ptr [r25+r29*2+0x44] +XDIS 1665c: MISC BASE D53F8D746A45 lea r14, ptr [r26+r29*2+0x45] +XDIS 16662: MISC BASE D53F8D746B46 lea r14, ptr [r27+r29*2+0x46] +XDIS 16668: MISC BASE D53F8D746C47 lea r14, ptr [r28+r29*2+0x47] +XDIS 1666e: MISC BASE D53F8D746D48 lea r14, ptr [r29+r29*2+0x48] +XDIS 16674: MISC BASE D53F8D746E49 lea r14, ptr [r30+r29*2+0x49] +XDIS 1667a: MISC BASE D53F8D746F4A lea r14, ptr [r31+r29*2+0x4a] +XDIS 16680: MISC BASE D52E8D74702C lea r14, ptr [rax+r30*2+0x2c] +XDIS 16686: MISC BASE D52E8D74712D lea r14, ptr [rcx+r30*2+0x2d] +XDIS 1668c: MISC BASE D52E8D74722E lea r14, ptr [rdx+r30*2+0x2e] +XDIS 16692: MISC BASE D52E8D74732F lea r14, ptr [rbx+r30*2+0x2f] +XDIS 16698: MISC BASE D52E8D747430 lea r14, ptr [rsp+r30*2+0x30] +XDIS 1669e: MISC BASE D52E8D747531 lea r14, ptr [rbp+r30*2+0x31] +XDIS 166a4: MISC BASE D52E8D747632 lea r14, ptr [rsi+r30*2+0x32] +XDIS 166aa: MISC BASE D52E8D747733 lea r14, ptr [rdi+r30*2+0x33] +XDIS 166b0: MISC BASE D52F8D747034 lea r14, ptr [r8+r30*2+0x34] +XDIS 166b6: MISC BASE D52F8D747135 lea r14, ptr [r9+r30*2+0x35] +XDIS 166bc: MISC BASE D52F8D747236 lea r14, ptr [r10+r30*2+0x36] +XDIS 166c2: MISC BASE D52F8D747337 lea r14, ptr [r11+r30*2+0x37] +XDIS 166c8: MISC BASE D52F8D747438 lea r14, ptr [r12+r30*2+0x38] +XDIS 166ce: MISC BASE D52F8D747539 lea r14, ptr [r13+r30*2+0x39] +XDIS 166d4: MISC BASE D52F8D74763A lea r14, ptr [r14+r30*2+0x3a] +XDIS 166da: MISC BASE D52F8D74773B lea r14, ptr [r15+r30*2+0x3b] +XDIS 166e0: MISC BASE D53E8D74703C lea r14, ptr [r16+r30*2+0x3c] +XDIS 166e6: MISC BASE D53E8D74713D lea r14, ptr [r17+r30*2+0x3d] +XDIS 166ec: MISC BASE D53E8D74723E lea r14, ptr [r18+r30*2+0x3e] +XDIS 166f2: MISC BASE D53E8D74733F lea r14, ptr [r19+r30*2+0x3f] +XDIS 166f8: MISC BASE D53E8D747440 lea r14, ptr [r20+r30*2+0x40] +XDIS 166fe: MISC BASE D53E8D747541 lea r14, ptr [r21+r30*2+0x41] +XDIS 16704: MISC BASE D53E8D747642 lea r14, ptr [r22+r30*2+0x42] +XDIS 1670a: MISC BASE D53E8D747743 lea r14, ptr [r23+r30*2+0x43] +XDIS 16710: MISC BASE D53F8D747044 lea r14, ptr [r24+r30*2+0x44] +XDIS 16716: MISC BASE D53F8D747145 lea r14, ptr [r25+r30*2+0x45] +XDIS 1671c: MISC BASE D53F8D747246 lea r14, ptr [r26+r30*2+0x46] +XDIS 16722: MISC BASE D53F8D747347 lea r14, ptr [r27+r30*2+0x47] +XDIS 16728: MISC BASE D53F8D747448 lea r14, ptr [r28+r30*2+0x48] +XDIS 1672e: MISC BASE D53F8D747549 lea r14, ptr [r29+r30*2+0x49] +XDIS 16734: MISC BASE D53F8D74764A lea r14, ptr [r30+r30*2+0x4a] +XDIS 1673a: MISC BASE D53F8D74774B lea r14, ptr [r31+r30*2+0x4b] +XDIS 16740: MISC BASE D52E8D74782D lea r14, ptr [rax+r31*2+0x2d] +XDIS 16746: MISC BASE D52E8D74792E lea r14, ptr [rcx+r31*2+0x2e] +XDIS 1674c: MISC BASE D52E8D747A2F lea r14, ptr [rdx+r31*2+0x2f] +XDIS 16752: MISC BASE D52E8D747B30 lea r14, ptr [rbx+r31*2+0x30] +XDIS 16758: MISC BASE D52E8D747C31 lea r14, ptr [rsp+r31*2+0x31] +XDIS 1675e: MISC BASE D52E8D747D32 lea r14, ptr [rbp+r31*2+0x32] +XDIS 16764: MISC BASE D52E8D747E33 lea r14, ptr [rsi+r31*2+0x33] +XDIS 1676a: MISC BASE D52E8D747F34 lea r14, ptr [rdi+r31*2+0x34] +XDIS 16770: MISC BASE D52F8D747835 lea r14, ptr [r8+r31*2+0x35] +XDIS 16776: MISC BASE D52F8D747936 lea r14, ptr [r9+r31*2+0x36] +XDIS 1677c: MISC BASE D52F8D747A37 lea r14, ptr [r10+r31*2+0x37] +XDIS 16782: MISC BASE D52F8D747B38 lea r14, ptr [r11+r31*2+0x38] +XDIS 16788: MISC BASE D52F8D747C39 lea r14, ptr [r12+r31*2+0x39] +XDIS 1678e: MISC BASE D52F8D747D3A lea r14, ptr [r13+r31*2+0x3a] +XDIS 16794: MISC BASE D52F8D747E3B lea r14, ptr [r14+r31*2+0x3b] +XDIS 1679a: MISC BASE D52F8D747F3C lea r14, ptr [r15+r31*2+0x3c] +XDIS 167a0: MISC BASE D53E8D74783D lea r14, ptr [r16+r31*2+0x3d] +XDIS 167a6: MISC BASE D53E8D74793E lea r14, ptr [r17+r31*2+0x3e] +XDIS 167ac: MISC BASE D53E8D747A3F lea r14, ptr [r18+r31*2+0x3f] +XDIS 167b2: MISC BASE D53E8D747B40 lea r14, ptr [r19+r31*2+0x40] +XDIS 167b8: MISC BASE D53E8D747C41 lea r14, ptr [r20+r31*2+0x41] +XDIS 167be: MISC BASE D53E8D747D42 lea r14, ptr [r21+r31*2+0x42] +XDIS 167c4: MISC BASE D53E8D747E43 lea r14, ptr [r22+r31*2+0x43] +XDIS 167ca: MISC BASE D53E8D747F44 lea r14, ptr [r23+r31*2+0x44] +XDIS 167d0: MISC BASE D53F8D747845 lea r14, ptr [r24+r31*2+0x45] +XDIS 167d6: MISC BASE D53F8D747946 lea r14, ptr [r25+r31*2+0x46] +XDIS 167dc: MISC BASE D53F8D747A47 lea r14, ptr [r26+r31*2+0x47] +XDIS 167e2: MISC BASE D53F8D747B48 lea r14, ptr [r27+r31*2+0x48] +XDIS 167e8: MISC BASE D53F8D747C49 lea r14, ptr [r28+r31*2+0x49] +XDIS 167ee: MISC BASE D53F8D747D4A lea r14, ptr [r29+r31*2+0x4a] +XDIS 167f4: MISC BASE D53F8D747E4B lea r14, ptr [r30+r31*2+0x4b] +XDIS 167fa: MISC BASE D53F8D747F4C lea r14, ptr [r31+r31*2+0x4c] +XDIS 16800: MISC BASE D50C8D7C400F lea r15, ptr [rax+rax*2+0xf] +XDIS 16806: MISC BASE D50C8D7C4110 lea r15, ptr [rcx+rax*2+0x10] +XDIS 1680c: MISC BASE D50C8D7C4211 lea r15, ptr [rdx+rax*2+0x11] +XDIS 16812: MISC BASE D50C8D7C4312 lea r15, ptr [rbx+rax*2+0x12] +XDIS 16818: MISC BASE D50C8D7C4413 lea r15, ptr [rsp+rax*2+0x13] +XDIS 1681e: MISC BASE D50C8D7C4514 lea r15, ptr [rbp+rax*2+0x14] +XDIS 16824: MISC BASE D50C8D7C4615 lea r15, ptr [rsi+rax*2+0x15] +XDIS 1682a: MISC BASE D50C8D7C4716 lea r15, ptr [rdi+rax*2+0x16] +XDIS 16830: MISC BASE D50D8D7C4017 lea r15, ptr [r8+rax*2+0x17] +XDIS 16836: MISC BASE D50D8D7C4118 lea r15, ptr [r9+rax*2+0x18] +XDIS 1683c: MISC BASE D50D8D7C4219 lea r15, ptr [r10+rax*2+0x19] +XDIS 16842: MISC BASE D50D8D7C431A lea r15, ptr [r11+rax*2+0x1a] +XDIS 16848: MISC BASE D50D8D7C441B lea r15, ptr [r12+rax*2+0x1b] +XDIS 1684e: MISC BASE D50D8D7C451C lea r15, ptr [r13+rax*2+0x1c] +XDIS 16854: MISC BASE D50D8D7C461D lea r15, ptr [r14+rax*2+0x1d] +XDIS 1685a: MISC BASE D50D8D7C471E lea r15, ptr [r15+rax*2+0x1e] +XDIS 16860: MISC BASE D51C8D7C401F lea r15, ptr [r16+rax*2+0x1f] +XDIS 16866: MISC BASE D51C8D7C4120 lea r15, ptr [r17+rax*2+0x20] +XDIS 1686c: MISC BASE D51C8D7C4221 lea r15, ptr [r18+rax*2+0x21] +XDIS 16872: MISC BASE D51C8D7C4322 lea r15, ptr [r19+rax*2+0x22] +XDIS 16878: MISC BASE D51C8D7C4423 lea r15, ptr [r20+rax*2+0x23] +XDIS 1687e: MISC BASE D51C8D7C4524 lea r15, ptr [r21+rax*2+0x24] +XDIS 16884: MISC BASE D51C8D7C4625 lea r15, ptr [r22+rax*2+0x25] +XDIS 1688a: MISC BASE D51C8D7C4726 lea r15, ptr [r23+rax*2+0x26] +XDIS 16890: MISC BASE D51D8D7C4027 lea r15, ptr [r24+rax*2+0x27] +XDIS 16896: MISC BASE D51D8D7C4128 lea r15, ptr [r25+rax*2+0x28] +XDIS 1689c: MISC BASE D51D8D7C4229 lea r15, ptr [r26+rax*2+0x29] +XDIS 168a2: MISC BASE D51D8D7C432A lea r15, ptr [r27+rax*2+0x2a] +XDIS 168a8: MISC BASE D51D8D7C442B lea r15, ptr [r28+rax*2+0x2b] +XDIS 168ae: MISC BASE D51D8D7C452C lea r15, ptr [r29+rax*2+0x2c] +XDIS 168b4: MISC BASE D51D8D7C462D lea r15, ptr [r30+rax*2+0x2d] +XDIS 168ba: MISC BASE D51D8D7C472E lea r15, ptr [r31+rax*2+0x2e] +XDIS 168c0: MISC BASE D50C8D7C4810 lea r15, ptr [rax+rcx*2+0x10] +XDIS 168c6: MISC BASE D50C8D7C4911 lea r15, ptr [rcx+rcx*2+0x11] +XDIS 168cc: MISC BASE D50C8D7C4A12 lea r15, ptr [rdx+rcx*2+0x12] +XDIS 168d2: MISC BASE D50C8D7C4B13 lea r15, ptr [rbx+rcx*2+0x13] +XDIS 168d8: MISC BASE D50C8D7C4C14 lea r15, ptr [rsp+rcx*2+0x14] +XDIS 168de: MISC BASE D50C8D7C4D15 lea r15, ptr [rbp+rcx*2+0x15] +XDIS 168e4: MISC BASE D50C8D7C4E16 lea r15, ptr [rsi+rcx*2+0x16] +XDIS 168ea: MISC BASE D50C8D7C4F17 lea r15, ptr [rdi+rcx*2+0x17] +XDIS 168f0: MISC BASE D50D8D7C4818 lea r15, ptr [r8+rcx*2+0x18] +XDIS 168f6: MISC BASE D50D8D7C4919 lea r15, ptr [r9+rcx*2+0x19] +XDIS 168fc: MISC BASE D50D8D7C4A1A lea r15, ptr [r10+rcx*2+0x1a] +XDIS 16902: MISC BASE D50D8D7C4B1B lea r15, ptr [r11+rcx*2+0x1b] +XDIS 16908: MISC BASE D50D8D7C4C1C lea r15, ptr [r12+rcx*2+0x1c] +XDIS 1690e: MISC BASE D50D8D7C4D1D lea r15, ptr [r13+rcx*2+0x1d] +XDIS 16914: MISC BASE D50D8D7C4E1E lea r15, ptr [r14+rcx*2+0x1e] +XDIS 1691a: MISC BASE D50D8D7C4F1F lea r15, ptr [r15+rcx*2+0x1f] +XDIS 16920: MISC BASE D51C8D7C4820 lea r15, ptr [r16+rcx*2+0x20] +XDIS 16926: MISC BASE D51C8D7C4921 lea r15, ptr [r17+rcx*2+0x21] +XDIS 1692c: MISC BASE D51C8D7C4A22 lea r15, ptr [r18+rcx*2+0x22] +XDIS 16932: MISC BASE D51C8D7C4B23 lea r15, ptr [r19+rcx*2+0x23] +XDIS 16938: MISC BASE D51C8D7C4C24 lea r15, ptr [r20+rcx*2+0x24] +XDIS 1693e: MISC BASE D51C8D7C4D25 lea r15, ptr [r21+rcx*2+0x25] +XDIS 16944: MISC BASE D51C8D7C4E26 lea r15, ptr [r22+rcx*2+0x26] +XDIS 1694a: MISC BASE D51C8D7C4F27 lea r15, ptr [r23+rcx*2+0x27] +XDIS 16950: MISC BASE D51D8D7C4828 lea r15, ptr [r24+rcx*2+0x28] +XDIS 16956: MISC BASE D51D8D7C4929 lea r15, ptr [r25+rcx*2+0x29] +XDIS 1695c: MISC BASE D51D8D7C4A2A lea r15, ptr [r26+rcx*2+0x2a] +XDIS 16962: MISC BASE D51D8D7C4B2B lea r15, ptr [r27+rcx*2+0x2b] +XDIS 16968: MISC BASE D51D8D7C4C2C lea r15, ptr [r28+rcx*2+0x2c] +XDIS 1696e: MISC BASE D51D8D7C4D2D lea r15, ptr [r29+rcx*2+0x2d] +XDIS 16974: MISC BASE D51D8D7C4E2E lea r15, ptr [r30+rcx*2+0x2e] +XDIS 1697a: MISC BASE D51D8D7C4F2F lea r15, ptr [r31+rcx*2+0x2f] +XDIS 16980: MISC BASE D50C8D7C5011 lea r15, ptr [rax+rdx*2+0x11] +XDIS 16986: MISC BASE D50C8D7C5112 lea r15, ptr [rcx+rdx*2+0x12] +XDIS 1698c: MISC BASE D50C8D7C5213 lea r15, ptr [rdx+rdx*2+0x13] +XDIS 16992: MISC BASE D50C8D7C5314 lea r15, ptr [rbx+rdx*2+0x14] +XDIS 16998: MISC BASE D50C8D7C5415 lea r15, ptr [rsp+rdx*2+0x15] +XDIS 1699e: MISC BASE D50C8D7C5516 lea r15, ptr [rbp+rdx*2+0x16] +XDIS 169a4: MISC BASE D50C8D7C5617 lea r15, ptr [rsi+rdx*2+0x17] +XDIS 169aa: MISC BASE D50C8D7C5718 lea r15, ptr [rdi+rdx*2+0x18] +XDIS 169b0: MISC BASE D50D8D7C5019 lea r15, ptr [r8+rdx*2+0x19] +XDIS 169b6: MISC BASE D50D8D7C511A lea r15, ptr [r9+rdx*2+0x1a] +XDIS 169bc: MISC BASE D50D8D7C521B lea r15, ptr [r10+rdx*2+0x1b] +XDIS 169c2: MISC BASE D50D8D7C531C lea r15, ptr [r11+rdx*2+0x1c] +XDIS 169c8: MISC BASE D50D8D7C541D lea r15, ptr [r12+rdx*2+0x1d] +XDIS 169ce: MISC BASE D50D8D7C551E lea r15, ptr [r13+rdx*2+0x1e] +XDIS 169d4: MISC BASE D50D8D7C561F lea r15, ptr [r14+rdx*2+0x1f] +XDIS 169da: MISC BASE D50D8D7C5720 lea r15, ptr [r15+rdx*2+0x20] +XDIS 169e0: MISC BASE D51C8D7C5021 lea r15, ptr [r16+rdx*2+0x21] +XDIS 169e6: MISC BASE D51C8D7C5122 lea r15, ptr [r17+rdx*2+0x22] +XDIS 169ec: MISC BASE D51C8D7C5223 lea r15, ptr [r18+rdx*2+0x23] +XDIS 169f2: MISC BASE D51C8D7C5324 lea r15, ptr [r19+rdx*2+0x24] +XDIS 169f8: MISC BASE D51C8D7C5425 lea r15, ptr [r20+rdx*2+0x25] +XDIS 169fe: MISC BASE D51C8D7C5526 lea r15, ptr [r21+rdx*2+0x26] +XDIS 16a04: MISC BASE D51C8D7C5627 lea r15, ptr [r22+rdx*2+0x27] +XDIS 16a0a: MISC BASE D51C8D7C5728 lea r15, ptr [r23+rdx*2+0x28] +XDIS 16a10: MISC BASE D51D8D7C5029 lea r15, ptr [r24+rdx*2+0x29] +XDIS 16a16: MISC BASE D51D8D7C512A lea r15, ptr [r25+rdx*2+0x2a] +XDIS 16a1c: MISC BASE D51D8D7C522B lea r15, ptr [r26+rdx*2+0x2b] +XDIS 16a22: MISC BASE D51D8D7C532C lea r15, ptr [r27+rdx*2+0x2c] +XDIS 16a28: MISC BASE D51D8D7C542D lea r15, ptr [r28+rdx*2+0x2d] +XDIS 16a2e: MISC BASE D51D8D7C552E lea r15, ptr [r29+rdx*2+0x2e] +XDIS 16a34: MISC BASE D51D8D7C562F lea r15, ptr [r30+rdx*2+0x2f] +XDIS 16a3a: MISC BASE D51D8D7C5730 lea r15, ptr [r31+rdx*2+0x30] +XDIS 16a40: MISC BASE D50C8D7C5812 lea r15, ptr [rax+rbx*2+0x12] +XDIS 16a46: MISC BASE D50C8D7C5913 lea r15, ptr [rcx+rbx*2+0x13] +XDIS 16a4c: MISC BASE D50C8D7C5A14 lea r15, ptr [rdx+rbx*2+0x14] +XDIS 16a52: MISC BASE D50C8D7C5B15 lea r15, ptr [rbx+rbx*2+0x15] +XDIS 16a58: MISC BASE D50C8D7C5C16 lea r15, ptr [rsp+rbx*2+0x16] +XDIS 16a5e: MISC BASE D50C8D7C5D17 lea r15, ptr [rbp+rbx*2+0x17] +XDIS 16a64: MISC BASE D50C8D7C5E18 lea r15, ptr [rsi+rbx*2+0x18] +XDIS 16a6a: MISC BASE D50C8D7C5F19 lea r15, ptr [rdi+rbx*2+0x19] +XDIS 16a70: MISC BASE D50D8D7C581A lea r15, ptr [r8+rbx*2+0x1a] +XDIS 16a76: MISC BASE D50D8D7C591B lea r15, ptr [r9+rbx*2+0x1b] +XDIS 16a7c: MISC BASE D50D8D7C5A1C lea r15, ptr [r10+rbx*2+0x1c] +XDIS 16a82: MISC BASE D50D8D7C5B1D lea r15, ptr [r11+rbx*2+0x1d] +XDIS 16a88: MISC BASE D50D8D7C5C1E lea r15, ptr [r12+rbx*2+0x1e] +XDIS 16a8e: MISC BASE D50D8D7C5D1F lea r15, ptr [r13+rbx*2+0x1f] +XDIS 16a94: MISC BASE D50D8D7C5E20 lea r15, ptr [r14+rbx*2+0x20] +XDIS 16a9a: MISC BASE D50D8D7C5F21 lea r15, ptr [r15+rbx*2+0x21] +XDIS 16aa0: MISC BASE D51C8D7C5822 lea r15, ptr [r16+rbx*2+0x22] +XDIS 16aa6: MISC BASE D51C8D7C5923 lea r15, ptr [r17+rbx*2+0x23] +XDIS 16aac: MISC BASE D51C8D7C5A24 lea r15, ptr [r18+rbx*2+0x24] +XDIS 16ab2: MISC BASE D51C8D7C5B25 lea r15, ptr [r19+rbx*2+0x25] +XDIS 16ab8: MISC BASE D51C8D7C5C26 lea r15, ptr [r20+rbx*2+0x26] +XDIS 16abe: MISC BASE D51C8D7C5D27 lea r15, ptr [r21+rbx*2+0x27] +XDIS 16ac4: MISC BASE D51C8D7C5E28 lea r15, ptr [r22+rbx*2+0x28] +XDIS 16aca: MISC BASE D51C8D7C5F29 lea r15, ptr [r23+rbx*2+0x29] +XDIS 16ad0: MISC BASE D51D8D7C582A lea r15, ptr [r24+rbx*2+0x2a] +XDIS 16ad6: MISC BASE D51D8D7C592B lea r15, ptr [r25+rbx*2+0x2b] +XDIS 16adc: MISC BASE D51D8D7C5A2C lea r15, ptr [r26+rbx*2+0x2c] +XDIS 16ae2: MISC BASE D51D8D7C5B2D lea r15, ptr [r27+rbx*2+0x2d] +XDIS 16ae8: MISC BASE D51D8D7C5C2E lea r15, ptr [r28+rbx*2+0x2e] +XDIS 16aee: MISC BASE D51D8D7C5D2F lea r15, ptr [r29+rbx*2+0x2f] +XDIS 16af4: MISC BASE D51D8D7C5E30 lea r15, ptr [r30+rbx*2+0x30] +XDIS 16afa: MISC BASE D51D8D7C5F31 lea r15, ptr [r31+rbx*2+0x31] +XDIS 16b00: MISC BASE D50C8D7C6013 lea r15, ptr [rax+0x13] +XDIS 16b06: MISC BASE D50C8D7C6114 lea r15, ptr [rcx+0x14] +XDIS 16b0c: MISC BASE D50C8D7C6215 lea r15, ptr [rdx+0x15] +XDIS 16b12: MISC BASE D50C8D7C6316 lea r15, ptr [rbx+0x16] +XDIS 16b18: MISC BASE D50C8D7C6417 lea r15, ptr [rsp+0x17] +XDIS 16b1e: MISC BASE D50C8D7C6518 lea r15, ptr [rbp+0x18] +XDIS 16b24: MISC BASE D50C8D7C6619 lea r15, ptr [rsi+0x19] +XDIS 16b2a: MISC BASE D50C8D7C671A lea r15, ptr [rdi+0x1a] +XDIS 16b30: MISC BASE D50D8D7C601B lea r15, ptr [r8+0x1b] +XDIS 16b36: MISC BASE D50D8D7C611C lea r15, ptr [r9+0x1c] +XDIS 16b3c: MISC BASE D50D8D7C621D lea r15, ptr [r10+0x1d] +XDIS 16b42: MISC BASE D50D8D7C631E lea r15, ptr [r11+0x1e] +XDIS 16b48: MISC BASE D50D8D7C641F lea r15, ptr [r12+0x1f] +XDIS 16b4e: MISC BASE D50D8D7C6520 lea r15, ptr [r13+0x20] +XDIS 16b54: MISC BASE D50D8D7C6621 lea r15, ptr [r14+0x21] +XDIS 16b5a: MISC BASE D50D8D7C6722 lea r15, ptr [r15+0x22] +XDIS 16b60: MISC BASE D51C8D7C6023 lea r15, ptr [r16+0x23] +XDIS 16b66: MISC BASE D51C8D7C6124 lea r15, ptr [r17+0x24] +XDIS 16b6c: MISC BASE D51C8D7C6225 lea r15, ptr [r18+0x25] +XDIS 16b72: MISC BASE D51C8D7C6326 lea r15, ptr [r19+0x26] +XDIS 16b78: MISC BASE D51C8D7C6427 lea r15, ptr [r20+0x27] +XDIS 16b7e: MISC BASE D51C8D7C6528 lea r15, ptr [r21+0x28] +XDIS 16b84: MISC BASE D51C8D7C6629 lea r15, ptr [r22+0x29] +XDIS 16b8a: MISC BASE D51C8D7C672A lea r15, ptr [r23+0x2a] +XDIS 16b90: MISC BASE D51D8D7C602B lea r15, ptr [r24+0x2b] +XDIS 16b96: MISC BASE D51D8D7C612C lea r15, ptr [r25+0x2c] +XDIS 16b9c: MISC BASE D51D8D7C622D lea r15, ptr [r26+0x2d] +XDIS 16ba2: MISC BASE D51D8D7C632E lea r15, ptr [r27+0x2e] +XDIS 16ba8: MISC BASE D51D8D7C642F lea r15, ptr [r28+0x2f] +XDIS 16bae: MISC BASE D51D8D7C6530 lea r15, ptr [r29+0x30] +XDIS 16bb4: MISC BASE D51D8D7C6631 lea r15, ptr [r30+0x31] +XDIS 16bba: MISC BASE D51D8D7C6732 lea r15, ptr [r31+0x32] +XDIS 16bc0: MISC BASE D50C8D7C6814 lea r15, ptr [rax+rbp*2+0x14] +XDIS 16bc6: MISC BASE D50C8D7C6915 lea r15, ptr [rcx+rbp*2+0x15] +XDIS 16bcc: MISC BASE D50C8D7C6A16 lea r15, ptr [rdx+rbp*2+0x16] +XDIS 16bd2: MISC BASE D50C8D7C6B17 lea r15, ptr [rbx+rbp*2+0x17] +XDIS 16bd8: MISC BASE D50C8D7C6C18 lea r15, ptr [rsp+rbp*2+0x18] +XDIS 16bde: MISC BASE D50C8D7C6D19 lea r15, ptr [rbp+rbp*2+0x19] +XDIS 16be4: MISC BASE D50C8D7C6E1A lea r15, ptr [rsi+rbp*2+0x1a] +XDIS 16bea: MISC BASE D50C8D7C6F1B lea r15, ptr [rdi+rbp*2+0x1b] +XDIS 16bf0: MISC BASE D50D8D7C681C lea r15, ptr [r8+rbp*2+0x1c] +XDIS 16bf6: MISC BASE D50D8D7C691D lea r15, ptr [r9+rbp*2+0x1d] +XDIS 16bfc: MISC BASE D50D8D7C6A1E lea r15, ptr [r10+rbp*2+0x1e] +XDIS 16c02: MISC BASE D50D8D7C6B1F lea r15, ptr [r11+rbp*2+0x1f] +XDIS 16c08: MISC BASE D50D8D7C6C20 lea r15, ptr [r12+rbp*2+0x20] +XDIS 16c0e: MISC BASE D50D8D7C6D21 lea r15, ptr [r13+rbp*2+0x21] +XDIS 16c14: MISC BASE D50D8D7C6E22 lea r15, ptr [r14+rbp*2+0x22] +XDIS 16c1a: MISC BASE D50D8D7C6F23 lea r15, ptr [r15+rbp*2+0x23] +XDIS 16c20: MISC BASE D51C8D7C6824 lea r15, ptr [r16+rbp*2+0x24] +XDIS 16c26: MISC BASE D51C8D7C6925 lea r15, ptr [r17+rbp*2+0x25] +XDIS 16c2c: MISC BASE D51C8D7C6A26 lea r15, ptr [r18+rbp*2+0x26] +XDIS 16c32: MISC BASE D51C8D7C6B27 lea r15, ptr [r19+rbp*2+0x27] +XDIS 16c38: MISC BASE D51C8D7C6C28 lea r15, ptr [r20+rbp*2+0x28] +XDIS 16c3e: MISC BASE D51C8D7C6D29 lea r15, ptr [r21+rbp*2+0x29] +XDIS 16c44: MISC BASE D51C8D7C6E2A lea r15, ptr [r22+rbp*2+0x2a] +XDIS 16c4a: MISC BASE D51C8D7C6F2B lea r15, ptr [r23+rbp*2+0x2b] +XDIS 16c50: MISC BASE D51D8D7C682C lea r15, ptr [r24+rbp*2+0x2c] +XDIS 16c56: MISC BASE D51D8D7C692D lea r15, ptr [r25+rbp*2+0x2d] +XDIS 16c5c: MISC BASE D51D8D7C6A2E lea r15, ptr [r26+rbp*2+0x2e] +XDIS 16c62: MISC BASE D51D8D7C6B2F lea r15, ptr [r27+rbp*2+0x2f] +XDIS 16c68: MISC BASE D51D8D7C6C30 lea r15, ptr [r28+rbp*2+0x30] +XDIS 16c6e: MISC BASE D51D8D7C6D31 lea r15, ptr [r29+rbp*2+0x31] +XDIS 16c74: MISC BASE D51D8D7C6E32 lea r15, ptr [r30+rbp*2+0x32] +XDIS 16c7a: MISC BASE D51D8D7C6F33 lea r15, ptr [r31+rbp*2+0x33] +XDIS 16c80: MISC BASE D50C8D7C7015 lea r15, ptr [rax+rsi*2+0x15] +XDIS 16c86: MISC BASE D50C8D7C7116 lea r15, ptr [rcx+rsi*2+0x16] +XDIS 16c8c: MISC BASE D50C8D7C7217 lea r15, ptr [rdx+rsi*2+0x17] +XDIS 16c92: MISC BASE D50C8D7C7318 lea r15, ptr [rbx+rsi*2+0x18] +XDIS 16c98: MISC BASE D50C8D7C7419 lea r15, ptr [rsp+rsi*2+0x19] +XDIS 16c9e: MISC BASE D50C8D7C751A lea r15, ptr [rbp+rsi*2+0x1a] +XDIS 16ca4: MISC BASE D50C8D7C761B lea r15, ptr [rsi+rsi*2+0x1b] +XDIS 16caa: MISC BASE D50C8D7C771C lea r15, ptr [rdi+rsi*2+0x1c] +XDIS 16cb0: MISC BASE D50D8D7C701D lea r15, ptr [r8+rsi*2+0x1d] +XDIS 16cb6: MISC BASE D50D8D7C711E lea r15, ptr [r9+rsi*2+0x1e] +XDIS 16cbc: MISC BASE D50D8D7C721F lea r15, ptr [r10+rsi*2+0x1f] +XDIS 16cc2: MISC BASE D50D8D7C7320 lea r15, ptr [r11+rsi*2+0x20] +XDIS 16cc8: MISC BASE D50D8D7C7421 lea r15, ptr [r12+rsi*2+0x21] +XDIS 16cce: MISC BASE D50D8D7C7522 lea r15, ptr [r13+rsi*2+0x22] +XDIS 16cd4: MISC BASE D50D8D7C7623 lea r15, ptr [r14+rsi*2+0x23] +XDIS 16cda: MISC BASE D50D8D7C7724 lea r15, ptr [r15+rsi*2+0x24] +XDIS 16ce0: MISC BASE D51C8D7C7025 lea r15, ptr [r16+rsi*2+0x25] +XDIS 16ce6: MISC BASE D51C8D7C7126 lea r15, ptr [r17+rsi*2+0x26] +XDIS 16cec: MISC BASE D51C8D7C7227 lea r15, ptr [r18+rsi*2+0x27] +XDIS 16cf2: MISC BASE D51C8D7C7328 lea r15, ptr [r19+rsi*2+0x28] +XDIS 16cf8: MISC BASE D51C8D7C7429 lea r15, ptr [r20+rsi*2+0x29] +XDIS 16cfe: MISC BASE D51C8D7C752A lea r15, ptr [r21+rsi*2+0x2a] +XDIS 16d04: MISC BASE D51C8D7C762B lea r15, ptr [r22+rsi*2+0x2b] +XDIS 16d0a: MISC BASE D51C8D7C772C lea r15, ptr [r23+rsi*2+0x2c] +XDIS 16d10: MISC BASE D51D8D7C702D lea r15, ptr [r24+rsi*2+0x2d] +XDIS 16d16: MISC BASE D51D8D7C712E lea r15, ptr [r25+rsi*2+0x2e] +XDIS 16d1c: MISC BASE D51D8D7C722F lea r15, ptr [r26+rsi*2+0x2f] +XDIS 16d22: MISC BASE D51D8D7C7330 lea r15, ptr [r27+rsi*2+0x30] +XDIS 16d28: MISC BASE D51D8D7C7431 lea r15, ptr [r28+rsi*2+0x31] +XDIS 16d2e: MISC BASE D51D8D7C7532 lea r15, ptr [r29+rsi*2+0x32] +XDIS 16d34: MISC BASE D51D8D7C7633 lea r15, ptr [r30+rsi*2+0x33] +XDIS 16d3a: MISC BASE D51D8D7C7734 lea r15, ptr [r31+rsi*2+0x34] +XDIS 16d40: MISC BASE D50C8D7C7816 lea r15, ptr [rax+rdi*2+0x16] +XDIS 16d46: MISC BASE D50C8D7C7917 lea r15, ptr [rcx+rdi*2+0x17] +XDIS 16d4c: MISC BASE D50C8D7C7A18 lea r15, ptr [rdx+rdi*2+0x18] +XDIS 16d52: MISC BASE D50C8D7C7B19 lea r15, ptr [rbx+rdi*2+0x19] +XDIS 16d58: MISC BASE D50C8D7C7C1A lea r15, ptr [rsp+rdi*2+0x1a] +XDIS 16d5e: MISC BASE D50C8D7C7D1B lea r15, ptr [rbp+rdi*2+0x1b] +XDIS 16d64: MISC BASE D50C8D7C7E1C lea r15, ptr [rsi+rdi*2+0x1c] +XDIS 16d6a: MISC BASE D50C8D7C7F1D lea r15, ptr [rdi+rdi*2+0x1d] +XDIS 16d70: MISC BASE D50D8D7C781E lea r15, ptr [r8+rdi*2+0x1e] +XDIS 16d76: MISC BASE D50D8D7C791F lea r15, ptr [r9+rdi*2+0x1f] +XDIS 16d7c: MISC BASE D50D8D7C7A20 lea r15, ptr [r10+rdi*2+0x20] +XDIS 16d82: MISC BASE D50D8D7C7B21 lea r15, ptr [r11+rdi*2+0x21] +XDIS 16d88: MISC BASE D50D8D7C7C22 lea r15, ptr [r12+rdi*2+0x22] +XDIS 16d8e: MISC BASE D50D8D7C7D23 lea r15, ptr [r13+rdi*2+0x23] +XDIS 16d94: MISC BASE D50D8D7C7E24 lea r15, ptr [r14+rdi*2+0x24] +XDIS 16d9a: MISC BASE D50D8D7C7F25 lea r15, ptr [r15+rdi*2+0x25] +XDIS 16da0: MISC BASE D51C8D7C7826 lea r15, ptr [r16+rdi*2+0x26] +XDIS 16da6: MISC BASE D51C8D7C7927 lea r15, ptr [r17+rdi*2+0x27] +XDIS 16dac: MISC BASE D51C8D7C7A28 lea r15, ptr [r18+rdi*2+0x28] +XDIS 16db2: MISC BASE D51C8D7C7B29 lea r15, ptr [r19+rdi*2+0x29] +XDIS 16db8: MISC BASE D51C8D7C7C2A lea r15, ptr [r20+rdi*2+0x2a] +XDIS 16dbe: MISC BASE D51C8D7C7D2B lea r15, ptr [r21+rdi*2+0x2b] +XDIS 16dc4: MISC BASE D51C8D7C7E2C lea r15, ptr [r22+rdi*2+0x2c] +XDIS 16dca: MISC BASE D51C8D7C7F2D lea r15, ptr [r23+rdi*2+0x2d] +XDIS 16dd0: MISC BASE D51D8D7C782E lea r15, ptr [r24+rdi*2+0x2e] +XDIS 16dd6: MISC BASE D51D8D7C792F lea r15, ptr [r25+rdi*2+0x2f] +XDIS 16ddc: MISC BASE D51D8D7C7A30 lea r15, ptr [r26+rdi*2+0x30] +XDIS 16de2: MISC BASE D51D8D7C7B31 lea r15, ptr [r27+rdi*2+0x31] +XDIS 16de8: MISC BASE D51D8D7C7C32 lea r15, ptr [r28+rdi*2+0x32] +XDIS 16dee: MISC BASE D51D8D7C7D33 lea r15, ptr [r29+rdi*2+0x33] +XDIS 16df4: MISC BASE D51D8D7C7E34 lea r15, ptr [r30+rdi*2+0x34] +XDIS 16dfa: MISC BASE D51D8D7C7F35 lea r15, ptr [r31+rdi*2+0x35] +XDIS 16e00: MISC BASE D50E8D7C4017 lea r15, ptr [rax+r8*2+0x17] +XDIS 16e06: MISC BASE D50E8D7C4118 lea r15, ptr [rcx+r8*2+0x18] +XDIS 16e0c: MISC BASE D50E8D7C4219 lea r15, ptr [rdx+r8*2+0x19] +XDIS 16e12: MISC BASE D50E8D7C431A lea r15, ptr [rbx+r8*2+0x1a] +XDIS 16e18: MISC BASE D50E8D7C441B lea r15, ptr [rsp+r8*2+0x1b] +XDIS 16e1e: MISC BASE D50E8D7C451C lea r15, ptr [rbp+r8*2+0x1c] +XDIS 16e24: MISC BASE D50E8D7C461D lea r15, ptr [rsi+r8*2+0x1d] +XDIS 16e2a: MISC BASE D50E8D7C471E lea r15, ptr [rdi+r8*2+0x1e] +XDIS 16e30: MISC BASE D50F8D7C401F lea r15, ptr [r8+r8*2+0x1f] +XDIS 16e36: MISC BASE D50F8D7C4120 lea r15, ptr [r9+r8*2+0x20] +XDIS 16e3c: MISC BASE D50F8D7C4221 lea r15, ptr [r10+r8*2+0x21] +XDIS 16e42: MISC BASE D50F8D7C4322 lea r15, ptr [r11+r8*2+0x22] +XDIS 16e48: MISC BASE D50F8D7C4423 lea r15, ptr [r12+r8*2+0x23] +XDIS 16e4e: MISC BASE D50F8D7C4524 lea r15, ptr [r13+r8*2+0x24] +XDIS 16e54: MISC BASE D50F8D7C4625 lea r15, ptr [r14+r8*2+0x25] +XDIS 16e5a: MISC BASE D50F8D7C4726 lea r15, ptr [r15+r8*2+0x26] +XDIS 16e60: MISC BASE D51E8D7C4027 lea r15, ptr [r16+r8*2+0x27] +XDIS 16e66: MISC BASE D51E8D7C4128 lea r15, ptr [r17+r8*2+0x28] +XDIS 16e6c: MISC BASE D51E8D7C4229 lea r15, ptr [r18+r8*2+0x29] +XDIS 16e72: MISC BASE D51E8D7C432A lea r15, ptr [r19+r8*2+0x2a] +XDIS 16e78: MISC BASE D51E8D7C442B lea r15, ptr [r20+r8*2+0x2b] +XDIS 16e7e: MISC BASE D51E8D7C452C lea r15, ptr [r21+r8*2+0x2c] +XDIS 16e84: MISC BASE D51E8D7C462D lea r15, ptr [r22+r8*2+0x2d] +XDIS 16e8a: MISC BASE D51E8D7C472E lea r15, ptr [r23+r8*2+0x2e] +XDIS 16e90: MISC BASE D51F8D7C402F lea r15, ptr [r24+r8*2+0x2f] +XDIS 16e96: MISC BASE D51F8D7C4130 lea r15, ptr [r25+r8*2+0x30] +XDIS 16e9c: MISC BASE D51F8D7C4231 lea r15, ptr [r26+r8*2+0x31] +XDIS 16ea2: MISC BASE D51F8D7C4332 lea r15, ptr [r27+r8*2+0x32] +XDIS 16ea8: MISC BASE D51F8D7C4433 lea r15, ptr [r28+r8*2+0x33] +XDIS 16eae: MISC BASE D51F8D7C4534 lea r15, ptr [r29+r8*2+0x34] +XDIS 16eb4: MISC BASE D51F8D7C4635 lea r15, ptr [r30+r8*2+0x35] +XDIS 16eba: MISC BASE D51F8D7C4736 lea r15, ptr [r31+r8*2+0x36] +XDIS 16ec0: MISC BASE D50E8D7C4818 lea r15, ptr [rax+r9*2+0x18] +XDIS 16ec6: MISC BASE D50E8D7C4919 lea r15, ptr [rcx+r9*2+0x19] +XDIS 16ecc: MISC BASE D50E8D7C4A1A lea r15, ptr [rdx+r9*2+0x1a] +XDIS 16ed2: MISC BASE D50E8D7C4B1B lea r15, ptr [rbx+r9*2+0x1b] +XDIS 16ed8: MISC BASE D50E8D7C4C1C lea r15, ptr [rsp+r9*2+0x1c] +XDIS 16ede: MISC BASE D50E8D7C4D1D lea r15, ptr [rbp+r9*2+0x1d] +XDIS 16ee4: MISC BASE D50E8D7C4E1E lea r15, ptr [rsi+r9*2+0x1e] +XDIS 16eea: MISC BASE D50E8D7C4F1F lea r15, ptr [rdi+r9*2+0x1f] +XDIS 16ef0: MISC BASE D50F8D7C4820 lea r15, ptr [r8+r9*2+0x20] +XDIS 16ef6: MISC BASE D50F8D7C4921 lea r15, ptr [r9+r9*2+0x21] +XDIS 16efc: MISC BASE D50F8D7C4A22 lea r15, ptr [r10+r9*2+0x22] +XDIS 16f02: MISC BASE D50F8D7C4B23 lea r15, ptr [r11+r9*2+0x23] +XDIS 16f08: MISC BASE D50F8D7C4C24 lea r15, ptr [r12+r9*2+0x24] +XDIS 16f0e: MISC BASE D50F8D7C4D25 lea r15, ptr [r13+r9*2+0x25] +XDIS 16f14: MISC BASE D50F8D7C4E26 lea r15, ptr [r14+r9*2+0x26] +XDIS 16f1a: MISC BASE D50F8D7C4F27 lea r15, ptr [r15+r9*2+0x27] +XDIS 16f20: MISC BASE D51E8D7C4828 lea r15, ptr [r16+r9*2+0x28] +XDIS 16f26: MISC BASE D51E8D7C4929 lea r15, ptr [r17+r9*2+0x29] +XDIS 16f2c: MISC BASE D51E8D7C4A2A lea r15, ptr [r18+r9*2+0x2a] +XDIS 16f32: MISC BASE D51E8D7C4B2B lea r15, ptr [r19+r9*2+0x2b] +XDIS 16f38: MISC BASE D51E8D7C4C2C lea r15, ptr [r20+r9*2+0x2c] +XDIS 16f3e: MISC BASE D51E8D7C4D2D lea r15, ptr [r21+r9*2+0x2d] +XDIS 16f44: MISC BASE D51E8D7C4E2E lea r15, ptr [r22+r9*2+0x2e] +XDIS 16f4a: MISC BASE D51E8D7C4F2F lea r15, ptr [r23+r9*2+0x2f] +XDIS 16f50: MISC BASE D51F8D7C4830 lea r15, ptr [r24+r9*2+0x30] +XDIS 16f56: MISC BASE D51F8D7C4931 lea r15, ptr [r25+r9*2+0x31] +XDIS 16f5c: MISC BASE D51F8D7C4A32 lea r15, ptr [r26+r9*2+0x32] +XDIS 16f62: MISC BASE D51F8D7C4B33 lea r15, ptr [r27+r9*2+0x33] +XDIS 16f68: MISC BASE D51F8D7C4C34 lea r15, ptr [r28+r9*2+0x34] +XDIS 16f6e: MISC BASE D51F8D7C4D35 lea r15, ptr [r29+r9*2+0x35] +XDIS 16f74: MISC BASE D51F8D7C4E36 lea r15, ptr [r30+r9*2+0x36] +XDIS 16f7a: MISC BASE D51F8D7C4F37 lea r15, ptr [r31+r9*2+0x37] +XDIS 16f80: MISC BASE D50E8D7C5019 lea r15, ptr [rax+r10*2+0x19] +XDIS 16f86: MISC BASE D50E8D7C511A lea r15, ptr [rcx+r10*2+0x1a] +XDIS 16f8c: MISC BASE D50E8D7C521B lea r15, ptr [rdx+r10*2+0x1b] +XDIS 16f92: MISC BASE D50E8D7C531C lea r15, ptr [rbx+r10*2+0x1c] +XDIS 16f98: MISC BASE D50E8D7C541D lea r15, ptr [rsp+r10*2+0x1d] +XDIS 16f9e: MISC BASE D50E8D7C551E lea r15, ptr [rbp+r10*2+0x1e] +XDIS 16fa4: MISC BASE D50E8D7C561F lea r15, ptr [rsi+r10*2+0x1f] +XDIS 16faa: MISC BASE D50E8D7C5720 lea r15, ptr [rdi+r10*2+0x20] +XDIS 16fb0: MISC BASE D50F8D7C5021 lea r15, ptr [r8+r10*2+0x21] +XDIS 16fb6: MISC BASE D50F8D7C5122 lea r15, ptr [r9+r10*2+0x22] +XDIS 16fbc: MISC BASE D50F8D7C5223 lea r15, ptr [r10+r10*2+0x23] +XDIS 16fc2: MISC BASE D50F8D7C5324 lea r15, ptr [r11+r10*2+0x24] +XDIS 16fc8: MISC BASE D50F8D7C5425 lea r15, ptr [r12+r10*2+0x25] +XDIS 16fce: MISC BASE D50F8D7C5526 lea r15, ptr [r13+r10*2+0x26] +XDIS 16fd4: MISC BASE D50F8D7C5627 lea r15, ptr [r14+r10*2+0x27] +XDIS 16fda: MISC BASE D50F8D7C5728 lea r15, ptr [r15+r10*2+0x28] +XDIS 16fe0: MISC BASE D51E8D7C5029 lea r15, ptr [r16+r10*2+0x29] +XDIS 16fe6: MISC BASE D51E8D7C512A lea r15, ptr [r17+r10*2+0x2a] +XDIS 16fec: MISC BASE D51E8D7C522B lea r15, ptr [r18+r10*2+0x2b] +XDIS 16ff2: MISC BASE D51E8D7C532C lea r15, ptr [r19+r10*2+0x2c] +XDIS 16ff8: MISC BASE D51E8D7C542D lea r15, ptr [r20+r10*2+0x2d] +XDIS 16ffe: MISC BASE D51E8D7C552E lea r15, ptr [r21+r10*2+0x2e] +XDIS 17004: MISC BASE D51E8D7C562F lea r15, ptr [r22+r10*2+0x2f] +XDIS 1700a: MISC BASE D51E8D7C5730 lea r15, ptr [r23+r10*2+0x30] +XDIS 17010: MISC BASE D51F8D7C5031 lea r15, ptr [r24+r10*2+0x31] +XDIS 17016: MISC BASE D51F8D7C5132 lea r15, ptr [r25+r10*2+0x32] +XDIS 1701c: MISC BASE D51F8D7C5233 lea r15, ptr [r26+r10*2+0x33] +XDIS 17022: MISC BASE D51F8D7C5334 lea r15, ptr [r27+r10*2+0x34] +XDIS 17028: MISC BASE D51F8D7C5435 lea r15, ptr [r28+r10*2+0x35] +XDIS 1702e: MISC BASE D51F8D7C5536 lea r15, ptr [r29+r10*2+0x36] +XDIS 17034: MISC BASE D51F8D7C5637 lea r15, ptr [r30+r10*2+0x37] +XDIS 1703a: MISC BASE D51F8D7C5738 lea r15, ptr [r31+r10*2+0x38] +XDIS 17040: MISC BASE D50E8D7C581A lea r15, ptr [rax+r11*2+0x1a] +XDIS 17046: MISC BASE D50E8D7C591B lea r15, ptr [rcx+r11*2+0x1b] +XDIS 1704c: MISC BASE D50E8D7C5A1C lea r15, ptr [rdx+r11*2+0x1c] +XDIS 17052: MISC BASE D50E8D7C5B1D lea r15, ptr [rbx+r11*2+0x1d] +XDIS 17058: MISC BASE D50E8D7C5C1E lea r15, ptr [rsp+r11*2+0x1e] +XDIS 1705e: MISC BASE D50E8D7C5D1F lea r15, ptr [rbp+r11*2+0x1f] +XDIS 17064: MISC BASE D50E8D7C5E20 lea r15, ptr [rsi+r11*2+0x20] +XDIS 1706a: MISC BASE D50E8D7C5F21 lea r15, ptr [rdi+r11*2+0x21] +XDIS 17070: MISC BASE D50F8D7C5822 lea r15, ptr [r8+r11*2+0x22] +XDIS 17076: MISC BASE D50F8D7C5923 lea r15, ptr [r9+r11*2+0x23] +XDIS 1707c: MISC BASE D50F8D7C5A24 lea r15, ptr [r10+r11*2+0x24] +XDIS 17082: MISC BASE D50F8D7C5B25 lea r15, ptr [r11+r11*2+0x25] +XDIS 17088: MISC BASE D50F8D7C5C26 lea r15, ptr [r12+r11*2+0x26] +XDIS 1708e: MISC BASE D50F8D7C5D27 lea r15, ptr [r13+r11*2+0x27] +XDIS 17094: MISC BASE D50F8D7C5E28 lea r15, ptr [r14+r11*2+0x28] +XDIS 1709a: MISC BASE D50F8D7C5F29 lea r15, ptr [r15+r11*2+0x29] +XDIS 170a0: MISC BASE D51E8D7C582A lea r15, ptr [r16+r11*2+0x2a] +XDIS 170a6: MISC BASE D51E8D7C592B lea r15, ptr [r17+r11*2+0x2b] +XDIS 170ac: MISC BASE D51E8D7C5A2C lea r15, ptr [r18+r11*2+0x2c] +XDIS 170b2: MISC BASE D51E8D7C5B2D lea r15, ptr [r19+r11*2+0x2d] +XDIS 170b8: MISC BASE D51E8D7C5C2E lea r15, ptr [r20+r11*2+0x2e] +XDIS 170be: MISC BASE D51E8D7C5D2F lea r15, ptr [r21+r11*2+0x2f] +XDIS 170c4: MISC BASE D51E8D7C5E30 lea r15, ptr [r22+r11*2+0x30] +XDIS 170ca: MISC BASE D51E8D7C5F31 lea r15, ptr [r23+r11*2+0x31] +XDIS 170d0: MISC BASE D51F8D7C5832 lea r15, ptr [r24+r11*2+0x32] +XDIS 170d6: MISC BASE D51F8D7C5933 lea r15, ptr [r25+r11*2+0x33] +XDIS 170dc: MISC BASE D51F8D7C5A34 lea r15, ptr [r26+r11*2+0x34] +XDIS 170e2: MISC BASE D51F8D7C5B35 lea r15, ptr [r27+r11*2+0x35] +XDIS 170e8: MISC BASE D51F8D7C5C36 lea r15, ptr [r28+r11*2+0x36] +XDIS 170ee: MISC BASE D51F8D7C5D37 lea r15, ptr [r29+r11*2+0x37] +XDIS 170f4: MISC BASE D51F8D7C5E38 lea r15, ptr [r30+r11*2+0x38] +XDIS 170fa: MISC BASE D51F8D7C5F39 lea r15, ptr [r31+r11*2+0x39] +XDIS 17100: MISC BASE D50E8D7C601B lea r15, ptr [rax+r12*2+0x1b] +XDIS 17106: MISC BASE D50E8D7C611C lea r15, ptr [rcx+r12*2+0x1c] +XDIS 1710c: MISC BASE D50E8D7C621D lea r15, ptr [rdx+r12*2+0x1d] +XDIS 17112: MISC BASE D50E8D7C631E lea r15, ptr [rbx+r12*2+0x1e] +XDIS 17118: MISC BASE D50E8D7C641F lea r15, ptr [rsp+r12*2+0x1f] +XDIS 1711e: MISC BASE D50E8D7C6520 lea r15, ptr [rbp+r12*2+0x20] +XDIS 17124: MISC BASE D50E8D7C6621 lea r15, ptr [rsi+r12*2+0x21] +XDIS 1712a: MISC BASE D50E8D7C6722 lea r15, ptr [rdi+r12*2+0x22] +XDIS 17130: MISC BASE D50F8D7C6023 lea r15, ptr [r8+r12*2+0x23] +XDIS 17136: MISC BASE D50F8D7C6124 lea r15, ptr [r9+r12*2+0x24] +XDIS 1713c: MISC BASE D50F8D7C6225 lea r15, ptr [r10+r12*2+0x25] +XDIS 17142: MISC BASE D50F8D7C6326 lea r15, ptr [r11+r12*2+0x26] +XDIS 17148: MISC BASE D50F8D7C6427 lea r15, ptr [r12+r12*2+0x27] +XDIS 1714e: MISC BASE D50F8D7C6528 lea r15, ptr [r13+r12*2+0x28] +XDIS 17154: MISC BASE D50F8D7C6629 lea r15, ptr [r14+r12*2+0x29] +XDIS 1715a: MISC BASE D50F8D7C672A lea r15, ptr [r15+r12*2+0x2a] +XDIS 17160: MISC BASE D51E8D7C602B lea r15, ptr [r16+r12*2+0x2b] +XDIS 17166: MISC BASE D51E8D7C612C lea r15, ptr [r17+r12*2+0x2c] +XDIS 1716c: MISC BASE D51E8D7C622D lea r15, ptr [r18+r12*2+0x2d] +XDIS 17172: MISC BASE D51E8D7C632E lea r15, ptr [r19+r12*2+0x2e] +XDIS 17178: MISC BASE D51E8D7C642F lea r15, ptr [r20+r12*2+0x2f] +XDIS 1717e: MISC BASE D51E8D7C6530 lea r15, ptr [r21+r12*2+0x30] +XDIS 17184: MISC BASE D51E8D7C6631 lea r15, ptr [r22+r12*2+0x31] +XDIS 1718a: MISC BASE D51E8D7C6732 lea r15, ptr [r23+r12*2+0x32] +XDIS 17190: MISC BASE D51F8D7C6033 lea r15, ptr [r24+r12*2+0x33] +XDIS 17196: MISC BASE D51F8D7C6134 lea r15, ptr [r25+r12*2+0x34] +XDIS 1719c: MISC BASE D51F8D7C6235 lea r15, ptr [r26+r12*2+0x35] +XDIS 171a2: MISC BASE D51F8D7C6336 lea r15, ptr [r27+r12*2+0x36] +XDIS 171a8: MISC BASE D51F8D7C6437 lea r15, ptr [r28+r12*2+0x37] +XDIS 171ae: MISC BASE D51F8D7C6538 lea r15, ptr [r29+r12*2+0x38] +XDIS 171b4: MISC BASE D51F8D7C6639 lea r15, ptr [r30+r12*2+0x39] +XDIS 171ba: MISC BASE D51F8D7C673A lea r15, ptr [r31+r12*2+0x3a] +XDIS 171c0: MISC BASE D50E8D7C681C lea r15, ptr [rax+r13*2+0x1c] +XDIS 171c6: MISC BASE D50E8D7C691D lea r15, ptr [rcx+r13*2+0x1d] +XDIS 171cc: MISC BASE D50E8D7C6A1E lea r15, ptr [rdx+r13*2+0x1e] +XDIS 171d2: MISC BASE D50E8D7C6B1F lea r15, ptr [rbx+r13*2+0x1f] +XDIS 171d8: MISC BASE D50E8D7C6C20 lea r15, ptr [rsp+r13*2+0x20] +XDIS 171de: MISC BASE D50E8D7C6D21 lea r15, ptr [rbp+r13*2+0x21] +XDIS 171e4: MISC BASE D50E8D7C6E22 lea r15, ptr [rsi+r13*2+0x22] +XDIS 171ea: MISC BASE D50E8D7C6F23 lea r15, ptr [rdi+r13*2+0x23] +XDIS 171f0: MISC BASE D50F8D7C6824 lea r15, ptr [r8+r13*2+0x24] +XDIS 171f6: MISC BASE D50F8D7C6925 lea r15, ptr [r9+r13*2+0x25] +XDIS 171fc: MISC BASE D50F8D7C6A26 lea r15, ptr [r10+r13*2+0x26] +XDIS 17202: MISC BASE D50F8D7C6B27 lea r15, ptr [r11+r13*2+0x27] +XDIS 17208: MISC BASE D50F8D7C6C28 lea r15, ptr [r12+r13*2+0x28] +XDIS 1720e: MISC BASE D50F8D7C6D29 lea r15, ptr [r13+r13*2+0x29] +XDIS 17214: MISC BASE D50F8D7C6E2A lea r15, ptr [r14+r13*2+0x2a] +XDIS 1721a: MISC BASE D50F8D7C6F2B lea r15, ptr [r15+r13*2+0x2b] +XDIS 17220: MISC BASE D51E8D7C682C lea r15, ptr [r16+r13*2+0x2c] +XDIS 17226: MISC BASE D51E8D7C692D lea r15, ptr [r17+r13*2+0x2d] +XDIS 1722c: MISC BASE D51E8D7C6A2E lea r15, ptr [r18+r13*2+0x2e] +XDIS 17232: MISC BASE D51E8D7C6B2F lea r15, ptr [r19+r13*2+0x2f] +XDIS 17238: MISC BASE D51E8D7C6C30 lea r15, ptr [r20+r13*2+0x30] +XDIS 1723e: MISC BASE D51E8D7C6D31 lea r15, ptr [r21+r13*2+0x31] +XDIS 17244: MISC BASE D51E8D7C6E32 lea r15, ptr [r22+r13*2+0x32] +XDIS 1724a: MISC BASE D51E8D7C6F33 lea r15, ptr [r23+r13*2+0x33] +XDIS 17250: MISC BASE D51F8D7C6834 lea r15, ptr [r24+r13*2+0x34] +XDIS 17256: MISC BASE D51F8D7C6935 lea r15, ptr [r25+r13*2+0x35] +XDIS 1725c: MISC BASE D51F8D7C6A36 lea r15, ptr [r26+r13*2+0x36] +XDIS 17262: MISC BASE D51F8D7C6B37 lea r15, ptr [r27+r13*2+0x37] +XDIS 17268: MISC BASE D51F8D7C6C38 lea r15, ptr [r28+r13*2+0x38] +XDIS 1726e: MISC BASE D51F8D7C6D39 lea r15, ptr [r29+r13*2+0x39] +XDIS 17274: MISC BASE D51F8D7C6E3A lea r15, ptr [r30+r13*2+0x3a] +XDIS 1727a: MISC BASE D51F8D7C6F3B lea r15, ptr [r31+r13*2+0x3b] +XDIS 17280: MISC BASE D50E8D7C701D lea r15, ptr [rax+r14*2+0x1d] +XDIS 17286: MISC BASE D50E8D7C711E lea r15, ptr [rcx+r14*2+0x1e] +XDIS 1728c: MISC BASE D50E8D7C721F lea r15, ptr [rdx+r14*2+0x1f] +XDIS 17292: MISC BASE D50E8D7C7320 lea r15, ptr [rbx+r14*2+0x20] +XDIS 17298: MISC BASE D50E8D7C7421 lea r15, ptr [rsp+r14*2+0x21] +XDIS 1729e: MISC BASE D50E8D7C7522 lea r15, ptr [rbp+r14*2+0x22] +XDIS 172a4: MISC BASE D50E8D7C7623 lea r15, ptr [rsi+r14*2+0x23] +XDIS 172aa: MISC BASE D50E8D7C7724 lea r15, ptr [rdi+r14*2+0x24] +XDIS 172b0: MISC BASE D50F8D7C7025 lea r15, ptr [r8+r14*2+0x25] +XDIS 172b6: MISC BASE D50F8D7C7126 lea r15, ptr [r9+r14*2+0x26] +XDIS 172bc: MISC BASE D50F8D7C7227 lea r15, ptr [r10+r14*2+0x27] +XDIS 172c2: MISC BASE D50F8D7C7328 lea r15, ptr [r11+r14*2+0x28] +XDIS 172c8: MISC BASE D50F8D7C7429 lea r15, ptr [r12+r14*2+0x29] +XDIS 172ce: MISC BASE D50F8D7C752A lea r15, ptr [r13+r14*2+0x2a] +XDIS 172d4: MISC BASE D50F8D7C762B lea r15, ptr [r14+r14*2+0x2b] +XDIS 172da: MISC BASE D50F8D7C772C lea r15, ptr [r15+r14*2+0x2c] +XDIS 172e0: MISC BASE D51E8D7C702D lea r15, ptr [r16+r14*2+0x2d] +XDIS 172e6: MISC BASE D51E8D7C712E lea r15, ptr [r17+r14*2+0x2e] +XDIS 172ec: MISC BASE D51E8D7C722F lea r15, ptr [r18+r14*2+0x2f] +XDIS 172f2: MISC BASE D51E8D7C7330 lea r15, ptr [r19+r14*2+0x30] +XDIS 172f8: MISC BASE D51E8D7C7431 lea r15, ptr [r20+r14*2+0x31] +XDIS 172fe: MISC BASE D51E8D7C7532 lea r15, ptr [r21+r14*2+0x32] +XDIS 17304: MISC BASE D51E8D7C7633 lea r15, ptr [r22+r14*2+0x33] +XDIS 1730a: MISC BASE D51E8D7C7734 lea r15, ptr [r23+r14*2+0x34] +XDIS 17310: MISC BASE D51F8D7C7035 lea r15, ptr [r24+r14*2+0x35] +XDIS 17316: MISC BASE D51F8D7C7136 lea r15, ptr [r25+r14*2+0x36] +XDIS 1731c: MISC BASE D51F8D7C7237 lea r15, ptr [r26+r14*2+0x37] +XDIS 17322: MISC BASE D51F8D7C7338 lea r15, ptr [r27+r14*2+0x38] +XDIS 17328: MISC BASE D51F8D7C7439 lea r15, ptr [r28+r14*2+0x39] +XDIS 1732e: MISC BASE D51F8D7C753A lea r15, ptr [r29+r14*2+0x3a] +XDIS 17334: MISC BASE D51F8D7C763B lea r15, ptr [r30+r14*2+0x3b] +XDIS 1733a: MISC BASE D51F8D7C773C lea r15, ptr [r31+r14*2+0x3c] +XDIS 17340: MISC BASE D50E8D7C781E lea r15, ptr [rax+r15*2+0x1e] +XDIS 17346: MISC BASE D50E8D7C791F lea r15, ptr [rcx+r15*2+0x1f] +XDIS 1734c: MISC BASE D50E8D7C7A20 lea r15, ptr [rdx+r15*2+0x20] +XDIS 17352: MISC BASE D50E8D7C7B21 lea r15, ptr [rbx+r15*2+0x21] +XDIS 17358: MISC BASE D50E8D7C7C22 lea r15, ptr [rsp+r15*2+0x22] +XDIS 1735e: MISC BASE D50E8D7C7D23 lea r15, ptr [rbp+r15*2+0x23] +XDIS 17364: MISC BASE D50E8D7C7E24 lea r15, ptr [rsi+r15*2+0x24] +XDIS 1736a: MISC BASE D50E8D7C7F25 lea r15, ptr [rdi+r15*2+0x25] +XDIS 17370: MISC BASE D50F8D7C7826 lea r15, ptr [r8+r15*2+0x26] +XDIS 17376: MISC BASE D50F8D7C7927 lea r15, ptr [r9+r15*2+0x27] +XDIS 1737c: MISC BASE D50F8D7C7A28 lea r15, ptr [r10+r15*2+0x28] +XDIS 17382: MISC BASE D50F8D7C7B29 lea r15, ptr [r11+r15*2+0x29] +XDIS 17388: MISC BASE D50F8D7C7C2A lea r15, ptr [r12+r15*2+0x2a] +XDIS 1738e: MISC BASE D50F8D7C7D2B lea r15, ptr [r13+r15*2+0x2b] +XDIS 17394: MISC BASE D50F8D7C7E2C lea r15, ptr [r14+r15*2+0x2c] +XDIS 1739a: MISC BASE D50F8D7C7F2D lea r15, ptr [r15+r15*2+0x2d] +XDIS 173a0: MISC BASE D51E8D7C782E lea r15, ptr [r16+r15*2+0x2e] +XDIS 173a6: MISC BASE D51E8D7C792F lea r15, ptr [r17+r15*2+0x2f] +XDIS 173ac: MISC BASE D51E8D7C7A30 lea r15, ptr [r18+r15*2+0x30] +XDIS 173b2: MISC BASE D51E8D7C7B31 lea r15, ptr [r19+r15*2+0x31] +XDIS 173b8: MISC BASE D51E8D7C7C32 lea r15, ptr [r20+r15*2+0x32] +XDIS 173be: MISC BASE D51E8D7C7D33 lea r15, ptr [r21+r15*2+0x33] +XDIS 173c4: MISC BASE D51E8D7C7E34 lea r15, ptr [r22+r15*2+0x34] +XDIS 173ca: MISC BASE D51E8D7C7F35 lea r15, ptr [r23+r15*2+0x35] +XDIS 173d0: MISC BASE D51F8D7C7836 lea r15, ptr [r24+r15*2+0x36] +XDIS 173d6: MISC BASE D51F8D7C7937 lea r15, ptr [r25+r15*2+0x37] +XDIS 173dc: MISC BASE D51F8D7C7A38 lea r15, ptr [r26+r15*2+0x38] +XDIS 173e2: MISC BASE D51F8D7C7B39 lea r15, ptr [r27+r15*2+0x39] +XDIS 173e8: MISC BASE D51F8D7C7C3A lea r15, ptr [r28+r15*2+0x3a] +XDIS 173ee: MISC BASE D51F8D7C7D3B lea r15, ptr [r29+r15*2+0x3b] +XDIS 173f4: MISC BASE D51F8D7C7E3C lea r15, ptr [r30+r15*2+0x3c] +XDIS 173fa: MISC BASE D51F8D7C7F3D lea r15, ptr [r31+r15*2+0x3d] +XDIS 17400: MISC BASE D52C8D7C401F lea r15, ptr [rax+r16*2+0x1f] +XDIS 17406: MISC BASE D52C8D7C4120 lea r15, ptr [rcx+r16*2+0x20] +XDIS 1740c: MISC BASE D52C8D7C4221 lea r15, ptr [rdx+r16*2+0x21] +XDIS 17412: MISC BASE D52C8D7C4322 lea r15, ptr [rbx+r16*2+0x22] +XDIS 17418: MISC BASE D52C8D7C4423 lea r15, ptr [rsp+r16*2+0x23] +XDIS 1741e: MISC BASE D52C8D7C4524 lea r15, ptr [rbp+r16*2+0x24] +XDIS 17424: MISC BASE D52C8D7C4625 lea r15, ptr [rsi+r16*2+0x25] +XDIS 1742a: MISC BASE D52C8D7C4726 lea r15, ptr [rdi+r16*2+0x26] +XDIS 17430: MISC BASE D52D8D7C4027 lea r15, ptr [r8+r16*2+0x27] +XDIS 17436: MISC BASE D52D8D7C4128 lea r15, ptr [r9+r16*2+0x28] +XDIS 1743c: MISC BASE D52D8D7C4229 lea r15, ptr [r10+r16*2+0x29] +XDIS 17442: MISC BASE D52D8D7C432A lea r15, ptr [r11+r16*2+0x2a] +XDIS 17448: MISC BASE D52D8D7C442B lea r15, ptr [r12+r16*2+0x2b] +XDIS 1744e: MISC BASE D52D8D7C452C lea r15, ptr [r13+r16*2+0x2c] +XDIS 17454: MISC BASE D52D8D7C462D lea r15, ptr [r14+r16*2+0x2d] +XDIS 1745a: MISC BASE D52D8D7C472E lea r15, ptr [r15+r16*2+0x2e] +XDIS 17460: MISC BASE D53C8D7C402F lea r15, ptr [r16+r16*2+0x2f] +XDIS 17466: MISC BASE D53C8D7C4130 lea r15, ptr [r17+r16*2+0x30] +XDIS 1746c: MISC BASE D53C8D7C4231 lea r15, ptr [r18+r16*2+0x31] +XDIS 17472: MISC BASE D53C8D7C4332 lea r15, ptr [r19+r16*2+0x32] +XDIS 17478: MISC BASE D53C8D7C4433 lea r15, ptr [r20+r16*2+0x33] +XDIS 1747e: MISC BASE D53C8D7C4534 lea r15, ptr [r21+r16*2+0x34] +XDIS 17484: MISC BASE D53C8D7C4635 lea r15, ptr [r22+r16*2+0x35] +XDIS 1748a: MISC BASE D53C8D7C4736 lea r15, ptr [r23+r16*2+0x36] +XDIS 17490: MISC BASE D53D8D7C4037 lea r15, ptr [r24+r16*2+0x37] +XDIS 17496: MISC BASE D53D8D7C4138 lea r15, ptr [r25+r16*2+0x38] +XDIS 1749c: MISC BASE D53D8D7C4239 lea r15, ptr [r26+r16*2+0x39] +XDIS 174a2: MISC BASE D53D8D7C433A lea r15, ptr [r27+r16*2+0x3a] +XDIS 174a8: MISC BASE D53D8D7C443B lea r15, ptr [r28+r16*2+0x3b] +XDIS 174ae: MISC BASE D53D8D7C453C lea r15, ptr [r29+r16*2+0x3c] +XDIS 174b4: MISC BASE D53D8D7C463D lea r15, ptr [r30+r16*2+0x3d] +XDIS 174ba: MISC BASE D53D8D7C473E lea r15, ptr [r31+r16*2+0x3e] +XDIS 174c0: MISC BASE D52C8D7C4820 lea r15, ptr [rax+r17*2+0x20] +XDIS 174c6: MISC BASE D52C8D7C4921 lea r15, ptr [rcx+r17*2+0x21] +XDIS 174cc: MISC BASE D52C8D7C4A22 lea r15, ptr [rdx+r17*2+0x22] +XDIS 174d2: MISC BASE D52C8D7C4B23 lea r15, ptr [rbx+r17*2+0x23] +XDIS 174d8: MISC BASE D52C8D7C4C24 lea r15, ptr [rsp+r17*2+0x24] +XDIS 174de: MISC BASE D52C8D7C4D25 lea r15, ptr [rbp+r17*2+0x25] +XDIS 174e4: MISC BASE D52C8D7C4E26 lea r15, ptr [rsi+r17*2+0x26] +XDIS 174ea: MISC BASE D52C8D7C4F27 lea r15, ptr [rdi+r17*2+0x27] +XDIS 174f0: MISC BASE D52D8D7C4828 lea r15, ptr [r8+r17*2+0x28] +XDIS 174f6: MISC BASE D52D8D7C4929 lea r15, ptr [r9+r17*2+0x29] +XDIS 174fc: MISC BASE D52D8D7C4A2A lea r15, ptr [r10+r17*2+0x2a] +XDIS 17502: MISC BASE D52D8D7C4B2B lea r15, ptr [r11+r17*2+0x2b] +XDIS 17508: MISC BASE D52D8D7C4C2C lea r15, ptr [r12+r17*2+0x2c] +XDIS 1750e: MISC BASE D52D8D7C4D2D lea r15, ptr [r13+r17*2+0x2d] +XDIS 17514: MISC BASE D52D8D7C4E2E lea r15, ptr [r14+r17*2+0x2e] +XDIS 1751a: MISC BASE D52D8D7C4F2F lea r15, ptr [r15+r17*2+0x2f] +XDIS 17520: MISC BASE D53C8D7C4830 lea r15, ptr [r16+r17*2+0x30] +XDIS 17526: MISC BASE D53C8D7C4931 lea r15, ptr [r17+r17*2+0x31] +XDIS 1752c: MISC BASE D53C8D7C4A32 lea r15, ptr [r18+r17*2+0x32] +XDIS 17532: MISC BASE D53C8D7C4B33 lea r15, ptr [r19+r17*2+0x33] +XDIS 17538: MISC BASE D53C8D7C4C34 lea r15, ptr [r20+r17*2+0x34] +XDIS 1753e: MISC BASE D53C8D7C4D35 lea r15, ptr [r21+r17*2+0x35] +XDIS 17544: MISC BASE D53C8D7C4E36 lea r15, ptr [r22+r17*2+0x36] +XDIS 1754a: MISC BASE D53C8D7C4F37 lea r15, ptr [r23+r17*2+0x37] +XDIS 17550: MISC BASE D53D8D7C4838 lea r15, ptr [r24+r17*2+0x38] +XDIS 17556: MISC BASE D53D8D7C4939 lea r15, ptr [r25+r17*2+0x39] +XDIS 1755c: MISC BASE D53D8D7C4A3A lea r15, ptr [r26+r17*2+0x3a] +XDIS 17562: MISC BASE D53D8D7C4B3B lea r15, ptr [r27+r17*2+0x3b] +XDIS 17568: MISC BASE D53D8D7C4C3C lea r15, ptr [r28+r17*2+0x3c] +XDIS 1756e: MISC BASE D53D8D7C4D3D lea r15, ptr [r29+r17*2+0x3d] +XDIS 17574: MISC BASE D53D8D7C4E3E lea r15, ptr [r30+r17*2+0x3e] +XDIS 1757a: MISC BASE D53D8D7C4F3F lea r15, ptr [r31+r17*2+0x3f] +XDIS 17580: MISC BASE D52C8D7C5021 lea r15, ptr [rax+r18*2+0x21] +XDIS 17586: MISC BASE D52C8D7C5122 lea r15, ptr [rcx+r18*2+0x22] +XDIS 1758c: MISC BASE D52C8D7C5223 lea r15, ptr [rdx+r18*2+0x23] +XDIS 17592: MISC BASE D52C8D7C5324 lea r15, ptr [rbx+r18*2+0x24] +XDIS 17598: MISC BASE D52C8D7C5425 lea r15, ptr [rsp+r18*2+0x25] +XDIS 1759e: MISC BASE D52C8D7C5526 lea r15, ptr [rbp+r18*2+0x26] +XDIS 175a4: MISC BASE D52C8D7C5627 lea r15, ptr [rsi+r18*2+0x27] +XDIS 175aa: MISC BASE D52C8D7C5728 lea r15, ptr [rdi+r18*2+0x28] +XDIS 175b0: MISC BASE D52D8D7C5029 lea r15, ptr [r8+r18*2+0x29] +XDIS 175b6: MISC BASE D52D8D7C512A lea r15, ptr [r9+r18*2+0x2a] +XDIS 175bc: MISC BASE D52D8D7C522B lea r15, ptr [r10+r18*2+0x2b] +XDIS 175c2: MISC BASE D52D8D7C532C lea r15, ptr [r11+r18*2+0x2c] +XDIS 175c8: MISC BASE D52D8D7C542D lea r15, ptr [r12+r18*2+0x2d] +XDIS 175ce: MISC BASE D52D8D7C552E lea r15, ptr [r13+r18*2+0x2e] +XDIS 175d4: MISC BASE D52D8D7C562F lea r15, ptr [r14+r18*2+0x2f] +XDIS 175da: MISC BASE D52D8D7C5730 lea r15, ptr [r15+r18*2+0x30] +XDIS 175e0: MISC BASE D53C8D7C5031 lea r15, ptr [r16+r18*2+0x31] +XDIS 175e6: MISC BASE D53C8D7C5132 lea r15, ptr [r17+r18*2+0x32] +XDIS 175ec: MISC BASE D53C8D7C5233 lea r15, ptr [r18+r18*2+0x33] +XDIS 175f2: MISC BASE D53C8D7C5334 lea r15, ptr [r19+r18*2+0x34] +XDIS 175f8: MISC BASE D53C8D7C5435 lea r15, ptr [r20+r18*2+0x35] +XDIS 175fe: MISC BASE D53C8D7C5536 lea r15, ptr [r21+r18*2+0x36] +XDIS 17604: MISC BASE D53C8D7C5637 lea r15, ptr [r22+r18*2+0x37] +XDIS 1760a: MISC BASE D53C8D7C5738 lea r15, ptr [r23+r18*2+0x38] +XDIS 17610: MISC BASE D53D8D7C5039 lea r15, ptr [r24+r18*2+0x39] +XDIS 17616: MISC BASE D53D8D7C513A lea r15, ptr [r25+r18*2+0x3a] +XDIS 1761c: MISC BASE D53D8D7C523B lea r15, ptr [r26+r18*2+0x3b] +XDIS 17622: MISC BASE D53D8D7C533C lea r15, ptr [r27+r18*2+0x3c] +XDIS 17628: MISC BASE D53D8D7C543D lea r15, ptr [r28+r18*2+0x3d] +XDIS 1762e: MISC BASE D53D8D7C553E lea r15, ptr [r29+r18*2+0x3e] +XDIS 17634: MISC BASE D53D8D7C563F lea r15, ptr [r30+r18*2+0x3f] +XDIS 1763a: MISC BASE D53D8D7C5740 lea r15, ptr [r31+r18*2+0x40] +XDIS 17640: MISC BASE D52C8D7C5822 lea r15, ptr [rax+r19*2+0x22] +XDIS 17646: MISC BASE D52C8D7C5923 lea r15, ptr [rcx+r19*2+0x23] +XDIS 1764c: MISC BASE D52C8D7C5A24 lea r15, ptr [rdx+r19*2+0x24] +XDIS 17652: MISC BASE D52C8D7C5B25 lea r15, ptr [rbx+r19*2+0x25] +XDIS 17658: MISC BASE D52C8D7C5C26 lea r15, ptr [rsp+r19*2+0x26] +XDIS 1765e: MISC BASE D52C8D7C5D27 lea r15, ptr [rbp+r19*2+0x27] +XDIS 17664: MISC BASE D52C8D7C5E28 lea r15, ptr [rsi+r19*2+0x28] +XDIS 1766a: MISC BASE D52C8D7C5F29 lea r15, ptr [rdi+r19*2+0x29] +XDIS 17670: MISC BASE D52D8D7C582A lea r15, ptr [r8+r19*2+0x2a] +XDIS 17676: MISC BASE D52D8D7C592B lea r15, ptr [r9+r19*2+0x2b] +XDIS 1767c: MISC BASE D52D8D7C5A2C lea r15, ptr [r10+r19*2+0x2c] +XDIS 17682: MISC BASE D52D8D7C5B2D lea r15, ptr [r11+r19*2+0x2d] +XDIS 17688: MISC BASE D52D8D7C5C2E lea r15, ptr [r12+r19*2+0x2e] +XDIS 1768e: MISC BASE D52D8D7C5D2F lea r15, ptr [r13+r19*2+0x2f] +XDIS 17694: MISC BASE D52D8D7C5E30 lea r15, ptr [r14+r19*2+0x30] +XDIS 1769a: MISC BASE D52D8D7C5F31 lea r15, ptr [r15+r19*2+0x31] +XDIS 176a0: MISC BASE D53C8D7C5832 lea r15, ptr [r16+r19*2+0x32] +XDIS 176a6: MISC BASE D53C8D7C5933 lea r15, ptr [r17+r19*2+0x33] +XDIS 176ac: MISC BASE D53C8D7C5A34 lea r15, ptr [r18+r19*2+0x34] +XDIS 176b2: MISC BASE D53C8D7C5B35 lea r15, ptr [r19+r19*2+0x35] +XDIS 176b8: MISC BASE D53C8D7C5C36 lea r15, ptr [r20+r19*2+0x36] +XDIS 176be: MISC BASE D53C8D7C5D37 lea r15, ptr [r21+r19*2+0x37] +XDIS 176c4: MISC BASE D53C8D7C5E38 lea r15, ptr [r22+r19*2+0x38] +XDIS 176ca: MISC BASE D53C8D7C5F39 lea r15, ptr [r23+r19*2+0x39] +XDIS 176d0: MISC BASE D53D8D7C583A lea r15, ptr [r24+r19*2+0x3a] +XDIS 176d6: MISC BASE D53D8D7C593B lea r15, ptr [r25+r19*2+0x3b] +XDIS 176dc: MISC BASE D53D8D7C5A3C lea r15, ptr [r26+r19*2+0x3c] +XDIS 176e2: MISC BASE D53D8D7C5B3D lea r15, ptr [r27+r19*2+0x3d] +XDIS 176e8: MISC BASE D53D8D7C5C3E lea r15, ptr [r28+r19*2+0x3e] +XDIS 176ee: MISC BASE D53D8D7C5D3F lea r15, ptr [r29+r19*2+0x3f] +XDIS 176f4: MISC BASE D53D8D7C5E40 lea r15, ptr [r30+r19*2+0x40] +XDIS 176fa: MISC BASE D53D8D7C5F41 lea r15, ptr [r31+r19*2+0x41] +XDIS 17700: MISC BASE D52C8D7C6023 lea r15, ptr [rax+r20*2+0x23] +XDIS 17706: MISC BASE D52C8D7C6124 lea r15, ptr [rcx+r20*2+0x24] +XDIS 1770c: MISC BASE D52C8D7C6225 lea r15, ptr [rdx+r20*2+0x25] +XDIS 17712: MISC BASE D52C8D7C6326 lea r15, ptr [rbx+r20*2+0x26] +XDIS 17718: MISC BASE D52C8D7C6427 lea r15, ptr [rsp+r20*2+0x27] +XDIS 1771e: MISC BASE D52C8D7C6528 lea r15, ptr [rbp+r20*2+0x28] +XDIS 17724: MISC BASE D52C8D7C6629 lea r15, ptr [rsi+r20*2+0x29] +XDIS 1772a: MISC BASE D52C8D7C672A lea r15, ptr [rdi+r20*2+0x2a] +XDIS 17730: MISC BASE D52D8D7C602B lea r15, ptr [r8+r20*2+0x2b] +XDIS 17736: MISC BASE D52D8D7C612C lea r15, ptr [r9+r20*2+0x2c] +XDIS 1773c: MISC BASE D52D8D7C622D lea r15, ptr [r10+r20*2+0x2d] +XDIS 17742: MISC BASE D52D8D7C632E lea r15, ptr [r11+r20*2+0x2e] +XDIS 17748: MISC BASE D52D8D7C642F lea r15, ptr [r12+r20*2+0x2f] +XDIS 1774e: MISC BASE D52D8D7C6530 lea r15, ptr [r13+r20*2+0x30] +XDIS 17754: MISC BASE D52D8D7C6631 lea r15, ptr [r14+r20*2+0x31] +XDIS 1775a: MISC BASE D52D8D7C6732 lea r15, ptr [r15+r20*2+0x32] +XDIS 17760: MISC BASE D53C8D7C6033 lea r15, ptr [r16+r20*2+0x33] +XDIS 17766: MISC BASE D53C8D7C6134 lea r15, ptr [r17+r20*2+0x34] +XDIS 1776c: MISC BASE D53C8D7C6235 lea r15, ptr [r18+r20*2+0x35] +XDIS 17772: MISC BASE D53C8D7C6336 lea r15, ptr [r19+r20*2+0x36] +XDIS 17778: MISC BASE D53C8D7C6437 lea r15, ptr [r20+r20*2+0x37] +XDIS 1777e: MISC BASE D53C8D7C6538 lea r15, ptr [r21+r20*2+0x38] +XDIS 17784: MISC BASE D53C8D7C6639 lea r15, ptr [r22+r20*2+0x39] +XDIS 1778a: MISC BASE D53C8D7C673A lea r15, ptr [r23+r20*2+0x3a] +XDIS 17790: MISC BASE D53D8D7C603B lea r15, ptr [r24+r20*2+0x3b] +XDIS 17796: MISC BASE D53D8D7C613C lea r15, ptr [r25+r20*2+0x3c] +XDIS 1779c: MISC BASE D53D8D7C623D lea r15, ptr [r26+r20*2+0x3d] +XDIS 177a2: MISC BASE D53D8D7C633E lea r15, ptr [r27+r20*2+0x3e] +XDIS 177a8: MISC BASE D53D8D7C643F lea r15, ptr [r28+r20*2+0x3f] +XDIS 177ae: MISC BASE D53D8D7C6540 lea r15, ptr [r29+r20*2+0x40] +XDIS 177b4: MISC BASE D53D8D7C6641 lea r15, ptr [r30+r20*2+0x41] +XDIS 177ba: MISC BASE D53D8D7C6742 lea r15, ptr [r31+r20*2+0x42] +XDIS 177c0: MISC BASE D52C8D7C6824 lea r15, ptr [rax+r21*2+0x24] +XDIS 177c6: MISC BASE D52C8D7C6925 lea r15, ptr [rcx+r21*2+0x25] +XDIS 177cc: MISC BASE D52C8D7C6A26 lea r15, ptr [rdx+r21*2+0x26] +XDIS 177d2: MISC BASE D52C8D7C6B27 lea r15, ptr [rbx+r21*2+0x27] +XDIS 177d8: MISC BASE D52C8D7C6C28 lea r15, ptr [rsp+r21*2+0x28] +XDIS 177de: MISC BASE D52C8D7C6D29 lea r15, ptr [rbp+r21*2+0x29] +XDIS 177e4: MISC BASE D52C8D7C6E2A lea r15, ptr [rsi+r21*2+0x2a] +XDIS 177ea: MISC BASE D52C8D7C6F2B lea r15, ptr [rdi+r21*2+0x2b] +XDIS 177f0: MISC BASE D52D8D7C682C lea r15, ptr [r8+r21*2+0x2c] +XDIS 177f6: MISC BASE D52D8D7C692D lea r15, ptr [r9+r21*2+0x2d] +XDIS 177fc: MISC BASE D52D8D7C6A2E lea r15, ptr [r10+r21*2+0x2e] +XDIS 17802: MISC BASE D52D8D7C6B2F lea r15, ptr [r11+r21*2+0x2f] +XDIS 17808: MISC BASE D52D8D7C6C30 lea r15, ptr [r12+r21*2+0x30] +XDIS 1780e: MISC BASE D52D8D7C6D31 lea r15, ptr [r13+r21*2+0x31] +XDIS 17814: MISC BASE D52D8D7C6E32 lea r15, ptr [r14+r21*2+0x32] +XDIS 1781a: MISC BASE D52D8D7C6F33 lea r15, ptr [r15+r21*2+0x33] +XDIS 17820: MISC BASE D53C8D7C6834 lea r15, ptr [r16+r21*2+0x34] +XDIS 17826: MISC BASE D53C8D7C6935 lea r15, ptr [r17+r21*2+0x35] +XDIS 1782c: MISC BASE D53C8D7C6A36 lea r15, ptr [r18+r21*2+0x36] +XDIS 17832: MISC BASE D53C8D7C6B37 lea r15, ptr [r19+r21*2+0x37] +XDIS 17838: MISC BASE D53C8D7C6C38 lea r15, ptr [r20+r21*2+0x38] +XDIS 1783e: MISC BASE D53C8D7C6D39 lea r15, ptr [r21+r21*2+0x39] +XDIS 17844: MISC BASE D53C8D7C6E3A lea r15, ptr [r22+r21*2+0x3a] +XDIS 1784a: MISC BASE D53C8D7C6F3B lea r15, ptr [r23+r21*2+0x3b] +XDIS 17850: MISC BASE D53D8D7C683C lea r15, ptr [r24+r21*2+0x3c] +XDIS 17856: MISC BASE D53D8D7C693D lea r15, ptr [r25+r21*2+0x3d] +XDIS 1785c: MISC BASE D53D8D7C6A3E lea r15, ptr [r26+r21*2+0x3e] +XDIS 17862: MISC BASE D53D8D7C6B3F lea r15, ptr [r27+r21*2+0x3f] +XDIS 17868: MISC BASE D53D8D7C6C40 lea r15, ptr [r28+r21*2+0x40] +XDIS 1786e: MISC BASE D53D8D7C6D41 lea r15, ptr [r29+r21*2+0x41] +XDIS 17874: MISC BASE D53D8D7C6E42 lea r15, ptr [r30+r21*2+0x42] +XDIS 1787a: MISC BASE D53D8D7C6F43 lea r15, ptr [r31+r21*2+0x43] +XDIS 17880: MISC BASE D52C8D7C7025 lea r15, ptr [rax+r22*2+0x25] +XDIS 17886: MISC BASE D52C8D7C7126 lea r15, ptr [rcx+r22*2+0x26] +XDIS 1788c: MISC BASE D52C8D7C7227 lea r15, ptr [rdx+r22*2+0x27] +XDIS 17892: MISC BASE D52C8D7C7328 lea r15, ptr [rbx+r22*2+0x28] +XDIS 17898: MISC BASE D52C8D7C7429 lea r15, ptr [rsp+r22*2+0x29] +XDIS 1789e: MISC BASE D52C8D7C752A lea r15, ptr [rbp+r22*2+0x2a] +XDIS 178a4: MISC BASE D52C8D7C762B lea r15, ptr [rsi+r22*2+0x2b] +XDIS 178aa: MISC BASE D52C8D7C772C lea r15, ptr [rdi+r22*2+0x2c] +XDIS 178b0: MISC BASE D52D8D7C702D lea r15, ptr [r8+r22*2+0x2d] +XDIS 178b6: MISC BASE D52D8D7C712E lea r15, ptr [r9+r22*2+0x2e] +XDIS 178bc: MISC BASE D52D8D7C722F lea r15, ptr [r10+r22*2+0x2f] +XDIS 178c2: MISC BASE D52D8D7C7330 lea r15, ptr [r11+r22*2+0x30] +XDIS 178c8: MISC BASE D52D8D7C7431 lea r15, ptr [r12+r22*2+0x31] +XDIS 178ce: MISC BASE D52D8D7C7532 lea r15, ptr [r13+r22*2+0x32] +XDIS 178d4: MISC BASE D52D8D7C7633 lea r15, ptr [r14+r22*2+0x33] +XDIS 178da: MISC BASE D52D8D7C7734 lea r15, ptr [r15+r22*2+0x34] +XDIS 178e0: MISC BASE D53C8D7C7035 lea r15, ptr [r16+r22*2+0x35] +XDIS 178e6: MISC BASE D53C8D7C7136 lea r15, ptr [r17+r22*2+0x36] +XDIS 178ec: MISC BASE D53C8D7C7237 lea r15, ptr [r18+r22*2+0x37] +XDIS 178f2: MISC BASE D53C8D7C7338 lea r15, ptr [r19+r22*2+0x38] +XDIS 178f8: MISC BASE D53C8D7C7439 lea r15, ptr [r20+r22*2+0x39] +XDIS 178fe: MISC BASE D53C8D7C753A lea r15, ptr [r21+r22*2+0x3a] +XDIS 17904: MISC BASE D53C8D7C763B lea r15, ptr [r22+r22*2+0x3b] +XDIS 1790a: MISC BASE D53C8D7C773C lea r15, ptr [r23+r22*2+0x3c] +XDIS 17910: MISC BASE D53D8D7C703D lea r15, ptr [r24+r22*2+0x3d] +XDIS 17916: MISC BASE D53D8D7C713E lea r15, ptr [r25+r22*2+0x3e] +XDIS 1791c: MISC BASE D53D8D7C723F lea r15, ptr [r26+r22*2+0x3f] +XDIS 17922: MISC BASE D53D8D7C7340 lea r15, ptr [r27+r22*2+0x40] +XDIS 17928: MISC BASE D53D8D7C7441 lea r15, ptr [r28+r22*2+0x41] +XDIS 1792e: MISC BASE D53D8D7C7542 lea r15, ptr [r29+r22*2+0x42] +XDIS 17934: MISC BASE D53D8D7C7643 lea r15, ptr [r30+r22*2+0x43] +XDIS 1793a: MISC BASE D53D8D7C7744 lea r15, ptr [r31+r22*2+0x44] +XDIS 17940: MISC BASE D52C8D7C7826 lea r15, ptr [rax+r23*2+0x26] +XDIS 17946: MISC BASE D52C8D7C7927 lea r15, ptr [rcx+r23*2+0x27] +XDIS 1794c: MISC BASE D52C8D7C7A28 lea r15, ptr [rdx+r23*2+0x28] +XDIS 17952: MISC BASE D52C8D7C7B29 lea r15, ptr [rbx+r23*2+0x29] +XDIS 17958: MISC BASE D52C8D7C7C2A lea r15, ptr [rsp+r23*2+0x2a] +XDIS 1795e: MISC BASE D52C8D7C7D2B lea r15, ptr [rbp+r23*2+0x2b] +XDIS 17964: MISC BASE D52C8D7C7E2C lea r15, ptr [rsi+r23*2+0x2c] +XDIS 1796a: MISC BASE D52C8D7C7F2D lea r15, ptr [rdi+r23*2+0x2d] +XDIS 17970: MISC BASE D52D8D7C782E lea r15, ptr [r8+r23*2+0x2e] +XDIS 17976: MISC BASE D52D8D7C792F lea r15, ptr [r9+r23*2+0x2f] +XDIS 1797c: MISC BASE D52D8D7C7A30 lea r15, ptr [r10+r23*2+0x30] +XDIS 17982: MISC BASE D52D8D7C7B31 lea r15, ptr [r11+r23*2+0x31] +XDIS 17988: MISC BASE D52D8D7C7C32 lea r15, ptr [r12+r23*2+0x32] +XDIS 1798e: MISC BASE D52D8D7C7D33 lea r15, ptr [r13+r23*2+0x33] +XDIS 17994: MISC BASE D52D8D7C7E34 lea r15, ptr [r14+r23*2+0x34] +XDIS 1799a: MISC BASE D52D8D7C7F35 lea r15, ptr [r15+r23*2+0x35] +XDIS 179a0: MISC BASE D53C8D7C7836 lea r15, ptr [r16+r23*2+0x36] +XDIS 179a6: MISC BASE D53C8D7C7937 lea r15, ptr [r17+r23*2+0x37] +XDIS 179ac: MISC BASE D53C8D7C7A38 lea r15, ptr [r18+r23*2+0x38] +XDIS 179b2: MISC BASE D53C8D7C7B39 lea r15, ptr [r19+r23*2+0x39] +XDIS 179b8: MISC BASE D53C8D7C7C3A lea r15, ptr [r20+r23*2+0x3a] +XDIS 179be: MISC BASE D53C8D7C7D3B lea r15, ptr [r21+r23*2+0x3b] +XDIS 179c4: MISC BASE D53C8D7C7E3C lea r15, ptr [r22+r23*2+0x3c] +XDIS 179ca: MISC BASE D53C8D7C7F3D lea r15, ptr [r23+r23*2+0x3d] +XDIS 179d0: MISC BASE D53D8D7C783E lea r15, ptr [r24+r23*2+0x3e] +XDIS 179d6: MISC BASE D53D8D7C793F lea r15, ptr [r25+r23*2+0x3f] +XDIS 179dc: MISC BASE D53D8D7C7A40 lea r15, ptr [r26+r23*2+0x40] +XDIS 179e2: MISC BASE D53D8D7C7B41 lea r15, ptr [r27+r23*2+0x41] +XDIS 179e8: MISC BASE D53D8D7C7C42 lea r15, ptr [r28+r23*2+0x42] +XDIS 179ee: MISC BASE D53D8D7C7D43 lea r15, ptr [r29+r23*2+0x43] +XDIS 179f4: MISC BASE D53D8D7C7E44 lea r15, ptr [r30+r23*2+0x44] +XDIS 179fa: MISC BASE D53D8D7C7F45 lea r15, ptr [r31+r23*2+0x45] +XDIS 17a00: MISC BASE D52E8D7C4027 lea r15, ptr [rax+r24*2+0x27] +XDIS 17a06: MISC BASE D52E8D7C4128 lea r15, ptr [rcx+r24*2+0x28] +XDIS 17a0c: MISC BASE D52E8D7C4229 lea r15, ptr [rdx+r24*2+0x29] +XDIS 17a12: MISC BASE D52E8D7C432A lea r15, ptr [rbx+r24*2+0x2a] +XDIS 17a18: MISC BASE D52E8D7C442B lea r15, ptr [rsp+r24*2+0x2b] +XDIS 17a1e: MISC BASE D52E8D7C452C lea r15, ptr [rbp+r24*2+0x2c] +XDIS 17a24: MISC BASE D52E8D7C462D lea r15, ptr [rsi+r24*2+0x2d] +XDIS 17a2a: MISC BASE D52E8D7C472E lea r15, ptr [rdi+r24*2+0x2e] +XDIS 17a30: MISC BASE D52F8D7C402F lea r15, ptr [r8+r24*2+0x2f] +XDIS 17a36: MISC BASE D52F8D7C4130 lea r15, ptr [r9+r24*2+0x30] +XDIS 17a3c: MISC BASE D52F8D7C4231 lea r15, ptr [r10+r24*2+0x31] +XDIS 17a42: MISC BASE D52F8D7C4332 lea r15, ptr [r11+r24*2+0x32] +XDIS 17a48: MISC BASE D52F8D7C4433 lea r15, ptr [r12+r24*2+0x33] +XDIS 17a4e: MISC BASE D52F8D7C4534 lea r15, ptr [r13+r24*2+0x34] +XDIS 17a54: MISC BASE D52F8D7C4635 lea r15, ptr [r14+r24*2+0x35] +XDIS 17a5a: MISC BASE D52F8D7C4736 lea r15, ptr [r15+r24*2+0x36] +XDIS 17a60: MISC BASE D53E8D7C4037 lea r15, ptr [r16+r24*2+0x37] +XDIS 17a66: MISC BASE D53E8D7C4138 lea r15, ptr [r17+r24*2+0x38] +XDIS 17a6c: MISC BASE D53E8D7C4239 lea r15, ptr [r18+r24*2+0x39] +XDIS 17a72: MISC BASE D53E8D7C433A lea r15, ptr [r19+r24*2+0x3a] +XDIS 17a78: MISC BASE D53E8D7C443B lea r15, ptr [r20+r24*2+0x3b] +XDIS 17a7e: MISC BASE D53E8D7C453C lea r15, ptr [r21+r24*2+0x3c] +XDIS 17a84: MISC BASE D53E8D7C463D lea r15, ptr [r22+r24*2+0x3d] +XDIS 17a8a: MISC BASE D53E8D7C473E lea r15, ptr [r23+r24*2+0x3e] +XDIS 17a90: MISC BASE D53F8D7C403F lea r15, ptr [r24+r24*2+0x3f] +XDIS 17a96: MISC BASE D53F8D7C4140 lea r15, ptr [r25+r24*2+0x40] +XDIS 17a9c: MISC BASE D53F8D7C4241 lea r15, ptr [r26+r24*2+0x41] +XDIS 17aa2: MISC BASE D53F8D7C4342 lea r15, ptr [r27+r24*2+0x42] +XDIS 17aa8: MISC BASE D53F8D7C4443 lea r15, ptr [r28+r24*2+0x43] +XDIS 17aae: MISC BASE D53F8D7C4544 lea r15, ptr [r29+r24*2+0x44] +XDIS 17ab4: MISC BASE D53F8D7C4645 lea r15, ptr [r30+r24*2+0x45] +XDIS 17aba: MISC BASE D53F8D7C4746 lea r15, ptr [r31+r24*2+0x46] +XDIS 17ac0: MISC BASE D52E8D7C4828 lea r15, ptr [rax+r25*2+0x28] +XDIS 17ac6: MISC BASE D52E8D7C4929 lea r15, ptr [rcx+r25*2+0x29] +XDIS 17acc: MISC BASE D52E8D7C4A2A lea r15, ptr [rdx+r25*2+0x2a] +XDIS 17ad2: MISC BASE D52E8D7C4B2B lea r15, ptr [rbx+r25*2+0x2b] +XDIS 17ad8: MISC BASE D52E8D7C4C2C lea r15, ptr [rsp+r25*2+0x2c] +XDIS 17ade: MISC BASE D52E8D7C4D2D lea r15, ptr [rbp+r25*2+0x2d] +XDIS 17ae4: MISC BASE D52E8D7C4E2E lea r15, ptr [rsi+r25*2+0x2e] +XDIS 17aea: MISC BASE D52E8D7C4F2F lea r15, ptr [rdi+r25*2+0x2f] +XDIS 17af0: MISC BASE D52F8D7C4830 lea r15, ptr [r8+r25*2+0x30] +XDIS 17af6: MISC BASE D52F8D7C4931 lea r15, ptr [r9+r25*2+0x31] +XDIS 17afc: MISC BASE D52F8D7C4A32 lea r15, ptr [r10+r25*2+0x32] +XDIS 17b02: MISC BASE D52F8D7C4B33 lea r15, ptr [r11+r25*2+0x33] +XDIS 17b08: MISC BASE D52F8D7C4C34 lea r15, ptr [r12+r25*2+0x34] +XDIS 17b0e: MISC BASE D52F8D7C4D35 lea r15, ptr [r13+r25*2+0x35] +XDIS 17b14: MISC BASE D52F8D7C4E36 lea r15, ptr [r14+r25*2+0x36] +XDIS 17b1a: MISC BASE D52F8D7C4F37 lea r15, ptr [r15+r25*2+0x37] +XDIS 17b20: MISC BASE D53E8D7C4838 lea r15, ptr [r16+r25*2+0x38] +XDIS 17b26: MISC BASE D53E8D7C4939 lea r15, ptr [r17+r25*2+0x39] +XDIS 17b2c: MISC BASE D53E8D7C4A3A lea r15, ptr [r18+r25*2+0x3a] +XDIS 17b32: MISC BASE D53E8D7C4B3B lea r15, ptr [r19+r25*2+0x3b] +XDIS 17b38: MISC BASE D53E8D7C4C3C lea r15, ptr [r20+r25*2+0x3c] +XDIS 17b3e: MISC BASE D53E8D7C4D3D lea r15, ptr [r21+r25*2+0x3d] +XDIS 17b44: MISC BASE D53E8D7C4E3E lea r15, ptr [r22+r25*2+0x3e] +XDIS 17b4a: MISC BASE D53E8D7C4F3F lea r15, ptr [r23+r25*2+0x3f] +XDIS 17b50: MISC BASE D53F8D7C4840 lea r15, ptr [r24+r25*2+0x40] +XDIS 17b56: MISC BASE D53F8D7C4941 lea r15, ptr [r25+r25*2+0x41] +XDIS 17b5c: MISC BASE D53F8D7C4A42 lea r15, ptr [r26+r25*2+0x42] +XDIS 17b62: MISC BASE D53F8D7C4B43 lea r15, ptr [r27+r25*2+0x43] +XDIS 17b68: MISC BASE D53F8D7C4C44 lea r15, ptr [r28+r25*2+0x44] +XDIS 17b6e: MISC BASE D53F8D7C4D45 lea r15, ptr [r29+r25*2+0x45] +XDIS 17b74: MISC BASE D53F8D7C4E46 lea r15, ptr [r30+r25*2+0x46] +XDIS 17b7a: MISC BASE D53F8D7C4F47 lea r15, ptr [r31+r25*2+0x47] +XDIS 17b80: MISC BASE D52E8D7C5029 lea r15, ptr [rax+r26*2+0x29] +XDIS 17b86: MISC BASE D52E8D7C512A lea r15, ptr [rcx+r26*2+0x2a] +XDIS 17b8c: MISC BASE D52E8D7C522B lea r15, ptr [rdx+r26*2+0x2b] +XDIS 17b92: MISC BASE D52E8D7C532C lea r15, ptr [rbx+r26*2+0x2c] +XDIS 17b98: MISC BASE D52E8D7C542D lea r15, ptr [rsp+r26*2+0x2d] +XDIS 17b9e: MISC BASE D52E8D7C552E lea r15, ptr [rbp+r26*2+0x2e] +XDIS 17ba4: MISC BASE D52E8D7C562F lea r15, ptr [rsi+r26*2+0x2f] +XDIS 17baa: MISC BASE D52E8D7C5730 lea r15, ptr [rdi+r26*2+0x30] +XDIS 17bb0: MISC BASE D52F8D7C5031 lea r15, ptr [r8+r26*2+0x31] +XDIS 17bb6: MISC BASE D52F8D7C5132 lea r15, ptr [r9+r26*2+0x32] +XDIS 17bbc: MISC BASE D52F8D7C5233 lea r15, ptr [r10+r26*2+0x33] +XDIS 17bc2: MISC BASE D52F8D7C5334 lea r15, ptr [r11+r26*2+0x34] +XDIS 17bc8: MISC BASE D52F8D7C5435 lea r15, ptr [r12+r26*2+0x35] +XDIS 17bce: MISC BASE D52F8D7C5536 lea r15, ptr [r13+r26*2+0x36] +XDIS 17bd4: MISC BASE D52F8D7C5637 lea r15, ptr [r14+r26*2+0x37] +XDIS 17bda: MISC BASE D52F8D7C5738 lea r15, ptr [r15+r26*2+0x38] +XDIS 17be0: MISC BASE D53E8D7C5039 lea r15, ptr [r16+r26*2+0x39] +XDIS 17be6: MISC BASE D53E8D7C513A lea r15, ptr [r17+r26*2+0x3a] +XDIS 17bec: MISC BASE D53E8D7C523B lea r15, ptr [r18+r26*2+0x3b] +XDIS 17bf2: MISC BASE D53E8D7C533C lea r15, ptr [r19+r26*2+0x3c] +XDIS 17bf8: MISC BASE D53E8D7C543D lea r15, ptr [r20+r26*2+0x3d] +XDIS 17bfe: MISC BASE D53E8D7C553E lea r15, ptr [r21+r26*2+0x3e] +XDIS 17c04: MISC BASE D53E8D7C563F lea r15, ptr [r22+r26*2+0x3f] +XDIS 17c0a: MISC BASE D53E8D7C5740 lea r15, ptr [r23+r26*2+0x40] +XDIS 17c10: MISC BASE D53F8D7C5041 lea r15, ptr [r24+r26*2+0x41] +XDIS 17c16: MISC BASE D53F8D7C5142 lea r15, ptr [r25+r26*2+0x42] +XDIS 17c1c: MISC BASE D53F8D7C5243 lea r15, ptr [r26+r26*2+0x43] +XDIS 17c22: MISC BASE D53F8D7C5344 lea r15, ptr [r27+r26*2+0x44] +XDIS 17c28: MISC BASE D53F8D7C5445 lea r15, ptr [r28+r26*2+0x45] +XDIS 17c2e: MISC BASE D53F8D7C5546 lea r15, ptr [r29+r26*2+0x46] +XDIS 17c34: MISC BASE D53F8D7C5647 lea r15, ptr [r30+r26*2+0x47] +XDIS 17c3a: MISC BASE D53F8D7C5748 lea r15, ptr [r31+r26*2+0x48] +XDIS 17c40: MISC BASE D52E8D7C582A lea r15, ptr [rax+r27*2+0x2a] +XDIS 17c46: MISC BASE D52E8D7C592B lea r15, ptr [rcx+r27*2+0x2b] +XDIS 17c4c: MISC BASE D52E8D7C5A2C lea r15, ptr [rdx+r27*2+0x2c] +XDIS 17c52: MISC BASE D52E8D7C5B2D lea r15, ptr [rbx+r27*2+0x2d] +XDIS 17c58: MISC BASE D52E8D7C5C2E lea r15, ptr [rsp+r27*2+0x2e] +XDIS 17c5e: MISC BASE D52E8D7C5D2F lea r15, ptr [rbp+r27*2+0x2f] +XDIS 17c64: MISC BASE D52E8D7C5E30 lea r15, ptr [rsi+r27*2+0x30] +XDIS 17c6a: MISC BASE D52E8D7C5F31 lea r15, ptr [rdi+r27*2+0x31] +XDIS 17c70: MISC BASE D52F8D7C5832 lea r15, ptr [r8+r27*2+0x32] +XDIS 17c76: MISC BASE D52F8D7C5933 lea r15, ptr [r9+r27*2+0x33] +XDIS 17c7c: MISC BASE D52F8D7C5A34 lea r15, ptr [r10+r27*2+0x34] +XDIS 17c82: MISC BASE D52F8D7C5B35 lea r15, ptr [r11+r27*2+0x35] +XDIS 17c88: MISC BASE D52F8D7C5C36 lea r15, ptr [r12+r27*2+0x36] +XDIS 17c8e: MISC BASE D52F8D7C5D37 lea r15, ptr [r13+r27*2+0x37] +XDIS 17c94: MISC BASE D52F8D7C5E38 lea r15, ptr [r14+r27*2+0x38] +XDIS 17c9a: MISC BASE D52F8D7C5F39 lea r15, ptr [r15+r27*2+0x39] +XDIS 17ca0: MISC BASE D53E8D7C583A lea r15, ptr [r16+r27*2+0x3a] +XDIS 17ca6: MISC BASE D53E8D7C593B lea r15, ptr [r17+r27*2+0x3b] +XDIS 17cac: MISC BASE D53E8D7C5A3C lea r15, ptr [r18+r27*2+0x3c] +XDIS 17cb2: MISC BASE D53E8D7C5B3D lea r15, ptr [r19+r27*2+0x3d] +XDIS 17cb8: MISC BASE D53E8D7C5C3E lea r15, ptr [r20+r27*2+0x3e] +XDIS 17cbe: MISC BASE D53E8D7C5D3F lea r15, ptr [r21+r27*2+0x3f] +XDIS 17cc4: MISC BASE D53E8D7C5E40 lea r15, ptr [r22+r27*2+0x40] +XDIS 17cca: MISC BASE D53E8D7C5F41 lea r15, ptr [r23+r27*2+0x41] +XDIS 17cd0: MISC BASE D53F8D7C5842 lea r15, ptr [r24+r27*2+0x42] +XDIS 17cd6: MISC BASE D53F8D7C5943 lea r15, ptr [r25+r27*2+0x43] +XDIS 17cdc: MISC BASE D53F8D7C5A44 lea r15, ptr [r26+r27*2+0x44] +XDIS 17ce2: MISC BASE D53F8D7C5B45 lea r15, ptr [r27+r27*2+0x45] +XDIS 17ce8: MISC BASE D53F8D7C5C46 lea r15, ptr [r28+r27*2+0x46] +XDIS 17cee: MISC BASE D53F8D7C5D47 lea r15, ptr [r29+r27*2+0x47] +XDIS 17cf4: MISC BASE D53F8D7C5E48 lea r15, ptr [r30+r27*2+0x48] +XDIS 17cfa: MISC BASE D53F8D7C5F49 lea r15, ptr [r31+r27*2+0x49] +XDIS 17d00: MISC BASE D52E8D7C602B lea r15, ptr [rax+r28*2+0x2b] +XDIS 17d06: MISC BASE D52E8D7C612C lea r15, ptr [rcx+r28*2+0x2c] +XDIS 17d0c: MISC BASE D52E8D7C622D lea r15, ptr [rdx+r28*2+0x2d] +XDIS 17d12: MISC BASE D52E8D7C632E lea r15, ptr [rbx+r28*2+0x2e] +XDIS 17d18: MISC BASE D52E8D7C642F lea r15, ptr [rsp+r28*2+0x2f] +XDIS 17d1e: MISC BASE D52E8D7C6530 lea r15, ptr [rbp+r28*2+0x30] +XDIS 17d24: MISC BASE D52E8D7C6631 lea r15, ptr [rsi+r28*2+0x31] +XDIS 17d2a: MISC BASE D52E8D7C6732 lea r15, ptr [rdi+r28*2+0x32] +XDIS 17d30: MISC BASE D52F8D7C6033 lea r15, ptr [r8+r28*2+0x33] +XDIS 17d36: MISC BASE D52F8D7C6134 lea r15, ptr [r9+r28*2+0x34] +XDIS 17d3c: MISC BASE D52F8D7C6235 lea r15, ptr [r10+r28*2+0x35] +XDIS 17d42: MISC BASE D52F8D7C6336 lea r15, ptr [r11+r28*2+0x36] +XDIS 17d48: MISC BASE D52F8D7C6437 lea r15, ptr [r12+r28*2+0x37] +XDIS 17d4e: MISC BASE D52F8D7C6538 lea r15, ptr [r13+r28*2+0x38] +XDIS 17d54: MISC BASE D52F8D7C6639 lea r15, ptr [r14+r28*2+0x39] +XDIS 17d5a: MISC BASE D52F8D7C673A lea r15, ptr [r15+r28*2+0x3a] +XDIS 17d60: MISC BASE D53E8D7C603B lea r15, ptr [r16+r28*2+0x3b] +XDIS 17d66: MISC BASE D53E8D7C613C lea r15, ptr [r17+r28*2+0x3c] +XDIS 17d6c: MISC BASE D53E8D7C623D lea r15, ptr [r18+r28*2+0x3d] +XDIS 17d72: MISC BASE D53E8D7C633E lea r15, ptr [r19+r28*2+0x3e] +XDIS 17d78: MISC BASE D53E8D7C643F lea r15, ptr [r20+r28*2+0x3f] +XDIS 17d7e: MISC BASE D53E8D7C6540 lea r15, ptr [r21+r28*2+0x40] +XDIS 17d84: MISC BASE D53E8D7C6641 lea r15, ptr [r22+r28*2+0x41] +XDIS 17d8a: MISC BASE D53E8D7C6742 lea r15, ptr [r23+r28*2+0x42] +XDIS 17d90: MISC BASE D53F8D7C6043 lea r15, ptr [r24+r28*2+0x43] +XDIS 17d96: MISC BASE D53F8D7C6144 lea r15, ptr [r25+r28*2+0x44] +XDIS 17d9c: MISC BASE D53F8D7C6245 lea r15, ptr [r26+r28*2+0x45] +XDIS 17da2: MISC BASE D53F8D7C6346 lea r15, ptr [r27+r28*2+0x46] +XDIS 17da8: MISC BASE D53F8D7C6447 lea r15, ptr [r28+r28*2+0x47] +XDIS 17dae: MISC BASE D53F8D7C6548 lea r15, ptr [r29+r28*2+0x48] +XDIS 17db4: MISC BASE D53F8D7C6649 lea r15, ptr [r30+r28*2+0x49] +XDIS 17dba: MISC BASE D53F8D7C674A lea r15, ptr [r31+r28*2+0x4a] +XDIS 17dc0: MISC BASE D52E8D7C682C lea r15, ptr [rax+r29*2+0x2c] +XDIS 17dc6: MISC BASE D52E8D7C692D lea r15, ptr [rcx+r29*2+0x2d] +XDIS 17dcc: MISC BASE D52E8D7C6A2E lea r15, ptr [rdx+r29*2+0x2e] +XDIS 17dd2: MISC BASE D52E8D7C6B2F lea r15, ptr [rbx+r29*2+0x2f] +XDIS 17dd8: MISC BASE D52E8D7C6C30 lea r15, ptr [rsp+r29*2+0x30] +XDIS 17dde: MISC BASE D52E8D7C6D31 lea r15, ptr [rbp+r29*2+0x31] +XDIS 17de4: MISC BASE D52E8D7C6E32 lea r15, ptr [rsi+r29*2+0x32] +XDIS 17dea: MISC BASE D52E8D7C6F33 lea r15, ptr [rdi+r29*2+0x33] +XDIS 17df0: MISC BASE D52F8D7C6834 lea r15, ptr [r8+r29*2+0x34] +XDIS 17df6: MISC BASE D52F8D7C6935 lea r15, ptr [r9+r29*2+0x35] +XDIS 17dfc: MISC BASE D52F8D7C6A36 lea r15, ptr [r10+r29*2+0x36] +XDIS 17e02: MISC BASE D52F8D7C6B37 lea r15, ptr [r11+r29*2+0x37] +XDIS 17e08: MISC BASE D52F8D7C6C38 lea r15, ptr [r12+r29*2+0x38] +XDIS 17e0e: MISC BASE D52F8D7C6D39 lea r15, ptr [r13+r29*2+0x39] +XDIS 17e14: MISC BASE D52F8D7C6E3A lea r15, ptr [r14+r29*2+0x3a] +XDIS 17e1a: MISC BASE D52F8D7C6F3B lea r15, ptr [r15+r29*2+0x3b] +XDIS 17e20: MISC BASE D53E8D7C683C lea r15, ptr [r16+r29*2+0x3c] +XDIS 17e26: MISC BASE D53E8D7C693D lea r15, ptr [r17+r29*2+0x3d] +XDIS 17e2c: MISC BASE D53E8D7C6A3E lea r15, ptr [r18+r29*2+0x3e] +XDIS 17e32: MISC BASE D53E8D7C6B3F lea r15, ptr [r19+r29*2+0x3f] +XDIS 17e38: MISC BASE D53E8D7C6C40 lea r15, ptr [r20+r29*2+0x40] +XDIS 17e3e: MISC BASE D53E8D7C6D41 lea r15, ptr [r21+r29*2+0x41] +XDIS 17e44: MISC BASE D53E8D7C6E42 lea r15, ptr [r22+r29*2+0x42] +XDIS 17e4a: MISC BASE D53E8D7C6F43 lea r15, ptr [r23+r29*2+0x43] +XDIS 17e50: MISC BASE D53F8D7C6844 lea r15, ptr [r24+r29*2+0x44] +XDIS 17e56: MISC BASE D53F8D7C6945 lea r15, ptr [r25+r29*2+0x45] +XDIS 17e5c: MISC BASE D53F8D7C6A46 lea r15, ptr [r26+r29*2+0x46] +XDIS 17e62: MISC BASE D53F8D7C6B47 lea r15, ptr [r27+r29*2+0x47] +XDIS 17e68: MISC BASE D53F8D7C6C48 lea r15, ptr [r28+r29*2+0x48] +XDIS 17e6e: MISC BASE D53F8D7C6D49 lea r15, ptr [r29+r29*2+0x49] +XDIS 17e74: MISC BASE D53F8D7C6E4A lea r15, ptr [r30+r29*2+0x4a] +XDIS 17e7a: MISC BASE D53F8D7C6F4B lea r15, ptr [r31+r29*2+0x4b] +XDIS 17e80: MISC BASE D52E8D7C702D lea r15, ptr [rax+r30*2+0x2d] +XDIS 17e86: MISC BASE D52E8D7C712E lea r15, ptr [rcx+r30*2+0x2e] +XDIS 17e8c: MISC BASE D52E8D7C722F lea r15, ptr [rdx+r30*2+0x2f] +XDIS 17e92: MISC BASE D52E8D7C7330 lea r15, ptr [rbx+r30*2+0x30] +XDIS 17e98: MISC BASE D52E8D7C7431 lea r15, ptr [rsp+r30*2+0x31] +XDIS 17e9e: MISC BASE D52E8D7C7532 lea r15, ptr [rbp+r30*2+0x32] +XDIS 17ea4: MISC BASE D52E8D7C7633 lea r15, ptr [rsi+r30*2+0x33] +XDIS 17eaa: MISC BASE D52E8D7C7734 lea r15, ptr [rdi+r30*2+0x34] +XDIS 17eb0: MISC BASE D52F8D7C7035 lea r15, ptr [r8+r30*2+0x35] +XDIS 17eb6: MISC BASE D52F8D7C7136 lea r15, ptr [r9+r30*2+0x36] +XDIS 17ebc: MISC BASE D52F8D7C7237 lea r15, ptr [r10+r30*2+0x37] +XDIS 17ec2: MISC BASE D52F8D7C7338 lea r15, ptr [r11+r30*2+0x38] +XDIS 17ec8: MISC BASE D52F8D7C7439 lea r15, ptr [r12+r30*2+0x39] +XDIS 17ece: MISC BASE D52F8D7C753A lea r15, ptr [r13+r30*2+0x3a] +XDIS 17ed4: MISC BASE D52F8D7C763B lea r15, ptr [r14+r30*2+0x3b] +XDIS 17eda: MISC BASE D52F8D7C773C lea r15, ptr [r15+r30*2+0x3c] +XDIS 17ee0: MISC BASE D53E8D7C703D lea r15, ptr [r16+r30*2+0x3d] +XDIS 17ee6: MISC BASE D53E8D7C713E lea r15, ptr [r17+r30*2+0x3e] +XDIS 17eec: MISC BASE D53E8D7C723F lea r15, ptr [r18+r30*2+0x3f] +XDIS 17ef2: MISC BASE D53E8D7C7340 lea r15, ptr [r19+r30*2+0x40] +XDIS 17ef8: MISC BASE D53E8D7C7441 lea r15, ptr [r20+r30*2+0x41] +XDIS 17efe: MISC BASE D53E8D7C7542 lea r15, ptr [r21+r30*2+0x42] +XDIS 17f04: MISC BASE D53E8D7C7643 lea r15, ptr [r22+r30*2+0x43] +XDIS 17f0a: MISC BASE D53E8D7C7744 lea r15, ptr [r23+r30*2+0x44] +XDIS 17f10: MISC BASE D53F8D7C7045 lea r15, ptr [r24+r30*2+0x45] +XDIS 17f16: MISC BASE D53F8D7C7146 lea r15, ptr [r25+r30*2+0x46] +XDIS 17f1c: MISC BASE D53F8D7C7247 lea r15, ptr [r26+r30*2+0x47] +XDIS 17f22: MISC BASE D53F8D7C7348 lea r15, ptr [r27+r30*2+0x48] +XDIS 17f28: MISC BASE D53F8D7C7449 lea r15, ptr [r28+r30*2+0x49] +XDIS 17f2e: MISC BASE D53F8D7C754A lea r15, ptr [r29+r30*2+0x4a] +XDIS 17f34: MISC BASE D53F8D7C764B lea r15, ptr [r30+r30*2+0x4b] +XDIS 17f3a: MISC BASE D53F8D7C774C lea r15, ptr [r31+r30*2+0x4c] +XDIS 17f40: MISC BASE D52E8D7C782E lea r15, ptr [rax+r31*2+0x2e] +XDIS 17f46: MISC BASE D52E8D7C792F lea r15, ptr [rcx+r31*2+0x2f] +XDIS 17f4c: MISC BASE D52E8D7C7A30 lea r15, ptr [rdx+r31*2+0x30] +XDIS 17f52: MISC BASE D52E8D7C7B31 lea r15, ptr [rbx+r31*2+0x31] +XDIS 17f58: MISC BASE D52E8D7C7C32 lea r15, ptr [rsp+r31*2+0x32] +XDIS 17f5e: MISC BASE D52E8D7C7D33 lea r15, ptr [rbp+r31*2+0x33] +XDIS 17f64: MISC BASE D52E8D7C7E34 lea r15, ptr [rsi+r31*2+0x34] +XDIS 17f6a: MISC BASE D52E8D7C7F35 lea r15, ptr [rdi+r31*2+0x35] +XDIS 17f70: MISC BASE D52F8D7C7836 lea r15, ptr [r8+r31*2+0x36] +XDIS 17f76: MISC BASE D52F8D7C7937 lea r15, ptr [r9+r31*2+0x37] +XDIS 17f7c: MISC BASE D52F8D7C7A38 lea r15, ptr [r10+r31*2+0x38] +XDIS 17f82: MISC BASE D52F8D7C7B39 lea r15, ptr [r11+r31*2+0x39] +XDIS 17f88: MISC BASE D52F8D7C7C3A lea r15, ptr [r12+r31*2+0x3a] +XDIS 17f8e: MISC BASE D52F8D7C7D3B lea r15, ptr [r13+r31*2+0x3b] +XDIS 17f94: MISC BASE D52F8D7C7E3C lea r15, ptr [r14+r31*2+0x3c] +XDIS 17f9a: MISC BASE D52F8D7C7F3D lea r15, ptr [r15+r31*2+0x3d] +XDIS 17fa0: MISC BASE D53E8D7C783E lea r15, ptr [r16+r31*2+0x3e] +XDIS 17fa6: MISC BASE D53E8D7C793F lea r15, ptr [r17+r31*2+0x3f] +XDIS 17fac: MISC BASE D53E8D7C7A40 lea r15, ptr [r18+r31*2+0x40] +XDIS 17fb2: MISC BASE D53E8D7C7B41 lea r15, ptr [r19+r31*2+0x41] +XDIS 17fb8: MISC BASE D53E8D7C7C42 lea r15, ptr [r20+r31*2+0x42] +XDIS 17fbe: MISC BASE D53E8D7C7D43 lea r15, ptr [r21+r31*2+0x43] +XDIS 17fc4: MISC BASE D53E8D7C7E44 lea r15, ptr [r22+r31*2+0x44] +XDIS 17fca: MISC BASE D53E8D7C7F45 lea r15, ptr [r23+r31*2+0x45] +XDIS 17fd0: MISC BASE D53F8D7C7846 lea r15, ptr [r24+r31*2+0x46] +XDIS 17fd6: MISC BASE D53F8D7C7947 lea r15, ptr [r25+r31*2+0x47] +XDIS 17fdc: MISC BASE D53F8D7C7A48 lea r15, ptr [r26+r31*2+0x48] +XDIS 17fe2: MISC BASE D53F8D7C7B49 lea r15, ptr [r27+r31*2+0x49] +XDIS 17fe8: MISC BASE D53F8D7C7C4A lea r15, ptr [r28+r31*2+0x4a] +XDIS 17fee: MISC BASE D53F8D7C7D4B lea r15, ptr [r29+r31*2+0x4b] +XDIS 17ff4: MISC BASE D53F8D7C7E4C lea r15, ptr [r30+r31*2+0x4c] +XDIS 17ffa: MISC BASE D53F8D7C7F4D lea r15, ptr [r31+r31*2+0x4d] +XDIS 18000: MISC BASE D5488D444010 lea r16, ptr [rax+rax*2+0x10] +XDIS 18006: MISC BASE D5488D444111 lea r16, ptr [rcx+rax*2+0x11] +XDIS 1800c: MISC BASE D5488D444212 lea r16, ptr [rdx+rax*2+0x12] +XDIS 18012: MISC BASE D5488D444313 lea r16, ptr [rbx+rax*2+0x13] +XDIS 18018: MISC BASE D5488D444414 lea r16, ptr [rsp+rax*2+0x14] +XDIS 1801e: MISC BASE D5488D444515 lea r16, ptr [rbp+rax*2+0x15] +XDIS 18024: MISC BASE D5488D444616 lea r16, ptr [rsi+rax*2+0x16] +XDIS 1802a: MISC BASE D5488D444717 lea r16, ptr [rdi+rax*2+0x17] +XDIS 18030: MISC BASE D5498D444018 lea r16, ptr [r8+rax*2+0x18] +XDIS 18036: MISC BASE D5498D444119 lea r16, ptr [r9+rax*2+0x19] +XDIS 1803c: MISC BASE D5498D44421A lea r16, ptr [r10+rax*2+0x1a] +XDIS 18042: MISC BASE D5498D44431B lea r16, ptr [r11+rax*2+0x1b] +XDIS 18048: MISC BASE D5498D44441C lea r16, ptr [r12+rax*2+0x1c] +XDIS 1804e: MISC BASE D5498D44451D lea r16, ptr [r13+rax*2+0x1d] +XDIS 18054: MISC BASE D5498D44461E lea r16, ptr [r14+rax*2+0x1e] +XDIS 1805a: MISC BASE D5498D44471F lea r16, ptr [r15+rax*2+0x1f] +XDIS 18060: MISC BASE D5588D444020 lea r16, ptr [r16+rax*2+0x20] +XDIS 18066: MISC BASE D5588D444121 lea r16, ptr [r17+rax*2+0x21] +XDIS 1806c: MISC BASE D5588D444222 lea r16, ptr [r18+rax*2+0x22] +XDIS 18072: MISC BASE D5588D444323 lea r16, ptr [r19+rax*2+0x23] +XDIS 18078: MISC BASE D5588D444424 lea r16, ptr [r20+rax*2+0x24] +XDIS 1807e: MISC BASE D5588D444525 lea r16, ptr [r21+rax*2+0x25] +XDIS 18084: MISC BASE D5588D444626 lea r16, ptr [r22+rax*2+0x26] +XDIS 1808a: MISC BASE D5588D444727 lea r16, ptr [r23+rax*2+0x27] +XDIS 18090: MISC BASE D5598D444028 lea r16, ptr [r24+rax*2+0x28] +XDIS 18096: MISC BASE D5598D444129 lea r16, ptr [r25+rax*2+0x29] +XDIS 1809c: MISC BASE D5598D44422A lea r16, ptr [r26+rax*2+0x2a] +XDIS 180a2: MISC BASE D5598D44432B lea r16, ptr [r27+rax*2+0x2b] +XDIS 180a8: MISC BASE D5598D44442C lea r16, ptr [r28+rax*2+0x2c] +XDIS 180ae: MISC BASE D5598D44452D lea r16, ptr [r29+rax*2+0x2d] +XDIS 180b4: MISC BASE D5598D44462E lea r16, ptr [r30+rax*2+0x2e] +XDIS 180ba: MISC BASE D5598D44472F lea r16, ptr [r31+rax*2+0x2f] +XDIS 180c0: MISC BASE D5488D444811 lea r16, ptr [rax+rcx*2+0x11] +XDIS 180c6: MISC BASE D5488D444912 lea r16, ptr [rcx+rcx*2+0x12] +XDIS 180cc: MISC BASE D5488D444A13 lea r16, ptr [rdx+rcx*2+0x13] +XDIS 180d2: MISC BASE D5488D444B14 lea r16, ptr [rbx+rcx*2+0x14] +XDIS 180d8: MISC BASE D5488D444C15 lea r16, ptr [rsp+rcx*2+0x15] +XDIS 180de: MISC BASE D5488D444D16 lea r16, ptr [rbp+rcx*2+0x16] +XDIS 180e4: MISC BASE D5488D444E17 lea r16, ptr [rsi+rcx*2+0x17] +XDIS 180ea: MISC BASE D5488D444F18 lea r16, ptr [rdi+rcx*2+0x18] +XDIS 180f0: MISC BASE D5498D444819 lea r16, ptr [r8+rcx*2+0x19] +XDIS 180f6: MISC BASE D5498D44491A lea r16, ptr [r9+rcx*2+0x1a] +XDIS 180fc: MISC BASE D5498D444A1B lea r16, ptr [r10+rcx*2+0x1b] +XDIS 18102: MISC BASE D5498D444B1C lea r16, ptr [r11+rcx*2+0x1c] +XDIS 18108: MISC BASE D5498D444C1D lea r16, ptr [r12+rcx*2+0x1d] +XDIS 1810e: MISC BASE D5498D444D1E lea r16, ptr [r13+rcx*2+0x1e] +XDIS 18114: MISC BASE D5498D444E1F lea r16, ptr [r14+rcx*2+0x1f] +XDIS 1811a: MISC BASE D5498D444F20 lea r16, ptr [r15+rcx*2+0x20] +XDIS 18120: MISC BASE D5588D444821 lea r16, ptr [r16+rcx*2+0x21] +XDIS 18126: MISC BASE D5588D444922 lea r16, ptr [r17+rcx*2+0x22] +XDIS 1812c: MISC BASE D5588D444A23 lea r16, ptr [r18+rcx*2+0x23] +XDIS 18132: MISC BASE D5588D444B24 lea r16, ptr [r19+rcx*2+0x24] +XDIS 18138: MISC BASE D5588D444C25 lea r16, ptr [r20+rcx*2+0x25] +XDIS 1813e: MISC BASE D5588D444D26 lea r16, ptr [r21+rcx*2+0x26] +XDIS 18144: MISC BASE D5588D444E27 lea r16, ptr [r22+rcx*2+0x27] +XDIS 1814a: MISC BASE D5588D444F28 lea r16, ptr [r23+rcx*2+0x28] +XDIS 18150: MISC BASE D5598D444829 lea r16, ptr [r24+rcx*2+0x29] +XDIS 18156: MISC BASE D5598D44492A lea r16, ptr [r25+rcx*2+0x2a] +XDIS 1815c: MISC BASE D5598D444A2B lea r16, ptr [r26+rcx*2+0x2b] +XDIS 18162: MISC BASE D5598D444B2C lea r16, ptr [r27+rcx*2+0x2c] +XDIS 18168: MISC BASE D5598D444C2D lea r16, ptr [r28+rcx*2+0x2d] +XDIS 1816e: MISC BASE D5598D444D2E lea r16, ptr [r29+rcx*2+0x2e] +XDIS 18174: MISC BASE D5598D444E2F lea r16, ptr [r30+rcx*2+0x2f] +XDIS 1817a: MISC BASE D5598D444F30 lea r16, ptr [r31+rcx*2+0x30] +XDIS 18180: MISC BASE D5488D445012 lea r16, ptr [rax+rdx*2+0x12] +XDIS 18186: MISC BASE D5488D445113 lea r16, ptr [rcx+rdx*2+0x13] +XDIS 1818c: MISC BASE D5488D445214 lea r16, ptr [rdx+rdx*2+0x14] +XDIS 18192: MISC BASE D5488D445315 lea r16, ptr [rbx+rdx*2+0x15] +XDIS 18198: MISC BASE D5488D445416 lea r16, ptr [rsp+rdx*2+0x16] +XDIS 1819e: MISC BASE D5488D445517 lea r16, ptr [rbp+rdx*2+0x17] +XDIS 181a4: MISC BASE D5488D445618 lea r16, ptr [rsi+rdx*2+0x18] +XDIS 181aa: MISC BASE D5488D445719 lea r16, ptr [rdi+rdx*2+0x19] +XDIS 181b0: MISC BASE D5498D44501A lea r16, ptr [r8+rdx*2+0x1a] +XDIS 181b6: MISC BASE D5498D44511B lea r16, ptr [r9+rdx*2+0x1b] +XDIS 181bc: MISC BASE D5498D44521C lea r16, ptr [r10+rdx*2+0x1c] +XDIS 181c2: MISC BASE D5498D44531D lea r16, ptr [r11+rdx*2+0x1d] +XDIS 181c8: MISC BASE D5498D44541E lea r16, ptr [r12+rdx*2+0x1e] +XDIS 181ce: MISC BASE D5498D44551F lea r16, ptr [r13+rdx*2+0x1f] +XDIS 181d4: MISC BASE D5498D445620 lea r16, ptr [r14+rdx*2+0x20] +XDIS 181da: MISC BASE D5498D445721 lea r16, ptr [r15+rdx*2+0x21] +XDIS 181e0: MISC BASE D5588D445022 lea r16, ptr [r16+rdx*2+0x22] +XDIS 181e6: MISC BASE D5588D445123 lea r16, ptr [r17+rdx*2+0x23] +XDIS 181ec: MISC BASE D5588D445224 lea r16, ptr [r18+rdx*2+0x24] +XDIS 181f2: MISC BASE D5588D445325 lea r16, ptr [r19+rdx*2+0x25] +XDIS 181f8: MISC BASE D5588D445426 lea r16, ptr [r20+rdx*2+0x26] +XDIS 181fe: MISC BASE D5588D445527 lea r16, ptr [r21+rdx*2+0x27] +XDIS 18204: MISC BASE D5588D445628 lea r16, ptr [r22+rdx*2+0x28] +XDIS 1820a: MISC BASE D5588D445729 lea r16, ptr [r23+rdx*2+0x29] +XDIS 18210: MISC BASE D5598D44502A lea r16, ptr [r24+rdx*2+0x2a] +XDIS 18216: MISC BASE D5598D44512B lea r16, ptr [r25+rdx*2+0x2b] +XDIS 1821c: MISC BASE D5598D44522C lea r16, ptr [r26+rdx*2+0x2c] +XDIS 18222: MISC BASE D5598D44532D lea r16, ptr [r27+rdx*2+0x2d] +XDIS 18228: MISC BASE D5598D44542E lea r16, ptr [r28+rdx*2+0x2e] +XDIS 1822e: MISC BASE D5598D44552F lea r16, ptr [r29+rdx*2+0x2f] +XDIS 18234: MISC BASE D5598D445630 lea r16, ptr [r30+rdx*2+0x30] +XDIS 1823a: MISC BASE D5598D445731 lea r16, ptr [r31+rdx*2+0x31] +XDIS 18240: MISC BASE D5488D445813 lea r16, ptr [rax+rbx*2+0x13] +XDIS 18246: MISC BASE D5488D445914 lea r16, ptr [rcx+rbx*2+0x14] +XDIS 1824c: MISC BASE D5488D445A15 lea r16, ptr [rdx+rbx*2+0x15] +XDIS 18252: MISC BASE D5488D445B16 lea r16, ptr [rbx+rbx*2+0x16] +XDIS 18258: MISC BASE D5488D445C17 lea r16, ptr [rsp+rbx*2+0x17] +XDIS 1825e: MISC BASE D5488D445D18 lea r16, ptr [rbp+rbx*2+0x18] +XDIS 18264: MISC BASE D5488D445E19 lea r16, ptr [rsi+rbx*2+0x19] +XDIS 1826a: MISC BASE D5488D445F1A lea r16, ptr [rdi+rbx*2+0x1a] +XDIS 18270: MISC BASE D5498D44581B lea r16, ptr [r8+rbx*2+0x1b] +XDIS 18276: MISC BASE D5498D44591C lea r16, ptr [r9+rbx*2+0x1c] +XDIS 1827c: MISC BASE D5498D445A1D lea r16, ptr [r10+rbx*2+0x1d] +XDIS 18282: MISC BASE D5498D445B1E lea r16, ptr [r11+rbx*2+0x1e] +XDIS 18288: MISC BASE D5498D445C1F lea r16, ptr [r12+rbx*2+0x1f] +XDIS 1828e: MISC BASE D5498D445D20 lea r16, ptr [r13+rbx*2+0x20] +XDIS 18294: MISC BASE D5498D445E21 lea r16, ptr [r14+rbx*2+0x21] +XDIS 1829a: MISC BASE D5498D445F22 lea r16, ptr [r15+rbx*2+0x22] +XDIS 182a0: MISC BASE D5588D445823 lea r16, ptr [r16+rbx*2+0x23] +XDIS 182a6: MISC BASE D5588D445924 lea r16, ptr [r17+rbx*2+0x24] +XDIS 182ac: MISC BASE D5588D445A25 lea r16, ptr [r18+rbx*2+0x25] +XDIS 182b2: MISC BASE D5588D445B26 lea r16, ptr [r19+rbx*2+0x26] +XDIS 182b8: MISC BASE D5588D445C27 lea r16, ptr [r20+rbx*2+0x27] +XDIS 182be: MISC BASE D5588D445D28 lea r16, ptr [r21+rbx*2+0x28] +XDIS 182c4: MISC BASE D5588D445E29 lea r16, ptr [r22+rbx*2+0x29] +XDIS 182ca: MISC BASE D5588D445F2A lea r16, ptr [r23+rbx*2+0x2a] +XDIS 182d0: MISC BASE D5598D44582B lea r16, ptr [r24+rbx*2+0x2b] +XDIS 182d6: MISC BASE D5598D44592C lea r16, ptr [r25+rbx*2+0x2c] +XDIS 182dc: MISC BASE D5598D445A2D lea r16, ptr [r26+rbx*2+0x2d] +XDIS 182e2: MISC BASE D5598D445B2E lea r16, ptr [r27+rbx*2+0x2e] +XDIS 182e8: MISC BASE D5598D445C2F lea r16, ptr [r28+rbx*2+0x2f] +XDIS 182ee: MISC BASE D5598D445D30 lea r16, ptr [r29+rbx*2+0x30] +XDIS 182f4: MISC BASE D5598D445E31 lea r16, ptr [r30+rbx*2+0x31] +XDIS 182fa: MISC BASE D5598D445F32 lea r16, ptr [r31+rbx*2+0x32] +XDIS 18300: MISC BASE D5488D446014 lea r16, ptr [rax+0x14] +XDIS 18306: MISC BASE D5488D446115 lea r16, ptr [rcx+0x15] +XDIS 1830c: MISC BASE D5488D446216 lea r16, ptr [rdx+0x16] +XDIS 18312: MISC BASE D5488D446317 lea r16, ptr [rbx+0x17] +XDIS 18318: MISC BASE D5488D446418 lea r16, ptr [rsp+0x18] +XDIS 1831e: MISC BASE D5488D446519 lea r16, ptr [rbp+0x19] +XDIS 18324: MISC BASE D5488D44661A lea r16, ptr [rsi+0x1a] +XDIS 1832a: MISC BASE D5488D44671B lea r16, ptr [rdi+0x1b] +XDIS 18330: MISC BASE D5498D44601C lea r16, ptr [r8+0x1c] +XDIS 18336: MISC BASE D5498D44611D lea r16, ptr [r9+0x1d] +XDIS 1833c: MISC BASE D5498D44621E lea r16, ptr [r10+0x1e] +XDIS 18342: MISC BASE D5498D44631F lea r16, ptr [r11+0x1f] +XDIS 18348: MISC BASE D5498D446420 lea r16, ptr [r12+0x20] +XDIS 1834e: MISC BASE D5498D446521 lea r16, ptr [r13+0x21] +XDIS 18354: MISC BASE D5498D446622 lea r16, ptr [r14+0x22] +XDIS 1835a: MISC BASE D5498D446723 lea r16, ptr [r15+0x23] +XDIS 18360: MISC BASE D5588D446024 lea r16, ptr [r16+0x24] +XDIS 18366: MISC BASE D5588D446125 lea r16, ptr [r17+0x25] +XDIS 1836c: MISC BASE D5588D446226 lea r16, ptr [r18+0x26] +XDIS 18372: MISC BASE D5588D446327 lea r16, ptr [r19+0x27] +XDIS 18378: MISC BASE D5588D446428 lea r16, ptr [r20+0x28] +XDIS 1837e: MISC BASE D5588D446529 lea r16, ptr [r21+0x29] +XDIS 18384: MISC BASE D5588D44662A lea r16, ptr [r22+0x2a] +XDIS 1838a: MISC BASE D5588D44672B lea r16, ptr [r23+0x2b] +XDIS 18390: MISC BASE D5598D44602C lea r16, ptr [r24+0x2c] +XDIS 18396: MISC BASE D5598D44612D lea r16, ptr [r25+0x2d] +XDIS 1839c: MISC BASE D5598D44622E lea r16, ptr [r26+0x2e] +XDIS 183a2: MISC BASE D5598D44632F lea r16, ptr [r27+0x2f] +XDIS 183a8: MISC BASE D5598D446430 lea r16, ptr [r28+0x30] +XDIS 183ae: MISC BASE D5598D446531 lea r16, ptr [r29+0x31] +XDIS 183b4: MISC BASE D5598D446632 lea r16, ptr [r30+0x32] +XDIS 183ba: MISC BASE D5598D446733 lea r16, ptr [r31+0x33] +XDIS 183c0: MISC BASE D5488D446815 lea r16, ptr [rax+rbp*2+0x15] +XDIS 183c6: MISC BASE D5488D446916 lea r16, ptr [rcx+rbp*2+0x16] +XDIS 183cc: MISC BASE D5488D446A17 lea r16, ptr [rdx+rbp*2+0x17] +XDIS 183d2: MISC BASE D5488D446B18 lea r16, ptr [rbx+rbp*2+0x18] +XDIS 183d8: MISC BASE D5488D446C19 lea r16, ptr [rsp+rbp*2+0x19] +XDIS 183de: MISC BASE D5488D446D1A lea r16, ptr [rbp+rbp*2+0x1a] +XDIS 183e4: MISC BASE D5488D446E1B lea r16, ptr [rsi+rbp*2+0x1b] +XDIS 183ea: MISC BASE D5488D446F1C lea r16, ptr [rdi+rbp*2+0x1c] +XDIS 183f0: MISC BASE D5498D44681D lea r16, ptr [r8+rbp*2+0x1d] +XDIS 183f6: MISC BASE D5498D44691E lea r16, ptr [r9+rbp*2+0x1e] +XDIS 183fc: MISC BASE D5498D446A1F lea r16, ptr [r10+rbp*2+0x1f] +XDIS 18402: MISC BASE D5498D446B20 lea r16, ptr [r11+rbp*2+0x20] +XDIS 18408: MISC BASE D5498D446C21 lea r16, ptr [r12+rbp*2+0x21] +XDIS 1840e: MISC BASE D5498D446D22 lea r16, ptr [r13+rbp*2+0x22] +XDIS 18414: MISC BASE D5498D446E23 lea r16, ptr [r14+rbp*2+0x23] +XDIS 1841a: MISC BASE D5498D446F24 lea r16, ptr [r15+rbp*2+0x24] +XDIS 18420: MISC BASE D5588D446825 lea r16, ptr [r16+rbp*2+0x25] +XDIS 18426: MISC BASE D5588D446926 lea r16, ptr [r17+rbp*2+0x26] +XDIS 1842c: MISC BASE D5588D446A27 lea r16, ptr [r18+rbp*2+0x27] +XDIS 18432: MISC BASE D5588D446B28 lea r16, ptr [r19+rbp*2+0x28] +XDIS 18438: MISC BASE D5588D446C29 lea r16, ptr [r20+rbp*2+0x29] +XDIS 1843e: MISC BASE D5588D446D2A lea r16, ptr [r21+rbp*2+0x2a] +XDIS 18444: MISC BASE D5588D446E2B lea r16, ptr [r22+rbp*2+0x2b] +XDIS 1844a: MISC BASE D5588D446F2C lea r16, ptr [r23+rbp*2+0x2c] +XDIS 18450: MISC BASE D5598D44682D lea r16, ptr [r24+rbp*2+0x2d] +XDIS 18456: MISC BASE D5598D44692E lea r16, ptr [r25+rbp*2+0x2e] +XDIS 1845c: MISC BASE D5598D446A2F lea r16, ptr [r26+rbp*2+0x2f] +XDIS 18462: MISC BASE D5598D446B30 lea r16, ptr [r27+rbp*2+0x30] +XDIS 18468: MISC BASE D5598D446C31 lea r16, ptr [r28+rbp*2+0x31] +XDIS 1846e: MISC BASE D5598D446D32 lea r16, ptr [r29+rbp*2+0x32] +XDIS 18474: MISC BASE D5598D446E33 lea r16, ptr [r30+rbp*2+0x33] +XDIS 1847a: MISC BASE D5598D446F34 lea r16, ptr [r31+rbp*2+0x34] +XDIS 18480: MISC BASE D5488D447016 lea r16, ptr [rax+rsi*2+0x16] +XDIS 18486: MISC BASE D5488D447117 lea r16, ptr [rcx+rsi*2+0x17] +XDIS 1848c: MISC BASE D5488D447218 lea r16, ptr [rdx+rsi*2+0x18] +XDIS 18492: MISC BASE D5488D447319 lea r16, ptr [rbx+rsi*2+0x19] +XDIS 18498: MISC BASE D5488D44741A lea r16, ptr [rsp+rsi*2+0x1a] +XDIS 1849e: MISC BASE D5488D44751B lea r16, ptr [rbp+rsi*2+0x1b] +XDIS 184a4: MISC BASE D5488D44761C lea r16, ptr [rsi+rsi*2+0x1c] +XDIS 184aa: MISC BASE D5488D44771D lea r16, ptr [rdi+rsi*2+0x1d] +XDIS 184b0: MISC BASE D5498D44701E lea r16, ptr [r8+rsi*2+0x1e] +XDIS 184b6: MISC BASE D5498D44711F lea r16, ptr [r9+rsi*2+0x1f] +XDIS 184bc: MISC BASE D5498D447220 lea r16, ptr [r10+rsi*2+0x20] +XDIS 184c2: MISC BASE D5498D447321 lea r16, ptr [r11+rsi*2+0x21] +XDIS 184c8: MISC BASE D5498D447422 lea r16, ptr [r12+rsi*2+0x22] +XDIS 184ce: MISC BASE D5498D447523 lea r16, ptr [r13+rsi*2+0x23] +XDIS 184d4: MISC BASE D5498D447624 lea r16, ptr [r14+rsi*2+0x24] +XDIS 184da: MISC BASE D5498D447725 lea r16, ptr [r15+rsi*2+0x25] +XDIS 184e0: MISC BASE D5588D447026 lea r16, ptr [r16+rsi*2+0x26] +XDIS 184e6: MISC BASE D5588D447127 lea r16, ptr [r17+rsi*2+0x27] +XDIS 184ec: MISC BASE D5588D447228 lea r16, ptr [r18+rsi*2+0x28] +XDIS 184f2: MISC BASE D5588D447329 lea r16, ptr [r19+rsi*2+0x29] +XDIS 184f8: MISC BASE D5588D44742A lea r16, ptr [r20+rsi*2+0x2a] +XDIS 184fe: MISC BASE D5588D44752B lea r16, ptr [r21+rsi*2+0x2b] +XDIS 18504: MISC BASE D5588D44762C lea r16, ptr [r22+rsi*2+0x2c] +XDIS 1850a: MISC BASE D5588D44772D lea r16, ptr [r23+rsi*2+0x2d] +XDIS 18510: MISC BASE D5598D44702E lea r16, ptr [r24+rsi*2+0x2e] +XDIS 18516: MISC BASE D5598D44712F lea r16, ptr [r25+rsi*2+0x2f] +XDIS 1851c: MISC BASE D5598D447230 lea r16, ptr [r26+rsi*2+0x30] +XDIS 18522: MISC BASE D5598D447331 lea r16, ptr [r27+rsi*2+0x31] +XDIS 18528: MISC BASE D5598D447432 lea r16, ptr [r28+rsi*2+0x32] +XDIS 1852e: MISC BASE D5598D447533 lea r16, ptr [r29+rsi*2+0x33] +XDIS 18534: MISC BASE D5598D447634 lea r16, ptr [r30+rsi*2+0x34] +XDIS 1853a: MISC BASE D5598D447735 lea r16, ptr [r31+rsi*2+0x35] +XDIS 18540: MISC BASE D5488D447817 lea r16, ptr [rax+rdi*2+0x17] +XDIS 18546: MISC BASE D5488D447918 lea r16, ptr [rcx+rdi*2+0x18] +XDIS 1854c: MISC BASE D5488D447A19 lea r16, ptr [rdx+rdi*2+0x19] +XDIS 18552: MISC BASE D5488D447B1A lea r16, ptr [rbx+rdi*2+0x1a] +XDIS 18558: MISC BASE D5488D447C1B lea r16, ptr [rsp+rdi*2+0x1b] +XDIS 1855e: MISC BASE D5488D447D1C lea r16, ptr [rbp+rdi*2+0x1c] +XDIS 18564: MISC BASE D5488D447E1D lea r16, ptr [rsi+rdi*2+0x1d] +XDIS 1856a: MISC BASE D5488D447F1E lea r16, ptr [rdi+rdi*2+0x1e] +XDIS 18570: MISC BASE D5498D44781F lea r16, ptr [r8+rdi*2+0x1f] +XDIS 18576: MISC BASE D5498D447920 lea r16, ptr [r9+rdi*2+0x20] +XDIS 1857c: MISC BASE D5498D447A21 lea r16, ptr [r10+rdi*2+0x21] +XDIS 18582: MISC BASE D5498D447B22 lea r16, ptr [r11+rdi*2+0x22] +XDIS 18588: MISC BASE D5498D447C23 lea r16, ptr [r12+rdi*2+0x23] +XDIS 1858e: MISC BASE D5498D447D24 lea r16, ptr [r13+rdi*2+0x24] +XDIS 18594: MISC BASE D5498D447E25 lea r16, ptr [r14+rdi*2+0x25] +XDIS 1859a: MISC BASE D5498D447F26 lea r16, ptr [r15+rdi*2+0x26] +XDIS 185a0: MISC BASE D5588D447827 lea r16, ptr [r16+rdi*2+0x27] +XDIS 185a6: MISC BASE D5588D447928 lea r16, ptr [r17+rdi*2+0x28] +XDIS 185ac: MISC BASE D5588D447A29 lea r16, ptr [r18+rdi*2+0x29] +XDIS 185b2: MISC BASE D5588D447B2A lea r16, ptr [r19+rdi*2+0x2a] +XDIS 185b8: MISC BASE D5588D447C2B lea r16, ptr [r20+rdi*2+0x2b] +XDIS 185be: MISC BASE D5588D447D2C lea r16, ptr [r21+rdi*2+0x2c] +XDIS 185c4: MISC BASE D5588D447E2D lea r16, ptr [r22+rdi*2+0x2d] +XDIS 185ca: MISC BASE D5588D447F2E lea r16, ptr [r23+rdi*2+0x2e] +XDIS 185d0: MISC BASE D5598D44782F lea r16, ptr [r24+rdi*2+0x2f] +XDIS 185d6: MISC BASE D5598D447930 lea r16, ptr [r25+rdi*2+0x30] +XDIS 185dc: MISC BASE D5598D447A31 lea r16, ptr [r26+rdi*2+0x31] +XDIS 185e2: MISC BASE D5598D447B32 lea r16, ptr [r27+rdi*2+0x32] +XDIS 185e8: MISC BASE D5598D447C33 lea r16, ptr [r28+rdi*2+0x33] +XDIS 185ee: MISC BASE D5598D447D34 lea r16, ptr [r29+rdi*2+0x34] +XDIS 185f4: MISC BASE D5598D447E35 lea r16, ptr [r30+rdi*2+0x35] +XDIS 185fa: MISC BASE D5598D447F36 lea r16, ptr [r31+rdi*2+0x36] +XDIS 18600: MISC BASE D54A8D444018 lea r16, ptr [rax+r8*2+0x18] +XDIS 18606: MISC BASE D54A8D444119 lea r16, ptr [rcx+r8*2+0x19] +XDIS 1860c: MISC BASE D54A8D44421A lea r16, ptr [rdx+r8*2+0x1a] +XDIS 18612: MISC BASE D54A8D44431B lea r16, ptr [rbx+r8*2+0x1b] +XDIS 18618: MISC BASE D54A8D44441C lea r16, ptr [rsp+r8*2+0x1c] +XDIS 1861e: MISC BASE D54A8D44451D lea r16, ptr [rbp+r8*2+0x1d] +XDIS 18624: MISC BASE D54A8D44461E lea r16, ptr [rsi+r8*2+0x1e] +XDIS 1862a: MISC BASE D54A8D44471F lea r16, ptr [rdi+r8*2+0x1f] +XDIS 18630: MISC BASE D54B8D444020 lea r16, ptr [r8+r8*2+0x20] +XDIS 18636: MISC BASE D54B8D444121 lea r16, ptr [r9+r8*2+0x21] +XDIS 1863c: MISC BASE D54B8D444222 lea r16, ptr [r10+r8*2+0x22] +XDIS 18642: MISC BASE D54B8D444323 lea r16, ptr [r11+r8*2+0x23] +XDIS 18648: MISC BASE D54B8D444424 lea r16, ptr [r12+r8*2+0x24] +XDIS 1864e: MISC BASE D54B8D444525 lea r16, ptr [r13+r8*2+0x25] +XDIS 18654: MISC BASE D54B8D444626 lea r16, ptr [r14+r8*2+0x26] +XDIS 1865a: MISC BASE D54B8D444727 lea r16, ptr [r15+r8*2+0x27] +XDIS 18660: MISC BASE D55A8D444028 lea r16, ptr [r16+r8*2+0x28] +XDIS 18666: MISC BASE D55A8D444129 lea r16, ptr [r17+r8*2+0x29] +XDIS 1866c: MISC BASE D55A8D44422A lea r16, ptr [r18+r8*2+0x2a] +XDIS 18672: MISC BASE D55A8D44432B lea r16, ptr [r19+r8*2+0x2b] +XDIS 18678: MISC BASE D55A8D44442C lea r16, ptr [r20+r8*2+0x2c] +XDIS 1867e: MISC BASE D55A8D44452D lea r16, ptr [r21+r8*2+0x2d] +XDIS 18684: MISC BASE D55A8D44462E lea r16, ptr [r22+r8*2+0x2e] +XDIS 1868a: MISC BASE D55A8D44472F lea r16, ptr [r23+r8*2+0x2f] +XDIS 18690: MISC BASE D55B8D444030 lea r16, ptr [r24+r8*2+0x30] +XDIS 18696: MISC BASE D55B8D444131 lea r16, ptr [r25+r8*2+0x31] +XDIS 1869c: MISC BASE D55B8D444232 lea r16, ptr [r26+r8*2+0x32] +XDIS 186a2: MISC BASE D55B8D444333 lea r16, ptr [r27+r8*2+0x33] +XDIS 186a8: MISC BASE D55B8D444434 lea r16, ptr [r28+r8*2+0x34] +XDIS 186ae: MISC BASE D55B8D444535 lea r16, ptr [r29+r8*2+0x35] +XDIS 186b4: MISC BASE D55B8D444636 lea r16, ptr [r30+r8*2+0x36] +XDIS 186ba: MISC BASE D55B8D444737 lea r16, ptr [r31+r8*2+0x37] +XDIS 186c0: MISC BASE D54A8D444819 lea r16, ptr [rax+r9*2+0x19] +XDIS 186c6: MISC BASE D54A8D44491A lea r16, ptr [rcx+r9*2+0x1a] +XDIS 186cc: MISC BASE D54A8D444A1B lea r16, ptr [rdx+r9*2+0x1b] +XDIS 186d2: MISC BASE D54A8D444B1C lea r16, ptr [rbx+r9*2+0x1c] +XDIS 186d8: MISC BASE D54A8D444C1D lea r16, ptr [rsp+r9*2+0x1d] +XDIS 186de: MISC BASE D54A8D444D1E lea r16, ptr [rbp+r9*2+0x1e] +XDIS 186e4: MISC BASE D54A8D444E1F lea r16, ptr [rsi+r9*2+0x1f] +XDIS 186ea: MISC BASE D54A8D444F20 lea r16, ptr [rdi+r9*2+0x20] +XDIS 186f0: MISC BASE D54B8D444821 lea r16, ptr [r8+r9*2+0x21] +XDIS 186f6: MISC BASE D54B8D444922 lea r16, ptr [r9+r9*2+0x22] +XDIS 186fc: MISC BASE D54B8D444A23 lea r16, ptr [r10+r9*2+0x23] +XDIS 18702: MISC BASE D54B8D444B24 lea r16, ptr [r11+r9*2+0x24] +XDIS 18708: MISC BASE D54B8D444C25 lea r16, ptr [r12+r9*2+0x25] +XDIS 1870e: MISC BASE D54B8D444D26 lea r16, ptr [r13+r9*2+0x26] +XDIS 18714: MISC BASE D54B8D444E27 lea r16, ptr [r14+r9*2+0x27] +XDIS 1871a: MISC BASE D54B8D444F28 lea r16, ptr [r15+r9*2+0x28] +XDIS 18720: MISC BASE D55A8D444829 lea r16, ptr [r16+r9*2+0x29] +XDIS 18726: MISC BASE D55A8D44492A lea r16, ptr [r17+r9*2+0x2a] +XDIS 1872c: MISC BASE D55A8D444A2B lea r16, ptr [r18+r9*2+0x2b] +XDIS 18732: MISC BASE D55A8D444B2C lea r16, ptr [r19+r9*2+0x2c] +XDIS 18738: MISC BASE D55A8D444C2D lea r16, ptr [r20+r9*2+0x2d] +XDIS 1873e: MISC BASE D55A8D444D2E lea r16, ptr [r21+r9*2+0x2e] +XDIS 18744: MISC BASE D55A8D444E2F lea r16, ptr [r22+r9*2+0x2f] +XDIS 1874a: MISC BASE D55A8D444F30 lea r16, ptr [r23+r9*2+0x30] +XDIS 18750: MISC BASE D55B8D444831 lea r16, ptr [r24+r9*2+0x31] +XDIS 18756: MISC BASE D55B8D444932 lea r16, ptr [r25+r9*2+0x32] +XDIS 1875c: MISC BASE D55B8D444A33 lea r16, ptr [r26+r9*2+0x33] +XDIS 18762: MISC BASE D55B8D444B34 lea r16, ptr [r27+r9*2+0x34] +XDIS 18768: MISC BASE D55B8D444C35 lea r16, ptr [r28+r9*2+0x35] +XDIS 1876e: MISC BASE D55B8D444D36 lea r16, ptr [r29+r9*2+0x36] +XDIS 18774: MISC BASE D55B8D444E37 lea r16, ptr [r30+r9*2+0x37] +XDIS 1877a: MISC BASE D55B8D444F38 lea r16, ptr [r31+r9*2+0x38] +XDIS 18780: MISC BASE D54A8D44501A lea r16, ptr [rax+r10*2+0x1a] +XDIS 18786: MISC BASE D54A8D44511B lea r16, ptr [rcx+r10*2+0x1b] +XDIS 1878c: MISC BASE D54A8D44521C lea r16, ptr [rdx+r10*2+0x1c] +XDIS 18792: MISC BASE D54A8D44531D lea r16, ptr [rbx+r10*2+0x1d] +XDIS 18798: MISC BASE D54A8D44541E lea r16, ptr [rsp+r10*2+0x1e] +XDIS 1879e: MISC BASE D54A8D44551F lea r16, ptr [rbp+r10*2+0x1f] +XDIS 187a4: MISC BASE D54A8D445620 lea r16, ptr [rsi+r10*2+0x20] +XDIS 187aa: MISC BASE D54A8D445721 lea r16, ptr [rdi+r10*2+0x21] +XDIS 187b0: MISC BASE D54B8D445022 lea r16, ptr [r8+r10*2+0x22] +XDIS 187b6: MISC BASE D54B8D445123 lea r16, ptr [r9+r10*2+0x23] +XDIS 187bc: MISC BASE D54B8D445224 lea r16, ptr [r10+r10*2+0x24] +XDIS 187c2: MISC BASE D54B8D445325 lea r16, ptr [r11+r10*2+0x25] +XDIS 187c8: MISC BASE D54B8D445426 lea r16, ptr [r12+r10*2+0x26] +XDIS 187ce: MISC BASE D54B8D445527 lea r16, ptr [r13+r10*2+0x27] +XDIS 187d4: MISC BASE D54B8D445628 lea r16, ptr [r14+r10*2+0x28] +XDIS 187da: MISC BASE D54B8D445729 lea r16, ptr [r15+r10*2+0x29] +XDIS 187e0: MISC BASE D55A8D44502A lea r16, ptr [r16+r10*2+0x2a] +XDIS 187e6: MISC BASE D55A8D44512B lea r16, ptr [r17+r10*2+0x2b] +XDIS 187ec: MISC BASE D55A8D44522C lea r16, ptr [r18+r10*2+0x2c] +XDIS 187f2: MISC BASE D55A8D44532D lea r16, ptr [r19+r10*2+0x2d] +XDIS 187f8: MISC BASE D55A8D44542E lea r16, ptr [r20+r10*2+0x2e] +XDIS 187fe: MISC BASE D55A8D44552F lea r16, ptr [r21+r10*2+0x2f] +XDIS 18804: MISC BASE D55A8D445630 lea r16, ptr [r22+r10*2+0x30] +XDIS 1880a: MISC BASE D55A8D445731 lea r16, ptr [r23+r10*2+0x31] +XDIS 18810: MISC BASE D55B8D445032 lea r16, ptr [r24+r10*2+0x32] +XDIS 18816: MISC BASE D55B8D445133 lea r16, ptr [r25+r10*2+0x33] +XDIS 1881c: MISC BASE D55B8D445234 lea r16, ptr [r26+r10*2+0x34] +XDIS 18822: MISC BASE D55B8D445335 lea r16, ptr [r27+r10*2+0x35] +XDIS 18828: MISC BASE D55B8D445436 lea r16, ptr [r28+r10*2+0x36] +XDIS 1882e: MISC BASE D55B8D445537 lea r16, ptr [r29+r10*2+0x37] +XDIS 18834: MISC BASE D55B8D445638 lea r16, ptr [r30+r10*2+0x38] +XDIS 1883a: MISC BASE D55B8D445739 lea r16, ptr [r31+r10*2+0x39] +XDIS 18840: MISC BASE D54A8D44581B lea r16, ptr [rax+r11*2+0x1b] +XDIS 18846: MISC BASE D54A8D44591C lea r16, ptr [rcx+r11*2+0x1c] +XDIS 1884c: MISC BASE D54A8D445A1D lea r16, ptr [rdx+r11*2+0x1d] +XDIS 18852: MISC BASE D54A8D445B1E lea r16, ptr [rbx+r11*2+0x1e] +XDIS 18858: MISC BASE D54A8D445C1F lea r16, ptr [rsp+r11*2+0x1f] +XDIS 1885e: MISC BASE D54A8D445D20 lea r16, ptr [rbp+r11*2+0x20] +XDIS 18864: MISC BASE D54A8D445E21 lea r16, ptr [rsi+r11*2+0x21] +XDIS 1886a: MISC BASE D54A8D445F22 lea r16, ptr [rdi+r11*2+0x22] +XDIS 18870: MISC BASE D54B8D445823 lea r16, ptr [r8+r11*2+0x23] +XDIS 18876: MISC BASE D54B8D445924 lea r16, ptr [r9+r11*2+0x24] +XDIS 1887c: MISC BASE D54B8D445A25 lea r16, ptr [r10+r11*2+0x25] +XDIS 18882: MISC BASE D54B8D445B26 lea r16, ptr [r11+r11*2+0x26] +XDIS 18888: MISC BASE D54B8D445C27 lea r16, ptr [r12+r11*2+0x27] +XDIS 1888e: MISC BASE D54B8D445D28 lea r16, ptr [r13+r11*2+0x28] +XDIS 18894: MISC BASE D54B8D445E29 lea r16, ptr [r14+r11*2+0x29] +XDIS 1889a: MISC BASE D54B8D445F2A lea r16, ptr [r15+r11*2+0x2a] +XDIS 188a0: MISC BASE D55A8D44582B lea r16, ptr [r16+r11*2+0x2b] +XDIS 188a6: MISC BASE D55A8D44592C lea r16, ptr [r17+r11*2+0x2c] +XDIS 188ac: MISC BASE D55A8D445A2D lea r16, ptr [r18+r11*2+0x2d] +XDIS 188b2: MISC BASE D55A8D445B2E lea r16, ptr [r19+r11*2+0x2e] +XDIS 188b8: MISC BASE D55A8D445C2F lea r16, ptr [r20+r11*2+0x2f] +XDIS 188be: MISC BASE D55A8D445D30 lea r16, ptr [r21+r11*2+0x30] +XDIS 188c4: MISC BASE D55A8D445E31 lea r16, ptr [r22+r11*2+0x31] +XDIS 188ca: MISC BASE D55A8D445F32 lea r16, ptr [r23+r11*2+0x32] +XDIS 188d0: MISC BASE D55B8D445833 lea r16, ptr [r24+r11*2+0x33] +XDIS 188d6: MISC BASE D55B8D445934 lea r16, ptr [r25+r11*2+0x34] +XDIS 188dc: MISC BASE D55B8D445A35 lea r16, ptr [r26+r11*2+0x35] +XDIS 188e2: MISC BASE D55B8D445B36 lea r16, ptr [r27+r11*2+0x36] +XDIS 188e8: MISC BASE D55B8D445C37 lea r16, ptr [r28+r11*2+0x37] +XDIS 188ee: MISC BASE D55B8D445D38 lea r16, ptr [r29+r11*2+0x38] +XDIS 188f4: MISC BASE D55B8D445E39 lea r16, ptr [r30+r11*2+0x39] +XDIS 188fa: MISC BASE D55B8D445F3A lea r16, ptr [r31+r11*2+0x3a] +XDIS 18900: MISC BASE D54A8D44601C lea r16, ptr [rax+r12*2+0x1c] +XDIS 18906: MISC BASE D54A8D44611D lea r16, ptr [rcx+r12*2+0x1d] +XDIS 1890c: MISC BASE D54A8D44621E lea r16, ptr [rdx+r12*2+0x1e] +XDIS 18912: MISC BASE D54A8D44631F lea r16, ptr [rbx+r12*2+0x1f] +XDIS 18918: MISC BASE D54A8D446420 lea r16, ptr [rsp+r12*2+0x20] +XDIS 1891e: MISC BASE D54A8D446521 lea r16, ptr [rbp+r12*2+0x21] +XDIS 18924: MISC BASE D54A8D446622 lea r16, ptr [rsi+r12*2+0x22] +XDIS 1892a: MISC BASE D54A8D446723 lea r16, ptr [rdi+r12*2+0x23] +XDIS 18930: MISC BASE D54B8D446024 lea r16, ptr [r8+r12*2+0x24] +XDIS 18936: MISC BASE D54B8D446125 lea r16, ptr [r9+r12*2+0x25] +XDIS 1893c: MISC BASE D54B8D446226 lea r16, ptr [r10+r12*2+0x26] +XDIS 18942: MISC BASE D54B8D446327 lea r16, ptr [r11+r12*2+0x27] +XDIS 18948: MISC BASE D54B8D446428 lea r16, ptr [r12+r12*2+0x28] +XDIS 1894e: MISC BASE D54B8D446529 lea r16, ptr [r13+r12*2+0x29] +XDIS 18954: MISC BASE D54B8D44662A lea r16, ptr [r14+r12*2+0x2a] +XDIS 1895a: MISC BASE D54B8D44672B lea r16, ptr [r15+r12*2+0x2b] +XDIS 18960: MISC BASE D55A8D44602C lea r16, ptr [r16+r12*2+0x2c] +XDIS 18966: MISC BASE D55A8D44612D lea r16, ptr [r17+r12*2+0x2d] +XDIS 1896c: MISC BASE D55A8D44622E lea r16, ptr [r18+r12*2+0x2e] +XDIS 18972: MISC BASE D55A8D44632F lea r16, ptr [r19+r12*2+0x2f] +XDIS 18978: MISC BASE D55A8D446430 lea r16, ptr [r20+r12*2+0x30] +XDIS 1897e: MISC BASE D55A8D446531 lea r16, ptr [r21+r12*2+0x31] +XDIS 18984: MISC BASE D55A8D446632 lea r16, ptr [r22+r12*2+0x32] +XDIS 1898a: MISC BASE D55A8D446733 lea r16, ptr [r23+r12*2+0x33] +XDIS 18990: MISC BASE D55B8D446034 lea r16, ptr [r24+r12*2+0x34] +XDIS 18996: MISC BASE D55B8D446135 lea r16, ptr [r25+r12*2+0x35] +XDIS 1899c: MISC BASE D55B8D446236 lea r16, ptr [r26+r12*2+0x36] +XDIS 189a2: MISC BASE D55B8D446337 lea r16, ptr [r27+r12*2+0x37] +XDIS 189a8: MISC BASE D55B8D446438 lea r16, ptr [r28+r12*2+0x38] +XDIS 189ae: MISC BASE D55B8D446539 lea r16, ptr [r29+r12*2+0x39] +XDIS 189b4: MISC BASE D55B8D44663A lea r16, ptr [r30+r12*2+0x3a] +XDIS 189ba: MISC BASE D55B8D44673B lea r16, ptr [r31+r12*2+0x3b] +XDIS 189c0: MISC BASE D54A8D44681D lea r16, ptr [rax+r13*2+0x1d] +XDIS 189c6: MISC BASE D54A8D44691E lea r16, ptr [rcx+r13*2+0x1e] +XDIS 189cc: MISC BASE D54A8D446A1F lea r16, ptr [rdx+r13*2+0x1f] +XDIS 189d2: MISC BASE D54A8D446B20 lea r16, ptr [rbx+r13*2+0x20] +XDIS 189d8: MISC BASE D54A8D446C21 lea r16, ptr [rsp+r13*2+0x21] +XDIS 189de: MISC BASE D54A8D446D22 lea r16, ptr [rbp+r13*2+0x22] +XDIS 189e4: MISC BASE D54A8D446E23 lea r16, ptr [rsi+r13*2+0x23] +XDIS 189ea: MISC BASE D54A8D446F24 lea r16, ptr [rdi+r13*2+0x24] +XDIS 189f0: MISC BASE D54B8D446825 lea r16, ptr [r8+r13*2+0x25] +XDIS 189f6: MISC BASE D54B8D446926 lea r16, ptr [r9+r13*2+0x26] +XDIS 189fc: MISC BASE D54B8D446A27 lea r16, ptr [r10+r13*2+0x27] +XDIS 18a02: MISC BASE D54B8D446B28 lea r16, ptr [r11+r13*2+0x28] +XDIS 18a08: MISC BASE D54B8D446C29 lea r16, ptr [r12+r13*2+0x29] +XDIS 18a0e: MISC BASE D54B8D446D2A lea r16, ptr [r13+r13*2+0x2a] +XDIS 18a14: MISC BASE D54B8D446E2B lea r16, ptr [r14+r13*2+0x2b] +XDIS 18a1a: MISC BASE D54B8D446F2C lea r16, ptr [r15+r13*2+0x2c] +XDIS 18a20: MISC BASE D55A8D44682D lea r16, ptr [r16+r13*2+0x2d] +XDIS 18a26: MISC BASE D55A8D44692E lea r16, ptr [r17+r13*2+0x2e] +XDIS 18a2c: MISC BASE D55A8D446A2F lea r16, ptr [r18+r13*2+0x2f] +XDIS 18a32: MISC BASE D55A8D446B30 lea r16, ptr [r19+r13*2+0x30] +XDIS 18a38: MISC BASE D55A8D446C31 lea r16, ptr [r20+r13*2+0x31] +XDIS 18a3e: MISC BASE D55A8D446D32 lea r16, ptr [r21+r13*2+0x32] +XDIS 18a44: MISC BASE D55A8D446E33 lea r16, ptr [r22+r13*2+0x33] +XDIS 18a4a: MISC BASE D55A8D446F34 lea r16, ptr [r23+r13*2+0x34] +XDIS 18a50: MISC BASE D55B8D446835 lea r16, ptr [r24+r13*2+0x35] +XDIS 18a56: MISC BASE D55B8D446936 lea r16, ptr [r25+r13*2+0x36] +XDIS 18a5c: MISC BASE D55B8D446A37 lea r16, ptr [r26+r13*2+0x37] +XDIS 18a62: MISC BASE D55B8D446B38 lea r16, ptr [r27+r13*2+0x38] +XDIS 18a68: MISC BASE D55B8D446C39 lea r16, ptr [r28+r13*2+0x39] +XDIS 18a6e: MISC BASE D55B8D446D3A lea r16, ptr [r29+r13*2+0x3a] +XDIS 18a74: MISC BASE D55B8D446E3B lea r16, ptr [r30+r13*2+0x3b] +XDIS 18a7a: MISC BASE D55B8D446F3C lea r16, ptr [r31+r13*2+0x3c] +XDIS 18a80: MISC BASE D54A8D44701E lea r16, ptr [rax+r14*2+0x1e] +XDIS 18a86: MISC BASE D54A8D44711F lea r16, ptr [rcx+r14*2+0x1f] +XDIS 18a8c: MISC BASE D54A8D447220 lea r16, ptr [rdx+r14*2+0x20] +XDIS 18a92: MISC BASE D54A8D447321 lea r16, ptr [rbx+r14*2+0x21] +XDIS 18a98: MISC BASE D54A8D447422 lea r16, ptr [rsp+r14*2+0x22] +XDIS 18a9e: MISC BASE D54A8D447523 lea r16, ptr [rbp+r14*2+0x23] +XDIS 18aa4: MISC BASE D54A8D447624 lea r16, ptr [rsi+r14*2+0x24] +XDIS 18aaa: MISC BASE D54A8D447725 lea r16, ptr [rdi+r14*2+0x25] +XDIS 18ab0: MISC BASE D54B8D447026 lea r16, ptr [r8+r14*2+0x26] +XDIS 18ab6: MISC BASE D54B8D447127 lea r16, ptr [r9+r14*2+0x27] +XDIS 18abc: MISC BASE D54B8D447228 lea r16, ptr [r10+r14*2+0x28] +XDIS 18ac2: MISC BASE D54B8D447329 lea r16, ptr [r11+r14*2+0x29] +XDIS 18ac8: MISC BASE D54B8D44742A lea r16, ptr [r12+r14*2+0x2a] +XDIS 18ace: MISC BASE D54B8D44752B lea r16, ptr [r13+r14*2+0x2b] +XDIS 18ad4: MISC BASE D54B8D44762C lea r16, ptr [r14+r14*2+0x2c] +XDIS 18ada: MISC BASE D54B8D44772D lea r16, ptr [r15+r14*2+0x2d] +XDIS 18ae0: MISC BASE D55A8D44702E lea r16, ptr [r16+r14*2+0x2e] +XDIS 18ae6: MISC BASE D55A8D44712F lea r16, ptr [r17+r14*2+0x2f] +XDIS 18aec: MISC BASE D55A8D447230 lea r16, ptr [r18+r14*2+0x30] +XDIS 18af2: MISC BASE D55A8D447331 lea r16, ptr [r19+r14*2+0x31] +XDIS 18af8: MISC BASE D55A8D447432 lea r16, ptr [r20+r14*2+0x32] +XDIS 18afe: MISC BASE D55A8D447533 lea r16, ptr [r21+r14*2+0x33] +XDIS 18b04: MISC BASE D55A8D447634 lea r16, ptr [r22+r14*2+0x34] +XDIS 18b0a: MISC BASE D55A8D447735 lea r16, ptr [r23+r14*2+0x35] +XDIS 18b10: MISC BASE D55B8D447036 lea r16, ptr [r24+r14*2+0x36] +XDIS 18b16: MISC BASE D55B8D447137 lea r16, ptr [r25+r14*2+0x37] +XDIS 18b1c: MISC BASE D55B8D447238 lea r16, ptr [r26+r14*2+0x38] +XDIS 18b22: MISC BASE D55B8D447339 lea r16, ptr [r27+r14*2+0x39] +XDIS 18b28: MISC BASE D55B8D44743A lea r16, ptr [r28+r14*2+0x3a] +XDIS 18b2e: MISC BASE D55B8D44753B lea r16, ptr [r29+r14*2+0x3b] +XDIS 18b34: MISC BASE D55B8D44763C lea r16, ptr [r30+r14*2+0x3c] +XDIS 18b3a: MISC BASE D55B8D44773D lea r16, ptr [r31+r14*2+0x3d] +XDIS 18b40: MISC BASE D54A8D44781F lea r16, ptr [rax+r15*2+0x1f] +XDIS 18b46: MISC BASE D54A8D447920 lea r16, ptr [rcx+r15*2+0x20] +XDIS 18b4c: MISC BASE D54A8D447A21 lea r16, ptr [rdx+r15*2+0x21] +XDIS 18b52: MISC BASE D54A8D447B22 lea r16, ptr [rbx+r15*2+0x22] +XDIS 18b58: MISC BASE D54A8D447C23 lea r16, ptr [rsp+r15*2+0x23] +XDIS 18b5e: MISC BASE D54A8D447D24 lea r16, ptr [rbp+r15*2+0x24] +XDIS 18b64: MISC BASE D54A8D447E25 lea r16, ptr [rsi+r15*2+0x25] +XDIS 18b6a: MISC BASE D54A8D447F26 lea r16, ptr [rdi+r15*2+0x26] +XDIS 18b70: MISC BASE D54B8D447827 lea r16, ptr [r8+r15*2+0x27] +XDIS 18b76: MISC BASE D54B8D447928 lea r16, ptr [r9+r15*2+0x28] +XDIS 18b7c: MISC BASE D54B8D447A29 lea r16, ptr [r10+r15*2+0x29] +XDIS 18b82: MISC BASE D54B8D447B2A lea r16, ptr [r11+r15*2+0x2a] +XDIS 18b88: MISC BASE D54B8D447C2B lea r16, ptr [r12+r15*2+0x2b] +XDIS 18b8e: MISC BASE D54B8D447D2C lea r16, ptr [r13+r15*2+0x2c] +XDIS 18b94: MISC BASE D54B8D447E2D lea r16, ptr [r14+r15*2+0x2d] +XDIS 18b9a: MISC BASE D54B8D447F2E lea r16, ptr [r15+r15*2+0x2e] +XDIS 18ba0: MISC BASE D55A8D44782F lea r16, ptr [r16+r15*2+0x2f] +XDIS 18ba6: MISC BASE D55A8D447930 lea r16, ptr [r17+r15*2+0x30] +XDIS 18bac: MISC BASE D55A8D447A31 lea r16, ptr [r18+r15*2+0x31] +XDIS 18bb2: MISC BASE D55A8D447B32 lea r16, ptr [r19+r15*2+0x32] +XDIS 18bb8: MISC BASE D55A8D447C33 lea r16, ptr [r20+r15*2+0x33] +XDIS 18bbe: MISC BASE D55A8D447D34 lea r16, ptr [r21+r15*2+0x34] +XDIS 18bc4: MISC BASE D55A8D447E35 lea r16, ptr [r22+r15*2+0x35] +XDIS 18bca: MISC BASE D55A8D447F36 lea r16, ptr [r23+r15*2+0x36] +XDIS 18bd0: MISC BASE D55B8D447837 lea r16, ptr [r24+r15*2+0x37] +XDIS 18bd6: MISC BASE D55B8D447938 lea r16, ptr [r25+r15*2+0x38] +XDIS 18bdc: MISC BASE D55B8D447A39 lea r16, ptr [r26+r15*2+0x39] +XDIS 18be2: MISC BASE D55B8D447B3A lea r16, ptr [r27+r15*2+0x3a] +XDIS 18be8: MISC BASE D55B8D447C3B lea r16, ptr [r28+r15*2+0x3b] +XDIS 18bee: MISC BASE D55B8D447D3C lea r16, ptr [r29+r15*2+0x3c] +XDIS 18bf4: MISC BASE D55B8D447E3D lea r16, ptr [r30+r15*2+0x3d] +XDIS 18bfa: MISC BASE D55B8D447F3E lea r16, ptr [r31+r15*2+0x3e] +XDIS 18c00: MISC BASE D5688D444020 lea r16, ptr [rax+r16*2+0x20] +XDIS 18c06: MISC BASE D5688D444121 lea r16, ptr [rcx+r16*2+0x21] +XDIS 18c0c: MISC BASE D5688D444222 lea r16, ptr [rdx+r16*2+0x22] +XDIS 18c12: MISC BASE D5688D444323 lea r16, ptr [rbx+r16*2+0x23] +XDIS 18c18: MISC BASE D5688D444424 lea r16, ptr [rsp+r16*2+0x24] +XDIS 18c1e: MISC BASE D5688D444525 lea r16, ptr [rbp+r16*2+0x25] +XDIS 18c24: MISC BASE D5688D444626 lea r16, ptr [rsi+r16*2+0x26] +XDIS 18c2a: MISC BASE D5688D444727 lea r16, ptr [rdi+r16*2+0x27] +XDIS 18c30: MISC BASE D5698D444028 lea r16, ptr [r8+r16*2+0x28] +XDIS 18c36: MISC BASE D5698D444129 lea r16, ptr [r9+r16*2+0x29] +XDIS 18c3c: MISC BASE D5698D44422A lea r16, ptr [r10+r16*2+0x2a] +XDIS 18c42: MISC BASE D5698D44432B lea r16, ptr [r11+r16*2+0x2b] +XDIS 18c48: MISC BASE D5698D44442C lea r16, ptr [r12+r16*2+0x2c] +XDIS 18c4e: MISC BASE D5698D44452D lea r16, ptr [r13+r16*2+0x2d] +XDIS 18c54: MISC BASE D5698D44462E lea r16, ptr [r14+r16*2+0x2e] +XDIS 18c5a: MISC BASE D5698D44472F lea r16, ptr [r15+r16*2+0x2f] +XDIS 18c60: MISC BASE D5788D444030 lea r16, ptr [r16+r16*2+0x30] +XDIS 18c66: MISC BASE D5788D444131 lea r16, ptr [r17+r16*2+0x31] +XDIS 18c6c: MISC BASE D5788D444232 lea r16, ptr [r18+r16*2+0x32] +XDIS 18c72: MISC BASE D5788D444333 lea r16, ptr [r19+r16*2+0x33] +XDIS 18c78: MISC BASE D5788D444434 lea r16, ptr [r20+r16*2+0x34] +XDIS 18c7e: MISC BASE D5788D444535 lea r16, ptr [r21+r16*2+0x35] +XDIS 18c84: MISC BASE D5788D444636 lea r16, ptr [r22+r16*2+0x36] +XDIS 18c8a: MISC BASE D5788D444737 lea r16, ptr [r23+r16*2+0x37] +XDIS 18c90: MISC BASE D5798D444038 lea r16, ptr [r24+r16*2+0x38] +XDIS 18c96: MISC BASE D5798D444139 lea r16, ptr [r25+r16*2+0x39] +XDIS 18c9c: MISC BASE D5798D44423A lea r16, ptr [r26+r16*2+0x3a] +XDIS 18ca2: MISC BASE D5798D44433B lea r16, ptr [r27+r16*2+0x3b] +XDIS 18ca8: MISC BASE D5798D44443C lea r16, ptr [r28+r16*2+0x3c] +XDIS 18cae: MISC BASE D5798D44453D lea r16, ptr [r29+r16*2+0x3d] +XDIS 18cb4: MISC BASE D5798D44463E lea r16, ptr [r30+r16*2+0x3e] +XDIS 18cba: MISC BASE D5798D44473F lea r16, ptr [r31+r16*2+0x3f] +XDIS 18cc0: MISC BASE D5688D444821 lea r16, ptr [rax+r17*2+0x21] +XDIS 18cc6: MISC BASE D5688D444922 lea r16, ptr [rcx+r17*2+0x22] +XDIS 18ccc: MISC BASE D5688D444A23 lea r16, ptr [rdx+r17*2+0x23] +XDIS 18cd2: MISC BASE D5688D444B24 lea r16, ptr [rbx+r17*2+0x24] +XDIS 18cd8: MISC BASE D5688D444C25 lea r16, ptr [rsp+r17*2+0x25] +XDIS 18cde: MISC BASE D5688D444D26 lea r16, ptr [rbp+r17*2+0x26] +XDIS 18ce4: MISC BASE D5688D444E27 lea r16, ptr [rsi+r17*2+0x27] +XDIS 18cea: MISC BASE D5688D444F28 lea r16, ptr [rdi+r17*2+0x28] +XDIS 18cf0: MISC BASE D5698D444829 lea r16, ptr [r8+r17*2+0x29] +XDIS 18cf6: MISC BASE D5698D44492A lea r16, ptr [r9+r17*2+0x2a] +XDIS 18cfc: MISC BASE D5698D444A2B lea r16, ptr [r10+r17*2+0x2b] +XDIS 18d02: MISC BASE D5698D444B2C lea r16, ptr [r11+r17*2+0x2c] +XDIS 18d08: MISC BASE D5698D444C2D lea r16, ptr [r12+r17*2+0x2d] +XDIS 18d0e: MISC BASE D5698D444D2E lea r16, ptr [r13+r17*2+0x2e] +XDIS 18d14: MISC BASE D5698D444E2F lea r16, ptr [r14+r17*2+0x2f] +XDIS 18d1a: MISC BASE D5698D444F30 lea r16, ptr [r15+r17*2+0x30] +XDIS 18d20: MISC BASE D5788D444831 lea r16, ptr [r16+r17*2+0x31] +XDIS 18d26: MISC BASE D5788D444932 lea r16, ptr [r17+r17*2+0x32] +XDIS 18d2c: MISC BASE D5788D444A33 lea r16, ptr [r18+r17*2+0x33] +XDIS 18d32: MISC BASE D5788D444B34 lea r16, ptr [r19+r17*2+0x34] +XDIS 18d38: MISC BASE D5788D444C35 lea r16, ptr [r20+r17*2+0x35] +XDIS 18d3e: MISC BASE D5788D444D36 lea r16, ptr [r21+r17*2+0x36] +XDIS 18d44: MISC BASE D5788D444E37 lea r16, ptr [r22+r17*2+0x37] +XDIS 18d4a: MISC BASE D5788D444F38 lea r16, ptr [r23+r17*2+0x38] +XDIS 18d50: MISC BASE D5798D444839 lea r16, ptr [r24+r17*2+0x39] +XDIS 18d56: MISC BASE D5798D44493A lea r16, ptr [r25+r17*2+0x3a] +XDIS 18d5c: MISC BASE D5798D444A3B lea r16, ptr [r26+r17*2+0x3b] +XDIS 18d62: MISC BASE D5798D444B3C lea r16, ptr [r27+r17*2+0x3c] +XDIS 18d68: MISC BASE D5798D444C3D lea r16, ptr [r28+r17*2+0x3d] +XDIS 18d6e: MISC BASE D5798D444D3E lea r16, ptr [r29+r17*2+0x3e] +XDIS 18d74: MISC BASE D5798D444E3F lea r16, ptr [r30+r17*2+0x3f] +XDIS 18d7a: MISC BASE D5798D444F40 lea r16, ptr [r31+r17*2+0x40] +XDIS 18d80: MISC BASE D5688D445022 lea r16, ptr [rax+r18*2+0x22] +XDIS 18d86: MISC BASE D5688D445123 lea r16, ptr [rcx+r18*2+0x23] +XDIS 18d8c: MISC BASE D5688D445224 lea r16, ptr [rdx+r18*2+0x24] +XDIS 18d92: MISC BASE D5688D445325 lea r16, ptr [rbx+r18*2+0x25] +XDIS 18d98: MISC BASE D5688D445426 lea r16, ptr [rsp+r18*2+0x26] +XDIS 18d9e: MISC BASE D5688D445527 lea r16, ptr [rbp+r18*2+0x27] +XDIS 18da4: MISC BASE D5688D445628 lea r16, ptr [rsi+r18*2+0x28] +XDIS 18daa: MISC BASE D5688D445729 lea r16, ptr [rdi+r18*2+0x29] +XDIS 18db0: MISC BASE D5698D44502A lea r16, ptr [r8+r18*2+0x2a] +XDIS 18db6: MISC BASE D5698D44512B lea r16, ptr [r9+r18*2+0x2b] +XDIS 18dbc: MISC BASE D5698D44522C lea r16, ptr [r10+r18*2+0x2c] +XDIS 18dc2: MISC BASE D5698D44532D lea r16, ptr [r11+r18*2+0x2d] +XDIS 18dc8: MISC BASE D5698D44542E lea r16, ptr [r12+r18*2+0x2e] +XDIS 18dce: MISC BASE D5698D44552F lea r16, ptr [r13+r18*2+0x2f] +XDIS 18dd4: MISC BASE D5698D445630 lea r16, ptr [r14+r18*2+0x30] +XDIS 18dda: MISC BASE D5698D445731 lea r16, ptr [r15+r18*2+0x31] +XDIS 18de0: MISC BASE D5788D445032 lea r16, ptr [r16+r18*2+0x32] +XDIS 18de6: MISC BASE D5788D445133 lea r16, ptr [r17+r18*2+0x33] +XDIS 18dec: MISC BASE D5788D445234 lea r16, ptr [r18+r18*2+0x34] +XDIS 18df2: MISC BASE D5788D445335 lea r16, ptr [r19+r18*2+0x35] +XDIS 18df8: MISC BASE D5788D445436 lea r16, ptr [r20+r18*2+0x36] +XDIS 18dfe: MISC BASE D5788D445537 lea r16, ptr [r21+r18*2+0x37] +XDIS 18e04: MISC BASE D5788D445638 lea r16, ptr [r22+r18*2+0x38] +XDIS 18e0a: MISC BASE D5788D445739 lea r16, ptr [r23+r18*2+0x39] +XDIS 18e10: MISC BASE D5798D44503A lea r16, ptr [r24+r18*2+0x3a] +XDIS 18e16: MISC BASE D5798D44513B lea r16, ptr [r25+r18*2+0x3b] +XDIS 18e1c: MISC BASE D5798D44523C lea r16, ptr [r26+r18*2+0x3c] +XDIS 18e22: MISC BASE D5798D44533D lea r16, ptr [r27+r18*2+0x3d] +XDIS 18e28: MISC BASE D5798D44543E lea r16, ptr [r28+r18*2+0x3e] +XDIS 18e2e: MISC BASE D5798D44553F lea r16, ptr [r29+r18*2+0x3f] +XDIS 18e34: MISC BASE D5798D445640 lea r16, ptr [r30+r18*2+0x40] +XDIS 18e3a: MISC BASE D5798D445741 lea r16, ptr [r31+r18*2+0x41] +XDIS 18e40: MISC BASE D5688D445823 lea r16, ptr [rax+r19*2+0x23] +XDIS 18e46: MISC BASE D5688D445924 lea r16, ptr [rcx+r19*2+0x24] +XDIS 18e4c: MISC BASE D5688D445A25 lea r16, ptr [rdx+r19*2+0x25] +XDIS 18e52: MISC BASE D5688D445B26 lea r16, ptr [rbx+r19*2+0x26] +XDIS 18e58: MISC BASE D5688D445C27 lea r16, ptr [rsp+r19*2+0x27] +XDIS 18e5e: MISC BASE D5688D445D28 lea r16, ptr [rbp+r19*2+0x28] +XDIS 18e64: MISC BASE D5688D445E29 lea r16, ptr [rsi+r19*2+0x29] +XDIS 18e6a: MISC BASE D5688D445F2A lea r16, ptr [rdi+r19*2+0x2a] +XDIS 18e70: MISC BASE D5698D44582B lea r16, ptr [r8+r19*2+0x2b] +XDIS 18e76: MISC BASE D5698D44592C lea r16, ptr [r9+r19*2+0x2c] +XDIS 18e7c: MISC BASE D5698D445A2D lea r16, ptr [r10+r19*2+0x2d] +XDIS 18e82: MISC BASE D5698D445B2E lea r16, ptr [r11+r19*2+0x2e] +XDIS 18e88: MISC BASE D5698D445C2F lea r16, ptr [r12+r19*2+0x2f] +XDIS 18e8e: MISC BASE D5698D445D30 lea r16, ptr [r13+r19*2+0x30] +XDIS 18e94: MISC BASE D5698D445E31 lea r16, ptr [r14+r19*2+0x31] +XDIS 18e9a: MISC BASE D5698D445F32 lea r16, ptr [r15+r19*2+0x32] +XDIS 18ea0: MISC BASE D5788D445833 lea r16, ptr [r16+r19*2+0x33] +XDIS 18ea6: MISC BASE D5788D445934 lea r16, ptr [r17+r19*2+0x34] +XDIS 18eac: MISC BASE D5788D445A35 lea r16, ptr [r18+r19*2+0x35] +XDIS 18eb2: MISC BASE D5788D445B36 lea r16, ptr [r19+r19*2+0x36] +XDIS 18eb8: MISC BASE D5788D445C37 lea r16, ptr [r20+r19*2+0x37] +XDIS 18ebe: MISC BASE D5788D445D38 lea r16, ptr [r21+r19*2+0x38] +XDIS 18ec4: MISC BASE D5788D445E39 lea r16, ptr [r22+r19*2+0x39] +XDIS 18eca: MISC BASE D5788D445F3A lea r16, ptr [r23+r19*2+0x3a] +XDIS 18ed0: MISC BASE D5798D44583B lea r16, ptr [r24+r19*2+0x3b] +XDIS 18ed6: MISC BASE D5798D44593C lea r16, ptr [r25+r19*2+0x3c] +XDIS 18edc: MISC BASE D5798D445A3D lea r16, ptr [r26+r19*2+0x3d] +XDIS 18ee2: MISC BASE D5798D445B3E lea r16, ptr [r27+r19*2+0x3e] +XDIS 18ee8: MISC BASE D5798D445C3F lea r16, ptr [r28+r19*2+0x3f] +XDIS 18eee: MISC BASE D5798D445D40 lea r16, ptr [r29+r19*2+0x40] +XDIS 18ef4: MISC BASE D5798D445E41 lea r16, ptr [r30+r19*2+0x41] +XDIS 18efa: MISC BASE D5798D445F42 lea r16, ptr [r31+r19*2+0x42] +XDIS 18f00: MISC BASE D5688D446024 lea r16, ptr [rax+r20*2+0x24] +XDIS 18f06: MISC BASE D5688D446125 lea r16, ptr [rcx+r20*2+0x25] +XDIS 18f0c: MISC BASE D5688D446226 lea r16, ptr [rdx+r20*2+0x26] +XDIS 18f12: MISC BASE D5688D446327 lea r16, ptr [rbx+r20*2+0x27] +XDIS 18f18: MISC BASE D5688D446428 lea r16, ptr [rsp+r20*2+0x28] +XDIS 18f1e: MISC BASE D5688D446529 lea r16, ptr [rbp+r20*2+0x29] +XDIS 18f24: MISC BASE D5688D44662A lea r16, ptr [rsi+r20*2+0x2a] +XDIS 18f2a: MISC BASE D5688D44672B lea r16, ptr [rdi+r20*2+0x2b] +XDIS 18f30: MISC BASE D5698D44602C lea r16, ptr [r8+r20*2+0x2c] +XDIS 18f36: MISC BASE D5698D44612D lea r16, ptr [r9+r20*2+0x2d] +XDIS 18f3c: MISC BASE D5698D44622E lea r16, ptr [r10+r20*2+0x2e] +XDIS 18f42: MISC BASE D5698D44632F lea r16, ptr [r11+r20*2+0x2f] +XDIS 18f48: MISC BASE D5698D446430 lea r16, ptr [r12+r20*2+0x30] +XDIS 18f4e: MISC BASE D5698D446531 lea r16, ptr [r13+r20*2+0x31] +XDIS 18f54: MISC BASE D5698D446632 lea r16, ptr [r14+r20*2+0x32] +XDIS 18f5a: MISC BASE D5698D446733 lea r16, ptr [r15+r20*2+0x33] +XDIS 18f60: MISC BASE D5788D446034 lea r16, ptr [r16+r20*2+0x34] +XDIS 18f66: MISC BASE D5788D446135 lea r16, ptr [r17+r20*2+0x35] +XDIS 18f6c: MISC BASE D5788D446236 lea r16, ptr [r18+r20*2+0x36] +XDIS 18f72: MISC BASE D5788D446337 lea r16, ptr [r19+r20*2+0x37] +XDIS 18f78: MISC BASE D5788D446438 lea r16, ptr [r20+r20*2+0x38] +XDIS 18f7e: MISC BASE D5788D446539 lea r16, ptr [r21+r20*2+0x39] +XDIS 18f84: MISC BASE D5788D44663A lea r16, ptr [r22+r20*2+0x3a] +XDIS 18f8a: MISC BASE D5788D44673B lea r16, ptr [r23+r20*2+0x3b] +XDIS 18f90: MISC BASE D5798D44603C lea r16, ptr [r24+r20*2+0x3c] +XDIS 18f96: MISC BASE D5798D44613D lea r16, ptr [r25+r20*2+0x3d] +XDIS 18f9c: MISC BASE D5798D44623E lea r16, ptr [r26+r20*2+0x3e] +XDIS 18fa2: MISC BASE D5798D44633F lea r16, ptr [r27+r20*2+0x3f] +XDIS 18fa8: MISC BASE D5798D446440 lea r16, ptr [r28+r20*2+0x40] +XDIS 18fae: MISC BASE D5798D446541 lea r16, ptr [r29+r20*2+0x41] +XDIS 18fb4: MISC BASE D5798D446642 lea r16, ptr [r30+r20*2+0x42] +XDIS 18fba: MISC BASE D5798D446743 lea r16, ptr [r31+r20*2+0x43] +XDIS 18fc0: MISC BASE D5688D446825 lea r16, ptr [rax+r21*2+0x25] +XDIS 18fc6: MISC BASE D5688D446926 lea r16, ptr [rcx+r21*2+0x26] +XDIS 18fcc: MISC BASE D5688D446A27 lea r16, ptr [rdx+r21*2+0x27] +XDIS 18fd2: MISC BASE D5688D446B28 lea r16, ptr [rbx+r21*2+0x28] +XDIS 18fd8: MISC BASE D5688D446C29 lea r16, ptr [rsp+r21*2+0x29] +XDIS 18fde: MISC BASE D5688D446D2A lea r16, ptr [rbp+r21*2+0x2a] +XDIS 18fe4: MISC BASE D5688D446E2B lea r16, ptr [rsi+r21*2+0x2b] +XDIS 18fea: MISC BASE D5688D446F2C lea r16, ptr [rdi+r21*2+0x2c] +XDIS 18ff0: MISC BASE D5698D44682D lea r16, ptr [r8+r21*2+0x2d] +XDIS 18ff6: MISC BASE D5698D44692E lea r16, ptr [r9+r21*2+0x2e] +XDIS 18ffc: MISC BASE D5698D446A2F lea r16, ptr [r10+r21*2+0x2f] +XDIS 19002: MISC BASE D5698D446B30 lea r16, ptr [r11+r21*2+0x30] +XDIS 19008: MISC BASE D5698D446C31 lea r16, ptr [r12+r21*2+0x31] +XDIS 1900e: MISC BASE D5698D446D32 lea r16, ptr [r13+r21*2+0x32] +XDIS 19014: MISC BASE D5698D446E33 lea r16, ptr [r14+r21*2+0x33] +XDIS 1901a: MISC BASE D5698D446F34 lea r16, ptr [r15+r21*2+0x34] +XDIS 19020: MISC BASE D5788D446835 lea r16, ptr [r16+r21*2+0x35] +XDIS 19026: MISC BASE D5788D446936 lea r16, ptr [r17+r21*2+0x36] +XDIS 1902c: MISC BASE D5788D446A37 lea r16, ptr [r18+r21*2+0x37] +XDIS 19032: MISC BASE D5788D446B38 lea r16, ptr [r19+r21*2+0x38] +XDIS 19038: MISC BASE D5788D446C39 lea r16, ptr [r20+r21*2+0x39] +XDIS 1903e: MISC BASE D5788D446D3A lea r16, ptr [r21+r21*2+0x3a] +XDIS 19044: MISC BASE D5788D446E3B lea r16, ptr [r22+r21*2+0x3b] +XDIS 1904a: MISC BASE D5788D446F3C lea r16, ptr [r23+r21*2+0x3c] +XDIS 19050: MISC BASE D5798D44683D lea r16, ptr [r24+r21*2+0x3d] +XDIS 19056: MISC BASE D5798D44693E lea r16, ptr [r25+r21*2+0x3e] +XDIS 1905c: MISC BASE D5798D446A3F lea r16, ptr [r26+r21*2+0x3f] +XDIS 19062: MISC BASE D5798D446B40 lea r16, ptr [r27+r21*2+0x40] +XDIS 19068: MISC BASE D5798D446C41 lea r16, ptr [r28+r21*2+0x41] +XDIS 1906e: MISC BASE D5798D446D42 lea r16, ptr [r29+r21*2+0x42] +XDIS 19074: MISC BASE D5798D446E43 lea r16, ptr [r30+r21*2+0x43] +XDIS 1907a: MISC BASE D5798D446F44 lea r16, ptr [r31+r21*2+0x44] +XDIS 19080: MISC BASE D5688D447026 lea r16, ptr [rax+r22*2+0x26] +XDIS 19086: MISC BASE D5688D447127 lea r16, ptr [rcx+r22*2+0x27] +XDIS 1908c: MISC BASE D5688D447228 lea r16, ptr [rdx+r22*2+0x28] +XDIS 19092: MISC BASE D5688D447329 lea r16, ptr [rbx+r22*2+0x29] +XDIS 19098: MISC BASE D5688D44742A lea r16, ptr [rsp+r22*2+0x2a] +XDIS 1909e: MISC BASE D5688D44752B lea r16, ptr [rbp+r22*2+0x2b] +XDIS 190a4: MISC BASE D5688D44762C lea r16, ptr [rsi+r22*2+0x2c] +XDIS 190aa: MISC BASE D5688D44772D lea r16, ptr [rdi+r22*2+0x2d] +XDIS 190b0: MISC BASE D5698D44702E lea r16, ptr [r8+r22*2+0x2e] +XDIS 190b6: MISC BASE D5698D44712F lea r16, ptr [r9+r22*2+0x2f] +XDIS 190bc: MISC BASE D5698D447230 lea r16, ptr [r10+r22*2+0x30] +XDIS 190c2: MISC BASE D5698D447331 lea r16, ptr [r11+r22*2+0x31] +XDIS 190c8: MISC BASE D5698D447432 lea r16, ptr [r12+r22*2+0x32] +XDIS 190ce: MISC BASE D5698D447533 lea r16, ptr [r13+r22*2+0x33] +XDIS 190d4: MISC BASE D5698D447634 lea r16, ptr [r14+r22*2+0x34] +XDIS 190da: MISC BASE D5698D447735 lea r16, ptr [r15+r22*2+0x35] +XDIS 190e0: MISC BASE D5788D447036 lea r16, ptr [r16+r22*2+0x36] +XDIS 190e6: MISC BASE D5788D447137 lea r16, ptr [r17+r22*2+0x37] +XDIS 190ec: MISC BASE D5788D447238 lea r16, ptr [r18+r22*2+0x38] +XDIS 190f2: MISC BASE D5788D447339 lea r16, ptr [r19+r22*2+0x39] +XDIS 190f8: MISC BASE D5788D44743A lea r16, ptr [r20+r22*2+0x3a] +XDIS 190fe: MISC BASE D5788D44753B lea r16, ptr [r21+r22*2+0x3b] +XDIS 19104: MISC BASE D5788D44763C lea r16, ptr [r22+r22*2+0x3c] +XDIS 1910a: MISC BASE D5788D44773D lea r16, ptr [r23+r22*2+0x3d] +XDIS 19110: MISC BASE D5798D44703E lea r16, ptr [r24+r22*2+0x3e] +XDIS 19116: MISC BASE D5798D44713F lea r16, ptr [r25+r22*2+0x3f] +XDIS 1911c: MISC BASE D5798D447240 lea r16, ptr [r26+r22*2+0x40] +XDIS 19122: MISC BASE D5798D447341 lea r16, ptr [r27+r22*2+0x41] +XDIS 19128: MISC BASE D5798D447442 lea r16, ptr [r28+r22*2+0x42] +XDIS 1912e: MISC BASE D5798D447543 lea r16, ptr [r29+r22*2+0x43] +XDIS 19134: MISC BASE D5798D447644 lea r16, ptr [r30+r22*2+0x44] +XDIS 1913a: MISC BASE D5798D447745 lea r16, ptr [r31+r22*2+0x45] +XDIS 19140: MISC BASE D5688D447827 lea r16, ptr [rax+r23*2+0x27] +XDIS 19146: MISC BASE D5688D447928 lea r16, ptr [rcx+r23*2+0x28] +XDIS 1914c: MISC BASE D5688D447A29 lea r16, ptr [rdx+r23*2+0x29] +XDIS 19152: MISC BASE D5688D447B2A lea r16, ptr [rbx+r23*2+0x2a] +XDIS 19158: MISC BASE D5688D447C2B lea r16, ptr [rsp+r23*2+0x2b] +XDIS 1915e: MISC BASE D5688D447D2C lea r16, ptr [rbp+r23*2+0x2c] +XDIS 19164: MISC BASE D5688D447E2D lea r16, ptr [rsi+r23*2+0x2d] +XDIS 1916a: MISC BASE D5688D447F2E lea r16, ptr [rdi+r23*2+0x2e] +XDIS 19170: MISC BASE D5698D44782F lea r16, ptr [r8+r23*2+0x2f] +XDIS 19176: MISC BASE D5698D447930 lea r16, ptr [r9+r23*2+0x30] +XDIS 1917c: MISC BASE D5698D447A31 lea r16, ptr [r10+r23*2+0x31] +XDIS 19182: MISC BASE D5698D447B32 lea r16, ptr [r11+r23*2+0x32] +XDIS 19188: MISC BASE D5698D447C33 lea r16, ptr [r12+r23*2+0x33] +XDIS 1918e: MISC BASE D5698D447D34 lea r16, ptr [r13+r23*2+0x34] +XDIS 19194: MISC BASE D5698D447E35 lea r16, ptr [r14+r23*2+0x35] +XDIS 1919a: MISC BASE D5698D447F36 lea r16, ptr [r15+r23*2+0x36] +XDIS 191a0: MISC BASE D5788D447837 lea r16, ptr [r16+r23*2+0x37] +XDIS 191a6: MISC BASE D5788D447938 lea r16, ptr [r17+r23*2+0x38] +XDIS 191ac: MISC BASE D5788D447A39 lea r16, ptr [r18+r23*2+0x39] +XDIS 191b2: MISC BASE D5788D447B3A lea r16, ptr [r19+r23*2+0x3a] +XDIS 191b8: MISC BASE D5788D447C3B lea r16, ptr [r20+r23*2+0x3b] +XDIS 191be: MISC BASE D5788D447D3C lea r16, ptr [r21+r23*2+0x3c] +XDIS 191c4: MISC BASE D5788D447E3D lea r16, ptr [r22+r23*2+0x3d] +XDIS 191ca: MISC BASE D5788D447F3E lea r16, ptr [r23+r23*2+0x3e] +XDIS 191d0: MISC BASE D5798D44783F lea r16, ptr [r24+r23*2+0x3f] +XDIS 191d6: MISC BASE D5798D447940 lea r16, ptr [r25+r23*2+0x40] +XDIS 191dc: MISC BASE D5798D447A41 lea r16, ptr [r26+r23*2+0x41] +XDIS 191e2: MISC BASE D5798D447B42 lea r16, ptr [r27+r23*2+0x42] +XDIS 191e8: MISC BASE D5798D447C43 lea r16, ptr [r28+r23*2+0x43] +XDIS 191ee: MISC BASE D5798D447D44 lea r16, ptr [r29+r23*2+0x44] +XDIS 191f4: MISC BASE D5798D447E45 lea r16, ptr [r30+r23*2+0x45] +XDIS 191fa: MISC BASE D5798D447F46 lea r16, ptr [r31+r23*2+0x46] +XDIS 19200: MISC BASE D56A8D444028 lea r16, ptr [rax+r24*2+0x28] +XDIS 19206: MISC BASE D56A8D444129 lea r16, ptr [rcx+r24*2+0x29] +XDIS 1920c: MISC BASE D56A8D44422A lea r16, ptr [rdx+r24*2+0x2a] +XDIS 19212: MISC BASE D56A8D44432B lea r16, ptr [rbx+r24*2+0x2b] +XDIS 19218: MISC BASE D56A8D44442C lea r16, ptr [rsp+r24*2+0x2c] +XDIS 1921e: MISC BASE D56A8D44452D lea r16, ptr [rbp+r24*2+0x2d] +XDIS 19224: MISC BASE D56A8D44462E lea r16, ptr [rsi+r24*2+0x2e] +XDIS 1922a: MISC BASE D56A8D44472F lea r16, ptr [rdi+r24*2+0x2f] +XDIS 19230: MISC BASE D56B8D444030 lea r16, ptr [r8+r24*2+0x30] +XDIS 19236: MISC BASE D56B8D444131 lea r16, ptr [r9+r24*2+0x31] +XDIS 1923c: MISC BASE D56B8D444232 lea r16, ptr [r10+r24*2+0x32] +XDIS 19242: MISC BASE D56B8D444333 lea r16, ptr [r11+r24*2+0x33] +XDIS 19248: MISC BASE D56B8D444434 lea r16, ptr [r12+r24*2+0x34] +XDIS 1924e: MISC BASE D56B8D444535 lea r16, ptr [r13+r24*2+0x35] +XDIS 19254: MISC BASE D56B8D444636 lea r16, ptr [r14+r24*2+0x36] +XDIS 1925a: MISC BASE D56B8D444737 lea r16, ptr [r15+r24*2+0x37] +XDIS 19260: MISC BASE D57A8D444038 lea r16, ptr [r16+r24*2+0x38] +XDIS 19266: MISC BASE D57A8D444139 lea r16, ptr [r17+r24*2+0x39] +XDIS 1926c: MISC BASE D57A8D44423A lea r16, ptr [r18+r24*2+0x3a] +XDIS 19272: MISC BASE D57A8D44433B lea r16, ptr [r19+r24*2+0x3b] +XDIS 19278: MISC BASE D57A8D44443C lea r16, ptr [r20+r24*2+0x3c] +XDIS 1927e: MISC BASE D57A8D44453D lea r16, ptr [r21+r24*2+0x3d] +XDIS 19284: MISC BASE D57A8D44463E lea r16, ptr [r22+r24*2+0x3e] +XDIS 1928a: MISC BASE D57A8D44473F lea r16, ptr [r23+r24*2+0x3f] +XDIS 19290: MISC BASE D57B8D444040 lea r16, ptr [r24+r24*2+0x40] +XDIS 19296: MISC BASE D57B8D444141 lea r16, ptr [r25+r24*2+0x41] +XDIS 1929c: MISC BASE D57B8D444242 lea r16, ptr [r26+r24*2+0x42] +XDIS 192a2: MISC BASE D57B8D444343 lea r16, ptr [r27+r24*2+0x43] +XDIS 192a8: MISC BASE D57B8D444444 lea r16, ptr [r28+r24*2+0x44] +XDIS 192ae: MISC BASE D57B8D444545 lea r16, ptr [r29+r24*2+0x45] +XDIS 192b4: MISC BASE D57B8D444646 lea r16, ptr [r30+r24*2+0x46] +XDIS 192ba: MISC BASE D57B8D444747 lea r16, ptr [r31+r24*2+0x47] +XDIS 192c0: MISC BASE D56A8D444829 lea r16, ptr [rax+r25*2+0x29] +XDIS 192c6: MISC BASE D56A8D44492A lea r16, ptr [rcx+r25*2+0x2a] +XDIS 192cc: MISC BASE D56A8D444A2B lea r16, ptr [rdx+r25*2+0x2b] +XDIS 192d2: MISC BASE D56A8D444B2C lea r16, ptr [rbx+r25*2+0x2c] +XDIS 192d8: MISC BASE D56A8D444C2D lea r16, ptr [rsp+r25*2+0x2d] +XDIS 192de: MISC BASE D56A8D444D2E lea r16, ptr [rbp+r25*2+0x2e] +XDIS 192e4: MISC BASE D56A8D444E2F lea r16, ptr [rsi+r25*2+0x2f] +XDIS 192ea: MISC BASE D56A8D444F30 lea r16, ptr [rdi+r25*2+0x30] +XDIS 192f0: MISC BASE D56B8D444831 lea r16, ptr [r8+r25*2+0x31] +XDIS 192f6: MISC BASE D56B8D444932 lea r16, ptr [r9+r25*2+0x32] +XDIS 192fc: MISC BASE D56B8D444A33 lea r16, ptr [r10+r25*2+0x33] +XDIS 19302: MISC BASE D56B8D444B34 lea r16, ptr [r11+r25*2+0x34] +XDIS 19308: MISC BASE D56B8D444C35 lea r16, ptr [r12+r25*2+0x35] +XDIS 1930e: MISC BASE D56B8D444D36 lea r16, ptr [r13+r25*2+0x36] +XDIS 19314: MISC BASE D56B8D444E37 lea r16, ptr [r14+r25*2+0x37] +XDIS 1931a: MISC BASE D56B8D444F38 lea r16, ptr [r15+r25*2+0x38] +XDIS 19320: MISC BASE D57A8D444839 lea r16, ptr [r16+r25*2+0x39] +XDIS 19326: MISC BASE D57A8D44493A lea r16, ptr [r17+r25*2+0x3a] +XDIS 1932c: MISC BASE D57A8D444A3B lea r16, ptr [r18+r25*2+0x3b] +XDIS 19332: MISC BASE D57A8D444B3C lea r16, ptr [r19+r25*2+0x3c] +XDIS 19338: MISC BASE D57A8D444C3D lea r16, ptr [r20+r25*2+0x3d] +XDIS 1933e: MISC BASE D57A8D444D3E lea r16, ptr [r21+r25*2+0x3e] +XDIS 19344: MISC BASE D57A8D444E3F lea r16, ptr [r22+r25*2+0x3f] +XDIS 1934a: MISC BASE D57A8D444F40 lea r16, ptr [r23+r25*2+0x40] +XDIS 19350: MISC BASE D57B8D444841 lea r16, ptr [r24+r25*2+0x41] +XDIS 19356: MISC BASE D57B8D444942 lea r16, ptr [r25+r25*2+0x42] +XDIS 1935c: MISC BASE D57B8D444A43 lea r16, ptr [r26+r25*2+0x43] +XDIS 19362: MISC BASE D57B8D444B44 lea r16, ptr [r27+r25*2+0x44] +XDIS 19368: MISC BASE D57B8D444C45 lea r16, ptr [r28+r25*2+0x45] +XDIS 1936e: MISC BASE D57B8D444D46 lea r16, ptr [r29+r25*2+0x46] +XDIS 19374: MISC BASE D57B8D444E47 lea r16, ptr [r30+r25*2+0x47] +XDIS 1937a: MISC BASE D57B8D444F48 lea r16, ptr [r31+r25*2+0x48] +XDIS 19380: MISC BASE D56A8D44502A lea r16, ptr [rax+r26*2+0x2a] +XDIS 19386: MISC BASE D56A8D44512B lea r16, ptr [rcx+r26*2+0x2b] +XDIS 1938c: MISC BASE D56A8D44522C lea r16, ptr [rdx+r26*2+0x2c] +XDIS 19392: MISC BASE D56A8D44532D lea r16, ptr [rbx+r26*2+0x2d] +XDIS 19398: MISC BASE D56A8D44542E lea r16, ptr [rsp+r26*2+0x2e] +XDIS 1939e: MISC BASE D56A8D44552F lea r16, ptr [rbp+r26*2+0x2f] +XDIS 193a4: MISC BASE D56A8D445630 lea r16, ptr [rsi+r26*2+0x30] +XDIS 193aa: MISC BASE D56A8D445731 lea r16, ptr [rdi+r26*2+0x31] +XDIS 193b0: MISC BASE D56B8D445032 lea r16, ptr [r8+r26*2+0x32] +XDIS 193b6: MISC BASE D56B8D445133 lea r16, ptr [r9+r26*2+0x33] +XDIS 193bc: MISC BASE D56B8D445234 lea r16, ptr [r10+r26*2+0x34] +XDIS 193c2: MISC BASE D56B8D445335 lea r16, ptr [r11+r26*2+0x35] +XDIS 193c8: MISC BASE D56B8D445436 lea r16, ptr [r12+r26*2+0x36] +XDIS 193ce: MISC BASE D56B8D445537 lea r16, ptr [r13+r26*2+0x37] +XDIS 193d4: MISC BASE D56B8D445638 lea r16, ptr [r14+r26*2+0x38] +XDIS 193da: MISC BASE D56B8D445739 lea r16, ptr [r15+r26*2+0x39] +XDIS 193e0: MISC BASE D57A8D44503A lea r16, ptr [r16+r26*2+0x3a] +XDIS 193e6: MISC BASE D57A8D44513B lea r16, ptr [r17+r26*2+0x3b] +XDIS 193ec: MISC BASE D57A8D44523C lea r16, ptr [r18+r26*2+0x3c] +XDIS 193f2: MISC BASE D57A8D44533D lea r16, ptr [r19+r26*2+0x3d] +XDIS 193f8: MISC BASE D57A8D44543E lea r16, ptr [r20+r26*2+0x3e] +XDIS 193fe: MISC BASE D57A8D44553F lea r16, ptr [r21+r26*2+0x3f] +XDIS 19404: MISC BASE D57A8D445640 lea r16, ptr [r22+r26*2+0x40] +XDIS 1940a: MISC BASE D57A8D445741 lea r16, ptr [r23+r26*2+0x41] +XDIS 19410: MISC BASE D57B8D445042 lea r16, ptr [r24+r26*2+0x42] +XDIS 19416: MISC BASE D57B8D445143 lea r16, ptr [r25+r26*2+0x43] +XDIS 1941c: MISC BASE D57B8D445244 lea r16, ptr [r26+r26*2+0x44] +XDIS 19422: MISC BASE D57B8D445345 lea r16, ptr [r27+r26*2+0x45] +XDIS 19428: MISC BASE D57B8D445446 lea r16, ptr [r28+r26*2+0x46] +XDIS 1942e: MISC BASE D57B8D445547 lea r16, ptr [r29+r26*2+0x47] +XDIS 19434: MISC BASE D57B8D445648 lea r16, ptr [r30+r26*2+0x48] +XDIS 1943a: MISC BASE D57B8D445749 lea r16, ptr [r31+r26*2+0x49] +XDIS 19440: MISC BASE D56A8D44582B lea r16, ptr [rax+r27*2+0x2b] +XDIS 19446: MISC BASE D56A8D44592C lea r16, ptr [rcx+r27*2+0x2c] +XDIS 1944c: MISC BASE D56A8D445A2D lea r16, ptr [rdx+r27*2+0x2d] +XDIS 19452: MISC BASE D56A8D445B2E lea r16, ptr [rbx+r27*2+0x2e] +XDIS 19458: MISC BASE D56A8D445C2F lea r16, ptr [rsp+r27*2+0x2f] +XDIS 1945e: MISC BASE D56A8D445D30 lea r16, ptr [rbp+r27*2+0x30] +XDIS 19464: MISC BASE D56A8D445E31 lea r16, ptr [rsi+r27*2+0x31] +XDIS 1946a: MISC BASE D56A8D445F32 lea r16, ptr [rdi+r27*2+0x32] +XDIS 19470: MISC BASE D56B8D445833 lea r16, ptr [r8+r27*2+0x33] +XDIS 19476: MISC BASE D56B8D445934 lea r16, ptr [r9+r27*2+0x34] +XDIS 1947c: MISC BASE D56B8D445A35 lea r16, ptr [r10+r27*2+0x35] +XDIS 19482: MISC BASE D56B8D445B36 lea r16, ptr [r11+r27*2+0x36] +XDIS 19488: MISC BASE D56B8D445C37 lea r16, ptr [r12+r27*2+0x37] +XDIS 1948e: MISC BASE D56B8D445D38 lea r16, ptr [r13+r27*2+0x38] +XDIS 19494: MISC BASE D56B8D445E39 lea r16, ptr [r14+r27*2+0x39] +XDIS 1949a: MISC BASE D56B8D445F3A lea r16, ptr [r15+r27*2+0x3a] +XDIS 194a0: MISC BASE D57A8D44583B lea r16, ptr [r16+r27*2+0x3b] +XDIS 194a6: MISC BASE D57A8D44593C lea r16, ptr [r17+r27*2+0x3c] +XDIS 194ac: MISC BASE D57A8D445A3D lea r16, ptr [r18+r27*2+0x3d] +XDIS 194b2: MISC BASE D57A8D445B3E lea r16, ptr [r19+r27*2+0x3e] +XDIS 194b8: MISC BASE D57A8D445C3F lea r16, ptr [r20+r27*2+0x3f] +XDIS 194be: MISC BASE D57A8D445D40 lea r16, ptr [r21+r27*2+0x40] +XDIS 194c4: MISC BASE D57A8D445E41 lea r16, ptr [r22+r27*2+0x41] +XDIS 194ca: MISC BASE D57A8D445F42 lea r16, ptr [r23+r27*2+0x42] +XDIS 194d0: MISC BASE D57B8D445843 lea r16, ptr [r24+r27*2+0x43] +XDIS 194d6: MISC BASE D57B8D445944 lea r16, ptr [r25+r27*2+0x44] +XDIS 194dc: MISC BASE D57B8D445A45 lea r16, ptr [r26+r27*2+0x45] +XDIS 194e2: MISC BASE D57B8D445B46 lea r16, ptr [r27+r27*2+0x46] +XDIS 194e8: MISC BASE D57B8D445C47 lea r16, ptr [r28+r27*2+0x47] +XDIS 194ee: MISC BASE D57B8D445D48 lea r16, ptr [r29+r27*2+0x48] +XDIS 194f4: MISC BASE D57B8D445E49 lea r16, ptr [r30+r27*2+0x49] +XDIS 194fa: MISC BASE D57B8D445F4A lea r16, ptr [r31+r27*2+0x4a] +XDIS 19500: MISC BASE D56A8D44602C lea r16, ptr [rax+r28*2+0x2c] +XDIS 19506: MISC BASE D56A8D44612D lea r16, ptr [rcx+r28*2+0x2d] +XDIS 1950c: MISC BASE D56A8D44622E lea r16, ptr [rdx+r28*2+0x2e] +XDIS 19512: MISC BASE D56A8D44632F lea r16, ptr [rbx+r28*2+0x2f] +XDIS 19518: MISC BASE D56A8D446430 lea r16, ptr [rsp+r28*2+0x30] +XDIS 1951e: MISC BASE D56A8D446531 lea r16, ptr [rbp+r28*2+0x31] +XDIS 19524: MISC BASE D56A8D446632 lea r16, ptr [rsi+r28*2+0x32] +XDIS 1952a: MISC BASE D56A8D446733 lea r16, ptr [rdi+r28*2+0x33] +XDIS 19530: MISC BASE D56B8D446034 lea r16, ptr [r8+r28*2+0x34] +XDIS 19536: MISC BASE D56B8D446135 lea r16, ptr [r9+r28*2+0x35] +XDIS 1953c: MISC BASE D56B8D446236 lea r16, ptr [r10+r28*2+0x36] +XDIS 19542: MISC BASE D56B8D446337 lea r16, ptr [r11+r28*2+0x37] +XDIS 19548: MISC BASE D56B8D446438 lea r16, ptr [r12+r28*2+0x38] +XDIS 1954e: MISC BASE D56B8D446539 lea r16, ptr [r13+r28*2+0x39] +XDIS 19554: MISC BASE D56B8D44663A lea r16, ptr [r14+r28*2+0x3a] +XDIS 1955a: MISC BASE D56B8D44673B lea r16, ptr [r15+r28*2+0x3b] +XDIS 19560: MISC BASE D57A8D44603C lea r16, ptr [r16+r28*2+0x3c] +XDIS 19566: MISC BASE D57A8D44613D lea r16, ptr [r17+r28*2+0x3d] +XDIS 1956c: MISC BASE D57A8D44623E lea r16, ptr [r18+r28*2+0x3e] +XDIS 19572: MISC BASE D57A8D44633F lea r16, ptr [r19+r28*2+0x3f] +XDIS 19578: MISC BASE D57A8D446440 lea r16, ptr [r20+r28*2+0x40] +XDIS 1957e: MISC BASE D57A8D446541 lea r16, ptr [r21+r28*2+0x41] +XDIS 19584: MISC BASE D57A8D446642 lea r16, ptr [r22+r28*2+0x42] +XDIS 1958a: MISC BASE D57A8D446743 lea r16, ptr [r23+r28*2+0x43] +XDIS 19590: MISC BASE D57B8D446044 lea r16, ptr [r24+r28*2+0x44] +XDIS 19596: MISC BASE D57B8D446145 lea r16, ptr [r25+r28*2+0x45] +XDIS 1959c: MISC BASE D57B8D446246 lea r16, ptr [r26+r28*2+0x46] +XDIS 195a2: MISC BASE D57B8D446347 lea r16, ptr [r27+r28*2+0x47] +XDIS 195a8: MISC BASE D57B8D446448 lea r16, ptr [r28+r28*2+0x48] +XDIS 195ae: MISC BASE D57B8D446549 lea r16, ptr [r29+r28*2+0x49] +XDIS 195b4: MISC BASE D57B8D44664A lea r16, ptr [r30+r28*2+0x4a] +XDIS 195ba: MISC BASE D57B8D44674B lea r16, ptr [r31+r28*2+0x4b] +XDIS 195c0: MISC BASE D56A8D44682D lea r16, ptr [rax+r29*2+0x2d] +XDIS 195c6: MISC BASE D56A8D44692E lea r16, ptr [rcx+r29*2+0x2e] +XDIS 195cc: MISC BASE D56A8D446A2F lea r16, ptr [rdx+r29*2+0x2f] +XDIS 195d2: MISC BASE D56A8D446B30 lea r16, ptr [rbx+r29*2+0x30] +XDIS 195d8: MISC BASE D56A8D446C31 lea r16, ptr [rsp+r29*2+0x31] +XDIS 195de: MISC BASE D56A8D446D32 lea r16, ptr [rbp+r29*2+0x32] +XDIS 195e4: MISC BASE D56A8D446E33 lea r16, ptr [rsi+r29*2+0x33] +XDIS 195ea: MISC BASE D56A8D446F34 lea r16, ptr [rdi+r29*2+0x34] +XDIS 195f0: MISC BASE D56B8D446835 lea r16, ptr [r8+r29*2+0x35] +XDIS 195f6: MISC BASE D56B8D446936 lea r16, ptr [r9+r29*2+0x36] +XDIS 195fc: MISC BASE D56B8D446A37 lea r16, ptr [r10+r29*2+0x37] +XDIS 19602: MISC BASE D56B8D446B38 lea r16, ptr [r11+r29*2+0x38] +XDIS 19608: MISC BASE D56B8D446C39 lea r16, ptr [r12+r29*2+0x39] +XDIS 1960e: MISC BASE D56B8D446D3A lea r16, ptr [r13+r29*2+0x3a] +XDIS 19614: MISC BASE D56B8D446E3B lea r16, ptr [r14+r29*2+0x3b] +XDIS 1961a: MISC BASE D56B8D446F3C lea r16, ptr [r15+r29*2+0x3c] +XDIS 19620: MISC BASE D57A8D44683D lea r16, ptr [r16+r29*2+0x3d] +XDIS 19626: MISC BASE D57A8D44693E lea r16, ptr [r17+r29*2+0x3e] +XDIS 1962c: MISC BASE D57A8D446A3F lea r16, ptr [r18+r29*2+0x3f] +XDIS 19632: MISC BASE D57A8D446B40 lea r16, ptr [r19+r29*2+0x40] +XDIS 19638: MISC BASE D57A8D446C41 lea r16, ptr [r20+r29*2+0x41] +XDIS 1963e: MISC BASE D57A8D446D42 lea r16, ptr [r21+r29*2+0x42] +XDIS 19644: MISC BASE D57A8D446E43 lea r16, ptr [r22+r29*2+0x43] +XDIS 1964a: MISC BASE D57A8D446F44 lea r16, ptr [r23+r29*2+0x44] +XDIS 19650: MISC BASE D57B8D446845 lea r16, ptr [r24+r29*2+0x45] +XDIS 19656: MISC BASE D57B8D446946 lea r16, ptr [r25+r29*2+0x46] +XDIS 1965c: MISC BASE D57B8D446A47 lea r16, ptr [r26+r29*2+0x47] +XDIS 19662: MISC BASE D57B8D446B48 lea r16, ptr [r27+r29*2+0x48] +XDIS 19668: MISC BASE D57B8D446C49 lea r16, ptr [r28+r29*2+0x49] +XDIS 1966e: MISC BASE D57B8D446D4A lea r16, ptr [r29+r29*2+0x4a] +XDIS 19674: MISC BASE D57B8D446E4B lea r16, ptr [r30+r29*2+0x4b] +XDIS 1967a: MISC BASE D57B8D446F4C lea r16, ptr [r31+r29*2+0x4c] +XDIS 19680: MISC BASE D56A8D44702E lea r16, ptr [rax+r30*2+0x2e] +XDIS 19686: MISC BASE D56A8D44712F lea r16, ptr [rcx+r30*2+0x2f] +XDIS 1968c: MISC BASE D56A8D447230 lea r16, ptr [rdx+r30*2+0x30] +XDIS 19692: MISC BASE D56A8D447331 lea r16, ptr [rbx+r30*2+0x31] +XDIS 19698: MISC BASE D56A8D447432 lea r16, ptr [rsp+r30*2+0x32] +XDIS 1969e: MISC BASE D56A8D447533 lea r16, ptr [rbp+r30*2+0x33] +XDIS 196a4: MISC BASE D56A8D447634 lea r16, ptr [rsi+r30*2+0x34] +XDIS 196aa: MISC BASE D56A8D447735 lea r16, ptr [rdi+r30*2+0x35] +XDIS 196b0: MISC BASE D56B8D447036 lea r16, ptr [r8+r30*2+0x36] +XDIS 196b6: MISC BASE D56B8D447137 lea r16, ptr [r9+r30*2+0x37] +XDIS 196bc: MISC BASE D56B8D447238 lea r16, ptr [r10+r30*2+0x38] +XDIS 196c2: MISC BASE D56B8D447339 lea r16, ptr [r11+r30*2+0x39] +XDIS 196c8: MISC BASE D56B8D44743A lea r16, ptr [r12+r30*2+0x3a] +XDIS 196ce: MISC BASE D56B8D44753B lea r16, ptr [r13+r30*2+0x3b] +XDIS 196d4: MISC BASE D56B8D44763C lea r16, ptr [r14+r30*2+0x3c] +XDIS 196da: MISC BASE D56B8D44773D lea r16, ptr [r15+r30*2+0x3d] +XDIS 196e0: MISC BASE D57A8D44703E lea r16, ptr [r16+r30*2+0x3e] +XDIS 196e6: MISC BASE D57A8D44713F lea r16, ptr [r17+r30*2+0x3f] +XDIS 196ec: MISC BASE D57A8D447240 lea r16, ptr [r18+r30*2+0x40] +XDIS 196f2: MISC BASE D57A8D447341 lea r16, ptr [r19+r30*2+0x41] +XDIS 196f8: MISC BASE D57A8D447442 lea r16, ptr [r20+r30*2+0x42] +XDIS 196fe: MISC BASE D57A8D447543 lea r16, ptr [r21+r30*2+0x43] +XDIS 19704: MISC BASE D57A8D447644 lea r16, ptr [r22+r30*2+0x44] +XDIS 1970a: MISC BASE D57A8D447745 lea r16, ptr [r23+r30*2+0x45] +XDIS 19710: MISC BASE D57B8D447046 lea r16, ptr [r24+r30*2+0x46] +XDIS 19716: MISC BASE D57B8D447147 lea r16, ptr [r25+r30*2+0x47] +XDIS 1971c: MISC BASE D57B8D447248 lea r16, ptr [r26+r30*2+0x48] +XDIS 19722: MISC BASE D57B8D447349 lea r16, ptr [r27+r30*2+0x49] +XDIS 19728: MISC BASE D57B8D44744A lea r16, ptr [r28+r30*2+0x4a] +XDIS 1972e: MISC BASE D57B8D44754B lea r16, ptr [r29+r30*2+0x4b] +XDIS 19734: MISC BASE D57B8D44764C lea r16, ptr [r30+r30*2+0x4c] +XDIS 1973a: MISC BASE D57B8D44774D lea r16, ptr [r31+r30*2+0x4d] +XDIS 19740: MISC BASE D56A8D44782F lea r16, ptr [rax+r31*2+0x2f] +XDIS 19746: MISC BASE D56A8D447930 lea r16, ptr [rcx+r31*2+0x30] +XDIS 1974c: MISC BASE D56A8D447A31 lea r16, ptr [rdx+r31*2+0x31] +XDIS 19752: MISC BASE D56A8D447B32 lea r16, ptr [rbx+r31*2+0x32] +XDIS 19758: MISC BASE D56A8D447C33 lea r16, ptr [rsp+r31*2+0x33] +XDIS 1975e: MISC BASE D56A8D447D34 lea r16, ptr [rbp+r31*2+0x34] +XDIS 19764: MISC BASE D56A8D447E35 lea r16, ptr [rsi+r31*2+0x35] +XDIS 1976a: MISC BASE D56A8D447F36 lea r16, ptr [rdi+r31*2+0x36] +XDIS 19770: MISC BASE D56B8D447837 lea r16, ptr [r8+r31*2+0x37] +XDIS 19776: MISC BASE D56B8D447938 lea r16, ptr [r9+r31*2+0x38] +XDIS 1977c: MISC BASE D56B8D447A39 lea r16, ptr [r10+r31*2+0x39] +XDIS 19782: MISC BASE D56B8D447B3A lea r16, ptr [r11+r31*2+0x3a] +XDIS 19788: MISC BASE D56B8D447C3B lea r16, ptr [r12+r31*2+0x3b] +XDIS 1978e: MISC BASE D56B8D447D3C lea r16, ptr [r13+r31*2+0x3c] +XDIS 19794: MISC BASE D56B8D447E3D lea r16, ptr [r14+r31*2+0x3d] +XDIS 1979a: MISC BASE D56B8D447F3E lea r16, ptr [r15+r31*2+0x3e] +XDIS 197a0: MISC BASE D57A8D44783F lea r16, ptr [r16+r31*2+0x3f] +XDIS 197a6: MISC BASE D57A8D447940 lea r16, ptr [r17+r31*2+0x40] +XDIS 197ac: MISC BASE D57A8D447A41 lea r16, ptr [r18+r31*2+0x41] +XDIS 197b2: MISC BASE D57A8D447B42 lea r16, ptr [r19+r31*2+0x42] +XDIS 197b8: MISC BASE D57A8D447C43 lea r16, ptr [r20+r31*2+0x43] +XDIS 197be: MISC BASE D57A8D447D44 lea r16, ptr [r21+r31*2+0x44] +XDIS 197c4: MISC BASE D57A8D447E45 lea r16, ptr [r22+r31*2+0x45] +XDIS 197ca: MISC BASE D57A8D447F46 lea r16, ptr [r23+r31*2+0x46] +XDIS 197d0: MISC BASE D57B8D447847 lea r16, ptr [r24+r31*2+0x47] +XDIS 197d6: MISC BASE D57B8D447948 lea r16, ptr [r25+r31*2+0x48] +XDIS 197dc: MISC BASE D57B8D447A49 lea r16, ptr [r26+r31*2+0x49] +XDIS 197e2: MISC BASE D57B8D447B4A lea r16, ptr [r27+r31*2+0x4a] +XDIS 197e8: MISC BASE D57B8D447C4B lea r16, ptr [r28+r31*2+0x4b] +XDIS 197ee: MISC BASE D57B8D447D4C lea r16, ptr [r29+r31*2+0x4c] +XDIS 197f4: MISC BASE D57B8D447E4D lea r16, ptr [r30+r31*2+0x4d] +XDIS 197fa: MISC BASE D57B8D447F4E lea r16, ptr [r31+r31*2+0x4e] +XDIS 19800: MISC BASE D5488D4C4011 lea r17, ptr [rax+rax*2+0x11] +XDIS 19806: MISC BASE D5488D4C4112 lea r17, ptr [rcx+rax*2+0x12] +XDIS 1980c: MISC BASE D5488D4C4213 lea r17, ptr [rdx+rax*2+0x13] +XDIS 19812: MISC BASE D5488D4C4314 lea r17, ptr [rbx+rax*2+0x14] +XDIS 19818: MISC BASE D5488D4C4415 lea r17, ptr [rsp+rax*2+0x15] +XDIS 1981e: MISC BASE D5488D4C4516 lea r17, ptr [rbp+rax*2+0x16] +XDIS 19824: MISC BASE D5488D4C4617 lea r17, ptr [rsi+rax*2+0x17] +XDIS 1982a: MISC BASE D5488D4C4718 lea r17, ptr [rdi+rax*2+0x18] +XDIS 19830: MISC BASE D5498D4C4019 lea r17, ptr [r8+rax*2+0x19] +XDIS 19836: MISC BASE D5498D4C411A lea r17, ptr [r9+rax*2+0x1a] +XDIS 1983c: MISC BASE D5498D4C421B lea r17, ptr [r10+rax*2+0x1b] +XDIS 19842: MISC BASE D5498D4C431C lea r17, ptr [r11+rax*2+0x1c] +XDIS 19848: MISC BASE D5498D4C441D lea r17, ptr [r12+rax*2+0x1d] +XDIS 1984e: MISC BASE D5498D4C451E lea r17, ptr [r13+rax*2+0x1e] +XDIS 19854: MISC BASE D5498D4C461F lea r17, ptr [r14+rax*2+0x1f] +XDIS 1985a: MISC BASE D5498D4C4720 lea r17, ptr [r15+rax*2+0x20] +XDIS 19860: MISC BASE D5588D4C4021 lea r17, ptr [r16+rax*2+0x21] +XDIS 19866: MISC BASE D5588D4C4122 lea r17, ptr [r17+rax*2+0x22] +XDIS 1986c: MISC BASE D5588D4C4223 lea r17, ptr [r18+rax*2+0x23] +XDIS 19872: MISC BASE D5588D4C4324 lea r17, ptr [r19+rax*2+0x24] +XDIS 19878: MISC BASE D5588D4C4425 lea r17, ptr [r20+rax*2+0x25] +XDIS 1987e: MISC BASE D5588D4C4526 lea r17, ptr [r21+rax*2+0x26] +XDIS 19884: MISC BASE D5588D4C4627 lea r17, ptr [r22+rax*2+0x27] +XDIS 1988a: MISC BASE D5588D4C4728 lea r17, ptr [r23+rax*2+0x28] +XDIS 19890: MISC BASE D5598D4C4029 lea r17, ptr [r24+rax*2+0x29] +XDIS 19896: MISC BASE D5598D4C412A lea r17, ptr [r25+rax*2+0x2a] +XDIS 1989c: MISC BASE D5598D4C422B lea r17, ptr [r26+rax*2+0x2b] +XDIS 198a2: MISC BASE D5598D4C432C lea r17, ptr [r27+rax*2+0x2c] +XDIS 198a8: MISC BASE D5598D4C442D lea r17, ptr [r28+rax*2+0x2d] +XDIS 198ae: MISC BASE D5598D4C452E lea r17, ptr [r29+rax*2+0x2e] +XDIS 198b4: MISC BASE D5598D4C462F lea r17, ptr [r30+rax*2+0x2f] +XDIS 198ba: MISC BASE D5598D4C4730 lea r17, ptr [r31+rax*2+0x30] +XDIS 198c0: MISC BASE D5488D4C4812 lea r17, ptr [rax+rcx*2+0x12] +XDIS 198c6: MISC BASE D5488D4C4913 lea r17, ptr [rcx+rcx*2+0x13] +XDIS 198cc: MISC BASE D5488D4C4A14 lea r17, ptr [rdx+rcx*2+0x14] +XDIS 198d2: MISC BASE D5488D4C4B15 lea r17, ptr [rbx+rcx*2+0x15] +XDIS 198d8: MISC BASE D5488D4C4C16 lea r17, ptr [rsp+rcx*2+0x16] +XDIS 198de: MISC BASE D5488D4C4D17 lea r17, ptr [rbp+rcx*2+0x17] +XDIS 198e4: MISC BASE D5488D4C4E18 lea r17, ptr [rsi+rcx*2+0x18] +XDIS 198ea: MISC BASE D5488D4C4F19 lea r17, ptr [rdi+rcx*2+0x19] +XDIS 198f0: MISC BASE D5498D4C481A lea r17, ptr [r8+rcx*2+0x1a] +XDIS 198f6: MISC BASE D5498D4C491B lea r17, ptr [r9+rcx*2+0x1b] +XDIS 198fc: MISC BASE D5498D4C4A1C lea r17, ptr [r10+rcx*2+0x1c] +XDIS 19902: MISC BASE D5498D4C4B1D lea r17, ptr [r11+rcx*2+0x1d] +XDIS 19908: MISC BASE D5498D4C4C1E lea r17, ptr [r12+rcx*2+0x1e] +XDIS 1990e: MISC BASE D5498D4C4D1F lea r17, ptr [r13+rcx*2+0x1f] +XDIS 19914: MISC BASE D5498D4C4E20 lea r17, ptr [r14+rcx*2+0x20] +XDIS 1991a: MISC BASE D5498D4C4F21 lea r17, ptr [r15+rcx*2+0x21] +XDIS 19920: MISC BASE D5588D4C4822 lea r17, ptr [r16+rcx*2+0x22] +XDIS 19926: MISC BASE D5588D4C4923 lea r17, ptr [r17+rcx*2+0x23] +XDIS 1992c: MISC BASE D5588D4C4A24 lea r17, ptr [r18+rcx*2+0x24] +XDIS 19932: MISC BASE D5588D4C4B25 lea r17, ptr [r19+rcx*2+0x25] +XDIS 19938: MISC BASE D5588D4C4C26 lea r17, ptr [r20+rcx*2+0x26] +XDIS 1993e: MISC BASE D5588D4C4D27 lea r17, ptr [r21+rcx*2+0x27] +XDIS 19944: MISC BASE D5588D4C4E28 lea r17, ptr [r22+rcx*2+0x28] +XDIS 1994a: MISC BASE D5588D4C4F29 lea r17, ptr [r23+rcx*2+0x29] +XDIS 19950: MISC BASE D5598D4C482A lea r17, ptr [r24+rcx*2+0x2a] +XDIS 19956: MISC BASE D5598D4C492B lea r17, ptr [r25+rcx*2+0x2b] +XDIS 1995c: MISC BASE D5598D4C4A2C lea r17, ptr [r26+rcx*2+0x2c] +XDIS 19962: MISC BASE D5598D4C4B2D lea r17, ptr [r27+rcx*2+0x2d] +XDIS 19968: MISC BASE D5598D4C4C2E lea r17, ptr [r28+rcx*2+0x2e] +XDIS 1996e: MISC BASE D5598D4C4D2F lea r17, ptr [r29+rcx*2+0x2f] +XDIS 19974: MISC BASE D5598D4C4E30 lea r17, ptr [r30+rcx*2+0x30] +XDIS 1997a: MISC BASE D5598D4C4F31 lea r17, ptr [r31+rcx*2+0x31] +XDIS 19980: MISC BASE D5488D4C5013 lea r17, ptr [rax+rdx*2+0x13] +XDIS 19986: MISC BASE D5488D4C5114 lea r17, ptr [rcx+rdx*2+0x14] +XDIS 1998c: MISC BASE D5488D4C5215 lea r17, ptr [rdx+rdx*2+0x15] +XDIS 19992: MISC BASE D5488D4C5316 lea r17, ptr [rbx+rdx*2+0x16] +XDIS 19998: MISC BASE D5488D4C5417 lea r17, ptr [rsp+rdx*2+0x17] +XDIS 1999e: MISC BASE D5488D4C5518 lea r17, ptr [rbp+rdx*2+0x18] +XDIS 199a4: MISC BASE D5488D4C5619 lea r17, ptr [rsi+rdx*2+0x19] +XDIS 199aa: MISC BASE D5488D4C571A lea r17, ptr [rdi+rdx*2+0x1a] +XDIS 199b0: MISC BASE D5498D4C501B lea r17, ptr [r8+rdx*2+0x1b] +XDIS 199b6: MISC BASE D5498D4C511C lea r17, ptr [r9+rdx*2+0x1c] +XDIS 199bc: MISC BASE D5498D4C521D lea r17, ptr [r10+rdx*2+0x1d] +XDIS 199c2: MISC BASE D5498D4C531E lea r17, ptr [r11+rdx*2+0x1e] +XDIS 199c8: MISC BASE D5498D4C541F lea r17, ptr [r12+rdx*2+0x1f] +XDIS 199ce: MISC BASE D5498D4C5520 lea r17, ptr [r13+rdx*2+0x20] +XDIS 199d4: MISC BASE D5498D4C5621 lea r17, ptr [r14+rdx*2+0x21] +XDIS 199da: MISC BASE D5498D4C5722 lea r17, ptr [r15+rdx*2+0x22] +XDIS 199e0: MISC BASE D5588D4C5023 lea r17, ptr [r16+rdx*2+0x23] +XDIS 199e6: MISC BASE D5588D4C5124 lea r17, ptr [r17+rdx*2+0x24] +XDIS 199ec: MISC BASE D5588D4C5225 lea r17, ptr [r18+rdx*2+0x25] +XDIS 199f2: MISC BASE D5588D4C5326 lea r17, ptr [r19+rdx*2+0x26] +XDIS 199f8: MISC BASE D5588D4C5427 lea r17, ptr [r20+rdx*2+0x27] +XDIS 199fe: MISC BASE D5588D4C5528 lea r17, ptr [r21+rdx*2+0x28] +XDIS 19a04: MISC BASE D5588D4C5629 lea r17, ptr [r22+rdx*2+0x29] +XDIS 19a0a: MISC BASE D5588D4C572A lea r17, ptr [r23+rdx*2+0x2a] +XDIS 19a10: MISC BASE D5598D4C502B lea r17, ptr [r24+rdx*2+0x2b] +XDIS 19a16: MISC BASE D5598D4C512C lea r17, ptr [r25+rdx*2+0x2c] +XDIS 19a1c: MISC BASE D5598D4C522D lea r17, ptr [r26+rdx*2+0x2d] +XDIS 19a22: MISC BASE D5598D4C532E lea r17, ptr [r27+rdx*2+0x2e] +XDIS 19a28: MISC BASE D5598D4C542F lea r17, ptr [r28+rdx*2+0x2f] +XDIS 19a2e: MISC BASE D5598D4C5530 lea r17, ptr [r29+rdx*2+0x30] +XDIS 19a34: MISC BASE D5598D4C5631 lea r17, ptr [r30+rdx*2+0x31] +XDIS 19a3a: MISC BASE D5598D4C5732 lea r17, ptr [r31+rdx*2+0x32] +XDIS 19a40: MISC BASE D5488D4C5814 lea r17, ptr [rax+rbx*2+0x14] +XDIS 19a46: MISC BASE D5488D4C5915 lea r17, ptr [rcx+rbx*2+0x15] +XDIS 19a4c: MISC BASE D5488D4C5A16 lea r17, ptr [rdx+rbx*2+0x16] +XDIS 19a52: MISC BASE D5488D4C5B17 lea r17, ptr [rbx+rbx*2+0x17] +XDIS 19a58: MISC BASE D5488D4C5C18 lea r17, ptr [rsp+rbx*2+0x18] +XDIS 19a5e: MISC BASE D5488D4C5D19 lea r17, ptr [rbp+rbx*2+0x19] +XDIS 19a64: MISC BASE D5488D4C5E1A lea r17, ptr [rsi+rbx*2+0x1a] +XDIS 19a6a: MISC BASE D5488D4C5F1B lea r17, ptr [rdi+rbx*2+0x1b] +XDIS 19a70: MISC BASE D5498D4C581C lea r17, ptr [r8+rbx*2+0x1c] +XDIS 19a76: MISC BASE D5498D4C591D lea r17, ptr [r9+rbx*2+0x1d] +XDIS 19a7c: MISC BASE D5498D4C5A1E lea r17, ptr [r10+rbx*2+0x1e] +XDIS 19a82: MISC BASE D5498D4C5B1F lea r17, ptr [r11+rbx*2+0x1f] +XDIS 19a88: MISC BASE D5498D4C5C20 lea r17, ptr [r12+rbx*2+0x20] +XDIS 19a8e: MISC BASE D5498D4C5D21 lea r17, ptr [r13+rbx*2+0x21] +XDIS 19a94: MISC BASE D5498D4C5E22 lea r17, ptr [r14+rbx*2+0x22] +XDIS 19a9a: MISC BASE D5498D4C5F23 lea r17, ptr [r15+rbx*2+0x23] +XDIS 19aa0: MISC BASE D5588D4C5824 lea r17, ptr [r16+rbx*2+0x24] +XDIS 19aa6: MISC BASE D5588D4C5925 lea r17, ptr [r17+rbx*2+0x25] +XDIS 19aac: MISC BASE D5588D4C5A26 lea r17, ptr [r18+rbx*2+0x26] +XDIS 19ab2: MISC BASE D5588D4C5B27 lea r17, ptr [r19+rbx*2+0x27] +XDIS 19ab8: MISC BASE D5588D4C5C28 lea r17, ptr [r20+rbx*2+0x28] +XDIS 19abe: MISC BASE D5588D4C5D29 lea r17, ptr [r21+rbx*2+0x29] +XDIS 19ac4: MISC BASE D5588D4C5E2A lea r17, ptr [r22+rbx*2+0x2a] +XDIS 19aca: MISC BASE D5588D4C5F2B lea r17, ptr [r23+rbx*2+0x2b] +XDIS 19ad0: MISC BASE D5598D4C582C lea r17, ptr [r24+rbx*2+0x2c] +XDIS 19ad6: MISC BASE D5598D4C592D lea r17, ptr [r25+rbx*2+0x2d] +XDIS 19adc: MISC BASE D5598D4C5A2E lea r17, ptr [r26+rbx*2+0x2e] +XDIS 19ae2: MISC BASE D5598D4C5B2F lea r17, ptr [r27+rbx*2+0x2f] +XDIS 19ae8: MISC BASE D5598D4C5C30 lea r17, ptr [r28+rbx*2+0x30] +XDIS 19aee: MISC BASE D5598D4C5D31 lea r17, ptr [r29+rbx*2+0x31] +XDIS 19af4: MISC BASE D5598D4C5E32 lea r17, ptr [r30+rbx*2+0x32] +XDIS 19afa: MISC BASE D5598D4C5F33 lea r17, ptr [r31+rbx*2+0x33] +XDIS 19b00: MISC BASE D5488D4C6015 lea r17, ptr [rax+0x15] +XDIS 19b06: MISC BASE D5488D4C6116 lea r17, ptr [rcx+0x16] +XDIS 19b0c: MISC BASE D5488D4C6217 lea r17, ptr [rdx+0x17] +XDIS 19b12: MISC BASE D5488D4C6318 lea r17, ptr [rbx+0x18] +XDIS 19b18: MISC BASE D5488D4C6419 lea r17, ptr [rsp+0x19] +XDIS 19b1e: MISC BASE D5488D4C651A lea r17, ptr [rbp+0x1a] +XDIS 19b24: MISC BASE D5488D4C661B lea r17, ptr [rsi+0x1b] +XDIS 19b2a: MISC BASE D5488D4C671C lea r17, ptr [rdi+0x1c] +XDIS 19b30: MISC BASE D5498D4C601D lea r17, ptr [r8+0x1d] +XDIS 19b36: MISC BASE D5498D4C611E lea r17, ptr [r9+0x1e] +XDIS 19b3c: MISC BASE D5498D4C621F lea r17, ptr [r10+0x1f] +XDIS 19b42: MISC BASE D5498D4C6320 lea r17, ptr [r11+0x20] +XDIS 19b48: MISC BASE D5498D4C6421 lea r17, ptr [r12+0x21] +XDIS 19b4e: MISC BASE D5498D4C6522 lea r17, ptr [r13+0x22] +XDIS 19b54: MISC BASE D5498D4C6623 lea r17, ptr [r14+0x23] +XDIS 19b5a: MISC BASE D5498D4C6724 lea r17, ptr [r15+0x24] +XDIS 19b60: MISC BASE D5588D4C6025 lea r17, ptr [r16+0x25] +XDIS 19b66: MISC BASE D5588D4C6126 lea r17, ptr [r17+0x26] +XDIS 19b6c: MISC BASE D5588D4C6227 lea r17, ptr [r18+0x27] +XDIS 19b72: MISC BASE D5588D4C6328 lea r17, ptr [r19+0x28] +XDIS 19b78: MISC BASE D5588D4C6429 lea r17, ptr [r20+0x29] +XDIS 19b7e: MISC BASE D5588D4C652A lea r17, ptr [r21+0x2a] +XDIS 19b84: MISC BASE D5588D4C662B lea r17, ptr [r22+0x2b] +XDIS 19b8a: MISC BASE D5588D4C672C lea r17, ptr [r23+0x2c] +XDIS 19b90: MISC BASE D5598D4C602D lea r17, ptr [r24+0x2d] +XDIS 19b96: MISC BASE D5598D4C612E lea r17, ptr [r25+0x2e] +XDIS 19b9c: MISC BASE D5598D4C622F lea r17, ptr [r26+0x2f] +XDIS 19ba2: MISC BASE D5598D4C6330 lea r17, ptr [r27+0x30] +XDIS 19ba8: MISC BASE D5598D4C6431 lea r17, ptr [r28+0x31] +XDIS 19bae: MISC BASE D5598D4C6532 lea r17, ptr [r29+0x32] +XDIS 19bb4: MISC BASE D5598D4C6633 lea r17, ptr [r30+0x33] +XDIS 19bba: MISC BASE D5598D4C6734 lea r17, ptr [r31+0x34] +XDIS 19bc0: MISC BASE D5488D4C6816 lea r17, ptr [rax+rbp*2+0x16] +XDIS 19bc6: MISC BASE D5488D4C6917 lea r17, ptr [rcx+rbp*2+0x17] +XDIS 19bcc: MISC BASE D5488D4C6A18 lea r17, ptr [rdx+rbp*2+0x18] +XDIS 19bd2: MISC BASE D5488D4C6B19 lea r17, ptr [rbx+rbp*2+0x19] +XDIS 19bd8: MISC BASE D5488D4C6C1A lea r17, ptr [rsp+rbp*2+0x1a] +XDIS 19bde: MISC BASE D5488D4C6D1B lea r17, ptr [rbp+rbp*2+0x1b] +XDIS 19be4: MISC BASE D5488D4C6E1C lea r17, ptr [rsi+rbp*2+0x1c] +XDIS 19bea: MISC BASE D5488D4C6F1D lea r17, ptr [rdi+rbp*2+0x1d] +XDIS 19bf0: MISC BASE D5498D4C681E lea r17, ptr [r8+rbp*2+0x1e] +XDIS 19bf6: MISC BASE D5498D4C691F lea r17, ptr [r9+rbp*2+0x1f] +XDIS 19bfc: MISC BASE D5498D4C6A20 lea r17, ptr [r10+rbp*2+0x20] +XDIS 19c02: MISC BASE D5498D4C6B21 lea r17, ptr [r11+rbp*2+0x21] +XDIS 19c08: MISC BASE D5498D4C6C22 lea r17, ptr [r12+rbp*2+0x22] +XDIS 19c0e: MISC BASE D5498D4C6D23 lea r17, ptr [r13+rbp*2+0x23] +XDIS 19c14: MISC BASE D5498D4C6E24 lea r17, ptr [r14+rbp*2+0x24] +XDIS 19c1a: MISC BASE D5498D4C6F25 lea r17, ptr [r15+rbp*2+0x25] +XDIS 19c20: MISC BASE D5588D4C6826 lea r17, ptr [r16+rbp*2+0x26] +XDIS 19c26: MISC BASE D5588D4C6927 lea r17, ptr [r17+rbp*2+0x27] +XDIS 19c2c: MISC BASE D5588D4C6A28 lea r17, ptr [r18+rbp*2+0x28] +XDIS 19c32: MISC BASE D5588D4C6B29 lea r17, ptr [r19+rbp*2+0x29] +XDIS 19c38: MISC BASE D5588D4C6C2A lea r17, ptr [r20+rbp*2+0x2a] +XDIS 19c3e: MISC BASE D5588D4C6D2B lea r17, ptr [r21+rbp*2+0x2b] +XDIS 19c44: MISC BASE D5588D4C6E2C lea r17, ptr [r22+rbp*2+0x2c] +XDIS 19c4a: MISC BASE D5588D4C6F2D lea r17, ptr [r23+rbp*2+0x2d] +XDIS 19c50: MISC BASE D5598D4C682E lea r17, ptr [r24+rbp*2+0x2e] +XDIS 19c56: MISC BASE D5598D4C692F lea r17, ptr [r25+rbp*2+0x2f] +XDIS 19c5c: MISC BASE D5598D4C6A30 lea r17, ptr [r26+rbp*2+0x30] +XDIS 19c62: MISC BASE D5598D4C6B31 lea r17, ptr [r27+rbp*2+0x31] +XDIS 19c68: MISC BASE D5598D4C6C32 lea r17, ptr [r28+rbp*2+0x32] +XDIS 19c6e: MISC BASE D5598D4C6D33 lea r17, ptr [r29+rbp*2+0x33] +XDIS 19c74: MISC BASE D5598D4C6E34 lea r17, ptr [r30+rbp*2+0x34] +XDIS 19c7a: MISC BASE D5598D4C6F35 lea r17, ptr [r31+rbp*2+0x35] +XDIS 19c80: MISC BASE D5488D4C7017 lea r17, ptr [rax+rsi*2+0x17] +XDIS 19c86: MISC BASE D5488D4C7118 lea r17, ptr [rcx+rsi*2+0x18] +XDIS 19c8c: MISC BASE D5488D4C7219 lea r17, ptr [rdx+rsi*2+0x19] +XDIS 19c92: MISC BASE D5488D4C731A lea r17, ptr [rbx+rsi*2+0x1a] +XDIS 19c98: MISC BASE D5488D4C741B lea r17, ptr [rsp+rsi*2+0x1b] +XDIS 19c9e: MISC BASE D5488D4C751C lea r17, ptr [rbp+rsi*2+0x1c] +XDIS 19ca4: MISC BASE D5488D4C761D lea r17, ptr [rsi+rsi*2+0x1d] +XDIS 19caa: MISC BASE D5488D4C771E lea r17, ptr [rdi+rsi*2+0x1e] +XDIS 19cb0: MISC BASE D5498D4C701F lea r17, ptr [r8+rsi*2+0x1f] +XDIS 19cb6: MISC BASE D5498D4C7120 lea r17, ptr [r9+rsi*2+0x20] +XDIS 19cbc: MISC BASE D5498D4C7221 lea r17, ptr [r10+rsi*2+0x21] +XDIS 19cc2: MISC BASE D5498D4C7322 lea r17, ptr [r11+rsi*2+0x22] +XDIS 19cc8: MISC BASE D5498D4C7423 lea r17, ptr [r12+rsi*2+0x23] +XDIS 19cce: MISC BASE D5498D4C7524 lea r17, ptr [r13+rsi*2+0x24] +XDIS 19cd4: MISC BASE D5498D4C7625 lea r17, ptr [r14+rsi*2+0x25] +XDIS 19cda: MISC BASE D5498D4C7726 lea r17, ptr [r15+rsi*2+0x26] +XDIS 19ce0: MISC BASE D5588D4C7027 lea r17, ptr [r16+rsi*2+0x27] +XDIS 19ce6: MISC BASE D5588D4C7128 lea r17, ptr [r17+rsi*2+0x28] +XDIS 19cec: MISC BASE D5588D4C7229 lea r17, ptr [r18+rsi*2+0x29] +XDIS 19cf2: MISC BASE D5588D4C732A lea r17, ptr [r19+rsi*2+0x2a] +XDIS 19cf8: MISC BASE D5588D4C742B lea r17, ptr [r20+rsi*2+0x2b] +XDIS 19cfe: MISC BASE D5588D4C752C lea r17, ptr [r21+rsi*2+0x2c] +XDIS 19d04: MISC BASE D5588D4C762D lea r17, ptr [r22+rsi*2+0x2d] +XDIS 19d0a: MISC BASE D5588D4C772E lea r17, ptr [r23+rsi*2+0x2e] +XDIS 19d10: MISC BASE D5598D4C702F lea r17, ptr [r24+rsi*2+0x2f] +XDIS 19d16: MISC BASE D5598D4C7130 lea r17, ptr [r25+rsi*2+0x30] +XDIS 19d1c: MISC BASE D5598D4C7231 lea r17, ptr [r26+rsi*2+0x31] +XDIS 19d22: MISC BASE D5598D4C7332 lea r17, ptr [r27+rsi*2+0x32] +XDIS 19d28: MISC BASE D5598D4C7433 lea r17, ptr [r28+rsi*2+0x33] +XDIS 19d2e: MISC BASE D5598D4C7534 lea r17, ptr [r29+rsi*2+0x34] +XDIS 19d34: MISC BASE D5598D4C7635 lea r17, ptr [r30+rsi*2+0x35] +XDIS 19d3a: MISC BASE D5598D4C7736 lea r17, ptr [r31+rsi*2+0x36] +XDIS 19d40: MISC BASE D5488D4C7818 lea r17, ptr [rax+rdi*2+0x18] +XDIS 19d46: MISC BASE D5488D4C7919 lea r17, ptr [rcx+rdi*2+0x19] +XDIS 19d4c: MISC BASE D5488D4C7A1A lea r17, ptr [rdx+rdi*2+0x1a] +XDIS 19d52: MISC BASE D5488D4C7B1B lea r17, ptr [rbx+rdi*2+0x1b] +XDIS 19d58: MISC BASE D5488D4C7C1C lea r17, ptr [rsp+rdi*2+0x1c] +XDIS 19d5e: MISC BASE D5488D4C7D1D lea r17, ptr [rbp+rdi*2+0x1d] +XDIS 19d64: MISC BASE D5488D4C7E1E lea r17, ptr [rsi+rdi*2+0x1e] +XDIS 19d6a: MISC BASE D5488D4C7F1F lea r17, ptr [rdi+rdi*2+0x1f] +XDIS 19d70: MISC BASE D5498D4C7820 lea r17, ptr [r8+rdi*2+0x20] +XDIS 19d76: MISC BASE D5498D4C7921 lea r17, ptr [r9+rdi*2+0x21] +XDIS 19d7c: MISC BASE D5498D4C7A22 lea r17, ptr [r10+rdi*2+0x22] +XDIS 19d82: MISC BASE D5498D4C7B23 lea r17, ptr [r11+rdi*2+0x23] +XDIS 19d88: MISC BASE D5498D4C7C24 lea r17, ptr [r12+rdi*2+0x24] +XDIS 19d8e: MISC BASE D5498D4C7D25 lea r17, ptr [r13+rdi*2+0x25] +XDIS 19d94: MISC BASE D5498D4C7E26 lea r17, ptr [r14+rdi*2+0x26] +XDIS 19d9a: MISC BASE D5498D4C7F27 lea r17, ptr [r15+rdi*2+0x27] +XDIS 19da0: MISC BASE D5588D4C7828 lea r17, ptr [r16+rdi*2+0x28] +XDIS 19da6: MISC BASE D5588D4C7929 lea r17, ptr [r17+rdi*2+0x29] +XDIS 19dac: MISC BASE D5588D4C7A2A lea r17, ptr [r18+rdi*2+0x2a] +XDIS 19db2: MISC BASE D5588D4C7B2B lea r17, ptr [r19+rdi*2+0x2b] +XDIS 19db8: MISC BASE D5588D4C7C2C lea r17, ptr [r20+rdi*2+0x2c] +XDIS 19dbe: MISC BASE D5588D4C7D2D lea r17, ptr [r21+rdi*2+0x2d] +XDIS 19dc4: MISC BASE D5588D4C7E2E lea r17, ptr [r22+rdi*2+0x2e] +XDIS 19dca: MISC BASE D5588D4C7F2F lea r17, ptr [r23+rdi*2+0x2f] +XDIS 19dd0: MISC BASE D5598D4C7830 lea r17, ptr [r24+rdi*2+0x30] +XDIS 19dd6: MISC BASE D5598D4C7931 lea r17, ptr [r25+rdi*2+0x31] +XDIS 19ddc: MISC BASE D5598D4C7A32 lea r17, ptr [r26+rdi*2+0x32] +XDIS 19de2: MISC BASE D5598D4C7B33 lea r17, ptr [r27+rdi*2+0x33] +XDIS 19de8: MISC BASE D5598D4C7C34 lea r17, ptr [r28+rdi*2+0x34] +XDIS 19dee: MISC BASE D5598D4C7D35 lea r17, ptr [r29+rdi*2+0x35] +XDIS 19df4: MISC BASE D5598D4C7E36 lea r17, ptr [r30+rdi*2+0x36] +XDIS 19dfa: MISC BASE D5598D4C7F37 lea r17, ptr [r31+rdi*2+0x37] +XDIS 19e00: MISC BASE D54A8D4C4019 lea r17, ptr [rax+r8*2+0x19] +XDIS 19e06: MISC BASE D54A8D4C411A lea r17, ptr [rcx+r8*2+0x1a] +XDIS 19e0c: MISC BASE D54A8D4C421B lea r17, ptr [rdx+r8*2+0x1b] +XDIS 19e12: MISC BASE D54A8D4C431C lea r17, ptr [rbx+r8*2+0x1c] +XDIS 19e18: MISC BASE D54A8D4C441D lea r17, ptr [rsp+r8*2+0x1d] +XDIS 19e1e: MISC BASE D54A8D4C451E lea r17, ptr [rbp+r8*2+0x1e] +XDIS 19e24: MISC BASE D54A8D4C461F lea r17, ptr [rsi+r8*2+0x1f] +XDIS 19e2a: MISC BASE D54A8D4C4720 lea r17, ptr [rdi+r8*2+0x20] +XDIS 19e30: MISC BASE D54B8D4C4021 lea r17, ptr [r8+r8*2+0x21] +XDIS 19e36: MISC BASE D54B8D4C4122 lea r17, ptr [r9+r8*2+0x22] +XDIS 19e3c: MISC BASE D54B8D4C4223 lea r17, ptr [r10+r8*2+0x23] +XDIS 19e42: MISC BASE D54B8D4C4324 lea r17, ptr [r11+r8*2+0x24] +XDIS 19e48: MISC BASE D54B8D4C4425 lea r17, ptr [r12+r8*2+0x25] +XDIS 19e4e: MISC BASE D54B8D4C4526 lea r17, ptr [r13+r8*2+0x26] +XDIS 19e54: MISC BASE D54B8D4C4627 lea r17, ptr [r14+r8*2+0x27] +XDIS 19e5a: MISC BASE D54B8D4C4728 lea r17, ptr [r15+r8*2+0x28] +XDIS 19e60: MISC BASE D55A8D4C4029 lea r17, ptr [r16+r8*2+0x29] +XDIS 19e66: MISC BASE D55A8D4C412A lea r17, ptr [r17+r8*2+0x2a] +XDIS 19e6c: MISC BASE D55A8D4C422B lea r17, ptr [r18+r8*2+0x2b] +XDIS 19e72: MISC BASE D55A8D4C432C lea r17, ptr [r19+r8*2+0x2c] +XDIS 19e78: MISC BASE D55A8D4C442D lea r17, ptr [r20+r8*2+0x2d] +XDIS 19e7e: MISC BASE D55A8D4C452E lea r17, ptr [r21+r8*2+0x2e] +XDIS 19e84: MISC BASE D55A8D4C462F lea r17, ptr [r22+r8*2+0x2f] +XDIS 19e8a: MISC BASE D55A8D4C4730 lea r17, ptr [r23+r8*2+0x30] +XDIS 19e90: MISC BASE D55B8D4C4031 lea r17, ptr [r24+r8*2+0x31] +XDIS 19e96: MISC BASE D55B8D4C4132 lea r17, ptr [r25+r8*2+0x32] +XDIS 19e9c: MISC BASE D55B8D4C4233 lea r17, ptr [r26+r8*2+0x33] +XDIS 19ea2: MISC BASE D55B8D4C4334 lea r17, ptr [r27+r8*2+0x34] +XDIS 19ea8: MISC BASE D55B8D4C4435 lea r17, ptr [r28+r8*2+0x35] +XDIS 19eae: MISC BASE D55B8D4C4536 lea r17, ptr [r29+r8*2+0x36] +XDIS 19eb4: MISC BASE D55B8D4C4637 lea r17, ptr [r30+r8*2+0x37] +XDIS 19eba: MISC BASE D55B8D4C4738 lea r17, ptr [r31+r8*2+0x38] +XDIS 19ec0: MISC BASE D54A8D4C481A lea r17, ptr [rax+r9*2+0x1a] +XDIS 19ec6: MISC BASE D54A8D4C491B lea r17, ptr [rcx+r9*2+0x1b] +XDIS 19ecc: MISC BASE D54A8D4C4A1C lea r17, ptr [rdx+r9*2+0x1c] +XDIS 19ed2: MISC BASE D54A8D4C4B1D lea r17, ptr [rbx+r9*2+0x1d] +XDIS 19ed8: MISC BASE D54A8D4C4C1E lea r17, ptr [rsp+r9*2+0x1e] +XDIS 19ede: MISC BASE D54A8D4C4D1F lea r17, ptr [rbp+r9*2+0x1f] +XDIS 19ee4: MISC BASE D54A8D4C4E20 lea r17, ptr [rsi+r9*2+0x20] +XDIS 19eea: MISC BASE D54A8D4C4F21 lea r17, ptr [rdi+r9*2+0x21] +XDIS 19ef0: MISC BASE D54B8D4C4822 lea r17, ptr [r8+r9*2+0x22] +XDIS 19ef6: MISC BASE D54B8D4C4923 lea r17, ptr [r9+r9*2+0x23] +XDIS 19efc: MISC BASE D54B8D4C4A24 lea r17, ptr [r10+r9*2+0x24] +XDIS 19f02: MISC BASE D54B8D4C4B25 lea r17, ptr [r11+r9*2+0x25] +XDIS 19f08: MISC BASE D54B8D4C4C26 lea r17, ptr [r12+r9*2+0x26] +XDIS 19f0e: MISC BASE D54B8D4C4D27 lea r17, ptr [r13+r9*2+0x27] +XDIS 19f14: MISC BASE D54B8D4C4E28 lea r17, ptr [r14+r9*2+0x28] +XDIS 19f1a: MISC BASE D54B8D4C4F29 lea r17, ptr [r15+r9*2+0x29] +XDIS 19f20: MISC BASE D55A8D4C482A lea r17, ptr [r16+r9*2+0x2a] +XDIS 19f26: MISC BASE D55A8D4C492B lea r17, ptr [r17+r9*2+0x2b] +XDIS 19f2c: MISC BASE D55A8D4C4A2C lea r17, ptr [r18+r9*2+0x2c] +XDIS 19f32: MISC BASE D55A8D4C4B2D lea r17, ptr [r19+r9*2+0x2d] +XDIS 19f38: MISC BASE D55A8D4C4C2E lea r17, ptr [r20+r9*2+0x2e] +XDIS 19f3e: MISC BASE D55A8D4C4D2F lea r17, ptr [r21+r9*2+0x2f] +XDIS 19f44: MISC BASE D55A8D4C4E30 lea r17, ptr [r22+r9*2+0x30] +XDIS 19f4a: MISC BASE D55A8D4C4F31 lea r17, ptr [r23+r9*2+0x31] +XDIS 19f50: MISC BASE D55B8D4C4832 lea r17, ptr [r24+r9*2+0x32] +XDIS 19f56: MISC BASE D55B8D4C4933 lea r17, ptr [r25+r9*2+0x33] +XDIS 19f5c: MISC BASE D55B8D4C4A34 lea r17, ptr [r26+r9*2+0x34] +XDIS 19f62: MISC BASE D55B8D4C4B35 lea r17, ptr [r27+r9*2+0x35] +XDIS 19f68: MISC BASE D55B8D4C4C36 lea r17, ptr [r28+r9*2+0x36] +XDIS 19f6e: MISC BASE D55B8D4C4D37 lea r17, ptr [r29+r9*2+0x37] +XDIS 19f74: MISC BASE D55B8D4C4E38 lea r17, ptr [r30+r9*2+0x38] +XDIS 19f7a: MISC BASE D55B8D4C4F39 lea r17, ptr [r31+r9*2+0x39] +XDIS 19f80: MISC BASE D54A8D4C501B lea r17, ptr [rax+r10*2+0x1b] +XDIS 19f86: MISC BASE D54A8D4C511C lea r17, ptr [rcx+r10*2+0x1c] +XDIS 19f8c: MISC BASE D54A8D4C521D lea r17, ptr [rdx+r10*2+0x1d] +XDIS 19f92: MISC BASE D54A8D4C531E lea r17, ptr [rbx+r10*2+0x1e] +XDIS 19f98: MISC BASE D54A8D4C541F lea r17, ptr [rsp+r10*2+0x1f] +XDIS 19f9e: MISC BASE D54A8D4C5520 lea r17, ptr [rbp+r10*2+0x20] +XDIS 19fa4: MISC BASE D54A8D4C5621 lea r17, ptr [rsi+r10*2+0x21] +XDIS 19faa: MISC BASE D54A8D4C5722 lea r17, ptr [rdi+r10*2+0x22] +XDIS 19fb0: MISC BASE D54B8D4C5023 lea r17, ptr [r8+r10*2+0x23] +XDIS 19fb6: MISC BASE D54B8D4C5124 lea r17, ptr [r9+r10*2+0x24] +XDIS 19fbc: MISC BASE D54B8D4C5225 lea r17, ptr [r10+r10*2+0x25] +XDIS 19fc2: MISC BASE D54B8D4C5326 lea r17, ptr [r11+r10*2+0x26] +XDIS 19fc8: MISC BASE D54B8D4C5427 lea r17, ptr [r12+r10*2+0x27] +XDIS 19fce: MISC BASE D54B8D4C5528 lea r17, ptr [r13+r10*2+0x28] +XDIS 19fd4: MISC BASE D54B8D4C5629 lea r17, ptr [r14+r10*2+0x29] +XDIS 19fda: MISC BASE D54B8D4C572A lea r17, ptr [r15+r10*2+0x2a] +XDIS 19fe0: MISC BASE D55A8D4C502B lea r17, ptr [r16+r10*2+0x2b] +XDIS 19fe6: MISC BASE D55A8D4C512C lea r17, ptr [r17+r10*2+0x2c] +XDIS 19fec: MISC BASE D55A8D4C522D lea r17, ptr [r18+r10*2+0x2d] +XDIS 19ff2: MISC BASE D55A8D4C532E lea r17, ptr [r19+r10*2+0x2e] +XDIS 19ff8: MISC BASE D55A8D4C542F lea r17, ptr [r20+r10*2+0x2f] +XDIS 19ffe: MISC BASE D55A8D4C5530 lea r17, ptr [r21+r10*2+0x30] +XDIS 1a004: MISC BASE D55A8D4C5631 lea r17, ptr [r22+r10*2+0x31] +XDIS 1a00a: MISC BASE D55A8D4C5732 lea r17, ptr [r23+r10*2+0x32] +XDIS 1a010: MISC BASE D55B8D4C5033 lea r17, ptr [r24+r10*2+0x33] +XDIS 1a016: MISC BASE D55B8D4C5134 lea r17, ptr [r25+r10*2+0x34] +XDIS 1a01c: MISC BASE D55B8D4C5235 lea r17, ptr [r26+r10*2+0x35] +XDIS 1a022: MISC BASE D55B8D4C5336 lea r17, ptr [r27+r10*2+0x36] +XDIS 1a028: MISC BASE D55B8D4C5437 lea r17, ptr [r28+r10*2+0x37] +XDIS 1a02e: MISC BASE D55B8D4C5538 lea r17, ptr [r29+r10*2+0x38] +XDIS 1a034: MISC BASE D55B8D4C5639 lea r17, ptr [r30+r10*2+0x39] +XDIS 1a03a: MISC BASE D55B8D4C573A lea r17, ptr [r31+r10*2+0x3a] +XDIS 1a040: MISC BASE D54A8D4C581C lea r17, ptr [rax+r11*2+0x1c] +XDIS 1a046: MISC BASE D54A8D4C591D lea r17, ptr [rcx+r11*2+0x1d] +XDIS 1a04c: MISC BASE D54A8D4C5A1E lea r17, ptr [rdx+r11*2+0x1e] +XDIS 1a052: MISC BASE D54A8D4C5B1F lea r17, ptr [rbx+r11*2+0x1f] +XDIS 1a058: MISC BASE D54A8D4C5C20 lea r17, ptr [rsp+r11*2+0x20] +XDIS 1a05e: MISC BASE D54A8D4C5D21 lea r17, ptr [rbp+r11*2+0x21] +XDIS 1a064: MISC BASE D54A8D4C5E22 lea r17, ptr [rsi+r11*2+0x22] +XDIS 1a06a: MISC BASE D54A8D4C5F23 lea r17, ptr [rdi+r11*2+0x23] +XDIS 1a070: MISC BASE D54B8D4C5824 lea r17, ptr [r8+r11*2+0x24] +XDIS 1a076: MISC BASE D54B8D4C5925 lea r17, ptr [r9+r11*2+0x25] +XDIS 1a07c: MISC BASE D54B8D4C5A26 lea r17, ptr [r10+r11*2+0x26] +XDIS 1a082: MISC BASE D54B8D4C5B27 lea r17, ptr [r11+r11*2+0x27] +XDIS 1a088: MISC BASE D54B8D4C5C28 lea r17, ptr [r12+r11*2+0x28] +XDIS 1a08e: MISC BASE D54B8D4C5D29 lea r17, ptr [r13+r11*2+0x29] +XDIS 1a094: MISC BASE D54B8D4C5E2A lea r17, ptr [r14+r11*2+0x2a] +XDIS 1a09a: MISC BASE D54B8D4C5F2B lea r17, ptr [r15+r11*2+0x2b] +XDIS 1a0a0: MISC BASE D55A8D4C582C lea r17, ptr [r16+r11*2+0x2c] +XDIS 1a0a6: MISC BASE D55A8D4C592D lea r17, ptr [r17+r11*2+0x2d] +XDIS 1a0ac: MISC BASE D55A8D4C5A2E lea r17, ptr [r18+r11*2+0x2e] +XDIS 1a0b2: MISC BASE D55A8D4C5B2F lea r17, ptr [r19+r11*2+0x2f] +XDIS 1a0b8: MISC BASE D55A8D4C5C30 lea r17, ptr [r20+r11*2+0x30] +XDIS 1a0be: MISC BASE D55A8D4C5D31 lea r17, ptr [r21+r11*2+0x31] +XDIS 1a0c4: MISC BASE D55A8D4C5E32 lea r17, ptr [r22+r11*2+0x32] +XDIS 1a0ca: MISC BASE D55A8D4C5F33 lea r17, ptr [r23+r11*2+0x33] +XDIS 1a0d0: MISC BASE D55B8D4C5834 lea r17, ptr [r24+r11*2+0x34] +XDIS 1a0d6: MISC BASE D55B8D4C5935 lea r17, ptr [r25+r11*2+0x35] +XDIS 1a0dc: MISC BASE D55B8D4C5A36 lea r17, ptr [r26+r11*2+0x36] +XDIS 1a0e2: MISC BASE D55B8D4C5B37 lea r17, ptr [r27+r11*2+0x37] +XDIS 1a0e8: MISC BASE D55B8D4C5C38 lea r17, ptr [r28+r11*2+0x38] +XDIS 1a0ee: MISC BASE D55B8D4C5D39 lea r17, ptr [r29+r11*2+0x39] +XDIS 1a0f4: MISC BASE D55B8D4C5E3A lea r17, ptr [r30+r11*2+0x3a] +XDIS 1a0fa: MISC BASE D55B8D4C5F3B lea r17, ptr [r31+r11*2+0x3b] +XDIS 1a100: MISC BASE D54A8D4C601D lea r17, ptr [rax+r12*2+0x1d] +XDIS 1a106: MISC BASE D54A8D4C611E lea r17, ptr [rcx+r12*2+0x1e] +XDIS 1a10c: MISC BASE D54A8D4C621F lea r17, ptr [rdx+r12*2+0x1f] +XDIS 1a112: MISC BASE D54A8D4C6320 lea r17, ptr [rbx+r12*2+0x20] +XDIS 1a118: MISC BASE D54A8D4C6421 lea r17, ptr [rsp+r12*2+0x21] +XDIS 1a11e: MISC BASE D54A8D4C6522 lea r17, ptr [rbp+r12*2+0x22] +XDIS 1a124: MISC BASE D54A8D4C6623 lea r17, ptr [rsi+r12*2+0x23] +XDIS 1a12a: MISC BASE D54A8D4C6724 lea r17, ptr [rdi+r12*2+0x24] +XDIS 1a130: MISC BASE D54B8D4C6025 lea r17, ptr [r8+r12*2+0x25] +XDIS 1a136: MISC BASE D54B8D4C6126 lea r17, ptr [r9+r12*2+0x26] +XDIS 1a13c: MISC BASE D54B8D4C6227 lea r17, ptr [r10+r12*2+0x27] +XDIS 1a142: MISC BASE D54B8D4C6328 lea r17, ptr [r11+r12*2+0x28] +XDIS 1a148: MISC BASE D54B8D4C6429 lea r17, ptr [r12+r12*2+0x29] +XDIS 1a14e: MISC BASE D54B8D4C652A lea r17, ptr [r13+r12*2+0x2a] +XDIS 1a154: MISC BASE D54B8D4C662B lea r17, ptr [r14+r12*2+0x2b] +XDIS 1a15a: MISC BASE D54B8D4C672C lea r17, ptr [r15+r12*2+0x2c] +XDIS 1a160: MISC BASE D55A8D4C602D lea r17, ptr [r16+r12*2+0x2d] +XDIS 1a166: MISC BASE D55A8D4C612E lea r17, ptr [r17+r12*2+0x2e] +XDIS 1a16c: MISC BASE D55A8D4C622F lea r17, ptr [r18+r12*2+0x2f] +XDIS 1a172: MISC BASE D55A8D4C6330 lea r17, ptr [r19+r12*2+0x30] +XDIS 1a178: MISC BASE D55A8D4C6431 lea r17, ptr [r20+r12*2+0x31] +XDIS 1a17e: MISC BASE D55A8D4C6532 lea r17, ptr [r21+r12*2+0x32] +XDIS 1a184: MISC BASE D55A8D4C6633 lea r17, ptr [r22+r12*2+0x33] +XDIS 1a18a: MISC BASE D55A8D4C6734 lea r17, ptr [r23+r12*2+0x34] +XDIS 1a190: MISC BASE D55B8D4C6035 lea r17, ptr [r24+r12*2+0x35] +XDIS 1a196: MISC BASE D55B8D4C6136 lea r17, ptr [r25+r12*2+0x36] +XDIS 1a19c: MISC BASE D55B8D4C6237 lea r17, ptr [r26+r12*2+0x37] +XDIS 1a1a2: MISC BASE D55B8D4C6338 lea r17, ptr [r27+r12*2+0x38] +XDIS 1a1a8: MISC BASE D55B8D4C6439 lea r17, ptr [r28+r12*2+0x39] +XDIS 1a1ae: MISC BASE D55B8D4C653A lea r17, ptr [r29+r12*2+0x3a] +XDIS 1a1b4: MISC BASE D55B8D4C663B lea r17, ptr [r30+r12*2+0x3b] +XDIS 1a1ba: MISC BASE D55B8D4C673C lea r17, ptr [r31+r12*2+0x3c] +XDIS 1a1c0: MISC BASE D54A8D4C681E lea r17, ptr [rax+r13*2+0x1e] +XDIS 1a1c6: MISC BASE D54A8D4C691F lea r17, ptr [rcx+r13*2+0x1f] +XDIS 1a1cc: MISC BASE D54A8D4C6A20 lea r17, ptr [rdx+r13*2+0x20] +XDIS 1a1d2: MISC BASE D54A8D4C6B21 lea r17, ptr [rbx+r13*2+0x21] +XDIS 1a1d8: MISC BASE D54A8D4C6C22 lea r17, ptr [rsp+r13*2+0x22] +XDIS 1a1de: MISC BASE D54A8D4C6D23 lea r17, ptr [rbp+r13*2+0x23] +XDIS 1a1e4: MISC BASE D54A8D4C6E24 lea r17, ptr [rsi+r13*2+0x24] +XDIS 1a1ea: MISC BASE D54A8D4C6F25 lea r17, ptr [rdi+r13*2+0x25] +XDIS 1a1f0: MISC BASE D54B8D4C6826 lea r17, ptr [r8+r13*2+0x26] +XDIS 1a1f6: MISC BASE D54B8D4C6927 lea r17, ptr [r9+r13*2+0x27] +XDIS 1a1fc: MISC BASE D54B8D4C6A28 lea r17, ptr [r10+r13*2+0x28] +XDIS 1a202: MISC BASE D54B8D4C6B29 lea r17, ptr [r11+r13*2+0x29] +XDIS 1a208: MISC BASE D54B8D4C6C2A lea r17, ptr [r12+r13*2+0x2a] +XDIS 1a20e: MISC BASE D54B8D4C6D2B lea r17, ptr [r13+r13*2+0x2b] +XDIS 1a214: MISC BASE D54B8D4C6E2C lea r17, ptr [r14+r13*2+0x2c] +XDIS 1a21a: MISC BASE D54B8D4C6F2D lea r17, ptr [r15+r13*2+0x2d] +XDIS 1a220: MISC BASE D55A8D4C682E lea r17, ptr [r16+r13*2+0x2e] +XDIS 1a226: MISC BASE D55A8D4C692F lea r17, ptr [r17+r13*2+0x2f] +XDIS 1a22c: MISC BASE D55A8D4C6A30 lea r17, ptr [r18+r13*2+0x30] +XDIS 1a232: MISC BASE D55A8D4C6B31 lea r17, ptr [r19+r13*2+0x31] +XDIS 1a238: MISC BASE D55A8D4C6C32 lea r17, ptr [r20+r13*2+0x32] +XDIS 1a23e: MISC BASE D55A8D4C6D33 lea r17, ptr [r21+r13*2+0x33] +XDIS 1a244: MISC BASE D55A8D4C6E34 lea r17, ptr [r22+r13*2+0x34] +XDIS 1a24a: MISC BASE D55A8D4C6F35 lea r17, ptr [r23+r13*2+0x35] +XDIS 1a250: MISC BASE D55B8D4C6836 lea r17, ptr [r24+r13*2+0x36] +XDIS 1a256: MISC BASE D55B8D4C6937 lea r17, ptr [r25+r13*2+0x37] +XDIS 1a25c: MISC BASE D55B8D4C6A38 lea r17, ptr [r26+r13*2+0x38] +XDIS 1a262: MISC BASE D55B8D4C6B39 lea r17, ptr [r27+r13*2+0x39] +XDIS 1a268: MISC BASE D55B8D4C6C3A lea r17, ptr [r28+r13*2+0x3a] +XDIS 1a26e: MISC BASE D55B8D4C6D3B lea r17, ptr [r29+r13*2+0x3b] +XDIS 1a274: MISC BASE D55B8D4C6E3C lea r17, ptr [r30+r13*2+0x3c] +XDIS 1a27a: MISC BASE D55B8D4C6F3D lea r17, ptr [r31+r13*2+0x3d] +XDIS 1a280: MISC BASE D54A8D4C701F lea r17, ptr [rax+r14*2+0x1f] +XDIS 1a286: MISC BASE D54A8D4C7120 lea r17, ptr [rcx+r14*2+0x20] +XDIS 1a28c: MISC BASE D54A8D4C7221 lea r17, ptr [rdx+r14*2+0x21] +XDIS 1a292: MISC BASE D54A8D4C7322 lea r17, ptr [rbx+r14*2+0x22] +XDIS 1a298: MISC BASE D54A8D4C7423 lea r17, ptr [rsp+r14*2+0x23] +XDIS 1a29e: MISC BASE D54A8D4C7524 lea r17, ptr [rbp+r14*2+0x24] +XDIS 1a2a4: MISC BASE D54A8D4C7625 lea r17, ptr [rsi+r14*2+0x25] +XDIS 1a2aa: MISC BASE D54A8D4C7726 lea r17, ptr [rdi+r14*2+0x26] +XDIS 1a2b0: MISC BASE D54B8D4C7027 lea r17, ptr [r8+r14*2+0x27] +XDIS 1a2b6: MISC BASE D54B8D4C7128 lea r17, ptr [r9+r14*2+0x28] +XDIS 1a2bc: MISC BASE D54B8D4C7229 lea r17, ptr [r10+r14*2+0x29] +XDIS 1a2c2: MISC BASE D54B8D4C732A lea r17, ptr [r11+r14*2+0x2a] +XDIS 1a2c8: MISC BASE D54B8D4C742B lea r17, ptr [r12+r14*2+0x2b] +XDIS 1a2ce: MISC BASE D54B8D4C752C lea r17, ptr [r13+r14*2+0x2c] +XDIS 1a2d4: MISC BASE D54B8D4C762D lea r17, ptr [r14+r14*2+0x2d] +XDIS 1a2da: MISC BASE D54B8D4C772E lea r17, ptr [r15+r14*2+0x2e] +XDIS 1a2e0: MISC BASE D55A8D4C702F lea r17, ptr [r16+r14*2+0x2f] +XDIS 1a2e6: MISC BASE D55A8D4C7130 lea r17, ptr [r17+r14*2+0x30] +XDIS 1a2ec: MISC BASE D55A8D4C7231 lea r17, ptr [r18+r14*2+0x31] +XDIS 1a2f2: MISC BASE D55A8D4C7332 lea r17, ptr [r19+r14*2+0x32] +XDIS 1a2f8: MISC BASE D55A8D4C7433 lea r17, ptr [r20+r14*2+0x33] +XDIS 1a2fe: MISC BASE D55A8D4C7534 lea r17, ptr [r21+r14*2+0x34] +XDIS 1a304: MISC BASE D55A8D4C7635 lea r17, ptr [r22+r14*2+0x35] +XDIS 1a30a: MISC BASE D55A8D4C7736 lea r17, ptr [r23+r14*2+0x36] +XDIS 1a310: MISC BASE D55B8D4C7037 lea r17, ptr [r24+r14*2+0x37] +XDIS 1a316: MISC BASE D55B8D4C7138 lea r17, ptr [r25+r14*2+0x38] +XDIS 1a31c: MISC BASE D55B8D4C7239 lea r17, ptr [r26+r14*2+0x39] +XDIS 1a322: MISC BASE D55B8D4C733A lea r17, ptr [r27+r14*2+0x3a] +XDIS 1a328: MISC BASE D55B8D4C743B lea r17, ptr [r28+r14*2+0x3b] +XDIS 1a32e: MISC BASE D55B8D4C753C lea r17, ptr [r29+r14*2+0x3c] +XDIS 1a334: MISC BASE D55B8D4C763D lea r17, ptr [r30+r14*2+0x3d] +XDIS 1a33a: MISC BASE D55B8D4C773E lea r17, ptr [r31+r14*2+0x3e] +XDIS 1a340: MISC BASE D54A8D4C7820 lea r17, ptr [rax+r15*2+0x20] +XDIS 1a346: MISC BASE D54A8D4C7921 lea r17, ptr [rcx+r15*2+0x21] +XDIS 1a34c: MISC BASE D54A8D4C7A22 lea r17, ptr [rdx+r15*2+0x22] +XDIS 1a352: MISC BASE D54A8D4C7B23 lea r17, ptr [rbx+r15*2+0x23] +XDIS 1a358: MISC BASE D54A8D4C7C24 lea r17, ptr [rsp+r15*2+0x24] +XDIS 1a35e: MISC BASE D54A8D4C7D25 lea r17, ptr [rbp+r15*2+0x25] +XDIS 1a364: MISC BASE D54A8D4C7E26 lea r17, ptr [rsi+r15*2+0x26] +XDIS 1a36a: MISC BASE D54A8D4C7F27 lea r17, ptr [rdi+r15*2+0x27] +XDIS 1a370: MISC BASE D54B8D4C7828 lea r17, ptr [r8+r15*2+0x28] +XDIS 1a376: MISC BASE D54B8D4C7929 lea r17, ptr [r9+r15*2+0x29] +XDIS 1a37c: MISC BASE D54B8D4C7A2A lea r17, ptr [r10+r15*2+0x2a] +XDIS 1a382: MISC BASE D54B8D4C7B2B lea r17, ptr [r11+r15*2+0x2b] +XDIS 1a388: MISC BASE D54B8D4C7C2C lea r17, ptr [r12+r15*2+0x2c] +XDIS 1a38e: MISC BASE D54B8D4C7D2D lea r17, ptr [r13+r15*2+0x2d] +XDIS 1a394: MISC BASE D54B8D4C7E2E lea r17, ptr [r14+r15*2+0x2e] +XDIS 1a39a: MISC BASE D54B8D4C7F2F lea r17, ptr [r15+r15*2+0x2f] +XDIS 1a3a0: MISC BASE D55A8D4C7830 lea r17, ptr [r16+r15*2+0x30] +XDIS 1a3a6: MISC BASE D55A8D4C7931 lea r17, ptr [r17+r15*2+0x31] +XDIS 1a3ac: MISC BASE D55A8D4C7A32 lea r17, ptr [r18+r15*2+0x32] +XDIS 1a3b2: MISC BASE D55A8D4C7B33 lea r17, ptr [r19+r15*2+0x33] +XDIS 1a3b8: MISC BASE D55A8D4C7C34 lea r17, ptr [r20+r15*2+0x34] +XDIS 1a3be: MISC BASE D55A8D4C7D35 lea r17, ptr [r21+r15*2+0x35] +XDIS 1a3c4: MISC BASE D55A8D4C7E36 lea r17, ptr [r22+r15*2+0x36] +XDIS 1a3ca: MISC BASE D55A8D4C7F37 lea r17, ptr [r23+r15*2+0x37] +XDIS 1a3d0: MISC BASE D55B8D4C7838 lea r17, ptr [r24+r15*2+0x38] +XDIS 1a3d6: MISC BASE D55B8D4C7939 lea r17, ptr [r25+r15*2+0x39] +XDIS 1a3dc: MISC BASE D55B8D4C7A3A lea r17, ptr [r26+r15*2+0x3a] +XDIS 1a3e2: MISC BASE D55B8D4C7B3B lea r17, ptr [r27+r15*2+0x3b] +XDIS 1a3e8: MISC BASE D55B8D4C7C3C lea r17, ptr [r28+r15*2+0x3c] +XDIS 1a3ee: MISC BASE D55B8D4C7D3D lea r17, ptr [r29+r15*2+0x3d] +XDIS 1a3f4: MISC BASE D55B8D4C7E3E lea r17, ptr [r30+r15*2+0x3e] +XDIS 1a3fa: MISC BASE D55B8D4C7F3F lea r17, ptr [r31+r15*2+0x3f] +XDIS 1a400: MISC BASE D5688D4C4021 lea r17, ptr [rax+r16*2+0x21] +XDIS 1a406: MISC BASE D5688D4C4122 lea r17, ptr [rcx+r16*2+0x22] +XDIS 1a40c: MISC BASE D5688D4C4223 lea r17, ptr [rdx+r16*2+0x23] +XDIS 1a412: MISC BASE D5688D4C4324 lea r17, ptr [rbx+r16*2+0x24] +XDIS 1a418: MISC BASE D5688D4C4425 lea r17, ptr [rsp+r16*2+0x25] +XDIS 1a41e: MISC BASE D5688D4C4526 lea r17, ptr [rbp+r16*2+0x26] +XDIS 1a424: MISC BASE D5688D4C4627 lea r17, ptr [rsi+r16*2+0x27] +XDIS 1a42a: MISC BASE D5688D4C4728 lea r17, ptr [rdi+r16*2+0x28] +XDIS 1a430: MISC BASE D5698D4C4029 lea r17, ptr [r8+r16*2+0x29] +XDIS 1a436: MISC BASE D5698D4C412A lea r17, ptr [r9+r16*2+0x2a] +XDIS 1a43c: MISC BASE D5698D4C422B lea r17, ptr [r10+r16*2+0x2b] +XDIS 1a442: MISC BASE D5698D4C432C lea r17, ptr [r11+r16*2+0x2c] +XDIS 1a448: MISC BASE D5698D4C442D lea r17, ptr [r12+r16*2+0x2d] +XDIS 1a44e: MISC BASE D5698D4C452E lea r17, ptr [r13+r16*2+0x2e] +XDIS 1a454: MISC BASE D5698D4C462F lea r17, ptr [r14+r16*2+0x2f] +XDIS 1a45a: MISC BASE D5698D4C4730 lea r17, ptr [r15+r16*2+0x30] +XDIS 1a460: MISC BASE D5788D4C4031 lea r17, ptr [r16+r16*2+0x31] +XDIS 1a466: MISC BASE D5788D4C4132 lea r17, ptr [r17+r16*2+0x32] +XDIS 1a46c: MISC BASE D5788D4C4233 lea r17, ptr [r18+r16*2+0x33] +XDIS 1a472: MISC BASE D5788D4C4334 lea r17, ptr [r19+r16*2+0x34] +XDIS 1a478: MISC BASE D5788D4C4435 lea r17, ptr [r20+r16*2+0x35] +XDIS 1a47e: MISC BASE D5788D4C4536 lea r17, ptr [r21+r16*2+0x36] +XDIS 1a484: MISC BASE D5788D4C4637 lea r17, ptr [r22+r16*2+0x37] +XDIS 1a48a: MISC BASE D5788D4C4738 lea r17, ptr [r23+r16*2+0x38] +XDIS 1a490: MISC BASE D5798D4C4039 lea r17, ptr [r24+r16*2+0x39] +XDIS 1a496: MISC BASE D5798D4C413A lea r17, ptr [r25+r16*2+0x3a] +XDIS 1a49c: MISC BASE D5798D4C423B lea r17, ptr [r26+r16*2+0x3b] +XDIS 1a4a2: MISC BASE D5798D4C433C lea r17, ptr [r27+r16*2+0x3c] +XDIS 1a4a8: MISC BASE D5798D4C443D lea r17, ptr [r28+r16*2+0x3d] +XDIS 1a4ae: MISC BASE D5798D4C453E lea r17, ptr [r29+r16*2+0x3e] +XDIS 1a4b4: MISC BASE D5798D4C463F lea r17, ptr [r30+r16*2+0x3f] +XDIS 1a4ba: MISC BASE D5798D4C4740 lea r17, ptr [r31+r16*2+0x40] +XDIS 1a4c0: MISC BASE D5688D4C4822 lea r17, ptr [rax+r17*2+0x22] +XDIS 1a4c6: MISC BASE D5688D4C4923 lea r17, ptr [rcx+r17*2+0x23] +XDIS 1a4cc: MISC BASE D5688D4C4A24 lea r17, ptr [rdx+r17*2+0x24] +XDIS 1a4d2: MISC BASE D5688D4C4B25 lea r17, ptr [rbx+r17*2+0x25] +XDIS 1a4d8: MISC BASE D5688D4C4C26 lea r17, ptr [rsp+r17*2+0x26] +XDIS 1a4de: MISC BASE D5688D4C4D27 lea r17, ptr [rbp+r17*2+0x27] +XDIS 1a4e4: MISC BASE D5688D4C4E28 lea r17, ptr [rsi+r17*2+0x28] +XDIS 1a4ea: MISC BASE D5688D4C4F29 lea r17, ptr [rdi+r17*2+0x29] +XDIS 1a4f0: MISC BASE D5698D4C482A lea r17, ptr [r8+r17*2+0x2a] +XDIS 1a4f6: MISC BASE D5698D4C492B lea r17, ptr [r9+r17*2+0x2b] +XDIS 1a4fc: MISC BASE D5698D4C4A2C lea r17, ptr [r10+r17*2+0x2c] +XDIS 1a502: MISC BASE D5698D4C4B2D lea r17, ptr [r11+r17*2+0x2d] +XDIS 1a508: MISC BASE D5698D4C4C2E lea r17, ptr [r12+r17*2+0x2e] +XDIS 1a50e: MISC BASE D5698D4C4D2F lea r17, ptr [r13+r17*2+0x2f] +XDIS 1a514: MISC BASE D5698D4C4E30 lea r17, ptr [r14+r17*2+0x30] +XDIS 1a51a: MISC BASE D5698D4C4F31 lea r17, ptr [r15+r17*2+0x31] +XDIS 1a520: MISC BASE D5788D4C4832 lea r17, ptr [r16+r17*2+0x32] +XDIS 1a526: MISC BASE D5788D4C4933 lea r17, ptr [r17+r17*2+0x33] +XDIS 1a52c: MISC BASE D5788D4C4A34 lea r17, ptr [r18+r17*2+0x34] +XDIS 1a532: MISC BASE D5788D4C4B35 lea r17, ptr [r19+r17*2+0x35] +XDIS 1a538: MISC BASE D5788D4C4C36 lea r17, ptr [r20+r17*2+0x36] +XDIS 1a53e: MISC BASE D5788D4C4D37 lea r17, ptr [r21+r17*2+0x37] +XDIS 1a544: MISC BASE D5788D4C4E38 lea r17, ptr [r22+r17*2+0x38] +XDIS 1a54a: MISC BASE D5788D4C4F39 lea r17, ptr [r23+r17*2+0x39] +XDIS 1a550: MISC BASE D5798D4C483A lea r17, ptr [r24+r17*2+0x3a] +XDIS 1a556: MISC BASE D5798D4C493B lea r17, ptr [r25+r17*2+0x3b] +XDIS 1a55c: MISC BASE D5798D4C4A3C lea r17, ptr [r26+r17*2+0x3c] +XDIS 1a562: MISC BASE D5798D4C4B3D lea r17, ptr [r27+r17*2+0x3d] +XDIS 1a568: MISC BASE D5798D4C4C3E lea r17, ptr [r28+r17*2+0x3e] +XDIS 1a56e: MISC BASE D5798D4C4D3F lea r17, ptr [r29+r17*2+0x3f] +XDIS 1a574: MISC BASE D5798D4C4E40 lea r17, ptr [r30+r17*2+0x40] +XDIS 1a57a: MISC BASE D5798D4C4F41 lea r17, ptr [r31+r17*2+0x41] +XDIS 1a580: MISC BASE D5688D4C5023 lea r17, ptr [rax+r18*2+0x23] +XDIS 1a586: MISC BASE D5688D4C5124 lea r17, ptr [rcx+r18*2+0x24] +XDIS 1a58c: MISC BASE D5688D4C5225 lea r17, ptr [rdx+r18*2+0x25] +XDIS 1a592: MISC BASE D5688D4C5326 lea r17, ptr [rbx+r18*2+0x26] +XDIS 1a598: MISC BASE D5688D4C5427 lea r17, ptr [rsp+r18*2+0x27] +XDIS 1a59e: MISC BASE D5688D4C5528 lea r17, ptr [rbp+r18*2+0x28] +XDIS 1a5a4: MISC BASE D5688D4C5629 lea r17, ptr [rsi+r18*2+0x29] +XDIS 1a5aa: MISC BASE D5688D4C572A lea r17, ptr [rdi+r18*2+0x2a] +XDIS 1a5b0: MISC BASE D5698D4C502B lea r17, ptr [r8+r18*2+0x2b] +XDIS 1a5b6: MISC BASE D5698D4C512C lea r17, ptr [r9+r18*2+0x2c] +XDIS 1a5bc: MISC BASE D5698D4C522D lea r17, ptr [r10+r18*2+0x2d] +XDIS 1a5c2: MISC BASE D5698D4C532E lea r17, ptr [r11+r18*2+0x2e] +XDIS 1a5c8: MISC BASE D5698D4C542F lea r17, ptr [r12+r18*2+0x2f] +XDIS 1a5ce: MISC BASE D5698D4C5530 lea r17, ptr [r13+r18*2+0x30] +XDIS 1a5d4: MISC BASE D5698D4C5631 lea r17, ptr [r14+r18*2+0x31] +XDIS 1a5da: MISC BASE D5698D4C5732 lea r17, ptr [r15+r18*2+0x32] +XDIS 1a5e0: MISC BASE D5788D4C5033 lea r17, ptr [r16+r18*2+0x33] +XDIS 1a5e6: MISC BASE D5788D4C5134 lea r17, ptr [r17+r18*2+0x34] +XDIS 1a5ec: MISC BASE D5788D4C5235 lea r17, ptr [r18+r18*2+0x35] +XDIS 1a5f2: MISC BASE D5788D4C5336 lea r17, ptr [r19+r18*2+0x36] +XDIS 1a5f8: MISC BASE D5788D4C5437 lea r17, ptr [r20+r18*2+0x37] +XDIS 1a5fe: MISC BASE D5788D4C5538 lea r17, ptr [r21+r18*2+0x38] +XDIS 1a604: MISC BASE D5788D4C5639 lea r17, ptr [r22+r18*2+0x39] +XDIS 1a60a: MISC BASE D5788D4C573A lea r17, ptr [r23+r18*2+0x3a] +XDIS 1a610: MISC BASE D5798D4C503B lea r17, ptr [r24+r18*2+0x3b] +XDIS 1a616: MISC BASE D5798D4C513C lea r17, ptr [r25+r18*2+0x3c] +XDIS 1a61c: MISC BASE D5798D4C523D lea r17, ptr [r26+r18*2+0x3d] +XDIS 1a622: MISC BASE D5798D4C533E lea r17, ptr [r27+r18*2+0x3e] +XDIS 1a628: MISC BASE D5798D4C543F lea r17, ptr [r28+r18*2+0x3f] +XDIS 1a62e: MISC BASE D5798D4C5540 lea r17, ptr [r29+r18*2+0x40] +XDIS 1a634: MISC BASE D5798D4C5641 lea r17, ptr [r30+r18*2+0x41] +XDIS 1a63a: MISC BASE D5798D4C5742 lea r17, ptr [r31+r18*2+0x42] +XDIS 1a640: MISC BASE D5688D4C5824 lea r17, ptr [rax+r19*2+0x24] +XDIS 1a646: MISC BASE D5688D4C5925 lea r17, ptr [rcx+r19*2+0x25] +XDIS 1a64c: MISC BASE D5688D4C5A26 lea r17, ptr [rdx+r19*2+0x26] +XDIS 1a652: MISC BASE D5688D4C5B27 lea r17, ptr [rbx+r19*2+0x27] +XDIS 1a658: MISC BASE D5688D4C5C28 lea r17, ptr [rsp+r19*2+0x28] +XDIS 1a65e: MISC BASE D5688D4C5D29 lea r17, ptr [rbp+r19*2+0x29] +XDIS 1a664: MISC BASE D5688D4C5E2A lea r17, ptr [rsi+r19*2+0x2a] +XDIS 1a66a: MISC BASE D5688D4C5F2B lea r17, ptr [rdi+r19*2+0x2b] +XDIS 1a670: MISC BASE D5698D4C582C lea r17, ptr [r8+r19*2+0x2c] +XDIS 1a676: MISC BASE D5698D4C592D lea r17, ptr [r9+r19*2+0x2d] +XDIS 1a67c: MISC BASE D5698D4C5A2E lea r17, ptr [r10+r19*2+0x2e] +XDIS 1a682: MISC BASE D5698D4C5B2F lea r17, ptr [r11+r19*2+0x2f] +XDIS 1a688: MISC BASE D5698D4C5C30 lea r17, ptr [r12+r19*2+0x30] +XDIS 1a68e: MISC BASE D5698D4C5D31 lea r17, ptr [r13+r19*2+0x31] +XDIS 1a694: MISC BASE D5698D4C5E32 lea r17, ptr [r14+r19*2+0x32] +XDIS 1a69a: MISC BASE D5698D4C5F33 lea r17, ptr [r15+r19*2+0x33] +XDIS 1a6a0: MISC BASE D5788D4C5834 lea r17, ptr [r16+r19*2+0x34] +XDIS 1a6a6: MISC BASE D5788D4C5935 lea r17, ptr [r17+r19*2+0x35] +XDIS 1a6ac: MISC BASE D5788D4C5A36 lea r17, ptr [r18+r19*2+0x36] +XDIS 1a6b2: MISC BASE D5788D4C5B37 lea r17, ptr [r19+r19*2+0x37] +XDIS 1a6b8: MISC BASE D5788D4C5C38 lea r17, ptr [r20+r19*2+0x38] +XDIS 1a6be: MISC BASE D5788D4C5D39 lea r17, ptr [r21+r19*2+0x39] +XDIS 1a6c4: MISC BASE D5788D4C5E3A lea r17, ptr [r22+r19*2+0x3a] +XDIS 1a6ca: MISC BASE D5788D4C5F3B lea r17, ptr [r23+r19*2+0x3b] +XDIS 1a6d0: MISC BASE D5798D4C583C lea r17, ptr [r24+r19*2+0x3c] +XDIS 1a6d6: MISC BASE D5798D4C593D lea r17, ptr [r25+r19*2+0x3d] +XDIS 1a6dc: MISC BASE D5798D4C5A3E lea r17, ptr [r26+r19*2+0x3e] +XDIS 1a6e2: MISC BASE D5798D4C5B3F lea r17, ptr [r27+r19*2+0x3f] +XDIS 1a6e8: MISC BASE D5798D4C5C40 lea r17, ptr [r28+r19*2+0x40] +XDIS 1a6ee: MISC BASE D5798D4C5D41 lea r17, ptr [r29+r19*2+0x41] +XDIS 1a6f4: MISC BASE D5798D4C5E42 lea r17, ptr [r30+r19*2+0x42] +XDIS 1a6fa: MISC BASE D5798D4C5F43 lea r17, ptr [r31+r19*2+0x43] +XDIS 1a700: MISC BASE D5688D4C6025 lea r17, ptr [rax+r20*2+0x25] +XDIS 1a706: MISC BASE D5688D4C6126 lea r17, ptr [rcx+r20*2+0x26] +XDIS 1a70c: MISC BASE D5688D4C6227 lea r17, ptr [rdx+r20*2+0x27] +XDIS 1a712: MISC BASE D5688D4C6328 lea r17, ptr [rbx+r20*2+0x28] +XDIS 1a718: MISC BASE D5688D4C6429 lea r17, ptr [rsp+r20*2+0x29] +XDIS 1a71e: MISC BASE D5688D4C652A lea r17, ptr [rbp+r20*2+0x2a] +XDIS 1a724: MISC BASE D5688D4C662B lea r17, ptr [rsi+r20*2+0x2b] +XDIS 1a72a: MISC BASE D5688D4C672C lea r17, ptr [rdi+r20*2+0x2c] +XDIS 1a730: MISC BASE D5698D4C602D lea r17, ptr [r8+r20*2+0x2d] +XDIS 1a736: MISC BASE D5698D4C612E lea r17, ptr [r9+r20*2+0x2e] +XDIS 1a73c: MISC BASE D5698D4C622F lea r17, ptr [r10+r20*2+0x2f] +XDIS 1a742: MISC BASE D5698D4C6330 lea r17, ptr [r11+r20*2+0x30] +XDIS 1a748: MISC BASE D5698D4C6431 lea r17, ptr [r12+r20*2+0x31] +XDIS 1a74e: MISC BASE D5698D4C6532 lea r17, ptr [r13+r20*2+0x32] +XDIS 1a754: MISC BASE D5698D4C6633 lea r17, ptr [r14+r20*2+0x33] +XDIS 1a75a: MISC BASE D5698D4C6734 lea r17, ptr [r15+r20*2+0x34] +XDIS 1a760: MISC BASE D5788D4C6035 lea r17, ptr [r16+r20*2+0x35] +XDIS 1a766: MISC BASE D5788D4C6136 lea r17, ptr [r17+r20*2+0x36] +XDIS 1a76c: MISC BASE D5788D4C6237 lea r17, ptr [r18+r20*2+0x37] +XDIS 1a772: MISC BASE D5788D4C6338 lea r17, ptr [r19+r20*2+0x38] +XDIS 1a778: MISC BASE D5788D4C6439 lea r17, ptr [r20+r20*2+0x39] +XDIS 1a77e: MISC BASE D5788D4C653A lea r17, ptr [r21+r20*2+0x3a] +XDIS 1a784: MISC BASE D5788D4C663B lea r17, ptr [r22+r20*2+0x3b] +XDIS 1a78a: MISC BASE D5788D4C673C lea r17, ptr [r23+r20*2+0x3c] +XDIS 1a790: MISC BASE D5798D4C603D lea r17, ptr [r24+r20*2+0x3d] +XDIS 1a796: MISC BASE D5798D4C613E lea r17, ptr [r25+r20*2+0x3e] +XDIS 1a79c: MISC BASE D5798D4C623F lea r17, ptr [r26+r20*2+0x3f] +XDIS 1a7a2: MISC BASE D5798D4C6340 lea r17, ptr [r27+r20*2+0x40] +XDIS 1a7a8: MISC BASE D5798D4C6441 lea r17, ptr [r28+r20*2+0x41] +XDIS 1a7ae: MISC BASE D5798D4C6542 lea r17, ptr [r29+r20*2+0x42] +XDIS 1a7b4: MISC BASE D5798D4C6643 lea r17, ptr [r30+r20*2+0x43] +XDIS 1a7ba: MISC BASE D5798D4C6744 lea r17, ptr [r31+r20*2+0x44] +XDIS 1a7c0: MISC BASE D5688D4C6826 lea r17, ptr [rax+r21*2+0x26] +XDIS 1a7c6: MISC BASE D5688D4C6927 lea r17, ptr [rcx+r21*2+0x27] +XDIS 1a7cc: MISC BASE D5688D4C6A28 lea r17, ptr [rdx+r21*2+0x28] +XDIS 1a7d2: MISC BASE D5688D4C6B29 lea r17, ptr [rbx+r21*2+0x29] +XDIS 1a7d8: MISC BASE D5688D4C6C2A lea r17, ptr [rsp+r21*2+0x2a] +XDIS 1a7de: MISC BASE D5688D4C6D2B lea r17, ptr [rbp+r21*2+0x2b] +XDIS 1a7e4: MISC BASE D5688D4C6E2C lea r17, ptr [rsi+r21*2+0x2c] +XDIS 1a7ea: MISC BASE D5688D4C6F2D lea r17, ptr [rdi+r21*2+0x2d] +XDIS 1a7f0: MISC BASE D5698D4C682E lea r17, ptr [r8+r21*2+0x2e] +XDIS 1a7f6: MISC BASE D5698D4C692F lea r17, ptr [r9+r21*2+0x2f] +XDIS 1a7fc: MISC BASE D5698D4C6A30 lea r17, ptr [r10+r21*2+0x30] +XDIS 1a802: MISC BASE D5698D4C6B31 lea r17, ptr [r11+r21*2+0x31] +XDIS 1a808: MISC BASE D5698D4C6C32 lea r17, ptr [r12+r21*2+0x32] +XDIS 1a80e: MISC BASE D5698D4C6D33 lea r17, ptr [r13+r21*2+0x33] +XDIS 1a814: MISC BASE D5698D4C6E34 lea r17, ptr [r14+r21*2+0x34] +XDIS 1a81a: MISC BASE D5698D4C6F35 lea r17, ptr [r15+r21*2+0x35] +XDIS 1a820: MISC BASE D5788D4C6836 lea r17, ptr [r16+r21*2+0x36] +XDIS 1a826: MISC BASE D5788D4C6937 lea r17, ptr [r17+r21*2+0x37] +XDIS 1a82c: MISC BASE D5788D4C6A38 lea r17, ptr [r18+r21*2+0x38] +XDIS 1a832: MISC BASE D5788D4C6B39 lea r17, ptr [r19+r21*2+0x39] +XDIS 1a838: MISC BASE D5788D4C6C3A lea r17, ptr [r20+r21*2+0x3a] +XDIS 1a83e: MISC BASE D5788D4C6D3B lea r17, ptr [r21+r21*2+0x3b] +XDIS 1a844: MISC BASE D5788D4C6E3C lea r17, ptr [r22+r21*2+0x3c] +XDIS 1a84a: MISC BASE D5788D4C6F3D lea r17, ptr [r23+r21*2+0x3d] +XDIS 1a850: MISC BASE D5798D4C683E lea r17, ptr [r24+r21*2+0x3e] +XDIS 1a856: MISC BASE D5798D4C693F lea r17, ptr [r25+r21*2+0x3f] +XDIS 1a85c: MISC BASE D5798D4C6A40 lea r17, ptr [r26+r21*2+0x40] +XDIS 1a862: MISC BASE D5798D4C6B41 lea r17, ptr [r27+r21*2+0x41] +XDIS 1a868: MISC BASE D5798D4C6C42 lea r17, ptr [r28+r21*2+0x42] +XDIS 1a86e: MISC BASE D5798D4C6D43 lea r17, ptr [r29+r21*2+0x43] +XDIS 1a874: MISC BASE D5798D4C6E44 lea r17, ptr [r30+r21*2+0x44] +XDIS 1a87a: MISC BASE D5798D4C6F45 lea r17, ptr [r31+r21*2+0x45] +XDIS 1a880: MISC BASE D5688D4C7027 lea r17, ptr [rax+r22*2+0x27] +XDIS 1a886: MISC BASE D5688D4C7128 lea r17, ptr [rcx+r22*2+0x28] +XDIS 1a88c: MISC BASE D5688D4C7229 lea r17, ptr [rdx+r22*2+0x29] +XDIS 1a892: MISC BASE D5688D4C732A lea r17, ptr [rbx+r22*2+0x2a] +XDIS 1a898: MISC BASE D5688D4C742B lea r17, ptr [rsp+r22*2+0x2b] +XDIS 1a89e: MISC BASE D5688D4C752C lea r17, ptr [rbp+r22*2+0x2c] +XDIS 1a8a4: MISC BASE D5688D4C762D lea r17, ptr [rsi+r22*2+0x2d] +XDIS 1a8aa: MISC BASE D5688D4C772E lea r17, ptr [rdi+r22*2+0x2e] +XDIS 1a8b0: MISC BASE D5698D4C702F lea r17, ptr [r8+r22*2+0x2f] +XDIS 1a8b6: MISC BASE D5698D4C7130 lea r17, ptr [r9+r22*2+0x30] +XDIS 1a8bc: MISC BASE D5698D4C7231 lea r17, ptr [r10+r22*2+0x31] +XDIS 1a8c2: MISC BASE D5698D4C7332 lea r17, ptr [r11+r22*2+0x32] +XDIS 1a8c8: MISC BASE D5698D4C7433 lea r17, ptr [r12+r22*2+0x33] +XDIS 1a8ce: MISC BASE D5698D4C7534 lea r17, ptr [r13+r22*2+0x34] +XDIS 1a8d4: MISC BASE D5698D4C7635 lea r17, ptr [r14+r22*2+0x35] +XDIS 1a8da: MISC BASE D5698D4C7736 lea r17, ptr [r15+r22*2+0x36] +XDIS 1a8e0: MISC BASE D5788D4C7037 lea r17, ptr [r16+r22*2+0x37] +XDIS 1a8e6: MISC BASE D5788D4C7138 lea r17, ptr [r17+r22*2+0x38] +XDIS 1a8ec: MISC BASE D5788D4C7239 lea r17, ptr [r18+r22*2+0x39] +XDIS 1a8f2: MISC BASE D5788D4C733A lea r17, ptr [r19+r22*2+0x3a] +XDIS 1a8f8: MISC BASE D5788D4C743B lea r17, ptr [r20+r22*2+0x3b] +XDIS 1a8fe: MISC BASE D5788D4C753C lea r17, ptr [r21+r22*2+0x3c] +XDIS 1a904: MISC BASE D5788D4C763D lea r17, ptr [r22+r22*2+0x3d] +XDIS 1a90a: MISC BASE D5788D4C773E lea r17, ptr [r23+r22*2+0x3e] +XDIS 1a910: MISC BASE D5798D4C703F lea r17, ptr [r24+r22*2+0x3f] +XDIS 1a916: MISC BASE D5798D4C7140 lea r17, ptr [r25+r22*2+0x40] +XDIS 1a91c: MISC BASE D5798D4C7241 lea r17, ptr [r26+r22*2+0x41] +XDIS 1a922: MISC BASE D5798D4C7342 lea r17, ptr [r27+r22*2+0x42] +XDIS 1a928: MISC BASE D5798D4C7443 lea r17, ptr [r28+r22*2+0x43] +XDIS 1a92e: MISC BASE D5798D4C7544 lea r17, ptr [r29+r22*2+0x44] +XDIS 1a934: MISC BASE D5798D4C7645 lea r17, ptr [r30+r22*2+0x45] +XDIS 1a93a: MISC BASE D5798D4C7746 lea r17, ptr [r31+r22*2+0x46] +XDIS 1a940: MISC BASE D5688D4C7828 lea r17, ptr [rax+r23*2+0x28] +XDIS 1a946: MISC BASE D5688D4C7929 lea r17, ptr [rcx+r23*2+0x29] +XDIS 1a94c: MISC BASE D5688D4C7A2A lea r17, ptr [rdx+r23*2+0x2a] +XDIS 1a952: MISC BASE D5688D4C7B2B lea r17, ptr [rbx+r23*2+0x2b] +XDIS 1a958: MISC BASE D5688D4C7C2C lea r17, ptr [rsp+r23*2+0x2c] +XDIS 1a95e: MISC BASE D5688D4C7D2D lea r17, ptr [rbp+r23*2+0x2d] +XDIS 1a964: MISC BASE D5688D4C7E2E lea r17, ptr [rsi+r23*2+0x2e] +XDIS 1a96a: MISC BASE D5688D4C7F2F lea r17, ptr [rdi+r23*2+0x2f] +XDIS 1a970: MISC BASE D5698D4C7830 lea r17, ptr [r8+r23*2+0x30] +XDIS 1a976: MISC BASE D5698D4C7931 lea r17, ptr [r9+r23*2+0x31] +XDIS 1a97c: MISC BASE D5698D4C7A32 lea r17, ptr [r10+r23*2+0x32] +XDIS 1a982: MISC BASE D5698D4C7B33 lea r17, ptr [r11+r23*2+0x33] +XDIS 1a988: MISC BASE D5698D4C7C34 lea r17, ptr [r12+r23*2+0x34] +XDIS 1a98e: MISC BASE D5698D4C7D35 lea r17, ptr [r13+r23*2+0x35] +XDIS 1a994: MISC BASE D5698D4C7E36 lea r17, ptr [r14+r23*2+0x36] +XDIS 1a99a: MISC BASE D5698D4C7F37 lea r17, ptr [r15+r23*2+0x37] +XDIS 1a9a0: MISC BASE D5788D4C7838 lea r17, ptr [r16+r23*2+0x38] +XDIS 1a9a6: MISC BASE D5788D4C7939 lea r17, ptr [r17+r23*2+0x39] +XDIS 1a9ac: MISC BASE D5788D4C7A3A lea r17, ptr [r18+r23*2+0x3a] +XDIS 1a9b2: MISC BASE D5788D4C7B3B lea r17, ptr [r19+r23*2+0x3b] +XDIS 1a9b8: MISC BASE D5788D4C7C3C lea r17, ptr [r20+r23*2+0x3c] +XDIS 1a9be: MISC BASE D5788D4C7D3D lea r17, ptr [r21+r23*2+0x3d] +XDIS 1a9c4: MISC BASE D5788D4C7E3E lea r17, ptr [r22+r23*2+0x3e] +XDIS 1a9ca: MISC BASE D5788D4C7F3F lea r17, ptr [r23+r23*2+0x3f] +XDIS 1a9d0: MISC BASE D5798D4C7840 lea r17, ptr [r24+r23*2+0x40] +XDIS 1a9d6: MISC BASE D5798D4C7941 lea r17, ptr [r25+r23*2+0x41] +XDIS 1a9dc: MISC BASE D5798D4C7A42 lea r17, ptr [r26+r23*2+0x42] +XDIS 1a9e2: MISC BASE D5798D4C7B43 lea r17, ptr [r27+r23*2+0x43] +XDIS 1a9e8: MISC BASE D5798D4C7C44 lea r17, ptr [r28+r23*2+0x44] +XDIS 1a9ee: MISC BASE D5798D4C7D45 lea r17, ptr [r29+r23*2+0x45] +XDIS 1a9f4: MISC BASE D5798D4C7E46 lea r17, ptr [r30+r23*2+0x46] +XDIS 1a9fa: MISC BASE D5798D4C7F47 lea r17, ptr [r31+r23*2+0x47] +XDIS 1aa00: MISC BASE D56A8D4C4029 lea r17, ptr [rax+r24*2+0x29] +XDIS 1aa06: MISC BASE D56A8D4C412A lea r17, ptr [rcx+r24*2+0x2a] +XDIS 1aa0c: MISC BASE D56A8D4C422B lea r17, ptr [rdx+r24*2+0x2b] +XDIS 1aa12: MISC BASE D56A8D4C432C lea r17, ptr [rbx+r24*2+0x2c] +XDIS 1aa18: MISC BASE D56A8D4C442D lea r17, ptr [rsp+r24*2+0x2d] +XDIS 1aa1e: MISC BASE D56A8D4C452E lea r17, ptr [rbp+r24*2+0x2e] +XDIS 1aa24: MISC BASE D56A8D4C462F lea r17, ptr [rsi+r24*2+0x2f] +XDIS 1aa2a: MISC BASE D56A8D4C4730 lea r17, ptr [rdi+r24*2+0x30] +XDIS 1aa30: MISC BASE D56B8D4C4031 lea r17, ptr [r8+r24*2+0x31] +XDIS 1aa36: MISC BASE D56B8D4C4132 lea r17, ptr [r9+r24*2+0x32] +XDIS 1aa3c: MISC BASE D56B8D4C4233 lea r17, ptr [r10+r24*2+0x33] +XDIS 1aa42: MISC BASE D56B8D4C4334 lea r17, ptr [r11+r24*2+0x34] +XDIS 1aa48: MISC BASE D56B8D4C4435 lea r17, ptr [r12+r24*2+0x35] +XDIS 1aa4e: MISC BASE D56B8D4C4536 lea r17, ptr [r13+r24*2+0x36] +XDIS 1aa54: MISC BASE D56B8D4C4637 lea r17, ptr [r14+r24*2+0x37] +XDIS 1aa5a: MISC BASE D56B8D4C4738 lea r17, ptr [r15+r24*2+0x38] +XDIS 1aa60: MISC BASE D57A8D4C4039 lea r17, ptr [r16+r24*2+0x39] +XDIS 1aa66: MISC BASE D57A8D4C413A lea r17, ptr [r17+r24*2+0x3a] +XDIS 1aa6c: MISC BASE D57A8D4C423B lea r17, ptr [r18+r24*2+0x3b] +XDIS 1aa72: MISC BASE D57A8D4C433C lea r17, ptr [r19+r24*2+0x3c] +XDIS 1aa78: MISC BASE D57A8D4C443D lea r17, ptr [r20+r24*2+0x3d] +XDIS 1aa7e: MISC BASE D57A8D4C453E lea r17, ptr [r21+r24*2+0x3e] +XDIS 1aa84: MISC BASE D57A8D4C463F lea r17, ptr [r22+r24*2+0x3f] +XDIS 1aa8a: MISC BASE D57A8D4C4740 lea r17, ptr [r23+r24*2+0x40] +XDIS 1aa90: MISC BASE D57B8D4C4041 lea r17, ptr [r24+r24*2+0x41] +XDIS 1aa96: MISC BASE D57B8D4C4142 lea r17, ptr [r25+r24*2+0x42] +XDIS 1aa9c: MISC BASE D57B8D4C4243 lea r17, ptr [r26+r24*2+0x43] +XDIS 1aaa2: MISC BASE D57B8D4C4344 lea r17, ptr [r27+r24*2+0x44] +XDIS 1aaa8: MISC BASE D57B8D4C4445 lea r17, ptr [r28+r24*2+0x45] +XDIS 1aaae: MISC BASE D57B8D4C4546 lea r17, ptr [r29+r24*2+0x46] +XDIS 1aab4: MISC BASE D57B8D4C4647 lea r17, ptr [r30+r24*2+0x47] +XDIS 1aaba: MISC BASE D57B8D4C4748 lea r17, ptr [r31+r24*2+0x48] +XDIS 1aac0: MISC BASE D56A8D4C482A lea r17, ptr [rax+r25*2+0x2a] +XDIS 1aac6: MISC BASE D56A8D4C492B lea r17, ptr [rcx+r25*2+0x2b] +XDIS 1aacc: MISC BASE D56A8D4C4A2C lea r17, ptr [rdx+r25*2+0x2c] +XDIS 1aad2: MISC BASE D56A8D4C4B2D lea r17, ptr [rbx+r25*2+0x2d] +XDIS 1aad8: MISC BASE D56A8D4C4C2E lea r17, ptr [rsp+r25*2+0x2e] +XDIS 1aade: MISC BASE D56A8D4C4D2F lea r17, ptr [rbp+r25*2+0x2f] +XDIS 1aae4: MISC BASE D56A8D4C4E30 lea r17, ptr [rsi+r25*2+0x30] +XDIS 1aaea: MISC BASE D56A8D4C4F31 lea r17, ptr [rdi+r25*2+0x31] +XDIS 1aaf0: MISC BASE D56B8D4C4832 lea r17, ptr [r8+r25*2+0x32] +XDIS 1aaf6: MISC BASE D56B8D4C4933 lea r17, ptr [r9+r25*2+0x33] +XDIS 1aafc: MISC BASE D56B8D4C4A34 lea r17, ptr [r10+r25*2+0x34] +XDIS 1ab02: MISC BASE D56B8D4C4B35 lea r17, ptr [r11+r25*2+0x35] +XDIS 1ab08: MISC BASE D56B8D4C4C36 lea r17, ptr [r12+r25*2+0x36] +XDIS 1ab0e: MISC BASE D56B8D4C4D37 lea r17, ptr [r13+r25*2+0x37] +XDIS 1ab14: MISC BASE D56B8D4C4E38 lea r17, ptr [r14+r25*2+0x38] +XDIS 1ab1a: MISC BASE D56B8D4C4F39 lea r17, ptr [r15+r25*2+0x39] +XDIS 1ab20: MISC BASE D57A8D4C483A lea r17, ptr [r16+r25*2+0x3a] +XDIS 1ab26: MISC BASE D57A8D4C493B lea r17, ptr [r17+r25*2+0x3b] +XDIS 1ab2c: MISC BASE D57A8D4C4A3C lea r17, ptr [r18+r25*2+0x3c] +XDIS 1ab32: MISC BASE D57A8D4C4B3D lea r17, ptr [r19+r25*2+0x3d] +XDIS 1ab38: MISC BASE D57A8D4C4C3E lea r17, ptr [r20+r25*2+0x3e] +XDIS 1ab3e: MISC BASE D57A8D4C4D3F lea r17, ptr [r21+r25*2+0x3f] +XDIS 1ab44: MISC BASE D57A8D4C4E40 lea r17, ptr [r22+r25*2+0x40] +XDIS 1ab4a: MISC BASE D57A8D4C4F41 lea r17, ptr [r23+r25*2+0x41] +XDIS 1ab50: MISC BASE D57B8D4C4842 lea r17, ptr [r24+r25*2+0x42] +XDIS 1ab56: MISC BASE D57B8D4C4943 lea r17, ptr [r25+r25*2+0x43] +XDIS 1ab5c: MISC BASE D57B8D4C4A44 lea r17, ptr [r26+r25*2+0x44] +XDIS 1ab62: MISC BASE D57B8D4C4B45 lea r17, ptr [r27+r25*2+0x45] +XDIS 1ab68: MISC BASE D57B8D4C4C46 lea r17, ptr [r28+r25*2+0x46] +XDIS 1ab6e: MISC BASE D57B8D4C4D47 lea r17, ptr [r29+r25*2+0x47] +XDIS 1ab74: MISC BASE D57B8D4C4E48 lea r17, ptr [r30+r25*2+0x48] +XDIS 1ab7a: MISC BASE D57B8D4C4F49 lea r17, ptr [r31+r25*2+0x49] +XDIS 1ab80: MISC BASE D56A8D4C502B lea r17, ptr [rax+r26*2+0x2b] +XDIS 1ab86: MISC BASE D56A8D4C512C lea r17, ptr [rcx+r26*2+0x2c] +XDIS 1ab8c: MISC BASE D56A8D4C522D lea r17, ptr [rdx+r26*2+0x2d] +XDIS 1ab92: MISC BASE D56A8D4C532E lea r17, ptr [rbx+r26*2+0x2e] +XDIS 1ab98: MISC BASE D56A8D4C542F lea r17, ptr [rsp+r26*2+0x2f] +XDIS 1ab9e: MISC BASE D56A8D4C5530 lea r17, ptr [rbp+r26*2+0x30] +XDIS 1aba4: MISC BASE D56A8D4C5631 lea r17, ptr [rsi+r26*2+0x31] +XDIS 1abaa: MISC BASE D56A8D4C5732 lea r17, ptr [rdi+r26*2+0x32] +XDIS 1abb0: MISC BASE D56B8D4C5033 lea r17, ptr [r8+r26*2+0x33] +XDIS 1abb6: MISC BASE D56B8D4C5134 lea r17, ptr [r9+r26*2+0x34] +XDIS 1abbc: MISC BASE D56B8D4C5235 lea r17, ptr [r10+r26*2+0x35] +XDIS 1abc2: MISC BASE D56B8D4C5336 lea r17, ptr [r11+r26*2+0x36] +XDIS 1abc8: MISC BASE D56B8D4C5437 lea r17, ptr [r12+r26*2+0x37] +XDIS 1abce: MISC BASE D56B8D4C5538 lea r17, ptr [r13+r26*2+0x38] +XDIS 1abd4: MISC BASE D56B8D4C5639 lea r17, ptr [r14+r26*2+0x39] +XDIS 1abda: MISC BASE D56B8D4C573A lea r17, ptr [r15+r26*2+0x3a] +XDIS 1abe0: MISC BASE D57A8D4C503B lea r17, ptr [r16+r26*2+0x3b] +XDIS 1abe6: MISC BASE D57A8D4C513C lea r17, ptr [r17+r26*2+0x3c] +XDIS 1abec: MISC BASE D57A8D4C523D lea r17, ptr [r18+r26*2+0x3d] +XDIS 1abf2: MISC BASE D57A8D4C533E lea r17, ptr [r19+r26*2+0x3e] +XDIS 1abf8: MISC BASE D57A8D4C543F lea r17, ptr [r20+r26*2+0x3f] +XDIS 1abfe: MISC BASE D57A8D4C5540 lea r17, ptr [r21+r26*2+0x40] +XDIS 1ac04: MISC BASE D57A8D4C5641 lea r17, ptr [r22+r26*2+0x41] +XDIS 1ac0a: MISC BASE D57A8D4C5742 lea r17, ptr [r23+r26*2+0x42] +XDIS 1ac10: MISC BASE D57B8D4C5043 lea r17, ptr [r24+r26*2+0x43] +XDIS 1ac16: MISC BASE D57B8D4C5144 lea r17, ptr [r25+r26*2+0x44] +XDIS 1ac1c: MISC BASE D57B8D4C5245 lea r17, ptr [r26+r26*2+0x45] +XDIS 1ac22: MISC BASE D57B8D4C5346 lea r17, ptr [r27+r26*2+0x46] +XDIS 1ac28: MISC BASE D57B8D4C5447 lea r17, ptr [r28+r26*2+0x47] +XDIS 1ac2e: MISC BASE D57B8D4C5548 lea r17, ptr [r29+r26*2+0x48] +XDIS 1ac34: MISC BASE D57B8D4C5649 lea r17, ptr [r30+r26*2+0x49] +XDIS 1ac3a: MISC BASE D57B8D4C574A lea r17, ptr [r31+r26*2+0x4a] +XDIS 1ac40: MISC BASE D56A8D4C582C lea r17, ptr [rax+r27*2+0x2c] +XDIS 1ac46: MISC BASE D56A8D4C592D lea r17, ptr [rcx+r27*2+0x2d] +XDIS 1ac4c: MISC BASE D56A8D4C5A2E lea r17, ptr [rdx+r27*2+0x2e] +XDIS 1ac52: MISC BASE D56A8D4C5B2F lea r17, ptr [rbx+r27*2+0x2f] +XDIS 1ac58: MISC BASE D56A8D4C5C30 lea r17, ptr [rsp+r27*2+0x30] +XDIS 1ac5e: MISC BASE D56A8D4C5D31 lea r17, ptr [rbp+r27*2+0x31] +XDIS 1ac64: MISC BASE D56A8D4C5E32 lea r17, ptr [rsi+r27*2+0x32] +XDIS 1ac6a: MISC BASE D56A8D4C5F33 lea r17, ptr [rdi+r27*2+0x33] +XDIS 1ac70: MISC BASE D56B8D4C5834 lea r17, ptr [r8+r27*2+0x34] +XDIS 1ac76: MISC BASE D56B8D4C5935 lea r17, ptr [r9+r27*2+0x35] +XDIS 1ac7c: MISC BASE D56B8D4C5A36 lea r17, ptr [r10+r27*2+0x36] +XDIS 1ac82: MISC BASE D56B8D4C5B37 lea r17, ptr [r11+r27*2+0x37] +XDIS 1ac88: MISC BASE D56B8D4C5C38 lea r17, ptr [r12+r27*2+0x38] +XDIS 1ac8e: MISC BASE D56B8D4C5D39 lea r17, ptr [r13+r27*2+0x39] +XDIS 1ac94: MISC BASE D56B8D4C5E3A lea r17, ptr [r14+r27*2+0x3a] +XDIS 1ac9a: MISC BASE D56B8D4C5F3B lea r17, ptr [r15+r27*2+0x3b] +XDIS 1aca0: MISC BASE D57A8D4C583C lea r17, ptr [r16+r27*2+0x3c] +XDIS 1aca6: MISC BASE D57A8D4C593D lea r17, ptr [r17+r27*2+0x3d] +XDIS 1acac: MISC BASE D57A8D4C5A3E lea r17, ptr [r18+r27*2+0x3e] +XDIS 1acb2: MISC BASE D57A8D4C5B3F lea r17, ptr [r19+r27*2+0x3f] +XDIS 1acb8: MISC BASE D57A8D4C5C40 lea r17, ptr [r20+r27*2+0x40] +XDIS 1acbe: MISC BASE D57A8D4C5D41 lea r17, ptr [r21+r27*2+0x41] +XDIS 1acc4: MISC BASE D57A8D4C5E42 lea r17, ptr [r22+r27*2+0x42] +XDIS 1acca: MISC BASE D57A8D4C5F43 lea r17, ptr [r23+r27*2+0x43] +XDIS 1acd0: MISC BASE D57B8D4C5844 lea r17, ptr [r24+r27*2+0x44] +XDIS 1acd6: MISC BASE D57B8D4C5945 lea r17, ptr [r25+r27*2+0x45] +XDIS 1acdc: MISC BASE D57B8D4C5A46 lea r17, ptr [r26+r27*2+0x46] +XDIS 1ace2: MISC BASE D57B8D4C5B47 lea r17, ptr [r27+r27*2+0x47] +XDIS 1ace8: MISC BASE D57B8D4C5C48 lea r17, ptr [r28+r27*2+0x48] +XDIS 1acee: MISC BASE D57B8D4C5D49 lea r17, ptr [r29+r27*2+0x49] +XDIS 1acf4: MISC BASE D57B8D4C5E4A lea r17, ptr [r30+r27*2+0x4a] +XDIS 1acfa: MISC BASE D57B8D4C5F4B lea r17, ptr [r31+r27*2+0x4b] +XDIS 1ad00: MISC BASE D56A8D4C602D lea r17, ptr [rax+r28*2+0x2d] +XDIS 1ad06: MISC BASE D56A8D4C612E lea r17, ptr [rcx+r28*2+0x2e] +XDIS 1ad0c: MISC BASE D56A8D4C622F lea r17, ptr [rdx+r28*2+0x2f] +XDIS 1ad12: MISC BASE D56A8D4C6330 lea r17, ptr [rbx+r28*2+0x30] +XDIS 1ad18: MISC BASE D56A8D4C6431 lea r17, ptr [rsp+r28*2+0x31] +XDIS 1ad1e: MISC BASE D56A8D4C6532 lea r17, ptr [rbp+r28*2+0x32] +XDIS 1ad24: MISC BASE D56A8D4C6633 lea r17, ptr [rsi+r28*2+0x33] +XDIS 1ad2a: MISC BASE D56A8D4C6734 lea r17, ptr [rdi+r28*2+0x34] +XDIS 1ad30: MISC BASE D56B8D4C6035 lea r17, ptr [r8+r28*2+0x35] +XDIS 1ad36: MISC BASE D56B8D4C6136 lea r17, ptr [r9+r28*2+0x36] +XDIS 1ad3c: MISC BASE D56B8D4C6237 lea r17, ptr [r10+r28*2+0x37] +XDIS 1ad42: MISC BASE D56B8D4C6338 lea r17, ptr [r11+r28*2+0x38] +XDIS 1ad48: MISC BASE D56B8D4C6439 lea r17, ptr [r12+r28*2+0x39] +XDIS 1ad4e: MISC BASE D56B8D4C653A lea r17, ptr [r13+r28*2+0x3a] +XDIS 1ad54: MISC BASE D56B8D4C663B lea r17, ptr [r14+r28*2+0x3b] +XDIS 1ad5a: MISC BASE D56B8D4C673C lea r17, ptr [r15+r28*2+0x3c] +XDIS 1ad60: MISC BASE D57A8D4C603D lea r17, ptr [r16+r28*2+0x3d] +XDIS 1ad66: MISC BASE D57A8D4C613E lea r17, ptr [r17+r28*2+0x3e] +XDIS 1ad6c: MISC BASE D57A8D4C623F lea r17, ptr [r18+r28*2+0x3f] +XDIS 1ad72: MISC BASE D57A8D4C6340 lea r17, ptr [r19+r28*2+0x40] +XDIS 1ad78: MISC BASE D57A8D4C6441 lea r17, ptr [r20+r28*2+0x41] +XDIS 1ad7e: MISC BASE D57A8D4C6542 lea r17, ptr [r21+r28*2+0x42] +XDIS 1ad84: MISC BASE D57A8D4C6643 lea r17, ptr [r22+r28*2+0x43] +XDIS 1ad8a: MISC BASE D57A8D4C6744 lea r17, ptr [r23+r28*2+0x44] +XDIS 1ad90: MISC BASE D57B8D4C6045 lea r17, ptr [r24+r28*2+0x45] +XDIS 1ad96: MISC BASE D57B8D4C6146 lea r17, ptr [r25+r28*2+0x46] +XDIS 1ad9c: MISC BASE D57B8D4C6247 lea r17, ptr [r26+r28*2+0x47] +XDIS 1ada2: MISC BASE D57B8D4C6348 lea r17, ptr [r27+r28*2+0x48] +XDIS 1ada8: MISC BASE D57B8D4C6449 lea r17, ptr [r28+r28*2+0x49] +XDIS 1adae: MISC BASE D57B8D4C654A lea r17, ptr [r29+r28*2+0x4a] +XDIS 1adb4: MISC BASE D57B8D4C664B lea r17, ptr [r30+r28*2+0x4b] +XDIS 1adba: MISC BASE D57B8D4C674C lea r17, ptr [r31+r28*2+0x4c] +XDIS 1adc0: MISC BASE D56A8D4C682E lea r17, ptr [rax+r29*2+0x2e] +XDIS 1adc6: MISC BASE D56A8D4C692F lea r17, ptr [rcx+r29*2+0x2f] +XDIS 1adcc: MISC BASE D56A8D4C6A30 lea r17, ptr [rdx+r29*2+0x30] +XDIS 1add2: MISC BASE D56A8D4C6B31 lea r17, ptr [rbx+r29*2+0x31] +XDIS 1add8: MISC BASE D56A8D4C6C32 lea r17, ptr [rsp+r29*2+0x32] +XDIS 1adde: MISC BASE D56A8D4C6D33 lea r17, ptr [rbp+r29*2+0x33] +XDIS 1ade4: MISC BASE D56A8D4C6E34 lea r17, ptr [rsi+r29*2+0x34] +XDIS 1adea: MISC BASE D56A8D4C6F35 lea r17, ptr [rdi+r29*2+0x35] +XDIS 1adf0: MISC BASE D56B8D4C6836 lea r17, ptr [r8+r29*2+0x36] +XDIS 1adf6: MISC BASE D56B8D4C6937 lea r17, ptr [r9+r29*2+0x37] +XDIS 1adfc: MISC BASE D56B8D4C6A38 lea r17, ptr [r10+r29*2+0x38] +XDIS 1ae02: MISC BASE D56B8D4C6B39 lea r17, ptr [r11+r29*2+0x39] +XDIS 1ae08: MISC BASE D56B8D4C6C3A lea r17, ptr [r12+r29*2+0x3a] +XDIS 1ae0e: MISC BASE D56B8D4C6D3B lea r17, ptr [r13+r29*2+0x3b] +XDIS 1ae14: MISC BASE D56B8D4C6E3C lea r17, ptr [r14+r29*2+0x3c] +XDIS 1ae1a: MISC BASE D56B8D4C6F3D lea r17, ptr [r15+r29*2+0x3d] +XDIS 1ae20: MISC BASE D57A8D4C683E lea r17, ptr [r16+r29*2+0x3e] +XDIS 1ae26: MISC BASE D57A8D4C693F lea r17, ptr [r17+r29*2+0x3f] +XDIS 1ae2c: MISC BASE D57A8D4C6A40 lea r17, ptr [r18+r29*2+0x40] +XDIS 1ae32: MISC BASE D57A8D4C6B41 lea r17, ptr [r19+r29*2+0x41] +XDIS 1ae38: MISC BASE D57A8D4C6C42 lea r17, ptr [r20+r29*2+0x42] +XDIS 1ae3e: MISC BASE D57A8D4C6D43 lea r17, ptr [r21+r29*2+0x43] +XDIS 1ae44: MISC BASE D57A8D4C6E44 lea r17, ptr [r22+r29*2+0x44] +XDIS 1ae4a: MISC BASE D57A8D4C6F45 lea r17, ptr [r23+r29*2+0x45] +XDIS 1ae50: MISC BASE D57B8D4C6846 lea r17, ptr [r24+r29*2+0x46] +XDIS 1ae56: MISC BASE D57B8D4C6947 lea r17, ptr [r25+r29*2+0x47] +XDIS 1ae5c: MISC BASE D57B8D4C6A48 lea r17, ptr [r26+r29*2+0x48] +XDIS 1ae62: MISC BASE D57B8D4C6B49 lea r17, ptr [r27+r29*2+0x49] +XDIS 1ae68: MISC BASE D57B8D4C6C4A lea r17, ptr [r28+r29*2+0x4a] +XDIS 1ae6e: MISC BASE D57B8D4C6D4B lea r17, ptr [r29+r29*2+0x4b] +XDIS 1ae74: MISC BASE D57B8D4C6E4C lea r17, ptr [r30+r29*2+0x4c] +XDIS 1ae7a: MISC BASE D57B8D4C6F4D lea r17, ptr [r31+r29*2+0x4d] +XDIS 1ae80: MISC BASE D56A8D4C702F lea r17, ptr [rax+r30*2+0x2f] +XDIS 1ae86: MISC BASE D56A8D4C7130 lea r17, ptr [rcx+r30*2+0x30] +XDIS 1ae8c: MISC BASE D56A8D4C7231 lea r17, ptr [rdx+r30*2+0x31] +XDIS 1ae92: MISC BASE D56A8D4C7332 lea r17, ptr [rbx+r30*2+0x32] +XDIS 1ae98: MISC BASE D56A8D4C7433 lea r17, ptr [rsp+r30*2+0x33] +XDIS 1ae9e: MISC BASE D56A8D4C7534 lea r17, ptr [rbp+r30*2+0x34] +XDIS 1aea4: MISC BASE D56A8D4C7635 lea r17, ptr [rsi+r30*2+0x35] +XDIS 1aeaa: MISC BASE D56A8D4C7736 lea r17, ptr [rdi+r30*2+0x36] +XDIS 1aeb0: MISC BASE D56B8D4C7037 lea r17, ptr [r8+r30*2+0x37] +XDIS 1aeb6: MISC BASE D56B8D4C7138 lea r17, ptr [r9+r30*2+0x38] +XDIS 1aebc: MISC BASE D56B8D4C7239 lea r17, ptr [r10+r30*2+0x39] +XDIS 1aec2: MISC BASE D56B8D4C733A lea r17, ptr [r11+r30*2+0x3a] +XDIS 1aec8: MISC BASE D56B8D4C743B lea r17, ptr [r12+r30*2+0x3b] +XDIS 1aece: MISC BASE D56B8D4C753C lea r17, ptr [r13+r30*2+0x3c] +XDIS 1aed4: MISC BASE D56B8D4C763D lea r17, ptr [r14+r30*2+0x3d] +XDIS 1aeda: MISC BASE D56B8D4C773E lea r17, ptr [r15+r30*2+0x3e] +XDIS 1aee0: MISC BASE D57A8D4C703F lea r17, ptr [r16+r30*2+0x3f] +XDIS 1aee6: MISC BASE D57A8D4C7140 lea r17, ptr [r17+r30*2+0x40] +XDIS 1aeec: MISC BASE D57A8D4C7241 lea r17, ptr [r18+r30*2+0x41] +XDIS 1aef2: MISC BASE D57A8D4C7342 lea r17, ptr [r19+r30*2+0x42] +XDIS 1aef8: MISC BASE D57A8D4C7443 lea r17, ptr [r20+r30*2+0x43] +XDIS 1aefe: MISC BASE D57A8D4C7544 lea r17, ptr [r21+r30*2+0x44] +XDIS 1af04: MISC BASE D57A8D4C7645 lea r17, ptr [r22+r30*2+0x45] +XDIS 1af0a: MISC BASE D57A8D4C7746 lea r17, ptr [r23+r30*2+0x46] +XDIS 1af10: MISC BASE D57B8D4C7047 lea r17, ptr [r24+r30*2+0x47] +XDIS 1af16: MISC BASE D57B8D4C7148 lea r17, ptr [r25+r30*2+0x48] +XDIS 1af1c: MISC BASE D57B8D4C7249 lea r17, ptr [r26+r30*2+0x49] +XDIS 1af22: MISC BASE D57B8D4C734A lea r17, ptr [r27+r30*2+0x4a] +XDIS 1af28: MISC BASE D57B8D4C744B lea r17, ptr [r28+r30*2+0x4b] +XDIS 1af2e: MISC BASE D57B8D4C754C lea r17, ptr [r29+r30*2+0x4c] +XDIS 1af34: MISC BASE D57B8D4C764D lea r17, ptr [r30+r30*2+0x4d] +XDIS 1af3a: MISC BASE D57B8D4C774E lea r17, ptr [r31+r30*2+0x4e] +XDIS 1af40: MISC BASE D56A8D4C7830 lea r17, ptr [rax+r31*2+0x30] +XDIS 1af46: MISC BASE D56A8D4C7931 lea r17, ptr [rcx+r31*2+0x31] +XDIS 1af4c: MISC BASE D56A8D4C7A32 lea r17, ptr [rdx+r31*2+0x32] +XDIS 1af52: MISC BASE D56A8D4C7B33 lea r17, ptr [rbx+r31*2+0x33] +XDIS 1af58: MISC BASE D56A8D4C7C34 lea r17, ptr [rsp+r31*2+0x34] +XDIS 1af5e: MISC BASE D56A8D4C7D35 lea r17, ptr [rbp+r31*2+0x35] +XDIS 1af64: MISC BASE D56A8D4C7E36 lea r17, ptr [rsi+r31*2+0x36] +XDIS 1af6a: MISC BASE D56A8D4C7F37 lea r17, ptr [rdi+r31*2+0x37] +XDIS 1af70: MISC BASE D56B8D4C7838 lea r17, ptr [r8+r31*2+0x38] +XDIS 1af76: MISC BASE D56B8D4C7939 lea r17, ptr [r9+r31*2+0x39] +XDIS 1af7c: MISC BASE D56B8D4C7A3A lea r17, ptr [r10+r31*2+0x3a] +XDIS 1af82: MISC BASE D56B8D4C7B3B lea r17, ptr [r11+r31*2+0x3b] +XDIS 1af88: MISC BASE D56B8D4C7C3C lea r17, ptr [r12+r31*2+0x3c] +XDIS 1af8e: MISC BASE D56B8D4C7D3D lea r17, ptr [r13+r31*2+0x3d] +XDIS 1af94: MISC BASE D56B8D4C7E3E lea r17, ptr [r14+r31*2+0x3e] +XDIS 1af9a: MISC BASE D56B8D4C7F3F lea r17, ptr [r15+r31*2+0x3f] +XDIS 1afa0: MISC BASE D57A8D4C7840 lea r17, ptr [r16+r31*2+0x40] +XDIS 1afa6: MISC BASE D57A8D4C7941 lea r17, ptr [r17+r31*2+0x41] +XDIS 1afac: MISC BASE D57A8D4C7A42 lea r17, ptr [r18+r31*2+0x42] +XDIS 1afb2: MISC BASE D57A8D4C7B43 lea r17, ptr [r19+r31*2+0x43] +XDIS 1afb8: MISC BASE D57A8D4C7C44 lea r17, ptr [r20+r31*2+0x44] +XDIS 1afbe: MISC BASE D57A8D4C7D45 lea r17, ptr [r21+r31*2+0x45] +XDIS 1afc4: MISC BASE D57A8D4C7E46 lea r17, ptr [r22+r31*2+0x46] +XDIS 1afca: MISC BASE D57A8D4C7F47 lea r17, ptr [r23+r31*2+0x47] +XDIS 1afd0: MISC BASE D57B8D4C7848 lea r17, ptr [r24+r31*2+0x48] +XDIS 1afd6: MISC BASE D57B8D4C7949 lea r17, ptr [r25+r31*2+0x49] +XDIS 1afdc: MISC BASE D57B8D4C7A4A lea r17, ptr [r26+r31*2+0x4a] +XDIS 1afe2: MISC BASE D57B8D4C7B4B lea r17, ptr [r27+r31*2+0x4b] +XDIS 1afe8: MISC BASE D57B8D4C7C4C lea r17, ptr [r28+r31*2+0x4c] +XDIS 1afee: MISC BASE D57B8D4C7D4D lea r17, ptr [r29+r31*2+0x4d] +XDIS 1aff4: MISC BASE D57B8D4C7E4E lea r17, ptr [r30+r31*2+0x4e] +XDIS 1affa: MISC BASE D57B8D4C7F4F lea r17, ptr [r31+r31*2+0x4f] +XDIS 1b000: MISC BASE D5488D544012 lea r18, ptr [rax+rax*2+0x12] +XDIS 1b006: MISC BASE D5488D544113 lea r18, ptr [rcx+rax*2+0x13] +XDIS 1b00c: MISC BASE D5488D544214 lea r18, ptr [rdx+rax*2+0x14] +XDIS 1b012: MISC BASE D5488D544315 lea r18, ptr [rbx+rax*2+0x15] +XDIS 1b018: MISC BASE D5488D544416 lea r18, ptr [rsp+rax*2+0x16] +XDIS 1b01e: MISC BASE D5488D544517 lea r18, ptr [rbp+rax*2+0x17] +XDIS 1b024: MISC BASE D5488D544618 lea r18, ptr [rsi+rax*2+0x18] +XDIS 1b02a: MISC BASE D5488D544719 lea r18, ptr [rdi+rax*2+0x19] +XDIS 1b030: MISC BASE D5498D54401A lea r18, ptr [r8+rax*2+0x1a] +XDIS 1b036: MISC BASE D5498D54411B lea r18, ptr [r9+rax*2+0x1b] +XDIS 1b03c: MISC BASE D5498D54421C lea r18, ptr [r10+rax*2+0x1c] +XDIS 1b042: MISC BASE D5498D54431D lea r18, ptr [r11+rax*2+0x1d] +XDIS 1b048: MISC BASE D5498D54441E lea r18, ptr [r12+rax*2+0x1e] +XDIS 1b04e: MISC BASE D5498D54451F lea r18, ptr [r13+rax*2+0x1f] +XDIS 1b054: MISC BASE D5498D544620 lea r18, ptr [r14+rax*2+0x20] +XDIS 1b05a: MISC BASE D5498D544721 lea r18, ptr [r15+rax*2+0x21] +XDIS 1b060: MISC BASE D5588D544022 lea r18, ptr [r16+rax*2+0x22] +XDIS 1b066: MISC BASE D5588D544123 lea r18, ptr [r17+rax*2+0x23] +XDIS 1b06c: MISC BASE D5588D544224 lea r18, ptr [r18+rax*2+0x24] +XDIS 1b072: MISC BASE D5588D544325 lea r18, ptr [r19+rax*2+0x25] +XDIS 1b078: MISC BASE D5588D544426 lea r18, ptr [r20+rax*2+0x26] +XDIS 1b07e: MISC BASE D5588D544527 lea r18, ptr [r21+rax*2+0x27] +XDIS 1b084: MISC BASE D5588D544628 lea r18, ptr [r22+rax*2+0x28] +XDIS 1b08a: MISC BASE D5588D544729 lea r18, ptr [r23+rax*2+0x29] +XDIS 1b090: MISC BASE D5598D54402A lea r18, ptr [r24+rax*2+0x2a] +XDIS 1b096: MISC BASE D5598D54412B lea r18, ptr [r25+rax*2+0x2b] +XDIS 1b09c: MISC BASE D5598D54422C lea r18, ptr [r26+rax*2+0x2c] +XDIS 1b0a2: MISC BASE D5598D54432D lea r18, ptr [r27+rax*2+0x2d] +XDIS 1b0a8: MISC BASE D5598D54442E lea r18, ptr [r28+rax*2+0x2e] +XDIS 1b0ae: MISC BASE D5598D54452F lea r18, ptr [r29+rax*2+0x2f] +XDIS 1b0b4: MISC BASE D5598D544630 lea r18, ptr [r30+rax*2+0x30] +XDIS 1b0ba: MISC BASE D5598D544731 lea r18, ptr [r31+rax*2+0x31] +XDIS 1b0c0: MISC BASE D5488D544813 lea r18, ptr [rax+rcx*2+0x13] +XDIS 1b0c6: MISC BASE D5488D544914 lea r18, ptr [rcx+rcx*2+0x14] +XDIS 1b0cc: MISC BASE D5488D544A15 lea r18, ptr [rdx+rcx*2+0x15] +XDIS 1b0d2: MISC BASE D5488D544B16 lea r18, ptr [rbx+rcx*2+0x16] +XDIS 1b0d8: MISC BASE D5488D544C17 lea r18, ptr [rsp+rcx*2+0x17] +XDIS 1b0de: MISC BASE D5488D544D18 lea r18, ptr [rbp+rcx*2+0x18] +XDIS 1b0e4: MISC BASE D5488D544E19 lea r18, ptr [rsi+rcx*2+0x19] +XDIS 1b0ea: MISC BASE D5488D544F1A lea r18, ptr [rdi+rcx*2+0x1a] +XDIS 1b0f0: MISC BASE D5498D54481B lea r18, ptr [r8+rcx*2+0x1b] +XDIS 1b0f6: MISC BASE D5498D54491C lea r18, ptr [r9+rcx*2+0x1c] +XDIS 1b0fc: MISC BASE D5498D544A1D lea r18, ptr [r10+rcx*2+0x1d] +XDIS 1b102: MISC BASE D5498D544B1E lea r18, ptr [r11+rcx*2+0x1e] +XDIS 1b108: MISC BASE D5498D544C1F lea r18, ptr [r12+rcx*2+0x1f] +XDIS 1b10e: MISC BASE D5498D544D20 lea r18, ptr [r13+rcx*2+0x20] +XDIS 1b114: MISC BASE D5498D544E21 lea r18, ptr [r14+rcx*2+0x21] +XDIS 1b11a: MISC BASE D5498D544F22 lea r18, ptr [r15+rcx*2+0x22] +XDIS 1b120: MISC BASE D5588D544823 lea r18, ptr [r16+rcx*2+0x23] +XDIS 1b126: MISC BASE D5588D544924 lea r18, ptr [r17+rcx*2+0x24] +XDIS 1b12c: MISC BASE D5588D544A25 lea r18, ptr [r18+rcx*2+0x25] +XDIS 1b132: MISC BASE D5588D544B26 lea r18, ptr [r19+rcx*2+0x26] +XDIS 1b138: MISC BASE D5588D544C27 lea r18, ptr [r20+rcx*2+0x27] +XDIS 1b13e: MISC BASE D5588D544D28 lea r18, ptr [r21+rcx*2+0x28] +XDIS 1b144: MISC BASE D5588D544E29 lea r18, ptr [r22+rcx*2+0x29] +XDIS 1b14a: MISC BASE D5588D544F2A lea r18, ptr [r23+rcx*2+0x2a] +XDIS 1b150: MISC BASE D5598D54482B lea r18, ptr [r24+rcx*2+0x2b] +XDIS 1b156: MISC BASE D5598D54492C lea r18, ptr [r25+rcx*2+0x2c] +XDIS 1b15c: MISC BASE D5598D544A2D lea r18, ptr [r26+rcx*2+0x2d] +XDIS 1b162: MISC BASE D5598D544B2E lea r18, ptr [r27+rcx*2+0x2e] +XDIS 1b168: MISC BASE D5598D544C2F lea r18, ptr [r28+rcx*2+0x2f] +XDIS 1b16e: MISC BASE D5598D544D30 lea r18, ptr [r29+rcx*2+0x30] +XDIS 1b174: MISC BASE D5598D544E31 lea r18, ptr [r30+rcx*2+0x31] +XDIS 1b17a: MISC BASE D5598D544F32 lea r18, ptr [r31+rcx*2+0x32] +XDIS 1b180: MISC BASE D5488D545014 lea r18, ptr [rax+rdx*2+0x14] +XDIS 1b186: MISC BASE D5488D545115 lea r18, ptr [rcx+rdx*2+0x15] +XDIS 1b18c: MISC BASE D5488D545216 lea r18, ptr [rdx+rdx*2+0x16] +XDIS 1b192: MISC BASE D5488D545317 lea r18, ptr [rbx+rdx*2+0x17] +XDIS 1b198: MISC BASE D5488D545418 lea r18, ptr [rsp+rdx*2+0x18] +XDIS 1b19e: MISC BASE D5488D545519 lea r18, ptr [rbp+rdx*2+0x19] +XDIS 1b1a4: MISC BASE D5488D54561A lea r18, ptr [rsi+rdx*2+0x1a] +XDIS 1b1aa: MISC BASE D5488D54571B lea r18, ptr [rdi+rdx*2+0x1b] +XDIS 1b1b0: MISC BASE D5498D54501C lea r18, ptr [r8+rdx*2+0x1c] +XDIS 1b1b6: MISC BASE D5498D54511D lea r18, ptr [r9+rdx*2+0x1d] +XDIS 1b1bc: MISC BASE D5498D54521E lea r18, ptr [r10+rdx*2+0x1e] +XDIS 1b1c2: MISC BASE D5498D54531F lea r18, ptr [r11+rdx*2+0x1f] +XDIS 1b1c8: MISC BASE D5498D545420 lea r18, ptr [r12+rdx*2+0x20] +XDIS 1b1ce: MISC BASE D5498D545521 lea r18, ptr [r13+rdx*2+0x21] +XDIS 1b1d4: MISC BASE D5498D545622 lea r18, ptr [r14+rdx*2+0x22] +XDIS 1b1da: MISC BASE D5498D545723 lea r18, ptr [r15+rdx*2+0x23] +XDIS 1b1e0: MISC BASE D5588D545024 lea r18, ptr [r16+rdx*2+0x24] +XDIS 1b1e6: MISC BASE D5588D545125 lea r18, ptr [r17+rdx*2+0x25] +XDIS 1b1ec: MISC BASE D5588D545226 lea r18, ptr [r18+rdx*2+0x26] +XDIS 1b1f2: MISC BASE D5588D545327 lea r18, ptr [r19+rdx*2+0x27] +XDIS 1b1f8: MISC BASE D5588D545428 lea r18, ptr [r20+rdx*2+0x28] +XDIS 1b1fe: MISC BASE D5588D545529 lea r18, ptr [r21+rdx*2+0x29] +XDIS 1b204: MISC BASE D5588D54562A lea r18, ptr [r22+rdx*2+0x2a] +XDIS 1b20a: MISC BASE D5588D54572B lea r18, ptr [r23+rdx*2+0x2b] +XDIS 1b210: MISC BASE D5598D54502C lea r18, ptr [r24+rdx*2+0x2c] +XDIS 1b216: MISC BASE D5598D54512D lea r18, ptr [r25+rdx*2+0x2d] +XDIS 1b21c: MISC BASE D5598D54522E lea r18, ptr [r26+rdx*2+0x2e] +XDIS 1b222: MISC BASE D5598D54532F lea r18, ptr [r27+rdx*2+0x2f] +XDIS 1b228: MISC BASE D5598D545430 lea r18, ptr [r28+rdx*2+0x30] +XDIS 1b22e: MISC BASE D5598D545531 lea r18, ptr [r29+rdx*2+0x31] +XDIS 1b234: MISC BASE D5598D545632 lea r18, ptr [r30+rdx*2+0x32] +XDIS 1b23a: MISC BASE D5598D545733 lea r18, ptr [r31+rdx*2+0x33] +XDIS 1b240: MISC BASE D5488D545815 lea r18, ptr [rax+rbx*2+0x15] +XDIS 1b246: MISC BASE D5488D545916 lea r18, ptr [rcx+rbx*2+0x16] +XDIS 1b24c: MISC BASE D5488D545A17 lea r18, ptr [rdx+rbx*2+0x17] +XDIS 1b252: MISC BASE D5488D545B18 lea r18, ptr [rbx+rbx*2+0x18] +XDIS 1b258: MISC BASE D5488D545C19 lea r18, ptr [rsp+rbx*2+0x19] +XDIS 1b25e: MISC BASE D5488D545D1A lea r18, ptr [rbp+rbx*2+0x1a] +XDIS 1b264: MISC BASE D5488D545E1B lea r18, ptr [rsi+rbx*2+0x1b] +XDIS 1b26a: MISC BASE D5488D545F1C lea r18, ptr [rdi+rbx*2+0x1c] +XDIS 1b270: MISC BASE D5498D54581D lea r18, ptr [r8+rbx*2+0x1d] +XDIS 1b276: MISC BASE D5498D54591E lea r18, ptr [r9+rbx*2+0x1e] +XDIS 1b27c: MISC BASE D5498D545A1F lea r18, ptr [r10+rbx*2+0x1f] +XDIS 1b282: MISC BASE D5498D545B20 lea r18, ptr [r11+rbx*2+0x20] +XDIS 1b288: MISC BASE D5498D545C21 lea r18, ptr [r12+rbx*2+0x21] +XDIS 1b28e: MISC BASE D5498D545D22 lea r18, ptr [r13+rbx*2+0x22] +XDIS 1b294: MISC BASE D5498D545E23 lea r18, ptr [r14+rbx*2+0x23] +XDIS 1b29a: MISC BASE D5498D545F24 lea r18, ptr [r15+rbx*2+0x24] +XDIS 1b2a0: MISC BASE D5588D545825 lea r18, ptr [r16+rbx*2+0x25] +XDIS 1b2a6: MISC BASE D5588D545926 lea r18, ptr [r17+rbx*2+0x26] +XDIS 1b2ac: MISC BASE D5588D545A27 lea r18, ptr [r18+rbx*2+0x27] +XDIS 1b2b2: MISC BASE D5588D545B28 lea r18, ptr [r19+rbx*2+0x28] +XDIS 1b2b8: MISC BASE D5588D545C29 lea r18, ptr [r20+rbx*2+0x29] +XDIS 1b2be: MISC BASE D5588D545D2A lea r18, ptr [r21+rbx*2+0x2a] +XDIS 1b2c4: MISC BASE D5588D545E2B lea r18, ptr [r22+rbx*2+0x2b] +XDIS 1b2ca: MISC BASE D5588D545F2C lea r18, ptr [r23+rbx*2+0x2c] +XDIS 1b2d0: MISC BASE D5598D54582D lea r18, ptr [r24+rbx*2+0x2d] +XDIS 1b2d6: MISC BASE D5598D54592E lea r18, ptr [r25+rbx*2+0x2e] +XDIS 1b2dc: MISC BASE D5598D545A2F lea r18, ptr [r26+rbx*2+0x2f] +XDIS 1b2e2: MISC BASE D5598D545B30 lea r18, ptr [r27+rbx*2+0x30] +XDIS 1b2e8: MISC BASE D5598D545C31 lea r18, ptr [r28+rbx*2+0x31] +XDIS 1b2ee: MISC BASE D5598D545D32 lea r18, ptr [r29+rbx*2+0x32] +XDIS 1b2f4: MISC BASE D5598D545E33 lea r18, ptr [r30+rbx*2+0x33] +XDIS 1b2fa: MISC BASE D5598D545F34 lea r18, ptr [r31+rbx*2+0x34] +XDIS 1b300: MISC BASE D5488D546016 lea r18, ptr [rax+0x16] +XDIS 1b306: MISC BASE D5488D546117 lea r18, ptr [rcx+0x17] +XDIS 1b30c: MISC BASE D5488D546218 lea r18, ptr [rdx+0x18] +XDIS 1b312: MISC BASE D5488D546319 lea r18, ptr [rbx+0x19] +XDIS 1b318: MISC BASE D5488D54641A lea r18, ptr [rsp+0x1a] +XDIS 1b31e: MISC BASE D5488D54651B lea r18, ptr [rbp+0x1b] +XDIS 1b324: MISC BASE D5488D54661C lea r18, ptr [rsi+0x1c] +XDIS 1b32a: MISC BASE D5488D54671D lea r18, ptr [rdi+0x1d] +XDIS 1b330: MISC BASE D5498D54601E lea r18, ptr [r8+0x1e] +XDIS 1b336: MISC BASE D5498D54611F lea r18, ptr [r9+0x1f] +XDIS 1b33c: MISC BASE D5498D546220 lea r18, ptr [r10+0x20] +XDIS 1b342: MISC BASE D5498D546321 lea r18, ptr [r11+0x21] +XDIS 1b348: MISC BASE D5498D546422 lea r18, ptr [r12+0x22] +XDIS 1b34e: MISC BASE D5498D546523 lea r18, ptr [r13+0x23] +XDIS 1b354: MISC BASE D5498D546624 lea r18, ptr [r14+0x24] +XDIS 1b35a: MISC BASE D5498D546725 lea r18, ptr [r15+0x25] +XDIS 1b360: MISC BASE D5588D546026 lea r18, ptr [r16+0x26] +XDIS 1b366: MISC BASE D5588D546127 lea r18, ptr [r17+0x27] +XDIS 1b36c: MISC BASE D5588D546228 lea r18, ptr [r18+0x28] +XDIS 1b372: MISC BASE D5588D546329 lea r18, ptr [r19+0x29] +XDIS 1b378: MISC BASE D5588D54642A lea r18, ptr [r20+0x2a] +XDIS 1b37e: MISC BASE D5588D54652B lea r18, ptr [r21+0x2b] +XDIS 1b384: MISC BASE D5588D54662C lea r18, ptr [r22+0x2c] +XDIS 1b38a: MISC BASE D5588D54672D lea r18, ptr [r23+0x2d] +XDIS 1b390: MISC BASE D5598D54602E lea r18, ptr [r24+0x2e] +XDIS 1b396: MISC BASE D5598D54612F lea r18, ptr [r25+0x2f] +XDIS 1b39c: MISC BASE D5598D546230 lea r18, ptr [r26+0x30] +XDIS 1b3a2: MISC BASE D5598D546331 lea r18, ptr [r27+0x31] +XDIS 1b3a8: MISC BASE D5598D546432 lea r18, ptr [r28+0x32] +XDIS 1b3ae: MISC BASE D5598D546533 lea r18, ptr [r29+0x33] +XDIS 1b3b4: MISC BASE D5598D546634 lea r18, ptr [r30+0x34] +XDIS 1b3ba: MISC BASE D5598D546735 lea r18, ptr [r31+0x35] +XDIS 1b3c0: MISC BASE D5488D546817 lea r18, ptr [rax+rbp*2+0x17] +XDIS 1b3c6: MISC BASE D5488D546918 lea r18, ptr [rcx+rbp*2+0x18] +XDIS 1b3cc: MISC BASE D5488D546A19 lea r18, ptr [rdx+rbp*2+0x19] +XDIS 1b3d2: MISC BASE D5488D546B1A lea r18, ptr [rbx+rbp*2+0x1a] +XDIS 1b3d8: MISC BASE D5488D546C1B lea r18, ptr [rsp+rbp*2+0x1b] +XDIS 1b3de: MISC BASE D5488D546D1C lea r18, ptr [rbp+rbp*2+0x1c] +XDIS 1b3e4: MISC BASE D5488D546E1D lea r18, ptr [rsi+rbp*2+0x1d] +XDIS 1b3ea: MISC BASE D5488D546F1E lea r18, ptr [rdi+rbp*2+0x1e] +XDIS 1b3f0: MISC BASE D5498D54681F lea r18, ptr [r8+rbp*2+0x1f] +XDIS 1b3f6: MISC BASE D5498D546920 lea r18, ptr [r9+rbp*2+0x20] +XDIS 1b3fc: MISC BASE D5498D546A21 lea r18, ptr [r10+rbp*2+0x21] +XDIS 1b402: MISC BASE D5498D546B22 lea r18, ptr [r11+rbp*2+0x22] +XDIS 1b408: MISC BASE D5498D546C23 lea r18, ptr [r12+rbp*2+0x23] +XDIS 1b40e: MISC BASE D5498D546D24 lea r18, ptr [r13+rbp*2+0x24] +XDIS 1b414: MISC BASE D5498D546E25 lea r18, ptr [r14+rbp*2+0x25] +XDIS 1b41a: MISC BASE D5498D546F26 lea r18, ptr [r15+rbp*2+0x26] +XDIS 1b420: MISC BASE D5588D546827 lea r18, ptr [r16+rbp*2+0x27] +XDIS 1b426: MISC BASE D5588D546928 lea r18, ptr [r17+rbp*2+0x28] +XDIS 1b42c: MISC BASE D5588D546A29 lea r18, ptr [r18+rbp*2+0x29] +XDIS 1b432: MISC BASE D5588D546B2A lea r18, ptr [r19+rbp*2+0x2a] +XDIS 1b438: MISC BASE D5588D546C2B lea r18, ptr [r20+rbp*2+0x2b] +XDIS 1b43e: MISC BASE D5588D546D2C lea r18, ptr [r21+rbp*2+0x2c] +XDIS 1b444: MISC BASE D5588D546E2D lea r18, ptr [r22+rbp*2+0x2d] +XDIS 1b44a: MISC BASE D5588D546F2E lea r18, ptr [r23+rbp*2+0x2e] +XDIS 1b450: MISC BASE D5598D54682F lea r18, ptr [r24+rbp*2+0x2f] +XDIS 1b456: MISC BASE D5598D546930 lea r18, ptr [r25+rbp*2+0x30] +XDIS 1b45c: MISC BASE D5598D546A31 lea r18, ptr [r26+rbp*2+0x31] +XDIS 1b462: MISC BASE D5598D546B32 lea r18, ptr [r27+rbp*2+0x32] +XDIS 1b468: MISC BASE D5598D546C33 lea r18, ptr [r28+rbp*2+0x33] +XDIS 1b46e: MISC BASE D5598D546D34 lea r18, ptr [r29+rbp*2+0x34] +XDIS 1b474: MISC BASE D5598D546E35 lea r18, ptr [r30+rbp*2+0x35] +XDIS 1b47a: MISC BASE D5598D546F36 lea r18, ptr [r31+rbp*2+0x36] +XDIS 1b480: MISC BASE D5488D547018 lea r18, ptr [rax+rsi*2+0x18] +XDIS 1b486: MISC BASE D5488D547119 lea r18, ptr [rcx+rsi*2+0x19] +XDIS 1b48c: MISC BASE D5488D54721A lea r18, ptr [rdx+rsi*2+0x1a] +XDIS 1b492: MISC BASE D5488D54731B lea r18, ptr [rbx+rsi*2+0x1b] +XDIS 1b498: MISC BASE D5488D54741C lea r18, ptr [rsp+rsi*2+0x1c] +XDIS 1b49e: MISC BASE D5488D54751D lea r18, ptr [rbp+rsi*2+0x1d] +XDIS 1b4a4: MISC BASE D5488D54761E lea r18, ptr [rsi+rsi*2+0x1e] +XDIS 1b4aa: MISC BASE D5488D54771F lea r18, ptr [rdi+rsi*2+0x1f] +XDIS 1b4b0: MISC BASE D5498D547020 lea r18, ptr [r8+rsi*2+0x20] +XDIS 1b4b6: MISC BASE D5498D547121 lea r18, ptr [r9+rsi*2+0x21] +XDIS 1b4bc: MISC BASE D5498D547222 lea r18, ptr [r10+rsi*2+0x22] +XDIS 1b4c2: MISC BASE D5498D547323 lea r18, ptr [r11+rsi*2+0x23] +XDIS 1b4c8: MISC BASE D5498D547424 lea r18, ptr [r12+rsi*2+0x24] +XDIS 1b4ce: MISC BASE D5498D547525 lea r18, ptr [r13+rsi*2+0x25] +XDIS 1b4d4: MISC BASE D5498D547626 lea r18, ptr [r14+rsi*2+0x26] +XDIS 1b4da: MISC BASE D5498D547727 lea r18, ptr [r15+rsi*2+0x27] +XDIS 1b4e0: MISC BASE D5588D547028 lea r18, ptr [r16+rsi*2+0x28] +XDIS 1b4e6: MISC BASE D5588D547129 lea r18, ptr [r17+rsi*2+0x29] +XDIS 1b4ec: MISC BASE D5588D54722A lea r18, ptr [r18+rsi*2+0x2a] +XDIS 1b4f2: MISC BASE D5588D54732B lea r18, ptr [r19+rsi*2+0x2b] +XDIS 1b4f8: MISC BASE D5588D54742C lea r18, ptr [r20+rsi*2+0x2c] +XDIS 1b4fe: MISC BASE D5588D54752D lea r18, ptr [r21+rsi*2+0x2d] +XDIS 1b504: MISC BASE D5588D54762E lea r18, ptr [r22+rsi*2+0x2e] +XDIS 1b50a: MISC BASE D5588D54772F lea r18, ptr [r23+rsi*2+0x2f] +XDIS 1b510: MISC BASE D5598D547030 lea r18, ptr [r24+rsi*2+0x30] +XDIS 1b516: MISC BASE D5598D547131 lea r18, ptr [r25+rsi*2+0x31] +XDIS 1b51c: MISC BASE D5598D547232 lea r18, ptr [r26+rsi*2+0x32] +XDIS 1b522: MISC BASE D5598D547333 lea r18, ptr [r27+rsi*2+0x33] +XDIS 1b528: MISC BASE D5598D547434 lea r18, ptr [r28+rsi*2+0x34] +XDIS 1b52e: MISC BASE D5598D547535 lea r18, ptr [r29+rsi*2+0x35] +XDIS 1b534: MISC BASE D5598D547636 lea r18, ptr [r30+rsi*2+0x36] +XDIS 1b53a: MISC BASE D5598D547737 lea r18, ptr [r31+rsi*2+0x37] +XDIS 1b540: MISC BASE D5488D547819 lea r18, ptr [rax+rdi*2+0x19] +XDIS 1b546: MISC BASE D5488D54791A lea r18, ptr [rcx+rdi*2+0x1a] +XDIS 1b54c: MISC BASE D5488D547A1B lea r18, ptr [rdx+rdi*2+0x1b] +XDIS 1b552: MISC BASE D5488D547B1C lea r18, ptr [rbx+rdi*2+0x1c] +XDIS 1b558: MISC BASE D5488D547C1D lea r18, ptr [rsp+rdi*2+0x1d] +XDIS 1b55e: MISC BASE D5488D547D1E lea r18, ptr [rbp+rdi*2+0x1e] +XDIS 1b564: MISC BASE D5488D547E1F lea r18, ptr [rsi+rdi*2+0x1f] +XDIS 1b56a: MISC BASE D5488D547F20 lea r18, ptr [rdi+rdi*2+0x20] +XDIS 1b570: MISC BASE D5498D547821 lea r18, ptr [r8+rdi*2+0x21] +XDIS 1b576: MISC BASE D5498D547922 lea r18, ptr [r9+rdi*2+0x22] +XDIS 1b57c: MISC BASE D5498D547A23 lea r18, ptr [r10+rdi*2+0x23] +XDIS 1b582: MISC BASE D5498D547B24 lea r18, ptr [r11+rdi*2+0x24] +XDIS 1b588: MISC BASE D5498D547C25 lea r18, ptr [r12+rdi*2+0x25] +XDIS 1b58e: MISC BASE D5498D547D26 lea r18, ptr [r13+rdi*2+0x26] +XDIS 1b594: MISC BASE D5498D547E27 lea r18, ptr [r14+rdi*2+0x27] +XDIS 1b59a: MISC BASE D5498D547F28 lea r18, ptr [r15+rdi*2+0x28] +XDIS 1b5a0: MISC BASE D5588D547829 lea r18, ptr [r16+rdi*2+0x29] +XDIS 1b5a6: MISC BASE D5588D54792A lea r18, ptr [r17+rdi*2+0x2a] +XDIS 1b5ac: MISC BASE D5588D547A2B lea r18, ptr [r18+rdi*2+0x2b] +XDIS 1b5b2: MISC BASE D5588D547B2C lea r18, ptr [r19+rdi*2+0x2c] +XDIS 1b5b8: MISC BASE D5588D547C2D lea r18, ptr [r20+rdi*2+0x2d] +XDIS 1b5be: MISC BASE D5588D547D2E lea r18, ptr [r21+rdi*2+0x2e] +XDIS 1b5c4: MISC BASE D5588D547E2F lea r18, ptr [r22+rdi*2+0x2f] +XDIS 1b5ca: MISC BASE D5588D547F30 lea r18, ptr [r23+rdi*2+0x30] +XDIS 1b5d0: MISC BASE D5598D547831 lea r18, ptr [r24+rdi*2+0x31] +XDIS 1b5d6: MISC BASE D5598D547932 lea r18, ptr [r25+rdi*2+0x32] +XDIS 1b5dc: MISC BASE D5598D547A33 lea r18, ptr [r26+rdi*2+0x33] +XDIS 1b5e2: MISC BASE D5598D547B34 lea r18, ptr [r27+rdi*2+0x34] +XDIS 1b5e8: MISC BASE D5598D547C35 lea r18, ptr [r28+rdi*2+0x35] +XDIS 1b5ee: MISC BASE D5598D547D36 lea r18, ptr [r29+rdi*2+0x36] +XDIS 1b5f4: MISC BASE D5598D547E37 lea r18, ptr [r30+rdi*2+0x37] +XDIS 1b5fa: MISC BASE D5598D547F38 lea r18, ptr [r31+rdi*2+0x38] +XDIS 1b600: MISC BASE D54A8D54401A lea r18, ptr [rax+r8*2+0x1a] +XDIS 1b606: MISC BASE D54A8D54411B lea r18, ptr [rcx+r8*2+0x1b] +XDIS 1b60c: MISC BASE D54A8D54421C lea r18, ptr [rdx+r8*2+0x1c] +XDIS 1b612: MISC BASE D54A8D54431D lea r18, ptr [rbx+r8*2+0x1d] +XDIS 1b618: MISC BASE D54A8D54441E lea r18, ptr [rsp+r8*2+0x1e] +XDIS 1b61e: MISC BASE D54A8D54451F lea r18, ptr [rbp+r8*2+0x1f] +XDIS 1b624: MISC BASE D54A8D544620 lea r18, ptr [rsi+r8*2+0x20] +XDIS 1b62a: MISC BASE D54A8D544721 lea r18, ptr [rdi+r8*2+0x21] +XDIS 1b630: MISC BASE D54B8D544022 lea r18, ptr [r8+r8*2+0x22] +XDIS 1b636: MISC BASE D54B8D544123 lea r18, ptr [r9+r8*2+0x23] +XDIS 1b63c: MISC BASE D54B8D544224 lea r18, ptr [r10+r8*2+0x24] +XDIS 1b642: MISC BASE D54B8D544325 lea r18, ptr [r11+r8*2+0x25] +XDIS 1b648: MISC BASE D54B8D544426 lea r18, ptr [r12+r8*2+0x26] +XDIS 1b64e: MISC BASE D54B8D544527 lea r18, ptr [r13+r8*2+0x27] +XDIS 1b654: MISC BASE D54B8D544628 lea r18, ptr [r14+r8*2+0x28] +XDIS 1b65a: MISC BASE D54B8D544729 lea r18, ptr [r15+r8*2+0x29] +XDIS 1b660: MISC BASE D55A8D54402A lea r18, ptr [r16+r8*2+0x2a] +XDIS 1b666: MISC BASE D55A8D54412B lea r18, ptr [r17+r8*2+0x2b] +XDIS 1b66c: MISC BASE D55A8D54422C lea r18, ptr [r18+r8*2+0x2c] +XDIS 1b672: MISC BASE D55A8D54432D lea r18, ptr [r19+r8*2+0x2d] +XDIS 1b678: MISC BASE D55A8D54442E lea r18, ptr [r20+r8*2+0x2e] +XDIS 1b67e: MISC BASE D55A8D54452F lea r18, ptr [r21+r8*2+0x2f] +XDIS 1b684: MISC BASE D55A8D544630 lea r18, ptr [r22+r8*2+0x30] +XDIS 1b68a: MISC BASE D55A8D544731 lea r18, ptr [r23+r8*2+0x31] +XDIS 1b690: MISC BASE D55B8D544032 lea r18, ptr [r24+r8*2+0x32] +XDIS 1b696: MISC BASE D55B8D544133 lea r18, ptr [r25+r8*2+0x33] +XDIS 1b69c: MISC BASE D55B8D544234 lea r18, ptr [r26+r8*2+0x34] +XDIS 1b6a2: MISC BASE D55B8D544335 lea r18, ptr [r27+r8*2+0x35] +XDIS 1b6a8: MISC BASE D55B8D544436 lea r18, ptr [r28+r8*2+0x36] +XDIS 1b6ae: MISC BASE D55B8D544537 lea r18, ptr [r29+r8*2+0x37] +XDIS 1b6b4: MISC BASE D55B8D544638 lea r18, ptr [r30+r8*2+0x38] +XDIS 1b6ba: MISC BASE D55B8D544739 lea r18, ptr [r31+r8*2+0x39] +XDIS 1b6c0: MISC BASE D54A8D54481B lea r18, ptr [rax+r9*2+0x1b] +XDIS 1b6c6: MISC BASE D54A8D54491C lea r18, ptr [rcx+r9*2+0x1c] +XDIS 1b6cc: MISC BASE D54A8D544A1D lea r18, ptr [rdx+r9*2+0x1d] +XDIS 1b6d2: MISC BASE D54A8D544B1E lea r18, ptr [rbx+r9*2+0x1e] +XDIS 1b6d8: MISC BASE D54A8D544C1F lea r18, ptr [rsp+r9*2+0x1f] +XDIS 1b6de: MISC BASE D54A8D544D20 lea r18, ptr [rbp+r9*2+0x20] +XDIS 1b6e4: MISC BASE D54A8D544E21 lea r18, ptr [rsi+r9*2+0x21] +XDIS 1b6ea: MISC BASE D54A8D544F22 lea r18, ptr [rdi+r9*2+0x22] +XDIS 1b6f0: MISC BASE D54B8D544823 lea r18, ptr [r8+r9*2+0x23] +XDIS 1b6f6: MISC BASE D54B8D544924 lea r18, ptr [r9+r9*2+0x24] +XDIS 1b6fc: MISC BASE D54B8D544A25 lea r18, ptr [r10+r9*2+0x25] +XDIS 1b702: MISC BASE D54B8D544B26 lea r18, ptr [r11+r9*2+0x26] +XDIS 1b708: MISC BASE D54B8D544C27 lea r18, ptr [r12+r9*2+0x27] +XDIS 1b70e: MISC BASE D54B8D544D28 lea r18, ptr [r13+r9*2+0x28] +XDIS 1b714: MISC BASE D54B8D544E29 lea r18, ptr [r14+r9*2+0x29] +XDIS 1b71a: MISC BASE D54B8D544F2A lea r18, ptr [r15+r9*2+0x2a] +XDIS 1b720: MISC BASE D55A8D54482B lea r18, ptr [r16+r9*2+0x2b] +XDIS 1b726: MISC BASE D55A8D54492C lea r18, ptr [r17+r9*2+0x2c] +XDIS 1b72c: MISC BASE D55A8D544A2D lea r18, ptr [r18+r9*2+0x2d] +XDIS 1b732: MISC BASE D55A8D544B2E lea r18, ptr [r19+r9*2+0x2e] +XDIS 1b738: MISC BASE D55A8D544C2F lea r18, ptr [r20+r9*2+0x2f] +XDIS 1b73e: MISC BASE D55A8D544D30 lea r18, ptr [r21+r9*2+0x30] +XDIS 1b744: MISC BASE D55A8D544E31 lea r18, ptr [r22+r9*2+0x31] +XDIS 1b74a: MISC BASE D55A8D544F32 lea r18, ptr [r23+r9*2+0x32] +XDIS 1b750: MISC BASE D55B8D544833 lea r18, ptr [r24+r9*2+0x33] +XDIS 1b756: MISC BASE D55B8D544934 lea r18, ptr [r25+r9*2+0x34] +XDIS 1b75c: MISC BASE D55B8D544A35 lea r18, ptr [r26+r9*2+0x35] +XDIS 1b762: MISC BASE D55B8D544B36 lea r18, ptr [r27+r9*2+0x36] +XDIS 1b768: MISC BASE D55B8D544C37 lea r18, ptr [r28+r9*2+0x37] +XDIS 1b76e: MISC BASE D55B8D544D38 lea r18, ptr [r29+r9*2+0x38] +XDIS 1b774: MISC BASE D55B8D544E39 lea r18, ptr [r30+r9*2+0x39] +XDIS 1b77a: MISC BASE D55B8D544F3A lea r18, ptr [r31+r9*2+0x3a] +XDIS 1b780: MISC BASE D54A8D54501C lea r18, ptr [rax+r10*2+0x1c] +XDIS 1b786: MISC BASE D54A8D54511D lea r18, ptr [rcx+r10*2+0x1d] +XDIS 1b78c: MISC BASE D54A8D54521E lea r18, ptr [rdx+r10*2+0x1e] +XDIS 1b792: MISC BASE D54A8D54531F lea r18, ptr [rbx+r10*2+0x1f] +XDIS 1b798: MISC BASE D54A8D545420 lea r18, ptr [rsp+r10*2+0x20] +XDIS 1b79e: MISC BASE D54A8D545521 lea r18, ptr [rbp+r10*2+0x21] +XDIS 1b7a4: MISC BASE D54A8D545622 lea r18, ptr [rsi+r10*2+0x22] +XDIS 1b7aa: MISC BASE D54A8D545723 lea r18, ptr [rdi+r10*2+0x23] +XDIS 1b7b0: MISC BASE D54B8D545024 lea r18, ptr [r8+r10*2+0x24] +XDIS 1b7b6: MISC BASE D54B8D545125 lea r18, ptr [r9+r10*2+0x25] +XDIS 1b7bc: MISC BASE D54B8D545226 lea r18, ptr [r10+r10*2+0x26] +XDIS 1b7c2: MISC BASE D54B8D545327 lea r18, ptr [r11+r10*2+0x27] +XDIS 1b7c8: MISC BASE D54B8D545428 lea r18, ptr [r12+r10*2+0x28] +XDIS 1b7ce: MISC BASE D54B8D545529 lea r18, ptr [r13+r10*2+0x29] +XDIS 1b7d4: MISC BASE D54B8D54562A lea r18, ptr [r14+r10*2+0x2a] +XDIS 1b7da: MISC BASE D54B8D54572B lea r18, ptr [r15+r10*2+0x2b] +XDIS 1b7e0: MISC BASE D55A8D54502C lea r18, ptr [r16+r10*2+0x2c] +XDIS 1b7e6: MISC BASE D55A8D54512D lea r18, ptr [r17+r10*2+0x2d] +XDIS 1b7ec: MISC BASE D55A8D54522E lea r18, ptr [r18+r10*2+0x2e] +XDIS 1b7f2: MISC BASE D55A8D54532F lea r18, ptr [r19+r10*2+0x2f] +XDIS 1b7f8: MISC BASE D55A8D545430 lea r18, ptr [r20+r10*2+0x30] +XDIS 1b7fe: MISC BASE D55A8D545531 lea r18, ptr [r21+r10*2+0x31] +XDIS 1b804: MISC BASE D55A8D545632 lea r18, ptr [r22+r10*2+0x32] +XDIS 1b80a: MISC BASE D55A8D545733 lea r18, ptr [r23+r10*2+0x33] +XDIS 1b810: MISC BASE D55B8D545034 lea r18, ptr [r24+r10*2+0x34] +XDIS 1b816: MISC BASE D55B8D545135 lea r18, ptr [r25+r10*2+0x35] +XDIS 1b81c: MISC BASE D55B8D545236 lea r18, ptr [r26+r10*2+0x36] +XDIS 1b822: MISC BASE D55B8D545337 lea r18, ptr [r27+r10*2+0x37] +XDIS 1b828: MISC BASE D55B8D545438 lea r18, ptr [r28+r10*2+0x38] +XDIS 1b82e: MISC BASE D55B8D545539 lea r18, ptr [r29+r10*2+0x39] +XDIS 1b834: MISC BASE D55B8D54563A lea r18, ptr [r30+r10*2+0x3a] +XDIS 1b83a: MISC BASE D55B8D54573B lea r18, ptr [r31+r10*2+0x3b] +XDIS 1b840: MISC BASE D54A8D54581D lea r18, ptr [rax+r11*2+0x1d] +XDIS 1b846: MISC BASE D54A8D54591E lea r18, ptr [rcx+r11*2+0x1e] +XDIS 1b84c: MISC BASE D54A8D545A1F lea r18, ptr [rdx+r11*2+0x1f] +XDIS 1b852: MISC BASE D54A8D545B20 lea r18, ptr [rbx+r11*2+0x20] +XDIS 1b858: MISC BASE D54A8D545C21 lea r18, ptr [rsp+r11*2+0x21] +XDIS 1b85e: MISC BASE D54A8D545D22 lea r18, ptr [rbp+r11*2+0x22] +XDIS 1b864: MISC BASE D54A8D545E23 lea r18, ptr [rsi+r11*2+0x23] +XDIS 1b86a: MISC BASE D54A8D545F24 lea r18, ptr [rdi+r11*2+0x24] +XDIS 1b870: MISC BASE D54B8D545825 lea r18, ptr [r8+r11*2+0x25] +XDIS 1b876: MISC BASE D54B8D545926 lea r18, ptr [r9+r11*2+0x26] +XDIS 1b87c: MISC BASE D54B8D545A27 lea r18, ptr [r10+r11*2+0x27] +XDIS 1b882: MISC BASE D54B8D545B28 lea r18, ptr [r11+r11*2+0x28] +XDIS 1b888: MISC BASE D54B8D545C29 lea r18, ptr [r12+r11*2+0x29] +XDIS 1b88e: MISC BASE D54B8D545D2A lea r18, ptr [r13+r11*2+0x2a] +XDIS 1b894: MISC BASE D54B8D545E2B lea r18, ptr [r14+r11*2+0x2b] +XDIS 1b89a: MISC BASE D54B8D545F2C lea r18, ptr [r15+r11*2+0x2c] +XDIS 1b8a0: MISC BASE D55A8D54582D lea r18, ptr [r16+r11*2+0x2d] +XDIS 1b8a6: MISC BASE D55A8D54592E lea r18, ptr [r17+r11*2+0x2e] +XDIS 1b8ac: MISC BASE D55A8D545A2F lea r18, ptr [r18+r11*2+0x2f] +XDIS 1b8b2: MISC BASE D55A8D545B30 lea r18, ptr [r19+r11*2+0x30] +XDIS 1b8b8: MISC BASE D55A8D545C31 lea r18, ptr [r20+r11*2+0x31] +XDIS 1b8be: MISC BASE D55A8D545D32 lea r18, ptr [r21+r11*2+0x32] +XDIS 1b8c4: MISC BASE D55A8D545E33 lea r18, ptr [r22+r11*2+0x33] +XDIS 1b8ca: MISC BASE D55A8D545F34 lea r18, ptr [r23+r11*2+0x34] +XDIS 1b8d0: MISC BASE D55B8D545835 lea r18, ptr [r24+r11*2+0x35] +XDIS 1b8d6: MISC BASE D55B8D545936 lea r18, ptr [r25+r11*2+0x36] +XDIS 1b8dc: MISC BASE D55B8D545A37 lea r18, ptr [r26+r11*2+0x37] +XDIS 1b8e2: MISC BASE D55B8D545B38 lea r18, ptr [r27+r11*2+0x38] +XDIS 1b8e8: MISC BASE D55B8D545C39 lea r18, ptr [r28+r11*2+0x39] +XDIS 1b8ee: MISC BASE D55B8D545D3A lea r18, ptr [r29+r11*2+0x3a] +XDIS 1b8f4: MISC BASE D55B8D545E3B lea r18, ptr [r30+r11*2+0x3b] +XDIS 1b8fa: MISC BASE D55B8D545F3C lea r18, ptr [r31+r11*2+0x3c] +XDIS 1b900: MISC BASE D54A8D54601E lea r18, ptr [rax+r12*2+0x1e] +XDIS 1b906: MISC BASE D54A8D54611F lea r18, ptr [rcx+r12*2+0x1f] +XDIS 1b90c: MISC BASE D54A8D546220 lea r18, ptr [rdx+r12*2+0x20] +XDIS 1b912: MISC BASE D54A8D546321 lea r18, ptr [rbx+r12*2+0x21] +XDIS 1b918: MISC BASE D54A8D546422 lea r18, ptr [rsp+r12*2+0x22] +XDIS 1b91e: MISC BASE D54A8D546523 lea r18, ptr [rbp+r12*2+0x23] +XDIS 1b924: MISC BASE D54A8D546624 lea r18, ptr [rsi+r12*2+0x24] +XDIS 1b92a: MISC BASE D54A8D546725 lea r18, ptr [rdi+r12*2+0x25] +XDIS 1b930: MISC BASE D54B8D546026 lea r18, ptr [r8+r12*2+0x26] +XDIS 1b936: MISC BASE D54B8D546127 lea r18, ptr [r9+r12*2+0x27] +XDIS 1b93c: MISC BASE D54B8D546228 lea r18, ptr [r10+r12*2+0x28] +XDIS 1b942: MISC BASE D54B8D546329 lea r18, ptr [r11+r12*2+0x29] +XDIS 1b948: MISC BASE D54B8D54642A lea r18, ptr [r12+r12*2+0x2a] +XDIS 1b94e: MISC BASE D54B8D54652B lea r18, ptr [r13+r12*2+0x2b] +XDIS 1b954: MISC BASE D54B8D54662C lea r18, ptr [r14+r12*2+0x2c] +XDIS 1b95a: MISC BASE D54B8D54672D lea r18, ptr [r15+r12*2+0x2d] +XDIS 1b960: MISC BASE D55A8D54602E lea r18, ptr [r16+r12*2+0x2e] +XDIS 1b966: MISC BASE D55A8D54612F lea r18, ptr [r17+r12*2+0x2f] +XDIS 1b96c: MISC BASE D55A8D546230 lea r18, ptr [r18+r12*2+0x30] +XDIS 1b972: MISC BASE D55A8D546331 lea r18, ptr [r19+r12*2+0x31] +XDIS 1b978: MISC BASE D55A8D546432 lea r18, ptr [r20+r12*2+0x32] +XDIS 1b97e: MISC BASE D55A8D546533 lea r18, ptr [r21+r12*2+0x33] +XDIS 1b984: MISC BASE D55A8D546634 lea r18, ptr [r22+r12*2+0x34] +XDIS 1b98a: MISC BASE D55A8D546735 lea r18, ptr [r23+r12*2+0x35] +XDIS 1b990: MISC BASE D55B8D546036 lea r18, ptr [r24+r12*2+0x36] +XDIS 1b996: MISC BASE D55B8D546137 lea r18, ptr [r25+r12*2+0x37] +XDIS 1b99c: MISC BASE D55B8D546238 lea r18, ptr [r26+r12*2+0x38] +XDIS 1b9a2: MISC BASE D55B8D546339 lea r18, ptr [r27+r12*2+0x39] +XDIS 1b9a8: MISC BASE D55B8D54643A lea r18, ptr [r28+r12*2+0x3a] +XDIS 1b9ae: MISC BASE D55B8D54653B lea r18, ptr [r29+r12*2+0x3b] +XDIS 1b9b4: MISC BASE D55B8D54663C lea r18, ptr [r30+r12*2+0x3c] +XDIS 1b9ba: MISC BASE D55B8D54673D lea r18, ptr [r31+r12*2+0x3d] +XDIS 1b9c0: MISC BASE D54A8D54681F lea r18, ptr [rax+r13*2+0x1f] +XDIS 1b9c6: MISC BASE D54A8D546920 lea r18, ptr [rcx+r13*2+0x20] +XDIS 1b9cc: MISC BASE D54A8D546A21 lea r18, ptr [rdx+r13*2+0x21] +XDIS 1b9d2: MISC BASE D54A8D546B22 lea r18, ptr [rbx+r13*2+0x22] +XDIS 1b9d8: MISC BASE D54A8D546C23 lea r18, ptr [rsp+r13*2+0x23] +XDIS 1b9de: MISC BASE D54A8D546D24 lea r18, ptr [rbp+r13*2+0x24] +XDIS 1b9e4: MISC BASE D54A8D546E25 lea r18, ptr [rsi+r13*2+0x25] +XDIS 1b9ea: MISC BASE D54A8D546F26 lea r18, ptr [rdi+r13*2+0x26] +XDIS 1b9f0: MISC BASE D54B8D546827 lea r18, ptr [r8+r13*2+0x27] +XDIS 1b9f6: MISC BASE D54B8D546928 lea r18, ptr [r9+r13*2+0x28] +XDIS 1b9fc: MISC BASE D54B8D546A29 lea r18, ptr [r10+r13*2+0x29] +XDIS 1ba02: MISC BASE D54B8D546B2A lea r18, ptr [r11+r13*2+0x2a] +XDIS 1ba08: MISC BASE D54B8D546C2B lea r18, ptr [r12+r13*2+0x2b] +XDIS 1ba0e: MISC BASE D54B8D546D2C lea r18, ptr [r13+r13*2+0x2c] +XDIS 1ba14: MISC BASE D54B8D546E2D lea r18, ptr [r14+r13*2+0x2d] +XDIS 1ba1a: MISC BASE D54B8D546F2E lea r18, ptr [r15+r13*2+0x2e] +XDIS 1ba20: MISC BASE D55A8D54682F lea r18, ptr [r16+r13*2+0x2f] +XDIS 1ba26: MISC BASE D55A8D546930 lea r18, ptr [r17+r13*2+0x30] +XDIS 1ba2c: MISC BASE D55A8D546A31 lea r18, ptr [r18+r13*2+0x31] +XDIS 1ba32: MISC BASE D55A8D546B32 lea r18, ptr [r19+r13*2+0x32] +XDIS 1ba38: MISC BASE D55A8D546C33 lea r18, ptr [r20+r13*2+0x33] +XDIS 1ba3e: MISC BASE D55A8D546D34 lea r18, ptr [r21+r13*2+0x34] +XDIS 1ba44: MISC BASE D55A8D546E35 lea r18, ptr [r22+r13*2+0x35] +XDIS 1ba4a: MISC BASE D55A8D546F36 lea r18, ptr [r23+r13*2+0x36] +XDIS 1ba50: MISC BASE D55B8D546837 lea r18, ptr [r24+r13*2+0x37] +XDIS 1ba56: MISC BASE D55B8D546938 lea r18, ptr [r25+r13*2+0x38] +XDIS 1ba5c: MISC BASE D55B8D546A39 lea r18, ptr [r26+r13*2+0x39] +XDIS 1ba62: MISC BASE D55B8D546B3A lea r18, ptr [r27+r13*2+0x3a] +XDIS 1ba68: MISC BASE D55B8D546C3B lea r18, ptr [r28+r13*2+0x3b] +XDIS 1ba6e: MISC BASE D55B8D546D3C lea r18, ptr [r29+r13*2+0x3c] +XDIS 1ba74: MISC BASE D55B8D546E3D lea r18, ptr [r30+r13*2+0x3d] +XDIS 1ba7a: MISC BASE D55B8D546F3E lea r18, ptr [r31+r13*2+0x3e] +XDIS 1ba80: MISC BASE D54A8D547020 lea r18, ptr [rax+r14*2+0x20] +XDIS 1ba86: MISC BASE D54A8D547121 lea r18, ptr [rcx+r14*2+0x21] +XDIS 1ba8c: MISC BASE D54A8D547222 lea r18, ptr [rdx+r14*2+0x22] +XDIS 1ba92: MISC BASE D54A8D547323 lea r18, ptr [rbx+r14*2+0x23] +XDIS 1ba98: MISC BASE D54A8D547424 lea r18, ptr [rsp+r14*2+0x24] +XDIS 1ba9e: MISC BASE D54A8D547525 lea r18, ptr [rbp+r14*2+0x25] +XDIS 1baa4: MISC BASE D54A8D547626 lea r18, ptr [rsi+r14*2+0x26] +XDIS 1baaa: MISC BASE D54A8D547727 lea r18, ptr [rdi+r14*2+0x27] +XDIS 1bab0: MISC BASE D54B8D547028 lea r18, ptr [r8+r14*2+0x28] +XDIS 1bab6: MISC BASE D54B8D547129 lea r18, ptr [r9+r14*2+0x29] +XDIS 1babc: MISC BASE D54B8D54722A lea r18, ptr [r10+r14*2+0x2a] +XDIS 1bac2: MISC BASE D54B8D54732B lea r18, ptr [r11+r14*2+0x2b] +XDIS 1bac8: MISC BASE D54B8D54742C lea r18, ptr [r12+r14*2+0x2c] +XDIS 1bace: MISC BASE D54B8D54752D lea r18, ptr [r13+r14*2+0x2d] +XDIS 1bad4: MISC BASE D54B8D54762E lea r18, ptr [r14+r14*2+0x2e] +XDIS 1bada: MISC BASE D54B8D54772F lea r18, ptr [r15+r14*2+0x2f] +XDIS 1bae0: MISC BASE D55A8D547030 lea r18, ptr [r16+r14*2+0x30] +XDIS 1bae6: MISC BASE D55A8D547131 lea r18, ptr [r17+r14*2+0x31] +XDIS 1baec: MISC BASE D55A8D547232 lea r18, ptr [r18+r14*2+0x32] +XDIS 1baf2: MISC BASE D55A8D547333 lea r18, ptr [r19+r14*2+0x33] +XDIS 1baf8: MISC BASE D55A8D547434 lea r18, ptr [r20+r14*2+0x34] +XDIS 1bafe: MISC BASE D55A8D547535 lea r18, ptr [r21+r14*2+0x35] +XDIS 1bb04: MISC BASE D55A8D547636 lea r18, ptr [r22+r14*2+0x36] +XDIS 1bb0a: MISC BASE D55A8D547737 lea r18, ptr [r23+r14*2+0x37] +XDIS 1bb10: MISC BASE D55B8D547038 lea r18, ptr [r24+r14*2+0x38] +XDIS 1bb16: MISC BASE D55B8D547139 lea r18, ptr [r25+r14*2+0x39] +XDIS 1bb1c: MISC BASE D55B8D54723A lea r18, ptr [r26+r14*2+0x3a] +XDIS 1bb22: MISC BASE D55B8D54733B lea r18, ptr [r27+r14*2+0x3b] +XDIS 1bb28: MISC BASE D55B8D54743C lea r18, ptr [r28+r14*2+0x3c] +XDIS 1bb2e: MISC BASE D55B8D54753D lea r18, ptr [r29+r14*2+0x3d] +XDIS 1bb34: MISC BASE D55B8D54763E lea r18, ptr [r30+r14*2+0x3e] +XDIS 1bb3a: MISC BASE D55B8D54773F lea r18, ptr [r31+r14*2+0x3f] +XDIS 1bb40: MISC BASE D54A8D547821 lea r18, ptr [rax+r15*2+0x21] +XDIS 1bb46: MISC BASE D54A8D547922 lea r18, ptr [rcx+r15*2+0x22] +XDIS 1bb4c: MISC BASE D54A8D547A23 lea r18, ptr [rdx+r15*2+0x23] +XDIS 1bb52: MISC BASE D54A8D547B24 lea r18, ptr [rbx+r15*2+0x24] +XDIS 1bb58: MISC BASE D54A8D547C25 lea r18, ptr [rsp+r15*2+0x25] +XDIS 1bb5e: MISC BASE D54A8D547D26 lea r18, ptr [rbp+r15*2+0x26] +XDIS 1bb64: MISC BASE D54A8D547E27 lea r18, ptr [rsi+r15*2+0x27] +XDIS 1bb6a: MISC BASE D54A8D547F28 lea r18, ptr [rdi+r15*2+0x28] +XDIS 1bb70: MISC BASE D54B8D547829 lea r18, ptr [r8+r15*2+0x29] +XDIS 1bb76: MISC BASE D54B8D54792A lea r18, ptr [r9+r15*2+0x2a] +XDIS 1bb7c: MISC BASE D54B8D547A2B lea r18, ptr [r10+r15*2+0x2b] +XDIS 1bb82: MISC BASE D54B8D547B2C lea r18, ptr [r11+r15*2+0x2c] +XDIS 1bb88: MISC BASE D54B8D547C2D lea r18, ptr [r12+r15*2+0x2d] +XDIS 1bb8e: MISC BASE D54B8D547D2E lea r18, ptr [r13+r15*2+0x2e] +XDIS 1bb94: MISC BASE D54B8D547E2F lea r18, ptr [r14+r15*2+0x2f] +XDIS 1bb9a: MISC BASE D54B8D547F30 lea r18, ptr [r15+r15*2+0x30] +XDIS 1bba0: MISC BASE D55A8D547831 lea r18, ptr [r16+r15*2+0x31] +XDIS 1bba6: MISC BASE D55A8D547932 lea r18, ptr [r17+r15*2+0x32] +XDIS 1bbac: MISC BASE D55A8D547A33 lea r18, ptr [r18+r15*2+0x33] +XDIS 1bbb2: MISC BASE D55A8D547B34 lea r18, ptr [r19+r15*2+0x34] +XDIS 1bbb8: MISC BASE D55A8D547C35 lea r18, ptr [r20+r15*2+0x35] +XDIS 1bbbe: MISC BASE D55A8D547D36 lea r18, ptr [r21+r15*2+0x36] +XDIS 1bbc4: MISC BASE D55A8D547E37 lea r18, ptr [r22+r15*2+0x37] +XDIS 1bbca: MISC BASE D55A8D547F38 lea r18, ptr [r23+r15*2+0x38] +XDIS 1bbd0: MISC BASE D55B8D547839 lea r18, ptr [r24+r15*2+0x39] +XDIS 1bbd6: MISC BASE D55B8D54793A lea r18, ptr [r25+r15*2+0x3a] +XDIS 1bbdc: MISC BASE D55B8D547A3B lea r18, ptr [r26+r15*2+0x3b] +XDIS 1bbe2: MISC BASE D55B8D547B3C lea r18, ptr [r27+r15*2+0x3c] +XDIS 1bbe8: MISC BASE D55B8D547C3D lea r18, ptr [r28+r15*2+0x3d] +XDIS 1bbee: MISC BASE D55B8D547D3E lea r18, ptr [r29+r15*2+0x3e] +XDIS 1bbf4: MISC BASE D55B8D547E3F lea r18, ptr [r30+r15*2+0x3f] +XDIS 1bbfa: MISC BASE D55B8D547F40 lea r18, ptr [r31+r15*2+0x40] +XDIS 1bc00: MISC BASE D5688D544022 lea r18, ptr [rax+r16*2+0x22] +XDIS 1bc06: MISC BASE D5688D544123 lea r18, ptr [rcx+r16*2+0x23] +XDIS 1bc0c: MISC BASE D5688D544224 lea r18, ptr [rdx+r16*2+0x24] +XDIS 1bc12: MISC BASE D5688D544325 lea r18, ptr [rbx+r16*2+0x25] +XDIS 1bc18: MISC BASE D5688D544426 lea r18, ptr [rsp+r16*2+0x26] +XDIS 1bc1e: MISC BASE D5688D544527 lea r18, ptr [rbp+r16*2+0x27] +XDIS 1bc24: MISC BASE D5688D544628 lea r18, ptr [rsi+r16*2+0x28] +XDIS 1bc2a: MISC BASE D5688D544729 lea r18, ptr [rdi+r16*2+0x29] +XDIS 1bc30: MISC BASE D5698D54402A lea r18, ptr [r8+r16*2+0x2a] +XDIS 1bc36: MISC BASE D5698D54412B lea r18, ptr [r9+r16*2+0x2b] +XDIS 1bc3c: MISC BASE D5698D54422C lea r18, ptr [r10+r16*2+0x2c] +XDIS 1bc42: MISC BASE D5698D54432D lea r18, ptr [r11+r16*2+0x2d] +XDIS 1bc48: MISC BASE D5698D54442E lea r18, ptr [r12+r16*2+0x2e] +XDIS 1bc4e: MISC BASE D5698D54452F lea r18, ptr [r13+r16*2+0x2f] +XDIS 1bc54: MISC BASE D5698D544630 lea r18, ptr [r14+r16*2+0x30] +XDIS 1bc5a: MISC BASE D5698D544731 lea r18, ptr [r15+r16*2+0x31] +XDIS 1bc60: MISC BASE D5788D544032 lea r18, ptr [r16+r16*2+0x32] +XDIS 1bc66: MISC BASE D5788D544133 lea r18, ptr [r17+r16*2+0x33] +XDIS 1bc6c: MISC BASE D5788D544234 lea r18, ptr [r18+r16*2+0x34] +XDIS 1bc72: MISC BASE D5788D544335 lea r18, ptr [r19+r16*2+0x35] +XDIS 1bc78: MISC BASE D5788D544436 lea r18, ptr [r20+r16*2+0x36] +XDIS 1bc7e: MISC BASE D5788D544537 lea r18, ptr [r21+r16*2+0x37] +XDIS 1bc84: MISC BASE D5788D544638 lea r18, ptr [r22+r16*2+0x38] +XDIS 1bc8a: MISC BASE D5788D544739 lea r18, ptr [r23+r16*2+0x39] +XDIS 1bc90: MISC BASE D5798D54403A lea r18, ptr [r24+r16*2+0x3a] +XDIS 1bc96: MISC BASE D5798D54413B lea r18, ptr [r25+r16*2+0x3b] +XDIS 1bc9c: MISC BASE D5798D54423C lea r18, ptr [r26+r16*2+0x3c] +XDIS 1bca2: MISC BASE D5798D54433D lea r18, ptr [r27+r16*2+0x3d] +XDIS 1bca8: MISC BASE D5798D54443E lea r18, ptr [r28+r16*2+0x3e] +XDIS 1bcae: MISC BASE D5798D54453F lea r18, ptr [r29+r16*2+0x3f] +XDIS 1bcb4: MISC BASE D5798D544640 lea r18, ptr [r30+r16*2+0x40] +XDIS 1bcba: MISC BASE D5798D544741 lea r18, ptr [r31+r16*2+0x41] +XDIS 1bcc0: MISC BASE D5688D544823 lea r18, ptr [rax+r17*2+0x23] +XDIS 1bcc6: MISC BASE D5688D544924 lea r18, ptr [rcx+r17*2+0x24] +XDIS 1bccc: MISC BASE D5688D544A25 lea r18, ptr [rdx+r17*2+0x25] +XDIS 1bcd2: MISC BASE D5688D544B26 lea r18, ptr [rbx+r17*2+0x26] +XDIS 1bcd8: MISC BASE D5688D544C27 lea r18, ptr [rsp+r17*2+0x27] +XDIS 1bcde: MISC BASE D5688D544D28 lea r18, ptr [rbp+r17*2+0x28] +XDIS 1bce4: MISC BASE D5688D544E29 lea r18, ptr [rsi+r17*2+0x29] +XDIS 1bcea: MISC BASE D5688D544F2A lea r18, ptr [rdi+r17*2+0x2a] +XDIS 1bcf0: MISC BASE D5698D54482B lea r18, ptr [r8+r17*2+0x2b] +XDIS 1bcf6: MISC BASE D5698D54492C lea r18, ptr [r9+r17*2+0x2c] +XDIS 1bcfc: MISC BASE D5698D544A2D lea r18, ptr [r10+r17*2+0x2d] +XDIS 1bd02: MISC BASE D5698D544B2E lea r18, ptr [r11+r17*2+0x2e] +XDIS 1bd08: MISC BASE D5698D544C2F lea r18, ptr [r12+r17*2+0x2f] +XDIS 1bd0e: MISC BASE D5698D544D30 lea r18, ptr [r13+r17*2+0x30] +XDIS 1bd14: MISC BASE D5698D544E31 lea r18, ptr [r14+r17*2+0x31] +XDIS 1bd1a: MISC BASE D5698D544F32 lea r18, ptr [r15+r17*2+0x32] +XDIS 1bd20: MISC BASE D5788D544833 lea r18, ptr [r16+r17*2+0x33] +XDIS 1bd26: MISC BASE D5788D544934 lea r18, ptr [r17+r17*2+0x34] +XDIS 1bd2c: MISC BASE D5788D544A35 lea r18, ptr [r18+r17*2+0x35] +XDIS 1bd32: MISC BASE D5788D544B36 lea r18, ptr [r19+r17*2+0x36] +XDIS 1bd38: MISC BASE D5788D544C37 lea r18, ptr [r20+r17*2+0x37] +XDIS 1bd3e: MISC BASE D5788D544D38 lea r18, ptr [r21+r17*2+0x38] +XDIS 1bd44: MISC BASE D5788D544E39 lea r18, ptr [r22+r17*2+0x39] +XDIS 1bd4a: MISC BASE D5788D544F3A lea r18, ptr [r23+r17*2+0x3a] +XDIS 1bd50: MISC BASE D5798D54483B lea r18, ptr [r24+r17*2+0x3b] +XDIS 1bd56: MISC BASE D5798D54493C lea r18, ptr [r25+r17*2+0x3c] +XDIS 1bd5c: MISC BASE D5798D544A3D lea r18, ptr [r26+r17*2+0x3d] +XDIS 1bd62: MISC BASE D5798D544B3E lea r18, ptr [r27+r17*2+0x3e] +XDIS 1bd68: MISC BASE D5798D544C3F lea r18, ptr [r28+r17*2+0x3f] +XDIS 1bd6e: MISC BASE D5798D544D40 lea r18, ptr [r29+r17*2+0x40] +XDIS 1bd74: MISC BASE D5798D544E41 lea r18, ptr [r30+r17*2+0x41] +XDIS 1bd7a: MISC BASE D5798D544F42 lea r18, ptr [r31+r17*2+0x42] +XDIS 1bd80: MISC BASE D5688D545024 lea r18, ptr [rax+r18*2+0x24] +XDIS 1bd86: MISC BASE D5688D545125 lea r18, ptr [rcx+r18*2+0x25] +XDIS 1bd8c: MISC BASE D5688D545226 lea r18, ptr [rdx+r18*2+0x26] +XDIS 1bd92: MISC BASE D5688D545327 lea r18, ptr [rbx+r18*2+0x27] +XDIS 1bd98: MISC BASE D5688D545428 lea r18, ptr [rsp+r18*2+0x28] +XDIS 1bd9e: MISC BASE D5688D545529 lea r18, ptr [rbp+r18*2+0x29] +XDIS 1bda4: MISC BASE D5688D54562A lea r18, ptr [rsi+r18*2+0x2a] +XDIS 1bdaa: MISC BASE D5688D54572B lea r18, ptr [rdi+r18*2+0x2b] +XDIS 1bdb0: MISC BASE D5698D54502C lea r18, ptr [r8+r18*2+0x2c] +XDIS 1bdb6: MISC BASE D5698D54512D lea r18, ptr [r9+r18*2+0x2d] +XDIS 1bdbc: MISC BASE D5698D54522E lea r18, ptr [r10+r18*2+0x2e] +XDIS 1bdc2: MISC BASE D5698D54532F lea r18, ptr [r11+r18*2+0x2f] +XDIS 1bdc8: MISC BASE D5698D545430 lea r18, ptr [r12+r18*2+0x30] +XDIS 1bdce: MISC BASE D5698D545531 lea r18, ptr [r13+r18*2+0x31] +XDIS 1bdd4: MISC BASE D5698D545632 lea r18, ptr [r14+r18*2+0x32] +XDIS 1bdda: MISC BASE D5698D545733 lea r18, ptr [r15+r18*2+0x33] +XDIS 1bde0: MISC BASE D5788D545034 lea r18, ptr [r16+r18*2+0x34] +XDIS 1bde6: MISC BASE D5788D545135 lea r18, ptr [r17+r18*2+0x35] +XDIS 1bdec: MISC BASE D5788D545236 lea r18, ptr [r18+r18*2+0x36] +XDIS 1bdf2: MISC BASE D5788D545337 lea r18, ptr [r19+r18*2+0x37] +XDIS 1bdf8: MISC BASE D5788D545438 lea r18, ptr [r20+r18*2+0x38] +XDIS 1bdfe: MISC BASE D5788D545539 lea r18, ptr [r21+r18*2+0x39] +XDIS 1be04: MISC BASE D5788D54563A lea r18, ptr [r22+r18*2+0x3a] +XDIS 1be0a: MISC BASE D5788D54573B lea r18, ptr [r23+r18*2+0x3b] +XDIS 1be10: MISC BASE D5798D54503C lea r18, ptr [r24+r18*2+0x3c] +XDIS 1be16: MISC BASE D5798D54513D lea r18, ptr [r25+r18*2+0x3d] +XDIS 1be1c: MISC BASE D5798D54523E lea r18, ptr [r26+r18*2+0x3e] +XDIS 1be22: MISC BASE D5798D54533F lea r18, ptr [r27+r18*2+0x3f] +XDIS 1be28: MISC BASE D5798D545440 lea r18, ptr [r28+r18*2+0x40] +XDIS 1be2e: MISC BASE D5798D545541 lea r18, ptr [r29+r18*2+0x41] +XDIS 1be34: MISC BASE D5798D545642 lea r18, ptr [r30+r18*2+0x42] +XDIS 1be3a: MISC BASE D5798D545743 lea r18, ptr [r31+r18*2+0x43] +XDIS 1be40: MISC BASE D5688D545825 lea r18, ptr [rax+r19*2+0x25] +XDIS 1be46: MISC BASE D5688D545926 lea r18, ptr [rcx+r19*2+0x26] +XDIS 1be4c: MISC BASE D5688D545A27 lea r18, ptr [rdx+r19*2+0x27] +XDIS 1be52: MISC BASE D5688D545B28 lea r18, ptr [rbx+r19*2+0x28] +XDIS 1be58: MISC BASE D5688D545C29 lea r18, ptr [rsp+r19*2+0x29] +XDIS 1be5e: MISC BASE D5688D545D2A lea r18, ptr [rbp+r19*2+0x2a] +XDIS 1be64: MISC BASE D5688D545E2B lea r18, ptr [rsi+r19*2+0x2b] +XDIS 1be6a: MISC BASE D5688D545F2C lea r18, ptr [rdi+r19*2+0x2c] +XDIS 1be70: MISC BASE D5698D54582D lea r18, ptr [r8+r19*2+0x2d] +XDIS 1be76: MISC BASE D5698D54592E lea r18, ptr [r9+r19*2+0x2e] +XDIS 1be7c: MISC BASE D5698D545A2F lea r18, ptr [r10+r19*2+0x2f] +XDIS 1be82: MISC BASE D5698D545B30 lea r18, ptr [r11+r19*2+0x30] +XDIS 1be88: MISC BASE D5698D545C31 lea r18, ptr [r12+r19*2+0x31] +XDIS 1be8e: MISC BASE D5698D545D32 lea r18, ptr [r13+r19*2+0x32] +XDIS 1be94: MISC BASE D5698D545E33 lea r18, ptr [r14+r19*2+0x33] +XDIS 1be9a: MISC BASE D5698D545F34 lea r18, ptr [r15+r19*2+0x34] +XDIS 1bea0: MISC BASE D5788D545835 lea r18, ptr [r16+r19*2+0x35] +XDIS 1bea6: MISC BASE D5788D545936 lea r18, ptr [r17+r19*2+0x36] +XDIS 1beac: MISC BASE D5788D545A37 lea r18, ptr [r18+r19*2+0x37] +XDIS 1beb2: MISC BASE D5788D545B38 lea r18, ptr [r19+r19*2+0x38] +XDIS 1beb8: MISC BASE D5788D545C39 lea r18, ptr [r20+r19*2+0x39] +XDIS 1bebe: MISC BASE D5788D545D3A lea r18, ptr [r21+r19*2+0x3a] +XDIS 1bec4: MISC BASE D5788D545E3B lea r18, ptr [r22+r19*2+0x3b] +XDIS 1beca: MISC BASE D5788D545F3C lea r18, ptr [r23+r19*2+0x3c] +XDIS 1bed0: MISC BASE D5798D54583D lea r18, ptr [r24+r19*2+0x3d] +XDIS 1bed6: MISC BASE D5798D54593E lea r18, ptr [r25+r19*2+0x3e] +XDIS 1bedc: MISC BASE D5798D545A3F lea r18, ptr [r26+r19*2+0x3f] +XDIS 1bee2: MISC BASE D5798D545B40 lea r18, ptr [r27+r19*2+0x40] +XDIS 1bee8: MISC BASE D5798D545C41 lea r18, ptr [r28+r19*2+0x41] +XDIS 1beee: MISC BASE D5798D545D42 lea r18, ptr [r29+r19*2+0x42] +XDIS 1bef4: MISC BASE D5798D545E43 lea r18, ptr [r30+r19*2+0x43] +XDIS 1befa: MISC BASE D5798D545F44 lea r18, ptr [r31+r19*2+0x44] +XDIS 1bf00: MISC BASE D5688D546026 lea r18, ptr [rax+r20*2+0x26] +XDIS 1bf06: MISC BASE D5688D546127 lea r18, ptr [rcx+r20*2+0x27] +XDIS 1bf0c: MISC BASE D5688D546228 lea r18, ptr [rdx+r20*2+0x28] +XDIS 1bf12: MISC BASE D5688D546329 lea r18, ptr [rbx+r20*2+0x29] +XDIS 1bf18: MISC BASE D5688D54642A lea r18, ptr [rsp+r20*2+0x2a] +XDIS 1bf1e: MISC BASE D5688D54652B lea r18, ptr [rbp+r20*2+0x2b] +XDIS 1bf24: MISC BASE D5688D54662C lea r18, ptr [rsi+r20*2+0x2c] +XDIS 1bf2a: MISC BASE D5688D54672D lea r18, ptr [rdi+r20*2+0x2d] +XDIS 1bf30: MISC BASE D5698D54602E lea r18, ptr [r8+r20*2+0x2e] +XDIS 1bf36: MISC BASE D5698D54612F lea r18, ptr [r9+r20*2+0x2f] +XDIS 1bf3c: MISC BASE D5698D546230 lea r18, ptr [r10+r20*2+0x30] +XDIS 1bf42: MISC BASE D5698D546331 lea r18, ptr [r11+r20*2+0x31] +XDIS 1bf48: MISC BASE D5698D546432 lea r18, ptr [r12+r20*2+0x32] +XDIS 1bf4e: MISC BASE D5698D546533 lea r18, ptr [r13+r20*2+0x33] +XDIS 1bf54: MISC BASE D5698D546634 lea r18, ptr [r14+r20*2+0x34] +XDIS 1bf5a: MISC BASE D5698D546735 lea r18, ptr [r15+r20*2+0x35] +XDIS 1bf60: MISC BASE D5788D546036 lea r18, ptr [r16+r20*2+0x36] +XDIS 1bf66: MISC BASE D5788D546137 lea r18, ptr [r17+r20*2+0x37] +XDIS 1bf6c: MISC BASE D5788D546238 lea r18, ptr [r18+r20*2+0x38] +XDIS 1bf72: MISC BASE D5788D546339 lea r18, ptr [r19+r20*2+0x39] +XDIS 1bf78: MISC BASE D5788D54643A lea r18, ptr [r20+r20*2+0x3a] +XDIS 1bf7e: MISC BASE D5788D54653B lea r18, ptr [r21+r20*2+0x3b] +XDIS 1bf84: MISC BASE D5788D54663C lea r18, ptr [r22+r20*2+0x3c] +XDIS 1bf8a: MISC BASE D5788D54673D lea r18, ptr [r23+r20*2+0x3d] +XDIS 1bf90: MISC BASE D5798D54603E lea r18, ptr [r24+r20*2+0x3e] +XDIS 1bf96: MISC BASE D5798D54613F lea r18, ptr [r25+r20*2+0x3f] +XDIS 1bf9c: MISC BASE D5798D546240 lea r18, ptr [r26+r20*2+0x40] +XDIS 1bfa2: MISC BASE D5798D546341 lea r18, ptr [r27+r20*2+0x41] +XDIS 1bfa8: MISC BASE D5798D546442 lea r18, ptr [r28+r20*2+0x42] +XDIS 1bfae: MISC BASE D5798D546543 lea r18, ptr [r29+r20*2+0x43] +XDIS 1bfb4: MISC BASE D5798D546644 lea r18, ptr [r30+r20*2+0x44] +XDIS 1bfba: MISC BASE D5798D546745 lea r18, ptr [r31+r20*2+0x45] +XDIS 1bfc0: MISC BASE D5688D546827 lea r18, ptr [rax+r21*2+0x27] +XDIS 1bfc6: MISC BASE D5688D546928 lea r18, ptr [rcx+r21*2+0x28] +XDIS 1bfcc: MISC BASE D5688D546A29 lea r18, ptr [rdx+r21*2+0x29] +XDIS 1bfd2: MISC BASE D5688D546B2A lea r18, ptr [rbx+r21*2+0x2a] +XDIS 1bfd8: MISC BASE D5688D546C2B lea r18, ptr [rsp+r21*2+0x2b] +XDIS 1bfde: MISC BASE D5688D546D2C lea r18, ptr [rbp+r21*2+0x2c] +XDIS 1bfe4: MISC BASE D5688D546E2D lea r18, ptr [rsi+r21*2+0x2d] +XDIS 1bfea: MISC BASE D5688D546F2E lea r18, ptr [rdi+r21*2+0x2e] +XDIS 1bff0: MISC BASE D5698D54682F lea r18, ptr [r8+r21*2+0x2f] +XDIS 1bff6: MISC BASE D5698D546930 lea r18, ptr [r9+r21*2+0x30] +XDIS 1bffc: MISC BASE D5698D546A31 lea r18, ptr [r10+r21*2+0x31] +XDIS 1c002: MISC BASE D5698D546B32 lea r18, ptr [r11+r21*2+0x32] +XDIS 1c008: MISC BASE D5698D546C33 lea r18, ptr [r12+r21*2+0x33] +XDIS 1c00e: MISC BASE D5698D546D34 lea r18, ptr [r13+r21*2+0x34] +XDIS 1c014: MISC BASE D5698D546E35 lea r18, ptr [r14+r21*2+0x35] +XDIS 1c01a: MISC BASE D5698D546F36 lea r18, ptr [r15+r21*2+0x36] +XDIS 1c020: MISC BASE D5788D546837 lea r18, ptr [r16+r21*2+0x37] +XDIS 1c026: MISC BASE D5788D546938 lea r18, ptr [r17+r21*2+0x38] +XDIS 1c02c: MISC BASE D5788D546A39 lea r18, ptr [r18+r21*2+0x39] +XDIS 1c032: MISC BASE D5788D546B3A lea r18, ptr [r19+r21*2+0x3a] +XDIS 1c038: MISC BASE D5788D546C3B lea r18, ptr [r20+r21*2+0x3b] +XDIS 1c03e: MISC BASE D5788D546D3C lea r18, ptr [r21+r21*2+0x3c] +XDIS 1c044: MISC BASE D5788D546E3D lea r18, ptr [r22+r21*2+0x3d] +XDIS 1c04a: MISC BASE D5788D546F3E lea r18, ptr [r23+r21*2+0x3e] +XDIS 1c050: MISC BASE D5798D54683F lea r18, ptr [r24+r21*2+0x3f] +XDIS 1c056: MISC BASE D5798D546940 lea r18, ptr [r25+r21*2+0x40] +XDIS 1c05c: MISC BASE D5798D546A41 lea r18, ptr [r26+r21*2+0x41] +XDIS 1c062: MISC BASE D5798D546B42 lea r18, ptr [r27+r21*2+0x42] +XDIS 1c068: MISC BASE D5798D546C43 lea r18, ptr [r28+r21*2+0x43] +XDIS 1c06e: MISC BASE D5798D546D44 lea r18, ptr [r29+r21*2+0x44] +XDIS 1c074: MISC BASE D5798D546E45 lea r18, ptr [r30+r21*2+0x45] +XDIS 1c07a: MISC BASE D5798D546F46 lea r18, ptr [r31+r21*2+0x46] +XDIS 1c080: MISC BASE D5688D547028 lea r18, ptr [rax+r22*2+0x28] +XDIS 1c086: MISC BASE D5688D547129 lea r18, ptr [rcx+r22*2+0x29] +XDIS 1c08c: MISC BASE D5688D54722A lea r18, ptr [rdx+r22*2+0x2a] +XDIS 1c092: MISC BASE D5688D54732B lea r18, ptr [rbx+r22*2+0x2b] +XDIS 1c098: MISC BASE D5688D54742C lea r18, ptr [rsp+r22*2+0x2c] +XDIS 1c09e: MISC BASE D5688D54752D lea r18, ptr [rbp+r22*2+0x2d] +XDIS 1c0a4: MISC BASE D5688D54762E lea r18, ptr [rsi+r22*2+0x2e] +XDIS 1c0aa: MISC BASE D5688D54772F lea r18, ptr [rdi+r22*2+0x2f] +XDIS 1c0b0: MISC BASE D5698D547030 lea r18, ptr [r8+r22*2+0x30] +XDIS 1c0b6: MISC BASE D5698D547131 lea r18, ptr [r9+r22*2+0x31] +XDIS 1c0bc: MISC BASE D5698D547232 lea r18, ptr [r10+r22*2+0x32] +XDIS 1c0c2: MISC BASE D5698D547333 lea r18, ptr [r11+r22*2+0x33] +XDIS 1c0c8: MISC BASE D5698D547434 lea r18, ptr [r12+r22*2+0x34] +XDIS 1c0ce: MISC BASE D5698D547535 lea r18, ptr [r13+r22*2+0x35] +XDIS 1c0d4: MISC BASE D5698D547636 lea r18, ptr [r14+r22*2+0x36] +XDIS 1c0da: MISC BASE D5698D547737 lea r18, ptr [r15+r22*2+0x37] +XDIS 1c0e0: MISC BASE D5788D547038 lea r18, ptr [r16+r22*2+0x38] +XDIS 1c0e6: MISC BASE D5788D547139 lea r18, ptr [r17+r22*2+0x39] +XDIS 1c0ec: MISC BASE D5788D54723A lea r18, ptr [r18+r22*2+0x3a] +XDIS 1c0f2: MISC BASE D5788D54733B lea r18, ptr [r19+r22*2+0x3b] +XDIS 1c0f8: MISC BASE D5788D54743C lea r18, ptr [r20+r22*2+0x3c] +XDIS 1c0fe: MISC BASE D5788D54753D lea r18, ptr [r21+r22*2+0x3d] +XDIS 1c104: MISC BASE D5788D54763E lea r18, ptr [r22+r22*2+0x3e] +XDIS 1c10a: MISC BASE D5788D54773F lea r18, ptr [r23+r22*2+0x3f] +XDIS 1c110: MISC BASE D5798D547040 lea r18, ptr [r24+r22*2+0x40] +XDIS 1c116: MISC BASE D5798D547141 lea r18, ptr [r25+r22*2+0x41] +XDIS 1c11c: MISC BASE D5798D547242 lea r18, ptr [r26+r22*2+0x42] +XDIS 1c122: MISC BASE D5798D547343 lea r18, ptr [r27+r22*2+0x43] +XDIS 1c128: MISC BASE D5798D547444 lea r18, ptr [r28+r22*2+0x44] +XDIS 1c12e: MISC BASE D5798D547545 lea r18, ptr [r29+r22*2+0x45] +XDIS 1c134: MISC BASE D5798D547646 lea r18, ptr [r30+r22*2+0x46] +XDIS 1c13a: MISC BASE D5798D547747 lea r18, ptr [r31+r22*2+0x47] +XDIS 1c140: MISC BASE D5688D547829 lea r18, ptr [rax+r23*2+0x29] +XDIS 1c146: MISC BASE D5688D54792A lea r18, ptr [rcx+r23*2+0x2a] +XDIS 1c14c: MISC BASE D5688D547A2B lea r18, ptr [rdx+r23*2+0x2b] +XDIS 1c152: MISC BASE D5688D547B2C lea r18, ptr [rbx+r23*2+0x2c] +XDIS 1c158: MISC BASE D5688D547C2D lea r18, ptr [rsp+r23*2+0x2d] +XDIS 1c15e: MISC BASE D5688D547D2E lea r18, ptr [rbp+r23*2+0x2e] +XDIS 1c164: MISC BASE D5688D547E2F lea r18, ptr [rsi+r23*2+0x2f] +XDIS 1c16a: MISC BASE D5688D547F30 lea r18, ptr [rdi+r23*2+0x30] +XDIS 1c170: MISC BASE D5698D547831 lea r18, ptr [r8+r23*2+0x31] +XDIS 1c176: MISC BASE D5698D547932 lea r18, ptr [r9+r23*2+0x32] +XDIS 1c17c: MISC BASE D5698D547A33 lea r18, ptr [r10+r23*2+0x33] +XDIS 1c182: MISC BASE D5698D547B34 lea r18, ptr [r11+r23*2+0x34] +XDIS 1c188: MISC BASE D5698D547C35 lea r18, ptr [r12+r23*2+0x35] +XDIS 1c18e: MISC BASE D5698D547D36 lea r18, ptr [r13+r23*2+0x36] +XDIS 1c194: MISC BASE D5698D547E37 lea r18, ptr [r14+r23*2+0x37] +XDIS 1c19a: MISC BASE D5698D547F38 lea r18, ptr [r15+r23*2+0x38] +XDIS 1c1a0: MISC BASE D5788D547839 lea r18, ptr [r16+r23*2+0x39] +XDIS 1c1a6: MISC BASE D5788D54793A lea r18, ptr [r17+r23*2+0x3a] +XDIS 1c1ac: MISC BASE D5788D547A3B lea r18, ptr [r18+r23*2+0x3b] +XDIS 1c1b2: MISC BASE D5788D547B3C lea r18, ptr [r19+r23*2+0x3c] +XDIS 1c1b8: MISC BASE D5788D547C3D lea r18, ptr [r20+r23*2+0x3d] +XDIS 1c1be: MISC BASE D5788D547D3E lea r18, ptr [r21+r23*2+0x3e] +XDIS 1c1c4: MISC BASE D5788D547E3F lea r18, ptr [r22+r23*2+0x3f] +XDIS 1c1ca: MISC BASE D5788D547F40 lea r18, ptr [r23+r23*2+0x40] +XDIS 1c1d0: MISC BASE D5798D547841 lea r18, ptr [r24+r23*2+0x41] +XDIS 1c1d6: MISC BASE D5798D547942 lea r18, ptr [r25+r23*2+0x42] +XDIS 1c1dc: MISC BASE D5798D547A43 lea r18, ptr [r26+r23*2+0x43] +XDIS 1c1e2: MISC BASE D5798D547B44 lea r18, ptr [r27+r23*2+0x44] +XDIS 1c1e8: MISC BASE D5798D547C45 lea r18, ptr [r28+r23*2+0x45] +XDIS 1c1ee: MISC BASE D5798D547D46 lea r18, ptr [r29+r23*2+0x46] +XDIS 1c1f4: MISC BASE D5798D547E47 lea r18, ptr [r30+r23*2+0x47] +XDIS 1c1fa: MISC BASE D5798D547F48 lea r18, ptr [r31+r23*2+0x48] +XDIS 1c200: MISC BASE D56A8D54402A lea r18, ptr [rax+r24*2+0x2a] +XDIS 1c206: MISC BASE D56A8D54412B lea r18, ptr [rcx+r24*2+0x2b] +XDIS 1c20c: MISC BASE D56A8D54422C lea r18, ptr [rdx+r24*2+0x2c] +XDIS 1c212: MISC BASE D56A8D54432D lea r18, ptr [rbx+r24*2+0x2d] +XDIS 1c218: MISC BASE D56A8D54442E lea r18, ptr [rsp+r24*2+0x2e] +XDIS 1c21e: MISC BASE D56A8D54452F lea r18, ptr [rbp+r24*2+0x2f] +XDIS 1c224: MISC BASE D56A8D544630 lea r18, ptr [rsi+r24*2+0x30] +XDIS 1c22a: MISC BASE D56A8D544731 lea r18, ptr [rdi+r24*2+0x31] +XDIS 1c230: MISC BASE D56B8D544032 lea r18, ptr [r8+r24*2+0x32] +XDIS 1c236: MISC BASE D56B8D544133 lea r18, ptr [r9+r24*2+0x33] +XDIS 1c23c: MISC BASE D56B8D544234 lea r18, ptr [r10+r24*2+0x34] +XDIS 1c242: MISC BASE D56B8D544335 lea r18, ptr [r11+r24*2+0x35] +XDIS 1c248: MISC BASE D56B8D544436 lea r18, ptr [r12+r24*2+0x36] +XDIS 1c24e: MISC BASE D56B8D544537 lea r18, ptr [r13+r24*2+0x37] +XDIS 1c254: MISC BASE D56B8D544638 lea r18, ptr [r14+r24*2+0x38] +XDIS 1c25a: MISC BASE D56B8D544739 lea r18, ptr [r15+r24*2+0x39] +XDIS 1c260: MISC BASE D57A8D54403A lea r18, ptr [r16+r24*2+0x3a] +XDIS 1c266: MISC BASE D57A8D54413B lea r18, ptr [r17+r24*2+0x3b] +XDIS 1c26c: MISC BASE D57A8D54423C lea r18, ptr [r18+r24*2+0x3c] +XDIS 1c272: MISC BASE D57A8D54433D lea r18, ptr [r19+r24*2+0x3d] +XDIS 1c278: MISC BASE D57A8D54443E lea r18, ptr [r20+r24*2+0x3e] +XDIS 1c27e: MISC BASE D57A8D54453F lea r18, ptr [r21+r24*2+0x3f] +XDIS 1c284: MISC BASE D57A8D544640 lea r18, ptr [r22+r24*2+0x40] +XDIS 1c28a: MISC BASE D57A8D544741 lea r18, ptr [r23+r24*2+0x41] +XDIS 1c290: MISC BASE D57B8D544042 lea r18, ptr [r24+r24*2+0x42] +XDIS 1c296: MISC BASE D57B8D544143 lea r18, ptr [r25+r24*2+0x43] +XDIS 1c29c: MISC BASE D57B8D544244 lea r18, ptr [r26+r24*2+0x44] +XDIS 1c2a2: MISC BASE D57B8D544345 lea r18, ptr [r27+r24*2+0x45] +XDIS 1c2a8: MISC BASE D57B8D544446 lea r18, ptr [r28+r24*2+0x46] +XDIS 1c2ae: MISC BASE D57B8D544547 lea r18, ptr [r29+r24*2+0x47] +XDIS 1c2b4: MISC BASE D57B8D544648 lea r18, ptr [r30+r24*2+0x48] +XDIS 1c2ba: MISC BASE D57B8D544749 lea r18, ptr [r31+r24*2+0x49] +XDIS 1c2c0: MISC BASE D56A8D54482B lea r18, ptr [rax+r25*2+0x2b] +XDIS 1c2c6: MISC BASE D56A8D54492C lea r18, ptr [rcx+r25*2+0x2c] +XDIS 1c2cc: MISC BASE D56A8D544A2D lea r18, ptr [rdx+r25*2+0x2d] +XDIS 1c2d2: MISC BASE D56A8D544B2E lea r18, ptr [rbx+r25*2+0x2e] +XDIS 1c2d8: MISC BASE D56A8D544C2F lea r18, ptr [rsp+r25*2+0x2f] +XDIS 1c2de: MISC BASE D56A8D544D30 lea r18, ptr [rbp+r25*2+0x30] +XDIS 1c2e4: MISC BASE D56A8D544E31 lea r18, ptr [rsi+r25*2+0x31] +XDIS 1c2ea: MISC BASE D56A8D544F32 lea r18, ptr [rdi+r25*2+0x32] +XDIS 1c2f0: MISC BASE D56B8D544833 lea r18, ptr [r8+r25*2+0x33] +XDIS 1c2f6: MISC BASE D56B8D544934 lea r18, ptr [r9+r25*2+0x34] +XDIS 1c2fc: MISC BASE D56B8D544A35 lea r18, ptr [r10+r25*2+0x35] +XDIS 1c302: MISC BASE D56B8D544B36 lea r18, ptr [r11+r25*2+0x36] +XDIS 1c308: MISC BASE D56B8D544C37 lea r18, ptr [r12+r25*2+0x37] +XDIS 1c30e: MISC BASE D56B8D544D38 lea r18, ptr [r13+r25*2+0x38] +XDIS 1c314: MISC BASE D56B8D544E39 lea r18, ptr [r14+r25*2+0x39] +XDIS 1c31a: MISC BASE D56B8D544F3A lea r18, ptr [r15+r25*2+0x3a] +XDIS 1c320: MISC BASE D57A8D54483B lea r18, ptr [r16+r25*2+0x3b] +XDIS 1c326: MISC BASE D57A8D54493C lea r18, ptr [r17+r25*2+0x3c] +XDIS 1c32c: MISC BASE D57A8D544A3D lea r18, ptr [r18+r25*2+0x3d] +XDIS 1c332: MISC BASE D57A8D544B3E lea r18, ptr [r19+r25*2+0x3e] +XDIS 1c338: MISC BASE D57A8D544C3F lea r18, ptr [r20+r25*2+0x3f] +XDIS 1c33e: MISC BASE D57A8D544D40 lea r18, ptr [r21+r25*2+0x40] +XDIS 1c344: MISC BASE D57A8D544E41 lea r18, ptr [r22+r25*2+0x41] +XDIS 1c34a: MISC BASE D57A8D544F42 lea r18, ptr [r23+r25*2+0x42] +XDIS 1c350: MISC BASE D57B8D544843 lea r18, ptr [r24+r25*2+0x43] +XDIS 1c356: MISC BASE D57B8D544944 lea r18, ptr [r25+r25*2+0x44] +XDIS 1c35c: MISC BASE D57B8D544A45 lea r18, ptr [r26+r25*2+0x45] +XDIS 1c362: MISC BASE D57B8D544B46 lea r18, ptr [r27+r25*2+0x46] +XDIS 1c368: MISC BASE D57B8D544C47 lea r18, ptr [r28+r25*2+0x47] +XDIS 1c36e: MISC BASE D57B8D544D48 lea r18, ptr [r29+r25*2+0x48] +XDIS 1c374: MISC BASE D57B8D544E49 lea r18, ptr [r30+r25*2+0x49] +XDIS 1c37a: MISC BASE D57B8D544F4A lea r18, ptr [r31+r25*2+0x4a] +XDIS 1c380: MISC BASE D56A8D54502C lea r18, ptr [rax+r26*2+0x2c] +XDIS 1c386: MISC BASE D56A8D54512D lea r18, ptr [rcx+r26*2+0x2d] +XDIS 1c38c: MISC BASE D56A8D54522E lea r18, ptr [rdx+r26*2+0x2e] +XDIS 1c392: MISC BASE D56A8D54532F lea r18, ptr [rbx+r26*2+0x2f] +XDIS 1c398: MISC BASE D56A8D545430 lea r18, ptr [rsp+r26*2+0x30] +XDIS 1c39e: MISC BASE D56A8D545531 lea r18, ptr [rbp+r26*2+0x31] +XDIS 1c3a4: MISC BASE D56A8D545632 lea r18, ptr [rsi+r26*2+0x32] +XDIS 1c3aa: MISC BASE D56A8D545733 lea r18, ptr [rdi+r26*2+0x33] +XDIS 1c3b0: MISC BASE D56B8D545034 lea r18, ptr [r8+r26*2+0x34] +XDIS 1c3b6: MISC BASE D56B8D545135 lea r18, ptr [r9+r26*2+0x35] +XDIS 1c3bc: MISC BASE D56B8D545236 lea r18, ptr [r10+r26*2+0x36] +XDIS 1c3c2: MISC BASE D56B8D545337 lea r18, ptr [r11+r26*2+0x37] +XDIS 1c3c8: MISC BASE D56B8D545438 lea r18, ptr [r12+r26*2+0x38] +XDIS 1c3ce: MISC BASE D56B8D545539 lea r18, ptr [r13+r26*2+0x39] +XDIS 1c3d4: MISC BASE D56B8D54563A lea r18, ptr [r14+r26*2+0x3a] +XDIS 1c3da: MISC BASE D56B8D54573B lea r18, ptr [r15+r26*2+0x3b] +XDIS 1c3e0: MISC BASE D57A8D54503C lea r18, ptr [r16+r26*2+0x3c] +XDIS 1c3e6: MISC BASE D57A8D54513D lea r18, ptr [r17+r26*2+0x3d] +XDIS 1c3ec: MISC BASE D57A8D54523E lea r18, ptr [r18+r26*2+0x3e] +XDIS 1c3f2: MISC BASE D57A8D54533F lea r18, ptr [r19+r26*2+0x3f] +XDIS 1c3f8: MISC BASE D57A8D545440 lea r18, ptr [r20+r26*2+0x40] +XDIS 1c3fe: MISC BASE D57A8D545541 lea r18, ptr [r21+r26*2+0x41] +XDIS 1c404: MISC BASE D57A8D545642 lea r18, ptr [r22+r26*2+0x42] +XDIS 1c40a: MISC BASE D57A8D545743 lea r18, ptr [r23+r26*2+0x43] +XDIS 1c410: MISC BASE D57B8D545044 lea r18, ptr [r24+r26*2+0x44] +XDIS 1c416: MISC BASE D57B8D545145 lea r18, ptr [r25+r26*2+0x45] +XDIS 1c41c: MISC BASE D57B8D545246 lea r18, ptr [r26+r26*2+0x46] +XDIS 1c422: MISC BASE D57B8D545347 lea r18, ptr [r27+r26*2+0x47] +XDIS 1c428: MISC BASE D57B8D545448 lea r18, ptr [r28+r26*2+0x48] +XDIS 1c42e: MISC BASE D57B8D545549 lea r18, ptr [r29+r26*2+0x49] +XDIS 1c434: MISC BASE D57B8D54564A lea r18, ptr [r30+r26*2+0x4a] +XDIS 1c43a: MISC BASE D57B8D54574B lea r18, ptr [r31+r26*2+0x4b] +XDIS 1c440: MISC BASE D56A8D54582D lea r18, ptr [rax+r27*2+0x2d] +XDIS 1c446: MISC BASE D56A8D54592E lea r18, ptr [rcx+r27*2+0x2e] +XDIS 1c44c: MISC BASE D56A8D545A2F lea r18, ptr [rdx+r27*2+0x2f] +XDIS 1c452: MISC BASE D56A8D545B30 lea r18, ptr [rbx+r27*2+0x30] +XDIS 1c458: MISC BASE D56A8D545C31 lea r18, ptr [rsp+r27*2+0x31] +XDIS 1c45e: MISC BASE D56A8D545D32 lea r18, ptr [rbp+r27*2+0x32] +XDIS 1c464: MISC BASE D56A8D545E33 lea r18, ptr [rsi+r27*2+0x33] +XDIS 1c46a: MISC BASE D56A8D545F34 lea r18, ptr [rdi+r27*2+0x34] +XDIS 1c470: MISC BASE D56B8D545835 lea r18, ptr [r8+r27*2+0x35] +XDIS 1c476: MISC BASE D56B8D545936 lea r18, ptr [r9+r27*2+0x36] +XDIS 1c47c: MISC BASE D56B8D545A37 lea r18, ptr [r10+r27*2+0x37] +XDIS 1c482: MISC BASE D56B8D545B38 lea r18, ptr [r11+r27*2+0x38] +XDIS 1c488: MISC BASE D56B8D545C39 lea r18, ptr [r12+r27*2+0x39] +XDIS 1c48e: MISC BASE D56B8D545D3A lea r18, ptr [r13+r27*2+0x3a] +XDIS 1c494: MISC BASE D56B8D545E3B lea r18, ptr [r14+r27*2+0x3b] +XDIS 1c49a: MISC BASE D56B8D545F3C lea r18, ptr [r15+r27*2+0x3c] +XDIS 1c4a0: MISC BASE D57A8D54583D lea r18, ptr [r16+r27*2+0x3d] +XDIS 1c4a6: MISC BASE D57A8D54593E lea r18, ptr [r17+r27*2+0x3e] +XDIS 1c4ac: MISC BASE D57A8D545A3F lea r18, ptr [r18+r27*2+0x3f] +XDIS 1c4b2: MISC BASE D57A8D545B40 lea r18, ptr [r19+r27*2+0x40] +XDIS 1c4b8: MISC BASE D57A8D545C41 lea r18, ptr [r20+r27*2+0x41] +XDIS 1c4be: MISC BASE D57A8D545D42 lea r18, ptr [r21+r27*2+0x42] +XDIS 1c4c4: MISC BASE D57A8D545E43 lea r18, ptr [r22+r27*2+0x43] +XDIS 1c4ca: MISC BASE D57A8D545F44 lea r18, ptr [r23+r27*2+0x44] +XDIS 1c4d0: MISC BASE D57B8D545845 lea r18, ptr [r24+r27*2+0x45] +XDIS 1c4d6: MISC BASE D57B8D545946 lea r18, ptr [r25+r27*2+0x46] +XDIS 1c4dc: MISC BASE D57B8D545A47 lea r18, ptr [r26+r27*2+0x47] +XDIS 1c4e2: MISC BASE D57B8D545B48 lea r18, ptr [r27+r27*2+0x48] +XDIS 1c4e8: MISC BASE D57B8D545C49 lea r18, ptr [r28+r27*2+0x49] +XDIS 1c4ee: MISC BASE D57B8D545D4A lea r18, ptr [r29+r27*2+0x4a] +XDIS 1c4f4: MISC BASE D57B8D545E4B lea r18, ptr [r30+r27*2+0x4b] +XDIS 1c4fa: MISC BASE D57B8D545F4C lea r18, ptr [r31+r27*2+0x4c] +XDIS 1c500: MISC BASE D56A8D54602E lea r18, ptr [rax+r28*2+0x2e] +XDIS 1c506: MISC BASE D56A8D54612F lea r18, ptr [rcx+r28*2+0x2f] +XDIS 1c50c: MISC BASE D56A8D546230 lea r18, ptr [rdx+r28*2+0x30] +XDIS 1c512: MISC BASE D56A8D546331 lea r18, ptr [rbx+r28*2+0x31] +XDIS 1c518: MISC BASE D56A8D546432 lea r18, ptr [rsp+r28*2+0x32] +XDIS 1c51e: MISC BASE D56A8D546533 lea r18, ptr [rbp+r28*2+0x33] +XDIS 1c524: MISC BASE D56A8D546634 lea r18, ptr [rsi+r28*2+0x34] +XDIS 1c52a: MISC BASE D56A8D546735 lea r18, ptr [rdi+r28*2+0x35] +XDIS 1c530: MISC BASE D56B8D546036 lea r18, ptr [r8+r28*2+0x36] +XDIS 1c536: MISC BASE D56B8D546137 lea r18, ptr [r9+r28*2+0x37] +XDIS 1c53c: MISC BASE D56B8D546238 lea r18, ptr [r10+r28*2+0x38] +XDIS 1c542: MISC BASE D56B8D546339 lea r18, ptr [r11+r28*2+0x39] +XDIS 1c548: MISC BASE D56B8D54643A lea r18, ptr [r12+r28*2+0x3a] +XDIS 1c54e: MISC BASE D56B8D54653B lea r18, ptr [r13+r28*2+0x3b] +XDIS 1c554: MISC BASE D56B8D54663C lea r18, ptr [r14+r28*2+0x3c] +XDIS 1c55a: MISC BASE D56B8D54673D lea r18, ptr [r15+r28*2+0x3d] +XDIS 1c560: MISC BASE D57A8D54603E lea r18, ptr [r16+r28*2+0x3e] +XDIS 1c566: MISC BASE D57A8D54613F lea r18, ptr [r17+r28*2+0x3f] +XDIS 1c56c: MISC BASE D57A8D546240 lea r18, ptr [r18+r28*2+0x40] +XDIS 1c572: MISC BASE D57A8D546341 lea r18, ptr [r19+r28*2+0x41] +XDIS 1c578: MISC BASE D57A8D546442 lea r18, ptr [r20+r28*2+0x42] +XDIS 1c57e: MISC BASE D57A8D546543 lea r18, ptr [r21+r28*2+0x43] +XDIS 1c584: MISC BASE D57A8D546644 lea r18, ptr [r22+r28*2+0x44] +XDIS 1c58a: MISC BASE D57A8D546745 lea r18, ptr [r23+r28*2+0x45] +XDIS 1c590: MISC BASE D57B8D546046 lea r18, ptr [r24+r28*2+0x46] +XDIS 1c596: MISC BASE D57B8D546147 lea r18, ptr [r25+r28*2+0x47] +XDIS 1c59c: MISC BASE D57B8D546248 lea r18, ptr [r26+r28*2+0x48] +XDIS 1c5a2: MISC BASE D57B8D546349 lea r18, ptr [r27+r28*2+0x49] +XDIS 1c5a8: MISC BASE D57B8D54644A lea r18, ptr [r28+r28*2+0x4a] +XDIS 1c5ae: MISC BASE D57B8D54654B lea r18, ptr [r29+r28*2+0x4b] +XDIS 1c5b4: MISC BASE D57B8D54664C lea r18, ptr [r30+r28*2+0x4c] +XDIS 1c5ba: MISC BASE D57B8D54674D lea r18, ptr [r31+r28*2+0x4d] +XDIS 1c5c0: MISC BASE D56A8D54682F lea r18, ptr [rax+r29*2+0x2f] +XDIS 1c5c6: MISC BASE D56A8D546930 lea r18, ptr [rcx+r29*2+0x30] +XDIS 1c5cc: MISC BASE D56A8D546A31 lea r18, ptr [rdx+r29*2+0x31] +XDIS 1c5d2: MISC BASE D56A8D546B32 lea r18, ptr [rbx+r29*2+0x32] +XDIS 1c5d8: MISC BASE D56A8D546C33 lea r18, ptr [rsp+r29*2+0x33] +XDIS 1c5de: MISC BASE D56A8D546D34 lea r18, ptr [rbp+r29*2+0x34] +XDIS 1c5e4: MISC BASE D56A8D546E35 lea r18, ptr [rsi+r29*2+0x35] +XDIS 1c5ea: MISC BASE D56A8D546F36 lea r18, ptr [rdi+r29*2+0x36] +XDIS 1c5f0: MISC BASE D56B8D546837 lea r18, ptr [r8+r29*2+0x37] +XDIS 1c5f6: MISC BASE D56B8D546938 lea r18, ptr [r9+r29*2+0x38] +XDIS 1c5fc: MISC BASE D56B8D546A39 lea r18, ptr [r10+r29*2+0x39] +XDIS 1c602: MISC BASE D56B8D546B3A lea r18, ptr [r11+r29*2+0x3a] +XDIS 1c608: MISC BASE D56B8D546C3B lea r18, ptr [r12+r29*2+0x3b] +XDIS 1c60e: MISC BASE D56B8D546D3C lea r18, ptr [r13+r29*2+0x3c] +XDIS 1c614: MISC BASE D56B8D546E3D lea r18, ptr [r14+r29*2+0x3d] +XDIS 1c61a: MISC BASE D56B8D546F3E lea r18, ptr [r15+r29*2+0x3e] +XDIS 1c620: MISC BASE D57A8D54683F lea r18, ptr [r16+r29*2+0x3f] +XDIS 1c626: MISC BASE D57A8D546940 lea r18, ptr [r17+r29*2+0x40] +XDIS 1c62c: MISC BASE D57A8D546A41 lea r18, ptr [r18+r29*2+0x41] +XDIS 1c632: MISC BASE D57A8D546B42 lea r18, ptr [r19+r29*2+0x42] +XDIS 1c638: MISC BASE D57A8D546C43 lea r18, ptr [r20+r29*2+0x43] +XDIS 1c63e: MISC BASE D57A8D546D44 lea r18, ptr [r21+r29*2+0x44] +XDIS 1c644: MISC BASE D57A8D546E45 lea r18, ptr [r22+r29*2+0x45] +XDIS 1c64a: MISC BASE D57A8D546F46 lea r18, ptr [r23+r29*2+0x46] +XDIS 1c650: MISC BASE D57B8D546847 lea r18, ptr [r24+r29*2+0x47] +XDIS 1c656: MISC BASE D57B8D546948 lea r18, ptr [r25+r29*2+0x48] +XDIS 1c65c: MISC BASE D57B8D546A49 lea r18, ptr [r26+r29*2+0x49] +XDIS 1c662: MISC BASE D57B8D546B4A lea r18, ptr [r27+r29*2+0x4a] +XDIS 1c668: MISC BASE D57B8D546C4B lea r18, ptr [r28+r29*2+0x4b] +XDIS 1c66e: MISC BASE D57B8D546D4C lea r18, ptr [r29+r29*2+0x4c] +XDIS 1c674: MISC BASE D57B8D546E4D lea r18, ptr [r30+r29*2+0x4d] +XDIS 1c67a: MISC BASE D57B8D546F4E lea r18, ptr [r31+r29*2+0x4e] +XDIS 1c680: MISC BASE D56A8D547030 lea r18, ptr [rax+r30*2+0x30] +XDIS 1c686: MISC BASE D56A8D547131 lea r18, ptr [rcx+r30*2+0x31] +XDIS 1c68c: MISC BASE D56A8D547232 lea r18, ptr [rdx+r30*2+0x32] +XDIS 1c692: MISC BASE D56A8D547333 lea r18, ptr [rbx+r30*2+0x33] +XDIS 1c698: MISC BASE D56A8D547434 lea r18, ptr [rsp+r30*2+0x34] +XDIS 1c69e: MISC BASE D56A8D547535 lea r18, ptr [rbp+r30*2+0x35] +XDIS 1c6a4: MISC BASE D56A8D547636 lea r18, ptr [rsi+r30*2+0x36] +XDIS 1c6aa: MISC BASE D56A8D547737 lea r18, ptr [rdi+r30*2+0x37] +XDIS 1c6b0: MISC BASE D56B8D547038 lea r18, ptr [r8+r30*2+0x38] +XDIS 1c6b6: MISC BASE D56B8D547139 lea r18, ptr [r9+r30*2+0x39] +XDIS 1c6bc: MISC BASE D56B8D54723A lea r18, ptr [r10+r30*2+0x3a] +XDIS 1c6c2: MISC BASE D56B8D54733B lea r18, ptr [r11+r30*2+0x3b] +XDIS 1c6c8: MISC BASE D56B8D54743C lea r18, ptr [r12+r30*2+0x3c] +XDIS 1c6ce: MISC BASE D56B8D54753D lea r18, ptr [r13+r30*2+0x3d] +XDIS 1c6d4: MISC BASE D56B8D54763E lea r18, ptr [r14+r30*2+0x3e] +XDIS 1c6da: MISC BASE D56B8D54773F lea r18, ptr [r15+r30*2+0x3f] +XDIS 1c6e0: MISC BASE D57A8D547040 lea r18, ptr [r16+r30*2+0x40] +XDIS 1c6e6: MISC BASE D57A8D547141 lea r18, ptr [r17+r30*2+0x41] +XDIS 1c6ec: MISC BASE D57A8D547242 lea r18, ptr [r18+r30*2+0x42] +XDIS 1c6f2: MISC BASE D57A8D547343 lea r18, ptr [r19+r30*2+0x43] +XDIS 1c6f8: MISC BASE D57A8D547444 lea r18, ptr [r20+r30*2+0x44] +XDIS 1c6fe: MISC BASE D57A8D547545 lea r18, ptr [r21+r30*2+0x45] +XDIS 1c704: MISC BASE D57A8D547646 lea r18, ptr [r22+r30*2+0x46] +XDIS 1c70a: MISC BASE D57A8D547747 lea r18, ptr [r23+r30*2+0x47] +XDIS 1c710: MISC BASE D57B8D547048 lea r18, ptr [r24+r30*2+0x48] +XDIS 1c716: MISC BASE D57B8D547149 lea r18, ptr [r25+r30*2+0x49] +XDIS 1c71c: MISC BASE D57B8D54724A lea r18, ptr [r26+r30*2+0x4a] +XDIS 1c722: MISC BASE D57B8D54734B lea r18, ptr [r27+r30*2+0x4b] +XDIS 1c728: MISC BASE D57B8D54744C lea r18, ptr [r28+r30*2+0x4c] +XDIS 1c72e: MISC BASE D57B8D54754D lea r18, ptr [r29+r30*2+0x4d] +XDIS 1c734: MISC BASE D57B8D54764E lea r18, ptr [r30+r30*2+0x4e] +XDIS 1c73a: MISC BASE D57B8D54774F lea r18, ptr [r31+r30*2+0x4f] +XDIS 1c740: MISC BASE D56A8D547831 lea r18, ptr [rax+r31*2+0x31] +XDIS 1c746: MISC BASE D56A8D547932 lea r18, ptr [rcx+r31*2+0x32] +XDIS 1c74c: MISC BASE D56A8D547A33 lea r18, ptr [rdx+r31*2+0x33] +XDIS 1c752: MISC BASE D56A8D547B34 lea r18, ptr [rbx+r31*2+0x34] +XDIS 1c758: MISC BASE D56A8D547C35 lea r18, ptr [rsp+r31*2+0x35] +XDIS 1c75e: MISC BASE D56A8D547D36 lea r18, ptr [rbp+r31*2+0x36] +XDIS 1c764: MISC BASE D56A8D547E37 lea r18, ptr [rsi+r31*2+0x37] +XDIS 1c76a: MISC BASE D56A8D547F38 lea r18, ptr [rdi+r31*2+0x38] +XDIS 1c770: MISC BASE D56B8D547839 lea r18, ptr [r8+r31*2+0x39] +XDIS 1c776: MISC BASE D56B8D54793A lea r18, ptr [r9+r31*2+0x3a] +XDIS 1c77c: MISC BASE D56B8D547A3B lea r18, ptr [r10+r31*2+0x3b] +XDIS 1c782: MISC BASE D56B8D547B3C lea r18, ptr [r11+r31*2+0x3c] +XDIS 1c788: MISC BASE D56B8D547C3D lea r18, ptr [r12+r31*2+0x3d] +XDIS 1c78e: MISC BASE D56B8D547D3E lea r18, ptr [r13+r31*2+0x3e] +XDIS 1c794: MISC BASE D56B8D547E3F lea r18, ptr [r14+r31*2+0x3f] +XDIS 1c79a: MISC BASE D56B8D547F40 lea r18, ptr [r15+r31*2+0x40] +XDIS 1c7a0: MISC BASE D57A8D547841 lea r18, ptr [r16+r31*2+0x41] +XDIS 1c7a6: MISC BASE D57A8D547942 lea r18, ptr [r17+r31*2+0x42] +XDIS 1c7ac: MISC BASE D57A8D547A43 lea r18, ptr [r18+r31*2+0x43] +XDIS 1c7b2: MISC BASE D57A8D547B44 lea r18, ptr [r19+r31*2+0x44] +XDIS 1c7b8: MISC BASE D57A8D547C45 lea r18, ptr [r20+r31*2+0x45] +XDIS 1c7be: MISC BASE D57A8D547D46 lea r18, ptr [r21+r31*2+0x46] +XDIS 1c7c4: MISC BASE D57A8D547E47 lea r18, ptr [r22+r31*2+0x47] +XDIS 1c7ca: MISC BASE D57A8D547F48 lea r18, ptr [r23+r31*2+0x48] +XDIS 1c7d0: MISC BASE D57B8D547849 lea r18, ptr [r24+r31*2+0x49] +XDIS 1c7d6: MISC BASE D57B8D54794A lea r18, ptr [r25+r31*2+0x4a] +XDIS 1c7dc: MISC BASE D57B8D547A4B lea r18, ptr [r26+r31*2+0x4b] +XDIS 1c7e2: MISC BASE D57B8D547B4C lea r18, ptr [r27+r31*2+0x4c] +XDIS 1c7e8: MISC BASE D57B8D547C4D lea r18, ptr [r28+r31*2+0x4d] +XDIS 1c7ee: MISC BASE D57B8D547D4E lea r18, ptr [r29+r31*2+0x4e] +XDIS 1c7f4: MISC BASE D57B8D547E4F lea r18, ptr [r30+r31*2+0x4f] +XDIS 1c7fa: MISC BASE D57B8D547F50 lea r18, ptr [r31+r31*2+0x50] +XDIS 1c800: MISC BASE D5488D5C4013 lea r19, ptr [rax+rax*2+0x13] +XDIS 1c806: MISC BASE D5488D5C4114 lea r19, ptr [rcx+rax*2+0x14] +XDIS 1c80c: MISC BASE D5488D5C4215 lea r19, ptr [rdx+rax*2+0x15] +XDIS 1c812: MISC BASE D5488D5C4316 lea r19, ptr [rbx+rax*2+0x16] +XDIS 1c818: MISC BASE D5488D5C4417 lea r19, ptr [rsp+rax*2+0x17] +XDIS 1c81e: MISC BASE D5488D5C4518 lea r19, ptr [rbp+rax*2+0x18] +XDIS 1c824: MISC BASE D5488D5C4619 lea r19, ptr [rsi+rax*2+0x19] +XDIS 1c82a: MISC BASE D5488D5C471A lea r19, ptr [rdi+rax*2+0x1a] +XDIS 1c830: MISC BASE D5498D5C401B lea r19, ptr [r8+rax*2+0x1b] +XDIS 1c836: MISC BASE D5498D5C411C lea r19, ptr [r9+rax*2+0x1c] +XDIS 1c83c: MISC BASE D5498D5C421D lea r19, ptr [r10+rax*2+0x1d] +XDIS 1c842: MISC BASE D5498D5C431E lea r19, ptr [r11+rax*2+0x1e] +XDIS 1c848: MISC BASE D5498D5C441F lea r19, ptr [r12+rax*2+0x1f] +XDIS 1c84e: MISC BASE D5498D5C4520 lea r19, ptr [r13+rax*2+0x20] +XDIS 1c854: MISC BASE D5498D5C4621 lea r19, ptr [r14+rax*2+0x21] +XDIS 1c85a: MISC BASE D5498D5C4722 lea r19, ptr [r15+rax*2+0x22] +XDIS 1c860: MISC BASE D5588D5C4023 lea r19, ptr [r16+rax*2+0x23] +XDIS 1c866: MISC BASE D5588D5C4124 lea r19, ptr [r17+rax*2+0x24] +XDIS 1c86c: MISC BASE D5588D5C4225 lea r19, ptr [r18+rax*2+0x25] +XDIS 1c872: MISC BASE D5588D5C4326 lea r19, ptr [r19+rax*2+0x26] +XDIS 1c878: MISC BASE D5588D5C4427 lea r19, ptr [r20+rax*2+0x27] +XDIS 1c87e: MISC BASE D5588D5C4528 lea r19, ptr [r21+rax*2+0x28] +XDIS 1c884: MISC BASE D5588D5C4629 lea r19, ptr [r22+rax*2+0x29] +XDIS 1c88a: MISC BASE D5588D5C472A lea r19, ptr [r23+rax*2+0x2a] +XDIS 1c890: MISC BASE D5598D5C402B lea r19, ptr [r24+rax*2+0x2b] +XDIS 1c896: MISC BASE D5598D5C412C lea r19, ptr [r25+rax*2+0x2c] +XDIS 1c89c: MISC BASE D5598D5C422D lea r19, ptr [r26+rax*2+0x2d] +XDIS 1c8a2: MISC BASE D5598D5C432E lea r19, ptr [r27+rax*2+0x2e] +XDIS 1c8a8: MISC BASE D5598D5C442F lea r19, ptr [r28+rax*2+0x2f] +XDIS 1c8ae: MISC BASE D5598D5C4530 lea r19, ptr [r29+rax*2+0x30] +XDIS 1c8b4: MISC BASE D5598D5C4631 lea r19, ptr [r30+rax*2+0x31] +XDIS 1c8ba: MISC BASE D5598D5C4732 lea r19, ptr [r31+rax*2+0x32] +XDIS 1c8c0: MISC BASE D5488D5C4814 lea r19, ptr [rax+rcx*2+0x14] +XDIS 1c8c6: MISC BASE D5488D5C4915 lea r19, ptr [rcx+rcx*2+0x15] +XDIS 1c8cc: MISC BASE D5488D5C4A16 lea r19, ptr [rdx+rcx*2+0x16] +XDIS 1c8d2: MISC BASE D5488D5C4B17 lea r19, ptr [rbx+rcx*2+0x17] +XDIS 1c8d8: MISC BASE D5488D5C4C18 lea r19, ptr [rsp+rcx*2+0x18] +XDIS 1c8de: MISC BASE D5488D5C4D19 lea r19, ptr [rbp+rcx*2+0x19] +XDIS 1c8e4: MISC BASE D5488D5C4E1A lea r19, ptr [rsi+rcx*2+0x1a] +XDIS 1c8ea: MISC BASE D5488D5C4F1B lea r19, ptr [rdi+rcx*2+0x1b] +XDIS 1c8f0: MISC BASE D5498D5C481C lea r19, ptr [r8+rcx*2+0x1c] +XDIS 1c8f6: MISC BASE D5498D5C491D lea r19, ptr [r9+rcx*2+0x1d] +XDIS 1c8fc: MISC BASE D5498D5C4A1E lea r19, ptr [r10+rcx*2+0x1e] +XDIS 1c902: MISC BASE D5498D5C4B1F lea r19, ptr [r11+rcx*2+0x1f] +XDIS 1c908: MISC BASE D5498D5C4C20 lea r19, ptr [r12+rcx*2+0x20] +XDIS 1c90e: MISC BASE D5498D5C4D21 lea r19, ptr [r13+rcx*2+0x21] +XDIS 1c914: MISC BASE D5498D5C4E22 lea r19, ptr [r14+rcx*2+0x22] +XDIS 1c91a: MISC BASE D5498D5C4F23 lea r19, ptr [r15+rcx*2+0x23] +XDIS 1c920: MISC BASE D5588D5C4824 lea r19, ptr [r16+rcx*2+0x24] +XDIS 1c926: MISC BASE D5588D5C4925 lea r19, ptr [r17+rcx*2+0x25] +XDIS 1c92c: MISC BASE D5588D5C4A26 lea r19, ptr [r18+rcx*2+0x26] +XDIS 1c932: MISC BASE D5588D5C4B27 lea r19, ptr [r19+rcx*2+0x27] +XDIS 1c938: MISC BASE D5588D5C4C28 lea r19, ptr [r20+rcx*2+0x28] +XDIS 1c93e: MISC BASE D5588D5C4D29 lea r19, ptr [r21+rcx*2+0x29] +XDIS 1c944: MISC BASE D5588D5C4E2A lea r19, ptr [r22+rcx*2+0x2a] +XDIS 1c94a: MISC BASE D5588D5C4F2B lea r19, ptr [r23+rcx*2+0x2b] +XDIS 1c950: MISC BASE D5598D5C482C lea r19, ptr [r24+rcx*2+0x2c] +XDIS 1c956: MISC BASE D5598D5C492D lea r19, ptr [r25+rcx*2+0x2d] +XDIS 1c95c: MISC BASE D5598D5C4A2E lea r19, ptr [r26+rcx*2+0x2e] +XDIS 1c962: MISC BASE D5598D5C4B2F lea r19, ptr [r27+rcx*2+0x2f] +XDIS 1c968: MISC BASE D5598D5C4C30 lea r19, ptr [r28+rcx*2+0x30] +XDIS 1c96e: MISC BASE D5598D5C4D31 lea r19, ptr [r29+rcx*2+0x31] +XDIS 1c974: MISC BASE D5598D5C4E32 lea r19, ptr [r30+rcx*2+0x32] +XDIS 1c97a: MISC BASE D5598D5C4F33 lea r19, ptr [r31+rcx*2+0x33] +XDIS 1c980: MISC BASE D5488D5C5015 lea r19, ptr [rax+rdx*2+0x15] +XDIS 1c986: MISC BASE D5488D5C5116 lea r19, ptr [rcx+rdx*2+0x16] +XDIS 1c98c: MISC BASE D5488D5C5217 lea r19, ptr [rdx+rdx*2+0x17] +XDIS 1c992: MISC BASE D5488D5C5318 lea r19, ptr [rbx+rdx*2+0x18] +XDIS 1c998: MISC BASE D5488D5C5419 lea r19, ptr [rsp+rdx*2+0x19] +XDIS 1c99e: MISC BASE D5488D5C551A lea r19, ptr [rbp+rdx*2+0x1a] +XDIS 1c9a4: MISC BASE D5488D5C561B lea r19, ptr [rsi+rdx*2+0x1b] +XDIS 1c9aa: MISC BASE D5488D5C571C lea r19, ptr [rdi+rdx*2+0x1c] +XDIS 1c9b0: MISC BASE D5498D5C501D lea r19, ptr [r8+rdx*2+0x1d] +XDIS 1c9b6: MISC BASE D5498D5C511E lea r19, ptr [r9+rdx*2+0x1e] +XDIS 1c9bc: MISC BASE D5498D5C521F lea r19, ptr [r10+rdx*2+0x1f] +XDIS 1c9c2: MISC BASE D5498D5C5320 lea r19, ptr [r11+rdx*2+0x20] +XDIS 1c9c8: MISC BASE D5498D5C5421 lea r19, ptr [r12+rdx*2+0x21] +XDIS 1c9ce: MISC BASE D5498D5C5522 lea r19, ptr [r13+rdx*2+0x22] +XDIS 1c9d4: MISC BASE D5498D5C5623 lea r19, ptr [r14+rdx*2+0x23] +XDIS 1c9da: MISC BASE D5498D5C5724 lea r19, ptr [r15+rdx*2+0x24] +XDIS 1c9e0: MISC BASE D5588D5C5025 lea r19, ptr [r16+rdx*2+0x25] +XDIS 1c9e6: MISC BASE D5588D5C5126 lea r19, ptr [r17+rdx*2+0x26] +XDIS 1c9ec: MISC BASE D5588D5C5227 lea r19, ptr [r18+rdx*2+0x27] +XDIS 1c9f2: MISC BASE D5588D5C5328 lea r19, ptr [r19+rdx*2+0x28] +XDIS 1c9f8: MISC BASE D5588D5C5429 lea r19, ptr [r20+rdx*2+0x29] +XDIS 1c9fe: MISC BASE D5588D5C552A lea r19, ptr [r21+rdx*2+0x2a] +XDIS 1ca04: MISC BASE D5588D5C562B lea r19, ptr [r22+rdx*2+0x2b] +XDIS 1ca0a: MISC BASE D5588D5C572C lea r19, ptr [r23+rdx*2+0x2c] +XDIS 1ca10: MISC BASE D5598D5C502D lea r19, ptr [r24+rdx*2+0x2d] +XDIS 1ca16: MISC BASE D5598D5C512E lea r19, ptr [r25+rdx*2+0x2e] +XDIS 1ca1c: MISC BASE D5598D5C522F lea r19, ptr [r26+rdx*2+0x2f] +XDIS 1ca22: MISC BASE D5598D5C5330 lea r19, ptr [r27+rdx*2+0x30] +XDIS 1ca28: MISC BASE D5598D5C5431 lea r19, ptr [r28+rdx*2+0x31] +XDIS 1ca2e: MISC BASE D5598D5C5532 lea r19, ptr [r29+rdx*2+0x32] +XDIS 1ca34: MISC BASE D5598D5C5633 lea r19, ptr [r30+rdx*2+0x33] +XDIS 1ca3a: MISC BASE D5598D5C5734 lea r19, ptr [r31+rdx*2+0x34] +XDIS 1ca40: MISC BASE D5488D5C5816 lea r19, ptr [rax+rbx*2+0x16] +XDIS 1ca46: MISC BASE D5488D5C5917 lea r19, ptr [rcx+rbx*2+0x17] +XDIS 1ca4c: MISC BASE D5488D5C5A18 lea r19, ptr [rdx+rbx*2+0x18] +XDIS 1ca52: MISC BASE D5488D5C5B19 lea r19, ptr [rbx+rbx*2+0x19] +XDIS 1ca58: MISC BASE D5488D5C5C1A lea r19, ptr [rsp+rbx*2+0x1a] +XDIS 1ca5e: MISC BASE D5488D5C5D1B lea r19, ptr [rbp+rbx*2+0x1b] +XDIS 1ca64: MISC BASE D5488D5C5E1C lea r19, ptr [rsi+rbx*2+0x1c] +XDIS 1ca6a: MISC BASE D5488D5C5F1D lea r19, ptr [rdi+rbx*2+0x1d] +XDIS 1ca70: MISC BASE D5498D5C581E lea r19, ptr [r8+rbx*2+0x1e] +XDIS 1ca76: MISC BASE D5498D5C591F lea r19, ptr [r9+rbx*2+0x1f] +XDIS 1ca7c: MISC BASE D5498D5C5A20 lea r19, ptr [r10+rbx*2+0x20] +XDIS 1ca82: MISC BASE D5498D5C5B21 lea r19, ptr [r11+rbx*2+0x21] +XDIS 1ca88: MISC BASE D5498D5C5C22 lea r19, ptr [r12+rbx*2+0x22] +XDIS 1ca8e: MISC BASE D5498D5C5D23 lea r19, ptr [r13+rbx*2+0x23] +XDIS 1ca94: MISC BASE D5498D5C5E24 lea r19, ptr [r14+rbx*2+0x24] +XDIS 1ca9a: MISC BASE D5498D5C5F25 lea r19, ptr [r15+rbx*2+0x25] +XDIS 1caa0: MISC BASE D5588D5C5826 lea r19, ptr [r16+rbx*2+0x26] +XDIS 1caa6: MISC BASE D5588D5C5927 lea r19, ptr [r17+rbx*2+0x27] +XDIS 1caac: MISC BASE D5588D5C5A28 lea r19, ptr [r18+rbx*2+0x28] +XDIS 1cab2: MISC BASE D5588D5C5B29 lea r19, ptr [r19+rbx*2+0x29] +XDIS 1cab8: MISC BASE D5588D5C5C2A lea r19, ptr [r20+rbx*2+0x2a] +XDIS 1cabe: MISC BASE D5588D5C5D2B lea r19, ptr [r21+rbx*2+0x2b] +XDIS 1cac4: MISC BASE D5588D5C5E2C lea r19, ptr [r22+rbx*2+0x2c] +XDIS 1caca: MISC BASE D5588D5C5F2D lea r19, ptr [r23+rbx*2+0x2d] +XDIS 1cad0: MISC BASE D5598D5C582E lea r19, ptr [r24+rbx*2+0x2e] +XDIS 1cad6: MISC BASE D5598D5C592F lea r19, ptr [r25+rbx*2+0x2f] +XDIS 1cadc: MISC BASE D5598D5C5A30 lea r19, ptr [r26+rbx*2+0x30] +XDIS 1cae2: MISC BASE D5598D5C5B31 lea r19, ptr [r27+rbx*2+0x31] +XDIS 1cae8: MISC BASE D5598D5C5C32 lea r19, ptr [r28+rbx*2+0x32] +XDIS 1caee: MISC BASE D5598D5C5D33 lea r19, ptr [r29+rbx*2+0x33] +XDIS 1caf4: MISC BASE D5598D5C5E34 lea r19, ptr [r30+rbx*2+0x34] +XDIS 1cafa: MISC BASE D5598D5C5F35 lea r19, ptr [r31+rbx*2+0x35] +XDIS 1cb00: MISC BASE D5488D5C6017 lea r19, ptr [rax+0x17] +XDIS 1cb06: MISC BASE D5488D5C6118 lea r19, ptr [rcx+0x18] +XDIS 1cb0c: MISC BASE D5488D5C6219 lea r19, ptr [rdx+0x19] +XDIS 1cb12: MISC BASE D5488D5C631A lea r19, ptr [rbx+0x1a] +XDIS 1cb18: MISC BASE D5488D5C641B lea r19, ptr [rsp+0x1b] +XDIS 1cb1e: MISC BASE D5488D5C651C lea r19, ptr [rbp+0x1c] +XDIS 1cb24: MISC BASE D5488D5C661D lea r19, ptr [rsi+0x1d] +XDIS 1cb2a: MISC BASE D5488D5C671E lea r19, ptr [rdi+0x1e] +XDIS 1cb30: MISC BASE D5498D5C601F lea r19, ptr [r8+0x1f] +XDIS 1cb36: MISC BASE D5498D5C6120 lea r19, ptr [r9+0x20] +XDIS 1cb3c: MISC BASE D5498D5C6221 lea r19, ptr [r10+0x21] +XDIS 1cb42: MISC BASE D5498D5C6322 lea r19, ptr [r11+0x22] +XDIS 1cb48: MISC BASE D5498D5C6423 lea r19, ptr [r12+0x23] +XDIS 1cb4e: MISC BASE D5498D5C6524 lea r19, ptr [r13+0x24] +XDIS 1cb54: MISC BASE D5498D5C6625 lea r19, ptr [r14+0x25] +XDIS 1cb5a: MISC BASE D5498D5C6726 lea r19, ptr [r15+0x26] +XDIS 1cb60: MISC BASE D5588D5C6027 lea r19, ptr [r16+0x27] +XDIS 1cb66: MISC BASE D5588D5C6128 lea r19, ptr [r17+0x28] +XDIS 1cb6c: MISC BASE D5588D5C6229 lea r19, ptr [r18+0x29] +XDIS 1cb72: MISC BASE D5588D5C632A lea r19, ptr [r19+0x2a] +XDIS 1cb78: MISC BASE D5588D5C642B lea r19, ptr [r20+0x2b] +XDIS 1cb7e: MISC BASE D5588D5C652C lea r19, ptr [r21+0x2c] +XDIS 1cb84: MISC BASE D5588D5C662D lea r19, ptr [r22+0x2d] +XDIS 1cb8a: MISC BASE D5588D5C672E lea r19, ptr [r23+0x2e] +XDIS 1cb90: MISC BASE D5598D5C602F lea r19, ptr [r24+0x2f] +XDIS 1cb96: MISC BASE D5598D5C6130 lea r19, ptr [r25+0x30] +XDIS 1cb9c: MISC BASE D5598D5C6231 lea r19, ptr [r26+0x31] +XDIS 1cba2: MISC BASE D5598D5C6332 lea r19, ptr [r27+0x32] +XDIS 1cba8: MISC BASE D5598D5C6433 lea r19, ptr [r28+0x33] +XDIS 1cbae: MISC BASE D5598D5C6534 lea r19, ptr [r29+0x34] +XDIS 1cbb4: MISC BASE D5598D5C6635 lea r19, ptr [r30+0x35] +XDIS 1cbba: MISC BASE D5598D5C6736 lea r19, ptr [r31+0x36] +XDIS 1cbc0: MISC BASE D5488D5C6818 lea r19, ptr [rax+rbp*2+0x18] +XDIS 1cbc6: MISC BASE D5488D5C6919 lea r19, ptr [rcx+rbp*2+0x19] +XDIS 1cbcc: MISC BASE D5488D5C6A1A lea r19, ptr [rdx+rbp*2+0x1a] +XDIS 1cbd2: MISC BASE D5488D5C6B1B lea r19, ptr [rbx+rbp*2+0x1b] +XDIS 1cbd8: MISC BASE D5488D5C6C1C lea r19, ptr [rsp+rbp*2+0x1c] +XDIS 1cbde: MISC BASE D5488D5C6D1D lea r19, ptr [rbp+rbp*2+0x1d] +XDIS 1cbe4: MISC BASE D5488D5C6E1E lea r19, ptr [rsi+rbp*2+0x1e] +XDIS 1cbea: MISC BASE D5488D5C6F1F lea r19, ptr [rdi+rbp*2+0x1f] +XDIS 1cbf0: MISC BASE D5498D5C6820 lea r19, ptr [r8+rbp*2+0x20] +XDIS 1cbf6: MISC BASE D5498D5C6921 lea r19, ptr [r9+rbp*2+0x21] +XDIS 1cbfc: MISC BASE D5498D5C6A22 lea r19, ptr [r10+rbp*2+0x22] +XDIS 1cc02: MISC BASE D5498D5C6B23 lea r19, ptr [r11+rbp*2+0x23] +XDIS 1cc08: MISC BASE D5498D5C6C24 lea r19, ptr [r12+rbp*2+0x24] +XDIS 1cc0e: MISC BASE D5498D5C6D25 lea r19, ptr [r13+rbp*2+0x25] +XDIS 1cc14: MISC BASE D5498D5C6E26 lea r19, ptr [r14+rbp*2+0x26] +XDIS 1cc1a: MISC BASE D5498D5C6F27 lea r19, ptr [r15+rbp*2+0x27] +XDIS 1cc20: MISC BASE D5588D5C6828 lea r19, ptr [r16+rbp*2+0x28] +XDIS 1cc26: MISC BASE D5588D5C6929 lea r19, ptr [r17+rbp*2+0x29] +XDIS 1cc2c: MISC BASE D5588D5C6A2A lea r19, ptr [r18+rbp*2+0x2a] +XDIS 1cc32: MISC BASE D5588D5C6B2B lea r19, ptr [r19+rbp*2+0x2b] +XDIS 1cc38: MISC BASE D5588D5C6C2C lea r19, ptr [r20+rbp*2+0x2c] +XDIS 1cc3e: MISC BASE D5588D5C6D2D lea r19, ptr [r21+rbp*2+0x2d] +XDIS 1cc44: MISC BASE D5588D5C6E2E lea r19, ptr [r22+rbp*2+0x2e] +XDIS 1cc4a: MISC BASE D5588D5C6F2F lea r19, ptr [r23+rbp*2+0x2f] +XDIS 1cc50: MISC BASE D5598D5C6830 lea r19, ptr [r24+rbp*2+0x30] +XDIS 1cc56: MISC BASE D5598D5C6931 lea r19, ptr [r25+rbp*2+0x31] +XDIS 1cc5c: MISC BASE D5598D5C6A32 lea r19, ptr [r26+rbp*2+0x32] +XDIS 1cc62: MISC BASE D5598D5C6B33 lea r19, ptr [r27+rbp*2+0x33] +XDIS 1cc68: MISC BASE D5598D5C6C34 lea r19, ptr [r28+rbp*2+0x34] +XDIS 1cc6e: MISC BASE D5598D5C6D35 lea r19, ptr [r29+rbp*2+0x35] +XDIS 1cc74: MISC BASE D5598D5C6E36 lea r19, ptr [r30+rbp*2+0x36] +XDIS 1cc7a: MISC BASE D5598D5C6F37 lea r19, ptr [r31+rbp*2+0x37] +XDIS 1cc80: MISC BASE D5488D5C7019 lea r19, ptr [rax+rsi*2+0x19] +XDIS 1cc86: MISC BASE D5488D5C711A lea r19, ptr [rcx+rsi*2+0x1a] +XDIS 1cc8c: MISC BASE D5488D5C721B lea r19, ptr [rdx+rsi*2+0x1b] +XDIS 1cc92: MISC BASE D5488D5C731C lea r19, ptr [rbx+rsi*2+0x1c] +XDIS 1cc98: MISC BASE D5488D5C741D lea r19, ptr [rsp+rsi*2+0x1d] +XDIS 1cc9e: MISC BASE D5488D5C751E lea r19, ptr [rbp+rsi*2+0x1e] +XDIS 1cca4: MISC BASE D5488D5C761F lea r19, ptr [rsi+rsi*2+0x1f] +XDIS 1ccaa: MISC BASE D5488D5C7720 lea r19, ptr [rdi+rsi*2+0x20] +XDIS 1ccb0: MISC BASE D5498D5C7021 lea r19, ptr [r8+rsi*2+0x21] +XDIS 1ccb6: MISC BASE D5498D5C7122 lea r19, ptr [r9+rsi*2+0x22] +XDIS 1ccbc: MISC BASE D5498D5C7223 lea r19, ptr [r10+rsi*2+0x23] +XDIS 1ccc2: MISC BASE D5498D5C7324 lea r19, ptr [r11+rsi*2+0x24] +XDIS 1ccc8: MISC BASE D5498D5C7425 lea r19, ptr [r12+rsi*2+0x25] +XDIS 1ccce: MISC BASE D5498D5C7526 lea r19, ptr [r13+rsi*2+0x26] +XDIS 1ccd4: MISC BASE D5498D5C7627 lea r19, ptr [r14+rsi*2+0x27] +XDIS 1ccda: MISC BASE D5498D5C7728 lea r19, ptr [r15+rsi*2+0x28] +XDIS 1cce0: MISC BASE D5588D5C7029 lea r19, ptr [r16+rsi*2+0x29] +XDIS 1cce6: MISC BASE D5588D5C712A lea r19, ptr [r17+rsi*2+0x2a] +XDIS 1ccec: MISC BASE D5588D5C722B lea r19, ptr [r18+rsi*2+0x2b] +XDIS 1ccf2: MISC BASE D5588D5C732C lea r19, ptr [r19+rsi*2+0x2c] +XDIS 1ccf8: MISC BASE D5588D5C742D lea r19, ptr [r20+rsi*2+0x2d] +XDIS 1ccfe: MISC BASE D5588D5C752E lea r19, ptr [r21+rsi*2+0x2e] +XDIS 1cd04: MISC BASE D5588D5C762F lea r19, ptr [r22+rsi*2+0x2f] +XDIS 1cd0a: MISC BASE D5588D5C7730 lea r19, ptr [r23+rsi*2+0x30] +XDIS 1cd10: MISC BASE D5598D5C7031 lea r19, ptr [r24+rsi*2+0x31] +XDIS 1cd16: MISC BASE D5598D5C7132 lea r19, ptr [r25+rsi*2+0x32] +XDIS 1cd1c: MISC BASE D5598D5C7233 lea r19, ptr [r26+rsi*2+0x33] +XDIS 1cd22: MISC BASE D5598D5C7334 lea r19, ptr [r27+rsi*2+0x34] +XDIS 1cd28: MISC BASE D5598D5C7435 lea r19, ptr [r28+rsi*2+0x35] +XDIS 1cd2e: MISC BASE D5598D5C7536 lea r19, ptr [r29+rsi*2+0x36] +XDIS 1cd34: MISC BASE D5598D5C7637 lea r19, ptr [r30+rsi*2+0x37] +XDIS 1cd3a: MISC BASE D5598D5C7738 lea r19, ptr [r31+rsi*2+0x38] +XDIS 1cd40: MISC BASE D5488D5C781A lea r19, ptr [rax+rdi*2+0x1a] +XDIS 1cd46: MISC BASE D5488D5C791B lea r19, ptr [rcx+rdi*2+0x1b] +XDIS 1cd4c: MISC BASE D5488D5C7A1C lea r19, ptr [rdx+rdi*2+0x1c] +XDIS 1cd52: MISC BASE D5488D5C7B1D lea r19, ptr [rbx+rdi*2+0x1d] +XDIS 1cd58: MISC BASE D5488D5C7C1E lea r19, ptr [rsp+rdi*2+0x1e] +XDIS 1cd5e: MISC BASE D5488D5C7D1F lea r19, ptr [rbp+rdi*2+0x1f] +XDIS 1cd64: MISC BASE D5488D5C7E20 lea r19, ptr [rsi+rdi*2+0x20] +XDIS 1cd6a: MISC BASE D5488D5C7F21 lea r19, ptr [rdi+rdi*2+0x21] +XDIS 1cd70: MISC BASE D5498D5C7822 lea r19, ptr [r8+rdi*2+0x22] +XDIS 1cd76: MISC BASE D5498D5C7923 lea r19, ptr [r9+rdi*2+0x23] +XDIS 1cd7c: MISC BASE D5498D5C7A24 lea r19, ptr [r10+rdi*2+0x24] +XDIS 1cd82: MISC BASE D5498D5C7B25 lea r19, ptr [r11+rdi*2+0x25] +XDIS 1cd88: MISC BASE D5498D5C7C26 lea r19, ptr [r12+rdi*2+0x26] +XDIS 1cd8e: MISC BASE D5498D5C7D27 lea r19, ptr [r13+rdi*2+0x27] +XDIS 1cd94: MISC BASE D5498D5C7E28 lea r19, ptr [r14+rdi*2+0x28] +XDIS 1cd9a: MISC BASE D5498D5C7F29 lea r19, ptr [r15+rdi*2+0x29] +XDIS 1cda0: MISC BASE D5588D5C782A lea r19, ptr [r16+rdi*2+0x2a] +XDIS 1cda6: MISC BASE D5588D5C792B lea r19, ptr [r17+rdi*2+0x2b] +XDIS 1cdac: MISC BASE D5588D5C7A2C lea r19, ptr [r18+rdi*2+0x2c] +XDIS 1cdb2: MISC BASE D5588D5C7B2D lea r19, ptr [r19+rdi*2+0x2d] +XDIS 1cdb8: MISC BASE D5588D5C7C2E lea r19, ptr [r20+rdi*2+0x2e] +XDIS 1cdbe: MISC BASE D5588D5C7D2F lea r19, ptr [r21+rdi*2+0x2f] +XDIS 1cdc4: MISC BASE D5588D5C7E30 lea r19, ptr [r22+rdi*2+0x30] +XDIS 1cdca: MISC BASE D5588D5C7F31 lea r19, ptr [r23+rdi*2+0x31] +XDIS 1cdd0: MISC BASE D5598D5C7832 lea r19, ptr [r24+rdi*2+0x32] +XDIS 1cdd6: MISC BASE D5598D5C7933 lea r19, ptr [r25+rdi*2+0x33] +XDIS 1cddc: MISC BASE D5598D5C7A34 lea r19, ptr [r26+rdi*2+0x34] +XDIS 1cde2: MISC BASE D5598D5C7B35 lea r19, ptr [r27+rdi*2+0x35] +XDIS 1cde8: MISC BASE D5598D5C7C36 lea r19, ptr [r28+rdi*2+0x36] +XDIS 1cdee: MISC BASE D5598D5C7D37 lea r19, ptr [r29+rdi*2+0x37] +XDIS 1cdf4: MISC BASE D5598D5C7E38 lea r19, ptr [r30+rdi*2+0x38] +XDIS 1cdfa: MISC BASE D5598D5C7F39 lea r19, ptr [r31+rdi*2+0x39] +XDIS 1ce00: MISC BASE D54A8D5C401B lea r19, ptr [rax+r8*2+0x1b] +XDIS 1ce06: MISC BASE D54A8D5C411C lea r19, ptr [rcx+r8*2+0x1c] +XDIS 1ce0c: MISC BASE D54A8D5C421D lea r19, ptr [rdx+r8*2+0x1d] +XDIS 1ce12: MISC BASE D54A8D5C431E lea r19, ptr [rbx+r8*2+0x1e] +XDIS 1ce18: MISC BASE D54A8D5C441F lea r19, ptr [rsp+r8*2+0x1f] +XDIS 1ce1e: MISC BASE D54A8D5C4520 lea r19, ptr [rbp+r8*2+0x20] +XDIS 1ce24: MISC BASE D54A8D5C4621 lea r19, ptr [rsi+r8*2+0x21] +XDIS 1ce2a: MISC BASE D54A8D5C4722 lea r19, ptr [rdi+r8*2+0x22] +XDIS 1ce30: MISC BASE D54B8D5C4023 lea r19, ptr [r8+r8*2+0x23] +XDIS 1ce36: MISC BASE D54B8D5C4124 lea r19, ptr [r9+r8*2+0x24] +XDIS 1ce3c: MISC BASE D54B8D5C4225 lea r19, ptr [r10+r8*2+0x25] +XDIS 1ce42: MISC BASE D54B8D5C4326 lea r19, ptr [r11+r8*2+0x26] +XDIS 1ce48: MISC BASE D54B8D5C4427 lea r19, ptr [r12+r8*2+0x27] +XDIS 1ce4e: MISC BASE D54B8D5C4528 lea r19, ptr [r13+r8*2+0x28] +XDIS 1ce54: MISC BASE D54B8D5C4629 lea r19, ptr [r14+r8*2+0x29] +XDIS 1ce5a: MISC BASE D54B8D5C472A lea r19, ptr [r15+r8*2+0x2a] +XDIS 1ce60: MISC BASE D55A8D5C402B lea r19, ptr [r16+r8*2+0x2b] +XDIS 1ce66: MISC BASE D55A8D5C412C lea r19, ptr [r17+r8*2+0x2c] +XDIS 1ce6c: MISC BASE D55A8D5C422D lea r19, ptr [r18+r8*2+0x2d] +XDIS 1ce72: MISC BASE D55A8D5C432E lea r19, ptr [r19+r8*2+0x2e] +XDIS 1ce78: MISC BASE D55A8D5C442F lea r19, ptr [r20+r8*2+0x2f] +XDIS 1ce7e: MISC BASE D55A8D5C4530 lea r19, ptr [r21+r8*2+0x30] +XDIS 1ce84: MISC BASE D55A8D5C4631 lea r19, ptr [r22+r8*2+0x31] +XDIS 1ce8a: MISC BASE D55A8D5C4732 lea r19, ptr [r23+r8*2+0x32] +XDIS 1ce90: MISC BASE D55B8D5C4033 lea r19, ptr [r24+r8*2+0x33] +XDIS 1ce96: MISC BASE D55B8D5C4134 lea r19, ptr [r25+r8*2+0x34] +XDIS 1ce9c: MISC BASE D55B8D5C4235 lea r19, ptr [r26+r8*2+0x35] +XDIS 1cea2: MISC BASE D55B8D5C4336 lea r19, ptr [r27+r8*2+0x36] +XDIS 1cea8: MISC BASE D55B8D5C4437 lea r19, ptr [r28+r8*2+0x37] +XDIS 1ceae: MISC BASE D55B8D5C4538 lea r19, ptr [r29+r8*2+0x38] +XDIS 1ceb4: MISC BASE D55B8D5C4639 lea r19, ptr [r30+r8*2+0x39] +XDIS 1ceba: MISC BASE D55B8D5C473A lea r19, ptr [r31+r8*2+0x3a] +XDIS 1cec0: MISC BASE D54A8D5C481C lea r19, ptr [rax+r9*2+0x1c] +XDIS 1cec6: MISC BASE D54A8D5C491D lea r19, ptr [rcx+r9*2+0x1d] +XDIS 1cecc: MISC BASE D54A8D5C4A1E lea r19, ptr [rdx+r9*2+0x1e] +XDIS 1ced2: MISC BASE D54A8D5C4B1F lea r19, ptr [rbx+r9*2+0x1f] +XDIS 1ced8: MISC BASE D54A8D5C4C20 lea r19, ptr [rsp+r9*2+0x20] +XDIS 1cede: MISC BASE D54A8D5C4D21 lea r19, ptr [rbp+r9*2+0x21] +XDIS 1cee4: MISC BASE D54A8D5C4E22 lea r19, ptr [rsi+r9*2+0x22] +XDIS 1ceea: MISC BASE D54A8D5C4F23 lea r19, ptr [rdi+r9*2+0x23] +XDIS 1cef0: MISC BASE D54B8D5C4824 lea r19, ptr [r8+r9*2+0x24] +XDIS 1cef6: MISC BASE D54B8D5C4925 lea r19, ptr [r9+r9*2+0x25] +XDIS 1cefc: MISC BASE D54B8D5C4A26 lea r19, ptr [r10+r9*2+0x26] +XDIS 1cf02: MISC BASE D54B8D5C4B27 lea r19, ptr [r11+r9*2+0x27] +XDIS 1cf08: MISC BASE D54B8D5C4C28 lea r19, ptr [r12+r9*2+0x28] +XDIS 1cf0e: MISC BASE D54B8D5C4D29 lea r19, ptr [r13+r9*2+0x29] +XDIS 1cf14: MISC BASE D54B8D5C4E2A lea r19, ptr [r14+r9*2+0x2a] +XDIS 1cf1a: MISC BASE D54B8D5C4F2B lea r19, ptr [r15+r9*2+0x2b] +XDIS 1cf20: MISC BASE D55A8D5C482C lea r19, ptr [r16+r9*2+0x2c] +XDIS 1cf26: MISC BASE D55A8D5C492D lea r19, ptr [r17+r9*2+0x2d] +XDIS 1cf2c: MISC BASE D55A8D5C4A2E lea r19, ptr [r18+r9*2+0x2e] +XDIS 1cf32: MISC BASE D55A8D5C4B2F lea r19, ptr [r19+r9*2+0x2f] +XDIS 1cf38: MISC BASE D55A8D5C4C30 lea r19, ptr [r20+r9*2+0x30] +XDIS 1cf3e: MISC BASE D55A8D5C4D31 lea r19, ptr [r21+r9*2+0x31] +XDIS 1cf44: MISC BASE D55A8D5C4E32 lea r19, ptr [r22+r9*2+0x32] +XDIS 1cf4a: MISC BASE D55A8D5C4F33 lea r19, ptr [r23+r9*2+0x33] +XDIS 1cf50: MISC BASE D55B8D5C4834 lea r19, ptr [r24+r9*2+0x34] +XDIS 1cf56: MISC BASE D55B8D5C4935 lea r19, ptr [r25+r9*2+0x35] +XDIS 1cf5c: MISC BASE D55B8D5C4A36 lea r19, ptr [r26+r9*2+0x36] +XDIS 1cf62: MISC BASE D55B8D5C4B37 lea r19, ptr [r27+r9*2+0x37] +XDIS 1cf68: MISC BASE D55B8D5C4C38 lea r19, ptr [r28+r9*2+0x38] +XDIS 1cf6e: MISC BASE D55B8D5C4D39 lea r19, ptr [r29+r9*2+0x39] +XDIS 1cf74: MISC BASE D55B8D5C4E3A lea r19, ptr [r30+r9*2+0x3a] +XDIS 1cf7a: MISC BASE D55B8D5C4F3B lea r19, ptr [r31+r9*2+0x3b] +XDIS 1cf80: MISC BASE D54A8D5C501D lea r19, ptr [rax+r10*2+0x1d] +XDIS 1cf86: MISC BASE D54A8D5C511E lea r19, ptr [rcx+r10*2+0x1e] +XDIS 1cf8c: MISC BASE D54A8D5C521F lea r19, ptr [rdx+r10*2+0x1f] +XDIS 1cf92: MISC BASE D54A8D5C5320 lea r19, ptr [rbx+r10*2+0x20] +XDIS 1cf98: MISC BASE D54A8D5C5421 lea r19, ptr [rsp+r10*2+0x21] +XDIS 1cf9e: MISC BASE D54A8D5C5522 lea r19, ptr [rbp+r10*2+0x22] +XDIS 1cfa4: MISC BASE D54A8D5C5623 lea r19, ptr [rsi+r10*2+0x23] +XDIS 1cfaa: MISC BASE D54A8D5C5724 lea r19, ptr [rdi+r10*2+0x24] +XDIS 1cfb0: MISC BASE D54B8D5C5025 lea r19, ptr [r8+r10*2+0x25] +XDIS 1cfb6: MISC BASE D54B8D5C5126 lea r19, ptr [r9+r10*2+0x26] +XDIS 1cfbc: MISC BASE D54B8D5C5227 lea r19, ptr [r10+r10*2+0x27] +XDIS 1cfc2: MISC BASE D54B8D5C5328 lea r19, ptr [r11+r10*2+0x28] +XDIS 1cfc8: MISC BASE D54B8D5C5429 lea r19, ptr [r12+r10*2+0x29] +XDIS 1cfce: MISC BASE D54B8D5C552A lea r19, ptr [r13+r10*2+0x2a] +XDIS 1cfd4: MISC BASE D54B8D5C562B lea r19, ptr [r14+r10*2+0x2b] +XDIS 1cfda: MISC BASE D54B8D5C572C lea r19, ptr [r15+r10*2+0x2c] +XDIS 1cfe0: MISC BASE D55A8D5C502D lea r19, ptr [r16+r10*2+0x2d] +XDIS 1cfe6: MISC BASE D55A8D5C512E lea r19, ptr [r17+r10*2+0x2e] +XDIS 1cfec: MISC BASE D55A8D5C522F lea r19, ptr [r18+r10*2+0x2f] +XDIS 1cff2: MISC BASE D55A8D5C5330 lea r19, ptr [r19+r10*2+0x30] +XDIS 1cff8: MISC BASE D55A8D5C5431 lea r19, ptr [r20+r10*2+0x31] +XDIS 1cffe: MISC BASE D55A8D5C5532 lea r19, ptr [r21+r10*2+0x32] +XDIS 1d004: MISC BASE D55A8D5C5633 lea r19, ptr [r22+r10*2+0x33] +XDIS 1d00a: MISC BASE D55A8D5C5734 lea r19, ptr [r23+r10*2+0x34] +XDIS 1d010: MISC BASE D55B8D5C5035 lea r19, ptr [r24+r10*2+0x35] +XDIS 1d016: MISC BASE D55B8D5C5136 lea r19, ptr [r25+r10*2+0x36] +XDIS 1d01c: MISC BASE D55B8D5C5237 lea r19, ptr [r26+r10*2+0x37] +XDIS 1d022: MISC BASE D55B8D5C5338 lea r19, ptr [r27+r10*2+0x38] +XDIS 1d028: MISC BASE D55B8D5C5439 lea r19, ptr [r28+r10*2+0x39] +XDIS 1d02e: MISC BASE D55B8D5C553A lea r19, ptr [r29+r10*2+0x3a] +XDIS 1d034: MISC BASE D55B8D5C563B lea r19, ptr [r30+r10*2+0x3b] +XDIS 1d03a: MISC BASE D55B8D5C573C lea r19, ptr [r31+r10*2+0x3c] +XDIS 1d040: MISC BASE D54A8D5C581E lea r19, ptr [rax+r11*2+0x1e] +XDIS 1d046: MISC BASE D54A8D5C591F lea r19, ptr [rcx+r11*2+0x1f] +XDIS 1d04c: MISC BASE D54A8D5C5A20 lea r19, ptr [rdx+r11*2+0x20] +XDIS 1d052: MISC BASE D54A8D5C5B21 lea r19, ptr [rbx+r11*2+0x21] +XDIS 1d058: MISC BASE D54A8D5C5C22 lea r19, ptr [rsp+r11*2+0x22] +XDIS 1d05e: MISC BASE D54A8D5C5D23 lea r19, ptr [rbp+r11*2+0x23] +XDIS 1d064: MISC BASE D54A8D5C5E24 lea r19, ptr [rsi+r11*2+0x24] +XDIS 1d06a: MISC BASE D54A8D5C5F25 lea r19, ptr [rdi+r11*2+0x25] +XDIS 1d070: MISC BASE D54B8D5C5826 lea r19, ptr [r8+r11*2+0x26] +XDIS 1d076: MISC BASE D54B8D5C5927 lea r19, ptr [r9+r11*2+0x27] +XDIS 1d07c: MISC BASE D54B8D5C5A28 lea r19, ptr [r10+r11*2+0x28] +XDIS 1d082: MISC BASE D54B8D5C5B29 lea r19, ptr [r11+r11*2+0x29] +XDIS 1d088: MISC BASE D54B8D5C5C2A lea r19, ptr [r12+r11*2+0x2a] +XDIS 1d08e: MISC BASE D54B8D5C5D2B lea r19, ptr [r13+r11*2+0x2b] +XDIS 1d094: MISC BASE D54B8D5C5E2C lea r19, ptr [r14+r11*2+0x2c] +XDIS 1d09a: MISC BASE D54B8D5C5F2D lea r19, ptr [r15+r11*2+0x2d] +XDIS 1d0a0: MISC BASE D55A8D5C582E lea r19, ptr [r16+r11*2+0x2e] +XDIS 1d0a6: MISC BASE D55A8D5C592F lea r19, ptr [r17+r11*2+0x2f] +XDIS 1d0ac: MISC BASE D55A8D5C5A30 lea r19, ptr [r18+r11*2+0x30] +XDIS 1d0b2: MISC BASE D55A8D5C5B31 lea r19, ptr [r19+r11*2+0x31] +XDIS 1d0b8: MISC BASE D55A8D5C5C32 lea r19, ptr [r20+r11*2+0x32] +XDIS 1d0be: MISC BASE D55A8D5C5D33 lea r19, ptr [r21+r11*2+0x33] +XDIS 1d0c4: MISC BASE D55A8D5C5E34 lea r19, ptr [r22+r11*2+0x34] +XDIS 1d0ca: MISC BASE D55A8D5C5F35 lea r19, ptr [r23+r11*2+0x35] +XDIS 1d0d0: MISC BASE D55B8D5C5836 lea r19, ptr [r24+r11*2+0x36] +XDIS 1d0d6: MISC BASE D55B8D5C5937 lea r19, ptr [r25+r11*2+0x37] +XDIS 1d0dc: MISC BASE D55B8D5C5A38 lea r19, ptr [r26+r11*2+0x38] +XDIS 1d0e2: MISC BASE D55B8D5C5B39 lea r19, ptr [r27+r11*2+0x39] +XDIS 1d0e8: MISC BASE D55B8D5C5C3A lea r19, ptr [r28+r11*2+0x3a] +XDIS 1d0ee: MISC BASE D55B8D5C5D3B lea r19, ptr [r29+r11*2+0x3b] +XDIS 1d0f4: MISC BASE D55B8D5C5E3C lea r19, ptr [r30+r11*2+0x3c] +XDIS 1d0fa: MISC BASE D55B8D5C5F3D lea r19, ptr [r31+r11*2+0x3d] +XDIS 1d100: MISC BASE D54A8D5C601F lea r19, ptr [rax+r12*2+0x1f] +XDIS 1d106: MISC BASE D54A8D5C6120 lea r19, ptr [rcx+r12*2+0x20] +XDIS 1d10c: MISC BASE D54A8D5C6221 lea r19, ptr [rdx+r12*2+0x21] +XDIS 1d112: MISC BASE D54A8D5C6322 lea r19, ptr [rbx+r12*2+0x22] +XDIS 1d118: MISC BASE D54A8D5C6423 lea r19, ptr [rsp+r12*2+0x23] +XDIS 1d11e: MISC BASE D54A8D5C6524 lea r19, ptr [rbp+r12*2+0x24] +XDIS 1d124: MISC BASE D54A8D5C6625 lea r19, ptr [rsi+r12*2+0x25] +XDIS 1d12a: MISC BASE D54A8D5C6726 lea r19, ptr [rdi+r12*2+0x26] +XDIS 1d130: MISC BASE D54B8D5C6027 lea r19, ptr [r8+r12*2+0x27] +XDIS 1d136: MISC BASE D54B8D5C6128 lea r19, ptr [r9+r12*2+0x28] +XDIS 1d13c: MISC BASE D54B8D5C6229 lea r19, ptr [r10+r12*2+0x29] +XDIS 1d142: MISC BASE D54B8D5C632A lea r19, ptr [r11+r12*2+0x2a] +XDIS 1d148: MISC BASE D54B8D5C642B lea r19, ptr [r12+r12*2+0x2b] +XDIS 1d14e: MISC BASE D54B8D5C652C lea r19, ptr [r13+r12*2+0x2c] +XDIS 1d154: MISC BASE D54B8D5C662D lea r19, ptr [r14+r12*2+0x2d] +XDIS 1d15a: MISC BASE D54B8D5C672E lea r19, ptr [r15+r12*2+0x2e] +XDIS 1d160: MISC BASE D55A8D5C602F lea r19, ptr [r16+r12*2+0x2f] +XDIS 1d166: MISC BASE D55A8D5C6130 lea r19, ptr [r17+r12*2+0x30] +XDIS 1d16c: MISC BASE D55A8D5C6231 lea r19, ptr [r18+r12*2+0x31] +XDIS 1d172: MISC BASE D55A8D5C6332 lea r19, ptr [r19+r12*2+0x32] +XDIS 1d178: MISC BASE D55A8D5C6433 lea r19, ptr [r20+r12*2+0x33] +XDIS 1d17e: MISC BASE D55A8D5C6534 lea r19, ptr [r21+r12*2+0x34] +XDIS 1d184: MISC BASE D55A8D5C6635 lea r19, ptr [r22+r12*2+0x35] +XDIS 1d18a: MISC BASE D55A8D5C6736 lea r19, ptr [r23+r12*2+0x36] +XDIS 1d190: MISC BASE D55B8D5C6037 lea r19, ptr [r24+r12*2+0x37] +XDIS 1d196: MISC BASE D55B8D5C6138 lea r19, ptr [r25+r12*2+0x38] +XDIS 1d19c: MISC BASE D55B8D5C6239 lea r19, ptr [r26+r12*2+0x39] +XDIS 1d1a2: MISC BASE D55B8D5C633A lea r19, ptr [r27+r12*2+0x3a] +XDIS 1d1a8: MISC BASE D55B8D5C643B lea r19, ptr [r28+r12*2+0x3b] +XDIS 1d1ae: MISC BASE D55B8D5C653C lea r19, ptr [r29+r12*2+0x3c] +XDIS 1d1b4: MISC BASE D55B8D5C663D lea r19, ptr [r30+r12*2+0x3d] +XDIS 1d1ba: MISC BASE D55B8D5C673E lea r19, ptr [r31+r12*2+0x3e] +XDIS 1d1c0: MISC BASE D54A8D5C6820 lea r19, ptr [rax+r13*2+0x20] +XDIS 1d1c6: MISC BASE D54A8D5C6921 lea r19, ptr [rcx+r13*2+0x21] +XDIS 1d1cc: MISC BASE D54A8D5C6A22 lea r19, ptr [rdx+r13*2+0x22] +XDIS 1d1d2: MISC BASE D54A8D5C6B23 lea r19, ptr [rbx+r13*2+0x23] +XDIS 1d1d8: MISC BASE D54A8D5C6C24 lea r19, ptr [rsp+r13*2+0x24] +XDIS 1d1de: MISC BASE D54A8D5C6D25 lea r19, ptr [rbp+r13*2+0x25] +XDIS 1d1e4: MISC BASE D54A8D5C6E26 lea r19, ptr [rsi+r13*2+0x26] +XDIS 1d1ea: MISC BASE D54A8D5C6F27 lea r19, ptr [rdi+r13*2+0x27] +XDIS 1d1f0: MISC BASE D54B8D5C6828 lea r19, ptr [r8+r13*2+0x28] +XDIS 1d1f6: MISC BASE D54B8D5C6929 lea r19, ptr [r9+r13*2+0x29] +XDIS 1d1fc: MISC BASE D54B8D5C6A2A lea r19, ptr [r10+r13*2+0x2a] +XDIS 1d202: MISC BASE D54B8D5C6B2B lea r19, ptr [r11+r13*2+0x2b] +XDIS 1d208: MISC BASE D54B8D5C6C2C lea r19, ptr [r12+r13*2+0x2c] +XDIS 1d20e: MISC BASE D54B8D5C6D2D lea r19, ptr [r13+r13*2+0x2d] +XDIS 1d214: MISC BASE D54B8D5C6E2E lea r19, ptr [r14+r13*2+0x2e] +XDIS 1d21a: MISC BASE D54B8D5C6F2F lea r19, ptr [r15+r13*2+0x2f] +XDIS 1d220: MISC BASE D55A8D5C6830 lea r19, ptr [r16+r13*2+0x30] +XDIS 1d226: MISC BASE D55A8D5C6931 lea r19, ptr [r17+r13*2+0x31] +XDIS 1d22c: MISC BASE D55A8D5C6A32 lea r19, ptr [r18+r13*2+0x32] +XDIS 1d232: MISC BASE D55A8D5C6B33 lea r19, ptr [r19+r13*2+0x33] +XDIS 1d238: MISC BASE D55A8D5C6C34 lea r19, ptr [r20+r13*2+0x34] +XDIS 1d23e: MISC BASE D55A8D5C6D35 lea r19, ptr [r21+r13*2+0x35] +XDIS 1d244: MISC BASE D55A8D5C6E36 lea r19, ptr [r22+r13*2+0x36] +XDIS 1d24a: MISC BASE D55A8D5C6F37 lea r19, ptr [r23+r13*2+0x37] +XDIS 1d250: MISC BASE D55B8D5C6838 lea r19, ptr [r24+r13*2+0x38] +XDIS 1d256: MISC BASE D55B8D5C6939 lea r19, ptr [r25+r13*2+0x39] +XDIS 1d25c: MISC BASE D55B8D5C6A3A lea r19, ptr [r26+r13*2+0x3a] +XDIS 1d262: MISC BASE D55B8D5C6B3B lea r19, ptr [r27+r13*2+0x3b] +XDIS 1d268: MISC BASE D55B8D5C6C3C lea r19, ptr [r28+r13*2+0x3c] +XDIS 1d26e: MISC BASE D55B8D5C6D3D lea r19, ptr [r29+r13*2+0x3d] +XDIS 1d274: MISC BASE D55B8D5C6E3E lea r19, ptr [r30+r13*2+0x3e] +XDIS 1d27a: MISC BASE D55B8D5C6F3F lea r19, ptr [r31+r13*2+0x3f] +XDIS 1d280: MISC BASE D54A8D5C7021 lea r19, ptr [rax+r14*2+0x21] +XDIS 1d286: MISC BASE D54A8D5C7122 lea r19, ptr [rcx+r14*2+0x22] +XDIS 1d28c: MISC BASE D54A8D5C7223 lea r19, ptr [rdx+r14*2+0x23] +XDIS 1d292: MISC BASE D54A8D5C7324 lea r19, ptr [rbx+r14*2+0x24] +XDIS 1d298: MISC BASE D54A8D5C7425 lea r19, ptr [rsp+r14*2+0x25] +XDIS 1d29e: MISC BASE D54A8D5C7526 lea r19, ptr [rbp+r14*2+0x26] +XDIS 1d2a4: MISC BASE D54A8D5C7627 lea r19, ptr [rsi+r14*2+0x27] +XDIS 1d2aa: MISC BASE D54A8D5C7728 lea r19, ptr [rdi+r14*2+0x28] +XDIS 1d2b0: MISC BASE D54B8D5C7029 lea r19, ptr [r8+r14*2+0x29] +XDIS 1d2b6: MISC BASE D54B8D5C712A lea r19, ptr [r9+r14*2+0x2a] +XDIS 1d2bc: MISC BASE D54B8D5C722B lea r19, ptr [r10+r14*2+0x2b] +XDIS 1d2c2: MISC BASE D54B8D5C732C lea r19, ptr [r11+r14*2+0x2c] +XDIS 1d2c8: MISC BASE D54B8D5C742D lea r19, ptr [r12+r14*2+0x2d] +XDIS 1d2ce: MISC BASE D54B8D5C752E lea r19, ptr [r13+r14*2+0x2e] +XDIS 1d2d4: MISC BASE D54B8D5C762F lea r19, ptr [r14+r14*2+0x2f] +XDIS 1d2da: MISC BASE D54B8D5C7730 lea r19, ptr [r15+r14*2+0x30] +XDIS 1d2e0: MISC BASE D55A8D5C7031 lea r19, ptr [r16+r14*2+0x31] +XDIS 1d2e6: MISC BASE D55A8D5C7132 lea r19, ptr [r17+r14*2+0x32] +XDIS 1d2ec: MISC BASE D55A8D5C7233 lea r19, ptr [r18+r14*2+0x33] +XDIS 1d2f2: MISC BASE D55A8D5C7334 lea r19, ptr [r19+r14*2+0x34] +XDIS 1d2f8: MISC BASE D55A8D5C7435 lea r19, ptr [r20+r14*2+0x35] +XDIS 1d2fe: MISC BASE D55A8D5C7536 lea r19, ptr [r21+r14*2+0x36] +XDIS 1d304: MISC BASE D55A8D5C7637 lea r19, ptr [r22+r14*2+0x37] +XDIS 1d30a: MISC BASE D55A8D5C7738 lea r19, ptr [r23+r14*2+0x38] +XDIS 1d310: MISC BASE D55B8D5C7039 lea r19, ptr [r24+r14*2+0x39] +XDIS 1d316: MISC BASE D55B8D5C713A lea r19, ptr [r25+r14*2+0x3a] +XDIS 1d31c: MISC BASE D55B8D5C723B lea r19, ptr [r26+r14*2+0x3b] +XDIS 1d322: MISC BASE D55B8D5C733C lea r19, ptr [r27+r14*2+0x3c] +XDIS 1d328: MISC BASE D55B8D5C743D lea r19, ptr [r28+r14*2+0x3d] +XDIS 1d32e: MISC BASE D55B8D5C753E lea r19, ptr [r29+r14*2+0x3e] +XDIS 1d334: MISC BASE D55B8D5C763F lea r19, ptr [r30+r14*2+0x3f] +XDIS 1d33a: MISC BASE D55B8D5C7740 lea r19, ptr [r31+r14*2+0x40] +XDIS 1d340: MISC BASE D54A8D5C7822 lea r19, ptr [rax+r15*2+0x22] +XDIS 1d346: MISC BASE D54A8D5C7923 lea r19, ptr [rcx+r15*2+0x23] +XDIS 1d34c: MISC BASE D54A8D5C7A24 lea r19, ptr [rdx+r15*2+0x24] +XDIS 1d352: MISC BASE D54A8D5C7B25 lea r19, ptr [rbx+r15*2+0x25] +XDIS 1d358: MISC BASE D54A8D5C7C26 lea r19, ptr [rsp+r15*2+0x26] +XDIS 1d35e: MISC BASE D54A8D5C7D27 lea r19, ptr [rbp+r15*2+0x27] +XDIS 1d364: MISC BASE D54A8D5C7E28 lea r19, ptr [rsi+r15*2+0x28] +XDIS 1d36a: MISC BASE D54A8D5C7F29 lea r19, ptr [rdi+r15*2+0x29] +XDIS 1d370: MISC BASE D54B8D5C782A lea r19, ptr [r8+r15*2+0x2a] +XDIS 1d376: MISC BASE D54B8D5C792B lea r19, ptr [r9+r15*2+0x2b] +XDIS 1d37c: MISC BASE D54B8D5C7A2C lea r19, ptr [r10+r15*2+0x2c] +XDIS 1d382: MISC BASE D54B8D5C7B2D lea r19, ptr [r11+r15*2+0x2d] +XDIS 1d388: MISC BASE D54B8D5C7C2E lea r19, ptr [r12+r15*2+0x2e] +XDIS 1d38e: MISC BASE D54B8D5C7D2F lea r19, ptr [r13+r15*2+0x2f] +XDIS 1d394: MISC BASE D54B8D5C7E30 lea r19, ptr [r14+r15*2+0x30] +XDIS 1d39a: MISC BASE D54B8D5C7F31 lea r19, ptr [r15+r15*2+0x31] +XDIS 1d3a0: MISC BASE D55A8D5C7832 lea r19, ptr [r16+r15*2+0x32] +XDIS 1d3a6: MISC BASE D55A8D5C7933 lea r19, ptr [r17+r15*2+0x33] +XDIS 1d3ac: MISC BASE D55A8D5C7A34 lea r19, ptr [r18+r15*2+0x34] +XDIS 1d3b2: MISC BASE D55A8D5C7B35 lea r19, ptr [r19+r15*2+0x35] +XDIS 1d3b8: MISC BASE D55A8D5C7C36 lea r19, ptr [r20+r15*2+0x36] +XDIS 1d3be: MISC BASE D55A8D5C7D37 lea r19, ptr [r21+r15*2+0x37] +XDIS 1d3c4: MISC BASE D55A8D5C7E38 lea r19, ptr [r22+r15*2+0x38] +XDIS 1d3ca: MISC BASE D55A8D5C7F39 lea r19, ptr [r23+r15*2+0x39] +XDIS 1d3d0: MISC BASE D55B8D5C783A lea r19, ptr [r24+r15*2+0x3a] +XDIS 1d3d6: MISC BASE D55B8D5C793B lea r19, ptr [r25+r15*2+0x3b] +XDIS 1d3dc: MISC BASE D55B8D5C7A3C lea r19, ptr [r26+r15*2+0x3c] +XDIS 1d3e2: MISC BASE D55B8D5C7B3D lea r19, ptr [r27+r15*2+0x3d] +XDIS 1d3e8: MISC BASE D55B8D5C7C3E lea r19, ptr [r28+r15*2+0x3e] +XDIS 1d3ee: MISC BASE D55B8D5C7D3F lea r19, ptr [r29+r15*2+0x3f] +XDIS 1d3f4: MISC BASE D55B8D5C7E40 lea r19, ptr [r30+r15*2+0x40] +XDIS 1d3fa: MISC BASE D55B8D5C7F41 lea r19, ptr [r31+r15*2+0x41] +XDIS 1d400: MISC BASE D5688D5C4023 lea r19, ptr [rax+r16*2+0x23] +XDIS 1d406: MISC BASE D5688D5C4124 lea r19, ptr [rcx+r16*2+0x24] +XDIS 1d40c: MISC BASE D5688D5C4225 lea r19, ptr [rdx+r16*2+0x25] +XDIS 1d412: MISC BASE D5688D5C4326 lea r19, ptr [rbx+r16*2+0x26] +XDIS 1d418: MISC BASE D5688D5C4427 lea r19, ptr [rsp+r16*2+0x27] +XDIS 1d41e: MISC BASE D5688D5C4528 lea r19, ptr [rbp+r16*2+0x28] +XDIS 1d424: MISC BASE D5688D5C4629 lea r19, ptr [rsi+r16*2+0x29] +XDIS 1d42a: MISC BASE D5688D5C472A lea r19, ptr [rdi+r16*2+0x2a] +XDIS 1d430: MISC BASE D5698D5C402B lea r19, ptr [r8+r16*2+0x2b] +XDIS 1d436: MISC BASE D5698D5C412C lea r19, ptr [r9+r16*2+0x2c] +XDIS 1d43c: MISC BASE D5698D5C422D lea r19, ptr [r10+r16*2+0x2d] +XDIS 1d442: MISC BASE D5698D5C432E lea r19, ptr [r11+r16*2+0x2e] +XDIS 1d448: MISC BASE D5698D5C442F lea r19, ptr [r12+r16*2+0x2f] +XDIS 1d44e: MISC BASE D5698D5C4530 lea r19, ptr [r13+r16*2+0x30] +XDIS 1d454: MISC BASE D5698D5C4631 lea r19, ptr [r14+r16*2+0x31] +XDIS 1d45a: MISC BASE D5698D5C4732 lea r19, ptr [r15+r16*2+0x32] +XDIS 1d460: MISC BASE D5788D5C4033 lea r19, ptr [r16+r16*2+0x33] +XDIS 1d466: MISC BASE D5788D5C4134 lea r19, ptr [r17+r16*2+0x34] +XDIS 1d46c: MISC BASE D5788D5C4235 lea r19, ptr [r18+r16*2+0x35] +XDIS 1d472: MISC BASE D5788D5C4336 lea r19, ptr [r19+r16*2+0x36] +XDIS 1d478: MISC BASE D5788D5C4437 lea r19, ptr [r20+r16*2+0x37] +XDIS 1d47e: MISC BASE D5788D5C4538 lea r19, ptr [r21+r16*2+0x38] +XDIS 1d484: MISC BASE D5788D5C4639 lea r19, ptr [r22+r16*2+0x39] +XDIS 1d48a: MISC BASE D5788D5C473A lea r19, ptr [r23+r16*2+0x3a] +XDIS 1d490: MISC BASE D5798D5C403B lea r19, ptr [r24+r16*2+0x3b] +XDIS 1d496: MISC BASE D5798D5C413C lea r19, ptr [r25+r16*2+0x3c] +XDIS 1d49c: MISC BASE D5798D5C423D lea r19, ptr [r26+r16*2+0x3d] +XDIS 1d4a2: MISC BASE D5798D5C433E lea r19, ptr [r27+r16*2+0x3e] +XDIS 1d4a8: MISC BASE D5798D5C443F lea r19, ptr [r28+r16*2+0x3f] +XDIS 1d4ae: MISC BASE D5798D5C4540 lea r19, ptr [r29+r16*2+0x40] +XDIS 1d4b4: MISC BASE D5798D5C4641 lea r19, ptr [r30+r16*2+0x41] +XDIS 1d4ba: MISC BASE D5798D5C4742 lea r19, ptr [r31+r16*2+0x42] +XDIS 1d4c0: MISC BASE D5688D5C4824 lea r19, ptr [rax+r17*2+0x24] +XDIS 1d4c6: MISC BASE D5688D5C4925 lea r19, ptr [rcx+r17*2+0x25] +XDIS 1d4cc: MISC BASE D5688D5C4A26 lea r19, ptr [rdx+r17*2+0x26] +XDIS 1d4d2: MISC BASE D5688D5C4B27 lea r19, ptr [rbx+r17*2+0x27] +XDIS 1d4d8: MISC BASE D5688D5C4C28 lea r19, ptr [rsp+r17*2+0x28] +XDIS 1d4de: MISC BASE D5688D5C4D29 lea r19, ptr [rbp+r17*2+0x29] +XDIS 1d4e4: MISC BASE D5688D5C4E2A lea r19, ptr [rsi+r17*2+0x2a] +XDIS 1d4ea: MISC BASE D5688D5C4F2B lea r19, ptr [rdi+r17*2+0x2b] +XDIS 1d4f0: MISC BASE D5698D5C482C lea r19, ptr [r8+r17*2+0x2c] +XDIS 1d4f6: MISC BASE D5698D5C492D lea r19, ptr [r9+r17*2+0x2d] +XDIS 1d4fc: MISC BASE D5698D5C4A2E lea r19, ptr [r10+r17*2+0x2e] +XDIS 1d502: MISC BASE D5698D5C4B2F lea r19, ptr [r11+r17*2+0x2f] +XDIS 1d508: MISC BASE D5698D5C4C30 lea r19, ptr [r12+r17*2+0x30] +XDIS 1d50e: MISC BASE D5698D5C4D31 lea r19, ptr [r13+r17*2+0x31] +XDIS 1d514: MISC BASE D5698D5C4E32 lea r19, ptr [r14+r17*2+0x32] +XDIS 1d51a: MISC BASE D5698D5C4F33 lea r19, ptr [r15+r17*2+0x33] +XDIS 1d520: MISC BASE D5788D5C4834 lea r19, ptr [r16+r17*2+0x34] +XDIS 1d526: MISC BASE D5788D5C4935 lea r19, ptr [r17+r17*2+0x35] +XDIS 1d52c: MISC BASE D5788D5C4A36 lea r19, ptr [r18+r17*2+0x36] +XDIS 1d532: MISC BASE D5788D5C4B37 lea r19, ptr [r19+r17*2+0x37] +XDIS 1d538: MISC BASE D5788D5C4C38 lea r19, ptr [r20+r17*2+0x38] +XDIS 1d53e: MISC BASE D5788D5C4D39 lea r19, ptr [r21+r17*2+0x39] +XDIS 1d544: MISC BASE D5788D5C4E3A lea r19, ptr [r22+r17*2+0x3a] +XDIS 1d54a: MISC BASE D5788D5C4F3B lea r19, ptr [r23+r17*2+0x3b] +XDIS 1d550: MISC BASE D5798D5C483C lea r19, ptr [r24+r17*2+0x3c] +XDIS 1d556: MISC BASE D5798D5C493D lea r19, ptr [r25+r17*2+0x3d] +XDIS 1d55c: MISC BASE D5798D5C4A3E lea r19, ptr [r26+r17*2+0x3e] +XDIS 1d562: MISC BASE D5798D5C4B3F lea r19, ptr [r27+r17*2+0x3f] +XDIS 1d568: MISC BASE D5798D5C4C40 lea r19, ptr [r28+r17*2+0x40] +XDIS 1d56e: MISC BASE D5798D5C4D41 lea r19, ptr [r29+r17*2+0x41] +XDIS 1d574: MISC BASE D5798D5C4E42 lea r19, ptr [r30+r17*2+0x42] +XDIS 1d57a: MISC BASE D5798D5C4F43 lea r19, ptr [r31+r17*2+0x43] +XDIS 1d580: MISC BASE D5688D5C5025 lea r19, ptr [rax+r18*2+0x25] +XDIS 1d586: MISC BASE D5688D5C5126 lea r19, ptr [rcx+r18*2+0x26] +XDIS 1d58c: MISC BASE D5688D5C5227 lea r19, ptr [rdx+r18*2+0x27] +XDIS 1d592: MISC BASE D5688D5C5328 lea r19, ptr [rbx+r18*2+0x28] +XDIS 1d598: MISC BASE D5688D5C5429 lea r19, ptr [rsp+r18*2+0x29] +XDIS 1d59e: MISC BASE D5688D5C552A lea r19, ptr [rbp+r18*2+0x2a] +XDIS 1d5a4: MISC BASE D5688D5C562B lea r19, ptr [rsi+r18*2+0x2b] +XDIS 1d5aa: MISC BASE D5688D5C572C lea r19, ptr [rdi+r18*2+0x2c] +XDIS 1d5b0: MISC BASE D5698D5C502D lea r19, ptr [r8+r18*2+0x2d] +XDIS 1d5b6: MISC BASE D5698D5C512E lea r19, ptr [r9+r18*2+0x2e] +XDIS 1d5bc: MISC BASE D5698D5C522F lea r19, ptr [r10+r18*2+0x2f] +XDIS 1d5c2: MISC BASE D5698D5C5330 lea r19, ptr [r11+r18*2+0x30] +XDIS 1d5c8: MISC BASE D5698D5C5431 lea r19, ptr [r12+r18*2+0x31] +XDIS 1d5ce: MISC BASE D5698D5C5532 lea r19, ptr [r13+r18*2+0x32] +XDIS 1d5d4: MISC BASE D5698D5C5633 lea r19, ptr [r14+r18*2+0x33] +XDIS 1d5da: MISC BASE D5698D5C5734 lea r19, ptr [r15+r18*2+0x34] +XDIS 1d5e0: MISC BASE D5788D5C5035 lea r19, ptr [r16+r18*2+0x35] +XDIS 1d5e6: MISC BASE D5788D5C5136 lea r19, ptr [r17+r18*2+0x36] +XDIS 1d5ec: MISC BASE D5788D5C5237 lea r19, ptr [r18+r18*2+0x37] +XDIS 1d5f2: MISC BASE D5788D5C5338 lea r19, ptr [r19+r18*2+0x38] +XDIS 1d5f8: MISC BASE D5788D5C5439 lea r19, ptr [r20+r18*2+0x39] +XDIS 1d5fe: MISC BASE D5788D5C553A lea r19, ptr [r21+r18*2+0x3a] +XDIS 1d604: MISC BASE D5788D5C563B lea r19, ptr [r22+r18*2+0x3b] +XDIS 1d60a: MISC BASE D5788D5C573C lea r19, ptr [r23+r18*2+0x3c] +XDIS 1d610: MISC BASE D5798D5C503D lea r19, ptr [r24+r18*2+0x3d] +XDIS 1d616: MISC BASE D5798D5C513E lea r19, ptr [r25+r18*2+0x3e] +XDIS 1d61c: MISC BASE D5798D5C523F lea r19, ptr [r26+r18*2+0x3f] +XDIS 1d622: MISC BASE D5798D5C5340 lea r19, ptr [r27+r18*2+0x40] +XDIS 1d628: MISC BASE D5798D5C5441 lea r19, ptr [r28+r18*2+0x41] +XDIS 1d62e: MISC BASE D5798D5C5542 lea r19, ptr [r29+r18*2+0x42] +XDIS 1d634: MISC BASE D5798D5C5643 lea r19, ptr [r30+r18*2+0x43] +XDIS 1d63a: MISC BASE D5798D5C5744 lea r19, ptr [r31+r18*2+0x44] +XDIS 1d640: MISC BASE D5688D5C5826 lea r19, ptr [rax+r19*2+0x26] +XDIS 1d646: MISC BASE D5688D5C5927 lea r19, ptr [rcx+r19*2+0x27] +XDIS 1d64c: MISC BASE D5688D5C5A28 lea r19, ptr [rdx+r19*2+0x28] +XDIS 1d652: MISC BASE D5688D5C5B29 lea r19, ptr [rbx+r19*2+0x29] +XDIS 1d658: MISC BASE D5688D5C5C2A lea r19, ptr [rsp+r19*2+0x2a] +XDIS 1d65e: MISC BASE D5688D5C5D2B lea r19, ptr [rbp+r19*2+0x2b] +XDIS 1d664: MISC BASE D5688D5C5E2C lea r19, ptr [rsi+r19*2+0x2c] +XDIS 1d66a: MISC BASE D5688D5C5F2D lea r19, ptr [rdi+r19*2+0x2d] +XDIS 1d670: MISC BASE D5698D5C582E lea r19, ptr [r8+r19*2+0x2e] +XDIS 1d676: MISC BASE D5698D5C592F lea r19, ptr [r9+r19*2+0x2f] +XDIS 1d67c: MISC BASE D5698D5C5A30 lea r19, ptr [r10+r19*2+0x30] +XDIS 1d682: MISC BASE D5698D5C5B31 lea r19, ptr [r11+r19*2+0x31] +XDIS 1d688: MISC BASE D5698D5C5C32 lea r19, ptr [r12+r19*2+0x32] +XDIS 1d68e: MISC BASE D5698D5C5D33 lea r19, ptr [r13+r19*2+0x33] +XDIS 1d694: MISC BASE D5698D5C5E34 lea r19, ptr [r14+r19*2+0x34] +XDIS 1d69a: MISC BASE D5698D5C5F35 lea r19, ptr [r15+r19*2+0x35] +XDIS 1d6a0: MISC BASE D5788D5C5836 lea r19, ptr [r16+r19*2+0x36] +XDIS 1d6a6: MISC BASE D5788D5C5937 lea r19, ptr [r17+r19*2+0x37] +XDIS 1d6ac: MISC BASE D5788D5C5A38 lea r19, ptr [r18+r19*2+0x38] +XDIS 1d6b2: MISC BASE D5788D5C5B39 lea r19, ptr [r19+r19*2+0x39] +XDIS 1d6b8: MISC BASE D5788D5C5C3A lea r19, ptr [r20+r19*2+0x3a] +XDIS 1d6be: MISC BASE D5788D5C5D3B lea r19, ptr [r21+r19*2+0x3b] +XDIS 1d6c4: MISC BASE D5788D5C5E3C lea r19, ptr [r22+r19*2+0x3c] +XDIS 1d6ca: MISC BASE D5788D5C5F3D lea r19, ptr [r23+r19*2+0x3d] +XDIS 1d6d0: MISC BASE D5798D5C583E lea r19, ptr [r24+r19*2+0x3e] +XDIS 1d6d6: MISC BASE D5798D5C593F lea r19, ptr [r25+r19*2+0x3f] +XDIS 1d6dc: MISC BASE D5798D5C5A40 lea r19, ptr [r26+r19*2+0x40] +XDIS 1d6e2: MISC BASE D5798D5C5B41 lea r19, ptr [r27+r19*2+0x41] +XDIS 1d6e8: MISC BASE D5798D5C5C42 lea r19, ptr [r28+r19*2+0x42] +XDIS 1d6ee: MISC BASE D5798D5C5D43 lea r19, ptr [r29+r19*2+0x43] +XDIS 1d6f4: MISC BASE D5798D5C5E44 lea r19, ptr [r30+r19*2+0x44] +XDIS 1d6fa: MISC BASE D5798D5C5F45 lea r19, ptr [r31+r19*2+0x45] +XDIS 1d700: MISC BASE D5688D5C6027 lea r19, ptr [rax+r20*2+0x27] +XDIS 1d706: MISC BASE D5688D5C6128 lea r19, ptr [rcx+r20*2+0x28] +XDIS 1d70c: MISC BASE D5688D5C6229 lea r19, ptr [rdx+r20*2+0x29] +XDIS 1d712: MISC BASE D5688D5C632A lea r19, ptr [rbx+r20*2+0x2a] +XDIS 1d718: MISC BASE D5688D5C642B lea r19, ptr [rsp+r20*2+0x2b] +XDIS 1d71e: MISC BASE D5688D5C652C lea r19, ptr [rbp+r20*2+0x2c] +XDIS 1d724: MISC BASE D5688D5C662D lea r19, ptr [rsi+r20*2+0x2d] +XDIS 1d72a: MISC BASE D5688D5C672E lea r19, ptr [rdi+r20*2+0x2e] +XDIS 1d730: MISC BASE D5698D5C602F lea r19, ptr [r8+r20*2+0x2f] +XDIS 1d736: MISC BASE D5698D5C6130 lea r19, ptr [r9+r20*2+0x30] +XDIS 1d73c: MISC BASE D5698D5C6231 lea r19, ptr [r10+r20*2+0x31] +XDIS 1d742: MISC BASE D5698D5C6332 lea r19, ptr [r11+r20*2+0x32] +XDIS 1d748: MISC BASE D5698D5C6433 lea r19, ptr [r12+r20*2+0x33] +XDIS 1d74e: MISC BASE D5698D5C6534 lea r19, ptr [r13+r20*2+0x34] +XDIS 1d754: MISC BASE D5698D5C6635 lea r19, ptr [r14+r20*2+0x35] +XDIS 1d75a: MISC BASE D5698D5C6736 lea r19, ptr [r15+r20*2+0x36] +XDIS 1d760: MISC BASE D5788D5C6037 lea r19, ptr [r16+r20*2+0x37] +XDIS 1d766: MISC BASE D5788D5C6138 lea r19, ptr [r17+r20*2+0x38] +XDIS 1d76c: MISC BASE D5788D5C6239 lea r19, ptr [r18+r20*2+0x39] +XDIS 1d772: MISC BASE D5788D5C633A lea r19, ptr [r19+r20*2+0x3a] +XDIS 1d778: MISC BASE D5788D5C643B lea r19, ptr [r20+r20*2+0x3b] +XDIS 1d77e: MISC BASE D5788D5C653C lea r19, ptr [r21+r20*2+0x3c] +XDIS 1d784: MISC BASE D5788D5C663D lea r19, ptr [r22+r20*2+0x3d] +XDIS 1d78a: MISC BASE D5788D5C673E lea r19, ptr [r23+r20*2+0x3e] +XDIS 1d790: MISC BASE D5798D5C603F lea r19, ptr [r24+r20*2+0x3f] +XDIS 1d796: MISC BASE D5798D5C6140 lea r19, ptr [r25+r20*2+0x40] +XDIS 1d79c: MISC BASE D5798D5C6241 lea r19, ptr [r26+r20*2+0x41] +XDIS 1d7a2: MISC BASE D5798D5C6342 lea r19, ptr [r27+r20*2+0x42] +XDIS 1d7a8: MISC BASE D5798D5C6443 lea r19, ptr [r28+r20*2+0x43] +XDIS 1d7ae: MISC BASE D5798D5C6544 lea r19, ptr [r29+r20*2+0x44] +XDIS 1d7b4: MISC BASE D5798D5C6645 lea r19, ptr [r30+r20*2+0x45] +XDIS 1d7ba: MISC BASE D5798D5C6746 lea r19, ptr [r31+r20*2+0x46] +XDIS 1d7c0: MISC BASE D5688D5C6828 lea r19, ptr [rax+r21*2+0x28] +XDIS 1d7c6: MISC BASE D5688D5C6929 lea r19, ptr [rcx+r21*2+0x29] +XDIS 1d7cc: MISC BASE D5688D5C6A2A lea r19, ptr [rdx+r21*2+0x2a] +XDIS 1d7d2: MISC BASE D5688D5C6B2B lea r19, ptr [rbx+r21*2+0x2b] +XDIS 1d7d8: MISC BASE D5688D5C6C2C lea r19, ptr [rsp+r21*2+0x2c] +XDIS 1d7de: MISC BASE D5688D5C6D2D lea r19, ptr [rbp+r21*2+0x2d] +XDIS 1d7e4: MISC BASE D5688D5C6E2E lea r19, ptr [rsi+r21*2+0x2e] +XDIS 1d7ea: MISC BASE D5688D5C6F2F lea r19, ptr [rdi+r21*2+0x2f] +XDIS 1d7f0: MISC BASE D5698D5C6830 lea r19, ptr [r8+r21*2+0x30] +XDIS 1d7f6: MISC BASE D5698D5C6931 lea r19, ptr [r9+r21*2+0x31] +XDIS 1d7fc: MISC BASE D5698D5C6A32 lea r19, ptr [r10+r21*2+0x32] +XDIS 1d802: MISC BASE D5698D5C6B33 lea r19, ptr [r11+r21*2+0x33] +XDIS 1d808: MISC BASE D5698D5C6C34 lea r19, ptr [r12+r21*2+0x34] +XDIS 1d80e: MISC BASE D5698D5C6D35 lea r19, ptr [r13+r21*2+0x35] +XDIS 1d814: MISC BASE D5698D5C6E36 lea r19, ptr [r14+r21*2+0x36] +XDIS 1d81a: MISC BASE D5698D5C6F37 lea r19, ptr [r15+r21*2+0x37] +XDIS 1d820: MISC BASE D5788D5C6838 lea r19, ptr [r16+r21*2+0x38] +XDIS 1d826: MISC BASE D5788D5C6939 lea r19, ptr [r17+r21*2+0x39] +XDIS 1d82c: MISC BASE D5788D5C6A3A lea r19, ptr [r18+r21*2+0x3a] +XDIS 1d832: MISC BASE D5788D5C6B3B lea r19, ptr [r19+r21*2+0x3b] +XDIS 1d838: MISC BASE D5788D5C6C3C lea r19, ptr [r20+r21*2+0x3c] +XDIS 1d83e: MISC BASE D5788D5C6D3D lea r19, ptr [r21+r21*2+0x3d] +XDIS 1d844: MISC BASE D5788D5C6E3E lea r19, ptr [r22+r21*2+0x3e] +XDIS 1d84a: MISC BASE D5788D5C6F3F lea r19, ptr [r23+r21*2+0x3f] +XDIS 1d850: MISC BASE D5798D5C6840 lea r19, ptr [r24+r21*2+0x40] +XDIS 1d856: MISC BASE D5798D5C6941 lea r19, ptr [r25+r21*2+0x41] +XDIS 1d85c: MISC BASE D5798D5C6A42 lea r19, ptr [r26+r21*2+0x42] +XDIS 1d862: MISC BASE D5798D5C6B43 lea r19, ptr [r27+r21*2+0x43] +XDIS 1d868: MISC BASE D5798D5C6C44 lea r19, ptr [r28+r21*2+0x44] +XDIS 1d86e: MISC BASE D5798D5C6D45 lea r19, ptr [r29+r21*2+0x45] +XDIS 1d874: MISC BASE D5798D5C6E46 lea r19, ptr [r30+r21*2+0x46] +XDIS 1d87a: MISC BASE D5798D5C6F47 lea r19, ptr [r31+r21*2+0x47] +XDIS 1d880: MISC BASE D5688D5C7029 lea r19, ptr [rax+r22*2+0x29] +XDIS 1d886: MISC BASE D5688D5C712A lea r19, ptr [rcx+r22*2+0x2a] +XDIS 1d88c: MISC BASE D5688D5C722B lea r19, ptr [rdx+r22*2+0x2b] +XDIS 1d892: MISC BASE D5688D5C732C lea r19, ptr [rbx+r22*2+0x2c] +XDIS 1d898: MISC BASE D5688D5C742D lea r19, ptr [rsp+r22*2+0x2d] +XDIS 1d89e: MISC BASE D5688D5C752E lea r19, ptr [rbp+r22*2+0x2e] +XDIS 1d8a4: MISC BASE D5688D5C762F lea r19, ptr [rsi+r22*2+0x2f] +XDIS 1d8aa: MISC BASE D5688D5C7730 lea r19, ptr [rdi+r22*2+0x30] +XDIS 1d8b0: MISC BASE D5698D5C7031 lea r19, ptr [r8+r22*2+0x31] +XDIS 1d8b6: MISC BASE D5698D5C7132 lea r19, ptr [r9+r22*2+0x32] +XDIS 1d8bc: MISC BASE D5698D5C7233 lea r19, ptr [r10+r22*2+0x33] +XDIS 1d8c2: MISC BASE D5698D5C7334 lea r19, ptr [r11+r22*2+0x34] +XDIS 1d8c8: MISC BASE D5698D5C7435 lea r19, ptr [r12+r22*2+0x35] +XDIS 1d8ce: MISC BASE D5698D5C7536 lea r19, ptr [r13+r22*2+0x36] +XDIS 1d8d4: MISC BASE D5698D5C7637 lea r19, ptr [r14+r22*2+0x37] +XDIS 1d8da: MISC BASE D5698D5C7738 lea r19, ptr [r15+r22*2+0x38] +XDIS 1d8e0: MISC BASE D5788D5C7039 lea r19, ptr [r16+r22*2+0x39] +XDIS 1d8e6: MISC BASE D5788D5C713A lea r19, ptr [r17+r22*2+0x3a] +XDIS 1d8ec: MISC BASE D5788D5C723B lea r19, ptr [r18+r22*2+0x3b] +XDIS 1d8f2: MISC BASE D5788D5C733C lea r19, ptr [r19+r22*2+0x3c] +XDIS 1d8f8: MISC BASE D5788D5C743D lea r19, ptr [r20+r22*2+0x3d] +XDIS 1d8fe: MISC BASE D5788D5C753E lea r19, ptr [r21+r22*2+0x3e] +XDIS 1d904: MISC BASE D5788D5C763F lea r19, ptr [r22+r22*2+0x3f] +XDIS 1d90a: MISC BASE D5788D5C7740 lea r19, ptr [r23+r22*2+0x40] +XDIS 1d910: MISC BASE D5798D5C7041 lea r19, ptr [r24+r22*2+0x41] +XDIS 1d916: MISC BASE D5798D5C7142 lea r19, ptr [r25+r22*2+0x42] +XDIS 1d91c: MISC BASE D5798D5C7243 lea r19, ptr [r26+r22*2+0x43] +XDIS 1d922: MISC BASE D5798D5C7344 lea r19, ptr [r27+r22*2+0x44] +XDIS 1d928: MISC BASE D5798D5C7445 lea r19, ptr [r28+r22*2+0x45] +XDIS 1d92e: MISC BASE D5798D5C7546 lea r19, ptr [r29+r22*2+0x46] +XDIS 1d934: MISC BASE D5798D5C7647 lea r19, ptr [r30+r22*2+0x47] +XDIS 1d93a: MISC BASE D5798D5C7748 lea r19, ptr [r31+r22*2+0x48] +XDIS 1d940: MISC BASE D5688D5C782A lea r19, ptr [rax+r23*2+0x2a] +XDIS 1d946: MISC BASE D5688D5C792B lea r19, ptr [rcx+r23*2+0x2b] +XDIS 1d94c: MISC BASE D5688D5C7A2C lea r19, ptr [rdx+r23*2+0x2c] +XDIS 1d952: MISC BASE D5688D5C7B2D lea r19, ptr [rbx+r23*2+0x2d] +XDIS 1d958: MISC BASE D5688D5C7C2E lea r19, ptr [rsp+r23*2+0x2e] +XDIS 1d95e: MISC BASE D5688D5C7D2F lea r19, ptr [rbp+r23*2+0x2f] +XDIS 1d964: MISC BASE D5688D5C7E30 lea r19, ptr [rsi+r23*2+0x30] +XDIS 1d96a: MISC BASE D5688D5C7F31 lea r19, ptr [rdi+r23*2+0x31] +XDIS 1d970: MISC BASE D5698D5C7832 lea r19, ptr [r8+r23*2+0x32] +XDIS 1d976: MISC BASE D5698D5C7933 lea r19, ptr [r9+r23*2+0x33] +XDIS 1d97c: MISC BASE D5698D5C7A34 lea r19, ptr [r10+r23*2+0x34] +XDIS 1d982: MISC BASE D5698D5C7B35 lea r19, ptr [r11+r23*2+0x35] +XDIS 1d988: MISC BASE D5698D5C7C36 lea r19, ptr [r12+r23*2+0x36] +XDIS 1d98e: MISC BASE D5698D5C7D37 lea r19, ptr [r13+r23*2+0x37] +XDIS 1d994: MISC BASE D5698D5C7E38 lea r19, ptr [r14+r23*2+0x38] +XDIS 1d99a: MISC BASE D5698D5C7F39 lea r19, ptr [r15+r23*2+0x39] +XDIS 1d9a0: MISC BASE D5788D5C783A lea r19, ptr [r16+r23*2+0x3a] +XDIS 1d9a6: MISC BASE D5788D5C793B lea r19, ptr [r17+r23*2+0x3b] +XDIS 1d9ac: MISC BASE D5788D5C7A3C lea r19, ptr [r18+r23*2+0x3c] +XDIS 1d9b2: MISC BASE D5788D5C7B3D lea r19, ptr [r19+r23*2+0x3d] +XDIS 1d9b8: MISC BASE D5788D5C7C3E lea r19, ptr [r20+r23*2+0x3e] +XDIS 1d9be: MISC BASE D5788D5C7D3F lea r19, ptr [r21+r23*2+0x3f] +XDIS 1d9c4: MISC BASE D5788D5C7E40 lea r19, ptr [r22+r23*2+0x40] +XDIS 1d9ca: MISC BASE D5788D5C7F41 lea r19, ptr [r23+r23*2+0x41] +XDIS 1d9d0: MISC BASE D5798D5C7842 lea r19, ptr [r24+r23*2+0x42] +XDIS 1d9d6: MISC BASE D5798D5C7943 lea r19, ptr [r25+r23*2+0x43] +XDIS 1d9dc: MISC BASE D5798D5C7A44 lea r19, ptr [r26+r23*2+0x44] +XDIS 1d9e2: MISC BASE D5798D5C7B45 lea r19, ptr [r27+r23*2+0x45] +XDIS 1d9e8: MISC BASE D5798D5C7C46 lea r19, ptr [r28+r23*2+0x46] +XDIS 1d9ee: MISC BASE D5798D5C7D47 lea r19, ptr [r29+r23*2+0x47] +XDIS 1d9f4: MISC BASE D5798D5C7E48 lea r19, ptr [r30+r23*2+0x48] +XDIS 1d9fa: MISC BASE D5798D5C7F49 lea r19, ptr [r31+r23*2+0x49] +XDIS 1da00: MISC BASE D56A8D5C402B lea r19, ptr [rax+r24*2+0x2b] +XDIS 1da06: MISC BASE D56A8D5C412C lea r19, ptr [rcx+r24*2+0x2c] +XDIS 1da0c: MISC BASE D56A8D5C422D lea r19, ptr [rdx+r24*2+0x2d] +XDIS 1da12: MISC BASE D56A8D5C432E lea r19, ptr [rbx+r24*2+0x2e] +XDIS 1da18: MISC BASE D56A8D5C442F lea r19, ptr [rsp+r24*2+0x2f] +XDIS 1da1e: MISC BASE D56A8D5C4530 lea r19, ptr [rbp+r24*2+0x30] +XDIS 1da24: MISC BASE D56A8D5C4631 lea r19, ptr [rsi+r24*2+0x31] +XDIS 1da2a: MISC BASE D56A8D5C4732 lea r19, ptr [rdi+r24*2+0x32] +XDIS 1da30: MISC BASE D56B8D5C4033 lea r19, ptr [r8+r24*2+0x33] +XDIS 1da36: MISC BASE D56B8D5C4134 lea r19, ptr [r9+r24*2+0x34] +XDIS 1da3c: MISC BASE D56B8D5C4235 lea r19, ptr [r10+r24*2+0x35] +XDIS 1da42: MISC BASE D56B8D5C4336 lea r19, ptr [r11+r24*2+0x36] +XDIS 1da48: MISC BASE D56B8D5C4437 lea r19, ptr [r12+r24*2+0x37] +XDIS 1da4e: MISC BASE D56B8D5C4538 lea r19, ptr [r13+r24*2+0x38] +XDIS 1da54: MISC BASE D56B8D5C4639 lea r19, ptr [r14+r24*2+0x39] +XDIS 1da5a: MISC BASE D56B8D5C473A lea r19, ptr [r15+r24*2+0x3a] +XDIS 1da60: MISC BASE D57A8D5C403B lea r19, ptr [r16+r24*2+0x3b] +XDIS 1da66: MISC BASE D57A8D5C413C lea r19, ptr [r17+r24*2+0x3c] +XDIS 1da6c: MISC BASE D57A8D5C423D lea r19, ptr [r18+r24*2+0x3d] +XDIS 1da72: MISC BASE D57A8D5C433E lea r19, ptr [r19+r24*2+0x3e] +XDIS 1da78: MISC BASE D57A8D5C443F lea r19, ptr [r20+r24*2+0x3f] +XDIS 1da7e: MISC BASE D57A8D5C4540 lea r19, ptr [r21+r24*2+0x40] +XDIS 1da84: MISC BASE D57A8D5C4641 lea r19, ptr [r22+r24*2+0x41] +XDIS 1da8a: MISC BASE D57A8D5C4742 lea r19, ptr [r23+r24*2+0x42] +XDIS 1da90: MISC BASE D57B8D5C4043 lea r19, ptr [r24+r24*2+0x43] +XDIS 1da96: MISC BASE D57B8D5C4144 lea r19, ptr [r25+r24*2+0x44] +XDIS 1da9c: MISC BASE D57B8D5C4245 lea r19, ptr [r26+r24*2+0x45] +XDIS 1daa2: MISC BASE D57B8D5C4346 lea r19, ptr [r27+r24*2+0x46] +XDIS 1daa8: MISC BASE D57B8D5C4447 lea r19, ptr [r28+r24*2+0x47] +XDIS 1daae: MISC BASE D57B8D5C4548 lea r19, ptr [r29+r24*2+0x48] +XDIS 1dab4: MISC BASE D57B8D5C4649 lea r19, ptr [r30+r24*2+0x49] +XDIS 1daba: MISC BASE D57B8D5C474A lea r19, ptr [r31+r24*2+0x4a] +XDIS 1dac0: MISC BASE D56A8D5C482C lea r19, ptr [rax+r25*2+0x2c] +XDIS 1dac6: MISC BASE D56A8D5C492D lea r19, ptr [rcx+r25*2+0x2d] +XDIS 1dacc: MISC BASE D56A8D5C4A2E lea r19, ptr [rdx+r25*2+0x2e] +XDIS 1dad2: MISC BASE D56A8D5C4B2F lea r19, ptr [rbx+r25*2+0x2f] +XDIS 1dad8: MISC BASE D56A8D5C4C30 lea r19, ptr [rsp+r25*2+0x30] +XDIS 1dade: MISC BASE D56A8D5C4D31 lea r19, ptr [rbp+r25*2+0x31] +XDIS 1dae4: MISC BASE D56A8D5C4E32 lea r19, ptr [rsi+r25*2+0x32] +XDIS 1daea: MISC BASE D56A8D5C4F33 lea r19, ptr [rdi+r25*2+0x33] +XDIS 1daf0: MISC BASE D56B8D5C4834 lea r19, ptr [r8+r25*2+0x34] +XDIS 1daf6: MISC BASE D56B8D5C4935 lea r19, ptr [r9+r25*2+0x35] +XDIS 1dafc: MISC BASE D56B8D5C4A36 lea r19, ptr [r10+r25*2+0x36] +XDIS 1db02: MISC BASE D56B8D5C4B37 lea r19, ptr [r11+r25*2+0x37] +XDIS 1db08: MISC BASE D56B8D5C4C38 lea r19, ptr [r12+r25*2+0x38] +XDIS 1db0e: MISC BASE D56B8D5C4D39 lea r19, ptr [r13+r25*2+0x39] +XDIS 1db14: MISC BASE D56B8D5C4E3A lea r19, ptr [r14+r25*2+0x3a] +XDIS 1db1a: MISC BASE D56B8D5C4F3B lea r19, ptr [r15+r25*2+0x3b] +XDIS 1db20: MISC BASE D57A8D5C483C lea r19, ptr [r16+r25*2+0x3c] +XDIS 1db26: MISC BASE D57A8D5C493D lea r19, ptr [r17+r25*2+0x3d] +XDIS 1db2c: MISC BASE D57A8D5C4A3E lea r19, ptr [r18+r25*2+0x3e] +XDIS 1db32: MISC BASE D57A8D5C4B3F lea r19, ptr [r19+r25*2+0x3f] +XDIS 1db38: MISC BASE D57A8D5C4C40 lea r19, ptr [r20+r25*2+0x40] +XDIS 1db3e: MISC BASE D57A8D5C4D41 lea r19, ptr [r21+r25*2+0x41] +XDIS 1db44: MISC BASE D57A8D5C4E42 lea r19, ptr [r22+r25*2+0x42] +XDIS 1db4a: MISC BASE D57A8D5C4F43 lea r19, ptr [r23+r25*2+0x43] +XDIS 1db50: MISC BASE D57B8D5C4844 lea r19, ptr [r24+r25*2+0x44] +XDIS 1db56: MISC BASE D57B8D5C4945 lea r19, ptr [r25+r25*2+0x45] +XDIS 1db5c: MISC BASE D57B8D5C4A46 lea r19, ptr [r26+r25*2+0x46] +XDIS 1db62: MISC BASE D57B8D5C4B47 lea r19, ptr [r27+r25*2+0x47] +XDIS 1db68: MISC BASE D57B8D5C4C48 lea r19, ptr [r28+r25*2+0x48] +XDIS 1db6e: MISC BASE D57B8D5C4D49 lea r19, ptr [r29+r25*2+0x49] +XDIS 1db74: MISC BASE D57B8D5C4E4A lea r19, ptr [r30+r25*2+0x4a] +XDIS 1db7a: MISC BASE D57B8D5C4F4B lea r19, ptr [r31+r25*2+0x4b] +XDIS 1db80: MISC BASE D56A8D5C502D lea r19, ptr [rax+r26*2+0x2d] +XDIS 1db86: MISC BASE D56A8D5C512E lea r19, ptr [rcx+r26*2+0x2e] +XDIS 1db8c: MISC BASE D56A8D5C522F lea r19, ptr [rdx+r26*2+0x2f] +XDIS 1db92: MISC BASE D56A8D5C5330 lea r19, ptr [rbx+r26*2+0x30] +XDIS 1db98: MISC BASE D56A8D5C5431 lea r19, ptr [rsp+r26*2+0x31] +XDIS 1db9e: MISC BASE D56A8D5C5532 lea r19, ptr [rbp+r26*2+0x32] +XDIS 1dba4: MISC BASE D56A8D5C5633 lea r19, ptr [rsi+r26*2+0x33] +XDIS 1dbaa: MISC BASE D56A8D5C5734 lea r19, ptr [rdi+r26*2+0x34] +XDIS 1dbb0: MISC BASE D56B8D5C5035 lea r19, ptr [r8+r26*2+0x35] +XDIS 1dbb6: MISC BASE D56B8D5C5136 lea r19, ptr [r9+r26*2+0x36] +XDIS 1dbbc: MISC BASE D56B8D5C5237 lea r19, ptr [r10+r26*2+0x37] +XDIS 1dbc2: MISC BASE D56B8D5C5338 lea r19, ptr [r11+r26*2+0x38] +XDIS 1dbc8: MISC BASE D56B8D5C5439 lea r19, ptr [r12+r26*2+0x39] +XDIS 1dbce: MISC BASE D56B8D5C553A lea r19, ptr [r13+r26*2+0x3a] +XDIS 1dbd4: MISC BASE D56B8D5C563B lea r19, ptr [r14+r26*2+0x3b] +XDIS 1dbda: MISC BASE D56B8D5C573C lea r19, ptr [r15+r26*2+0x3c] +XDIS 1dbe0: MISC BASE D57A8D5C503D lea r19, ptr [r16+r26*2+0x3d] +XDIS 1dbe6: MISC BASE D57A8D5C513E lea r19, ptr [r17+r26*2+0x3e] +XDIS 1dbec: MISC BASE D57A8D5C523F lea r19, ptr [r18+r26*2+0x3f] +XDIS 1dbf2: MISC BASE D57A8D5C5340 lea r19, ptr [r19+r26*2+0x40] +XDIS 1dbf8: MISC BASE D57A8D5C5441 lea r19, ptr [r20+r26*2+0x41] +XDIS 1dbfe: MISC BASE D57A8D5C5542 lea r19, ptr [r21+r26*2+0x42] +XDIS 1dc04: MISC BASE D57A8D5C5643 lea r19, ptr [r22+r26*2+0x43] +XDIS 1dc0a: MISC BASE D57A8D5C5744 lea r19, ptr [r23+r26*2+0x44] +XDIS 1dc10: MISC BASE D57B8D5C5045 lea r19, ptr [r24+r26*2+0x45] +XDIS 1dc16: MISC BASE D57B8D5C5146 lea r19, ptr [r25+r26*2+0x46] +XDIS 1dc1c: MISC BASE D57B8D5C5247 lea r19, ptr [r26+r26*2+0x47] +XDIS 1dc22: MISC BASE D57B8D5C5348 lea r19, ptr [r27+r26*2+0x48] +XDIS 1dc28: MISC BASE D57B8D5C5449 lea r19, ptr [r28+r26*2+0x49] +XDIS 1dc2e: MISC BASE D57B8D5C554A lea r19, ptr [r29+r26*2+0x4a] +XDIS 1dc34: MISC BASE D57B8D5C564B lea r19, ptr [r30+r26*2+0x4b] +XDIS 1dc3a: MISC BASE D57B8D5C574C lea r19, ptr [r31+r26*2+0x4c] +XDIS 1dc40: MISC BASE D56A8D5C582E lea r19, ptr [rax+r27*2+0x2e] +XDIS 1dc46: MISC BASE D56A8D5C592F lea r19, ptr [rcx+r27*2+0x2f] +XDIS 1dc4c: MISC BASE D56A8D5C5A30 lea r19, ptr [rdx+r27*2+0x30] +XDIS 1dc52: MISC BASE D56A8D5C5B31 lea r19, ptr [rbx+r27*2+0x31] +XDIS 1dc58: MISC BASE D56A8D5C5C32 lea r19, ptr [rsp+r27*2+0x32] +XDIS 1dc5e: MISC BASE D56A8D5C5D33 lea r19, ptr [rbp+r27*2+0x33] +XDIS 1dc64: MISC BASE D56A8D5C5E34 lea r19, ptr [rsi+r27*2+0x34] +XDIS 1dc6a: MISC BASE D56A8D5C5F35 lea r19, ptr [rdi+r27*2+0x35] +XDIS 1dc70: MISC BASE D56B8D5C5836 lea r19, ptr [r8+r27*2+0x36] +XDIS 1dc76: MISC BASE D56B8D5C5937 lea r19, ptr [r9+r27*2+0x37] +XDIS 1dc7c: MISC BASE D56B8D5C5A38 lea r19, ptr [r10+r27*2+0x38] +XDIS 1dc82: MISC BASE D56B8D5C5B39 lea r19, ptr [r11+r27*2+0x39] +XDIS 1dc88: MISC BASE D56B8D5C5C3A lea r19, ptr [r12+r27*2+0x3a] +XDIS 1dc8e: MISC BASE D56B8D5C5D3B lea r19, ptr [r13+r27*2+0x3b] +XDIS 1dc94: MISC BASE D56B8D5C5E3C lea r19, ptr [r14+r27*2+0x3c] +XDIS 1dc9a: MISC BASE D56B8D5C5F3D lea r19, ptr [r15+r27*2+0x3d] +XDIS 1dca0: MISC BASE D57A8D5C583E lea r19, ptr [r16+r27*2+0x3e] +XDIS 1dca6: MISC BASE D57A8D5C593F lea r19, ptr [r17+r27*2+0x3f] +XDIS 1dcac: MISC BASE D57A8D5C5A40 lea r19, ptr [r18+r27*2+0x40] +XDIS 1dcb2: MISC BASE D57A8D5C5B41 lea r19, ptr [r19+r27*2+0x41] +XDIS 1dcb8: MISC BASE D57A8D5C5C42 lea r19, ptr [r20+r27*2+0x42] +XDIS 1dcbe: MISC BASE D57A8D5C5D43 lea r19, ptr [r21+r27*2+0x43] +XDIS 1dcc4: MISC BASE D57A8D5C5E44 lea r19, ptr [r22+r27*2+0x44] +XDIS 1dcca: MISC BASE D57A8D5C5F45 lea r19, ptr [r23+r27*2+0x45] +XDIS 1dcd0: MISC BASE D57B8D5C5846 lea r19, ptr [r24+r27*2+0x46] +XDIS 1dcd6: MISC BASE D57B8D5C5947 lea r19, ptr [r25+r27*2+0x47] +XDIS 1dcdc: MISC BASE D57B8D5C5A48 lea r19, ptr [r26+r27*2+0x48] +XDIS 1dce2: MISC BASE D57B8D5C5B49 lea r19, ptr [r27+r27*2+0x49] +XDIS 1dce8: MISC BASE D57B8D5C5C4A lea r19, ptr [r28+r27*2+0x4a] +XDIS 1dcee: MISC BASE D57B8D5C5D4B lea r19, ptr [r29+r27*2+0x4b] +XDIS 1dcf4: MISC BASE D57B8D5C5E4C lea r19, ptr [r30+r27*2+0x4c] +XDIS 1dcfa: MISC BASE D57B8D5C5F4D lea r19, ptr [r31+r27*2+0x4d] +XDIS 1dd00: MISC BASE D56A8D5C602F lea r19, ptr [rax+r28*2+0x2f] +XDIS 1dd06: MISC BASE D56A8D5C6130 lea r19, ptr [rcx+r28*2+0x30] +XDIS 1dd0c: MISC BASE D56A8D5C6231 lea r19, ptr [rdx+r28*2+0x31] +XDIS 1dd12: MISC BASE D56A8D5C6332 lea r19, ptr [rbx+r28*2+0x32] +XDIS 1dd18: MISC BASE D56A8D5C6433 lea r19, ptr [rsp+r28*2+0x33] +XDIS 1dd1e: MISC BASE D56A8D5C6534 lea r19, ptr [rbp+r28*2+0x34] +XDIS 1dd24: MISC BASE D56A8D5C6635 lea r19, ptr [rsi+r28*2+0x35] +XDIS 1dd2a: MISC BASE D56A8D5C6736 lea r19, ptr [rdi+r28*2+0x36] +XDIS 1dd30: MISC BASE D56B8D5C6037 lea r19, ptr [r8+r28*2+0x37] +XDIS 1dd36: MISC BASE D56B8D5C6138 lea r19, ptr [r9+r28*2+0x38] +XDIS 1dd3c: MISC BASE D56B8D5C6239 lea r19, ptr [r10+r28*2+0x39] +XDIS 1dd42: MISC BASE D56B8D5C633A lea r19, ptr [r11+r28*2+0x3a] +XDIS 1dd48: MISC BASE D56B8D5C643B lea r19, ptr [r12+r28*2+0x3b] +XDIS 1dd4e: MISC BASE D56B8D5C653C lea r19, ptr [r13+r28*2+0x3c] +XDIS 1dd54: MISC BASE D56B8D5C663D lea r19, ptr [r14+r28*2+0x3d] +XDIS 1dd5a: MISC BASE D56B8D5C673E lea r19, ptr [r15+r28*2+0x3e] +XDIS 1dd60: MISC BASE D57A8D5C603F lea r19, ptr [r16+r28*2+0x3f] +XDIS 1dd66: MISC BASE D57A8D5C6140 lea r19, ptr [r17+r28*2+0x40] +XDIS 1dd6c: MISC BASE D57A8D5C6241 lea r19, ptr [r18+r28*2+0x41] +XDIS 1dd72: MISC BASE D57A8D5C6342 lea r19, ptr [r19+r28*2+0x42] +XDIS 1dd78: MISC BASE D57A8D5C6443 lea r19, ptr [r20+r28*2+0x43] +XDIS 1dd7e: MISC BASE D57A8D5C6544 lea r19, ptr [r21+r28*2+0x44] +XDIS 1dd84: MISC BASE D57A8D5C6645 lea r19, ptr [r22+r28*2+0x45] +XDIS 1dd8a: MISC BASE D57A8D5C6746 lea r19, ptr [r23+r28*2+0x46] +XDIS 1dd90: MISC BASE D57B8D5C6047 lea r19, ptr [r24+r28*2+0x47] +XDIS 1dd96: MISC BASE D57B8D5C6148 lea r19, ptr [r25+r28*2+0x48] +XDIS 1dd9c: MISC BASE D57B8D5C6249 lea r19, ptr [r26+r28*2+0x49] +XDIS 1dda2: MISC BASE D57B8D5C634A lea r19, ptr [r27+r28*2+0x4a] +XDIS 1dda8: MISC BASE D57B8D5C644B lea r19, ptr [r28+r28*2+0x4b] +XDIS 1ddae: MISC BASE D57B8D5C654C lea r19, ptr [r29+r28*2+0x4c] +XDIS 1ddb4: MISC BASE D57B8D5C664D lea r19, ptr [r30+r28*2+0x4d] +XDIS 1ddba: MISC BASE D57B8D5C674E lea r19, ptr [r31+r28*2+0x4e] +XDIS 1ddc0: MISC BASE D56A8D5C6830 lea r19, ptr [rax+r29*2+0x30] +XDIS 1ddc6: MISC BASE D56A8D5C6931 lea r19, ptr [rcx+r29*2+0x31] +XDIS 1ddcc: MISC BASE D56A8D5C6A32 lea r19, ptr [rdx+r29*2+0x32] +XDIS 1ddd2: MISC BASE D56A8D5C6B33 lea r19, ptr [rbx+r29*2+0x33] +XDIS 1ddd8: MISC BASE D56A8D5C6C34 lea r19, ptr [rsp+r29*2+0x34] +XDIS 1ddde: MISC BASE D56A8D5C6D35 lea r19, ptr [rbp+r29*2+0x35] +XDIS 1dde4: MISC BASE D56A8D5C6E36 lea r19, ptr [rsi+r29*2+0x36] +XDIS 1ddea: MISC BASE D56A8D5C6F37 lea r19, ptr [rdi+r29*2+0x37] +XDIS 1ddf0: MISC BASE D56B8D5C6838 lea r19, ptr [r8+r29*2+0x38] +XDIS 1ddf6: MISC BASE D56B8D5C6939 lea r19, ptr [r9+r29*2+0x39] +XDIS 1ddfc: MISC BASE D56B8D5C6A3A lea r19, ptr [r10+r29*2+0x3a] +XDIS 1de02: MISC BASE D56B8D5C6B3B lea r19, ptr [r11+r29*2+0x3b] +XDIS 1de08: MISC BASE D56B8D5C6C3C lea r19, ptr [r12+r29*2+0x3c] +XDIS 1de0e: MISC BASE D56B8D5C6D3D lea r19, ptr [r13+r29*2+0x3d] +XDIS 1de14: MISC BASE D56B8D5C6E3E lea r19, ptr [r14+r29*2+0x3e] +XDIS 1de1a: MISC BASE D56B8D5C6F3F lea r19, ptr [r15+r29*2+0x3f] +XDIS 1de20: MISC BASE D57A8D5C6840 lea r19, ptr [r16+r29*2+0x40] +XDIS 1de26: MISC BASE D57A8D5C6941 lea r19, ptr [r17+r29*2+0x41] +XDIS 1de2c: MISC BASE D57A8D5C6A42 lea r19, ptr [r18+r29*2+0x42] +XDIS 1de32: MISC BASE D57A8D5C6B43 lea r19, ptr [r19+r29*2+0x43] +XDIS 1de38: MISC BASE D57A8D5C6C44 lea r19, ptr [r20+r29*2+0x44] +XDIS 1de3e: MISC BASE D57A8D5C6D45 lea r19, ptr [r21+r29*2+0x45] +XDIS 1de44: MISC BASE D57A8D5C6E46 lea r19, ptr [r22+r29*2+0x46] +XDIS 1de4a: MISC BASE D57A8D5C6F47 lea r19, ptr [r23+r29*2+0x47] +XDIS 1de50: MISC BASE D57B8D5C6848 lea r19, ptr [r24+r29*2+0x48] +XDIS 1de56: MISC BASE D57B8D5C6949 lea r19, ptr [r25+r29*2+0x49] +XDIS 1de5c: MISC BASE D57B8D5C6A4A lea r19, ptr [r26+r29*2+0x4a] +XDIS 1de62: MISC BASE D57B8D5C6B4B lea r19, ptr [r27+r29*2+0x4b] +XDIS 1de68: MISC BASE D57B8D5C6C4C lea r19, ptr [r28+r29*2+0x4c] +XDIS 1de6e: MISC BASE D57B8D5C6D4D lea r19, ptr [r29+r29*2+0x4d] +XDIS 1de74: MISC BASE D57B8D5C6E4E lea r19, ptr [r30+r29*2+0x4e] +XDIS 1de7a: MISC BASE D57B8D5C6F4F lea r19, ptr [r31+r29*2+0x4f] +XDIS 1de80: MISC BASE D56A8D5C7031 lea r19, ptr [rax+r30*2+0x31] +XDIS 1de86: MISC BASE D56A8D5C7132 lea r19, ptr [rcx+r30*2+0x32] +XDIS 1de8c: MISC BASE D56A8D5C7233 lea r19, ptr [rdx+r30*2+0x33] +XDIS 1de92: MISC BASE D56A8D5C7334 lea r19, ptr [rbx+r30*2+0x34] +XDIS 1de98: MISC BASE D56A8D5C7435 lea r19, ptr [rsp+r30*2+0x35] +XDIS 1de9e: MISC BASE D56A8D5C7536 lea r19, ptr [rbp+r30*2+0x36] +XDIS 1dea4: MISC BASE D56A8D5C7637 lea r19, ptr [rsi+r30*2+0x37] +XDIS 1deaa: MISC BASE D56A8D5C7738 lea r19, ptr [rdi+r30*2+0x38] +XDIS 1deb0: MISC BASE D56B8D5C7039 lea r19, ptr [r8+r30*2+0x39] +XDIS 1deb6: MISC BASE D56B8D5C713A lea r19, ptr [r9+r30*2+0x3a] +XDIS 1debc: MISC BASE D56B8D5C723B lea r19, ptr [r10+r30*2+0x3b] +XDIS 1dec2: MISC BASE D56B8D5C733C lea r19, ptr [r11+r30*2+0x3c] +XDIS 1dec8: MISC BASE D56B8D5C743D lea r19, ptr [r12+r30*2+0x3d] +XDIS 1dece: MISC BASE D56B8D5C753E lea r19, ptr [r13+r30*2+0x3e] +XDIS 1ded4: MISC BASE D56B8D5C763F lea r19, ptr [r14+r30*2+0x3f] +XDIS 1deda: MISC BASE D56B8D5C7740 lea r19, ptr [r15+r30*2+0x40] +XDIS 1dee0: MISC BASE D57A8D5C7041 lea r19, ptr [r16+r30*2+0x41] +XDIS 1dee6: MISC BASE D57A8D5C7142 lea r19, ptr [r17+r30*2+0x42] +XDIS 1deec: MISC BASE D57A8D5C7243 lea r19, ptr [r18+r30*2+0x43] +XDIS 1def2: MISC BASE D57A8D5C7344 lea r19, ptr [r19+r30*2+0x44] +XDIS 1def8: MISC BASE D57A8D5C7445 lea r19, ptr [r20+r30*2+0x45] +XDIS 1defe: MISC BASE D57A8D5C7546 lea r19, ptr [r21+r30*2+0x46] +XDIS 1df04: MISC BASE D57A8D5C7647 lea r19, ptr [r22+r30*2+0x47] +XDIS 1df0a: MISC BASE D57A8D5C7748 lea r19, ptr [r23+r30*2+0x48] +XDIS 1df10: MISC BASE D57B8D5C7049 lea r19, ptr [r24+r30*2+0x49] +XDIS 1df16: MISC BASE D57B8D5C714A lea r19, ptr [r25+r30*2+0x4a] +XDIS 1df1c: MISC BASE D57B8D5C724B lea r19, ptr [r26+r30*2+0x4b] +XDIS 1df22: MISC BASE D57B8D5C734C lea r19, ptr [r27+r30*2+0x4c] +XDIS 1df28: MISC BASE D57B8D5C744D lea r19, ptr [r28+r30*2+0x4d] +XDIS 1df2e: MISC BASE D57B8D5C754E lea r19, ptr [r29+r30*2+0x4e] +XDIS 1df34: MISC BASE D57B8D5C764F lea r19, ptr [r30+r30*2+0x4f] +XDIS 1df3a: MISC BASE D57B8D5C7750 lea r19, ptr [r31+r30*2+0x50] +XDIS 1df40: MISC BASE D56A8D5C7832 lea r19, ptr [rax+r31*2+0x32] +XDIS 1df46: MISC BASE D56A8D5C7933 lea r19, ptr [rcx+r31*2+0x33] +XDIS 1df4c: MISC BASE D56A8D5C7A34 lea r19, ptr [rdx+r31*2+0x34] +XDIS 1df52: MISC BASE D56A8D5C7B35 lea r19, ptr [rbx+r31*2+0x35] +XDIS 1df58: MISC BASE D56A8D5C7C36 lea r19, ptr [rsp+r31*2+0x36] +XDIS 1df5e: MISC BASE D56A8D5C7D37 lea r19, ptr [rbp+r31*2+0x37] +XDIS 1df64: MISC BASE D56A8D5C7E38 lea r19, ptr [rsi+r31*2+0x38] +XDIS 1df6a: MISC BASE D56A8D5C7F39 lea r19, ptr [rdi+r31*2+0x39] +XDIS 1df70: MISC BASE D56B8D5C783A lea r19, ptr [r8+r31*2+0x3a] +XDIS 1df76: MISC BASE D56B8D5C793B lea r19, ptr [r9+r31*2+0x3b] +XDIS 1df7c: MISC BASE D56B8D5C7A3C lea r19, ptr [r10+r31*2+0x3c] +XDIS 1df82: MISC BASE D56B8D5C7B3D lea r19, ptr [r11+r31*2+0x3d] +XDIS 1df88: MISC BASE D56B8D5C7C3E lea r19, ptr [r12+r31*2+0x3e] +XDIS 1df8e: MISC BASE D56B8D5C7D3F lea r19, ptr [r13+r31*2+0x3f] +XDIS 1df94: MISC BASE D56B8D5C7E40 lea r19, ptr [r14+r31*2+0x40] +XDIS 1df9a: MISC BASE D56B8D5C7F41 lea r19, ptr [r15+r31*2+0x41] +XDIS 1dfa0: MISC BASE D57A8D5C7842 lea r19, ptr [r16+r31*2+0x42] +XDIS 1dfa6: MISC BASE D57A8D5C7943 lea r19, ptr [r17+r31*2+0x43] +XDIS 1dfac: MISC BASE D57A8D5C7A44 lea r19, ptr [r18+r31*2+0x44] +XDIS 1dfb2: MISC BASE D57A8D5C7B45 lea r19, ptr [r19+r31*2+0x45] +XDIS 1dfb8: MISC BASE D57A8D5C7C46 lea r19, ptr [r20+r31*2+0x46] +XDIS 1dfbe: MISC BASE D57A8D5C7D47 lea r19, ptr [r21+r31*2+0x47] +XDIS 1dfc4: MISC BASE D57A8D5C7E48 lea r19, ptr [r22+r31*2+0x48] +XDIS 1dfca: MISC BASE D57A8D5C7F49 lea r19, ptr [r23+r31*2+0x49] +XDIS 1dfd0: MISC BASE D57B8D5C784A lea r19, ptr [r24+r31*2+0x4a] +XDIS 1dfd6: MISC BASE D57B8D5C794B lea r19, ptr [r25+r31*2+0x4b] +XDIS 1dfdc: MISC BASE D57B8D5C7A4C lea r19, ptr [r26+r31*2+0x4c] +XDIS 1dfe2: MISC BASE D57B8D5C7B4D lea r19, ptr [r27+r31*2+0x4d] +XDIS 1dfe8: MISC BASE D57B8D5C7C4E lea r19, ptr [r28+r31*2+0x4e] +XDIS 1dfee: MISC BASE D57B8D5C7D4F lea r19, ptr [r29+r31*2+0x4f] +XDIS 1dff4: MISC BASE D57B8D5C7E50 lea r19, ptr [r30+r31*2+0x50] +XDIS 1dffa: MISC BASE D57B8D5C7F51 lea r19, ptr [r31+r31*2+0x51] +XDIS 1e000: MISC BASE D5488D644014 lea r20, ptr [rax+rax*2+0x14] +XDIS 1e006: MISC BASE D5488D644115 lea r20, ptr [rcx+rax*2+0x15] +XDIS 1e00c: MISC BASE D5488D644216 lea r20, ptr [rdx+rax*2+0x16] +XDIS 1e012: MISC BASE D5488D644317 lea r20, ptr [rbx+rax*2+0x17] +XDIS 1e018: MISC BASE D5488D644418 lea r20, ptr [rsp+rax*2+0x18] +XDIS 1e01e: MISC BASE D5488D644519 lea r20, ptr [rbp+rax*2+0x19] +XDIS 1e024: MISC BASE D5488D64461A lea r20, ptr [rsi+rax*2+0x1a] +XDIS 1e02a: MISC BASE D5488D64471B lea r20, ptr [rdi+rax*2+0x1b] +XDIS 1e030: MISC BASE D5498D64401C lea r20, ptr [r8+rax*2+0x1c] +XDIS 1e036: MISC BASE D5498D64411D lea r20, ptr [r9+rax*2+0x1d] +XDIS 1e03c: MISC BASE D5498D64421E lea r20, ptr [r10+rax*2+0x1e] +XDIS 1e042: MISC BASE D5498D64431F lea r20, ptr [r11+rax*2+0x1f] +XDIS 1e048: MISC BASE D5498D644420 lea r20, ptr [r12+rax*2+0x20] +XDIS 1e04e: MISC BASE D5498D644521 lea r20, ptr [r13+rax*2+0x21] +XDIS 1e054: MISC BASE D5498D644622 lea r20, ptr [r14+rax*2+0x22] +XDIS 1e05a: MISC BASE D5498D644723 lea r20, ptr [r15+rax*2+0x23] +XDIS 1e060: MISC BASE D5588D644024 lea r20, ptr [r16+rax*2+0x24] +XDIS 1e066: MISC BASE D5588D644125 lea r20, ptr [r17+rax*2+0x25] +XDIS 1e06c: MISC BASE D5588D644226 lea r20, ptr [r18+rax*2+0x26] +XDIS 1e072: MISC BASE D5588D644327 lea r20, ptr [r19+rax*2+0x27] +XDIS 1e078: MISC BASE D5588D644428 lea r20, ptr [r20+rax*2+0x28] +XDIS 1e07e: MISC BASE D5588D644529 lea r20, ptr [r21+rax*2+0x29] +XDIS 1e084: MISC BASE D5588D64462A lea r20, ptr [r22+rax*2+0x2a] +XDIS 1e08a: MISC BASE D5588D64472B lea r20, ptr [r23+rax*2+0x2b] +XDIS 1e090: MISC BASE D5598D64402C lea r20, ptr [r24+rax*2+0x2c] +XDIS 1e096: MISC BASE D5598D64412D lea r20, ptr [r25+rax*2+0x2d] +XDIS 1e09c: MISC BASE D5598D64422E lea r20, ptr [r26+rax*2+0x2e] +XDIS 1e0a2: MISC BASE D5598D64432F lea r20, ptr [r27+rax*2+0x2f] +XDIS 1e0a8: MISC BASE D5598D644430 lea r20, ptr [r28+rax*2+0x30] +XDIS 1e0ae: MISC BASE D5598D644531 lea r20, ptr [r29+rax*2+0x31] +XDIS 1e0b4: MISC BASE D5598D644632 lea r20, ptr [r30+rax*2+0x32] +XDIS 1e0ba: MISC BASE D5598D644733 lea r20, ptr [r31+rax*2+0x33] +XDIS 1e0c0: MISC BASE D5488D644815 lea r20, ptr [rax+rcx*2+0x15] +XDIS 1e0c6: MISC BASE D5488D644916 lea r20, ptr [rcx+rcx*2+0x16] +XDIS 1e0cc: MISC BASE D5488D644A17 lea r20, ptr [rdx+rcx*2+0x17] +XDIS 1e0d2: MISC BASE D5488D644B18 lea r20, ptr [rbx+rcx*2+0x18] +XDIS 1e0d8: MISC BASE D5488D644C19 lea r20, ptr [rsp+rcx*2+0x19] +XDIS 1e0de: MISC BASE D5488D644D1A lea r20, ptr [rbp+rcx*2+0x1a] +XDIS 1e0e4: MISC BASE D5488D644E1B lea r20, ptr [rsi+rcx*2+0x1b] +XDIS 1e0ea: MISC BASE D5488D644F1C lea r20, ptr [rdi+rcx*2+0x1c] +XDIS 1e0f0: MISC BASE D5498D64481D lea r20, ptr [r8+rcx*2+0x1d] +XDIS 1e0f6: MISC BASE D5498D64491E lea r20, ptr [r9+rcx*2+0x1e] +XDIS 1e0fc: MISC BASE D5498D644A1F lea r20, ptr [r10+rcx*2+0x1f] +XDIS 1e102: MISC BASE D5498D644B20 lea r20, ptr [r11+rcx*2+0x20] +XDIS 1e108: MISC BASE D5498D644C21 lea r20, ptr [r12+rcx*2+0x21] +XDIS 1e10e: MISC BASE D5498D644D22 lea r20, ptr [r13+rcx*2+0x22] +XDIS 1e114: MISC BASE D5498D644E23 lea r20, ptr [r14+rcx*2+0x23] +XDIS 1e11a: MISC BASE D5498D644F24 lea r20, ptr [r15+rcx*2+0x24] +XDIS 1e120: MISC BASE D5588D644825 lea r20, ptr [r16+rcx*2+0x25] +XDIS 1e126: MISC BASE D5588D644926 lea r20, ptr [r17+rcx*2+0x26] +XDIS 1e12c: MISC BASE D5588D644A27 lea r20, ptr [r18+rcx*2+0x27] +XDIS 1e132: MISC BASE D5588D644B28 lea r20, ptr [r19+rcx*2+0x28] +XDIS 1e138: MISC BASE D5588D644C29 lea r20, ptr [r20+rcx*2+0x29] +XDIS 1e13e: MISC BASE D5588D644D2A lea r20, ptr [r21+rcx*2+0x2a] +XDIS 1e144: MISC BASE D5588D644E2B lea r20, ptr [r22+rcx*2+0x2b] +XDIS 1e14a: MISC BASE D5588D644F2C lea r20, ptr [r23+rcx*2+0x2c] +XDIS 1e150: MISC BASE D5598D64482D lea r20, ptr [r24+rcx*2+0x2d] +XDIS 1e156: MISC BASE D5598D64492E lea r20, ptr [r25+rcx*2+0x2e] +XDIS 1e15c: MISC BASE D5598D644A2F lea r20, ptr [r26+rcx*2+0x2f] +XDIS 1e162: MISC BASE D5598D644B30 lea r20, ptr [r27+rcx*2+0x30] +XDIS 1e168: MISC BASE D5598D644C31 lea r20, ptr [r28+rcx*2+0x31] +XDIS 1e16e: MISC BASE D5598D644D32 lea r20, ptr [r29+rcx*2+0x32] +XDIS 1e174: MISC BASE D5598D644E33 lea r20, ptr [r30+rcx*2+0x33] +XDIS 1e17a: MISC BASE D5598D644F34 lea r20, ptr [r31+rcx*2+0x34] +XDIS 1e180: MISC BASE D5488D645016 lea r20, ptr [rax+rdx*2+0x16] +XDIS 1e186: MISC BASE D5488D645117 lea r20, ptr [rcx+rdx*2+0x17] +XDIS 1e18c: MISC BASE D5488D645218 lea r20, ptr [rdx+rdx*2+0x18] +XDIS 1e192: MISC BASE D5488D645319 lea r20, ptr [rbx+rdx*2+0x19] +XDIS 1e198: MISC BASE D5488D64541A lea r20, ptr [rsp+rdx*2+0x1a] +XDIS 1e19e: MISC BASE D5488D64551B lea r20, ptr [rbp+rdx*2+0x1b] +XDIS 1e1a4: MISC BASE D5488D64561C lea r20, ptr [rsi+rdx*2+0x1c] +XDIS 1e1aa: MISC BASE D5488D64571D lea r20, ptr [rdi+rdx*2+0x1d] +XDIS 1e1b0: MISC BASE D5498D64501E lea r20, ptr [r8+rdx*2+0x1e] +XDIS 1e1b6: MISC BASE D5498D64511F lea r20, ptr [r9+rdx*2+0x1f] +XDIS 1e1bc: MISC BASE D5498D645220 lea r20, ptr [r10+rdx*2+0x20] +XDIS 1e1c2: MISC BASE D5498D645321 lea r20, ptr [r11+rdx*2+0x21] +XDIS 1e1c8: MISC BASE D5498D645422 lea r20, ptr [r12+rdx*2+0x22] +XDIS 1e1ce: MISC BASE D5498D645523 lea r20, ptr [r13+rdx*2+0x23] +XDIS 1e1d4: MISC BASE D5498D645624 lea r20, ptr [r14+rdx*2+0x24] +XDIS 1e1da: MISC BASE D5498D645725 lea r20, ptr [r15+rdx*2+0x25] +XDIS 1e1e0: MISC BASE D5588D645026 lea r20, ptr [r16+rdx*2+0x26] +XDIS 1e1e6: MISC BASE D5588D645127 lea r20, ptr [r17+rdx*2+0x27] +XDIS 1e1ec: MISC BASE D5588D645228 lea r20, ptr [r18+rdx*2+0x28] +XDIS 1e1f2: MISC BASE D5588D645329 lea r20, ptr [r19+rdx*2+0x29] +XDIS 1e1f8: MISC BASE D5588D64542A lea r20, ptr [r20+rdx*2+0x2a] +XDIS 1e1fe: MISC BASE D5588D64552B lea r20, ptr [r21+rdx*2+0x2b] +XDIS 1e204: MISC BASE D5588D64562C lea r20, ptr [r22+rdx*2+0x2c] +XDIS 1e20a: MISC BASE D5588D64572D lea r20, ptr [r23+rdx*2+0x2d] +XDIS 1e210: MISC BASE D5598D64502E lea r20, ptr [r24+rdx*2+0x2e] +XDIS 1e216: MISC BASE D5598D64512F lea r20, ptr [r25+rdx*2+0x2f] +XDIS 1e21c: MISC BASE D5598D645230 lea r20, ptr [r26+rdx*2+0x30] +XDIS 1e222: MISC BASE D5598D645331 lea r20, ptr [r27+rdx*2+0x31] +XDIS 1e228: MISC BASE D5598D645432 lea r20, ptr [r28+rdx*2+0x32] +XDIS 1e22e: MISC BASE D5598D645533 lea r20, ptr [r29+rdx*2+0x33] +XDIS 1e234: MISC BASE D5598D645634 lea r20, ptr [r30+rdx*2+0x34] +XDIS 1e23a: MISC BASE D5598D645735 lea r20, ptr [r31+rdx*2+0x35] +XDIS 1e240: MISC BASE D5488D645817 lea r20, ptr [rax+rbx*2+0x17] +XDIS 1e246: MISC BASE D5488D645918 lea r20, ptr [rcx+rbx*2+0x18] +XDIS 1e24c: MISC BASE D5488D645A19 lea r20, ptr [rdx+rbx*2+0x19] +XDIS 1e252: MISC BASE D5488D645B1A lea r20, ptr [rbx+rbx*2+0x1a] +XDIS 1e258: MISC BASE D5488D645C1B lea r20, ptr [rsp+rbx*2+0x1b] +XDIS 1e25e: MISC BASE D5488D645D1C lea r20, ptr [rbp+rbx*2+0x1c] +XDIS 1e264: MISC BASE D5488D645E1D lea r20, ptr [rsi+rbx*2+0x1d] +XDIS 1e26a: MISC BASE D5488D645F1E lea r20, ptr [rdi+rbx*2+0x1e] +XDIS 1e270: MISC BASE D5498D64581F lea r20, ptr [r8+rbx*2+0x1f] +XDIS 1e276: MISC BASE D5498D645920 lea r20, ptr [r9+rbx*2+0x20] +XDIS 1e27c: MISC BASE D5498D645A21 lea r20, ptr [r10+rbx*2+0x21] +XDIS 1e282: MISC BASE D5498D645B22 lea r20, ptr [r11+rbx*2+0x22] +XDIS 1e288: MISC BASE D5498D645C23 lea r20, ptr [r12+rbx*2+0x23] +XDIS 1e28e: MISC BASE D5498D645D24 lea r20, ptr [r13+rbx*2+0x24] +XDIS 1e294: MISC BASE D5498D645E25 lea r20, ptr [r14+rbx*2+0x25] +XDIS 1e29a: MISC BASE D5498D645F26 lea r20, ptr [r15+rbx*2+0x26] +XDIS 1e2a0: MISC BASE D5588D645827 lea r20, ptr [r16+rbx*2+0x27] +XDIS 1e2a6: MISC BASE D5588D645928 lea r20, ptr [r17+rbx*2+0x28] +XDIS 1e2ac: MISC BASE D5588D645A29 lea r20, ptr [r18+rbx*2+0x29] +XDIS 1e2b2: MISC BASE D5588D645B2A lea r20, ptr [r19+rbx*2+0x2a] +XDIS 1e2b8: MISC BASE D5588D645C2B lea r20, ptr [r20+rbx*2+0x2b] +XDIS 1e2be: MISC BASE D5588D645D2C lea r20, ptr [r21+rbx*2+0x2c] +XDIS 1e2c4: MISC BASE D5588D645E2D lea r20, ptr [r22+rbx*2+0x2d] +XDIS 1e2ca: MISC BASE D5588D645F2E lea r20, ptr [r23+rbx*2+0x2e] +XDIS 1e2d0: MISC BASE D5598D64582F lea r20, ptr [r24+rbx*2+0x2f] +XDIS 1e2d6: MISC BASE D5598D645930 lea r20, ptr [r25+rbx*2+0x30] +XDIS 1e2dc: MISC BASE D5598D645A31 lea r20, ptr [r26+rbx*2+0x31] +XDIS 1e2e2: MISC BASE D5598D645B32 lea r20, ptr [r27+rbx*2+0x32] +XDIS 1e2e8: MISC BASE D5598D645C33 lea r20, ptr [r28+rbx*2+0x33] +XDIS 1e2ee: MISC BASE D5598D645D34 lea r20, ptr [r29+rbx*2+0x34] +XDIS 1e2f4: MISC BASE D5598D645E35 lea r20, ptr [r30+rbx*2+0x35] +XDIS 1e2fa: MISC BASE D5598D645F36 lea r20, ptr [r31+rbx*2+0x36] +XDIS 1e300: MISC BASE D5488D646018 lea r20, ptr [rax+0x18] +XDIS 1e306: MISC BASE D5488D646119 lea r20, ptr [rcx+0x19] +XDIS 1e30c: MISC BASE D5488D64621A lea r20, ptr [rdx+0x1a] +XDIS 1e312: MISC BASE D5488D64631B lea r20, ptr [rbx+0x1b] +XDIS 1e318: MISC BASE D5488D64641C lea r20, ptr [rsp+0x1c] +XDIS 1e31e: MISC BASE D5488D64651D lea r20, ptr [rbp+0x1d] +XDIS 1e324: MISC BASE D5488D64661E lea r20, ptr [rsi+0x1e] +XDIS 1e32a: MISC BASE D5488D64671F lea r20, ptr [rdi+0x1f] +XDIS 1e330: MISC BASE D5498D646020 lea r20, ptr [r8+0x20] +XDIS 1e336: MISC BASE D5498D646121 lea r20, ptr [r9+0x21] +XDIS 1e33c: MISC BASE D5498D646222 lea r20, ptr [r10+0x22] +XDIS 1e342: MISC BASE D5498D646323 lea r20, ptr [r11+0x23] +XDIS 1e348: MISC BASE D5498D646424 lea r20, ptr [r12+0x24] +XDIS 1e34e: MISC BASE D5498D646525 lea r20, ptr [r13+0x25] +XDIS 1e354: MISC BASE D5498D646626 lea r20, ptr [r14+0x26] +XDIS 1e35a: MISC BASE D5498D646727 lea r20, ptr [r15+0x27] +XDIS 1e360: MISC BASE D5588D646028 lea r20, ptr [r16+0x28] +XDIS 1e366: MISC BASE D5588D646129 lea r20, ptr [r17+0x29] +XDIS 1e36c: MISC BASE D5588D64622A lea r20, ptr [r18+0x2a] +XDIS 1e372: MISC BASE D5588D64632B lea r20, ptr [r19+0x2b] +XDIS 1e378: MISC BASE D5588D64642C lea r20, ptr [r20+0x2c] +XDIS 1e37e: MISC BASE D5588D64652D lea r20, ptr [r21+0x2d] +XDIS 1e384: MISC BASE D5588D64662E lea r20, ptr [r22+0x2e] +XDIS 1e38a: MISC BASE D5588D64672F lea r20, ptr [r23+0x2f] +XDIS 1e390: MISC BASE D5598D646030 lea r20, ptr [r24+0x30] +XDIS 1e396: MISC BASE D5598D646131 lea r20, ptr [r25+0x31] +XDIS 1e39c: MISC BASE D5598D646232 lea r20, ptr [r26+0x32] +XDIS 1e3a2: MISC BASE D5598D646333 lea r20, ptr [r27+0x33] +XDIS 1e3a8: MISC BASE D5598D646434 lea r20, ptr [r28+0x34] +XDIS 1e3ae: MISC BASE D5598D646535 lea r20, ptr [r29+0x35] +XDIS 1e3b4: MISC BASE D5598D646636 lea r20, ptr [r30+0x36] +XDIS 1e3ba: MISC BASE D5598D646737 lea r20, ptr [r31+0x37] +XDIS 1e3c0: MISC BASE D5488D646819 lea r20, ptr [rax+rbp*2+0x19] +XDIS 1e3c6: MISC BASE D5488D64691A lea r20, ptr [rcx+rbp*2+0x1a] +XDIS 1e3cc: MISC BASE D5488D646A1B lea r20, ptr [rdx+rbp*2+0x1b] +XDIS 1e3d2: MISC BASE D5488D646B1C lea r20, ptr [rbx+rbp*2+0x1c] +XDIS 1e3d8: MISC BASE D5488D646C1D lea r20, ptr [rsp+rbp*2+0x1d] +XDIS 1e3de: MISC BASE D5488D646D1E lea r20, ptr [rbp+rbp*2+0x1e] +XDIS 1e3e4: MISC BASE D5488D646E1F lea r20, ptr [rsi+rbp*2+0x1f] +XDIS 1e3ea: MISC BASE D5488D646F20 lea r20, ptr [rdi+rbp*2+0x20] +XDIS 1e3f0: MISC BASE D5498D646821 lea r20, ptr [r8+rbp*2+0x21] +XDIS 1e3f6: MISC BASE D5498D646922 lea r20, ptr [r9+rbp*2+0x22] +XDIS 1e3fc: MISC BASE D5498D646A23 lea r20, ptr [r10+rbp*2+0x23] +XDIS 1e402: MISC BASE D5498D646B24 lea r20, ptr [r11+rbp*2+0x24] +XDIS 1e408: MISC BASE D5498D646C25 lea r20, ptr [r12+rbp*2+0x25] +XDIS 1e40e: MISC BASE D5498D646D26 lea r20, ptr [r13+rbp*2+0x26] +XDIS 1e414: MISC BASE D5498D646E27 lea r20, ptr [r14+rbp*2+0x27] +XDIS 1e41a: MISC BASE D5498D646F28 lea r20, ptr [r15+rbp*2+0x28] +XDIS 1e420: MISC BASE D5588D646829 lea r20, ptr [r16+rbp*2+0x29] +XDIS 1e426: MISC BASE D5588D64692A lea r20, ptr [r17+rbp*2+0x2a] +XDIS 1e42c: MISC BASE D5588D646A2B lea r20, ptr [r18+rbp*2+0x2b] +XDIS 1e432: MISC BASE D5588D646B2C lea r20, ptr [r19+rbp*2+0x2c] +XDIS 1e438: MISC BASE D5588D646C2D lea r20, ptr [r20+rbp*2+0x2d] +XDIS 1e43e: MISC BASE D5588D646D2E lea r20, ptr [r21+rbp*2+0x2e] +XDIS 1e444: MISC BASE D5588D646E2F lea r20, ptr [r22+rbp*2+0x2f] +XDIS 1e44a: MISC BASE D5588D646F30 lea r20, ptr [r23+rbp*2+0x30] +XDIS 1e450: MISC BASE D5598D646831 lea r20, ptr [r24+rbp*2+0x31] +XDIS 1e456: MISC BASE D5598D646932 lea r20, ptr [r25+rbp*2+0x32] +XDIS 1e45c: MISC BASE D5598D646A33 lea r20, ptr [r26+rbp*2+0x33] +XDIS 1e462: MISC BASE D5598D646B34 lea r20, ptr [r27+rbp*2+0x34] +XDIS 1e468: MISC BASE D5598D646C35 lea r20, ptr [r28+rbp*2+0x35] +XDIS 1e46e: MISC BASE D5598D646D36 lea r20, ptr [r29+rbp*2+0x36] +XDIS 1e474: MISC BASE D5598D646E37 lea r20, ptr [r30+rbp*2+0x37] +XDIS 1e47a: MISC BASE D5598D646F38 lea r20, ptr [r31+rbp*2+0x38] +XDIS 1e480: MISC BASE D5488D64701A lea r20, ptr [rax+rsi*2+0x1a] +XDIS 1e486: MISC BASE D5488D64711B lea r20, ptr [rcx+rsi*2+0x1b] +XDIS 1e48c: MISC BASE D5488D64721C lea r20, ptr [rdx+rsi*2+0x1c] +XDIS 1e492: MISC BASE D5488D64731D lea r20, ptr [rbx+rsi*2+0x1d] +XDIS 1e498: MISC BASE D5488D64741E lea r20, ptr [rsp+rsi*2+0x1e] +XDIS 1e49e: MISC BASE D5488D64751F lea r20, ptr [rbp+rsi*2+0x1f] +XDIS 1e4a4: MISC BASE D5488D647620 lea r20, ptr [rsi+rsi*2+0x20] +XDIS 1e4aa: MISC BASE D5488D647721 lea r20, ptr [rdi+rsi*2+0x21] +XDIS 1e4b0: MISC BASE D5498D647022 lea r20, ptr [r8+rsi*2+0x22] +XDIS 1e4b6: MISC BASE D5498D647123 lea r20, ptr [r9+rsi*2+0x23] +XDIS 1e4bc: MISC BASE D5498D647224 lea r20, ptr [r10+rsi*2+0x24] +XDIS 1e4c2: MISC BASE D5498D647325 lea r20, ptr [r11+rsi*2+0x25] +XDIS 1e4c8: MISC BASE D5498D647426 lea r20, ptr [r12+rsi*2+0x26] +XDIS 1e4ce: MISC BASE D5498D647527 lea r20, ptr [r13+rsi*2+0x27] +XDIS 1e4d4: MISC BASE D5498D647628 lea r20, ptr [r14+rsi*2+0x28] +XDIS 1e4da: MISC BASE D5498D647729 lea r20, ptr [r15+rsi*2+0x29] +XDIS 1e4e0: MISC BASE D5588D64702A lea r20, ptr [r16+rsi*2+0x2a] +XDIS 1e4e6: MISC BASE D5588D64712B lea r20, ptr [r17+rsi*2+0x2b] +XDIS 1e4ec: MISC BASE D5588D64722C lea r20, ptr [r18+rsi*2+0x2c] +XDIS 1e4f2: MISC BASE D5588D64732D lea r20, ptr [r19+rsi*2+0x2d] +XDIS 1e4f8: MISC BASE D5588D64742E lea r20, ptr [r20+rsi*2+0x2e] +XDIS 1e4fe: MISC BASE D5588D64752F lea r20, ptr [r21+rsi*2+0x2f] +XDIS 1e504: MISC BASE D5588D647630 lea r20, ptr [r22+rsi*2+0x30] +XDIS 1e50a: MISC BASE D5588D647731 lea r20, ptr [r23+rsi*2+0x31] +XDIS 1e510: MISC BASE D5598D647032 lea r20, ptr [r24+rsi*2+0x32] +XDIS 1e516: MISC BASE D5598D647133 lea r20, ptr [r25+rsi*2+0x33] +XDIS 1e51c: MISC BASE D5598D647234 lea r20, ptr [r26+rsi*2+0x34] +XDIS 1e522: MISC BASE D5598D647335 lea r20, ptr [r27+rsi*2+0x35] +XDIS 1e528: MISC BASE D5598D647436 lea r20, ptr [r28+rsi*2+0x36] +XDIS 1e52e: MISC BASE D5598D647537 lea r20, ptr [r29+rsi*2+0x37] +XDIS 1e534: MISC BASE D5598D647638 lea r20, ptr [r30+rsi*2+0x38] +XDIS 1e53a: MISC BASE D5598D647739 lea r20, ptr [r31+rsi*2+0x39] +XDIS 1e540: MISC BASE D5488D64781B lea r20, ptr [rax+rdi*2+0x1b] +XDIS 1e546: MISC BASE D5488D64791C lea r20, ptr [rcx+rdi*2+0x1c] +XDIS 1e54c: MISC BASE D5488D647A1D lea r20, ptr [rdx+rdi*2+0x1d] +XDIS 1e552: MISC BASE D5488D647B1E lea r20, ptr [rbx+rdi*2+0x1e] +XDIS 1e558: MISC BASE D5488D647C1F lea r20, ptr [rsp+rdi*2+0x1f] +XDIS 1e55e: MISC BASE D5488D647D20 lea r20, ptr [rbp+rdi*2+0x20] +XDIS 1e564: MISC BASE D5488D647E21 lea r20, ptr [rsi+rdi*2+0x21] +XDIS 1e56a: MISC BASE D5488D647F22 lea r20, ptr [rdi+rdi*2+0x22] +XDIS 1e570: MISC BASE D5498D647823 lea r20, ptr [r8+rdi*2+0x23] +XDIS 1e576: MISC BASE D5498D647924 lea r20, ptr [r9+rdi*2+0x24] +XDIS 1e57c: MISC BASE D5498D647A25 lea r20, ptr [r10+rdi*2+0x25] +XDIS 1e582: MISC BASE D5498D647B26 lea r20, ptr [r11+rdi*2+0x26] +XDIS 1e588: MISC BASE D5498D647C27 lea r20, ptr [r12+rdi*2+0x27] +XDIS 1e58e: MISC BASE D5498D647D28 lea r20, ptr [r13+rdi*2+0x28] +XDIS 1e594: MISC BASE D5498D647E29 lea r20, ptr [r14+rdi*2+0x29] +XDIS 1e59a: MISC BASE D5498D647F2A lea r20, ptr [r15+rdi*2+0x2a] +XDIS 1e5a0: MISC BASE D5588D64782B lea r20, ptr [r16+rdi*2+0x2b] +XDIS 1e5a6: MISC BASE D5588D64792C lea r20, ptr [r17+rdi*2+0x2c] +XDIS 1e5ac: MISC BASE D5588D647A2D lea r20, ptr [r18+rdi*2+0x2d] +XDIS 1e5b2: MISC BASE D5588D647B2E lea r20, ptr [r19+rdi*2+0x2e] +XDIS 1e5b8: MISC BASE D5588D647C2F lea r20, ptr [r20+rdi*2+0x2f] +XDIS 1e5be: MISC BASE D5588D647D30 lea r20, ptr [r21+rdi*2+0x30] +XDIS 1e5c4: MISC BASE D5588D647E31 lea r20, ptr [r22+rdi*2+0x31] +XDIS 1e5ca: MISC BASE D5588D647F32 lea r20, ptr [r23+rdi*2+0x32] +XDIS 1e5d0: MISC BASE D5598D647833 lea r20, ptr [r24+rdi*2+0x33] +XDIS 1e5d6: MISC BASE D5598D647934 lea r20, ptr [r25+rdi*2+0x34] +XDIS 1e5dc: MISC BASE D5598D647A35 lea r20, ptr [r26+rdi*2+0x35] +XDIS 1e5e2: MISC BASE D5598D647B36 lea r20, ptr [r27+rdi*2+0x36] +XDIS 1e5e8: MISC BASE D5598D647C37 lea r20, ptr [r28+rdi*2+0x37] +XDIS 1e5ee: MISC BASE D5598D647D38 lea r20, ptr [r29+rdi*2+0x38] +XDIS 1e5f4: MISC BASE D5598D647E39 lea r20, ptr [r30+rdi*2+0x39] +XDIS 1e5fa: MISC BASE D5598D647F3A lea r20, ptr [r31+rdi*2+0x3a] +XDIS 1e600: MISC BASE D54A8D64401C lea r20, ptr [rax+r8*2+0x1c] +XDIS 1e606: MISC BASE D54A8D64411D lea r20, ptr [rcx+r8*2+0x1d] +XDIS 1e60c: MISC BASE D54A8D64421E lea r20, ptr [rdx+r8*2+0x1e] +XDIS 1e612: MISC BASE D54A8D64431F lea r20, ptr [rbx+r8*2+0x1f] +XDIS 1e618: MISC BASE D54A8D644420 lea r20, ptr [rsp+r8*2+0x20] +XDIS 1e61e: MISC BASE D54A8D644521 lea r20, ptr [rbp+r8*2+0x21] +XDIS 1e624: MISC BASE D54A8D644622 lea r20, ptr [rsi+r8*2+0x22] +XDIS 1e62a: MISC BASE D54A8D644723 lea r20, ptr [rdi+r8*2+0x23] +XDIS 1e630: MISC BASE D54B8D644024 lea r20, ptr [r8+r8*2+0x24] +XDIS 1e636: MISC BASE D54B8D644125 lea r20, ptr [r9+r8*2+0x25] +XDIS 1e63c: MISC BASE D54B8D644226 lea r20, ptr [r10+r8*2+0x26] +XDIS 1e642: MISC BASE D54B8D644327 lea r20, ptr [r11+r8*2+0x27] +XDIS 1e648: MISC BASE D54B8D644428 lea r20, ptr [r12+r8*2+0x28] +XDIS 1e64e: MISC BASE D54B8D644529 lea r20, ptr [r13+r8*2+0x29] +XDIS 1e654: MISC BASE D54B8D64462A lea r20, ptr [r14+r8*2+0x2a] +XDIS 1e65a: MISC BASE D54B8D64472B lea r20, ptr [r15+r8*2+0x2b] +XDIS 1e660: MISC BASE D55A8D64402C lea r20, ptr [r16+r8*2+0x2c] +XDIS 1e666: MISC BASE D55A8D64412D lea r20, ptr [r17+r8*2+0x2d] +XDIS 1e66c: MISC BASE D55A8D64422E lea r20, ptr [r18+r8*2+0x2e] +XDIS 1e672: MISC BASE D55A8D64432F lea r20, ptr [r19+r8*2+0x2f] +XDIS 1e678: MISC BASE D55A8D644430 lea r20, ptr [r20+r8*2+0x30] +XDIS 1e67e: MISC BASE D55A8D644531 lea r20, ptr [r21+r8*2+0x31] +XDIS 1e684: MISC BASE D55A8D644632 lea r20, ptr [r22+r8*2+0x32] +XDIS 1e68a: MISC BASE D55A8D644733 lea r20, ptr [r23+r8*2+0x33] +XDIS 1e690: MISC BASE D55B8D644034 lea r20, ptr [r24+r8*2+0x34] +XDIS 1e696: MISC BASE D55B8D644135 lea r20, ptr [r25+r8*2+0x35] +XDIS 1e69c: MISC BASE D55B8D644236 lea r20, ptr [r26+r8*2+0x36] +XDIS 1e6a2: MISC BASE D55B8D644337 lea r20, ptr [r27+r8*2+0x37] +XDIS 1e6a8: MISC BASE D55B8D644438 lea r20, ptr [r28+r8*2+0x38] +XDIS 1e6ae: MISC BASE D55B8D644539 lea r20, ptr [r29+r8*2+0x39] +XDIS 1e6b4: MISC BASE D55B8D64463A lea r20, ptr [r30+r8*2+0x3a] +XDIS 1e6ba: MISC BASE D55B8D64473B lea r20, ptr [r31+r8*2+0x3b] +XDIS 1e6c0: MISC BASE D54A8D64481D lea r20, ptr [rax+r9*2+0x1d] +XDIS 1e6c6: MISC BASE D54A8D64491E lea r20, ptr [rcx+r9*2+0x1e] +XDIS 1e6cc: MISC BASE D54A8D644A1F lea r20, ptr [rdx+r9*2+0x1f] +XDIS 1e6d2: MISC BASE D54A8D644B20 lea r20, ptr [rbx+r9*2+0x20] +XDIS 1e6d8: MISC BASE D54A8D644C21 lea r20, ptr [rsp+r9*2+0x21] +XDIS 1e6de: MISC BASE D54A8D644D22 lea r20, ptr [rbp+r9*2+0x22] +XDIS 1e6e4: MISC BASE D54A8D644E23 lea r20, ptr [rsi+r9*2+0x23] +XDIS 1e6ea: MISC BASE D54A8D644F24 lea r20, ptr [rdi+r9*2+0x24] +XDIS 1e6f0: MISC BASE D54B8D644825 lea r20, ptr [r8+r9*2+0x25] +XDIS 1e6f6: MISC BASE D54B8D644926 lea r20, ptr [r9+r9*2+0x26] +XDIS 1e6fc: MISC BASE D54B8D644A27 lea r20, ptr [r10+r9*2+0x27] +XDIS 1e702: MISC BASE D54B8D644B28 lea r20, ptr [r11+r9*2+0x28] +XDIS 1e708: MISC BASE D54B8D644C29 lea r20, ptr [r12+r9*2+0x29] +XDIS 1e70e: MISC BASE D54B8D644D2A lea r20, ptr [r13+r9*2+0x2a] +XDIS 1e714: MISC BASE D54B8D644E2B lea r20, ptr [r14+r9*2+0x2b] +XDIS 1e71a: MISC BASE D54B8D644F2C lea r20, ptr [r15+r9*2+0x2c] +XDIS 1e720: MISC BASE D55A8D64482D lea r20, ptr [r16+r9*2+0x2d] +XDIS 1e726: MISC BASE D55A8D64492E lea r20, ptr [r17+r9*2+0x2e] +XDIS 1e72c: MISC BASE D55A8D644A2F lea r20, ptr [r18+r9*2+0x2f] +XDIS 1e732: MISC BASE D55A8D644B30 lea r20, ptr [r19+r9*2+0x30] +XDIS 1e738: MISC BASE D55A8D644C31 lea r20, ptr [r20+r9*2+0x31] +XDIS 1e73e: MISC BASE D55A8D644D32 lea r20, ptr [r21+r9*2+0x32] +XDIS 1e744: MISC BASE D55A8D644E33 lea r20, ptr [r22+r9*2+0x33] +XDIS 1e74a: MISC BASE D55A8D644F34 lea r20, ptr [r23+r9*2+0x34] +XDIS 1e750: MISC BASE D55B8D644835 lea r20, ptr [r24+r9*2+0x35] +XDIS 1e756: MISC BASE D55B8D644936 lea r20, ptr [r25+r9*2+0x36] +XDIS 1e75c: MISC BASE D55B8D644A37 lea r20, ptr [r26+r9*2+0x37] +XDIS 1e762: MISC BASE D55B8D644B38 lea r20, ptr [r27+r9*2+0x38] +XDIS 1e768: MISC BASE D55B8D644C39 lea r20, ptr [r28+r9*2+0x39] +XDIS 1e76e: MISC BASE D55B8D644D3A lea r20, ptr [r29+r9*2+0x3a] +XDIS 1e774: MISC BASE D55B8D644E3B lea r20, ptr [r30+r9*2+0x3b] +XDIS 1e77a: MISC BASE D55B8D644F3C lea r20, ptr [r31+r9*2+0x3c] +XDIS 1e780: MISC BASE D54A8D64501E lea r20, ptr [rax+r10*2+0x1e] +XDIS 1e786: MISC BASE D54A8D64511F lea r20, ptr [rcx+r10*2+0x1f] +XDIS 1e78c: MISC BASE D54A8D645220 lea r20, ptr [rdx+r10*2+0x20] +XDIS 1e792: MISC BASE D54A8D645321 lea r20, ptr [rbx+r10*2+0x21] +XDIS 1e798: MISC BASE D54A8D645422 lea r20, ptr [rsp+r10*2+0x22] +XDIS 1e79e: MISC BASE D54A8D645523 lea r20, ptr [rbp+r10*2+0x23] +XDIS 1e7a4: MISC BASE D54A8D645624 lea r20, ptr [rsi+r10*2+0x24] +XDIS 1e7aa: MISC BASE D54A8D645725 lea r20, ptr [rdi+r10*2+0x25] +XDIS 1e7b0: MISC BASE D54B8D645026 lea r20, ptr [r8+r10*2+0x26] +XDIS 1e7b6: MISC BASE D54B8D645127 lea r20, ptr [r9+r10*2+0x27] +XDIS 1e7bc: MISC BASE D54B8D645228 lea r20, ptr [r10+r10*2+0x28] +XDIS 1e7c2: MISC BASE D54B8D645329 lea r20, ptr [r11+r10*2+0x29] +XDIS 1e7c8: MISC BASE D54B8D64542A lea r20, ptr [r12+r10*2+0x2a] +XDIS 1e7ce: MISC BASE D54B8D64552B lea r20, ptr [r13+r10*2+0x2b] +XDIS 1e7d4: MISC BASE D54B8D64562C lea r20, ptr [r14+r10*2+0x2c] +XDIS 1e7da: MISC BASE D54B8D64572D lea r20, ptr [r15+r10*2+0x2d] +XDIS 1e7e0: MISC BASE D55A8D64502E lea r20, ptr [r16+r10*2+0x2e] +XDIS 1e7e6: MISC BASE D55A8D64512F lea r20, ptr [r17+r10*2+0x2f] +XDIS 1e7ec: MISC BASE D55A8D645230 lea r20, ptr [r18+r10*2+0x30] +XDIS 1e7f2: MISC BASE D55A8D645331 lea r20, ptr [r19+r10*2+0x31] +XDIS 1e7f8: MISC BASE D55A8D645432 lea r20, ptr [r20+r10*2+0x32] +XDIS 1e7fe: MISC BASE D55A8D645533 lea r20, ptr [r21+r10*2+0x33] +XDIS 1e804: MISC BASE D55A8D645634 lea r20, ptr [r22+r10*2+0x34] +XDIS 1e80a: MISC BASE D55A8D645735 lea r20, ptr [r23+r10*2+0x35] +XDIS 1e810: MISC BASE D55B8D645036 lea r20, ptr [r24+r10*2+0x36] +XDIS 1e816: MISC BASE D55B8D645137 lea r20, ptr [r25+r10*2+0x37] +XDIS 1e81c: MISC BASE D55B8D645238 lea r20, ptr [r26+r10*2+0x38] +XDIS 1e822: MISC BASE D55B8D645339 lea r20, ptr [r27+r10*2+0x39] +XDIS 1e828: MISC BASE D55B8D64543A lea r20, ptr [r28+r10*2+0x3a] +XDIS 1e82e: MISC BASE D55B8D64553B lea r20, ptr [r29+r10*2+0x3b] +XDIS 1e834: MISC BASE D55B8D64563C lea r20, ptr [r30+r10*2+0x3c] +XDIS 1e83a: MISC BASE D55B8D64573D lea r20, ptr [r31+r10*2+0x3d] +XDIS 1e840: MISC BASE D54A8D64581F lea r20, ptr [rax+r11*2+0x1f] +XDIS 1e846: MISC BASE D54A8D645920 lea r20, ptr [rcx+r11*2+0x20] +XDIS 1e84c: MISC BASE D54A8D645A21 lea r20, ptr [rdx+r11*2+0x21] +XDIS 1e852: MISC BASE D54A8D645B22 lea r20, ptr [rbx+r11*2+0x22] +XDIS 1e858: MISC BASE D54A8D645C23 lea r20, ptr [rsp+r11*2+0x23] +XDIS 1e85e: MISC BASE D54A8D645D24 lea r20, ptr [rbp+r11*2+0x24] +XDIS 1e864: MISC BASE D54A8D645E25 lea r20, ptr [rsi+r11*2+0x25] +XDIS 1e86a: MISC BASE D54A8D645F26 lea r20, ptr [rdi+r11*2+0x26] +XDIS 1e870: MISC BASE D54B8D645827 lea r20, ptr [r8+r11*2+0x27] +XDIS 1e876: MISC BASE D54B8D645928 lea r20, ptr [r9+r11*2+0x28] +XDIS 1e87c: MISC BASE D54B8D645A29 lea r20, ptr [r10+r11*2+0x29] +XDIS 1e882: MISC BASE D54B8D645B2A lea r20, ptr [r11+r11*2+0x2a] +XDIS 1e888: MISC BASE D54B8D645C2B lea r20, ptr [r12+r11*2+0x2b] +XDIS 1e88e: MISC BASE D54B8D645D2C lea r20, ptr [r13+r11*2+0x2c] +XDIS 1e894: MISC BASE D54B8D645E2D lea r20, ptr [r14+r11*2+0x2d] +XDIS 1e89a: MISC BASE D54B8D645F2E lea r20, ptr [r15+r11*2+0x2e] +XDIS 1e8a0: MISC BASE D55A8D64582F lea r20, ptr [r16+r11*2+0x2f] +XDIS 1e8a6: MISC BASE D55A8D645930 lea r20, ptr [r17+r11*2+0x30] +XDIS 1e8ac: MISC BASE D55A8D645A31 lea r20, ptr [r18+r11*2+0x31] +XDIS 1e8b2: MISC BASE D55A8D645B32 lea r20, ptr [r19+r11*2+0x32] +XDIS 1e8b8: MISC BASE D55A8D645C33 lea r20, ptr [r20+r11*2+0x33] +XDIS 1e8be: MISC BASE D55A8D645D34 lea r20, ptr [r21+r11*2+0x34] +XDIS 1e8c4: MISC BASE D55A8D645E35 lea r20, ptr [r22+r11*2+0x35] +XDIS 1e8ca: MISC BASE D55A8D645F36 lea r20, ptr [r23+r11*2+0x36] +XDIS 1e8d0: MISC BASE D55B8D645837 lea r20, ptr [r24+r11*2+0x37] +XDIS 1e8d6: MISC BASE D55B8D645938 lea r20, ptr [r25+r11*2+0x38] +XDIS 1e8dc: MISC BASE D55B8D645A39 lea r20, ptr [r26+r11*2+0x39] +XDIS 1e8e2: MISC BASE D55B8D645B3A lea r20, ptr [r27+r11*2+0x3a] +XDIS 1e8e8: MISC BASE D55B8D645C3B lea r20, ptr [r28+r11*2+0x3b] +XDIS 1e8ee: MISC BASE D55B8D645D3C lea r20, ptr [r29+r11*2+0x3c] +XDIS 1e8f4: MISC BASE D55B8D645E3D lea r20, ptr [r30+r11*2+0x3d] +XDIS 1e8fa: MISC BASE D55B8D645F3E lea r20, ptr [r31+r11*2+0x3e] +XDIS 1e900: MISC BASE D54A8D646020 lea r20, ptr [rax+r12*2+0x20] +XDIS 1e906: MISC BASE D54A8D646121 lea r20, ptr [rcx+r12*2+0x21] +XDIS 1e90c: MISC BASE D54A8D646222 lea r20, ptr [rdx+r12*2+0x22] +XDIS 1e912: MISC BASE D54A8D646323 lea r20, ptr [rbx+r12*2+0x23] +XDIS 1e918: MISC BASE D54A8D646424 lea r20, ptr [rsp+r12*2+0x24] +XDIS 1e91e: MISC BASE D54A8D646525 lea r20, ptr [rbp+r12*2+0x25] +XDIS 1e924: MISC BASE D54A8D646626 lea r20, ptr [rsi+r12*2+0x26] +XDIS 1e92a: MISC BASE D54A8D646727 lea r20, ptr [rdi+r12*2+0x27] +XDIS 1e930: MISC BASE D54B8D646028 lea r20, ptr [r8+r12*2+0x28] +XDIS 1e936: MISC BASE D54B8D646129 lea r20, ptr [r9+r12*2+0x29] +XDIS 1e93c: MISC BASE D54B8D64622A lea r20, ptr [r10+r12*2+0x2a] +XDIS 1e942: MISC BASE D54B8D64632B lea r20, ptr [r11+r12*2+0x2b] +XDIS 1e948: MISC BASE D54B8D64642C lea r20, ptr [r12+r12*2+0x2c] +XDIS 1e94e: MISC BASE D54B8D64652D lea r20, ptr [r13+r12*2+0x2d] +XDIS 1e954: MISC BASE D54B8D64662E lea r20, ptr [r14+r12*2+0x2e] +XDIS 1e95a: MISC BASE D54B8D64672F lea r20, ptr [r15+r12*2+0x2f] +XDIS 1e960: MISC BASE D55A8D646030 lea r20, ptr [r16+r12*2+0x30] +XDIS 1e966: MISC BASE D55A8D646131 lea r20, ptr [r17+r12*2+0x31] +XDIS 1e96c: MISC BASE D55A8D646232 lea r20, ptr [r18+r12*2+0x32] +XDIS 1e972: MISC BASE D55A8D646333 lea r20, ptr [r19+r12*2+0x33] +XDIS 1e978: MISC BASE D55A8D646434 lea r20, ptr [r20+r12*2+0x34] +XDIS 1e97e: MISC BASE D55A8D646535 lea r20, ptr [r21+r12*2+0x35] +XDIS 1e984: MISC BASE D55A8D646636 lea r20, ptr [r22+r12*2+0x36] +XDIS 1e98a: MISC BASE D55A8D646737 lea r20, ptr [r23+r12*2+0x37] +XDIS 1e990: MISC BASE D55B8D646038 lea r20, ptr [r24+r12*2+0x38] +XDIS 1e996: MISC BASE D55B8D646139 lea r20, ptr [r25+r12*2+0x39] +XDIS 1e99c: MISC BASE D55B8D64623A lea r20, ptr [r26+r12*2+0x3a] +XDIS 1e9a2: MISC BASE D55B8D64633B lea r20, ptr [r27+r12*2+0x3b] +XDIS 1e9a8: MISC BASE D55B8D64643C lea r20, ptr [r28+r12*2+0x3c] +XDIS 1e9ae: MISC BASE D55B8D64653D lea r20, ptr [r29+r12*2+0x3d] +XDIS 1e9b4: MISC BASE D55B8D64663E lea r20, ptr [r30+r12*2+0x3e] +XDIS 1e9ba: MISC BASE D55B8D64673F lea r20, ptr [r31+r12*2+0x3f] +XDIS 1e9c0: MISC BASE D54A8D646821 lea r20, ptr [rax+r13*2+0x21] +XDIS 1e9c6: MISC BASE D54A8D646922 lea r20, ptr [rcx+r13*2+0x22] +XDIS 1e9cc: MISC BASE D54A8D646A23 lea r20, ptr [rdx+r13*2+0x23] +XDIS 1e9d2: MISC BASE D54A8D646B24 lea r20, ptr [rbx+r13*2+0x24] +XDIS 1e9d8: MISC BASE D54A8D646C25 lea r20, ptr [rsp+r13*2+0x25] +XDIS 1e9de: MISC BASE D54A8D646D26 lea r20, ptr [rbp+r13*2+0x26] +XDIS 1e9e4: MISC BASE D54A8D646E27 lea r20, ptr [rsi+r13*2+0x27] +XDIS 1e9ea: MISC BASE D54A8D646F28 lea r20, ptr [rdi+r13*2+0x28] +XDIS 1e9f0: MISC BASE D54B8D646829 lea r20, ptr [r8+r13*2+0x29] +XDIS 1e9f6: MISC BASE D54B8D64692A lea r20, ptr [r9+r13*2+0x2a] +XDIS 1e9fc: MISC BASE D54B8D646A2B lea r20, ptr [r10+r13*2+0x2b] +XDIS 1ea02: MISC BASE D54B8D646B2C lea r20, ptr [r11+r13*2+0x2c] +XDIS 1ea08: MISC BASE D54B8D646C2D lea r20, ptr [r12+r13*2+0x2d] +XDIS 1ea0e: MISC BASE D54B8D646D2E lea r20, ptr [r13+r13*2+0x2e] +XDIS 1ea14: MISC BASE D54B8D646E2F lea r20, ptr [r14+r13*2+0x2f] +XDIS 1ea1a: MISC BASE D54B8D646F30 lea r20, ptr [r15+r13*2+0x30] +XDIS 1ea20: MISC BASE D55A8D646831 lea r20, ptr [r16+r13*2+0x31] +XDIS 1ea26: MISC BASE D55A8D646932 lea r20, ptr [r17+r13*2+0x32] +XDIS 1ea2c: MISC BASE D55A8D646A33 lea r20, ptr [r18+r13*2+0x33] +XDIS 1ea32: MISC BASE D55A8D646B34 lea r20, ptr [r19+r13*2+0x34] +XDIS 1ea38: MISC BASE D55A8D646C35 lea r20, ptr [r20+r13*2+0x35] +XDIS 1ea3e: MISC BASE D55A8D646D36 lea r20, ptr [r21+r13*2+0x36] +XDIS 1ea44: MISC BASE D55A8D646E37 lea r20, ptr [r22+r13*2+0x37] +XDIS 1ea4a: MISC BASE D55A8D646F38 lea r20, ptr [r23+r13*2+0x38] +XDIS 1ea50: MISC BASE D55B8D646839 lea r20, ptr [r24+r13*2+0x39] +XDIS 1ea56: MISC BASE D55B8D64693A lea r20, ptr [r25+r13*2+0x3a] +XDIS 1ea5c: MISC BASE D55B8D646A3B lea r20, ptr [r26+r13*2+0x3b] +XDIS 1ea62: MISC BASE D55B8D646B3C lea r20, ptr [r27+r13*2+0x3c] +XDIS 1ea68: MISC BASE D55B8D646C3D lea r20, ptr [r28+r13*2+0x3d] +XDIS 1ea6e: MISC BASE D55B8D646D3E lea r20, ptr [r29+r13*2+0x3e] +XDIS 1ea74: MISC BASE D55B8D646E3F lea r20, ptr [r30+r13*2+0x3f] +XDIS 1ea7a: MISC BASE D55B8D646F40 lea r20, ptr [r31+r13*2+0x40] +XDIS 1ea80: MISC BASE D54A8D647022 lea r20, ptr [rax+r14*2+0x22] +XDIS 1ea86: MISC BASE D54A8D647123 lea r20, ptr [rcx+r14*2+0x23] +XDIS 1ea8c: MISC BASE D54A8D647224 lea r20, ptr [rdx+r14*2+0x24] +XDIS 1ea92: MISC BASE D54A8D647325 lea r20, ptr [rbx+r14*2+0x25] +XDIS 1ea98: MISC BASE D54A8D647426 lea r20, ptr [rsp+r14*2+0x26] +XDIS 1ea9e: MISC BASE D54A8D647527 lea r20, ptr [rbp+r14*2+0x27] +XDIS 1eaa4: MISC BASE D54A8D647628 lea r20, ptr [rsi+r14*2+0x28] +XDIS 1eaaa: MISC BASE D54A8D647729 lea r20, ptr [rdi+r14*2+0x29] +XDIS 1eab0: MISC BASE D54B8D64702A lea r20, ptr [r8+r14*2+0x2a] +XDIS 1eab6: MISC BASE D54B8D64712B lea r20, ptr [r9+r14*2+0x2b] +XDIS 1eabc: MISC BASE D54B8D64722C lea r20, ptr [r10+r14*2+0x2c] +XDIS 1eac2: MISC BASE D54B8D64732D lea r20, ptr [r11+r14*2+0x2d] +XDIS 1eac8: MISC BASE D54B8D64742E lea r20, ptr [r12+r14*2+0x2e] +XDIS 1eace: MISC BASE D54B8D64752F lea r20, ptr [r13+r14*2+0x2f] +XDIS 1ead4: MISC BASE D54B8D647630 lea r20, ptr [r14+r14*2+0x30] +XDIS 1eada: MISC BASE D54B8D647731 lea r20, ptr [r15+r14*2+0x31] +XDIS 1eae0: MISC BASE D55A8D647032 lea r20, ptr [r16+r14*2+0x32] +XDIS 1eae6: MISC BASE D55A8D647133 lea r20, ptr [r17+r14*2+0x33] +XDIS 1eaec: MISC BASE D55A8D647234 lea r20, ptr [r18+r14*2+0x34] +XDIS 1eaf2: MISC BASE D55A8D647335 lea r20, ptr [r19+r14*2+0x35] +XDIS 1eaf8: MISC BASE D55A8D647436 lea r20, ptr [r20+r14*2+0x36] +XDIS 1eafe: MISC BASE D55A8D647537 lea r20, ptr [r21+r14*2+0x37] +XDIS 1eb04: MISC BASE D55A8D647638 lea r20, ptr [r22+r14*2+0x38] +XDIS 1eb0a: MISC BASE D55A8D647739 lea r20, ptr [r23+r14*2+0x39] +XDIS 1eb10: MISC BASE D55B8D64703A lea r20, ptr [r24+r14*2+0x3a] +XDIS 1eb16: MISC BASE D55B8D64713B lea r20, ptr [r25+r14*2+0x3b] +XDIS 1eb1c: MISC BASE D55B8D64723C lea r20, ptr [r26+r14*2+0x3c] +XDIS 1eb22: MISC BASE D55B8D64733D lea r20, ptr [r27+r14*2+0x3d] +XDIS 1eb28: MISC BASE D55B8D64743E lea r20, ptr [r28+r14*2+0x3e] +XDIS 1eb2e: MISC BASE D55B8D64753F lea r20, ptr [r29+r14*2+0x3f] +XDIS 1eb34: MISC BASE D55B8D647640 lea r20, ptr [r30+r14*2+0x40] +XDIS 1eb3a: MISC BASE D55B8D647741 lea r20, ptr [r31+r14*2+0x41] +XDIS 1eb40: MISC BASE D54A8D647823 lea r20, ptr [rax+r15*2+0x23] +XDIS 1eb46: MISC BASE D54A8D647924 lea r20, ptr [rcx+r15*2+0x24] +XDIS 1eb4c: MISC BASE D54A8D647A25 lea r20, ptr [rdx+r15*2+0x25] +XDIS 1eb52: MISC BASE D54A8D647B26 lea r20, ptr [rbx+r15*2+0x26] +XDIS 1eb58: MISC BASE D54A8D647C27 lea r20, ptr [rsp+r15*2+0x27] +XDIS 1eb5e: MISC BASE D54A8D647D28 lea r20, ptr [rbp+r15*2+0x28] +XDIS 1eb64: MISC BASE D54A8D647E29 lea r20, ptr [rsi+r15*2+0x29] +XDIS 1eb6a: MISC BASE D54A8D647F2A lea r20, ptr [rdi+r15*2+0x2a] +XDIS 1eb70: MISC BASE D54B8D64782B lea r20, ptr [r8+r15*2+0x2b] +XDIS 1eb76: MISC BASE D54B8D64792C lea r20, ptr [r9+r15*2+0x2c] +XDIS 1eb7c: MISC BASE D54B8D647A2D lea r20, ptr [r10+r15*2+0x2d] +XDIS 1eb82: MISC BASE D54B8D647B2E lea r20, ptr [r11+r15*2+0x2e] +XDIS 1eb88: MISC BASE D54B8D647C2F lea r20, ptr [r12+r15*2+0x2f] +XDIS 1eb8e: MISC BASE D54B8D647D30 lea r20, ptr [r13+r15*2+0x30] +XDIS 1eb94: MISC BASE D54B8D647E31 lea r20, ptr [r14+r15*2+0x31] +XDIS 1eb9a: MISC BASE D54B8D647F32 lea r20, ptr [r15+r15*2+0x32] +XDIS 1eba0: MISC BASE D55A8D647833 lea r20, ptr [r16+r15*2+0x33] +XDIS 1eba6: MISC BASE D55A8D647934 lea r20, ptr [r17+r15*2+0x34] +XDIS 1ebac: MISC BASE D55A8D647A35 lea r20, ptr [r18+r15*2+0x35] +XDIS 1ebb2: MISC BASE D55A8D647B36 lea r20, ptr [r19+r15*2+0x36] +XDIS 1ebb8: MISC BASE D55A8D647C37 lea r20, ptr [r20+r15*2+0x37] +XDIS 1ebbe: MISC BASE D55A8D647D38 lea r20, ptr [r21+r15*2+0x38] +XDIS 1ebc4: MISC BASE D55A8D647E39 lea r20, ptr [r22+r15*2+0x39] +XDIS 1ebca: MISC BASE D55A8D647F3A lea r20, ptr [r23+r15*2+0x3a] +XDIS 1ebd0: MISC BASE D55B8D64783B lea r20, ptr [r24+r15*2+0x3b] +XDIS 1ebd6: MISC BASE D55B8D64793C lea r20, ptr [r25+r15*2+0x3c] +XDIS 1ebdc: MISC BASE D55B8D647A3D lea r20, ptr [r26+r15*2+0x3d] +XDIS 1ebe2: MISC BASE D55B8D647B3E lea r20, ptr [r27+r15*2+0x3e] +XDIS 1ebe8: MISC BASE D55B8D647C3F lea r20, ptr [r28+r15*2+0x3f] +XDIS 1ebee: MISC BASE D55B8D647D40 lea r20, ptr [r29+r15*2+0x40] +XDIS 1ebf4: MISC BASE D55B8D647E41 lea r20, ptr [r30+r15*2+0x41] +XDIS 1ebfa: MISC BASE D55B8D647F42 lea r20, ptr [r31+r15*2+0x42] +XDIS 1ec00: MISC BASE D5688D644024 lea r20, ptr [rax+r16*2+0x24] +XDIS 1ec06: MISC BASE D5688D644125 lea r20, ptr [rcx+r16*2+0x25] +XDIS 1ec0c: MISC BASE D5688D644226 lea r20, ptr [rdx+r16*2+0x26] +XDIS 1ec12: MISC BASE D5688D644327 lea r20, ptr [rbx+r16*2+0x27] +XDIS 1ec18: MISC BASE D5688D644428 lea r20, ptr [rsp+r16*2+0x28] +XDIS 1ec1e: MISC BASE D5688D644529 lea r20, ptr [rbp+r16*2+0x29] +XDIS 1ec24: MISC BASE D5688D64462A lea r20, ptr [rsi+r16*2+0x2a] +XDIS 1ec2a: MISC BASE D5688D64472B lea r20, ptr [rdi+r16*2+0x2b] +XDIS 1ec30: MISC BASE D5698D64402C lea r20, ptr [r8+r16*2+0x2c] +XDIS 1ec36: MISC BASE D5698D64412D lea r20, ptr [r9+r16*2+0x2d] +XDIS 1ec3c: MISC BASE D5698D64422E lea r20, ptr [r10+r16*2+0x2e] +XDIS 1ec42: MISC BASE D5698D64432F lea r20, ptr [r11+r16*2+0x2f] +XDIS 1ec48: MISC BASE D5698D644430 lea r20, ptr [r12+r16*2+0x30] +XDIS 1ec4e: MISC BASE D5698D644531 lea r20, ptr [r13+r16*2+0x31] +XDIS 1ec54: MISC BASE D5698D644632 lea r20, ptr [r14+r16*2+0x32] +XDIS 1ec5a: MISC BASE D5698D644733 lea r20, ptr [r15+r16*2+0x33] +XDIS 1ec60: MISC BASE D5788D644034 lea r20, ptr [r16+r16*2+0x34] +XDIS 1ec66: MISC BASE D5788D644135 lea r20, ptr [r17+r16*2+0x35] +XDIS 1ec6c: MISC BASE D5788D644236 lea r20, ptr [r18+r16*2+0x36] +XDIS 1ec72: MISC BASE D5788D644337 lea r20, ptr [r19+r16*2+0x37] +XDIS 1ec78: MISC BASE D5788D644438 lea r20, ptr [r20+r16*2+0x38] +XDIS 1ec7e: MISC BASE D5788D644539 lea r20, ptr [r21+r16*2+0x39] +XDIS 1ec84: MISC BASE D5788D64463A lea r20, ptr [r22+r16*2+0x3a] +XDIS 1ec8a: MISC BASE D5788D64473B lea r20, ptr [r23+r16*2+0x3b] +XDIS 1ec90: MISC BASE D5798D64403C lea r20, ptr [r24+r16*2+0x3c] +XDIS 1ec96: MISC BASE D5798D64413D lea r20, ptr [r25+r16*2+0x3d] +XDIS 1ec9c: MISC BASE D5798D64423E lea r20, ptr [r26+r16*2+0x3e] +XDIS 1eca2: MISC BASE D5798D64433F lea r20, ptr [r27+r16*2+0x3f] +XDIS 1eca8: MISC BASE D5798D644440 lea r20, ptr [r28+r16*2+0x40] +XDIS 1ecae: MISC BASE D5798D644541 lea r20, ptr [r29+r16*2+0x41] +XDIS 1ecb4: MISC BASE D5798D644642 lea r20, ptr [r30+r16*2+0x42] +XDIS 1ecba: MISC BASE D5798D644743 lea r20, ptr [r31+r16*2+0x43] +XDIS 1ecc0: MISC BASE D5688D644825 lea r20, ptr [rax+r17*2+0x25] +XDIS 1ecc6: MISC BASE D5688D644926 lea r20, ptr [rcx+r17*2+0x26] +XDIS 1eccc: MISC BASE D5688D644A27 lea r20, ptr [rdx+r17*2+0x27] +XDIS 1ecd2: MISC BASE D5688D644B28 lea r20, ptr [rbx+r17*2+0x28] +XDIS 1ecd8: MISC BASE D5688D644C29 lea r20, ptr [rsp+r17*2+0x29] +XDIS 1ecde: MISC BASE D5688D644D2A lea r20, ptr [rbp+r17*2+0x2a] +XDIS 1ece4: MISC BASE D5688D644E2B lea r20, ptr [rsi+r17*2+0x2b] +XDIS 1ecea: MISC BASE D5688D644F2C lea r20, ptr [rdi+r17*2+0x2c] +XDIS 1ecf0: MISC BASE D5698D64482D lea r20, ptr [r8+r17*2+0x2d] +XDIS 1ecf6: MISC BASE D5698D64492E lea r20, ptr [r9+r17*2+0x2e] +XDIS 1ecfc: MISC BASE D5698D644A2F lea r20, ptr [r10+r17*2+0x2f] +XDIS 1ed02: MISC BASE D5698D644B30 lea r20, ptr [r11+r17*2+0x30] +XDIS 1ed08: MISC BASE D5698D644C31 lea r20, ptr [r12+r17*2+0x31] +XDIS 1ed0e: MISC BASE D5698D644D32 lea r20, ptr [r13+r17*2+0x32] +XDIS 1ed14: MISC BASE D5698D644E33 lea r20, ptr [r14+r17*2+0x33] +XDIS 1ed1a: MISC BASE D5698D644F34 lea r20, ptr [r15+r17*2+0x34] +XDIS 1ed20: MISC BASE D5788D644835 lea r20, ptr [r16+r17*2+0x35] +XDIS 1ed26: MISC BASE D5788D644936 lea r20, ptr [r17+r17*2+0x36] +XDIS 1ed2c: MISC BASE D5788D644A37 lea r20, ptr [r18+r17*2+0x37] +XDIS 1ed32: MISC BASE D5788D644B38 lea r20, ptr [r19+r17*2+0x38] +XDIS 1ed38: MISC BASE D5788D644C39 lea r20, ptr [r20+r17*2+0x39] +XDIS 1ed3e: MISC BASE D5788D644D3A lea r20, ptr [r21+r17*2+0x3a] +XDIS 1ed44: MISC BASE D5788D644E3B lea r20, ptr [r22+r17*2+0x3b] +XDIS 1ed4a: MISC BASE D5788D644F3C lea r20, ptr [r23+r17*2+0x3c] +XDIS 1ed50: MISC BASE D5798D64483D lea r20, ptr [r24+r17*2+0x3d] +XDIS 1ed56: MISC BASE D5798D64493E lea r20, ptr [r25+r17*2+0x3e] +XDIS 1ed5c: MISC BASE D5798D644A3F lea r20, ptr [r26+r17*2+0x3f] +XDIS 1ed62: MISC BASE D5798D644B40 lea r20, ptr [r27+r17*2+0x40] +XDIS 1ed68: MISC BASE D5798D644C41 lea r20, ptr [r28+r17*2+0x41] +XDIS 1ed6e: MISC BASE D5798D644D42 lea r20, ptr [r29+r17*2+0x42] +XDIS 1ed74: MISC BASE D5798D644E43 lea r20, ptr [r30+r17*2+0x43] +XDIS 1ed7a: MISC BASE D5798D644F44 lea r20, ptr [r31+r17*2+0x44] +XDIS 1ed80: MISC BASE D5688D645026 lea r20, ptr [rax+r18*2+0x26] +XDIS 1ed86: MISC BASE D5688D645127 lea r20, ptr [rcx+r18*2+0x27] +XDIS 1ed8c: MISC BASE D5688D645228 lea r20, ptr [rdx+r18*2+0x28] +XDIS 1ed92: MISC BASE D5688D645329 lea r20, ptr [rbx+r18*2+0x29] +XDIS 1ed98: MISC BASE D5688D64542A lea r20, ptr [rsp+r18*2+0x2a] +XDIS 1ed9e: MISC BASE D5688D64552B lea r20, ptr [rbp+r18*2+0x2b] +XDIS 1eda4: MISC BASE D5688D64562C lea r20, ptr [rsi+r18*2+0x2c] +XDIS 1edaa: MISC BASE D5688D64572D lea r20, ptr [rdi+r18*2+0x2d] +XDIS 1edb0: MISC BASE D5698D64502E lea r20, ptr [r8+r18*2+0x2e] +XDIS 1edb6: MISC BASE D5698D64512F lea r20, ptr [r9+r18*2+0x2f] +XDIS 1edbc: MISC BASE D5698D645230 lea r20, ptr [r10+r18*2+0x30] +XDIS 1edc2: MISC BASE D5698D645331 lea r20, ptr [r11+r18*2+0x31] +XDIS 1edc8: MISC BASE D5698D645432 lea r20, ptr [r12+r18*2+0x32] +XDIS 1edce: MISC BASE D5698D645533 lea r20, ptr [r13+r18*2+0x33] +XDIS 1edd4: MISC BASE D5698D645634 lea r20, ptr [r14+r18*2+0x34] +XDIS 1edda: MISC BASE D5698D645735 lea r20, ptr [r15+r18*2+0x35] +XDIS 1ede0: MISC BASE D5788D645036 lea r20, ptr [r16+r18*2+0x36] +XDIS 1ede6: MISC BASE D5788D645137 lea r20, ptr [r17+r18*2+0x37] +XDIS 1edec: MISC BASE D5788D645238 lea r20, ptr [r18+r18*2+0x38] +XDIS 1edf2: MISC BASE D5788D645339 lea r20, ptr [r19+r18*2+0x39] +XDIS 1edf8: MISC BASE D5788D64543A lea r20, ptr [r20+r18*2+0x3a] +XDIS 1edfe: MISC BASE D5788D64553B lea r20, ptr [r21+r18*2+0x3b] +XDIS 1ee04: MISC BASE D5788D64563C lea r20, ptr [r22+r18*2+0x3c] +XDIS 1ee0a: MISC BASE D5788D64573D lea r20, ptr [r23+r18*2+0x3d] +XDIS 1ee10: MISC BASE D5798D64503E lea r20, ptr [r24+r18*2+0x3e] +XDIS 1ee16: MISC BASE D5798D64513F lea r20, ptr [r25+r18*2+0x3f] +XDIS 1ee1c: MISC BASE D5798D645240 lea r20, ptr [r26+r18*2+0x40] +XDIS 1ee22: MISC BASE D5798D645341 lea r20, ptr [r27+r18*2+0x41] +XDIS 1ee28: MISC BASE D5798D645442 lea r20, ptr [r28+r18*2+0x42] +XDIS 1ee2e: MISC BASE D5798D645543 lea r20, ptr [r29+r18*2+0x43] +XDIS 1ee34: MISC BASE D5798D645644 lea r20, ptr [r30+r18*2+0x44] +XDIS 1ee3a: MISC BASE D5798D645745 lea r20, ptr [r31+r18*2+0x45] +XDIS 1ee40: MISC BASE D5688D645827 lea r20, ptr [rax+r19*2+0x27] +XDIS 1ee46: MISC BASE D5688D645928 lea r20, ptr [rcx+r19*2+0x28] +XDIS 1ee4c: MISC BASE D5688D645A29 lea r20, ptr [rdx+r19*2+0x29] +XDIS 1ee52: MISC BASE D5688D645B2A lea r20, ptr [rbx+r19*2+0x2a] +XDIS 1ee58: MISC BASE D5688D645C2B lea r20, ptr [rsp+r19*2+0x2b] +XDIS 1ee5e: MISC BASE D5688D645D2C lea r20, ptr [rbp+r19*2+0x2c] +XDIS 1ee64: MISC BASE D5688D645E2D lea r20, ptr [rsi+r19*2+0x2d] +XDIS 1ee6a: MISC BASE D5688D645F2E lea r20, ptr [rdi+r19*2+0x2e] +XDIS 1ee70: MISC BASE D5698D64582F lea r20, ptr [r8+r19*2+0x2f] +XDIS 1ee76: MISC BASE D5698D645930 lea r20, ptr [r9+r19*2+0x30] +XDIS 1ee7c: MISC BASE D5698D645A31 lea r20, ptr [r10+r19*2+0x31] +XDIS 1ee82: MISC BASE D5698D645B32 lea r20, ptr [r11+r19*2+0x32] +XDIS 1ee88: MISC BASE D5698D645C33 lea r20, ptr [r12+r19*2+0x33] +XDIS 1ee8e: MISC BASE D5698D645D34 lea r20, ptr [r13+r19*2+0x34] +XDIS 1ee94: MISC BASE D5698D645E35 lea r20, ptr [r14+r19*2+0x35] +XDIS 1ee9a: MISC BASE D5698D645F36 lea r20, ptr [r15+r19*2+0x36] +XDIS 1eea0: MISC BASE D5788D645837 lea r20, ptr [r16+r19*2+0x37] +XDIS 1eea6: MISC BASE D5788D645938 lea r20, ptr [r17+r19*2+0x38] +XDIS 1eeac: MISC BASE D5788D645A39 lea r20, ptr [r18+r19*2+0x39] +XDIS 1eeb2: MISC BASE D5788D645B3A lea r20, ptr [r19+r19*2+0x3a] +XDIS 1eeb8: MISC BASE D5788D645C3B lea r20, ptr [r20+r19*2+0x3b] +XDIS 1eebe: MISC BASE D5788D645D3C lea r20, ptr [r21+r19*2+0x3c] +XDIS 1eec4: MISC BASE D5788D645E3D lea r20, ptr [r22+r19*2+0x3d] +XDIS 1eeca: MISC BASE D5788D645F3E lea r20, ptr [r23+r19*2+0x3e] +XDIS 1eed0: MISC BASE D5798D64583F lea r20, ptr [r24+r19*2+0x3f] +XDIS 1eed6: MISC BASE D5798D645940 lea r20, ptr [r25+r19*2+0x40] +XDIS 1eedc: MISC BASE D5798D645A41 lea r20, ptr [r26+r19*2+0x41] +XDIS 1eee2: MISC BASE D5798D645B42 lea r20, ptr [r27+r19*2+0x42] +XDIS 1eee8: MISC BASE D5798D645C43 lea r20, ptr [r28+r19*2+0x43] +XDIS 1eeee: MISC BASE D5798D645D44 lea r20, ptr [r29+r19*2+0x44] +XDIS 1eef4: MISC BASE D5798D645E45 lea r20, ptr [r30+r19*2+0x45] +XDIS 1eefa: MISC BASE D5798D645F46 lea r20, ptr [r31+r19*2+0x46] +XDIS 1ef00: MISC BASE D5688D646028 lea r20, ptr [rax+r20*2+0x28] +XDIS 1ef06: MISC BASE D5688D646129 lea r20, ptr [rcx+r20*2+0x29] +XDIS 1ef0c: MISC BASE D5688D64622A lea r20, ptr [rdx+r20*2+0x2a] +XDIS 1ef12: MISC BASE D5688D64632B lea r20, ptr [rbx+r20*2+0x2b] +XDIS 1ef18: MISC BASE D5688D64642C lea r20, ptr [rsp+r20*2+0x2c] +XDIS 1ef1e: MISC BASE D5688D64652D lea r20, ptr [rbp+r20*2+0x2d] +XDIS 1ef24: MISC BASE D5688D64662E lea r20, ptr [rsi+r20*2+0x2e] +XDIS 1ef2a: MISC BASE D5688D64672F lea r20, ptr [rdi+r20*2+0x2f] +XDIS 1ef30: MISC BASE D5698D646030 lea r20, ptr [r8+r20*2+0x30] +XDIS 1ef36: MISC BASE D5698D646131 lea r20, ptr [r9+r20*2+0x31] +XDIS 1ef3c: MISC BASE D5698D646232 lea r20, ptr [r10+r20*2+0x32] +XDIS 1ef42: MISC BASE D5698D646333 lea r20, ptr [r11+r20*2+0x33] +XDIS 1ef48: MISC BASE D5698D646434 lea r20, ptr [r12+r20*2+0x34] +XDIS 1ef4e: MISC BASE D5698D646535 lea r20, ptr [r13+r20*2+0x35] +XDIS 1ef54: MISC BASE D5698D646636 lea r20, ptr [r14+r20*2+0x36] +XDIS 1ef5a: MISC BASE D5698D646737 lea r20, ptr [r15+r20*2+0x37] +XDIS 1ef60: MISC BASE D5788D646038 lea r20, ptr [r16+r20*2+0x38] +XDIS 1ef66: MISC BASE D5788D646139 lea r20, ptr [r17+r20*2+0x39] +XDIS 1ef6c: MISC BASE D5788D64623A lea r20, ptr [r18+r20*2+0x3a] +XDIS 1ef72: MISC BASE D5788D64633B lea r20, ptr [r19+r20*2+0x3b] +XDIS 1ef78: MISC BASE D5788D64643C lea r20, ptr [r20+r20*2+0x3c] +XDIS 1ef7e: MISC BASE D5788D64653D lea r20, ptr [r21+r20*2+0x3d] +XDIS 1ef84: MISC BASE D5788D64663E lea r20, ptr [r22+r20*2+0x3e] +XDIS 1ef8a: MISC BASE D5788D64673F lea r20, ptr [r23+r20*2+0x3f] +XDIS 1ef90: MISC BASE D5798D646040 lea r20, ptr [r24+r20*2+0x40] +XDIS 1ef96: MISC BASE D5798D646141 lea r20, ptr [r25+r20*2+0x41] +XDIS 1ef9c: MISC BASE D5798D646242 lea r20, ptr [r26+r20*2+0x42] +XDIS 1efa2: MISC BASE D5798D646343 lea r20, ptr [r27+r20*2+0x43] +XDIS 1efa8: MISC BASE D5798D646444 lea r20, ptr [r28+r20*2+0x44] +XDIS 1efae: MISC BASE D5798D646545 lea r20, ptr [r29+r20*2+0x45] +XDIS 1efb4: MISC BASE D5798D646646 lea r20, ptr [r30+r20*2+0x46] +XDIS 1efba: MISC BASE D5798D646747 lea r20, ptr [r31+r20*2+0x47] +XDIS 1efc0: MISC BASE D5688D646829 lea r20, ptr [rax+r21*2+0x29] +XDIS 1efc6: MISC BASE D5688D64692A lea r20, ptr [rcx+r21*2+0x2a] +XDIS 1efcc: MISC BASE D5688D646A2B lea r20, ptr [rdx+r21*2+0x2b] +XDIS 1efd2: MISC BASE D5688D646B2C lea r20, ptr [rbx+r21*2+0x2c] +XDIS 1efd8: MISC BASE D5688D646C2D lea r20, ptr [rsp+r21*2+0x2d] +XDIS 1efde: MISC BASE D5688D646D2E lea r20, ptr [rbp+r21*2+0x2e] +XDIS 1efe4: MISC BASE D5688D646E2F lea r20, ptr [rsi+r21*2+0x2f] +XDIS 1efea: MISC BASE D5688D646F30 lea r20, ptr [rdi+r21*2+0x30] +XDIS 1eff0: MISC BASE D5698D646831 lea r20, ptr [r8+r21*2+0x31] +XDIS 1eff6: MISC BASE D5698D646932 lea r20, ptr [r9+r21*2+0x32] +XDIS 1effc: MISC BASE D5698D646A33 lea r20, ptr [r10+r21*2+0x33] +XDIS 1f002: MISC BASE D5698D646B34 lea r20, ptr [r11+r21*2+0x34] +XDIS 1f008: MISC BASE D5698D646C35 lea r20, ptr [r12+r21*2+0x35] +XDIS 1f00e: MISC BASE D5698D646D36 lea r20, ptr [r13+r21*2+0x36] +XDIS 1f014: MISC BASE D5698D646E37 lea r20, ptr [r14+r21*2+0x37] +XDIS 1f01a: MISC BASE D5698D646F38 lea r20, ptr [r15+r21*2+0x38] +XDIS 1f020: MISC BASE D5788D646839 lea r20, ptr [r16+r21*2+0x39] +XDIS 1f026: MISC BASE D5788D64693A lea r20, ptr [r17+r21*2+0x3a] +XDIS 1f02c: MISC BASE D5788D646A3B lea r20, ptr [r18+r21*2+0x3b] +XDIS 1f032: MISC BASE D5788D646B3C lea r20, ptr [r19+r21*2+0x3c] +XDIS 1f038: MISC BASE D5788D646C3D lea r20, ptr [r20+r21*2+0x3d] +XDIS 1f03e: MISC BASE D5788D646D3E lea r20, ptr [r21+r21*2+0x3e] +XDIS 1f044: MISC BASE D5788D646E3F lea r20, ptr [r22+r21*2+0x3f] +XDIS 1f04a: MISC BASE D5788D646F40 lea r20, ptr [r23+r21*2+0x40] +XDIS 1f050: MISC BASE D5798D646841 lea r20, ptr [r24+r21*2+0x41] +XDIS 1f056: MISC BASE D5798D646942 lea r20, ptr [r25+r21*2+0x42] +XDIS 1f05c: MISC BASE D5798D646A43 lea r20, ptr [r26+r21*2+0x43] +XDIS 1f062: MISC BASE D5798D646B44 lea r20, ptr [r27+r21*2+0x44] +XDIS 1f068: MISC BASE D5798D646C45 lea r20, ptr [r28+r21*2+0x45] +XDIS 1f06e: MISC BASE D5798D646D46 lea r20, ptr [r29+r21*2+0x46] +XDIS 1f074: MISC BASE D5798D646E47 lea r20, ptr [r30+r21*2+0x47] +XDIS 1f07a: MISC BASE D5798D646F48 lea r20, ptr [r31+r21*2+0x48] +XDIS 1f080: MISC BASE D5688D64702A lea r20, ptr [rax+r22*2+0x2a] +XDIS 1f086: MISC BASE D5688D64712B lea r20, ptr [rcx+r22*2+0x2b] +XDIS 1f08c: MISC BASE D5688D64722C lea r20, ptr [rdx+r22*2+0x2c] +XDIS 1f092: MISC BASE D5688D64732D lea r20, ptr [rbx+r22*2+0x2d] +XDIS 1f098: MISC BASE D5688D64742E lea r20, ptr [rsp+r22*2+0x2e] +XDIS 1f09e: MISC BASE D5688D64752F lea r20, ptr [rbp+r22*2+0x2f] +XDIS 1f0a4: MISC BASE D5688D647630 lea r20, ptr [rsi+r22*2+0x30] +XDIS 1f0aa: MISC BASE D5688D647731 lea r20, ptr [rdi+r22*2+0x31] +XDIS 1f0b0: MISC BASE D5698D647032 lea r20, ptr [r8+r22*2+0x32] +XDIS 1f0b6: MISC BASE D5698D647133 lea r20, ptr [r9+r22*2+0x33] +XDIS 1f0bc: MISC BASE D5698D647234 lea r20, ptr [r10+r22*2+0x34] +XDIS 1f0c2: MISC BASE D5698D647335 lea r20, ptr [r11+r22*2+0x35] +XDIS 1f0c8: MISC BASE D5698D647436 lea r20, ptr [r12+r22*2+0x36] +XDIS 1f0ce: MISC BASE D5698D647537 lea r20, ptr [r13+r22*2+0x37] +XDIS 1f0d4: MISC BASE D5698D647638 lea r20, ptr [r14+r22*2+0x38] +XDIS 1f0da: MISC BASE D5698D647739 lea r20, ptr [r15+r22*2+0x39] +XDIS 1f0e0: MISC BASE D5788D64703A lea r20, ptr [r16+r22*2+0x3a] +XDIS 1f0e6: MISC BASE D5788D64713B lea r20, ptr [r17+r22*2+0x3b] +XDIS 1f0ec: MISC BASE D5788D64723C lea r20, ptr [r18+r22*2+0x3c] +XDIS 1f0f2: MISC BASE D5788D64733D lea r20, ptr [r19+r22*2+0x3d] +XDIS 1f0f8: MISC BASE D5788D64743E lea r20, ptr [r20+r22*2+0x3e] +XDIS 1f0fe: MISC BASE D5788D64753F lea r20, ptr [r21+r22*2+0x3f] +XDIS 1f104: MISC BASE D5788D647640 lea r20, ptr [r22+r22*2+0x40] +XDIS 1f10a: MISC BASE D5788D647741 lea r20, ptr [r23+r22*2+0x41] +XDIS 1f110: MISC BASE D5798D647042 lea r20, ptr [r24+r22*2+0x42] +XDIS 1f116: MISC BASE D5798D647143 lea r20, ptr [r25+r22*2+0x43] +XDIS 1f11c: MISC BASE D5798D647244 lea r20, ptr [r26+r22*2+0x44] +XDIS 1f122: MISC BASE D5798D647345 lea r20, ptr [r27+r22*2+0x45] +XDIS 1f128: MISC BASE D5798D647446 lea r20, ptr [r28+r22*2+0x46] +XDIS 1f12e: MISC BASE D5798D647547 lea r20, ptr [r29+r22*2+0x47] +XDIS 1f134: MISC BASE D5798D647648 lea r20, ptr [r30+r22*2+0x48] +XDIS 1f13a: MISC BASE D5798D647749 lea r20, ptr [r31+r22*2+0x49] +XDIS 1f140: MISC BASE D5688D64782B lea r20, ptr [rax+r23*2+0x2b] +XDIS 1f146: MISC BASE D5688D64792C lea r20, ptr [rcx+r23*2+0x2c] +XDIS 1f14c: MISC BASE D5688D647A2D lea r20, ptr [rdx+r23*2+0x2d] +XDIS 1f152: MISC BASE D5688D647B2E lea r20, ptr [rbx+r23*2+0x2e] +XDIS 1f158: MISC BASE D5688D647C2F lea r20, ptr [rsp+r23*2+0x2f] +XDIS 1f15e: MISC BASE D5688D647D30 lea r20, ptr [rbp+r23*2+0x30] +XDIS 1f164: MISC BASE D5688D647E31 lea r20, ptr [rsi+r23*2+0x31] +XDIS 1f16a: MISC BASE D5688D647F32 lea r20, ptr [rdi+r23*2+0x32] +XDIS 1f170: MISC BASE D5698D647833 lea r20, ptr [r8+r23*2+0x33] +XDIS 1f176: MISC BASE D5698D647934 lea r20, ptr [r9+r23*2+0x34] +XDIS 1f17c: MISC BASE D5698D647A35 lea r20, ptr [r10+r23*2+0x35] +XDIS 1f182: MISC BASE D5698D647B36 lea r20, ptr [r11+r23*2+0x36] +XDIS 1f188: MISC BASE D5698D647C37 lea r20, ptr [r12+r23*2+0x37] +XDIS 1f18e: MISC BASE D5698D647D38 lea r20, ptr [r13+r23*2+0x38] +XDIS 1f194: MISC BASE D5698D647E39 lea r20, ptr [r14+r23*2+0x39] +XDIS 1f19a: MISC BASE D5698D647F3A lea r20, ptr [r15+r23*2+0x3a] +XDIS 1f1a0: MISC BASE D5788D64783B lea r20, ptr [r16+r23*2+0x3b] +XDIS 1f1a6: MISC BASE D5788D64793C lea r20, ptr [r17+r23*2+0x3c] +XDIS 1f1ac: MISC BASE D5788D647A3D lea r20, ptr [r18+r23*2+0x3d] +XDIS 1f1b2: MISC BASE D5788D647B3E lea r20, ptr [r19+r23*2+0x3e] +XDIS 1f1b8: MISC BASE D5788D647C3F lea r20, ptr [r20+r23*2+0x3f] +XDIS 1f1be: MISC BASE D5788D647D40 lea r20, ptr [r21+r23*2+0x40] +XDIS 1f1c4: MISC BASE D5788D647E41 lea r20, ptr [r22+r23*2+0x41] +XDIS 1f1ca: MISC BASE D5788D647F42 lea r20, ptr [r23+r23*2+0x42] +XDIS 1f1d0: MISC BASE D5798D647843 lea r20, ptr [r24+r23*2+0x43] +XDIS 1f1d6: MISC BASE D5798D647944 lea r20, ptr [r25+r23*2+0x44] +XDIS 1f1dc: MISC BASE D5798D647A45 lea r20, ptr [r26+r23*2+0x45] +XDIS 1f1e2: MISC BASE D5798D647B46 lea r20, ptr [r27+r23*2+0x46] +XDIS 1f1e8: MISC BASE D5798D647C47 lea r20, ptr [r28+r23*2+0x47] +XDIS 1f1ee: MISC BASE D5798D647D48 lea r20, ptr [r29+r23*2+0x48] +XDIS 1f1f4: MISC BASE D5798D647E49 lea r20, ptr [r30+r23*2+0x49] +XDIS 1f1fa: MISC BASE D5798D647F4A lea r20, ptr [r31+r23*2+0x4a] +XDIS 1f200: MISC BASE D56A8D64402C lea r20, ptr [rax+r24*2+0x2c] +XDIS 1f206: MISC BASE D56A8D64412D lea r20, ptr [rcx+r24*2+0x2d] +XDIS 1f20c: MISC BASE D56A8D64422E lea r20, ptr [rdx+r24*2+0x2e] +XDIS 1f212: MISC BASE D56A8D64432F lea r20, ptr [rbx+r24*2+0x2f] +XDIS 1f218: MISC BASE D56A8D644430 lea r20, ptr [rsp+r24*2+0x30] +XDIS 1f21e: MISC BASE D56A8D644531 lea r20, ptr [rbp+r24*2+0x31] +XDIS 1f224: MISC BASE D56A8D644632 lea r20, ptr [rsi+r24*2+0x32] +XDIS 1f22a: MISC BASE D56A8D644733 lea r20, ptr [rdi+r24*2+0x33] +XDIS 1f230: MISC BASE D56B8D644034 lea r20, ptr [r8+r24*2+0x34] +XDIS 1f236: MISC BASE D56B8D644135 lea r20, ptr [r9+r24*2+0x35] +XDIS 1f23c: MISC BASE D56B8D644236 lea r20, ptr [r10+r24*2+0x36] +XDIS 1f242: MISC BASE D56B8D644337 lea r20, ptr [r11+r24*2+0x37] +XDIS 1f248: MISC BASE D56B8D644438 lea r20, ptr [r12+r24*2+0x38] +XDIS 1f24e: MISC BASE D56B8D644539 lea r20, ptr [r13+r24*2+0x39] +XDIS 1f254: MISC BASE D56B8D64463A lea r20, ptr [r14+r24*2+0x3a] +XDIS 1f25a: MISC BASE D56B8D64473B lea r20, ptr [r15+r24*2+0x3b] +XDIS 1f260: MISC BASE D57A8D64403C lea r20, ptr [r16+r24*2+0x3c] +XDIS 1f266: MISC BASE D57A8D64413D lea r20, ptr [r17+r24*2+0x3d] +XDIS 1f26c: MISC BASE D57A8D64423E lea r20, ptr [r18+r24*2+0x3e] +XDIS 1f272: MISC BASE D57A8D64433F lea r20, ptr [r19+r24*2+0x3f] +XDIS 1f278: MISC BASE D57A8D644440 lea r20, ptr [r20+r24*2+0x40] +XDIS 1f27e: MISC BASE D57A8D644541 lea r20, ptr [r21+r24*2+0x41] +XDIS 1f284: MISC BASE D57A8D644642 lea r20, ptr [r22+r24*2+0x42] +XDIS 1f28a: MISC BASE D57A8D644743 lea r20, ptr [r23+r24*2+0x43] +XDIS 1f290: MISC BASE D57B8D644044 lea r20, ptr [r24+r24*2+0x44] +XDIS 1f296: MISC BASE D57B8D644145 lea r20, ptr [r25+r24*2+0x45] +XDIS 1f29c: MISC BASE D57B8D644246 lea r20, ptr [r26+r24*2+0x46] +XDIS 1f2a2: MISC BASE D57B8D644347 lea r20, ptr [r27+r24*2+0x47] +XDIS 1f2a8: MISC BASE D57B8D644448 lea r20, ptr [r28+r24*2+0x48] +XDIS 1f2ae: MISC BASE D57B8D644549 lea r20, ptr [r29+r24*2+0x49] +XDIS 1f2b4: MISC BASE D57B8D64464A lea r20, ptr [r30+r24*2+0x4a] +XDIS 1f2ba: MISC BASE D57B8D64474B lea r20, ptr [r31+r24*2+0x4b] +XDIS 1f2c0: MISC BASE D56A8D64482D lea r20, ptr [rax+r25*2+0x2d] +XDIS 1f2c6: MISC BASE D56A8D64492E lea r20, ptr [rcx+r25*2+0x2e] +XDIS 1f2cc: MISC BASE D56A8D644A2F lea r20, ptr [rdx+r25*2+0x2f] +XDIS 1f2d2: MISC BASE D56A8D644B30 lea r20, ptr [rbx+r25*2+0x30] +XDIS 1f2d8: MISC BASE D56A8D644C31 lea r20, ptr [rsp+r25*2+0x31] +XDIS 1f2de: MISC BASE D56A8D644D32 lea r20, ptr [rbp+r25*2+0x32] +XDIS 1f2e4: MISC BASE D56A8D644E33 lea r20, ptr [rsi+r25*2+0x33] +XDIS 1f2ea: MISC BASE D56A8D644F34 lea r20, ptr [rdi+r25*2+0x34] +XDIS 1f2f0: MISC BASE D56B8D644835 lea r20, ptr [r8+r25*2+0x35] +XDIS 1f2f6: MISC BASE D56B8D644936 lea r20, ptr [r9+r25*2+0x36] +XDIS 1f2fc: MISC BASE D56B8D644A37 lea r20, ptr [r10+r25*2+0x37] +XDIS 1f302: MISC BASE D56B8D644B38 lea r20, ptr [r11+r25*2+0x38] +XDIS 1f308: MISC BASE D56B8D644C39 lea r20, ptr [r12+r25*2+0x39] +XDIS 1f30e: MISC BASE D56B8D644D3A lea r20, ptr [r13+r25*2+0x3a] +XDIS 1f314: MISC BASE D56B8D644E3B lea r20, ptr [r14+r25*2+0x3b] +XDIS 1f31a: MISC BASE D56B8D644F3C lea r20, ptr [r15+r25*2+0x3c] +XDIS 1f320: MISC BASE D57A8D64483D lea r20, ptr [r16+r25*2+0x3d] +XDIS 1f326: MISC BASE D57A8D64493E lea r20, ptr [r17+r25*2+0x3e] +XDIS 1f32c: MISC BASE D57A8D644A3F lea r20, ptr [r18+r25*2+0x3f] +XDIS 1f332: MISC BASE D57A8D644B40 lea r20, ptr [r19+r25*2+0x40] +XDIS 1f338: MISC BASE D57A8D644C41 lea r20, ptr [r20+r25*2+0x41] +XDIS 1f33e: MISC BASE D57A8D644D42 lea r20, ptr [r21+r25*2+0x42] +XDIS 1f344: MISC BASE D57A8D644E43 lea r20, ptr [r22+r25*2+0x43] +XDIS 1f34a: MISC BASE D57A8D644F44 lea r20, ptr [r23+r25*2+0x44] +XDIS 1f350: MISC BASE D57B8D644845 lea r20, ptr [r24+r25*2+0x45] +XDIS 1f356: MISC BASE D57B8D644946 lea r20, ptr [r25+r25*2+0x46] +XDIS 1f35c: MISC BASE D57B8D644A47 lea r20, ptr [r26+r25*2+0x47] +XDIS 1f362: MISC BASE D57B8D644B48 lea r20, ptr [r27+r25*2+0x48] +XDIS 1f368: MISC BASE D57B8D644C49 lea r20, ptr [r28+r25*2+0x49] +XDIS 1f36e: MISC BASE D57B8D644D4A lea r20, ptr [r29+r25*2+0x4a] +XDIS 1f374: MISC BASE D57B8D644E4B lea r20, ptr [r30+r25*2+0x4b] +XDIS 1f37a: MISC BASE D57B8D644F4C lea r20, ptr [r31+r25*2+0x4c] +XDIS 1f380: MISC BASE D56A8D64502E lea r20, ptr [rax+r26*2+0x2e] +XDIS 1f386: MISC BASE D56A8D64512F lea r20, ptr [rcx+r26*2+0x2f] +XDIS 1f38c: MISC BASE D56A8D645230 lea r20, ptr [rdx+r26*2+0x30] +XDIS 1f392: MISC BASE D56A8D645331 lea r20, ptr [rbx+r26*2+0x31] +XDIS 1f398: MISC BASE D56A8D645432 lea r20, ptr [rsp+r26*2+0x32] +XDIS 1f39e: MISC BASE D56A8D645533 lea r20, ptr [rbp+r26*2+0x33] +XDIS 1f3a4: MISC BASE D56A8D645634 lea r20, ptr [rsi+r26*2+0x34] +XDIS 1f3aa: MISC BASE D56A8D645735 lea r20, ptr [rdi+r26*2+0x35] +XDIS 1f3b0: MISC BASE D56B8D645036 lea r20, ptr [r8+r26*2+0x36] +XDIS 1f3b6: MISC BASE D56B8D645137 lea r20, ptr [r9+r26*2+0x37] +XDIS 1f3bc: MISC BASE D56B8D645238 lea r20, ptr [r10+r26*2+0x38] +XDIS 1f3c2: MISC BASE D56B8D645339 lea r20, ptr [r11+r26*2+0x39] +XDIS 1f3c8: MISC BASE D56B8D64543A lea r20, ptr [r12+r26*2+0x3a] +XDIS 1f3ce: MISC BASE D56B8D64553B lea r20, ptr [r13+r26*2+0x3b] +XDIS 1f3d4: MISC BASE D56B8D64563C lea r20, ptr [r14+r26*2+0x3c] +XDIS 1f3da: MISC BASE D56B8D64573D lea r20, ptr [r15+r26*2+0x3d] +XDIS 1f3e0: MISC BASE D57A8D64503E lea r20, ptr [r16+r26*2+0x3e] +XDIS 1f3e6: MISC BASE D57A8D64513F lea r20, ptr [r17+r26*2+0x3f] +XDIS 1f3ec: MISC BASE D57A8D645240 lea r20, ptr [r18+r26*2+0x40] +XDIS 1f3f2: MISC BASE D57A8D645341 lea r20, ptr [r19+r26*2+0x41] +XDIS 1f3f8: MISC BASE D57A8D645442 lea r20, ptr [r20+r26*2+0x42] +XDIS 1f3fe: MISC BASE D57A8D645543 lea r20, ptr [r21+r26*2+0x43] +XDIS 1f404: MISC BASE D57A8D645644 lea r20, ptr [r22+r26*2+0x44] +XDIS 1f40a: MISC BASE D57A8D645745 lea r20, ptr [r23+r26*2+0x45] +XDIS 1f410: MISC BASE D57B8D645046 lea r20, ptr [r24+r26*2+0x46] +XDIS 1f416: MISC BASE D57B8D645147 lea r20, ptr [r25+r26*2+0x47] +XDIS 1f41c: MISC BASE D57B8D645248 lea r20, ptr [r26+r26*2+0x48] +XDIS 1f422: MISC BASE D57B8D645349 lea r20, ptr [r27+r26*2+0x49] +XDIS 1f428: MISC BASE D57B8D64544A lea r20, ptr [r28+r26*2+0x4a] +XDIS 1f42e: MISC BASE D57B8D64554B lea r20, ptr [r29+r26*2+0x4b] +XDIS 1f434: MISC BASE D57B8D64564C lea r20, ptr [r30+r26*2+0x4c] +XDIS 1f43a: MISC BASE D57B8D64574D lea r20, ptr [r31+r26*2+0x4d] +XDIS 1f440: MISC BASE D56A8D64582F lea r20, ptr [rax+r27*2+0x2f] +XDIS 1f446: MISC BASE D56A8D645930 lea r20, ptr [rcx+r27*2+0x30] +XDIS 1f44c: MISC BASE D56A8D645A31 lea r20, ptr [rdx+r27*2+0x31] +XDIS 1f452: MISC BASE D56A8D645B32 lea r20, ptr [rbx+r27*2+0x32] +XDIS 1f458: MISC BASE D56A8D645C33 lea r20, ptr [rsp+r27*2+0x33] +XDIS 1f45e: MISC BASE D56A8D645D34 lea r20, ptr [rbp+r27*2+0x34] +XDIS 1f464: MISC BASE D56A8D645E35 lea r20, ptr [rsi+r27*2+0x35] +XDIS 1f46a: MISC BASE D56A8D645F36 lea r20, ptr [rdi+r27*2+0x36] +XDIS 1f470: MISC BASE D56B8D645837 lea r20, ptr [r8+r27*2+0x37] +XDIS 1f476: MISC BASE D56B8D645938 lea r20, ptr [r9+r27*2+0x38] +XDIS 1f47c: MISC BASE D56B8D645A39 lea r20, ptr [r10+r27*2+0x39] +XDIS 1f482: MISC BASE D56B8D645B3A lea r20, ptr [r11+r27*2+0x3a] +XDIS 1f488: MISC BASE D56B8D645C3B lea r20, ptr [r12+r27*2+0x3b] +XDIS 1f48e: MISC BASE D56B8D645D3C lea r20, ptr [r13+r27*2+0x3c] +XDIS 1f494: MISC BASE D56B8D645E3D lea r20, ptr [r14+r27*2+0x3d] +XDIS 1f49a: MISC BASE D56B8D645F3E lea r20, ptr [r15+r27*2+0x3e] +XDIS 1f4a0: MISC BASE D57A8D64583F lea r20, ptr [r16+r27*2+0x3f] +XDIS 1f4a6: MISC BASE D57A8D645940 lea r20, ptr [r17+r27*2+0x40] +XDIS 1f4ac: MISC BASE D57A8D645A41 lea r20, ptr [r18+r27*2+0x41] +XDIS 1f4b2: MISC BASE D57A8D645B42 lea r20, ptr [r19+r27*2+0x42] +XDIS 1f4b8: MISC BASE D57A8D645C43 lea r20, ptr [r20+r27*2+0x43] +XDIS 1f4be: MISC BASE D57A8D645D44 lea r20, ptr [r21+r27*2+0x44] +XDIS 1f4c4: MISC BASE D57A8D645E45 lea r20, ptr [r22+r27*2+0x45] +XDIS 1f4ca: MISC BASE D57A8D645F46 lea r20, ptr [r23+r27*2+0x46] +XDIS 1f4d0: MISC BASE D57B8D645847 lea r20, ptr [r24+r27*2+0x47] +XDIS 1f4d6: MISC BASE D57B8D645948 lea r20, ptr [r25+r27*2+0x48] +XDIS 1f4dc: MISC BASE D57B8D645A49 lea r20, ptr [r26+r27*2+0x49] +XDIS 1f4e2: MISC BASE D57B8D645B4A lea r20, ptr [r27+r27*2+0x4a] +XDIS 1f4e8: MISC BASE D57B8D645C4B lea r20, ptr [r28+r27*2+0x4b] +XDIS 1f4ee: MISC BASE D57B8D645D4C lea r20, ptr [r29+r27*2+0x4c] +XDIS 1f4f4: MISC BASE D57B8D645E4D lea r20, ptr [r30+r27*2+0x4d] +XDIS 1f4fa: MISC BASE D57B8D645F4E lea r20, ptr [r31+r27*2+0x4e] +XDIS 1f500: MISC BASE D56A8D646030 lea r20, ptr [rax+r28*2+0x30] +XDIS 1f506: MISC BASE D56A8D646131 lea r20, ptr [rcx+r28*2+0x31] +XDIS 1f50c: MISC BASE D56A8D646232 lea r20, ptr [rdx+r28*2+0x32] +XDIS 1f512: MISC BASE D56A8D646333 lea r20, ptr [rbx+r28*2+0x33] +XDIS 1f518: MISC BASE D56A8D646434 lea r20, ptr [rsp+r28*2+0x34] +XDIS 1f51e: MISC BASE D56A8D646535 lea r20, ptr [rbp+r28*2+0x35] +XDIS 1f524: MISC BASE D56A8D646636 lea r20, ptr [rsi+r28*2+0x36] +XDIS 1f52a: MISC BASE D56A8D646737 lea r20, ptr [rdi+r28*2+0x37] +XDIS 1f530: MISC BASE D56B8D646038 lea r20, ptr [r8+r28*2+0x38] +XDIS 1f536: MISC BASE D56B8D646139 lea r20, ptr [r9+r28*2+0x39] +XDIS 1f53c: MISC BASE D56B8D64623A lea r20, ptr [r10+r28*2+0x3a] +XDIS 1f542: MISC BASE D56B8D64633B lea r20, ptr [r11+r28*2+0x3b] +XDIS 1f548: MISC BASE D56B8D64643C lea r20, ptr [r12+r28*2+0x3c] +XDIS 1f54e: MISC BASE D56B8D64653D lea r20, ptr [r13+r28*2+0x3d] +XDIS 1f554: MISC BASE D56B8D64663E lea r20, ptr [r14+r28*2+0x3e] +XDIS 1f55a: MISC BASE D56B8D64673F lea r20, ptr [r15+r28*2+0x3f] +XDIS 1f560: MISC BASE D57A8D646040 lea r20, ptr [r16+r28*2+0x40] +XDIS 1f566: MISC BASE D57A8D646141 lea r20, ptr [r17+r28*2+0x41] +XDIS 1f56c: MISC BASE D57A8D646242 lea r20, ptr [r18+r28*2+0x42] +XDIS 1f572: MISC BASE D57A8D646343 lea r20, ptr [r19+r28*2+0x43] +XDIS 1f578: MISC BASE D57A8D646444 lea r20, ptr [r20+r28*2+0x44] +XDIS 1f57e: MISC BASE D57A8D646545 lea r20, ptr [r21+r28*2+0x45] +XDIS 1f584: MISC BASE D57A8D646646 lea r20, ptr [r22+r28*2+0x46] +XDIS 1f58a: MISC BASE D57A8D646747 lea r20, ptr [r23+r28*2+0x47] +XDIS 1f590: MISC BASE D57B8D646048 lea r20, ptr [r24+r28*2+0x48] +XDIS 1f596: MISC BASE D57B8D646149 lea r20, ptr [r25+r28*2+0x49] +XDIS 1f59c: MISC BASE D57B8D64624A lea r20, ptr [r26+r28*2+0x4a] +XDIS 1f5a2: MISC BASE D57B8D64634B lea r20, ptr [r27+r28*2+0x4b] +XDIS 1f5a8: MISC BASE D57B8D64644C lea r20, ptr [r28+r28*2+0x4c] +XDIS 1f5ae: MISC BASE D57B8D64654D lea r20, ptr [r29+r28*2+0x4d] +XDIS 1f5b4: MISC BASE D57B8D64664E lea r20, ptr [r30+r28*2+0x4e] +XDIS 1f5ba: MISC BASE D57B8D64674F lea r20, ptr [r31+r28*2+0x4f] +XDIS 1f5c0: MISC BASE D56A8D646831 lea r20, ptr [rax+r29*2+0x31] +XDIS 1f5c6: MISC BASE D56A8D646932 lea r20, ptr [rcx+r29*2+0x32] +XDIS 1f5cc: MISC BASE D56A8D646A33 lea r20, ptr [rdx+r29*2+0x33] +XDIS 1f5d2: MISC BASE D56A8D646B34 lea r20, ptr [rbx+r29*2+0x34] +XDIS 1f5d8: MISC BASE D56A8D646C35 lea r20, ptr [rsp+r29*2+0x35] +XDIS 1f5de: MISC BASE D56A8D646D36 lea r20, ptr [rbp+r29*2+0x36] +XDIS 1f5e4: MISC BASE D56A8D646E37 lea r20, ptr [rsi+r29*2+0x37] +XDIS 1f5ea: MISC BASE D56A8D646F38 lea r20, ptr [rdi+r29*2+0x38] +XDIS 1f5f0: MISC BASE D56B8D646839 lea r20, ptr [r8+r29*2+0x39] +XDIS 1f5f6: MISC BASE D56B8D64693A lea r20, ptr [r9+r29*2+0x3a] +XDIS 1f5fc: MISC BASE D56B8D646A3B lea r20, ptr [r10+r29*2+0x3b] +XDIS 1f602: MISC BASE D56B8D646B3C lea r20, ptr [r11+r29*2+0x3c] +XDIS 1f608: MISC BASE D56B8D646C3D lea r20, ptr [r12+r29*2+0x3d] +XDIS 1f60e: MISC BASE D56B8D646D3E lea r20, ptr [r13+r29*2+0x3e] +XDIS 1f614: MISC BASE D56B8D646E3F lea r20, ptr [r14+r29*2+0x3f] +XDIS 1f61a: MISC BASE D56B8D646F40 lea r20, ptr [r15+r29*2+0x40] +XDIS 1f620: MISC BASE D57A8D646841 lea r20, ptr [r16+r29*2+0x41] +XDIS 1f626: MISC BASE D57A8D646942 lea r20, ptr [r17+r29*2+0x42] +XDIS 1f62c: MISC BASE D57A8D646A43 lea r20, ptr [r18+r29*2+0x43] +XDIS 1f632: MISC BASE D57A8D646B44 lea r20, ptr [r19+r29*2+0x44] +XDIS 1f638: MISC BASE D57A8D646C45 lea r20, ptr [r20+r29*2+0x45] +XDIS 1f63e: MISC BASE D57A8D646D46 lea r20, ptr [r21+r29*2+0x46] +XDIS 1f644: MISC BASE D57A8D646E47 lea r20, ptr [r22+r29*2+0x47] +XDIS 1f64a: MISC BASE D57A8D646F48 lea r20, ptr [r23+r29*2+0x48] +XDIS 1f650: MISC BASE D57B8D646849 lea r20, ptr [r24+r29*2+0x49] +XDIS 1f656: MISC BASE D57B8D64694A lea r20, ptr [r25+r29*2+0x4a] +XDIS 1f65c: MISC BASE D57B8D646A4B lea r20, ptr [r26+r29*2+0x4b] +XDIS 1f662: MISC BASE D57B8D646B4C lea r20, ptr [r27+r29*2+0x4c] +XDIS 1f668: MISC BASE D57B8D646C4D lea r20, ptr [r28+r29*2+0x4d] +XDIS 1f66e: MISC BASE D57B8D646D4E lea r20, ptr [r29+r29*2+0x4e] +XDIS 1f674: MISC BASE D57B8D646E4F lea r20, ptr [r30+r29*2+0x4f] +XDIS 1f67a: MISC BASE D57B8D646F50 lea r20, ptr [r31+r29*2+0x50] +XDIS 1f680: MISC BASE D56A8D647032 lea r20, ptr [rax+r30*2+0x32] +XDIS 1f686: MISC BASE D56A8D647133 lea r20, ptr [rcx+r30*2+0x33] +XDIS 1f68c: MISC BASE D56A8D647234 lea r20, ptr [rdx+r30*2+0x34] +XDIS 1f692: MISC BASE D56A8D647335 lea r20, ptr [rbx+r30*2+0x35] +XDIS 1f698: MISC BASE D56A8D647436 lea r20, ptr [rsp+r30*2+0x36] +XDIS 1f69e: MISC BASE D56A8D647537 lea r20, ptr [rbp+r30*2+0x37] +XDIS 1f6a4: MISC BASE D56A8D647638 lea r20, ptr [rsi+r30*2+0x38] +XDIS 1f6aa: MISC BASE D56A8D647739 lea r20, ptr [rdi+r30*2+0x39] +XDIS 1f6b0: MISC BASE D56B8D64703A lea r20, ptr [r8+r30*2+0x3a] +XDIS 1f6b6: MISC BASE D56B8D64713B lea r20, ptr [r9+r30*2+0x3b] +XDIS 1f6bc: MISC BASE D56B8D64723C lea r20, ptr [r10+r30*2+0x3c] +XDIS 1f6c2: MISC BASE D56B8D64733D lea r20, ptr [r11+r30*2+0x3d] +XDIS 1f6c8: MISC BASE D56B8D64743E lea r20, ptr [r12+r30*2+0x3e] +XDIS 1f6ce: MISC BASE D56B8D64753F lea r20, ptr [r13+r30*2+0x3f] +XDIS 1f6d4: MISC BASE D56B8D647640 lea r20, ptr [r14+r30*2+0x40] +XDIS 1f6da: MISC BASE D56B8D647741 lea r20, ptr [r15+r30*2+0x41] +XDIS 1f6e0: MISC BASE D57A8D647042 lea r20, ptr [r16+r30*2+0x42] +XDIS 1f6e6: MISC BASE D57A8D647143 lea r20, ptr [r17+r30*2+0x43] +XDIS 1f6ec: MISC BASE D57A8D647244 lea r20, ptr [r18+r30*2+0x44] +XDIS 1f6f2: MISC BASE D57A8D647345 lea r20, ptr [r19+r30*2+0x45] +XDIS 1f6f8: MISC BASE D57A8D647446 lea r20, ptr [r20+r30*2+0x46] +XDIS 1f6fe: MISC BASE D57A8D647547 lea r20, ptr [r21+r30*2+0x47] +XDIS 1f704: MISC BASE D57A8D647648 lea r20, ptr [r22+r30*2+0x48] +XDIS 1f70a: MISC BASE D57A8D647749 lea r20, ptr [r23+r30*2+0x49] +XDIS 1f710: MISC BASE D57B8D64704A lea r20, ptr [r24+r30*2+0x4a] +XDIS 1f716: MISC BASE D57B8D64714B lea r20, ptr [r25+r30*2+0x4b] +XDIS 1f71c: MISC BASE D57B8D64724C lea r20, ptr [r26+r30*2+0x4c] +XDIS 1f722: MISC BASE D57B8D64734D lea r20, ptr [r27+r30*2+0x4d] +XDIS 1f728: MISC BASE D57B8D64744E lea r20, ptr [r28+r30*2+0x4e] +XDIS 1f72e: MISC BASE D57B8D64754F lea r20, ptr [r29+r30*2+0x4f] +XDIS 1f734: MISC BASE D57B8D647650 lea r20, ptr [r30+r30*2+0x50] +XDIS 1f73a: MISC BASE D57B8D647751 lea r20, ptr [r31+r30*2+0x51] +XDIS 1f740: MISC BASE D56A8D647833 lea r20, ptr [rax+r31*2+0x33] +XDIS 1f746: MISC BASE D56A8D647934 lea r20, ptr [rcx+r31*2+0x34] +XDIS 1f74c: MISC BASE D56A8D647A35 lea r20, ptr [rdx+r31*2+0x35] +XDIS 1f752: MISC BASE D56A8D647B36 lea r20, ptr [rbx+r31*2+0x36] +XDIS 1f758: MISC BASE D56A8D647C37 lea r20, ptr [rsp+r31*2+0x37] +XDIS 1f75e: MISC BASE D56A8D647D38 lea r20, ptr [rbp+r31*2+0x38] +XDIS 1f764: MISC BASE D56A8D647E39 lea r20, ptr [rsi+r31*2+0x39] +XDIS 1f76a: MISC BASE D56A8D647F3A lea r20, ptr [rdi+r31*2+0x3a] +XDIS 1f770: MISC BASE D56B8D64783B lea r20, ptr [r8+r31*2+0x3b] +XDIS 1f776: MISC BASE D56B8D64793C lea r20, ptr [r9+r31*2+0x3c] +XDIS 1f77c: MISC BASE D56B8D647A3D lea r20, ptr [r10+r31*2+0x3d] +XDIS 1f782: MISC BASE D56B8D647B3E lea r20, ptr [r11+r31*2+0x3e] +XDIS 1f788: MISC BASE D56B8D647C3F lea r20, ptr [r12+r31*2+0x3f] +XDIS 1f78e: MISC BASE D56B8D647D40 lea r20, ptr [r13+r31*2+0x40] +XDIS 1f794: MISC BASE D56B8D647E41 lea r20, ptr [r14+r31*2+0x41] +XDIS 1f79a: MISC BASE D56B8D647F42 lea r20, ptr [r15+r31*2+0x42] +XDIS 1f7a0: MISC BASE D57A8D647843 lea r20, ptr [r16+r31*2+0x43] +XDIS 1f7a6: MISC BASE D57A8D647944 lea r20, ptr [r17+r31*2+0x44] +XDIS 1f7ac: MISC BASE D57A8D647A45 lea r20, ptr [r18+r31*2+0x45] +XDIS 1f7b2: MISC BASE D57A8D647B46 lea r20, ptr [r19+r31*2+0x46] +XDIS 1f7b8: MISC BASE D57A8D647C47 lea r20, ptr [r20+r31*2+0x47] +XDIS 1f7be: MISC BASE D57A8D647D48 lea r20, ptr [r21+r31*2+0x48] +XDIS 1f7c4: MISC BASE D57A8D647E49 lea r20, ptr [r22+r31*2+0x49] +XDIS 1f7ca: MISC BASE D57A8D647F4A lea r20, ptr [r23+r31*2+0x4a] +XDIS 1f7d0: MISC BASE D57B8D64784B lea r20, ptr [r24+r31*2+0x4b] +XDIS 1f7d6: MISC BASE D57B8D64794C lea r20, ptr [r25+r31*2+0x4c] +XDIS 1f7dc: MISC BASE D57B8D647A4D lea r20, ptr [r26+r31*2+0x4d] +XDIS 1f7e2: MISC BASE D57B8D647B4E lea r20, ptr [r27+r31*2+0x4e] +XDIS 1f7e8: MISC BASE D57B8D647C4F lea r20, ptr [r28+r31*2+0x4f] +XDIS 1f7ee: MISC BASE D57B8D647D50 lea r20, ptr [r29+r31*2+0x50] +XDIS 1f7f4: MISC BASE D57B8D647E51 lea r20, ptr [r30+r31*2+0x51] +XDIS 1f7fa: MISC BASE D57B8D647F52 lea r20, ptr [r31+r31*2+0x52] +XDIS 1f800: MISC BASE D5488D6C4015 lea r21, ptr [rax+rax*2+0x15] +XDIS 1f806: MISC BASE D5488D6C4116 lea r21, ptr [rcx+rax*2+0x16] +XDIS 1f80c: MISC BASE D5488D6C4217 lea r21, ptr [rdx+rax*2+0x17] +XDIS 1f812: MISC BASE D5488D6C4318 lea r21, ptr [rbx+rax*2+0x18] +XDIS 1f818: MISC BASE D5488D6C4419 lea r21, ptr [rsp+rax*2+0x19] +XDIS 1f81e: MISC BASE D5488D6C451A lea r21, ptr [rbp+rax*2+0x1a] +XDIS 1f824: MISC BASE D5488D6C461B lea r21, ptr [rsi+rax*2+0x1b] +XDIS 1f82a: MISC BASE D5488D6C471C lea r21, ptr [rdi+rax*2+0x1c] +XDIS 1f830: MISC BASE D5498D6C401D lea r21, ptr [r8+rax*2+0x1d] +XDIS 1f836: MISC BASE D5498D6C411E lea r21, ptr [r9+rax*2+0x1e] +XDIS 1f83c: MISC BASE D5498D6C421F lea r21, ptr [r10+rax*2+0x1f] +XDIS 1f842: MISC BASE D5498D6C4320 lea r21, ptr [r11+rax*2+0x20] +XDIS 1f848: MISC BASE D5498D6C4421 lea r21, ptr [r12+rax*2+0x21] +XDIS 1f84e: MISC BASE D5498D6C4522 lea r21, ptr [r13+rax*2+0x22] +XDIS 1f854: MISC BASE D5498D6C4623 lea r21, ptr [r14+rax*2+0x23] +XDIS 1f85a: MISC BASE D5498D6C4724 lea r21, ptr [r15+rax*2+0x24] +XDIS 1f860: MISC BASE D5588D6C4025 lea r21, ptr [r16+rax*2+0x25] +XDIS 1f866: MISC BASE D5588D6C4126 lea r21, ptr [r17+rax*2+0x26] +XDIS 1f86c: MISC BASE D5588D6C4227 lea r21, ptr [r18+rax*2+0x27] +XDIS 1f872: MISC BASE D5588D6C4328 lea r21, ptr [r19+rax*2+0x28] +XDIS 1f878: MISC BASE D5588D6C4429 lea r21, ptr [r20+rax*2+0x29] +XDIS 1f87e: MISC BASE D5588D6C452A lea r21, ptr [r21+rax*2+0x2a] +XDIS 1f884: MISC BASE D5588D6C462B lea r21, ptr [r22+rax*2+0x2b] +XDIS 1f88a: MISC BASE D5588D6C472C lea r21, ptr [r23+rax*2+0x2c] +XDIS 1f890: MISC BASE D5598D6C402D lea r21, ptr [r24+rax*2+0x2d] +XDIS 1f896: MISC BASE D5598D6C412E lea r21, ptr [r25+rax*2+0x2e] +XDIS 1f89c: MISC BASE D5598D6C422F lea r21, ptr [r26+rax*2+0x2f] +XDIS 1f8a2: MISC BASE D5598D6C4330 lea r21, ptr [r27+rax*2+0x30] +XDIS 1f8a8: MISC BASE D5598D6C4431 lea r21, ptr [r28+rax*2+0x31] +XDIS 1f8ae: MISC BASE D5598D6C4532 lea r21, ptr [r29+rax*2+0x32] +XDIS 1f8b4: MISC BASE D5598D6C4633 lea r21, ptr [r30+rax*2+0x33] +XDIS 1f8ba: MISC BASE D5598D6C4734 lea r21, ptr [r31+rax*2+0x34] +XDIS 1f8c0: MISC BASE D5488D6C4816 lea r21, ptr [rax+rcx*2+0x16] +XDIS 1f8c6: MISC BASE D5488D6C4917 lea r21, ptr [rcx+rcx*2+0x17] +XDIS 1f8cc: MISC BASE D5488D6C4A18 lea r21, ptr [rdx+rcx*2+0x18] +XDIS 1f8d2: MISC BASE D5488D6C4B19 lea r21, ptr [rbx+rcx*2+0x19] +XDIS 1f8d8: MISC BASE D5488D6C4C1A lea r21, ptr [rsp+rcx*2+0x1a] +XDIS 1f8de: MISC BASE D5488D6C4D1B lea r21, ptr [rbp+rcx*2+0x1b] +XDIS 1f8e4: MISC BASE D5488D6C4E1C lea r21, ptr [rsi+rcx*2+0x1c] +XDIS 1f8ea: MISC BASE D5488D6C4F1D lea r21, ptr [rdi+rcx*2+0x1d] +XDIS 1f8f0: MISC BASE D5498D6C481E lea r21, ptr [r8+rcx*2+0x1e] +XDIS 1f8f6: MISC BASE D5498D6C491F lea r21, ptr [r9+rcx*2+0x1f] +XDIS 1f8fc: MISC BASE D5498D6C4A20 lea r21, ptr [r10+rcx*2+0x20] +XDIS 1f902: MISC BASE D5498D6C4B21 lea r21, ptr [r11+rcx*2+0x21] +XDIS 1f908: MISC BASE D5498D6C4C22 lea r21, ptr [r12+rcx*2+0x22] +XDIS 1f90e: MISC BASE D5498D6C4D23 lea r21, ptr [r13+rcx*2+0x23] +XDIS 1f914: MISC BASE D5498D6C4E24 lea r21, ptr [r14+rcx*2+0x24] +XDIS 1f91a: MISC BASE D5498D6C4F25 lea r21, ptr [r15+rcx*2+0x25] +XDIS 1f920: MISC BASE D5588D6C4826 lea r21, ptr [r16+rcx*2+0x26] +XDIS 1f926: MISC BASE D5588D6C4927 lea r21, ptr [r17+rcx*2+0x27] +XDIS 1f92c: MISC BASE D5588D6C4A28 lea r21, ptr [r18+rcx*2+0x28] +XDIS 1f932: MISC BASE D5588D6C4B29 lea r21, ptr [r19+rcx*2+0x29] +XDIS 1f938: MISC BASE D5588D6C4C2A lea r21, ptr [r20+rcx*2+0x2a] +XDIS 1f93e: MISC BASE D5588D6C4D2B lea r21, ptr [r21+rcx*2+0x2b] +XDIS 1f944: MISC BASE D5588D6C4E2C lea r21, ptr [r22+rcx*2+0x2c] +XDIS 1f94a: MISC BASE D5588D6C4F2D lea r21, ptr [r23+rcx*2+0x2d] +XDIS 1f950: MISC BASE D5598D6C482E lea r21, ptr [r24+rcx*2+0x2e] +XDIS 1f956: MISC BASE D5598D6C492F lea r21, ptr [r25+rcx*2+0x2f] +XDIS 1f95c: MISC BASE D5598D6C4A30 lea r21, ptr [r26+rcx*2+0x30] +XDIS 1f962: MISC BASE D5598D6C4B31 lea r21, ptr [r27+rcx*2+0x31] +XDIS 1f968: MISC BASE D5598D6C4C32 lea r21, ptr [r28+rcx*2+0x32] +XDIS 1f96e: MISC BASE D5598D6C4D33 lea r21, ptr [r29+rcx*2+0x33] +XDIS 1f974: MISC BASE D5598D6C4E34 lea r21, ptr [r30+rcx*2+0x34] +XDIS 1f97a: MISC BASE D5598D6C4F35 lea r21, ptr [r31+rcx*2+0x35] +XDIS 1f980: MISC BASE D5488D6C5017 lea r21, ptr [rax+rdx*2+0x17] +XDIS 1f986: MISC BASE D5488D6C5118 lea r21, ptr [rcx+rdx*2+0x18] +XDIS 1f98c: MISC BASE D5488D6C5219 lea r21, ptr [rdx+rdx*2+0x19] +XDIS 1f992: MISC BASE D5488D6C531A lea r21, ptr [rbx+rdx*2+0x1a] +XDIS 1f998: MISC BASE D5488D6C541B lea r21, ptr [rsp+rdx*2+0x1b] +XDIS 1f99e: MISC BASE D5488D6C551C lea r21, ptr [rbp+rdx*2+0x1c] +XDIS 1f9a4: MISC BASE D5488D6C561D lea r21, ptr [rsi+rdx*2+0x1d] +XDIS 1f9aa: MISC BASE D5488D6C571E lea r21, ptr [rdi+rdx*2+0x1e] +XDIS 1f9b0: MISC BASE D5498D6C501F lea r21, ptr [r8+rdx*2+0x1f] +XDIS 1f9b6: MISC BASE D5498D6C5120 lea r21, ptr [r9+rdx*2+0x20] +XDIS 1f9bc: MISC BASE D5498D6C5221 lea r21, ptr [r10+rdx*2+0x21] +XDIS 1f9c2: MISC BASE D5498D6C5322 lea r21, ptr [r11+rdx*2+0x22] +XDIS 1f9c8: MISC BASE D5498D6C5423 lea r21, ptr [r12+rdx*2+0x23] +XDIS 1f9ce: MISC BASE D5498D6C5524 lea r21, ptr [r13+rdx*2+0x24] +XDIS 1f9d4: MISC BASE D5498D6C5625 lea r21, ptr [r14+rdx*2+0x25] +XDIS 1f9da: MISC BASE D5498D6C5726 lea r21, ptr [r15+rdx*2+0x26] +XDIS 1f9e0: MISC BASE D5588D6C5027 lea r21, ptr [r16+rdx*2+0x27] +XDIS 1f9e6: MISC BASE D5588D6C5128 lea r21, ptr [r17+rdx*2+0x28] +XDIS 1f9ec: MISC BASE D5588D6C5229 lea r21, ptr [r18+rdx*2+0x29] +XDIS 1f9f2: MISC BASE D5588D6C532A lea r21, ptr [r19+rdx*2+0x2a] +XDIS 1f9f8: MISC BASE D5588D6C542B lea r21, ptr [r20+rdx*2+0x2b] +XDIS 1f9fe: MISC BASE D5588D6C552C lea r21, ptr [r21+rdx*2+0x2c] +XDIS 1fa04: MISC BASE D5588D6C562D lea r21, ptr [r22+rdx*2+0x2d] +XDIS 1fa0a: MISC BASE D5588D6C572E lea r21, ptr [r23+rdx*2+0x2e] +XDIS 1fa10: MISC BASE D5598D6C502F lea r21, ptr [r24+rdx*2+0x2f] +XDIS 1fa16: MISC BASE D5598D6C5130 lea r21, ptr [r25+rdx*2+0x30] +XDIS 1fa1c: MISC BASE D5598D6C5231 lea r21, ptr [r26+rdx*2+0x31] +XDIS 1fa22: MISC BASE D5598D6C5332 lea r21, ptr [r27+rdx*2+0x32] +XDIS 1fa28: MISC BASE D5598D6C5433 lea r21, ptr [r28+rdx*2+0x33] +XDIS 1fa2e: MISC BASE D5598D6C5534 lea r21, ptr [r29+rdx*2+0x34] +XDIS 1fa34: MISC BASE D5598D6C5635 lea r21, ptr [r30+rdx*2+0x35] +XDIS 1fa3a: MISC BASE D5598D6C5736 lea r21, ptr [r31+rdx*2+0x36] +XDIS 1fa40: MISC BASE D5488D6C5818 lea r21, ptr [rax+rbx*2+0x18] +XDIS 1fa46: MISC BASE D5488D6C5919 lea r21, ptr [rcx+rbx*2+0x19] +XDIS 1fa4c: MISC BASE D5488D6C5A1A lea r21, ptr [rdx+rbx*2+0x1a] +XDIS 1fa52: MISC BASE D5488D6C5B1B lea r21, ptr [rbx+rbx*2+0x1b] +XDIS 1fa58: MISC BASE D5488D6C5C1C lea r21, ptr [rsp+rbx*2+0x1c] +XDIS 1fa5e: MISC BASE D5488D6C5D1D lea r21, ptr [rbp+rbx*2+0x1d] +XDIS 1fa64: MISC BASE D5488D6C5E1E lea r21, ptr [rsi+rbx*2+0x1e] +XDIS 1fa6a: MISC BASE D5488D6C5F1F lea r21, ptr [rdi+rbx*2+0x1f] +XDIS 1fa70: MISC BASE D5498D6C5820 lea r21, ptr [r8+rbx*2+0x20] +XDIS 1fa76: MISC BASE D5498D6C5921 lea r21, ptr [r9+rbx*2+0x21] +XDIS 1fa7c: MISC BASE D5498D6C5A22 lea r21, ptr [r10+rbx*2+0x22] +XDIS 1fa82: MISC BASE D5498D6C5B23 lea r21, ptr [r11+rbx*2+0x23] +XDIS 1fa88: MISC BASE D5498D6C5C24 lea r21, ptr [r12+rbx*2+0x24] +XDIS 1fa8e: MISC BASE D5498D6C5D25 lea r21, ptr [r13+rbx*2+0x25] +XDIS 1fa94: MISC BASE D5498D6C5E26 lea r21, ptr [r14+rbx*2+0x26] +XDIS 1fa9a: MISC BASE D5498D6C5F27 lea r21, ptr [r15+rbx*2+0x27] +XDIS 1faa0: MISC BASE D5588D6C5828 lea r21, ptr [r16+rbx*2+0x28] +XDIS 1faa6: MISC BASE D5588D6C5929 lea r21, ptr [r17+rbx*2+0x29] +XDIS 1faac: MISC BASE D5588D6C5A2A lea r21, ptr [r18+rbx*2+0x2a] +XDIS 1fab2: MISC BASE D5588D6C5B2B lea r21, ptr [r19+rbx*2+0x2b] +XDIS 1fab8: MISC BASE D5588D6C5C2C lea r21, ptr [r20+rbx*2+0x2c] +XDIS 1fabe: MISC BASE D5588D6C5D2D lea r21, ptr [r21+rbx*2+0x2d] +XDIS 1fac4: MISC BASE D5588D6C5E2E lea r21, ptr [r22+rbx*2+0x2e] +XDIS 1faca: MISC BASE D5588D6C5F2F lea r21, ptr [r23+rbx*2+0x2f] +XDIS 1fad0: MISC BASE D5598D6C5830 lea r21, ptr [r24+rbx*2+0x30] +XDIS 1fad6: MISC BASE D5598D6C5931 lea r21, ptr [r25+rbx*2+0x31] +XDIS 1fadc: MISC BASE D5598D6C5A32 lea r21, ptr [r26+rbx*2+0x32] +XDIS 1fae2: MISC BASE D5598D6C5B33 lea r21, ptr [r27+rbx*2+0x33] +XDIS 1fae8: MISC BASE D5598D6C5C34 lea r21, ptr [r28+rbx*2+0x34] +XDIS 1faee: MISC BASE D5598D6C5D35 lea r21, ptr [r29+rbx*2+0x35] +XDIS 1faf4: MISC BASE D5598D6C5E36 lea r21, ptr [r30+rbx*2+0x36] +XDIS 1fafa: MISC BASE D5598D6C5F37 lea r21, ptr [r31+rbx*2+0x37] +XDIS 1fb00: MISC BASE D5488D6C6019 lea r21, ptr [rax+0x19] +XDIS 1fb06: MISC BASE D5488D6C611A lea r21, ptr [rcx+0x1a] +XDIS 1fb0c: MISC BASE D5488D6C621B lea r21, ptr [rdx+0x1b] +XDIS 1fb12: MISC BASE D5488D6C631C lea r21, ptr [rbx+0x1c] +XDIS 1fb18: MISC BASE D5488D6C641D lea r21, ptr [rsp+0x1d] +XDIS 1fb1e: MISC BASE D5488D6C651E lea r21, ptr [rbp+0x1e] +XDIS 1fb24: MISC BASE D5488D6C661F lea r21, ptr [rsi+0x1f] +XDIS 1fb2a: MISC BASE D5488D6C6720 lea r21, ptr [rdi+0x20] +XDIS 1fb30: MISC BASE D5498D6C6021 lea r21, ptr [r8+0x21] +XDIS 1fb36: MISC BASE D5498D6C6122 lea r21, ptr [r9+0x22] +XDIS 1fb3c: MISC BASE D5498D6C6223 lea r21, ptr [r10+0x23] +XDIS 1fb42: MISC BASE D5498D6C6324 lea r21, ptr [r11+0x24] +XDIS 1fb48: MISC BASE D5498D6C6425 lea r21, ptr [r12+0x25] +XDIS 1fb4e: MISC BASE D5498D6C6526 lea r21, ptr [r13+0x26] +XDIS 1fb54: MISC BASE D5498D6C6627 lea r21, ptr [r14+0x27] +XDIS 1fb5a: MISC BASE D5498D6C6728 lea r21, ptr [r15+0x28] +XDIS 1fb60: MISC BASE D5588D6C6029 lea r21, ptr [r16+0x29] +XDIS 1fb66: MISC BASE D5588D6C612A lea r21, ptr [r17+0x2a] +XDIS 1fb6c: MISC BASE D5588D6C622B lea r21, ptr [r18+0x2b] +XDIS 1fb72: MISC BASE D5588D6C632C lea r21, ptr [r19+0x2c] +XDIS 1fb78: MISC BASE D5588D6C642D lea r21, ptr [r20+0x2d] +XDIS 1fb7e: MISC BASE D5588D6C652E lea r21, ptr [r21+0x2e] +XDIS 1fb84: MISC BASE D5588D6C662F lea r21, ptr [r22+0x2f] +XDIS 1fb8a: MISC BASE D5588D6C6730 lea r21, ptr [r23+0x30] +XDIS 1fb90: MISC BASE D5598D6C6031 lea r21, ptr [r24+0x31] +XDIS 1fb96: MISC BASE D5598D6C6132 lea r21, ptr [r25+0x32] +XDIS 1fb9c: MISC BASE D5598D6C6233 lea r21, ptr [r26+0x33] +XDIS 1fba2: MISC BASE D5598D6C6334 lea r21, ptr [r27+0x34] +XDIS 1fba8: MISC BASE D5598D6C6435 lea r21, ptr [r28+0x35] +XDIS 1fbae: MISC BASE D5598D6C6536 lea r21, ptr [r29+0x36] +XDIS 1fbb4: MISC BASE D5598D6C6637 lea r21, ptr [r30+0x37] +XDIS 1fbba: MISC BASE D5598D6C6738 lea r21, ptr [r31+0x38] +XDIS 1fbc0: MISC BASE D5488D6C681A lea r21, ptr [rax+rbp*2+0x1a] +XDIS 1fbc6: MISC BASE D5488D6C691B lea r21, ptr [rcx+rbp*2+0x1b] +XDIS 1fbcc: MISC BASE D5488D6C6A1C lea r21, ptr [rdx+rbp*2+0x1c] +XDIS 1fbd2: MISC BASE D5488D6C6B1D lea r21, ptr [rbx+rbp*2+0x1d] +XDIS 1fbd8: MISC BASE D5488D6C6C1E lea r21, ptr [rsp+rbp*2+0x1e] +XDIS 1fbde: MISC BASE D5488D6C6D1F lea r21, ptr [rbp+rbp*2+0x1f] +XDIS 1fbe4: MISC BASE D5488D6C6E20 lea r21, ptr [rsi+rbp*2+0x20] +XDIS 1fbea: MISC BASE D5488D6C6F21 lea r21, ptr [rdi+rbp*2+0x21] +XDIS 1fbf0: MISC BASE D5498D6C6822 lea r21, ptr [r8+rbp*2+0x22] +XDIS 1fbf6: MISC BASE D5498D6C6923 lea r21, ptr [r9+rbp*2+0x23] +XDIS 1fbfc: MISC BASE D5498D6C6A24 lea r21, ptr [r10+rbp*2+0x24] +XDIS 1fc02: MISC BASE D5498D6C6B25 lea r21, ptr [r11+rbp*2+0x25] +XDIS 1fc08: MISC BASE D5498D6C6C26 lea r21, ptr [r12+rbp*2+0x26] +XDIS 1fc0e: MISC BASE D5498D6C6D27 lea r21, ptr [r13+rbp*2+0x27] +XDIS 1fc14: MISC BASE D5498D6C6E28 lea r21, ptr [r14+rbp*2+0x28] +XDIS 1fc1a: MISC BASE D5498D6C6F29 lea r21, ptr [r15+rbp*2+0x29] +XDIS 1fc20: MISC BASE D5588D6C682A lea r21, ptr [r16+rbp*2+0x2a] +XDIS 1fc26: MISC BASE D5588D6C692B lea r21, ptr [r17+rbp*2+0x2b] +XDIS 1fc2c: MISC BASE D5588D6C6A2C lea r21, ptr [r18+rbp*2+0x2c] +XDIS 1fc32: MISC BASE D5588D6C6B2D lea r21, ptr [r19+rbp*2+0x2d] +XDIS 1fc38: MISC BASE D5588D6C6C2E lea r21, ptr [r20+rbp*2+0x2e] +XDIS 1fc3e: MISC BASE D5588D6C6D2F lea r21, ptr [r21+rbp*2+0x2f] +XDIS 1fc44: MISC BASE D5588D6C6E30 lea r21, ptr [r22+rbp*2+0x30] +XDIS 1fc4a: MISC BASE D5588D6C6F31 lea r21, ptr [r23+rbp*2+0x31] +XDIS 1fc50: MISC BASE D5598D6C6832 lea r21, ptr [r24+rbp*2+0x32] +XDIS 1fc56: MISC BASE D5598D6C6933 lea r21, ptr [r25+rbp*2+0x33] +XDIS 1fc5c: MISC BASE D5598D6C6A34 lea r21, ptr [r26+rbp*2+0x34] +XDIS 1fc62: MISC BASE D5598D6C6B35 lea r21, ptr [r27+rbp*2+0x35] +XDIS 1fc68: MISC BASE D5598D6C6C36 lea r21, ptr [r28+rbp*2+0x36] +XDIS 1fc6e: MISC BASE D5598D6C6D37 lea r21, ptr [r29+rbp*2+0x37] +XDIS 1fc74: MISC BASE D5598D6C6E38 lea r21, ptr [r30+rbp*2+0x38] +XDIS 1fc7a: MISC BASE D5598D6C6F39 lea r21, ptr [r31+rbp*2+0x39] +XDIS 1fc80: MISC BASE D5488D6C701B lea r21, ptr [rax+rsi*2+0x1b] +XDIS 1fc86: MISC BASE D5488D6C711C lea r21, ptr [rcx+rsi*2+0x1c] +XDIS 1fc8c: MISC BASE D5488D6C721D lea r21, ptr [rdx+rsi*2+0x1d] +XDIS 1fc92: MISC BASE D5488D6C731E lea r21, ptr [rbx+rsi*2+0x1e] +XDIS 1fc98: MISC BASE D5488D6C741F lea r21, ptr [rsp+rsi*2+0x1f] +XDIS 1fc9e: MISC BASE D5488D6C7520 lea r21, ptr [rbp+rsi*2+0x20] +XDIS 1fca4: MISC BASE D5488D6C7621 lea r21, ptr [rsi+rsi*2+0x21] +XDIS 1fcaa: MISC BASE D5488D6C7722 lea r21, ptr [rdi+rsi*2+0x22] +XDIS 1fcb0: MISC BASE D5498D6C7023 lea r21, ptr [r8+rsi*2+0x23] +XDIS 1fcb6: MISC BASE D5498D6C7124 lea r21, ptr [r9+rsi*2+0x24] +XDIS 1fcbc: MISC BASE D5498D6C7225 lea r21, ptr [r10+rsi*2+0x25] +XDIS 1fcc2: MISC BASE D5498D6C7326 lea r21, ptr [r11+rsi*2+0x26] +XDIS 1fcc8: MISC BASE D5498D6C7427 lea r21, ptr [r12+rsi*2+0x27] +XDIS 1fcce: MISC BASE D5498D6C7528 lea r21, ptr [r13+rsi*2+0x28] +XDIS 1fcd4: MISC BASE D5498D6C7629 lea r21, ptr [r14+rsi*2+0x29] +XDIS 1fcda: MISC BASE D5498D6C772A lea r21, ptr [r15+rsi*2+0x2a] +XDIS 1fce0: MISC BASE D5588D6C702B lea r21, ptr [r16+rsi*2+0x2b] +XDIS 1fce6: MISC BASE D5588D6C712C lea r21, ptr [r17+rsi*2+0x2c] +XDIS 1fcec: MISC BASE D5588D6C722D lea r21, ptr [r18+rsi*2+0x2d] +XDIS 1fcf2: MISC BASE D5588D6C732E lea r21, ptr [r19+rsi*2+0x2e] +XDIS 1fcf8: MISC BASE D5588D6C742F lea r21, ptr [r20+rsi*2+0x2f] +XDIS 1fcfe: MISC BASE D5588D6C7530 lea r21, ptr [r21+rsi*2+0x30] +XDIS 1fd04: MISC BASE D5588D6C7631 lea r21, ptr [r22+rsi*2+0x31] +XDIS 1fd0a: MISC BASE D5588D6C7732 lea r21, ptr [r23+rsi*2+0x32] +XDIS 1fd10: MISC BASE D5598D6C7033 lea r21, ptr [r24+rsi*2+0x33] +XDIS 1fd16: MISC BASE D5598D6C7134 lea r21, ptr [r25+rsi*2+0x34] +XDIS 1fd1c: MISC BASE D5598D6C7235 lea r21, ptr [r26+rsi*2+0x35] +XDIS 1fd22: MISC BASE D5598D6C7336 lea r21, ptr [r27+rsi*2+0x36] +XDIS 1fd28: MISC BASE D5598D6C7437 lea r21, ptr [r28+rsi*2+0x37] +XDIS 1fd2e: MISC BASE D5598D6C7538 lea r21, ptr [r29+rsi*2+0x38] +XDIS 1fd34: MISC BASE D5598D6C7639 lea r21, ptr [r30+rsi*2+0x39] +XDIS 1fd3a: MISC BASE D5598D6C773A lea r21, ptr [r31+rsi*2+0x3a] +XDIS 1fd40: MISC BASE D5488D6C781C lea r21, ptr [rax+rdi*2+0x1c] +XDIS 1fd46: MISC BASE D5488D6C791D lea r21, ptr [rcx+rdi*2+0x1d] +XDIS 1fd4c: MISC BASE D5488D6C7A1E lea r21, ptr [rdx+rdi*2+0x1e] +XDIS 1fd52: MISC BASE D5488D6C7B1F lea r21, ptr [rbx+rdi*2+0x1f] +XDIS 1fd58: MISC BASE D5488D6C7C20 lea r21, ptr [rsp+rdi*2+0x20] +XDIS 1fd5e: MISC BASE D5488D6C7D21 lea r21, ptr [rbp+rdi*2+0x21] +XDIS 1fd64: MISC BASE D5488D6C7E22 lea r21, ptr [rsi+rdi*2+0x22] +XDIS 1fd6a: MISC BASE D5488D6C7F23 lea r21, ptr [rdi+rdi*2+0x23] +XDIS 1fd70: MISC BASE D5498D6C7824 lea r21, ptr [r8+rdi*2+0x24] +XDIS 1fd76: MISC BASE D5498D6C7925 lea r21, ptr [r9+rdi*2+0x25] +XDIS 1fd7c: MISC BASE D5498D6C7A26 lea r21, ptr [r10+rdi*2+0x26] +XDIS 1fd82: MISC BASE D5498D6C7B27 lea r21, ptr [r11+rdi*2+0x27] +XDIS 1fd88: MISC BASE D5498D6C7C28 lea r21, ptr [r12+rdi*2+0x28] +XDIS 1fd8e: MISC BASE D5498D6C7D29 lea r21, ptr [r13+rdi*2+0x29] +XDIS 1fd94: MISC BASE D5498D6C7E2A lea r21, ptr [r14+rdi*2+0x2a] +XDIS 1fd9a: MISC BASE D5498D6C7F2B lea r21, ptr [r15+rdi*2+0x2b] +XDIS 1fda0: MISC BASE D5588D6C782C lea r21, ptr [r16+rdi*2+0x2c] +XDIS 1fda6: MISC BASE D5588D6C792D lea r21, ptr [r17+rdi*2+0x2d] +XDIS 1fdac: MISC BASE D5588D6C7A2E lea r21, ptr [r18+rdi*2+0x2e] +XDIS 1fdb2: MISC BASE D5588D6C7B2F lea r21, ptr [r19+rdi*2+0x2f] +XDIS 1fdb8: MISC BASE D5588D6C7C30 lea r21, ptr [r20+rdi*2+0x30] +XDIS 1fdbe: MISC BASE D5588D6C7D31 lea r21, ptr [r21+rdi*2+0x31] +XDIS 1fdc4: MISC BASE D5588D6C7E32 lea r21, ptr [r22+rdi*2+0x32] +XDIS 1fdca: MISC BASE D5588D6C7F33 lea r21, ptr [r23+rdi*2+0x33] +XDIS 1fdd0: MISC BASE D5598D6C7834 lea r21, ptr [r24+rdi*2+0x34] +XDIS 1fdd6: MISC BASE D5598D6C7935 lea r21, ptr [r25+rdi*2+0x35] +XDIS 1fddc: MISC BASE D5598D6C7A36 lea r21, ptr [r26+rdi*2+0x36] +XDIS 1fde2: MISC BASE D5598D6C7B37 lea r21, ptr [r27+rdi*2+0x37] +XDIS 1fde8: MISC BASE D5598D6C7C38 lea r21, ptr [r28+rdi*2+0x38] +XDIS 1fdee: MISC BASE D5598D6C7D39 lea r21, ptr [r29+rdi*2+0x39] +XDIS 1fdf4: MISC BASE D5598D6C7E3A lea r21, ptr [r30+rdi*2+0x3a] +XDIS 1fdfa: MISC BASE D5598D6C7F3B lea r21, ptr [r31+rdi*2+0x3b] +XDIS 1fe00: MISC BASE D54A8D6C401D lea r21, ptr [rax+r8*2+0x1d] +XDIS 1fe06: MISC BASE D54A8D6C411E lea r21, ptr [rcx+r8*2+0x1e] +XDIS 1fe0c: MISC BASE D54A8D6C421F lea r21, ptr [rdx+r8*2+0x1f] +XDIS 1fe12: MISC BASE D54A8D6C4320 lea r21, ptr [rbx+r8*2+0x20] +XDIS 1fe18: MISC BASE D54A8D6C4421 lea r21, ptr [rsp+r8*2+0x21] +XDIS 1fe1e: MISC BASE D54A8D6C4522 lea r21, ptr [rbp+r8*2+0x22] +XDIS 1fe24: MISC BASE D54A8D6C4623 lea r21, ptr [rsi+r8*2+0x23] +XDIS 1fe2a: MISC BASE D54A8D6C4724 lea r21, ptr [rdi+r8*2+0x24] +XDIS 1fe30: MISC BASE D54B8D6C4025 lea r21, ptr [r8+r8*2+0x25] +XDIS 1fe36: MISC BASE D54B8D6C4126 lea r21, ptr [r9+r8*2+0x26] +XDIS 1fe3c: MISC BASE D54B8D6C4227 lea r21, ptr [r10+r8*2+0x27] +XDIS 1fe42: MISC BASE D54B8D6C4328 lea r21, ptr [r11+r8*2+0x28] +XDIS 1fe48: MISC BASE D54B8D6C4429 lea r21, ptr [r12+r8*2+0x29] +XDIS 1fe4e: MISC BASE D54B8D6C452A lea r21, ptr [r13+r8*2+0x2a] +XDIS 1fe54: MISC BASE D54B8D6C462B lea r21, ptr [r14+r8*2+0x2b] +XDIS 1fe5a: MISC BASE D54B8D6C472C lea r21, ptr [r15+r8*2+0x2c] +XDIS 1fe60: MISC BASE D55A8D6C402D lea r21, ptr [r16+r8*2+0x2d] +XDIS 1fe66: MISC BASE D55A8D6C412E lea r21, ptr [r17+r8*2+0x2e] +XDIS 1fe6c: MISC BASE D55A8D6C422F lea r21, ptr [r18+r8*2+0x2f] +XDIS 1fe72: MISC BASE D55A8D6C4330 lea r21, ptr [r19+r8*2+0x30] +XDIS 1fe78: MISC BASE D55A8D6C4431 lea r21, ptr [r20+r8*2+0x31] +XDIS 1fe7e: MISC BASE D55A8D6C4532 lea r21, ptr [r21+r8*2+0x32] +XDIS 1fe84: MISC BASE D55A8D6C4633 lea r21, ptr [r22+r8*2+0x33] +XDIS 1fe8a: MISC BASE D55A8D6C4734 lea r21, ptr [r23+r8*2+0x34] +XDIS 1fe90: MISC BASE D55B8D6C4035 lea r21, ptr [r24+r8*2+0x35] +XDIS 1fe96: MISC BASE D55B8D6C4136 lea r21, ptr [r25+r8*2+0x36] +XDIS 1fe9c: MISC BASE D55B8D6C4237 lea r21, ptr [r26+r8*2+0x37] +XDIS 1fea2: MISC BASE D55B8D6C4338 lea r21, ptr [r27+r8*2+0x38] +XDIS 1fea8: MISC BASE D55B8D6C4439 lea r21, ptr [r28+r8*2+0x39] +XDIS 1feae: MISC BASE D55B8D6C453A lea r21, ptr [r29+r8*2+0x3a] +XDIS 1feb4: MISC BASE D55B8D6C463B lea r21, ptr [r30+r8*2+0x3b] +XDIS 1feba: MISC BASE D55B8D6C473C lea r21, ptr [r31+r8*2+0x3c] +XDIS 1fec0: MISC BASE D54A8D6C481E lea r21, ptr [rax+r9*2+0x1e] +XDIS 1fec6: MISC BASE D54A8D6C491F lea r21, ptr [rcx+r9*2+0x1f] +XDIS 1fecc: MISC BASE D54A8D6C4A20 lea r21, ptr [rdx+r9*2+0x20] +XDIS 1fed2: MISC BASE D54A8D6C4B21 lea r21, ptr [rbx+r9*2+0x21] +XDIS 1fed8: MISC BASE D54A8D6C4C22 lea r21, ptr [rsp+r9*2+0x22] +XDIS 1fede: MISC BASE D54A8D6C4D23 lea r21, ptr [rbp+r9*2+0x23] +XDIS 1fee4: MISC BASE D54A8D6C4E24 lea r21, ptr [rsi+r9*2+0x24] +XDIS 1feea: MISC BASE D54A8D6C4F25 lea r21, ptr [rdi+r9*2+0x25] +XDIS 1fef0: MISC BASE D54B8D6C4826 lea r21, ptr [r8+r9*2+0x26] +XDIS 1fef6: MISC BASE D54B8D6C4927 lea r21, ptr [r9+r9*2+0x27] +XDIS 1fefc: MISC BASE D54B8D6C4A28 lea r21, ptr [r10+r9*2+0x28] +XDIS 1ff02: MISC BASE D54B8D6C4B29 lea r21, ptr [r11+r9*2+0x29] +XDIS 1ff08: MISC BASE D54B8D6C4C2A lea r21, ptr [r12+r9*2+0x2a] +XDIS 1ff0e: MISC BASE D54B8D6C4D2B lea r21, ptr [r13+r9*2+0x2b] +XDIS 1ff14: MISC BASE D54B8D6C4E2C lea r21, ptr [r14+r9*2+0x2c] +XDIS 1ff1a: MISC BASE D54B8D6C4F2D lea r21, ptr [r15+r9*2+0x2d] +XDIS 1ff20: MISC BASE D55A8D6C482E lea r21, ptr [r16+r9*2+0x2e] +XDIS 1ff26: MISC BASE D55A8D6C492F lea r21, ptr [r17+r9*2+0x2f] +XDIS 1ff2c: MISC BASE D55A8D6C4A30 lea r21, ptr [r18+r9*2+0x30] +XDIS 1ff32: MISC BASE D55A8D6C4B31 lea r21, ptr [r19+r9*2+0x31] +XDIS 1ff38: MISC BASE D55A8D6C4C32 lea r21, ptr [r20+r9*2+0x32] +XDIS 1ff3e: MISC BASE D55A8D6C4D33 lea r21, ptr [r21+r9*2+0x33] +XDIS 1ff44: MISC BASE D55A8D6C4E34 lea r21, ptr [r22+r9*2+0x34] +XDIS 1ff4a: MISC BASE D55A8D6C4F35 lea r21, ptr [r23+r9*2+0x35] +XDIS 1ff50: MISC BASE D55B8D6C4836 lea r21, ptr [r24+r9*2+0x36] +XDIS 1ff56: MISC BASE D55B8D6C4937 lea r21, ptr [r25+r9*2+0x37] +XDIS 1ff5c: MISC BASE D55B8D6C4A38 lea r21, ptr [r26+r9*2+0x38] +XDIS 1ff62: MISC BASE D55B8D6C4B39 lea r21, ptr [r27+r9*2+0x39] +XDIS 1ff68: MISC BASE D55B8D6C4C3A lea r21, ptr [r28+r9*2+0x3a] +XDIS 1ff6e: MISC BASE D55B8D6C4D3B lea r21, ptr [r29+r9*2+0x3b] +XDIS 1ff74: MISC BASE D55B8D6C4E3C lea r21, ptr [r30+r9*2+0x3c] +XDIS 1ff7a: MISC BASE D55B8D6C4F3D lea r21, ptr [r31+r9*2+0x3d] +XDIS 1ff80: MISC BASE D54A8D6C501F lea r21, ptr [rax+r10*2+0x1f] +XDIS 1ff86: MISC BASE D54A8D6C5120 lea r21, ptr [rcx+r10*2+0x20] +XDIS 1ff8c: MISC BASE D54A8D6C5221 lea r21, ptr [rdx+r10*2+0x21] +XDIS 1ff92: MISC BASE D54A8D6C5322 lea r21, ptr [rbx+r10*2+0x22] +XDIS 1ff98: MISC BASE D54A8D6C5423 lea r21, ptr [rsp+r10*2+0x23] +XDIS 1ff9e: MISC BASE D54A8D6C5524 lea r21, ptr [rbp+r10*2+0x24] +XDIS 1ffa4: MISC BASE D54A8D6C5625 lea r21, ptr [rsi+r10*2+0x25] +XDIS 1ffaa: MISC BASE D54A8D6C5726 lea r21, ptr [rdi+r10*2+0x26] +XDIS 1ffb0: MISC BASE D54B8D6C5027 lea r21, ptr [r8+r10*2+0x27] +XDIS 1ffb6: MISC BASE D54B8D6C5128 lea r21, ptr [r9+r10*2+0x28] +XDIS 1ffbc: MISC BASE D54B8D6C5229 lea r21, ptr [r10+r10*2+0x29] +XDIS 1ffc2: MISC BASE D54B8D6C532A lea r21, ptr [r11+r10*2+0x2a] +XDIS 1ffc8: MISC BASE D54B8D6C542B lea r21, ptr [r12+r10*2+0x2b] +XDIS 1ffce: MISC BASE D54B8D6C552C lea r21, ptr [r13+r10*2+0x2c] +XDIS 1ffd4: MISC BASE D54B8D6C562D lea r21, ptr [r14+r10*2+0x2d] +XDIS 1ffda: MISC BASE D54B8D6C572E lea r21, ptr [r15+r10*2+0x2e] +XDIS 1ffe0: MISC BASE D55A8D6C502F lea r21, ptr [r16+r10*2+0x2f] +XDIS 1ffe6: MISC BASE D55A8D6C5130 lea r21, ptr [r17+r10*2+0x30] +XDIS 1ffec: MISC BASE D55A8D6C5231 lea r21, ptr [r18+r10*2+0x31] +XDIS 1fff2: MISC BASE D55A8D6C5332 lea r21, ptr [r19+r10*2+0x32] +XDIS 1fff8: MISC BASE D55A8D6C5433 lea r21, ptr [r20+r10*2+0x33] +XDIS 1fffe: MISC BASE D55A8D6C5534 lea r21, ptr [r21+r10*2+0x34] +XDIS 20004: MISC BASE D55A8D6C5635 lea r21, ptr [r22+r10*2+0x35] +XDIS 2000a: MISC BASE D55A8D6C5736 lea r21, ptr [r23+r10*2+0x36] +XDIS 20010: MISC BASE D55B8D6C5037 lea r21, ptr [r24+r10*2+0x37] +XDIS 20016: MISC BASE D55B8D6C5138 lea r21, ptr [r25+r10*2+0x38] +XDIS 2001c: MISC BASE D55B8D6C5239 lea r21, ptr [r26+r10*2+0x39] +XDIS 20022: MISC BASE D55B8D6C533A lea r21, ptr [r27+r10*2+0x3a] +XDIS 20028: MISC BASE D55B8D6C543B lea r21, ptr [r28+r10*2+0x3b] +XDIS 2002e: MISC BASE D55B8D6C553C lea r21, ptr [r29+r10*2+0x3c] +XDIS 20034: MISC BASE D55B8D6C563D lea r21, ptr [r30+r10*2+0x3d] +XDIS 2003a: MISC BASE D55B8D6C573E lea r21, ptr [r31+r10*2+0x3e] +XDIS 20040: MISC BASE D54A8D6C5820 lea r21, ptr [rax+r11*2+0x20] +XDIS 20046: MISC BASE D54A8D6C5921 lea r21, ptr [rcx+r11*2+0x21] +XDIS 2004c: MISC BASE D54A8D6C5A22 lea r21, ptr [rdx+r11*2+0x22] +XDIS 20052: MISC BASE D54A8D6C5B23 lea r21, ptr [rbx+r11*2+0x23] +XDIS 20058: MISC BASE D54A8D6C5C24 lea r21, ptr [rsp+r11*2+0x24] +XDIS 2005e: MISC BASE D54A8D6C5D25 lea r21, ptr [rbp+r11*2+0x25] +XDIS 20064: MISC BASE D54A8D6C5E26 lea r21, ptr [rsi+r11*2+0x26] +XDIS 2006a: MISC BASE D54A8D6C5F27 lea r21, ptr [rdi+r11*2+0x27] +XDIS 20070: MISC BASE D54B8D6C5828 lea r21, ptr [r8+r11*2+0x28] +XDIS 20076: MISC BASE D54B8D6C5929 lea r21, ptr [r9+r11*2+0x29] +XDIS 2007c: MISC BASE D54B8D6C5A2A lea r21, ptr [r10+r11*2+0x2a] +XDIS 20082: MISC BASE D54B8D6C5B2B lea r21, ptr [r11+r11*2+0x2b] +XDIS 20088: MISC BASE D54B8D6C5C2C lea r21, ptr [r12+r11*2+0x2c] +XDIS 2008e: MISC BASE D54B8D6C5D2D lea r21, ptr [r13+r11*2+0x2d] +XDIS 20094: MISC BASE D54B8D6C5E2E lea r21, ptr [r14+r11*2+0x2e] +XDIS 2009a: MISC BASE D54B8D6C5F2F lea r21, ptr [r15+r11*2+0x2f] +XDIS 200a0: MISC BASE D55A8D6C5830 lea r21, ptr [r16+r11*2+0x30] +XDIS 200a6: MISC BASE D55A8D6C5931 lea r21, ptr [r17+r11*2+0x31] +XDIS 200ac: MISC BASE D55A8D6C5A32 lea r21, ptr [r18+r11*2+0x32] +XDIS 200b2: MISC BASE D55A8D6C5B33 lea r21, ptr [r19+r11*2+0x33] +XDIS 200b8: MISC BASE D55A8D6C5C34 lea r21, ptr [r20+r11*2+0x34] +XDIS 200be: MISC BASE D55A8D6C5D35 lea r21, ptr [r21+r11*2+0x35] +XDIS 200c4: MISC BASE D55A8D6C5E36 lea r21, ptr [r22+r11*2+0x36] +XDIS 200ca: MISC BASE D55A8D6C5F37 lea r21, ptr [r23+r11*2+0x37] +XDIS 200d0: MISC BASE D55B8D6C5838 lea r21, ptr [r24+r11*2+0x38] +XDIS 200d6: MISC BASE D55B8D6C5939 lea r21, ptr [r25+r11*2+0x39] +XDIS 200dc: MISC BASE D55B8D6C5A3A lea r21, ptr [r26+r11*2+0x3a] +XDIS 200e2: MISC BASE D55B8D6C5B3B lea r21, ptr [r27+r11*2+0x3b] +XDIS 200e8: MISC BASE D55B8D6C5C3C lea r21, ptr [r28+r11*2+0x3c] +XDIS 200ee: MISC BASE D55B8D6C5D3D lea r21, ptr [r29+r11*2+0x3d] +XDIS 200f4: MISC BASE D55B8D6C5E3E lea r21, ptr [r30+r11*2+0x3e] +XDIS 200fa: MISC BASE D55B8D6C5F3F lea r21, ptr [r31+r11*2+0x3f] +XDIS 20100: MISC BASE D54A8D6C6021 lea r21, ptr [rax+r12*2+0x21] +XDIS 20106: MISC BASE D54A8D6C6122 lea r21, ptr [rcx+r12*2+0x22] +XDIS 2010c: MISC BASE D54A8D6C6223 lea r21, ptr [rdx+r12*2+0x23] +XDIS 20112: MISC BASE D54A8D6C6324 lea r21, ptr [rbx+r12*2+0x24] +XDIS 20118: MISC BASE D54A8D6C6425 lea r21, ptr [rsp+r12*2+0x25] +XDIS 2011e: MISC BASE D54A8D6C6526 lea r21, ptr [rbp+r12*2+0x26] +XDIS 20124: MISC BASE D54A8D6C6627 lea r21, ptr [rsi+r12*2+0x27] +XDIS 2012a: MISC BASE D54A8D6C6728 lea r21, ptr [rdi+r12*2+0x28] +XDIS 20130: MISC BASE D54B8D6C6029 lea r21, ptr [r8+r12*2+0x29] +XDIS 20136: MISC BASE D54B8D6C612A lea r21, ptr [r9+r12*2+0x2a] +XDIS 2013c: MISC BASE D54B8D6C622B lea r21, ptr [r10+r12*2+0x2b] +XDIS 20142: MISC BASE D54B8D6C632C lea r21, ptr [r11+r12*2+0x2c] +XDIS 20148: MISC BASE D54B8D6C642D lea r21, ptr [r12+r12*2+0x2d] +XDIS 2014e: MISC BASE D54B8D6C652E lea r21, ptr [r13+r12*2+0x2e] +XDIS 20154: MISC BASE D54B8D6C662F lea r21, ptr [r14+r12*2+0x2f] +XDIS 2015a: MISC BASE D54B8D6C6730 lea r21, ptr [r15+r12*2+0x30] +XDIS 20160: MISC BASE D55A8D6C6031 lea r21, ptr [r16+r12*2+0x31] +XDIS 20166: MISC BASE D55A8D6C6132 lea r21, ptr [r17+r12*2+0x32] +XDIS 2016c: MISC BASE D55A8D6C6233 lea r21, ptr [r18+r12*2+0x33] +XDIS 20172: MISC BASE D55A8D6C6334 lea r21, ptr [r19+r12*2+0x34] +XDIS 20178: MISC BASE D55A8D6C6435 lea r21, ptr [r20+r12*2+0x35] +XDIS 2017e: MISC BASE D55A8D6C6536 lea r21, ptr [r21+r12*2+0x36] +XDIS 20184: MISC BASE D55A8D6C6637 lea r21, ptr [r22+r12*2+0x37] +XDIS 2018a: MISC BASE D55A8D6C6738 lea r21, ptr [r23+r12*2+0x38] +XDIS 20190: MISC BASE D55B8D6C6039 lea r21, ptr [r24+r12*2+0x39] +XDIS 20196: MISC BASE D55B8D6C613A lea r21, ptr [r25+r12*2+0x3a] +XDIS 2019c: MISC BASE D55B8D6C623B lea r21, ptr [r26+r12*2+0x3b] +XDIS 201a2: MISC BASE D55B8D6C633C lea r21, ptr [r27+r12*2+0x3c] +XDIS 201a8: MISC BASE D55B8D6C643D lea r21, ptr [r28+r12*2+0x3d] +XDIS 201ae: MISC BASE D55B8D6C653E lea r21, ptr [r29+r12*2+0x3e] +XDIS 201b4: MISC BASE D55B8D6C663F lea r21, ptr [r30+r12*2+0x3f] +XDIS 201ba: MISC BASE D55B8D6C6740 lea r21, ptr [r31+r12*2+0x40] +XDIS 201c0: MISC BASE D54A8D6C6822 lea r21, ptr [rax+r13*2+0x22] +XDIS 201c6: MISC BASE D54A8D6C6923 lea r21, ptr [rcx+r13*2+0x23] +XDIS 201cc: MISC BASE D54A8D6C6A24 lea r21, ptr [rdx+r13*2+0x24] +XDIS 201d2: MISC BASE D54A8D6C6B25 lea r21, ptr [rbx+r13*2+0x25] +XDIS 201d8: MISC BASE D54A8D6C6C26 lea r21, ptr [rsp+r13*2+0x26] +XDIS 201de: MISC BASE D54A8D6C6D27 lea r21, ptr [rbp+r13*2+0x27] +XDIS 201e4: MISC BASE D54A8D6C6E28 lea r21, ptr [rsi+r13*2+0x28] +XDIS 201ea: MISC BASE D54A8D6C6F29 lea r21, ptr [rdi+r13*2+0x29] +XDIS 201f0: MISC BASE D54B8D6C682A lea r21, ptr [r8+r13*2+0x2a] +XDIS 201f6: MISC BASE D54B8D6C692B lea r21, ptr [r9+r13*2+0x2b] +XDIS 201fc: MISC BASE D54B8D6C6A2C lea r21, ptr [r10+r13*2+0x2c] +XDIS 20202: MISC BASE D54B8D6C6B2D lea r21, ptr [r11+r13*2+0x2d] +XDIS 20208: MISC BASE D54B8D6C6C2E lea r21, ptr [r12+r13*2+0x2e] +XDIS 2020e: MISC BASE D54B8D6C6D2F lea r21, ptr [r13+r13*2+0x2f] +XDIS 20214: MISC BASE D54B8D6C6E30 lea r21, ptr [r14+r13*2+0x30] +XDIS 2021a: MISC BASE D54B8D6C6F31 lea r21, ptr [r15+r13*2+0x31] +XDIS 20220: MISC BASE D55A8D6C6832 lea r21, ptr [r16+r13*2+0x32] +XDIS 20226: MISC BASE D55A8D6C6933 lea r21, ptr [r17+r13*2+0x33] +XDIS 2022c: MISC BASE D55A8D6C6A34 lea r21, ptr [r18+r13*2+0x34] +XDIS 20232: MISC BASE D55A8D6C6B35 lea r21, ptr [r19+r13*2+0x35] +XDIS 20238: MISC BASE D55A8D6C6C36 lea r21, ptr [r20+r13*2+0x36] +XDIS 2023e: MISC BASE D55A8D6C6D37 lea r21, ptr [r21+r13*2+0x37] +XDIS 20244: MISC BASE D55A8D6C6E38 lea r21, ptr [r22+r13*2+0x38] +XDIS 2024a: MISC BASE D55A8D6C6F39 lea r21, ptr [r23+r13*2+0x39] +XDIS 20250: MISC BASE D55B8D6C683A lea r21, ptr [r24+r13*2+0x3a] +XDIS 20256: MISC BASE D55B8D6C693B lea r21, ptr [r25+r13*2+0x3b] +XDIS 2025c: MISC BASE D55B8D6C6A3C lea r21, ptr [r26+r13*2+0x3c] +XDIS 20262: MISC BASE D55B8D6C6B3D lea r21, ptr [r27+r13*2+0x3d] +XDIS 20268: MISC BASE D55B8D6C6C3E lea r21, ptr [r28+r13*2+0x3e] +XDIS 2026e: MISC BASE D55B8D6C6D3F lea r21, ptr [r29+r13*2+0x3f] +XDIS 20274: MISC BASE D55B8D6C6E40 lea r21, ptr [r30+r13*2+0x40] +XDIS 2027a: MISC BASE D55B8D6C6F41 lea r21, ptr [r31+r13*2+0x41] +XDIS 20280: MISC BASE D54A8D6C7023 lea r21, ptr [rax+r14*2+0x23] +XDIS 20286: MISC BASE D54A8D6C7124 lea r21, ptr [rcx+r14*2+0x24] +XDIS 2028c: MISC BASE D54A8D6C7225 lea r21, ptr [rdx+r14*2+0x25] +XDIS 20292: MISC BASE D54A8D6C7326 lea r21, ptr [rbx+r14*2+0x26] +XDIS 20298: MISC BASE D54A8D6C7427 lea r21, ptr [rsp+r14*2+0x27] +XDIS 2029e: MISC BASE D54A8D6C7528 lea r21, ptr [rbp+r14*2+0x28] +XDIS 202a4: MISC BASE D54A8D6C7629 lea r21, ptr [rsi+r14*2+0x29] +XDIS 202aa: MISC BASE D54A8D6C772A lea r21, ptr [rdi+r14*2+0x2a] +XDIS 202b0: MISC BASE D54B8D6C702B lea r21, ptr [r8+r14*2+0x2b] +XDIS 202b6: MISC BASE D54B8D6C712C lea r21, ptr [r9+r14*2+0x2c] +XDIS 202bc: MISC BASE D54B8D6C722D lea r21, ptr [r10+r14*2+0x2d] +XDIS 202c2: MISC BASE D54B8D6C732E lea r21, ptr [r11+r14*2+0x2e] +XDIS 202c8: MISC BASE D54B8D6C742F lea r21, ptr [r12+r14*2+0x2f] +XDIS 202ce: MISC BASE D54B8D6C7530 lea r21, ptr [r13+r14*2+0x30] +XDIS 202d4: MISC BASE D54B8D6C7631 lea r21, ptr [r14+r14*2+0x31] +XDIS 202da: MISC BASE D54B8D6C7732 lea r21, ptr [r15+r14*2+0x32] +XDIS 202e0: MISC BASE D55A8D6C7033 lea r21, ptr [r16+r14*2+0x33] +XDIS 202e6: MISC BASE D55A8D6C7134 lea r21, ptr [r17+r14*2+0x34] +XDIS 202ec: MISC BASE D55A8D6C7235 lea r21, ptr [r18+r14*2+0x35] +XDIS 202f2: MISC BASE D55A8D6C7336 lea r21, ptr [r19+r14*2+0x36] +XDIS 202f8: MISC BASE D55A8D6C7437 lea r21, ptr [r20+r14*2+0x37] +XDIS 202fe: MISC BASE D55A8D6C7538 lea r21, ptr [r21+r14*2+0x38] +XDIS 20304: MISC BASE D55A8D6C7639 lea r21, ptr [r22+r14*2+0x39] +XDIS 2030a: MISC BASE D55A8D6C773A lea r21, ptr [r23+r14*2+0x3a] +XDIS 20310: MISC BASE D55B8D6C703B lea r21, ptr [r24+r14*2+0x3b] +XDIS 20316: MISC BASE D55B8D6C713C lea r21, ptr [r25+r14*2+0x3c] +XDIS 2031c: MISC BASE D55B8D6C723D lea r21, ptr [r26+r14*2+0x3d] +XDIS 20322: MISC BASE D55B8D6C733E lea r21, ptr [r27+r14*2+0x3e] +XDIS 20328: MISC BASE D55B8D6C743F lea r21, ptr [r28+r14*2+0x3f] +XDIS 2032e: MISC BASE D55B8D6C7540 lea r21, ptr [r29+r14*2+0x40] +XDIS 20334: MISC BASE D55B8D6C7641 lea r21, ptr [r30+r14*2+0x41] +XDIS 2033a: MISC BASE D55B8D6C7742 lea r21, ptr [r31+r14*2+0x42] +XDIS 20340: MISC BASE D54A8D6C7824 lea r21, ptr [rax+r15*2+0x24] +XDIS 20346: MISC BASE D54A8D6C7925 lea r21, ptr [rcx+r15*2+0x25] +XDIS 2034c: MISC BASE D54A8D6C7A26 lea r21, ptr [rdx+r15*2+0x26] +XDIS 20352: MISC BASE D54A8D6C7B27 lea r21, ptr [rbx+r15*2+0x27] +XDIS 20358: MISC BASE D54A8D6C7C28 lea r21, ptr [rsp+r15*2+0x28] +XDIS 2035e: MISC BASE D54A8D6C7D29 lea r21, ptr [rbp+r15*2+0x29] +XDIS 20364: MISC BASE D54A8D6C7E2A lea r21, ptr [rsi+r15*2+0x2a] +XDIS 2036a: MISC BASE D54A8D6C7F2B lea r21, ptr [rdi+r15*2+0x2b] +XDIS 20370: MISC BASE D54B8D6C782C lea r21, ptr [r8+r15*2+0x2c] +XDIS 20376: MISC BASE D54B8D6C792D lea r21, ptr [r9+r15*2+0x2d] +XDIS 2037c: MISC BASE D54B8D6C7A2E lea r21, ptr [r10+r15*2+0x2e] +XDIS 20382: MISC BASE D54B8D6C7B2F lea r21, ptr [r11+r15*2+0x2f] +XDIS 20388: MISC BASE D54B8D6C7C30 lea r21, ptr [r12+r15*2+0x30] +XDIS 2038e: MISC BASE D54B8D6C7D31 lea r21, ptr [r13+r15*2+0x31] +XDIS 20394: MISC BASE D54B8D6C7E32 lea r21, ptr [r14+r15*2+0x32] +XDIS 2039a: MISC BASE D54B8D6C7F33 lea r21, ptr [r15+r15*2+0x33] +XDIS 203a0: MISC BASE D55A8D6C7834 lea r21, ptr [r16+r15*2+0x34] +XDIS 203a6: MISC BASE D55A8D6C7935 lea r21, ptr [r17+r15*2+0x35] +XDIS 203ac: MISC BASE D55A8D6C7A36 lea r21, ptr [r18+r15*2+0x36] +XDIS 203b2: MISC BASE D55A8D6C7B37 lea r21, ptr [r19+r15*2+0x37] +XDIS 203b8: MISC BASE D55A8D6C7C38 lea r21, ptr [r20+r15*2+0x38] +XDIS 203be: MISC BASE D55A8D6C7D39 lea r21, ptr [r21+r15*2+0x39] +XDIS 203c4: MISC BASE D55A8D6C7E3A lea r21, ptr [r22+r15*2+0x3a] +XDIS 203ca: MISC BASE D55A8D6C7F3B lea r21, ptr [r23+r15*2+0x3b] +XDIS 203d0: MISC BASE D55B8D6C783C lea r21, ptr [r24+r15*2+0x3c] +XDIS 203d6: MISC BASE D55B8D6C793D lea r21, ptr [r25+r15*2+0x3d] +XDIS 203dc: MISC BASE D55B8D6C7A3E lea r21, ptr [r26+r15*2+0x3e] +XDIS 203e2: MISC BASE D55B8D6C7B3F lea r21, ptr [r27+r15*2+0x3f] +XDIS 203e8: MISC BASE D55B8D6C7C40 lea r21, ptr [r28+r15*2+0x40] +XDIS 203ee: MISC BASE D55B8D6C7D41 lea r21, ptr [r29+r15*2+0x41] +XDIS 203f4: MISC BASE D55B8D6C7E42 lea r21, ptr [r30+r15*2+0x42] +XDIS 203fa: MISC BASE D55B8D6C7F43 lea r21, ptr [r31+r15*2+0x43] +XDIS 20400: MISC BASE D5688D6C4025 lea r21, ptr [rax+r16*2+0x25] +XDIS 20406: MISC BASE D5688D6C4126 lea r21, ptr [rcx+r16*2+0x26] +XDIS 2040c: MISC BASE D5688D6C4227 lea r21, ptr [rdx+r16*2+0x27] +XDIS 20412: MISC BASE D5688D6C4328 lea r21, ptr [rbx+r16*2+0x28] +XDIS 20418: MISC BASE D5688D6C4429 lea r21, ptr [rsp+r16*2+0x29] +XDIS 2041e: MISC BASE D5688D6C452A lea r21, ptr [rbp+r16*2+0x2a] +XDIS 20424: MISC BASE D5688D6C462B lea r21, ptr [rsi+r16*2+0x2b] +XDIS 2042a: MISC BASE D5688D6C472C lea r21, ptr [rdi+r16*2+0x2c] +XDIS 20430: MISC BASE D5698D6C402D lea r21, ptr [r8+r16*2+0x2d] +XDIS 20436: MISC BASE D5698D6C412E lea r21, ptr [r9+r16*2+0x2e] +XDIS 2043c: MISC BASE D5698D6C422F lea r21, ptr [r10+r16*2+0x2f] +XDIS 20442: MISC BASE D5698D6C4330 lea r21, ptr [r11+r16*2+0x30] +XDIS 20448: MISC BASE D5698D6C4431 lea r21, ptr [r12+r16*2+0x31] +XDIS 2044e: MISC BASE D5698D6C4532 lea r21, ptr [r13+r16*2+0x32] +XDIS 20454: MISC BASE D5698D6C4633 lea r21, ptr [r14+r16*2+0x33] +XDIS 2045a: MISC BASE D5698D6C4734 lea r21, ptr [r15+r16*2+0x34] +XDIS 20460: MISC BASE D5788D6C4035 lea r21, ptr [r16+r16*2+0x35] +XDIS 20466: MISC BASE D5788D6C4136 lea r21, ptr [r17+r16*2+0x36] +XDIS 2046c: MISC BASE D5788D6C4237 lea r21, ptr [r18+r16*2+0x37] +XDIS 20472: MISC BASE D5788D6C4338 lea r21, ptr [r19+r16*2+0x38] +XDIS 20478: MISC BASE D5788D6C4439 lea r21, ptr [r20+r16*2+0x39] +XDIS 2047e: MISC BASE D5788D6C453A lea r21, ptr [r21+r16*2+0x3a] +XDIS 20484: MISC BASE D5788D6C463B lea r21, ptr [r22+r16*2+0x3b] +XDIS 2048a: MISC BASE D5788D6C473C lea r21, ptr [r23+r16*2+0x3c] +XDIS 20490: MISC BASE D5798D6C403D lea r21, ptr [r24+r16*2+0x3d] +XDIS 20496: MISC BASE D5798D6C413E lea r21, ptr [r25+r16*2+0x3e] +XDIS 2049c: MISC BASE D5798D6C423F lea r21, ptr [r26+r16*2+0x3f] +XDIS 204a2: MISC BASE D5798D6C4340 lea r21, ptr [r27+r16*2+0x40] +XDIS 204a8: MISC BASE D5798D6C4441 lea r21, ptr [r28+r16*2+0x41] +XDIS 204ae: MISC BASE D5798D6C4542 lea r21, ptr [r29+r16*2+0x42] +XDIS 204b4: MISC BASE D5798D6C4643 lea r21, ptr [r30+r16*2+0x43] +XDIS 204ba: MISC BASE D5798D6C4744 lea r21, ptr [r31+r16*2+0x44] +XDIS 204c0: MISC BASE D5688D6C4826 lea r21, ptr [rax+r17*2+0x26] +XDIS 204c6: MISC BASE D5688D6C4927 lea r21, ptr [rcx+r17*2+0x27] +XDIS 204cc: MISC BASE D5688D6C4A28 lea r21, ptr [rdx+r17*2+0x28] +XDIS 204d2: MISC BASE D5688D6C4B29 lea r21, ptr [rbx+r17*2+0x29] +XDIS 204d8: MISC BASE D5688D6C4C2A lea r21, ptr [rsp+r17*2+0x2a] +XDIS 204de: MISC BASE D5688D6C4D2B lea r21, ptr [rbp+r17*2+0x2b] +XDIS 204e4: MISC BASE D5688D6C4E2C lea r21, ptr [rsi+r17*2+0x2c] +XDIS 204ea: MISC BASE D5688D6C4F2D lea r21, ptr [rdi+r17*2+0x2d] +XDIS 204f0: MISC BASE D5698D6C482E lea r21, ptr [r8+r17*2+0x2e] +XDIS 204f6: MISC BASE D5698D6C492F lea r21, ptr [r9+r17*2+0x2f] +XDIS 204fc: MISC BASE D5698D6C4A30 lea r21, ptr [r10+r17*2+0x30] +XDIS 20502: MISC BASE D5698D6C4B31 lea r21, ptr [r11+r17*2+0x31] +XDIS 20508: MISC BASE D5698D6C4C32 lea r21, ptr [r12+r17*2+0x32] +XDIS 2050e: MISC BASE D5698D6C4D33 lea r21, ptr [r13+r17*2+0x33] +XDIS 20514: MISC BASE D5698D6C4E34 lea r21, ptr [r14+r17*2+0x34] +XDIS 2051a: MISC BASE D5698D6C4F35 lea r21, ptr [r15+r17*2+0x35] +XDIS 20520: MISC BASE D5788D6C4836 lea r21, ptr [r16+r17*2+0x36] +XDIS 20526: MISC BASE D5788D6C4937 lea r21, ptr [r17+r17*2+0x37] +XDIS 2052c: MISC BASE D5788D6C4A38 lea r21, ptr [r18+r17*2+0x38] +XDIS 20532: MISC BASE D5788D6C4B39 lea r21, ptr [r19+r17*2+0x39] +XDIS 20538: MISC BASE D5788D6C4C3A lea r21, ptr [r20+r17*2+0x3a] +XDIS 2053e: MISC BASE D5788D6C4D3B lea r21, ptr [r21+r17*2+0x3b] +XDIS 20544: MISC BASE D5788D6C4E3C lea r21, ptr [r22+r17*2+0x3c] +XDIS 2054a: MISC BASE D5788D6C4F3D lea r21, ptr [r23+r17*2+0x3d] +XDIS 20550: MISC BASE D5798D6C483E lea r21, ptr [r24+r17*2+0x3e] +XDIS 20556: MISC BASE D5798D6C493F lea r21, ptr [r25+r17*2+0x3f] +XDIS 2055c: MISC BASE D5798D6C4A40 lea r21, ptr [r26+r17*2+0x40] +XDIS 20562: MISC BASE D5798D6C4B41 lea r21, ptr [r27+r17*2+0x41] +XDIS 20568: MISC BASE D5798D6C4C42 lea r21, ptr [r28+r17*2+0x42] +XDIS 2056e: MISC BASE D5798D6C4D43 lea r21, ptr [r29+r17*2+0x43] +XDIS 20574: MISC BASE D5798D6C4E44 lea r21, ptr [r30+r17*2+0x44] +XDIS 2057a: MISC BASE D5798D6C4F45 lea r21, ptr [r31+r17*2+0x45] +XDIS 20580: MISC BASE D5688D6C5027 lea r21, ptr [rax+r18*2+0x27] +XDIS 20586: MISC BASE D5688D6C5128 lea r21, ptr [rcx+r18*2+0x28] +XDIS 2058c: MISC BASE D5688D6C5229 lea r21, ptr [rdx+r18*2+0x29] +XDIS 20592: MISC BASE D5688D6C532A lea r21, ptr [rbx+r18*2+0x2a] +XDIS 20598: MISC BASE D5688D6C542B lea r21, ptr [rsp+r18*2+0x2b] +XDIS 2059e: MISC BASE D5688D6C552C lea r21, ptr [rbp+r18*2+0x2c] +XDIS 205a4: MISC BASE D5688D6C562D lea r21, ptr [rsi+r18*2+0x2d] +XDIS 205aa: MISC BASE D5688D6C572E lea r21, ptr [rdi+r18*2+0x2e] +XDIS 205b0: MISC BASE D5698D6C502F lea r21, ptr [r8+r18*2+0x2f] +XDIS 205b6: MISC BASE D5698D6C5130 lea r21, ptr [r9+r18*2+0x30] +XDIS 205bc: MISC BASE D5698D6C5231 lea r21, ptr [r10+r18*2+0x31] +XDIS 205c2: MISC BASE D5698D6C5332 lea r21, ptr [r11+r18*2+0x32] +XDIS 205c8: MISC BASE D5698D6C5433 lea r21, ptr [r12+r18*2+0x33] +XDIS 205ce: MISC BASE D5698D6C5534 lea r21, ptr [r13+r18*2+0x34] +XDIS 205d4: MISC BASE D5698D6C5635 lea r21, ptr [r14+r18*2+0x35] +XDIS 205da: MISC BASE D5698D6C5736 lea r21, ptr [r15+r18*2+0x36] +XDIS 205e0: MISC BASE D5788D6C5037 lea r21, ptr [r16+r18*2+0x37] +XDIS 205e6: MISC BASE D5788D6C5138 lea r21, ptr [r17+r18*2+0x38] +XDIS 205ec: MISC BASE D5788D6C5239 lea r21, ptr [r18+r18*2+0x39] +XDIS 205f2: MISC BASE D5788D6C533A lea r21, ptr [r19+r18*2+0x3a] +XDIS 205f8: MISC BASE D5788D6C543B lea r21, ptr [r20+r18*2+0x3b] +XDIS 205fe: MISC BASE D5788D6C553C lea r21, ptr [r21+r18*2+0x3c] +XDIS 20604: MISC BASE D5788D6C563D lea r21, ptr [r22+r18*2+0x3d] +XDIS 2060a: MISC BASE D5788D6C573E lea r21, ptr [r23+r18*2+0x3e] +XDIS 20610: MISC BASE D5798D6C503F lea r21, ptr [r24+r18*2+0x3f] +XDIS 20616: MISC BASE D5798D6C5140 lea r21, ptr [r25+r18*2+0x40] +XDIS 2061c: MISC BASE D5798D6C5241 lea r21, ptr [r26+r18*2+0x41] +XDIS 20622: MISC BASE D5798D6C5342 lea r21, ptr [r27+r18*2+0x42] +XDIS 20628: MISC BASE D5798D6C5443 lea r21, ptr [r28+r18*2+0x43] +XDIS 2062e: MISC BASE D5798D6C5544 lea r21, ptr [r29+r18*2+0x44] +XDIS 20634: MISC BASE D5798D6C5645 lea r21, ptr [r30+r18*2+0x45] +XDIS 2063a: MISC BASE D5798D6C5746 lea r21, ptr [r31+r18*2+0x46] +XDIS 20640: MISC BASE D5688D6C5828 lea r21, ptr [rax+r19*2+0x28] +XDIS 20646: MISC BASE D5688D6C5929 lea r21, ptr [rcx+r19*2+0x29] +XDIS 2064c: MISC BASE D5688D6C5A2A lea r21, ptr [rdx+r19*2+0x2a] +XDIS 20652: MISC BASE D5688D6C5B2B lea r21, ptr [rbx+r19*2+0x2b] +XDIS 20658: MISC BASE D5688D6C5C2C lea r21, ptr [rsp+r19*2+0x2c] +XDIS 2065e: MISC BASE D5688D6C5D2D lea r21, ptr [rbp+r19*2+0x2d] +XDIS 20664: MISC BASE D5688D6C5E2E lea r21, ptr [rsi+r19*2+0x2e] +XDIS 2066a: MISC BASE D5688D6C5F2F lea r21, ptr [rdi+r19*2+0x2f] +XDIS 20670: MISC BASE D5698D6C5830 lea r21, ptr [r8+r19*2+0x30] +XDIS 20676: MISC BASE D5698D6C5931 lea r21, ptr [r9+r19*2+0x31] +XDIS 2067c: MISC BASE D5698D6C5A32 lea r21, ptr [r10+r19*2+0x32] +XDIS 20682: MISC BASE D5698D6C5B33 lea r21, ptr [r11+r19*2+0x33] +XDIS 20688: MISC BASE D5698D6C5C34 lea r21, ptr [r12+r19*2+0x34] +XDIS 2068e: MISC BASE D5698D6C5D35 lea r21, ptr [r13+r19*2+0x35] +XDIS 20694: MISC BASE D5698D6C5E36 lea r21, ptr [r14+r19*2+0x36] +XDIS 2069a: MISC BASE D5698D6C5F37 lea r21, ptr [r15+r19*2+0x37] +XDIS 206a0: MISC BASE D5788D6C5838 lea r21, ptr [r16+r19*2+0x38] +XDIS 206a6: MISC BASE D5788D6C5939 lea r21, ptr [r17+r19*2+0x39] +XDIS 206ac: MISC BASE D5788D6C5A3A lea r21, ptr [r18+r19*2+0x3a] +XDIS 206b2: MISC BASE D5788D6C5B3B lea r21, ptr [r19+r19*2+0x3b] +XDIS 206b8: MISC BASE D5788D6C5C3C lea r21, ptr [r20+r19*2+0x3c] +XDIS 206be: MISC BASE D5788D6C5D3D lea r21, ptr [r21+r19*2+0x3d] +XDIS 206c4: MISC BASE D5788D6C5E3E lea r21, ptr [r22+r19*2+0x3e] +XDIS 206ca: MISC BASE D5788D6C5F3F lea r21, ptr [r23+r19*2+0x3f] +XDIS 206d0: MISC BASE D5798D6C5840 lea r21, ptr [r24+r19*2+0x40] +XDIS 206d6: MISC BASE D5798D6C5941 lea r21, ptr [r25+r19*2+0x41] +XDIS 206dc: MISC BASE D5798D6C5A42 lea r21, ptr [r26+r19*2+0x42] +XDIS 206e2: MISC BASE D5798D6C5B43 lea r21, ptr [r27+r19*2+0x43] +XDIS 206e8: MISC BASE D5798D6C5C44 lea r21, ptr [r28+r19*2+0x44] +XDIS 206ee: MISC BASE D5798D6C5D45 lea r21, ptr [r29+r19*2+0x45] +XDIS 206f4: MISC BASE D5798D6C5E46 lea r21, ptr [r30+r19*2+0x46] +XDIS 206fa: MISC BASE D5798D6C5F47 lea r21, ptr [r31+r19*2+0x47] +XDIS 20700: MISC BASE D5688D6C6029 lea r21, ptr [rax+r20*2+0x29] +XDIS 20706: MISC BASE D5688D6C612A lea r21, ptr [rcx+r20*2+0x2a] +XDIS 2070c: MISC BASE D5688D6C622B lea r21, ptr [rdx+r20*2+0x2b] +XDIS 20712: MISC BASE D5688D6C632C lea r21, ptr [rbx+r20*2+0x2c] +XDIS 20718: MISC BASE D5688D6C642D lea r21, ptr [rsp+r20*2+0x2d] +XDIS 2071e: MISC BASE D5688D6C652E lea r21, ptr [rbp+r20*2+0x2e] +XDIS 20724: MISC BASE D5688D6C662F lea r21, ptr [rsi+r20*2+0x2f] +XDIS 2072a: MISC BASE D5688D6C6730 lea r21, ptr [rdi+r20*2+0x30] +XDIS 20730: MISC BASE D5698D6C6031 lea r21, ptr [r8+r20*2+0x31] +XDIS 20736: MISC BASE D5698D6C6132 lea r21, ptr [r9+r20*2+0x32] +XDIS 2073c: MISC BASE D5698D6C6233 lea r21, ptr [r10+r20*2+0x33] +XDIS 20742: MISC BASE D5698D6C6334 lea r21, ptr [r11+r20*2+0x34] +XDIS 20748: MISC BASE D5698D6C6435 lea r21, ptr [r12+r20*2+0x35] +XDIS 2074e: MISC BASE D5698D6C6536 lea r21, ptr [r13+r20*2+0x36] +XDIS 20754: MISC BASE D5698D6C6637 lea r21, ptr [r14+r20*2+0x37] +XDIS 2075a: MISC BASE D5698D6C6738 lea r21, ptr [r15+r20*2+0x38] +XDIS 20760: MISC BASE D5788D6C6039 lea r21, ptr [r16+r20*2+0x39] +XDIS 20766: MISC BASE D5788D6C613A lea r21, ptr [r17+r20*2+0x3a] +XDIS 2076c: MISC BASE D5788D6C623B lea r21, ptr [r18+r20*2+0x3b] +XDIS 20772: MISC BASE D5788D6C633C lea r21, ptr [r19+r20*2+0x3c] +XDIS 20778: MISC BASE D5788D6C643D lea r21, ptr [r20+r20*2+0x3d] +XDIS 2077e: MISC BASE D5788D6C653E lea r21, ptr [r21+r20*2+0x3e] +XDIS 20784: MISC BASE D5788D6C663F lea r21, ptr [r22+r20*2+0x3f] +XDIS 2078a: MISC BASE D5788D6C6740 lea r21, ptr [r23+r20*2+0x40] +XDIS 20790: MISC BASE D5798D6C6041 lea r21, ptr [r24+r20*2+0x41] +XDIS 20796: MISC BASE D5798D6C6142 lea r21, ptr [r25+r20*2+0x42] +XDIS 2079c: MISC BASE D5798D6C6243 lea r21, ptr [r26+r20*2+0x43] +XDIS 207a2: MISC BASE D5798D6C6344 lea r21, ptr [r27+r20*2+0x44] +XDIS 207a8: MISC BASE D5798D6C6445 lea r21, ptr [r28+r20*2+0x45] +XDIS 207ae: MISC BASE D5798D6C6546 lea r21, ptr [r29+r20*2+0x46] +XDIS 207b4: MISC BASE D5798D6C6647 lea r21, ptr [r30+r20*2+0x47] +XDIS 207ba: MISC BASE D5798D6C6748 lea r21, ptr [r31+r20*2+0x48] +XDIS 207c0: MISC BASE D5688D6C682A lea r21, ptr [rax+r21*2+0x2a] +XDIS 207c6: MISC BASE D5688D6C692B lea r21, ptr [rcx+r21*2+0x2b] +XDIS 207cc: MISC BASE D5688D6C6A2C lea r21, ptr [rdx+r21*2+0x2c] +XDIS 207d2: MISC BASE D5688D6C6B2D lea r21, ptr [rbx+r21*2+0x2d] +XDIS 207d8: MISC BASE D5688D6C6C2E lea r21, ptr [rsp+r21*2+0x2e] +XDIS 207de: MISC BASE D5688D6C6D2F lea r21, ptr [rbp+r21*2+0x2f] +XDIS 207e4: MISC BASE D5688D6C6E30 lea r21, ptr [rsi+r21*2+0x30] +XDIS 207ea: MISC BASE D5688D6C6F31 lea r21, ptr [rdi+r21*2+0x31] +XDIS 207f0: MISC BASE D5698D6C6832 lea r21, ptr [r8+r21*2+0x32] +XDIS 207f6: MISC BASE D5698D6C6933 lea r21, ptr [r9+r21*2+0x33] +XDIS 207fc: MISC BASE D5698D6C6A34 lea r21, ptr [r10+r21*2+0x34] +XDIS 20802: MISC BASE D5698D6C6B35 lea r21, ptr [r11+r21*2+0x35] +XDIS 20808: MISC BASE D5698D6C6C36 lea r21, ptr [r12+r21*2+0x36] +XDIS 2080e: MISC BASE D5698D6C6D37 lea r21, ptr [r13+r21*2+0x37] +XDIS 20814: MISC BASE D5698D6C6E38 lea r21, ptr [r14+r21*2+0x38] +XDIS 2081a: MISC BASE D5698D6C6F39 lea r21, ptr [r15+r21*2+0x39] +XDIS 20820: MISC BASE D5788D6C683A lea r21, ptr [r16+r21*2+0x3a] +XDIS 20826: MISC BASE D5788D6C693B lea r21, ptr [r17+r21*2+0x3b] +XDIS 2082c: MISC BASE D5788D6C6A3C lea r21, ptr [r18+r21*2+0x3c] +XDIS 20832: MISC BASE D5788D6C6B3D lea r21, ptr [r19+r21*2+0x3d] +XDIS 20838: MISC BASE D5788D6C6C3E lea r21, ptr [r20+r21*2+0x3e] +XDIS 2083e: MISC BASE D5788D6C6D3F lea r21, ptr [r21+r21*2+0x3f] +XDIS 20844: MISC BASE D5788D6C6E40 lea r21, ptr [r22+r21*2+0x40] +XDIS 2084a: MISC BASE D5788D6C6F41 lea r21, ptr [r23+r21*2+0x41] +XDIS 20850: MISC BASE D5798D6C6842 lea r21, ptr [r24+r21*2+0x42] +XDIS 20856: MISC BASE D5798D6C6943 lea r21, ptr [r25+r21*2+0x43] +XDIS 2085c: MISC BASE D5798D6C6A44 lea r21, ptr [r26+r21*2+0x44] +XDIS 20862: MISC BASE D5798D6C6B45 lea r21, ptr [r27+r21*2+0x45] +XDIS 20868: MISC BASE D5798D6C6C46 lea r21, ptr [r28+r21*2+0x46] +XDIS 2086e: MISC BASE D5798D6C6D47 lea r21, ptr [r29+r21*2+0x47] +XDIS 20874: MISC BASE D5798D6C6E48 lea r21, ptr [r30+r21*2+0x48] +XDIS 2087a: MISC BASE D5798D6C6F49 lea r21, ptr [r31+r21*2+0x49] +XDIS 20880: MISC BASE D5688D6C702B lea r21, ptr [rax+r22*2+0x2b] +XDIS 20886: MISC BASE D5688D6C712C lea r21, ptr [rcx+r22*2+0x2c] +XDIS 2088c: MISC BASE D5688D6C722D lea r21, ptr [rdx+r22*2+0x2d] +XDIS 20892: MISC BASE D5688D6C732E lea r21, ptr [rbx+r22*2+0x2e] +XDIS 20898: MISC BASE D5688D6C742F lea r21, ptr [rsp+r22*2+0x2f] +XDIS 2089e: MISC BASE D5688D6C7530 lea r21, ptr [rbp+r22*2+0x30] +XDIS 208a4: MISC BASE D5688D6C7631 lea r21, ptr [rsi+r22*2+0x31] +XDIS 208aa: MISC BASE D5688D6C7732 lea r21, ptr [rdi+r22*2+0x32] +XDIS 208b0: MISC BASE D5698D6C7033 lea r21, ptr [r8+r22*2+0x33] +XDIS 208b6: MISC BASE D5698D6C7134 lea r21, ptr [r9+r22*2+0x34] +XDIS 208bc: MISC BASE D5698D6C7235 lea r21, ptr [r10+r22*2+0x35] +XDIS 208c2: MISC BASE D5698D6C7336 lea r21, ptr [r11+r22*2+0x36] +XDIS 208c8: MISC BASE D5698D6C7437 lea r21, ptr [r12+r22*2+0x37] +XDIS 208ce: MISC BASE D5698D6C7538 lea r21, ptr [r13+r22*2+0x38] +XDIS 208d4: MISC BASE D5698D6C7639 lea r21, ptr [r14+r22*2+0x39] +XDIS 208da: MISC BASE D5698D6C773A lea r21, ptr [r15+r22*2+0x3a] +XDIS 208e0: MISC BASE D5788D6C703B lea r21, ptr [r16+r22*2+0x3b] +XDIS 208e6: MISC BASE D5788D6C713C lea r21, ptr [r17+r22*2+0x3c] +XDIS 208ec: MISC BASE D5788D6C723D lea r21, ptr [r18+r22*2+0x3d] +XDIS 208f2: MISC BASE D5788D6C733E lea r21, ptr [r19+r22*2+0x3e] +XDIS 208f8: MISC BASE D5788D6C743F lea r21, ptr [r20+r22*2+0x3f] +XDIS 208fe: MISC BASE D5788D6C7540 lea r21, ptr [r21+r22*2+0x40] +XDIS 20904: MISC BASE D5788D6C7641 lea r21, ptr [r22+r22*2+0x41] +XDIS 2090a: MISC BASE D5788D6C7742 lea r21, ptr [r23+r22*2+0x42] +XDIS 20910: MISC BASE D5798D6C7043 lea r21, ptr [r24+r22*2+0x43] +XDIS 20916: MISC BASE D5798D6C7144 lea r21, ptr [r25+r22*2+0x44] +XDIS 2091c: MISC BASE D5798D6C7245 lea r21, ptr [r26+r22*2+0x45] +XDIS 20922: MISC BASE D5798D6C7346 lea r21, ptr [r27+r22*2+0x46] +XDIS 20928: MISC BASE D5798D6C7447 lea r21, ptr [r28+r22*2+0x47] +XDIS 2092e: MISC BASE D5798D6C7548 lea r21, ptr [r29+r22*2+0x48] +XDIS 20934: MISC BASE D5798D6C7649 lea r21, ptr [r30+r22*2+0x49] +XDIS 2093a: MISC BASE D5798D6C774A lea r21, ptr [r31+r22*2+0x4a] +XDIS 20940: MISC BASE D5688D6C782C lea r21, ptr [rax+r23*2+0x2c] +XDIS 20946: MISC BASE D5688D6C792D lea r21, ptr [rcx+r23*2+0x2d] +XDIS 2094c: MISC BASE D5688D6C7A2E lea r21, ptr [rdx+r23*2+0x2e] +XDIS 20952: MISC BASE D5688D6C7B2F lea r21, ptr [rbx+r23*2+0x2f] +XDIS 20958: MISC BASE D5688D6C7C30 lea r21, ptr [rsp+r23*2+0x30] +XDIS 2095e: MISC BASE D5688D6C7D31 lea r21, ptr [rbp+r23*2+0x31] +XDIS 20964: MISC BASE D5688D6C7E32 lea r21, ptr [rsi+r23*2+0x32] +XDIS 2096a: MISC BASE D5688D6C7F33 lea r21, ptr [rdi+r23*2+0x33] +XDIS 20970: MISC BASE D5698D6C7834 lea r21, ptr [r8+r23*2+0x34] +XDIS 20976: MISC BASE D5698D6C7935 lea r21, ptr [r9+r23*2+0x35] +XDIS 2097c: MISC BASE D5698D6C7A36 lea r21, ptr [r10+r23*2+0x36] +XDIS 20982: MISC BASE D5698D6C7B37 lea r21, ptr [r11+r23*2+0x37] +XDIS 20988: MISC BASE D5698D6C7C38 lea r21, ptr [r12+r23*2+0x38] +XDIS 2098e: MISC BASE D5698D6C7D39 lea r21, ptr [r13+r23*2+0x39] +XDIS 20994: MISC BASE D5698D6C7E3A lea r21, ptr [r14+r23*2+0x3a] +XDIS 2099a: MISC BASE D5698D6C7F3B lea r21, ptr [r15+r23*2+0x3b] +XDIS 209a0: MISC BASE D5788D6C783C lea r21, ptr [r16+r23*2+0x3c] +XDIS 209a6: MISC BASE D5788D6C793D lea r21, ptr [r17+r23*2+0x3d] +XDIS 209ac: MISC BASE D5788D6C7A3E lea r21, ptr [r18+r23*2+0x3e] +XDIS 209b2: MISC BASE D5788D6C7B3F lea r21, ptr [r19+r23*2+0x3f] +XDIS 209b8: MISC BASE D5788D6C7C40 lea r21, ptr [r20+r23*2+0x40] +XDIS 209be: MISC BASE D5788D6C7D41 lea r21, ptr [r21+r23*2+0x41] +XDIS 209c4: MISC BASE D5788D6C7E42 lea r21, ptr [r22+r23*2+0x42] +XDIS 209ca: MISC BASE D5788D6C7F43 lea r21, ptr [r23+r23*2+0x43] +XDIS 209d0: MISC BASE D5798D6C7844 lea r21, ptr [r24+r23*2+0x44] +XDIS 209d6: MISC BASE D5798D6C7945 lea r21, ptr [r25+r23*2+0x45] +XDIS 209dc: MISC BASE D5798D6C7A46 lea r21, ptr [r26+r23*2+0x46] +XDIS 209e2: MISC BASE D5798D6C7B47 lea r21, ptr [r27+r23*2+0x47] +XDIS 209e8: MISC BASE D5798D6C7C48 lea r21, ptr [r28+r23*2+0x48] +XDIS 209ee: MISC BASE D5798D6C7D49 lea r21, ptr [r29+r23*2+0x49] +XDIS 209f4: MISC BASE D5798D6C7E4A lea r21, ptr [r30+r23*2+0x4a] +XDIS 209fa: MISC BASE D5798D6C7F4B lea r21, ptr [r31+r23*2+0x4b] +XDIS 20a00: MISC BASE D56A8D6C402D lea r21, ptr [rax+r24*2+0x2d] +XDIS 20a06: MISC BASE D56A8D6C412E lea r21, ptr [rcx+r24*2+0x2e] +XDIS 20a0c: MISC BASE D56A8D6C422F lea r21, ptr [rdx+r24*2+0x2f] +XDIS 20a12: MISC BASE D56A8D6C4330 lea r21, ptr [rbx+r24*2+0x30] +XDIS 20a18: MISC BASE D56A8D6C4431 lea r21, ptr [rsp+r24*2+0x31] +XDIS 20a1e: MISC BASE D56A8D6C4532 lea r21, ptr [rbp+r24*2+0x32] +XDIS 20a24: MISC BASE D56A8D6C4633 lea r21, ptr [rsi+r24*2+0x33] +XDIS 20a2a: MISC BASE D56A8D6C4734 lea r21, ptr [rdi+r24*2+0x34] +XDIS 20a30: MISC BASE D56B8D6C4035 lea r21, ptr [r8+r24*2+0x35] +XDIS 20a36: MISC BASE D56B8D6C4136 lea r21, ptr [r9+r24*2+0x36] +XDIS 20a3c: MISC BASE D56B8D6C4237 lea r21, ptr [r10+r24*2+0x37] +XDIS 20a42: MISC BASE D56B8D6C4338 lea r21, ptr [r11+r24*2+0x38] +XDIS 20a48: MISC BASE D56B8D6C4439 lea r21, ptr [r12+r24*2+0x39] +XDIS 20a4e: MISC BASE D56B8D6C453A lea r21, ptr [r13+r24*2+0x3a] +XDIS 20a54: MISC BASE D56B8D6C463B lea r21, ptr [r14+r24*2+0x3b] +XDIS 20a5a: MISC BASE D56B8D6C473C lea r21, ptr [r15+r24*2+0x3c] +XDIS 20a60: MISC BASE D57A8D6C403D lea r21, ptr [r16+r24*2+0x3d] +XDIS 20a66: MISC BASE D57A8D6C413E lea r21, ptr [r17+r24*2+0x3e] +XDIS 20a6c: MISC BASE D57A8D6C423F lea r21, ptr [r18+r24*2+0x3f] +XDIS 20a72: MISC BASE D57A8D6C4340 lea r21, ptr [r19+r24*2+0x40] +XDIS 20a78: MISC BASE D57A8D6C4441 lea r21, ptr [r20+r24*2+0x41] +XDIS 20a7e: MISC BASE D57A8D6C4542 lea r21, ptr [r21+r24*2+0x42] +XDIS 20a84: MISC BASE D57A8D6C4643 lea r21, ptr [r22+r24*2+0x43] +XDIS 20a8a: MISC BASE D57A8D6C4744 lea r21, ptr [r23+r24*2+0x44] +XDIS 20a90: MISC BASE D57B8D6C4045 lea r21, ptr [r24+r24*2+0x45] +XDIS 20a96: MISC BASE D57B8D6C4146 lea r21, ptr [r25+r24*2+0x46] +XDIS 20a9c: MISC BASE D57B8D6C4247 lea r21, ptr [r26+r24*2+0x47] +XDIS 20aa2: MISC BASE D57B8D6C4348 lea r21, ptr [r27+r24*2+0x48] +XDIS 20aa8: MISC BASE D57B8D6C4449 lea r21, ptr [r28+r24*2+0x49] +XDIS 20aae: MISC BASE D57B8D6C454A lea r21, ptr [r29+r24*2+0x4a] +XDIS 20ab4: MISC BASE D57B8D6C464B lea r21, ptr [r30+r24*2+0x4b] +XDIS 20aba: MISC BASE D57B8D6C474C lea r21, ptr [r31+r24*2+0x4c] +XDIS 20ac0: MISC BASE D56A8D6C482E lea r21, ptr [rax+r25*2+0x2e] +XDIS 20ac6: MISC BASE D56A8D6C492F lea r21, ptr [rcx+r25*2+0x2f] +XDIS 20acc: MISC BASE D56A8D6C4A30 lea r21, ptr [rdx+r25*2+0x30] +XDIS 20ad2: MISC BASE D56A8D6C4B31 lea r21, ptr [rbx+r25*2+0x31] +XDIS 20ad8: MISC BASE D56A8D6C4C32 lea r21, ptr [rsp+r25*2+0x32] +XDIS 20ade: MISC BASE D56A8D6C4D33 lea r21, ptr [rbp+r25*2+0x33] +XDIS 20ae4: MISC BASE D56A8D6C4E34 lea r21, ptr [rsi+r25*2+0x34] +XDIS 20aea: MISC BASE D56A8D6C4F35 lea r21, ptr [rdi+r25*2+0x35] +XDIS 20af0: MISC BASE D56B8D6C4836 lea r21, ptr [r8+r25*2+0x36] +XDIS 20af6: MISC BASE D56B8D6C4937 lea r21, ptr [r9+r25*2+0x37] +XDIS 20afc: MISC BASE D56B8D6C4A38 lea r21, ptr [r10+r25*2+0x38] +XDIS 20b02: MISC BASE D56B8D6C4B39 lea r21, ptr [r11+r25*2+0x39] +XDIS 20b08: MISC BASE D56B8D6C4C3A lea r21, ptr [r12+r25*2+0x3a] +XDIS 20b0e: MISC BASE D56B8D6C4D3B lea r21, ptr [r13+r25*2+0x3b] +XDIS 20b14: MISC BASE D56B8D6C4E3C lea r21, ptr [r14+r25*2+0x3c] +XDIS 20b1a: MISC BASE D56B8D6C4F3D lea r21, ptr [r15+r25*2+0x3d] +XDIS 20b20: MISC BASE D57A8D6C483E lea r21, ptr [r16+r25*2+0x3e] +XDIS 20b26: MISC BASE D57A8D6C493F lea r21, ptr [r17+r25*2+0x3f] +XDIS 20b2c: MISC BASE D57A8D6C4A40 lea r21, ptr [r18+r25*2+0x40] +XDIS 20b32: MISC BASE D57A8D6C4B41 lea r21, ptr [r19+r25*2+0x41] +XDIS 20b38: MISC BASE D57A8D6C4C42 lea r21, ptr [r20+r25*2+0x42] +XDIS 20b3e: MISC BASE D57A8D6C4D43 lea r21, ptr [r21+r25*2+0x43] +XDIS 20b44: MISC BASE D57A8D6C4E44 lea r21, ptr [r22+r25*2+0x44] +XDIS 20b4a: MISC BASE D57A8D6C4F45 lea r21, ptr [r23+r25*2+0x45] +XDIS 20b50: MISC BASE D57B8D6C4846 lea r21, ptr [r24+r25*2+0x46] +XDIS 20b56: MISC BASE D57B8D6C4947 lea r21, ptr [r25+r25*2+0x47] +XDIS 20b5c: MISC BASE D57B8D6C4A48 lea r21, ptr [r26+r25*2+0x48] +XDIS 20b62: MISC BASE D57B8D6C4B49 lea r21, ptr [r27+r25*2+0x49] +XDIS 20b68: MISC BASE D57B8D6C4C4A lea r21, ptr [r28+r25*2+0x4a] +XDIS 20b6e: MISC BASE D57B8D6C4D4B lea r21, ptr [r29+r25*2+0x4b] +XDIS 20b74: MISC BASE D57B8D6C4E4C lea r21, ptr [r30+r25*2+0x4c] +XDIS 20b7a: MISC BASE D57B8D6C4F4D lea r21, ptr [r31+r25*2+0x4d] +XDIS 20b80: MISC BASE D56A8D6C502F lea r21, ptr [rax+r26*2+0x2f] +XDIS 20b86: MISC BASE D56A8D6C5130 lea r21, ptr [rcx+r26*2+0x30] +XDIS 20b8c: MISC BASE D56A8D6C5231 lea r21, ptr [rdx+r26*2+0x31] +XDIS 20b92: MISC BASE D56A8D6C5332 lea r21, ptr [rbx+r26*2+0x32] +XDIS 20b98: MISC BASE D56A8D6C5433 lea r21, ptr [rsp+r26*2+0x33] +XDIS 20b9e: MISC BASE D56A8D6C5534 lea r21, ptr [rbp+r26*2+0x34] +XDIS 20ba4: MISC BASE D56A8D6C5635 lea r21, ptr [rsi+r26*2+0x35] +XDIS 20baa: MISC BASE D56A8D6C5736 lea r21, ptr [rdi+r26*2+0x36] +XDIS 20bb0: MISC BASE D56B8D6C5037 lea r21, ptr [r8+r26*2+0x37] +XDIS 20bb6: MISC BASE D56B8D6C5138 lea r21, ptr [r9+r26*2+0x38] +XDIS 20bbc: MISC BASE D56B8D6C5239 lea r21, ptr [r10+r26*2+0x39] +XDIS 20bc2: MISC BASE D56B8D6C533A lea r21, ptr [r11+r26*2+0x3a] +XDIS 20bc8: MISC BASE D56B8D6C543B lea r21, ptr [r12+r26*2+0x3b] +XDIS 20bce: MISC BASE D56B8D6C553C lea r21, ptr [r13+r26*2+0x3c] +XDIS 20bd4: MISC BASE D56B8D6C563D lea r21, ptr [r14+r26*2+0x3d] +XDIS 20bda: MISC BASE D56B8D6C573E lea r21, ptr [r15+r26*2+0x3e] +XDIS 20be0: MISC BASE D57A8D6C503F lea r21, ptr [r16+r26*2+0x3f] +XDIS 20be6: MISC BASE D57A8D6C5140 lea r21, ptr [r17+r26*2+0x40] +XDIS 20bec: MISC BASE D57A8D6C5241 lea r21, ptr [r18+r26*2+0x41] +XDIS 20bf2: MISC BASE D57A8D6C5342 lea r21, ptr [r19+r26*2+0x42] +XDIS 20bf8: MISC BASE D57A8D6C5443 lea r21, ptr [r20+r26*2+0x43] +XDIS 20bfe: MISC BASE D57A8D6C5544 lea r21, ptr [r21+r26*2+0x44] +XDIS 20c04: MISC BASE D57A8D6C5645 lea r21, ptr [r22+r26*2+0x45] +XDIS 20c0a: MISC BASE D57A8D6C5746 lea r21, ptr [r23+r26*2+0x46] +XDIS 20c10: MISC BASE D57B8D6C5047 lea r21, ptr [r24+r26*2+0x47] +XDIS 20c16: MISC BASE D57B8D6C5148 lea r21, ptr [r25+r26*2+0x48] +XDIS 20c1c: MISC BASE D57B8D6C5249 lea r21, ptr [r26+r26*2+0x49] +XDIS 20c22: MISC BASE D57B8D6C534A lea r21, ptr [r27+r26*2+0x4a] +XDIS 20c28: MISC BASE D57B8D6C544B lea r21, ptr [r28+r26*2+0x4b] +XDIS 20c2e: MISC BASE D57B8D6C554C lea r21, ptr [r29+r26*2+0x4c] +XDIS 20c34: MISC BASE D57B8D6C564D lea r21, ptr [r30+r26*2+0x4d] +XDIS 20c3a: MISC BASE D57B8D6C574E lea r21, ptr [r31+r26*2+0x4e] +XDIS 20c40: MISC BASE D56A8D6C5830 lea r21, ptr [rax+r27*2+0x30] +XDIS 20c46: MISC BASE D56A8D6C5931 lea r21, ptr [rcx+r27*2+0x31] +XDIS 20c4c: MISC BASE D56A8D6C5A32 lea r21, ptr [rdx+r27*2+0x32] +XDIS 20c52: MISC BASE D56A8D6C5B33 lea r21, ptr [rbx+r27*2+0x33] +XDIS 20c58: MISC BASE D56A8D6C5C34 lea r21, ptr [rsp+r27*2+0x34] +XDIS 20c5e: MISC BASE D56A8D6C5D35 lea r21, ptr [rbp+r27*2+0x35] +XDIS 20c64: MISC BASE D56A8D6C5E36 lea r21, ptr [rsi+r27*2+0x36] +XDIS 20c6a: MISC BASE D56A8D6C5F37 lea r21, ptr [rdi+r27*2+0x37] +XDIS 20c70: MISC BASE D56B8D6C5838 lea r21, ptr [r8+r27*2+0x38] +XDIS 20c76: MISC BASE D56B8D6C5939 lea r21, ptr [r9+r27*2+0x39] +XDIS 20c7c: MISC BASE D56B8D6C5A3A lea r21, ptr [r10+r27*2+0x3a] +XDIS 20c82: MISC BASE D56B8D6C5B3B lea r21, ptr [r11+r27*2+0x3b] +XDIS 20c88: MISC BASE D56B8D6C5C3C lea r21, ptr [r12+r27*2+0x3c] +XDIS 20c8e: MISC BASE D56B8D6C5D3D lea r21, ptr [r13+r27*2+0x3d] +XDIS 20c94: MISC BASE D56B8D6C5E3E lea r21, ptr [r14+r27*2+0x3e] +XDIS 20c9a: MISC BASE D56B8D6C5F3F lea r21, ptr [r15+r27*2+0x3f] +XDIS 20ca0: MISC BASE D57A8D6C5840 lea r21, ptr [r16+r27*2+0x40] +XDIS 20ca6: MISC BASE D57A8D6C5941 lea r21, ptr [r17+r27*2+0x41] +XDIS 20cac: MISC BASE D57A8D6C5A42 lea r21, ptr [r18+r27*2+0x42] +XDIS 20cb2: MISC BASE D57A8D6C5B43 lea r21, ptr [r19+r27*2+0x43] +XDIS 20cb8: MISC BASE D57A8D6C5C44 lea r21, ptr [r20+r27*2+0x44] +XDIS 20cbe: MISC BASE D57A8D6C5D45 lea r21, ptr [r21+r27*2+0x45] +XDIS 20cc4: MISC BASE D57A8D6C5E46 lea r21, ptr [r22+r27*2+0x46] +XDIS 20cca: MISC BASE D57A8D6C5F47 lea r21, ptr [r23+r27*2+0x47] +XDIS 20cd0: MISC BASE D57B8D6C5848 lea r21, ptr [r24+r27*2+0x48] +XDIS 20cd6: MISC BASE D57B8D6C5949 lea r21, ptr [r25+r27*2+0x49] +XDIS 20cdc: MISC BASE D57B8D6C5A4A lea r21, ptr [r26+r27*2+0x4a] +XDIS 20ce2: MISC BASE D57B8D6C5B4B lea r21, ptr [r27+r27*2+0x4b] +XDIS 20ce8: MISC BASE D57B8D6C5C4C lea r21, ptr [r28+r27*2+0x4c] +XDIS 20cee: MISC BASE D57B8D6C5D4D lea r21, ptr [r29+r27*2+0x4d] +XDIS 20cf4: MISC BASE D57B8D6C5E4E lea r21, ptr [r30+r27*2+0x4e] +XDIS 20cfa: MISC BASE D57B8D6C5F4F lea r21, ptr [r31+r27*2+0x4f] +XDIS 20d00: MISC BASE D56A8D6C6031 lea r21, ptr [rax+r28*2+0x31] +XDIS 20d06: MISC BASE D56A8D6C6132 lea r21, ptr [rcx+r28*2+0x32] +XDIS 20d0c: MISC BASE D56A8D6C6233 lea r21, ptr [rdx+r28*2+0x33] +XDIS 20d12: MISC BASE D56A8D6C6334 lea r21, ptr [rbx+r28*2+0x34] +XDIS 20d18: MISC BASE D56A8D6C6435 lea r21, ptr [rsp+r28*2+0x35] +XDIS 20d1e: MISC BASE D56A8D6C6536 lea r21, ptr [rbp+r28*2+0x36] +XDIS 20d24: MISC BASE D56A8D6C6637 lea r21, ptr [rsi+r28*2+0x37] +XDIS 20d2a: MISC BASE D56A8D6C6738 lea r21, ptr [rdi+r28*2+0x38] +XDIS 20d30: MISC BASE D56B8D6C6039 lea r21, ptr [r8+r28*2+0x39] +XDIS 20d36: MISC BASE D56B8D6C613A lea r21, ptr [r9+r28*2+0x3a] +XDIS 20d3c: MISC BASE D56B8D6C623B lea r21, ptr [r10+r28*2+0x3b] +XDIS 20d42: MISC BASE D56B8D6C633C lea r21, ptr [r11+r28*2+0x3c] +XDIS 20d48: MISC BASE D56B8D6C643D lea r21, ptr [r12+r28*2+0x3d] +XDIS 20d4e: MISC BASE D56B8D6C653E lea r21, ptr [r13+r28*2+0x3e] +XDIS 20d54: MISC BASE D56B8D6C663F lea r21, ptr [r14+r28*2+0x3f] +XDIS 20d5a: MISC BASE D56B8D6C6740 lea r21, ptr [r15+r28*2+0x40] +XDIS 20d60: MISC BASE D57A8D6C6041 lea r21, ptr [r16+r28*2+0x41] +XDIS 20d66: MISC BASE D57A8D6C6142 lea r21, ptr [r17+r28*2+0x42] +XDIS 20d6c: MISC BASE D57A8D6C6243 lea r21, ptr [r18+r28*2+0x43] +XDIS 20d72: MISC BASE D57A8D6C6344 lea r21, ptr [r19+r28*2+0x44] +XDIS 20d78: MISC BASE D57A8D6C6445 lea r21, ptr [r20+r28*2+0x45] +XDIS 20d7e: MISC BASE D57A8D6C6546 lea r21, ptr [r21+r28*2+0x46] +XDIS 20d84: MISC BASE D57A8D6C6647 lea r21, ptr [r22+r28*2+0x47] +XDIS 20d8a: MISC BASE D57A8D6C6748 lea r21, ptr [r23+r28*2+0x48] +XDIS 20d90: MISC BASE D57B8D6C6049 lea r21, ptr [r24+r28*2+0x49] +XDIS 20d96: MISC BASE D57B8D6C614A lea r21, ptr [r25+r28*2+0x4a] +XDIS 20d9c: MISC BASE D57B8D6C624B lea r21, ptr [r26+r28*2+0x4b] +XDIS 20da2: MISC BASE D57B8D6C634C lea r21, ptr [r27+r28*2+0x4c] +XDIS 20da8: MISC BASE D57B8D6C644D lea r21, ptr [r28+r28*2+0x4d] +XDIS 20dae: MISC BASE D57B8D6C654E lea r21, ptr [r29+r28*2+0x4e] +XDIS 20db4: MISC BASE D57B8D6C664F lea r21, ptr [r30+r28*2+0x4f] +XDIS 20dba: MISC BASE D57B8D6C6750 lea r21, ptr [r31+r28*2+0x50] +XDIS 20dc0: MISC BASE D56A8D6C6832 lea r21, ptr [rax+r29*2+0x32] +XDIS 20dc6: MISC BASE D56A8D6C6933 lea r21, ptr [rcx+r29*2+0x33] +XDIS 20dcc: MISC BASE D56A8D6C6A34 lea r21, ptr [rdx+r29*2+0x34] +XDIS 20dd2: MISC BASE D56A8D6C6B35 lea r21, ptr [rbx+r29*2+0x35] +XDIS 20dd8: MISC BASE D56A8D6C6C36 lea r21, ptr [rsp+r29*2+0x36] +XDIS 20dde: MISC BASE D56A8D6C6D37 lea r21, ptr [rbp+r29*2+0x37] +XDIS 20de4: MISC BASE D56A8D6C6E38 lea r21, ptr [rsi+r29*2+0x38] +XDIS 20dea: MISC BASE D56A8D6C6F39 lea r21, ptr [rdi+r29*2+0x39] +XDIS 20df0: MISC BASE D56B8D6C683A lea r21, ptr [r8+r29*2+0x3a] +XDIS 20df6: MISC BASE D56B8D6C693B lea r21, ptr [r9+r29*2+0x3b] +XDIS 20dfc: MISC BASE D56B8D6C6A3C lea r21, ptr [r10+r29*2+0x3c] +XDIS 20e02: MISC BASE D56B8D6C6B3D lea r21, ptr [r11+r29*2+0x3d] +XDIS 20e08: MISC BASE D56B8D6C6C3E lea r21, ptr [r12+r29*2+0x3e] +XDIS 20e0e: MISC BASE D56B8D6C6D3F lea r21, ptr [r13+r29*2+0x3f] +XDIS 20e14: MISC BASE D56B8D6C6E40 lea r21, ptr [r14+r29*2+0x40] +XDIS 20e1a: MISC BASE D56B8D6C6F41 lea r21, ptr [r15+r29*2+0x41] +XDIS 20e20: MISC BASE D57A8D6C6842 lea r21, ptr [r16+r29*2+0x42] +XDIS 20e26: MISC BASE D57A8D6C6943 lea r21, ptr [r17+r29*2+0x43] +XDIS 20e2c: MISC BASE D57A8D6C6A44 lea r21, ptr [r18+r29*2+0x44] +XDIS 20e32: MISC BASE D57A8D6C6B45 lea r21, ptr [r19+r29*2+0x45] +XDIS 20e38: MISC BASE D57A8D6C6C46 lea r21, ptr [r20+r29*2+0x46] +XDIS 20e3e: MISC BASE D57A8D6C6D47 lea r21, ptr [r21+r29*2+0x47] +XDIS 20e44: MISC BASE D57A8D6C6E48 lea r21, ptr [r22+r29*2+0x48] +XDIS 20e4a: MISC BASE D57A8D6C6F49 lea r21, ptr [r23+r29*2+0x49] +XDIS 20e50: MISC BASE D57B8D6C684A lea r21, ptr [r24+r29*2+0x4a] +XDIS 20e56: MISC BASE D57B8D6C694B lea r21, ptr [r25+r29*2+0x4b] +XDIS 20e5c: MISC BASE D57B8D6C6A4C lea r21, ptr [r26+r29*2+0x4c] +XDIS 20e62: MISC BASE D57B8D6C6B4D lea r21, ptr [r27+r29*2+0x4d] +XDIS 20e68: MISC BASE D57B8D6C6C4E lea r21, ptr [r28+r29*2+0x4e] +XDIS 20e6e: MISC BASE D57B8D6C6D4F lea r21, ptr [r29+r29*2+0x4f] +XDIS 20e74: MISC BASE D57B8D6C6E50 lea r21, ptr [r30+r29*2+0x50] +XDIS 20e7a: MISC BASE D57B8D6C6F51 lea r21, ptr [r31+r29*2+0x51] +XDIS 20e80: MISC BASE D56A8D6C7033 lea r21, ptr [rax+r30*2+0x33] +XDIS 20e86: MISC BASE D56A8D6C7134 lea r21, ptr [rcx+r30*2+0x34] +XDIS 20e8c: MISC BASE D56A8D6C7235 lea r21, ptr [rdx+r30*2+0x35] +XDIS 20e92: MISC BASE D56A8D6C7336 lea r21, ptr [rbx+r30*2+0x36] +XDIS 20e98: MISC BASE D56A8D6C7437 lea r21, ptr [rsp+r30*2+0x37] +XDIS 20e9e: MISC BASE D56A8D6C7538 lea r21, ptr [rbp+r30*2+0x38] +XDIS 20ea4: MISC BASE D56A8D6C7639 lea r21, ptr [rsi+r30*2+0x39] +XDIS 20eaa: MISC BASE D56A8D6C773A lea r21, ptr [rdi+r30*2+0x3a] +XDIS 20eb0: MISC BASE D56B8D6C703B lea r21, ptr [r8+r30*2+0x3b] +XDIS 20eb6: MISC BASE D56B8D6C713C lea r21, ptr [r9+r30*2+0x3c] +XDIS 20ebc: MISC BASE D56B8D6C723D lea r21, ptr [r10+r30*2+0x3d] +XDIS 20ec2: MISC BASE D56B8D6C733E lea r21, ptr [r11+r30*2+0x3e] +XDIS 20ec8: MISC BASE D56B8D6C743F lea r21, ptr [r12+r30*2+0x3f] +XDIS 20ece: MISC BASE D56B8D6C7540 lea r21, ptr [r13+r30*2+0x40] +XDIS 20ed4: MISC BASE D56B8D6C7641 lea r21, ptr [r14+r30*2+0x41] +XDIS 20eda: MISC BASE D56B8D6C7742 lea r21, ptr [r15+r30*2+0x42] +XDIS 20ee0: MISC BASE D57A8D6C7043 lea r21, ptr [r16+r30*2+0x43] +XDIS 20ee6: MISC BASE D57A8D6C7144 lea r21, ptr [r17+r30*2+0x44] +XDIS 20eec: MISC BASE D57A8D6C7245 lea r21, ptr [r18+r30*2+0x45] +XDIS 20ef2: MISC BASE D57A8D6C7346 lea r21, ptr [r19+r30*2+0x46] +XDIS 20ef8: MISC BASE D57A8D6C7447 lea r21, ptr [r20+r30*2+0x47] +XDIS 20efe: MISC BASE D57A8D6C7548 lea r21, ptr [r21+r30*2+0x48] +XDIS 20f04: MISC BASE D57A8D6C7649 lea r21, ptr [r22+r30*2+0x49] +XDIS 20f0a: MISC BASE D57A8D6C774A lea r21, ptr [r23+r30*2+0x4a] +XDIS 20f10: MISC BASE D57B8D6C704B lea r21, ptr [r24+r30*2+0x4b] +XDIS 20f16: MISC BASE D57B8D6C714C lea r21, ptr [r25+r30*2+0x4c] +XDIS 20f1c: MISC BASE D57B8D6C724D lea r21, ptr [r26+r30*2+0x4d] +XDIS 20f22: MISC BASE D57B8D6C734E lea r21, ptr [r27+r30*2+0x4e] +XDIS 20f28: MISC BASE D57B8D6C744F lea r21, ptr [r28+r30*2+0x4f] +XDIS 20f2e: MISC BASE D57B8D6C7550 lea r21, ptr [r29+r30*2+0x50] +XDIS 20f34: MISC BASE D57B8D6C7651 lea r21, ptr [r30+r30*2+0x51] +XDIS 20f3a: MISC BASE D57B8D6C7752 lea r21, ptr [r31+r30*2+0x52] +XDIS 20f40: MISC BASE D56A8D6C7834 lea r21, ptr [rax+r31*2+0x34] +XDIS 20f46: MISC BASE D56A8D6C7935 lea r21, ptr [rcx+r31*2+0x35] +XDIS 20f4c: MISC BASE D56A8D6C7A36 lea r21, ptr [rdx+r31*2+0x36] +XDIS 20f52: MISC BASE D56A8D6C7B37 lea r21, ptr [rbx+r31*2+0x37] +XDIS 20f58: MISC BASE D56A8D6C7C38 lea r21, ptr [rsp+r31*2+0x38] +XDIS 20f5e: MISC BASE D56A8D6C7D39 lea r21, ptr [rbp+r31*2+0x39] +XDIS 20f64: MISC BASE D56A8D6C7E3A lea r21, ptr [rsi+r31*2+0x3a] +XDIS 20f6a: MISC BASE D56A8D6C7F3B lea r21, ptr [rdi+r31*2+0x3b] +XDIS 20f70: MISC BASE D56B8D6C783C lea r21, ptr [r8+r31*2+0x3c] +XDIS 20f76: MISC BASE D56B8D6C793D lea r21, ptr [r9+r31*2+0x3d] +XDIS 20f7c: MISC BASE D56B8D6C7A3E lea r21, ptr [r10+r31*2+0x3e] +XDIS 20f82: MISC BASE D56B8D6C7B3F lea r21, ptr [r11+r31*2+0x3f] +XDIS 20f88: MISC BASE D56B8D6C7C40 lea r21, ptr [r12+r31*2+0x40] +XDIS 20f8e: MISC BASE D56B8D6C7D41 lea r21, ptr [r13+r31*2+0x41] +XDIS 20f94: MISC BASE D56B8D6C7E42 lea r21, ptr [r14+r31*2+0x42] +XDIS 20f9a: MISC BASE D56B8D6C7F43 lea r21, ptr [r15+r31*2+0x43] +XDIS 20fa0: MISC BASE D57A8D6C7844 lea r21, ptr [r16+r31*2+0x44] +XDIS 20fa6: MISC BASE D57A8D6C7945 lea r21, ptr [r17+r31*2+0x45] +XDIS 20fac: MISC BASE D57A8D6C7A46 lea r21, ptr [r18+r31*2+0x46] +XDIS 20fb2: MISC BASE D57A8D6C7B47 lea r21, ptr [r19+r31*2+0x47] +XDIS 20fb8: MISC BASE D57A8D6C7C48 lea r21, ptr [r20+r31*2+0x48] +XDIS 20fbe: MISC BASE D57A8D6C7D49 lea r21, ptr [r21+r31*2+0x49] +XDIS 20fc4: MISC BASE D57A8D6C7E4A lea r21, ptr [r22+r31*2+0x4a] +XDIS 20fca: MISC BASE D57A8D6C7F4B lea r21, ptr [r23+r31*2+0x4b] +XDIS 20fd0: MISC BASE D57B8D6C784C lea r21, ptr [r24+r31*2+0x4c] +XDIS 20fd6: MISC BASE D57B8D6C794D lea r21, ptr [r25+r31*2+0x4d] +XDIS 20fdc: MISC BASE D57B8D6C7A4E lea r21, ptr [r26+r31*2+0x4e] +XDIS 20fe2: MISC BASE D57B8D6C7B4F lea r21, ptr [r27+r31*2+0x4f] +XDIS 20fe8: MISC BASE D57B8D6C7C50 lea r21, ptr [r28+r31*2+0x50] +XDIS 20fee: MISC BASE D57B8D6C7D51 lea r21, ptr [r29+r31*2+0x51] +XDIS 20ff4: MISC BASE D57B8D6C7E52 lea r21, ptr [r30+r31*2+0x52] +XDIS 20ffa: MISC BASE D57B8D6C7F53 lea r21, ptr [r31+r31*2+0x53] +XDIS 21000: MISC BASE D5488D744016 lea r22, ptr [rax+rax*2+0x16] +XDIS 21006: MISC BASE D5488D744117 lea r22, ptr [rcx+rax*2+0x17] +XDIS 2100c: MISC BASE D5488D744218 lea r22, ptr [rdx+rax*2+0x18] +XDIS 21012: MISC BASE D5488D744319 lea r22, ptr [rbx+rax*2+0x19] +XDIS 21018: MISC BASE D5488D74441A lea r22, ptr [rsp+rax*2+0x1a] +XDIS 2101e: MISC BASE D5488D74451B lea r22, ptr [rbp+rax*2+0x1b] +XDIS 21024: MISC BASE D5488D74461C lea r22, ptr [rsi+rax*2+0x1c] +XDIS 2102a: MISC BASE D5488D74471D lea r22, ptr [rdi+rax*2+0x1d] +XDIS 21030: MISC BASE D5498D74401E lea r22, ptr [r8+rax*2+0x1e] +XDIS 21036: MISC BASE D5498D74411F lea r22, ptr [r9+rax*2+0x1f] +XDIS 2103c: MISC BASE D5498D744220 lea r22, ptr [r10+rax*2+0x20] +XDIS 21042: MISC BASE D5498D744321 lea r22, ptr [r11+rax*2+0x21] +XDIS 21048: MISC BASE D5498D744422 lea r22, ptr [r12+rax*2+0x22] +XDIS 2104e: MISC BASE D5498D744523 lea r22, ptr [r13+rax*2+0x23] +XDIS 21054: MISC BASE D5498D744624 lea r22, ptr [r14+rax*2+0x24] +XDIS 2105a: MISC BASE D5498D744725 lea r22, ptr [r15+rax*2+0x25] +XDIS 21060: MISC BASE D5588D744026 lea r22, ptr [r16+rax*2+0x26] +XDIS 21066: MISC BASE D5588D744127 lea r22, ptr [r17+rax*2+0x27] +XDIS 2106c: MISC BASE D5588D744228 lea r22, ptr [r18+rax*2+0x28] +XDIS 21072: MISC BASE D5588D744329 lea r22, ptr [r19+rax*2+0x29] +XDIS 21078: MISC BASE D5588D74442A lea r22, ptr [r20+rax*2+0x2a] +XDIS 2107e: MISC BASE D5588D74452B lea r22, ptr [r21+rax*2+0x2b] +XDIS 21084: MISC BASE D5588D74462C lea r22, ptr [r22+rax*2+0x2c] +XDIS 2108a: MISC BASE D5588D74472D lea r22, ptr [r23+rax*2+0x2d] +XDIS 21090: MISC BASE D5598D74402E lea r22, ptr [r24+rax*2+0x2e] +XDIS 21096: MISC BASE D5598D74412F lea r22, ptr [r25+rax*2+0x2f] +XDIS 2109c: MISC BASE D5598D744230 lea r22, ptr [r26+rax*2+0x30] +XDIS 210a2: MISC BASE D5598D744331 lea r22, ptr [r27+rax*2+0x31] +XDIS 210a8: MISC BASE D5598D744432 lea r22, ptr [r28+rax*2+0x32] +XDIS 210ae: MISC BASE D5598D744533 lea r22, ptr [r29+rax*2+0x33] +XDIS 210b4: MISC BASE D5598D744634 lea r22, ptr [r30+rax*2+0x34] +XDIS 210ba: MISC BASE D5598D744735 lea r22, ptr [r31+rax*2+0x35] +XDIS 210c0: MISC BASE D5488D744817 lea r22, ptr [rax+rcx*2+0x17] +XDIS 210c6: MISC BASE D5488D744918 lea r22, ptr [rcx+rcx*2+0x18] +XDIS 210cc: MISC BASE D5488D744A19 lea r22, ptr [rdx+rcx*2+0x19] +XDIS 210d2: MISC BASE D5488D744B1A lea r22, ptr [rbx+rcx*2+0x1a] +XDIS 210d8: MISC BASE D5488D744C1B lea r22, ptr [rsp+rcx*2+0x1b] +XDIS 210de: MISC BASE D5488D744D1C lea r22, ptr [rbp+rcx*2+0x1c] +XDIS 210e4: MISC BASE D5488D744E1D lea r22, ptr [rsi+rcx*2+0x1d] +XDIS 210ea: MISC BASE D5488D744F1E lea r22, ptr [rdi+rcx*2+0x1e] +XDIS 210f0: MISC BASE D5498D74481F lea r22, ptr [r8+rcx*2+0x1f] +XDIS 210f6: MISC BASE D5498D744920 lea r22, ptr [r9+rcx*2+0x20] +XDIS 210fc: MISC BASE D5498D744A21 lea r22, ptr [r10+rcx*2+0x21] +XDIS 21102: MISC BASE D5498D744B22 lea r22, ptr [r11+rcx*2+0x22] +XDIS 21108: MISC BASE D5498D744C23 lea r22, ptr [r12+rcx*2+0x23] +XDIS 2110e: MISC BASE D5498D744D24 lea r22, ptr [r13+rcx*2+0x24] +XDIS 21114: MISC BASE D5498D744E25 lea r22, ptr [r14+rcx*2+0x25] +XDIS 2111a: MISC BASE D5498D744F26 lea r22, ptr [r15+rcx*2+0x26] +XDIS 21120: MISC BASE D5588D744827 lea r22, ptr [r16+rcx*2+0x27] +XDIS 21126: MISC BASE D5588D744928 lea r22, ptr [r17+rcx*2+0x28] +XDIS 2112c: MISC BASE D5588D744A29 lea r22, ptr [r18+rcx*2+0x29] +XDIS 21132: MISC BASE D5588D744B2A lea r22, ptr [r19+rcx*2+0x2a] +XDIS 21138: MISC BASE D5588D744C2B lea r22, ptr [r20+rcx*2+0x2b] +XDIS 2113e: MISC BASE D5588D744D2C lea r22, ptr [r21+rcx*2+0x2c] +XDIS 21144: MISC BASE D5588D744E2D lea r22, ptr [r22+rcx*2+0x2d] +XDIS 2114a: MISC BASE D5588D744F2E lea r22, ptr [r23+rcx*2+0x2e] +XDIS 21150: MISC BASE D5598D74482F lea r22, ptr [r24+rcx*2+0x2f] +XDIS 21156: MISC BASE D5598D744930 lea r22, ptr [r25+rcx*2+0x30] +XDIS 2115c: MISC BASE D5598D744A31 lea r22, ptr [r26+rcx*2+0x31] +XDIS 21162: MISC BASE D5598D744B32 lea r22, ptr [r27+rcx*2+0x32] +XDIS 21168: MISC BASE D5598D744C33 lea r22, ptr [r28+rcx*2+0x33] +XDIS 2116e: MISC BASE D5598D744D34 lea r22, ptr [r29+rcx*2+0x34] +XDIS 21174: MISC BASE D5598D744E35 lea r22, ptr [r30+rcx*2+0x35] +XDIS 2117a: MISC BASE D5598D744F36 lea r22, ptr [r31+rcx*2+0x36] +XDIS 21180: MISC BASE D5488D745018 lea r22, ptr [rax+rdx*2+0x18] +XDIS 21186: MISC BASE D5488D745119 lea r22, ptr [rcx+rdx*2+0x19] +XDIS 2118c: MISC BASE D5488D74521A lea r22, ptr [rdx+rdx*2+0x1a] +XDIS 21192: MISC BASE D5488D74531B lea r22, ptr [rbx+rdx*2+0x1b] +XDIS 21198: MISC BASE D5488D74541C lea r22, ptr [rsp+rdx*2+0x1c] +XDIS 2119e: MISC BASE D5488D74551D lea r22, ptr [rbp+rdx*2+0x1d] +XDIS 211a4: MISC BASE D5488D74561E lea r22, ptr [rsi+rdx*2+0x1e] +XDIS 211aa: MISC BASE D5488D74571F lea r22, ptr [rdi+rdx*2+0x1f] +XDIS 211b0: MISC BASE D5498D745020 lea r22, ptr [r8+rdx*2+0x20] +XDIS 211b6: MISC BASE D5498D745121 lea r22, ptr [r9+rdx*2+0x21] +XDIS 211bc: MISC BASE D5498D745222 lea r22, ptr [r10+rdx*2+0x22] +XDIS 211c2: MISC BASE D5498D745323 lea r22, ptr [r11+rdx*2+0x23] +XDIS 211c8: MISC BASE D5498D745424 lea r22, ptr [r12+rdx*2+0x24] +XDIS 211ce: MISC BASE D5498D745525 lea r22, ptr [r13+rdx*2+0x25] +XDIS 211d4: MISC BASE D5498D745626 lea r22, ptr [r14+rdx*2+0x26] +XDIS 211da: MISC BASE D5498D745727 lea r22, ptr [r15+rdx*2+0x27] +XDIS 211e0: MISC BASE D5588D745028 lea r22, ptr [r16+rdx*2+0x28] +XDIS 211e6: MISC BASE D5588D745129 lea r22, ptr [r17+rdx*2+0x29] +XDIS 211ec: MISC BASE D5588D74522A lea r22, ptr [r18+rdx*2+0x2a] +XDIS 211f2: MISC BASE D5588D74532B lea r22, ptr [r19+rdx*2+0x2b] +XDIS 211f8: MISC BASE D5588D74542C lea r22, ptr [r20+rdx*2+0x2c] +XDIS 211fe: MISC BASE D5588D74552D lea r22, ptr [r21+rdx*2+0x2d] +XDIS 21204: MISC BASE D5588D74562E lea r22, ptr [r22+rdx*2+0x2e] +XDIS 2120a: MISC BASE D5588D74572F lea r22, ptr [r23+rdx*2+0x2f] +XDIS 21210: MISC BASE D5598D745030 lea r22, ptr [r24+rdx*2+0x30] +XDIS 21216: MISC BASE D5598D745131 lea r22, ptr [r25+rdx*2+0x31] +XDIS 2121c: MISC BASE D5598D745232 lea r22, ptr [r26+rdx*2+0x32] +XDIS 21222: MISC BASE D5598D745333 lea r22, ptr [r27+rdx*2+0x33] +XDIS 21228: MISC BASE D5598D745434 lea r22, ptr [r28+rdx*2+0x34] +XDIS 2122e: MISC BASE D5598D745535 lea r22, ptr [r29+rdx*2+0x35] +XDIS 21234: MISC BASE D5598D745636 lea r22, ptr [r30+rdx*2+0x36] +XDIS 2123a: MISC BASE D5598D745737 lea r22, ptr [r31+rdx*2+0x37] +XDIS 21240: MISC BASE D5488D745819 lea r22, ptr [rax+rbx*2+0x19] +XDIS 21246: MISC BASE D5488D74591A lea r22, ptr [rcx+rbx*2+0x1a] +XDIS 2124c: MISC BASE D5488D745A1B lea r22, ptr [rdx+rbx*2+0x1b] +XDIS 21252: MISC BASE D5488D745B1C lea r22, ptr [rbx+rbx*2+0x1c] +XDIS 21258: MISC BASE D5488D745C1D lea r22, ptr [rsp+rbx*2+0x1d] +XDIS 2125e: MISC BASE D5488D745D1E lea r22, ptr [rbp+rbx*2+0x1e] +XDIS 21264: MISC BASE D5488D745E1F lea r22, ptr [rsi+rbx*2+0x1f] +XDIS 2126a: MISC BASE D5488D745F20 lea r22, ptr [rdi+rbx*2+0x20] +XDIS 21270: MISC BASE D5498D745821 lea r22, ptr [r8+rbx*2+0x21] +XDIS 21276: MISC BASE D5498D745922 lea r22, ptr [r9+rbx*2+0x22] +XDIS 2127c: MISC BASE D5498D745A23 lea r22, ptr [r10+rbx*2+0x23] +XDIS 21282: MISC BASE D5498D745B24 lea r22, ptr [r11+rbx*2+0x24] +XDIS 21288: MISC BASE D5498D745C25 lea r22, ptr [r12+rbx*2+0x25] +XDIS 2128e: MISC BASE D5498D745D26 lea r22, ptr [r13+rbx*2+0x26] +XDIS 21294: MISC BASE D5498D745E27 lea r22, ptr [r14+rbx*2+0x27] +XDIS 2129a: MISC BASE D5498D745F28 lea r22, ptr [r15+rbx*2+0x28] +XDIS 212a0: MISC BASE D5588D745829 lea r22, ptr [r16+rbx*2+0x29] +XDIS 212a6: MISC BASE D5588D74592A lea r22, ptr [r17+rbx*2+0x2a] +XDIS 212ac: MISC BASE D5588D745A2B lea r22, ptr [r18+rbx*2+0x2b] +XDIS 212b2: MISC BASE D5588D745B2C lea r22, ptr [r19+rbx*2+0x2c] +XDIS 212b8: MISC BASE D5588D745C2D lea r22, ptr [r20+rbx*2+0x2d] +XDIS 212be: MISC BASE D5588D745D2E lea r22, ptr [r21+rbx*2+0x2e] +XDIS 212c4: MISC BASE D5588D745E2F lea r22, ptr [r22+rbx*2+0x2f] +XDIS 212ca: MISC BASE D5588D745F30 lea r22, ptr [r23+rbx*2+0x30] +XDIS 212d0: MISC BASE D5598D745831 lea r22, ptr [r24+rbx*2+0x31] +XDIS 212d6: MISC BASE D5598D745932 lea r22, ptr [r25+rbx*2+0x32] +XDIS 212dc: MISC BASE D5598D745A33 lea r22, ptr [r26+rbx*2+0x33] +XDIS 212e2: MISC BASE D5598D745B34 lea r22, ptr [r27+rbx*2+0x34] +XDIS 212e8: MISC BASE D5598D745C35 lea r22, ptr [r28+rbx*2+0x35] +XDIS 212ee: MISC BASE D5598D745D36 lea r22, ptr [r29+rbx*2+0x36] +XDIS 212f4: MISC BASE D5598D745E37 lea r22, ptr [r30+rbx*2+0x37] +XDIS 212fa: MISC BASE D5598D745F38 lea r22, ptr [r31+rbx*2+0x38] +XDIS 21300: MISC BASE D5488D74601A lea r22, ptr [rax+0x1a] +XDIS 21306: MISC BASE D5488D74611B lea r22, ptr [rcx+0x1b] +XDIS 2130c: MISC BASE D5488D74621C lea r22, ptr [rdx+0x1c] +XDIS 21312: MISC BASE D5488D74631D lea r22, ptr [rbx+0x1d] +XDIS 21318: MISC BASE D5488D74641E lea r22, ptr [rsp+0x1e] +XDIS 2131e: MISC BASE D5488D74651F lea r22, ptr [rbp+0x1f] +XDIS 21324: MISC BASE D5488D746620 lea r22, ptr [rsi+0x20] +XDIS 2132a: MISC BASE D5488D746721 lea r22, ptr [rdi+0x21] +XDIS 21330: MISC BASE D5498D746022 lea r22, ptr [r8+0x22] +XDIS 21336: MISC BASE D5498D746123 lea r22, ptr [r9+0x23] +XDIS 2133c: MISC BASE D5498D746224 lea r22, ptr [r10+0x24] +XDIS 21342: MISC BASE D5498D746325 lea r22, ptr [r11+0x25] +XDIS 21348: MISC BASE D5498D746426 lea r22, ptr [r12+0x26] +XDIS 2134e: MISC BASE D5498D746527 lea r22, ptr [r13+0x27] +XDIS 21354: MISC BASE D5498D746628 lea r22, ptr [r14+0x28] +XDIS 2135a: MISC BASE D5498D746729 lea r22, ptr [r15+0x29] +XDIS 21360: MISC BASE D5588D74602A lea r22, ptr [r16+0x2a] +XDIS 21366: MISC BASE D5588D74612B lea r22, ptr [r17+0x2b] +XDIS 2136c: MISC BASE D5588D74622C lea r22, ptr [r18+0x2c] +XDIS 21372: MISC BASE D5588D74632D lea r22, ptr [r19+0x2d] +XDIS 21378: MISC BASE D5588D74642E lea r22, ptr [r20+0x2e] +XDIS 2137e: MISC BASE D5588D74652F lea r22, ptr [r21+0x2f] +XDIS 21384: MISC BASE D5588D746630 lea r22, ptr [r22+0x30] +XDIS 2138a: MISC BASE D5588D746731 lea r22, ptr [r23+0x31] +XDIS 21390: MISC BASE D5598D746032 lea r22, ptr [r24+0x32] +XDIS 21396: MISC BASE D5598D746133 lea r22, ptr [r25+0x33] +XDIS 2139c: MISC BASE D5598D746234 lea r22, ptr [r26+0x34] +XDIS 213a2: MISC BASE D5598D746335 lea r22, ptr [r27+0x35] +XDIS 213a8: MISC BASE D5598D746436 lea r22, ptr [r28+0x36] +XDIS 213ae: MISC BASE D5598D746537 lea r22, ptr [r29+0x37] +XDIS 213b4: MISC BASE D5598D746638 lea r22, ptr [r30+0x38] +XDIS 213ba: MISC BASE D5598D746739 lea r22, ptr [r31+0x39] +XDIS 213c0: MISC BASE D5488D74681B lea r22, ptr [rax+rbp*2+0x1b] +XDIS 213c6: MISC BASE D5488D74691C lea r22, ptr [rcx+rbp*2+0x1c] +XDIS 213cc: MISC BASE D5488D746A1D lea r22, ptr [rdx+rbp*2+0x1d] +XDIS 213d2: MISC BASE D5488D746B1E lea r22, ptr [rbx+rbp*2+0x1e] +XDIS 213d8: MISC BASE D5488D746C1F lea r22, ptr [rsp+rbp*2+0x1f] +XDIS 213de: MISC BASE D5488D746D20 lea r22, ptr [rbp+rbp*2+0x20] +XDIS 213e4: MISC BASE D5488D746E21 lea r22, ptr [rsi+rbp*2+0x21] +XDIS 213ea: MISC BASE D5488D746F22 lea r22, ptr [rdi+rbp*2+0x22] +XDIS 213f0: MISC BASE D5498D746823 lea r22, ptr [r8+rbp*2+0x23] +XDIS 213f6: MISC BASE D5498D746924 lea r22, ptr [r9+rbp*2+0x24] +XDIS 213fc: MISC BASE D5498D746A25 lea r22, ptr [r10+rbp*2+0x25] +XDIS 21402: MISC BASE D5498D746B26 lea r22, ptr [r11+rbp*2+0x26] +XDIS 21408: MISC BASE D5498D746C27 lea r22, ptr [r12+rbp*2+0x27] +XDIS 2140e: MISC BASE D5498D746D28 lea r22, ptr [r13+rbp*2+0x28] +XDIS 21414: MISC BASE D5498D746E29 lea r22, ptr [r14+rbp*2+0x29] +XDIS 2141a: MISC BASE D5498D746F2A lea r22, ptr [r15+rbp*2+0x2a] +XDIS 21420: MISC BASE D5588D74682B lea r22, ptr [r16+rbp*2+0x2b] +XDIS 21426: MISC BASE D5588D74692C lea r22, ptr [r17+rbp*2+0x2c] +XDIS 2142c: MISC BASE D5588D746A2D lea r22, ptr [r18+rbp*2+0x2d] +XDIS 21432: MISC BASE D5588D746B2E lea r22, ptr [r19+rbp*2+0x2e] +XDIS 21438: MISC BASE D5588D746C2F lea r22, ptr [r20+rbp*2+0x2f] +XDIS 2143e: MISC BASE D5588D746D30 lea r22, ptr [r21+rbp*2+0x30] +XDIS 21444: MISC BASE D5588D746E31 lea r22, ptr [r22+rbp*2+0x31] +XDIS 2144a: MISC BASE D5588D746F32 lea r22, ptr [r23+rbp*2+0x32] +XDIS 21450: MISC BASE D5598D746833 lea r22, ptr [r24+rbp*2+0x33] +XDIS 21456: MISC BASE D5598D746934 lea r22, ptr [r25+rbp*2+0x34] +XDIS 2145c: MISC BASE D5598D746A35 lea r22, ptr [r26+rbp*2+0x35] +XDIS 21462: MISC BASE D5598D746B36 lea r22, ptr [r27+rbp*2+0x36] +XDIS 21468: MISC BASE D5598D746C37 lea r22, ptr [r28+rbp*2+0x37] +XDIS 2146e: MISC BASE D5598D746D38 lea r22, ptr [r29+rbp*2+0x38] +XDIS 21474: MISC BASE D5598D746E39 lea r22, ptr [r30+rbp*2+0x39] +XDIS 2147a: MISC BASE D5598D746F3A lea r22, ptr [r31+rbp*2+0x3a] +XDIS 21480: MISC BASE D5488D74701C lea r22, ptr [rax+rsi*2+0x1c] +XDIS 21486: MISC BASE D5488D74711D lea r22, ptr [rcx+rsi*2+0x1d] +XDIS 2148c: MISC BASE D5488D74721E lea r22, ptr [rdx+rsi*2+0x1e] +XDIS 21492: MISC BASE D5488D74731F lea r22, ptr [rbx+rsi*2+0x1f] +XDIS 21498: MISC BASE D5488D747420 lea r22, ptr [rsp+rsi*2+0x20] +XDIS 2149e: MISC BASE D5488D747521 lea r22, ptr [rbp+rsi*2+0x21] +XDIS 214a4: MISC BASE D5488D747622 lea r22, ptr [rsi+rsi*2+0x22] +XDIS 214aa: MISC BASE D5488D747723 lea r22, ptr [rdi+rsi*2+0x23] +XDIS 214b0: MISC BASE D5498D747024 lea r22, ptr [r8+rsi*2+0x24] +XDIS 214b6: MISC BASE D5498D747125 lea r22, ptr [r9+rsi*2+0x25] +XDIS 214bc: MISC BASE D5498D747226 lea r22, ptr [r10+rsi*2+0x26] +XDIS 214c2: MISC BASE D5498D747327 lea r22, ptr [r11+rsi*2+0x27] +XDIS 214c8: MISC BASE D5498D747428 lea r22, ptr [r12+rsi*2+0x28] +XDIS 214ce: MISC BASE D5498D747529 lea r22, ptr [r13+rsi*2+0x29] +XDIS 214d4: MISC BASE D5498D74762A lea r22, ptr [r14+rsi*2+0x2a] +XDIS 214da: MISC BASE D5498D74772B lea r22, ptr [r15+rsi*2+0x2b] +XDIS 214e0: MISC BASE D5588D74702C lea r22, ptr [r16+rsi*2+0x2c] +XDIS 214e6: MISC BASE D5588D74712D lea r22, ptr [r17+rsi*2+0x2d] +XDIS 214ec: MISC BASE D5588D74722E lea r22, ptr [r18+rsi*2+0x2e] +XDIS 214f2: MISC BASE D5588D74732F lea r22, ptr [r19+rsi*2+0x2f] +XDIS 214f8: MISC BASE D5588D747430 lea r22, ptr [r20+rsi*2+0x30] +XDIS 214fe: MISC BASE D5588D747531 lea r22, ptr [r21+rsi*2+0x31] +XDIS 21504: MISC BASE D5588D747632 lea r22, ptr [r22+rsi*2+0x32] +XDIS 2150a: MISC BASE D5588D747733 lea r22, ptr [r23+rsi*2+0x33] +XDIS 21510: MISC BASE D5598D747034 lea r22, ptr [r24+rsi*2+0x34] +XDIS 21516: MISC BASE D5598D747135 lea r22, ptr [r25+rsi*2+0x35] +XDIS 2151c: MISC BASE D5598D747236 lea r22, ptr [r26+rsi*2+0x36] +XDIS 21522: MISC BASE D5598D747337 lea r22, ptr [r27+rsi*2+0x37] +XDIS 21528: MISC BASE D5598D747438 lea r22, ptr [r28+rsi*2+0x38] +XDIS 2152e: MISC BASE D5598D747539 lea r22, ptr [r29+rsi*2+0x39] +XDIS 21534: MISC BASE D5598D74763A lea r22, ptr [r30+rsi*2+0x3a] +XDIS 2153a: MISC BASE D5598D74773B lea r22, ptr [r31+rsi*2+0x3b] +XDIS 21540: MISC BASE D5488D74781D lea r22, ptr [rax+rdi*2+0x1d] +XDIS 21546: MISC BASE D5488D74791E lea r22, ptr [rcx+rdi*2+0x1e] +XDIS 2154c: MISC BASE D5488D747A1F lea r22, ptr [rdx+rdi*2+0x1f] +XDIS 21552: MISC BASE D5488D747B20 lea r22, ptr [rbx+rdi*2+0x20] +XDIS 21558: MISC BASE D5488D747C21 lea r22, ptr [rsp+rdi*2+0x21] +XDIS 2155e: MISC BASE D5488D747D22 lea r22, ptr [rbp+rdi*2+0x22] +XDIS 21564: MISC BASE D5488D747E23 lea r22, ptr [rsi+rdi*2+0x23] +XDIS 2156a: MISC BASE D5488D747F24 lea r22, ptr [rdi+rdi*2+0x24] +XDIS 21570: MISC BASE D5498D747825 lea r22, ptr [r8+rdi*2+0x25] +XDIS 21576: MISC BASE D5498D747926 lea r22, ptr [r9+rdi*2+0x26] +XDIS 2157c: MISC BASE D5498D747A27 lea r22, ptr [r10+rdi*2+0x27] +XDIS 21582: MISC BASE D5498D747B28 lea r22, ptr [r11+rdi*2+0x28] +XDIS 21588: MISC BASE D5498D747C29 lea r22, ptr [r12+rdi*2+0x29] +XDIS 2158e: MISC BASE D5498D747D2A lea r22, ptr [r13+rdi*2+0x2a] +XDIS 21594: MISC BASE D5498D747E2B lea r22, ptr [r14+rdi*2+0x2b] +XDIS 2159a: MISC BASE D5498D747F2C lea r22, ptr [r15+rdi*2+0x2c] +XDIS 215a0: MISC BASE D5588D74782D lea r22, ptr [r16+rdi*2+0x2d] +XDIS 215a6: MISC BASE D5588D74792E lea r22, ptr [r17+rdi*2+0x2e] +XDIS 215ac: MISC BASE D5588D747A2F lea r22, ptr [r18+rdi*2+0x2f] +XDIS 215b2: MISC BASE D5588D747B30 lea r22, ptr [r19+rdi*2+0x30] +XDIS 215b8: MISC BASE D5588D747C31 lea r22, ptr [r20+rdi*2+0x31] +XDIS 215be: MISC BASE D5588D747D32 lea r22, ptr [r21+rdi*2+0x32] +XDIS 215c4: MISC BASE D5588D747E33 lea r22, ptr [r22+rdi*2+0x33] +XDIS 215ca: MISC BASE D5588D747F34 lea r22, ptr [r23+rdi*2+0x34] +XDIS 215d0: MISC BASE D5598D747835 lea r22, ptr [r24+rdi*2+0x35] +XDIS 215d6: MISC BASE D5598D747936 lea r22, ptr [r25+rdi*2+0x36] +XDIS 215dc: MISC BASE D5598D747A37 lea r22, ptr [r26+rdi*2+0x37] +XDIS 215e2: MISC BASE D5598D747B38 lea r22, ptr [r27+rdi*2+0x38] +XDIS 215e8: MISC BASE D5598D747C39 lea r22, ptr [r28+rdi*2+0x39] +XDIS 215ee: MISC BASE D5598D747D3A lea r22, ptr [r29+rdi*2+0x3a] +XDIS 215f4: MISC BASE D5598D747E3B lea r22, ptr [r30+rdi*2+0x3b] +XDIS 215fa: MISC BASE D5598D747F3C lea r22, ptr [r31+rdi*2+0x3c] +XDIS 21600: MISC BASE D54A8D74401E lea r22, ptr [rax+r8*2+0x1e] +XDIS 21606: MISC BASE D54A8D74411F lea r22, ptr [rcx+r8*2+0x1f] +XDIS 2160c: MISC BASE D54A8D744220 lea r22, ptr [rdx+r8*2+0x20] +XDIS 21612: MISC BASE D54A8D744321 lea r22, ptr [rbx+r8*2+0x21] +XDIS 21618: MISC BASE D54A8D744422 lea r22, ptr [rsp+r8*2+0x22] +XDIS 2161e: MISC BASE D54A8D744523 lea r22, ptr [rbp+r8*2+0x23] +XDIS 21624: MISC BASE D54A8D744624 lea r22, ptr [rsi+r8*2+0x24] +XDIS 2162a: MISC BASE D54A8D744725 lea r22, ptr [rdi+r8*2+0x25] +XDIS 21630: MISC BASE D54B8D744026 lea r22, ptr [r8+r8*2+0x26] +XDIS 21636: MISC BASE D54B8D744127 lea r22, ptr [r9+r8*2+0x27] +XDIS 2163c: MISC BASE D54B8D744228 lea r22, ptr [r10+r8*2+0x28] +XDIS 21642: MISC BASE D54B8D744329 lea r22, ptr [r11+r8*2+0x29] +XDIS 21648: MISC BASE D54B8D74442A lea r22, ptr [r12+r8*2+0x2a] +XDIS 2164e: MISC BASE D54B8D74452B lea r22, ptr [r13+r8*2+0x2b] +XDIS 21654: MISC BASE D54B8D74462C lea r22, ptr [r14+r8*2+0x2c] +XDIS 2165a: MISC BASE D54B8D74472D lea r22, ptr [r15+r8*2+0x2d] +XDIS 21660: MISC BASE D55A8D74402E lea r22, ptr [r16+r8*2+0x2e] +XDIS 21666: MISC BASE D55A8D74412F lea r22, ptr [r17+r8*2+0x2f] +XDIS 2166c: MISC BASE D55A8D744230 lea r22, ptr [r18+r8*2+0x30] +XDIS 21672: MISC BASE D55A8D744331 lea r22, ptr [r19+r8*2+0x31] +XDIS 21678: MISC BASE D55A8D744432 lea r22, ptr [r20+r8*2+0x32] +XDIS 2167e: MISC BASE D55A8D744533 lea r22, ptr [r21+r8*2+0x33] +XDIS 21684: MISC BASE D55A8D744634 lea r22, ptr [r22+r8*2+0x34] +XDIS 2168a: MISC BASE D55A8D744735 lea r22, ptr [r23+r8*2+0x35] +XDIS 21690: MISC BASE D55B8D744036 lea r22, ptr [r24+r8*2+0x36] +XDIS 21696: MISC BASE D55B8D744137 lea r22, ptr [r25+r8*2+0x37] +XDIS 2169c: MISC BASE D55B8D744238 lea r22, ptr [r26+r8*2+0x38] +XDIS 216a2: MISC BASE D55B8D744339 lea r22, ptr [r27+r8*2+0x39] +XDIS 216a8: MISC BASE D55B8D74443A lea r22, ptr [r28+r8*2+0x3a] +XDIS 216ae: MISC BASE D55B8D74453B lea r22, ptr [r29+r8*2+0x3b] +XDIS 216b4: MISC BASE D55B8D74463C lea r22, ptr [r30+r8*2+0x3c] +XDIS 216ba: MISC BASE D55B8D74473D lea r22, ptr [r31+r8*2+0x3d] +XDIS 216c0: MISC BASE D54A8D74481F lea r22, ptr [rax+r9*2+0x1f] +XDIS 216c6: MISC BASE D54A8D744920 lea r22, ptr [rcx+r9*2+0x20] +XDIS 216cc: MISC BASE D54A8D744A21 lea r22, ptr [rdx+r9*2+0x21] +XDIS 216d2: MISC BASE D54A8D744B22 lea r22, ptr [rbx+r9*2+0x22] +XDIS 216d8: MISC BASE D54A8D744C23 lea r22, ptr [rsp+r9*2+0x23] +XDIS 216de: MISC BASE D54A8D744D24 lea r22, ptr [rbp+r9*2+0x24] +XDIS 216e4: MISC BASE D54A8D744E25 lea r22, ptr [rsi+r9*2+0x25] +XDIS 216ea: MISC BASE D54A8D744F26 lea r22, ptr [rdi+r9*2+0x26] +XDIS 216f0: MISC BASE D54B8D744827 lea r22, ptr [r8+r9*2+0x27] +XDIS 216f6: MISC BASE D54B8D744928 lea r22, ptr [r9+r9*2+0x28] +XDIS 216fc: MISC BASE D54B8D744A29 lea r22, ptr [r10+r9*2+0x29] +XDIS 21702: MISC BASE D54B8D744B2A lea r22, ptr [r11+r9*2+0x2a] +XDIS 21708: MISC BASE D54B8D744C2B lea r22, ptr [r12+r9*2+0x2b] +XDIS 2170e: MISC BASE D54B8D744D2C lea r22, ptr [r13+r9*2+0x2c] +XDIS 21714: MISC BASE D54B8D744E2D lea r22, ptr [r14+r9*2+0x2d] +XDIS 2171a: MISC BASE D54B8D744F2E lea r22, ptr [r15+r9*2+0x2e] +XDIS 21720: MISC BASE D55A8D74482F lea r22, ptr [r16+r9*2+0x2f] +XDIS 21726: MISC BASE D55A8D744930 lea r22, ptr [r17+r9*2+0x30] +XDIS 2172c: MISC BASE D55A8D744A31 lea r22, ptr [r18+r9*2+0x31] +XDIS 21732: MISC BASE D55A8D744B32 lea r22, ptr [r19+r9*2+0x32] +XDIS 21738: MISC BASE D55A8D744C33 lea r22, ptr [r20+r9*2+0x33] +XDIS 2173e: MISC BASE D55A8D744D34 lea r22, ptr [r21+r9*2+0x34] +XDIS 21744: MISC BASE D55A8D744E35 lea r22, ptr [r22+r9*2+0x35] +XDIS 2174a: MISC BASE D55A8D744F36 lea r22, ptr [r23+r9*2+0x36] +XDIS 21750: MISC BASE D55B8D744837 lea r22, ptr [r24+r9*2+0x37] +XDIS 21756: MISC BASE D55B8D744938 lea r22, ptr [r25+r9*2+0x38] +XDIS 2175c: MISC BASE D55B8D744A39 lea r22, ptr [r26+r9*2+0x39] +XDIS 21762: MISC BASE D55B8D744B3A lea r22, ptr [r27+r9*2+0x3a] +XDIS 21768: MISC BASE D55B8D744C3B lea r22, ptr [r28+r9*2+0x3b] +XDIS 2176e: MISC BASE D55B8D744D3C lea r22, ptr [r29+r9*2+0x3c] +XDIS 21774: MISC BASE D55B8D744E3D lea r22, ptr [r30+r9*2+0x3d] +XDIS 2177a: MISC BASE D55B8D744F3E lea r22, ptr [r31+r9*2+0x3e] +XDIS 21780: MISC BASE D54A8D745020 lea r22, ptr [rax+r10*2+0x20] +XDIS 21786: MISC BASE D54A8D745121 lea r22, ptr [rcx+r10*2+0x21] +XDIS 2178c: MISC BASE D54A8D745222 lea r22, ptr [rdx+r10*2+0x22] +XDIS 21792: MISC BASE D54A8D745323 lea r22, ptr [rbx+r10*2+0x23] +XDIS 21798: MISC BASE D54A8D745424 lea r22, ptr [rsp+r10*2+0x24] +XDIS 2179e: MISC BASE D54A8D745525 lea r22, ptr [rbp+r10*2+0x25] +XDIS 217a4: MISC BASE D54A8D745626 lea r22, ptr [rsi+r10*2+0x26] +XDIS 217aa: MISC BASE D54A8D745727 lea r22, ptr [rdi+r10*2+0x27] +XDIS 217b0: MISC BASE D54B8D745028 lea r22, ptr [r8+r10*2+0x28] +XDIS 217b6: MISC BASE D54B8D745129 lea r22, ptr [r9+r10*2+0x29] +XDIS 217bc: MISC BASE D54B8D74522A lea r22, ptr [r10+r10*2+0x2a] +XDIS 217c2: MISC BASE D54B8D74532B lea r22, ptr [r11+r10*2+0x2b] +XDIS 217c8: MISC BASE D54B8D74542C lea r22, ptr [r12+r10*2+0x2c] +XDIS 217ce: MISC BASE D54B8D74552D lea r22, ptr [r13+r10*2+0x2d] +XDIS 217d4: MISC BASE D54B8D74562E lea r22, ptr [r14+r10*2+0x2e] +XDIS 217da: MISC BASE D54B8D74572F lea r22, ptr [r15+r10*2+0x2f] +XDIS 217e0: MISC BASE D55A8D745030 lea r22, ptr [r16+r10*2+0x30] +XDIS 217e6: MISC BASE D55A8D745131 lea r22, ptr [r17+r10*2+0x31] +XDIS 217ec: MISC BASE D55A8D745232 lea r22, ptr [r18+r10*2+0x32] +XDIS 217f2: MISC BASE D55A8D745333 lea r22, ptr [r19+r10*2+0x33] +XDIS 217f8: MISC BASE D55A8D745434 lea r22, ptr [r20+r10*2+0x34] +XDIS 217fe: MISC BASE D55A8D745535 lea r22, ptr [r21+r10*2+0x35] +XDIS 21804: MISC BASE D55A8D745636 lea r22, ptr [r22+r10*2+0x36] +XDIS 2180a: MISC BASE D55A8D745737 lea r22, ptr [r23+r10*2+0x37] +XDIS 21810: MISC BASE D55B8D745038 lea r22, ptr [r24+r10*2+0x38] +XDIS 21816: MISC BASE D55B8D745139 lea r22, ptr [r25+r10*2+0x39] +XDIS 2181c: MISC BASE D55B8D74523A lea r22, ptr [r26+r10*2+0x3a] +XDIS 21822: MISC BASE D55B8D74533B lea r22, ptr [r27+r10*2+0x3b] +XDIS 21828: MISC BASE D55B8D74543C lea r22, ptr [r28+r10*2+0x3c] +XDIS 2182e: MISC BASE D55B8D74553D lea r22, ptr [r29+r10*2+0x3d] +XDIS 21834: MISC BASE D55B8D74563E lea r22, ptr [r30+r10*2+0x3e] +XDIS 2183a: MISC BASE D55B8D74573F lea r22, ptr [r31+r10*2+0x3f] +XDIS 21840: MISC BASE D54A8D745821 lea r22, ptr [rax+r11*2+0x21] +XDIS 21846: MISC BASE D54A8D745922 lea r22, ptr [rcx+r11*2+0x22] +XDIS 2184c: MISC BASE D54A8D745A23 lea r22, ptr [rdx+r11*2+0x23] +XDIS 21852: MISC BASE D54A8D745B24 lea r22, ptr [rbx+r11*2+0x24] +XDIS 21858: MISC BASE D54A8D745C25 lea r22, ptr [rsp+r11*2+0x25] +XDIS 2185e: MISC BASE D54A8D745D26 lea r22, ptr [rbp+r11*2+0x26] +XDIS 21864: MISC BASE D54A8D745E27 lea r22, ptr [rsi+r11*2+0x27] +XDIS 2186a: MISC BASE D54A8D745F28 lea r22, ptr [rdi+r11*2+0x28] +XDIS 21870: MISC BASE D54B8D745829 lea r22, ptr [r8+r11*2+0x29] +XDIS 21876: MISC BASE D54B8D74592A lea r22, ptr [r9+r11*2+0x2a] +XDIS 2187c: MISC BASE D54B8D745A2B lea r22, ptr [r10+r11*2+0x2b] +XDIS 21882: MISC BASE D54B8D745B2C lea r22, ptr [r11+r11*2+0x2c] +XDIS 21888: MISC BASE D54B8D745C2D lea r22, ptr [r12+r11*2+0x2d] +XDIS 2188e: MISC BASE D54B8D745D2E lea r22, ptr [r13+r11*2+0x2e] +XDIS 21894: MISC BASE D54B8D745E2F lea r22, ptr [r14+r11*2+0x2f] +XDIS 2189a: MISC BASE D54B8D745F30 lea r22, ptr [r15+r11*2+0x30] +XDIS 218a0: MISC BASE D55A8D745831 lea r22, ptr [r16+r11*2+0x31] +XDIS 218a6: MISC BASE D55A8D745932 lea r22, ptr [r17+r11*2+0x32] +XDIS 218ac: MISC BASE D55A8D745A33 lea r22, ptr [r18+r11*2+0x33] +XDIS 218b2: MISC BASE D55A8D745B34 lea r22, ptr [r19+r11*2+0x34] +XDIS 218b8: MISC BASE D55A8D745C35 lea r22, ptr [r20+r11*2+0x35] +XDIS 218be: MISC BASE D55A8D745D36 lea r22, ptr [r21+r11*2+0x36] +XDIS 218c4: MISC BASE D55A8D745E37 lea r22, ptr [r22+r11*2+0x37] +XDIS 218ca: MISC BASE D55A8D745F38 lea r22, ptr [r23+r11*2+0x38] +XDIS 218d0: MISC BASE D55B8D745839 lea r22, ptr [r24+r11*2+0x39] +XDIS 218d6: MISC BASE D55B8D74593A lea r22, ptr [r25+r11*2+0x3a] +XDIS 218dc: MISC BASE D55B8D745A3B lea r22, ptr [r26+r11*2+0x3b] +XDIS 218e2: MISC BASE D55B8D745B3C lea r22, ptr [r27+r11*2+0x3c] +XDIS 218e8: MISC BASE D55B8D745C3D lea r22, ptr [r28+r11*2+0x3d] +XDIS 218ee: MISC BASE D55B8D745D3E lea r22, ptr [r29+r11*2+0x3e] +XDIS 218f4: MISC BASE D55B8D745E3F lea r22, ptr [r30+r11*2+0x3f] +XDIS 218fa: MISC BASE D55B8D745F40 lea r22, ptr [r31+r11*2+0x40] +XDIS 21900: MISC BASE D54A8D746022 lea r22, ptr [rax+r12*2+0x22] +XDIS 21906: MISC BASE D54A8D746123 lea r22, ptr [rcx+r12*2+0x23] +XDIS 2190c: MISC BASE D54A8D746224 lea r22, ptr [rdx+r12*2+0x24] +XDIS 21912: MISC BASE D54A8D746325 lea r22, ptr [rbx+r12*2+0x25] +XDIS 21918: MISC BASE D54A8D746426 lea r22, ptr [rsp+r12*2+0x26] +XDIS 2191e: MISC BASE D54A8D746527 lea r22, ptr [rbp+r12*2+0x27] +XDIS 21924: MISC BASE D54A8D746628 lea r22, ptr [rsi+r12*2+0x28] +XDIS 2192a: MISC BASE D54A8D746729 lea r22, ptr [rdi+r12*2+0x29] +XDIS 21930: MISC BASE D54B8D74602A lea r22, ptr [r8+r12*2+0x2a] +XDIS 21936: MISC BASE D54B8D74612B lea r22, ptr [r9+r12*2+0x2b] +XDIS 2193c: MISC BASE D54B8D74622C lea r22, ptr [r10+r12*2+0x2c] +XDIS 21942: MISC BASE D54B8D74632D lea r22, ptr [r11+r12*2+0x2d] +XDIS 21948: MISC BASE D54B8D74642E lea r22, ptr [r12+r12*2+0x2e] +XDIS 2194e: MISC BASE D54B8D74652F lea r22, ptr [r13+r12*2+0x2f] +XDIS 21954: MISC BASE D54B8D746630 lea r22, ptr [r14+r12*2+0x30] +XDIS 2195a: MISC BASE D54B8D746731 lea r22, ptr [r15+r12*2+0x31] +XDIS 21960: MISC BASE D55A8D746032 lea r22, ptr [r16+r12*2+0x32] +XDIS 21966: MISC BASE D55A8D746133 lea r22, ptr [r17+r12*2+0x33] +XDIS 2196c: MISC BASE D55A8D746234 lea r22, ptr [r18+r12*2+0x34] +XDIS 21972: MISC BASE D55A8D746335 lea r22, ptr [r19+r12*2+0x35] +XDIS 21978: MISC BASE D55A8D746436 lea r22, ptr [r20+r12*2+0x36] +XDIS 2197e: MISC BASE D55A8D746537 lea r22, ptr [r21+r12*2+0x37] +XDIS 21984: MISC BASE D55A8D746638 lea r22, ptr [r22+r12*2+0x38] +XDIS 2198a: MISC BASE D55A8D746739 lea r22, ptr [r23+r12*2+0x39] +XDIS 21990: MISC BASE D55B8D74603A lea r22, ptr [r24+r12*2+0x3a] +XDIS 21996: MISC BASE D55B8D74613B lea r22, ptr [r25+r12*2+0x3b] +XDIS 2199c: MISC BASE D55B8D74623C lea r22, ptr [r26+r12*2+0x3c] +XDIS 219a2: MISC BASE D55B8D74633D lea r22, ptr [r27+r12*2+0x3d] +XDIS 219a8: MISC BASE D55B8D74643E lea r22, ptr [r28+r12*2+0x3e] +XDIS 219ae: MISC BASE D55B8D74653F lea r22, ptr [r29+r12*2+0x3f] +XDIS 219b4: MISC BASE D55B8D746640 lea r22, ptr [r30+r12*2+0x40] +XDIS 219ba: MISC BASE D55B8D746741 lea r22, ptr [r31+r12*2+0x41] +XDIS 219c0: MISC BASE D54A8D746823 lea r22, ptr [rax+r13*2+0x23] +XDIS 219c6: MISC BASE D54A8D746924 lea r22, ptr [rcx+r13*2+0x24] +XDIS 219cc: MISC BASE D54A8D746A25 lea r22, ptr [rdx+r13*2+0x25] +XDIS 219d2: MISC BASE D54A8D746B26 lea r22, ptr [rbx+r13*2+0x26] +XDIS 219d8: MISC BASE D54A8D746C27 lea r22, ptr [rsp+r13*2+0x27] +XDIS 219de: MISC BASE D54A8D746D28 lea r22, ptr [rbp+r13*2+0x28] +XDIS 219e4: MISC BASE D54A8D746E29 lea r22, ptr [rsi+r13*2+0x29] +XDIS 219ea: MISC BASE D54A8D746F2A lea r22, ptr [rdi+r13*2+0x2a] +XDIS 219f0: MISC BASE D54B8D74682B lea r22, ptr [r8+r13*2+0x2b] +XDIS 219f6: MISC BASE D54B8D74692C lea r22, ptr [r9+r13*2+0x2c] +XDIS 219fc: MISC BASE D54B8D746A2D lea r22, ptr [r10+r13*2+0x2d] +XDIS 21a02: MISC BASE D54B8D746B2E lea r22, ptr [r11+r13*2+0x2e] +XDIS 21a08: MISC BASE D54B8D746C2F lea r22, ptr [r12+r13*2+0x2f] +XDIS 21a0e: MISC BASE D54B8D746D30 lea r22, ptr [r13+r13*2+0x30] +XDIS 21a14: MISC BASE D54B8D746E31 lea r22, ptr [r14+r13*2+0x31] +XDIS 21a1a: MISC BASE D54B8D746F32 lea r22, ptr [r15+r13*2+0x32] +XDIS 21a20: MISC BASE D55A8D746833 lea r22, ptr [r16+r13*2+0x33] +XDIS 21a26: MISC BASE D55A8D746934 lea r22, ptr [r17+r13*2+0x34] +XDIS 21a2c: MISC BASE D55A8D746A35 lea r22, ptr [r18+r13*2+0x35] +XDIS 21a32: MISC BASE D55A8D746B36 lea r22, ptr [r19+r13*2+0x36] +XDIS 21a38: MISC BASE D55A8D746C37 lea r22, ptr [r20+r13*2+0x37] +XDIS 21a3e: MISC BASE D55A8D746D38 lea r22, ptr [r21+r13*2+0x38] +XDIS 21a44: MISC BASE D55A8D746E39 lea r22, ptr [r22+r13*2+0x39] +XDIS 21a4a: MISC BASE D55A8D746F3A lea r22, ptr [r23+r13*2+0x3a] +XDIS 21a50: MISC BASE D55B8D74683B lea r22, ptr [r24+r13*2+0x3b] +XDIS 21a56: MISC BASE D55B8D74693C lea r22, ptr [r25+r13*2+0x3c] +XDIS 21a5c: MISC BASE D55B8D746A3D lea r22, ptr [r26+r13*2+0x3d] +XDIS 21a62: MISC BASE D55B8D746B3E lea r22, ptr [r27+r13*2+0x3e] +XDIS 21a68: MISC BASE D55B8D746C3F lea r22, ptr [r28+r13*2+0x3f] +XDIS 21a6e: MISC BASE D55B8D746D40 lea r22, ptr [r29+r13*2+0x40] +XDIS 21a74: MISC BASE D55B8D746E41 lea r22, ptr [r30+r13*2+0x41] +XDIS 21a7a: MISC BASE D55B8D746F42 lea r22, ptr [r31+r13*2+0x42] +XDIS 21a80: MISC BASE D54A8D747024 lea r22, ptr [rax+r14*2+0x24] +XDIS 21a86: MISC BASE D54A8D747125 lea r22, ptr [rcx+r14*2+0x25] +XDIS 21a8c: MISC BASE D54A8D747226 lea r22, ptr [rdx+r14*2+0x26] +XDIS 21a92: MISC BASE D54A8D747327 lea r22, ptr [rbx+r14*2+0x27] +XDIS 21a98: MISC BASE D54A8D747428 lea r22, ptr [rsp+r14*2+0x28] +XDIS 21a9e: MISC BASE D54A8D747529 lea r22, ptr [rbp+r14*2+0x29] +XDIS 21aa4: MISC BASE D54A8D74762A lea r22, ptr [rsi+r14*2+0x2a] +XDIS 21aaa: MISC BASE D54A8D74772B lea r22, ptr [rdi+r14*2+0x2b] +XDIS 21ab0: MISC BASE D54B8D74702C lea r22, ptr [r8+r14*2+0x2c] +XDIS 21ab6: MISC BASE D54B8D74712D lea r22, ptr [r9+r14*2+0x2d] +XDIS 21abc: MISC BASE D54B8D74722E lea r22, ptr [r10+r14*2+0x2e] +XDIS 21ac2: MISC BASE D54B8D74732F lea r22, ptr [r11+r14*2+0x2f] +XDIS 21ac8: MISC BASE D54B8D747430 lea r22, ptr [r12+r14*2+0x30] +XDIS 21ace: MISC BASE D54B8D747531 lea r22, ptr [r13+r14*2+0x31] +XDIS 21ad4: MISC BASE D54B8D747632 lea r22, ptr [r14+r14*2+0x32] +XDIS 21ada: MISC BASE D54B8D747733 lea r22, ptr [r15+r14*2+0x33] +XDIS 21ae0: MISC BASE D55A8D747034 lea r22, ptr [r16+r14*2+0x34] +XDIS 21ae6: MISC BASE D55A8D747135 lea r22, ptr [r17+r14*2+0x35] +XDIS 21aec: MISC BASE D55A8D747236 lea r22, ptr [r18+r14*2+0x36] +XDIS 21af2: MISC BASE D55A8D747337 lea r22, ptr [r19+r14*2+0x37] +XDIS 21af8: MISC BASE D55A8D747438 lea r22, ptr [r20+r14*2+0x38] +XDIS 21afe: MISC BASE D55A8D747539 lea r22, ptr [r21+r14*2+0x39] +XDIS 21b04: MISC BASE D55A8D74763A lea r22, ptr [r22+r14*2+0x3a] +XDIS 21b0a: MISC BASE D55A8D74773B lea r22, ptr [r23+r14*2+0x3b] +XDIS 21b10: MISC BASE D55B8D74703C lea r22, ptr [r24+r14*2+0x3c] +XDIS 21b16: MISC BASE D55B8D74713D lea r22, ptr [r25+r14*2+0x3d] +XDIS 21b1c: MISC BASE D55B8D74723E lea r22, ptr [r26+r14*2+0x3e] +XDIS 21b22: MISC BASE D55B8D74733F lea r22, ptr [r27+r14*2+0x3f] +XDIS 21b28: MISC BASE D55B8D747440 lea r22, ptr [r28+r14*2+0x40] +XDIS 21b2e: MISC BASE D55B8D747541 lea r22, ptr [r29+r14*2+0x41] +XDIS 21b34: MISC BASE D55B8D747642 lea r22, ptr [r30+r14*2+0x42] +XDIS 21b3a: MISC BASE D55B8D747743 lea r22, ptr [r31+r14*2+0x43] +XDIS 21b40: MISC BASE D54A8D747825 lea r22, ptr [rax+r15*2+0x25] +XDIS 21b46: MISC BASE D54A8D747926 lea r22, ptr [rcx+r15*2+0x26] +XDIS 21b4c: MISC BASE D54A8D747A27 lea r22, ptr [rdx+r15*2+0x27] +XDIS 21b52: MISC BASE D54A8D747B28 lea r22, ptr [rbx+r15*2+0x28] +XDIS 21b58: MISC BASE D54A8D747C29 lea r22, ptr [rsp+r15*2+0x29] +XDIS 21b5e: MISC BASE D54A8D747D2A lea r22, ptr [rbp+r15*2+0x2a] +XDIS 21b64: MISC BASE D54A8D747E2B lea r22, ptr [rsi+r15*2+0x2b] +XDIS 21b6a: MISC BASE D54A8D747F2C lea r22, ptr [rdi+r15*2+0x2c] +XDIS 21b70: MISC BASE D54B8D74782D lea r22, ptr [r8+r15*2+0x2d] +XDIS 21b76: MISC BASE D54B8D74792E lea r22, ptr [r9+r15*2+0x2e] +XDIS 21b7c: MISC BASE D54B8D747A2F lea r22, ptr [r10+r15*2+0x2f] +XDIS 21b82: MISC BASE D54B8D747B30 lea r22, ptr [r11+r15*2+0x30] +XDIS 21b88: MISC BASE D54B8D747C31 lea r22, ptr [r12+r15*2+0x31] +XDIS 21b8e: MISC BASE D54B8D747D32 lea r22, ptr [r13+r15*2+0x32] +XDIS 21b94: MISC BASE D54B8D747E33 lea r22, ptr [r14+r15*2+0x33] +XDIS 21b9a: MISC BASE D54B8D747F34 lea r22, ptr [r15+r15*2+0x34] +XDIS 21ba0: MISC BASE D55A8D747835 lea r22, ptr [r16+r15*2+0x35] +XDIS 21ba6: MISC BASE D55A8D747936 lea r22, ptr [r17+r15*2+0x36] +XDIS 21bac: MISC BASE D55A8D747A37 lea r22, ptr [r18+r15*2+0x37] +XDIS 21bb2: MISC BASE D55A8D747B38 lea r22, ptr [r19+r15*2+0x38] +XDIS 21bb8: MISC BASE D55A8D747C39 lea r22, ptr [r20+r15*2+0x39] +XDIS 21bbe: MISC BASE D55A8D747D3A lea r22, ptr [r21+r15*2+0x3a] +XDIS 21bc4: MISC BASE D55A8D747E3B lea r22, ptr [r22+r15*2+0x3b] +XDIS 21bca: MISC BASE D55A8D747F3C lea r22, ptr [r23+r15*2+0x3c] +XDIS 21bd0: MISC BASE D55B8D74783D lea r22, ptr [r24+r15*2+0x3d] +XDIS 21bd6: MISC BASE D55B8D74793E lea r22, ptr [r25+r15*2+0x3e] +XDIS 21bdc: MISC BASE D55B8D747A3F lea r22, ptr [r26+r15*2+0x3f] +XDIS 21be2: MISC BASE D55B8D747B40 lea r22, ptr [r27+r15*2+0x40] +XDIS 21be8: MISC BASE D55B8D747C41 lea r22, ptr [r28+r15*2+0x41] +XDIS 21bee: MISC BASE D55B8D747D42 lea r22, ptr [r29+r15*2+0x42] +XDIS 21bf4: MISC BASE D55B8D747E43 lea r22, ptr [r30+r15*2+0x43] +XDIS 21bfa: MISC BASE D55B8D747F44 lea r22, ptr [r31+r15*2+0x44] +XDIS 21c00: MISC BASE D5688D744026 lea r22, ptr [rax+r16*2+0x26] +XDIS 21c06: MISC BASE D5688D744127 lea r22, ptr [rcx+r16*2+0x27] +XDIS 21c0c: MISC BASE D5688D744228 lea r22, ptr [rdx+r16*2+0x28] +XDIS 21c12: MISC BASE D5688D744329 lea r22, ptr [rbx+r16*2+0x29] +XDIS 21c18: MISC BASE D5688D74442A lea r22, ptr [rsp+r16*2+0x2a] +XDIS 21c1e: MISC BASE D5688D74452B lea r22, ptr [rbp+r16*2+0x2b] +XDIS 21c24: MISC BASE D5688D74462C lea r22, ptr [rsi+r16*2+0x2c] +XDIS 21c2a: MISC BASE D5688D74472D lea r22, ptr [rdi+r16*2+0x2d] +XDIS 21c30: MISC BASE D5698D74402E lea r22, ptr [r8+r16*2+0x2e] +XDIS 21c36: MISC BASE D5698D74412F lea r22, ptr [r9+r16*2+0x2f] +XDIS 21c3c: MISC BASE D5698D744230 lea r22, ptr [r10+r16*2+0x30] +XDIS 21c42: MISC BASE D5698D744331 lea r22, ptr [r11+r16*2+0x31] +XDIS 21c48: MISC BASE D5698D744432 lea r22, ptr [r12+r16*2+0x32] +XDIS 21c4e: MISC BASE D5698D744533 lea r22, ptr [r13+r16*2+0x33] +XDIS 21c54: MISC BASE D5698D744634 lea r22, ptr [r14+r16*2+0x34] +XDIS 21c5a: MISC BASE D5698D744735 lea r22, ptr [r15+r16*2+0x35] +XDIS 21c60: MISC BASE D5788D744036 lea r22, ptr [r16+r16*2+0x36] +XDIS 21c66: MISC BASE D5788D744137 lea r22, ptr [r17+r16*2+0x37] +XDIS 21c6c: MISC BASE D5788D744238 lea r22, ptr [r18+r16*2+0x38] +XDIS 21c72: MISC BASE D5788D744339 lea r22, ptr [r19+r16*2+0x39] +XDIS 21c78: MISC BASE D5788D74443A lea r22, ptr [r20+r16*2+0x3a] +XDIS 21c7e: MISC BASE D5788D74453B lea r22, ptr [r21+r16*2+0x3b] +XDIS 21c84: MISC BASE D5788D74463C lea r22, ptr [r22+r16*2+0x3c] +XDIS 21c8a: MISC BASE D5788D74473D lea r22, ptr [r23+r16*2+0x3d] +XDIS 21c90: MISC BASE D5798D74403E lea r22, ptr [r24+r16*2+0x3e] +XDIS 21c96: MISC BASE D5798D74413F lea r22, ptr [r25+r16*2+0x3f] +XDIS 21c9c: MISC BASE D5798D744240 lea r22, ptr [r26+r16*2+0x40] +XDIS 21ca2: MISC BASE D5798D744341 lea r22, ptr [r27+r16*2+0x41] +XDIS 21ca8: MISC BASE D5798D744442 lea r22, ptr [r28+r16*2+0x42] +XDIS 21cae: MISC BASE D5798D744543 lea r22, ptr [r29+r16*2+0x43] +XDIS 21cb4: MISC BASE D5798D744644 lea r22, ptr [r30+r16*2+0x44] +XDIS 21cba: MISC BASE D5798D744745 lea r22, ptr [r31+r16*2+0x45] +XDIS 21cc0: MISC BASE D5688D744827 lea r22, ptr [rax+r17*2+0x27] +XDIS 21cc6: MISC BASE D5688D744928 lea r22, ptr [rcx+r17*2+0x28] +XDIS 21ccc: MISC BASE D5688D744A29 lea r22, ptr [rdx+r17*2+0x29] +XDIS 21cd2: MISC BASE D5688D744B2A lea r22, ptr [rbx+r17*2+0x2a] +XDIS 21cd8: MISC BASE D5688D744C2B lea r22, ptr [rsp+r17*2+0x2b] +XDIS 21cde: MISC BASE D5688D744D2C lea r22, ptr [rbp+r17*2+0x2c] +XDIS 21ce4: MISC BASE D5688D744E2D lea r22, ptr [rsi+r17*2+0x2d] +XDIS 21cea: MISC BASE D5688D744F2E lea r22, ptr [rdi+r17*2+0x2e] +XDIS 21cf0: MISC BASE D5698D74482F lea r22, ptr [r8+r17*2+0x2f] +XDIS 21cf6: MISC BASE D5698D744930 lea r22, ptr [r9+r17*2+0x30] +XDIS 21cfc: MISC BASE D5698D744A31 lea r22, ptr [r10+r17*2+0x31] +XDIS 21d02: MISC BASE D5698D744B32 lea r22, ptr [r11+r17*2+0x32] +XDIS 21d08: MISC BASE D5698D744C33 lea r22, ptr [r12+r17*2+0x33] +XDIS 21d0e: MISC BASE D5698D744D34 lea r22, ptr [r13+r17*2+0x34] +XDIS 21d14: MISC BASE D5698D744E35 lea r22, ptr [r14+r17*2+0x35] +XDIS 21d1a: MISC BASE D5698D744F36 lea r22, ptr [r15+r17*2+0x36] +XDIS 21d20: MISC BASE D5788D744837 lea r22, ptr [r16+r17*2+0x37] +XDIS 21d26: MISC BASE D5788D744938 lea r22, ptr [r17+r17*2+0x38] +XDIS 21d2c: MISC BASE D5788D744A39 lea r22, ptr [r18+r17*2+0x39] +XDIS 21d32: MISC BASE D5788D744B3A lea r22, ptr [r19+r17*2+0x3a] +XDIS 21d38: MISC BASE D5788D744C3B lea r22, ptr [r20+r17*2+0x3b] +XDIS 21d3e: MISC BASE D5788D744D3C lea r22, ptr [r21+r17*2+0x3c] +XDIS 21d44: MISC BASE D5788D744E3D lea r22, ptr [r22+r17*2+0x3d] +XDIS 21d4a: MISC BASE D5788D744F3E lea r22, ptr [r23+r17*2+0x3e] +XDIS 21d50: MISC BASE D5798D74483F lea r22, ptr [r24+r17*2+0x3f] +XDIS 21d56: MISC BASE D5798D744940 lea r22, ptr [r25+r17*2+0x40] +XDIS 21d5c: MISC BASE D5798D744A41 lea r22, ptr [r26+r17*2+0x41] +XDIS 21d62: MISC BASE D5798D744B42 lea r22, ptr [r27+r17*2+0x42] +XDIS 21d68: MISC BASE D5798D744C43 lea r22, ptr [r28+r17*2+0x43] +XDIS 21d6e: MISC BASE D5798D744D44 lea r22, ptr [r29+r17*2+0x44] +XDIS 21d74: MISC BASE D5798D744E45 lea r22, ptr [r30+r17*2+0x45] +XDIS 21d7a: MISC BASE D5798D744F46 lea r22, ptr [r31+r17*2+0x46] +XDIS 21d80: MISC BASE D5688D745028 lea r22, ptr [rax+r18*2+0x28] +XDIS 21d86: MISC BASE D5688D745129 lea r22, ptr [rcx+r18*2+0x29] +XDIS 21d8c: MISC BASE D5688D74522A lea r22, ptr [rdx+r18*2+0x2a] +XDIS 21d92: MISC BASE D5688D74532B lea r22, ptr [rbx+r18*2+0x2b] +XDIS 21d98: MISC BASE D5688D74542C lea r22, ptr [rsp+r18*2+0x2c] +XDIS 21d9e: MISC BASE D5688D74552D lea r22, ptr [rbp+r18*2+0x2d] +XDIS 21da4: MISC BASE D5688D74562E lea r22, ptr [rsi+r18*2+0x2e] +XDIS 21daa: MISC BASE D5688D74572F lea r22, ptr [rdi+r18*2+0x2f] +XDIS 21db0: MISC BASE D5698D745030 lea r22, ptr [r8+r18*2+0x30] +XDIS 21db6: MISC BASE D5698D745131 lea r22, ptr [r9+r18*2+0x31] +XDIS 21dbc: MISC BASE D5698D745232 lea r22, ptr [r10+r18*2+0x32] +XDIS 21dc2: MISC BASE D5698D745333 lea r22, ptr [r11+r18*2+0x33] +XDIS 21dc8: MISC BASE D5698D745434 lea r22, ptr [r12+r18*2+0x34] +XDIS 21dce: MISC BASE D5698D745535 lea r22, ptr [r13+r18*2+0x35] +XDIS 21dd4: MISC BASE D5698D745636 lea r22, ptr [r14+r18*2+0x36] +XDIS 21dda: MISC BASE D5698D745737 lea r22, ptr [r15+r18*2+0x37] +XDIS 21de0: MISC BASE D5788D745038 lea r22, ptr [r16+r18*2+0x38] +XDIS 21de6: MISC BASE D5788D745139 lea r22, ptr [r17+r18*2+0x39] +XDIS 21dec: MISC BASE D5788D74523A lea r22, ptr [r18+r18*2+0x3a] +XDIS 21df2: MISC BASE D5788D74533B lea r22, ptr [r19+r18*2+0x3b] +XDIS 21df8: MISC BASE D5788D74543C lea r22, ptr [r20+r18*2+0x3c] +XDIS 21dfe: MISC BASE D5788D74553D lea r22, ptr [r21+r18*2+0x3d] +XDIS 21e04: MISC BASE D5788D74563E lea r22, ptr [r22+r18*2+0x3e] +XDIS 21e0a: MISC BASE D5788D74573F lea r22, ptr [r23+r18*2+0x3f] +XDIS 21e10: MISC BASE D5798D745040 lea r22, ptr [r24+r18*2+0x40] +XDIS 21e16: MISC BASE D5798D745141 lea r22, ptr [r25+r18*2+0x41] +XDIS 21e1c: MISC BASE D5798D745242 lea r22, ptr [r26+r18*2+0x42] +XDIS 21e22: MISC BASE D5798D745343 lea r22, ptr [r27+r18*2+0x43] +XDIS 21e28: MISC BASE D5798D745444 lea r22, ptr [r28+r18*2+0x44] +XDIS 21e2e: MISC BASE D5798D745545 lea r22, ptr [r29+r18*2+0x45] +XDIS 21e34: MISC BASE D5798D745646 lea r22, ptr [r30+r18*2+0x46] +XDIS 21e3a: MISC BASE D5798D745747 lea r22, ptr [r31+r18*2+0x47] +XDIS 21e40: MISC BASE D5688D745829 lea r22, ptr [rax+r19*2+0x29] +XDIS 21e46: MISC BASE D5688D74592A lea r22, ptr [rcx+r19*2+0x2a] +XDIS 21e4c: MISC BASE D5688D745A2B lea r22, ptr [rdx+r19*2+0x2b] +XDIS 21e52: MISC BASE D5688D745B2C lea r22, ptr [rbx+r19*2+0x2c] +XDIS 21e58: MISC BASE D5688D745C2D lea r22, ptr [rsp+r19*2+0x2d] +XDIS 21e5e: MISC BASE D5688D745D2E lea r22, ptr [rbp+r19*2+0x2e] +XDIS 21e64: MISC BASE D5688D745E2F lea r22, ptr [rsi+r19*2+0x2f] +XDIS 21e6a: MISC BASE D5688D745F30 lea r22, ptr [rdi+r19*2+0x30] +XDIS 21e70: MISC BASE D5698D745831 lea r22, ptr [r8+r19*2+0x31] +XDIS 21e76: MISC BASE D5698D745932 lea r22, ptr [r9+r19*2+0x32] +XDIS 21e7c: MISC BASE D5698D745A33 lea r22, ptr [r10+r19*2+0x33] +XDIS 21e82: MISC BASE D5698D745B34 lea r22, ptr [r11+r19*2+0x34] +XDIS 21e88: MISC BASE D5698D745C35 lea r22, ptr [r12+r19*2+0x35] +XDIS 21e8e: MISC BASE D5698D745D36 lea r22, ptr [r13+r19*2+0x36] +XDIS 21e94: MISC BASE D5698D745E37 lea r22, ptr [r14+r19*2+0x37] +XDIS 21e9a: MISC BASE D5698D745F38 lea r22, ptr [r15+r19*2+0x38] +XDIS 21ea0: MISC BASE D5788D745839 lea r22, ptr [r16+r19*2+0x39] +XDIS 21ea6: MISC BASE D5788D74593A lea r22, ptr [r17+r19*2+0x3a] +XDIS 21eac: MISC BASE D5788D745A3B lea r22, ptr [r18+r19*2+0x3b] +XDIS 21eb2: MISC BASE D5788D745B3C lea r22, ptr [r19+r19*2+0x3c] +XDIS 21eb8: MISC BASE D5788D745C3D lea r22, ptr [r20+r19*2+0x3d] +XDIS 21ebe: MISC BASE D5788D745D3E lea r22, ptr [r21+r19*2+0x3e] +XDIS 21ec4: MISC BASE D5788D745E3F lea r22, ptr [r22+r19*2+0x3f] +XDIS 21eca: MISC BASE D5788D745F40 lea r22, ptr [r23+r19*2+0x40] +XDIS 21ed0: MISC BASE D5798D745841 lea r22, ptr [r24+r19*2+0x41] +XDIS 21ed6: MISC BASE D5798D745942 lea r22, ptr [r25+r19*2+0x42] +XDIS 21edc: MISC BASE D5798D745A43 lea r22, ptr [r26+r19*2+0x43] +XDIS 21ee2: MISC BASE D5798D745B44 lea r22, ptr [r27+r19*2+0x44] +XDIS 21ee8: MISC BASE D5798D745C45 lea r22, ptr [r28+r19*2+0x45] +XDIS 21eee: MISC BASE D5798D745D46 lea r22, ptr [r29+r19*2+0x46] +XDIS 21ef4: MISC BASE D5798D745E47 lea r22, ptr [r30+r19*2+0x47] +XDIS 21efa: MISC BASE D5798D745F48 lea r22, ptr [r31+r19*2+0x48] +XDIS 21f00: MISC BASE D5688D74602A lea r22, ptr [rax+r20*2+0x2a] +XDIS 21f06: MISC BASE D5688D74612B lea r22, ptr [rcx+r20*2+0x2b] +XDIS 21f0c: MISC BASE D5688D74622C lea r22, ptr [rdx+r20*2+0x2c] +XDIS 21f12: MISC BASE D5688D74632D lea r22, ptr [rbx+r20*2+0x2d] +XDIS 21f18: MISC BASE D5688D74642E lea r22, ptr [rsp+r20*2+0x2e] +XDIS 21f1e: MISC BASE D5688D74652F lea r22, ptr [rbp+r20*2+0x2f] +XDIS 21f24: MISC BASE D5688D746630 lea r22, ptr [rsi+r20*2+0x30] +XDIS 21f2a: MISC BASE D5688D746731 lea r22, ptr [rdi+r20*2+0x31] +XDIS 21f30: MISC BASE D5698D746032 lea r22, ptr [r8+r20*2+0x32] +XDIS 21f36: MISC BASE D5698D746133 lea r22, ptr [r9+r20*2+0x33] +XDIS 21f3c: MISC BASE D5698D746234 lea r22, ptr [r10+r20*2+0x34] +XDIS 21f42: MISC BASE D5698D746335 lea r22, ptr [r11+r20*2+0x35] +XDIS 21f48: MISC BASE D5698D746436 lea r22, ptr [r12+r20*2+0x36] +XDIS 21f4e: MISC BASE D5698D746537 lea r22, ptr [r13+r20*2+0x37] +XDIS 21f54: MISC BASE D5698D746638 lea r22, ptr [r14+r20*2+0x38] +XDIS 21f5a: MISC BASE D5698D746739 lea r22, ptr [r15+r20*2+0x39] +XDIS 21f60: MISC BASE D5788D74603A lea r22, ptr [r16+r20*2+0x3a] +XDIS 21f66: MISC BASE D5788D74613B lea r22, ptr [r17+r20*2+0x3b] +XDIS 21f6c: MISC BASE D5788D74623C lea r22, ptr [r18+r20*2+0x3c] +XDIS 21f72: MISC BASE D5788D74633D lea r22, ptr [r19+r20*2+0x3d] +XDIS 21f78: MISC BASE D5788D74643E lea r22, ptr [r20+r20*2+0x3e] +XDIS 21f7e: MISC BASE D5788D74653F lea r22, ptr [r21+r20*2+0x3f] +XDIS 21f84: MISC BASE D5788D746640 lea r22, ptr [r22+r20*2+0x40] +XDIS 21f8a: MISC BASE D5788D746741 lea r22, ptr [r23+r20*2+0x41] +XDIS 21f90: MISC BASE D5798D746042 lea r22, ptr [r24+r20*2+0x42] +XDIS 21f96: MISC BASE D5798D746143 lea r22, ptr [r25+r20*2+0x43] +XDIS 21f9c: MISC BASE D5798D746244 lea r22, ptr [r26+r20*2+0x44] +XDIS 21fa2: MISC BASE D5798D746345 lea r22, ptr [r27+r20*2+0x45] +XDIS 21fa8: MISC BASE D5798D746446 lea r22, ptr [r28+r20*2+0x46] +XDIS 21fae: MISC BASE D5798D746547 lea r22, ptr [r29+r20*2+0x47] +XDIS 21fb4: MISC BASE D5798D746648 lea r22, ptr [r30+r20*2+0x48] +XDIS 21fba: MISC BASE D5798D746749 lea r22, ptr [r31+r20*2+0x49] +XDIS 21fc0: MISC BASE D5688D74682B lea r22, ptr [rax+r21*2+0x2b] +XDIS 21fc6: MISC BASE D5688D74692C lea r22, ptr [rcx+r21*2+0x2c] +XDIS 21fcc: MISC BASE D5688D746A2D lea r22, ptr [rdx+r21*2+0x2d] +XDIS 21fd2: MISC BASE D5688D746B2E lea r22, ptr [rbx+r21*2+0x2e] +XDIS 21fd8: MISC BASE D5688D746C2F lea r22, ptr [rsp+r21*2+0x2f] +XDIS 21fde: MISC BASE D5688D746D30 lea r22, ptr [rbp+r21*2+0x30] +XDIS 21fe4: MISC BASE D5688D746E31 lea r22, ptr [rsi+r21*2+0x31] +XDIS 21fea: MISC BASE D5688D746F32 lea r22, ptr [rdi+r21*2+0x32] +XDIS 21ff0: MISC BASE D5698D746833 lea r22, ptr [r8+r21*2+0x33] +XDIS 21ff6: MISC BASE D5698D746934 lea r22, ptr [r9+r21*2+0x34] +XDIS 21ffc: MISC BASE D5698D746A35 lea r22, ptr [r10+r21*2+0x35] +XDIS 22002: MISC BASE D5698D746B36 lea r22, ptr [r11+r21*2+0x36] +XDIS 22008: MISC BASE D5698D746C37 lea r22, ptr [r12+r21*2+0x37] +XDIS 2200e: MISC BASE D5698D746D38 lea r22, ptr [r13+r21*2+0x38] +XDIS 22014: MISC BASE D5698D746E39 lea r22, ptr [r14+r21*2+0x39] +XDIS 2201a: MISC BASE D5698D746F3A lea r22, ptr [r15+r21*2+0x3a] +XDIS 22020: MISC BASE D5788D74683B lea r22, ptr [r16+r21*2+0x3b] +XDIS 22026: MISC BASE D5788D74693C lea r22, ptr [r17+r21*2+0x3c] +XDIS 2202c: MISC BASE D5788D746A3D lea r22, ptr [r18+r21*2+0x3d] +XDIS 22032: MISC BASE D5788D746B3E lea r22, ptr [r19+r21*2+0x3e] +XDIS 22038: MISC BASE D5788D746C3F lea r22, ptr [r20+r21*2+0x3f] +XDIS 2203e: MISC BASE D5788D746D40 lea r22, ptr [r21+r21*2+0x40] +XDIS 22044: MISC BASE D5788D746E41 lea r22, ptr [r22+r21*2+0x41] +XDIS 2204a: MISC BASE D5788D746F42 lea r22, ptr [r23+r21*2+0x42] +XDIS 22050: MISC BASE D5798D746843 lea r22, ptr [r24+r21*2+0x43] +XDIS 22056: MISC BASE D5798D746944 lea r22, ptr [r25+r21*2+0x44] +XDIS 2205c: MISC BASE D5798D746A45 lea r22, ptr [r26+r21*2+0x45] +XDIS 22062: MISC BASE D5798D746B46 lea r22, ptr [r27+r21*2+0x46] +XDIS 22068: MISC BASE D5798D746C47 lea r22, ptr [r28+r21*2+0x47] +XDIS 2206e: MISC BASE D5798D746D48 lea r22, ptr [r29+r21*2+0x48] +XDIS 22074: MISC BASE D5798D746E49 lea r22, ptr [r30+r21*2+0x49] +XDIS 2207a: MISC BASE D5798D746F4A lea r22, ptr [r31+r21*2+0x4a] +XDIS 22080: MISC BASE D5688D74702C lea r22, ptr [rax+r22*2+0x2c] +XDIS 22086: MISC BASE D5688D74712D lea r22, ptr [rcx+r22*2+0x2d] +XDIS 2208c: MISC BASE D5688D74722E lea r22, ptr [rdx+r22*2+0x2e] +XDIS 22092: MISC BASE D5688D74732F lea r22, ptr [rbx+r22*2+0x2f] +XDIS 22098: MISC BASE D5688D747430 lea r22, ptr [rsp+r22*2+0x30] +XDIS 2209e: MISC BASE D5688D747531 lea r22, ptr [rbp+r22*2+0x31] +XDIS 220a4: MISC BASE D5688D747632 lea r22, ptr [rsi+r22*2+0x32] +XDIS 220aa: MISC BASE D5688D747733 lea r22, ptr [rdi+r22*2+0x33] +XDIS 220b0: MISC BASE D5698D747034 lea r22, ptr [r8+r22*2+0x34] +XDIS 220b6: MISC BASE D5698D747135 lea r22, ptr [r9+r22*2+0x35] +XDIS 220bc: MISC BASE D5698D747236 lea r22, ptr [r10+r22*2+0x36] +XDIS 220c2: MISC BASE D5698D747337 lea r22, ptr [r11+r22*2+0x37] +XDIS 220c8: MISC BASE D5698D747438 lea r22, ptr [r12+r22*2+0x38] +XDIS 220ce: MISC BASE D5698D747539 lea r22, ptr [r13+r22*2+0x39] +XDIS 220d4: MISC BASE D5698D74763A lea r22, ptr [r14+r22*2+0x3a] +XDIS 220da: MISC BASE D5698D74773B lea r22, ptr [r15+r22*2+0x3b] +XDIS 220e0: MISC BASE D5788D74703C lea r22, ptr [r16+r22*2+0x3c] +XDIS 220e6: MISC BASE D5788D74713D lea r22, ptr [r17+r22*2+0x3d] +XDIS 220ec: MISC BASE D5788D74723E lea r22, ptr [r18+r22*2+0x3e] +XDIS 220f2: MISC BASE D5788D74733F lea r22, ptr [r19+r22*2+0x3f] +XDIS 220f8: MISC BASE D5788D747440 lea r22, ptr [r20+r22*2+0x40] +XDIS 220fe: MISC BASE D5788D747541 lea r22, ptr [r21+r22*2+0x41] +XDIS 22104: MISC BASE D5788D747642 lea r22, ptr [r22+r22*2+0x42] +XDIS 2210a: MISC BASE D5788D747743 lea r22, ptr [r23+r22*2+0x43] +XDIS 22110: MISC BASE D5798D747044 lea r22, ptr [r24+r22*2+0x44] +XDIS 22116: MISC BASE D5798D747145 lea r22, ptr [r25+r22*2+0x45] +XDIS 2211c: MISC BASE D5798D747246 lea r22, ptr [r26+r22*2+0x46] +XDIS 22122: MISC BASE D5798D747347 lea r22, ptr [r27+r22*2+0x47] +XDIS 22128: MISC BASE D5798D747448 lea r22, ptr [r28+r22*2+0x48] +XDIS 2212e: MISC BASE D5798D747549 lea r22, ptr [r29+r22*2+0x49] +XDIS 22134: MISC BASE D5798D74764A lea r22, ptr [r30+r22*2+0x4a] +XDIS 2213a: MISC BASE D5798D74774B lea r22, ptr [r31+r22*2+0x4b] +XDIS 22140: MISC BASE D5688D74782D lea r22, ptr [rax+r23*2+0x2d] +XDIS 22146: MISC BASE D5688D74792E lea r22, ptr [rcx+r23*2+0x2e] +XDIS 2214c: MISC BASE D5688D747A2F lea r22, ptr [rdx+r23*2+0x2f] +XDIS 22152: MISC BASE D5688D747B30 lea r22, ptr [rbx+r23*2+0x30] +XDIS 22158: MISC BASE D5688D747C31 lea r22, ptr [rsp+r23*2+0x31] +XDIS 2215e: MISC BASE D5688D747D32 lea r22, ptr [rbp+r23*2+0x32] +XDIS 22164: MISC BASE D5688D747E33 lea r22, ptr [rsi+r23*2+0x33] +XDIS 2216a: MISC BASE D5688D747F34 lea r22, ptr [rdi+r23*2+0x34] +XDIS 22170: MISC BASE D5698D747835 lea r22, ptr [r8+r23*2+0x35] +XDIS 22176: MISC BASE D5698D747936 lea r22, ptr [r9+r23*2+0x36] +XDIS 2217c: MISC BASE D5698D747A37 lea r22, ptr [r10+r23*2+0x37] +XDIS 22182: MISC BASE D5698D747B38 lea r22, ptr [r11+r23*2+0x38] +XDIS 22188: MISC BASE D5698D747C39 lea r22, ptr [r12+r23*2+0x39] +XDIS 2218e: MISC BASE D5698D747D3A lea r22, ptr [r13+r23*2+0x3a] +XDIS 22194: MISC BASE D5698D747E3B lea r22, ptr [r14+r23*2+0x3b] +XDIS 2219a: MISC BASE D5698D747F3C lea r22, ptr [r15+r23*2+0x3c] +XDIS 221a0: MISC BASE D5788D74783D lea r22, ptr [r16+r23*2+0x3d] +XDIS 221a6: MISC BASE D5788D74793E lea r22, ptr [r17+r23*2+0x3e] +XDIS 221ac: MISC BASE D5788D747A3F lea r22, ptr [r18+r23*2+0x3f] +XDIS 221b2: MISC BASE D5788D747B40 lea r22, ptr [r19+r23*2+0x40] +XDIS 221b8: MISC BASE D5788D747C41 lea r22, ptr [r20+r23*2+0x41] +XDIS 221be: MISC BASE D5788D747D42 lea r22, ptr [r21+r23*2+0x42] +XDIS 221c4: MISC BASE D5788D747E43 lea r22, ptr [r22+r23*2+0x43] +XDIS 221ca: MISC BASE D5788D747F44 lea r22, ptr [r23+r23*2+0x44] +XDIS 221d0: MISC BASE D5798D747845 lea r22, ptr [r24+r23*2+0x45] +XDIS 221d6: MISC BASE D5798D747946 lea r22, ptr [r25+r23*2+0x46] +XDIS 221dc: MISC BASE D5798D747A47 lea r22, ptr [r26+r23*2+0x47] +XDIS 221e2: MISC BASE D5798D747B48 lea r22, ptr [r27+r23*2+0x48] +XDIS 221e8: MISC BASE D5798D747C49 lea r22, ptr [r28+r23*2+0x49] +XDIS 221ee: MISC BASE D5798D747D4A lea r22, ptr [r29+r23*2+0x4a] +XDIS 221f4: MISC BASE D5798D747E4B lea r22, ptr [r30+r23*2+0x4b] +XDIS 221fa: MISC BASE D5798D747F4C lea r22, ptr [r31+r23*2+0x4c] +XDIS 22200: MISC BASE D56A8D74402E lea r22, ptr [rax+r24*2+0x2e] +XDIS 22206: MISC BASE D56A8D74412F lea r22, ptr [rcx+r24*2+0x2f] +XDIS 2220c: MISC BASE D56A8D744230 lea r22, ptr [rdx+r24*2+0x30] +XDIS 22212: MISC BASE D56A8D744331 lea r22, ptr [rbx+r24*2+0x31] +XDIS 22218: MISC BASE D56A8D744432 lea r22, ptr [rsp+r24*2+0x32] +XDIS 2221e: MISC BASE D56A8D744533 lea r22, ptr [rbp+r24*2+0x33] +XDIS 22224: MISC BASE D56A8D744634 lea r22, ptr [rsi+r24*2+0x34] +XDIS 2222a: MISC BASE D56A8D744735 lea r22, ptr [rdi+r24*2+0x35] +XDIS 22230: MISC BASE D56B8D744036 lea r22, ptr [r8+r24*2+0x36] +XDIS 22236: MISC BASE D56B8D744137 lea r22, ptr [r9+r24*2+0x37] +XDIS 2223c: MISC BASE D56B8D744238 lea r22, ptr [r10+r24*2+0x38] +XDIS 22242: MISC BASE D56B8D744339 lea r22, ptr [r11+r24*2+0x39] +XDIS 22248: MISC BASE D56B8D74443A lea r22, ptr [r12+r24*2+0x3a] +XDIS 2224e: MISC BASE D56B8D74453B lea r22, ptr [r13+r24*2+0x3b] +XDIS 22254: MISC BASE D56B8D74463C lea r22, ptr [r14+r24*2+0x3c] +XDIS 2225a: MISC BASE D56B8D74473D lea r22, ptr [r15+r24*2+0x3d] +XDIS 22260: MISC BASE D57A8D74403E lea r22, ptr [r16+r24*2+0x3e] +XDIS 22266: MISC BASE D57A8D74413F lea r22, ptr [r17+r24*2+0x3f] +XDIS 2226c: MISC BASE D57A8D744240 lea r22, ptr [r18+r24*2+0x40] +XDIS 22272: MISC BASE D57A8D744341 lea r22, ptr [r19+r24*2+0x41] +XDIS 22278: MISC BASE D57A8D744442 lea r22, ptr [r20+r24*2+0x42] +XDIS 2227e: MISC BASE D57A8D744543 lea r22, ptr [r21+r24*2+0x43] +XDIS 22284: MISC BASE D57A8D744644 lea r22, ptr [r22+r24*2+0x44] +XDIS 2228a: MISC BASE D57A8D744745 lea r22, ptr [r23+r24*2+0x45] +XDIS 22290: MISC BASE D57B8D744046 lea r22, ptr [r24+r24*2+0x46] +XDIS 22296: MISC BASE D57B8D744147 lea r22, ptr [r25+r24*2+0x47] +XDIS 2229c: MISC BASE D57B8D744248 lea r22, ptr [r26+r24*2+0x48] +XDIS 222a2: MISC BASE D57B8D744349 lea r22, ptr [r27+r24*2+0x49] +XDIS 222a8: MISC BASE D57B8D74444A lea r22, ptr [r28+r24*2+0x4a] +XDIS 222ae: MISC BASE D57B8D74454B lea r22, ptr [r29+r24*2+0x4b] +XDIS 222b4: MISC BASE D57B8D74464C lea r22, ptr [r30+r24*2+0x4c] +XDIS 222ba: MISC BASE D57B8D74474D lea r22, ptr [r31+r24*2+0x4d] +XDIS 222c0: MISC BASE D56A8D74482F lea r22, ptr [rax+r25*2+0x2f] +XDIS 222c6: MISC BASE D56A8D744930 lea r22, ptr [rcx+r25*2+0x30] +XDIS 222cc: MISC BASE D56A8D744A31 lea r22, ptr [rdx+r25*2+0x31] +XDIS 222d2: MISC BASE D56A8D744B32 lea r22, ptr [rbx+r25*2+0x32] +XDIS 222d8: MISC BASE D56A8D744C33 lea r22, ptr [rsp+r25*2+0x33] +XDIS 222de: MISC BASE D56A8D744D34 lea r22, ptr [rbp+r25*2+0x34] +XDIS 222e4: MISC BASE D56A8D744E35 lea r22, ptr [rsi+r25*2+0x35] +XDIS 222ea: MISC BASE D56A8D744F36 lea r22, ptr [rdi+r25*2+0x36] +XDIS 222f0: MISC BASE D56B8D744837 lea r22, ptr [r8+r25*2+0x37] +XDIS 222f6: MISC BASE D56B8D744938 lea r22, ptr [r9+r25*2+0x38] +XDIS 222fc: MISC BASE D56B8D744A39 lea r22, ptr [r10+r25*2+0x39] +XDIS 22302: MISC BASE D56B8D744B3A lea r22, ptr [r11+r25*2+0x3a] +XDIS 22308: MISC BASE D56B8D744C3B lea r22, ptr [r12+r25*2+0x3b] +XDIS 2230e: MISC BASE D56B8D744D3C lea r22, ptr [r13+r25*2+0x3c] +XDIS 22314: MISC BASE D56B8D744E3D lea r22, ptr [r14+r25*2+0x3d] +XDIS 2231a: MISC BASE D56B8D744F3E lea r22, ptr [r15+r25*2+0x3e] +XDIS 22320: MISC BASE D57A8D74483F lea r22, ptr [r16+r25*2+0x3f] +XDIS 22326: MISC BASE D57A8D744940 lea r22, ptr [r17+r25*2+0x40] +XDIS 2232c: MISC BASE D57A8D744A41 lea r22, ptr [r18+r25*2+0x41] +XDIS 22332: MISC BASE D57A8D744B42 lea r22, ptr [r19+r25*2+0x42] +XDIS 22338: MISC BASE D57A8D744C43 lea r22, ptr [r20+r25*2+0x43] +XDIS 2233e: MISC BASE D57A8D744D44 lea r22, ptr [r21+r25*2+0x44] +XDIS 22344: MISC BASE D57A8D744E45 lea r22, ptr [r22+r25*2+0x45] +XDIS 2234a: MISC BASE D57A8D744F46 lea r22, ptr [r23+r25*2+0x46] +XDIS 22350: MISC BASE D57B8D744847 lea r22, ptr [r24+r25*2+0x47] +XDIS 22356: MISC BASE D57B8D744948 lea r22, ptr [r25+r25*2+0x48] +XDIS 2235c: MISC BASE D57B8D744A49 lea r22, ptr [r26+r25*2+0x49] +XDIS 22362: MISC BASE D57B8D744B4A lea r22, ptr [r27+r25*2+0x4a] +XDIS 22368: MISC BASE D57B8D744C4B lea r22, ptr [r28+r25*2+0x4b] +XDIS 2236e: MISC BASE D57B8D744D4C lea r22, ptr [r29+r25*2+0x4c] +XDIS 22374: MISC BASE D57B8D744E4D lea r22, ptr [r30+r25*2+0x4d] +XDIS 2237a: MISC BASE D57B8D744F4E lea r22, ptr [r31+r25*2+0x4e] +XDIS 22380: MISC BASE D56A8D745030 lea r22, ptr [rax+r26*2+0x30] +XDIS 22386: MISC BASE D56A8D745131 lea r22, ptr [rcx+r26*2+0x31] +XDIS 2238c: MISC BASE D56A8D745232 lea r22, ptr [rdx+r26*2+0x32] +XDIS 22392: MISC BASE D56A8D745333 lea r22, ptr [rbx+r26*2+0x33] +XDIS 22398: MISC BASE D56A8D745434 lea r22, ptr [rsp+r26*2+0x34] +XDIS 2239e: MISC BASE D56A8D745535 lea r22, ptr [rbp+r26*2+0x35] +XDIS 223a4: MISC BASE D56A8D745636 lea r22, ptr [rsi+r26*2+0x36] +XDIS 223aa: MISC BASE D56A8D745737 lea r22, ptr [rdi+r26*2+0x37] +XDIS 223b0: MISC BASE D56B8D745038 lea r22, ptr [r8+r26*2+0x38] +XDIS 223b6: MISC BASE D56B8D745139 lea r22, ptr [r9+r26*2+0x39] +XDIS 223bc: MISC BASE D56B8D74523A lea r22, ptr [r10+r26*2+0x3a] +XDIS 223c2: MISC BASE D56B8D74533B lea r22, ptr [r11+r26*2+0x3b] +XDIS 223c8: MISC BASE D56B8D74543C lea r22, ptr [r12+r26*2+0x3c] +XDIS 223ce: MISC BASE D56B8D74553D lea r22, ptr [r13+r26*2+0x3d] +XDIS 223d4: MISC BASE D56B8D74563E lea r22, ptr [r14+r26*2+0x3e] +XDIS 223da: MISC BASE D56B8D74573F lea r22, ptr [r15+r26*2+0x3f] +XDIS 223e0: MISC BASE D57A8D745040 lea r22, ptr [r16+r26*2+0x40] +XDIS 223e6: MISC BASE D57A8D745141 lea r22, ptr [r17+r26*2+0x41] +XDIS 223ec: MISC BASE D57A8D745242 lea r22, ptr [r18+r26*2+0x42] +XDIS 223f2: MISC BASE D57A8D745343 lea r22, ptr [r19+r26*2+0x43] +XDIS 223f8: MISC BASE D57A8D745444 lea r22, ptr [r20+r26*2+0x44] +XDIS 223fe: MISC BASE D57A8D745545 lea r22, ptr [r21+r26*2+0x45] +XDIS 22404: MISC BASE D57A8D745646 lea r22, ptr [r22+r26*2+0x46] +XDIS 2240a: MISC BASE D57A8D745747 lea r22, ptr [r23+r26*2+0x47] +XDIS 22410: MISC BASE D57B8D745048 lea r22, ptr [r24+r26*2+0x48] +XDIS 22416: MISC BASE D57B8D745149 lea r22, ptr [r25+r26*2+0x49] +XDIS 2241c: MISC BASE D57B8D74524A lea r22, ptr [r26+r26*2+0x4a] +XDIS 22422: MISC BASE D57B8D74534B lea r22, ptr [r27+r26*2+0x4b] +XDIS 22428: MISC BASE D57B8D74544C lea r22, ptr [r28+r26*2+0x4c] +XDIS 2242e: MISC BASE D57B8D74554D lea r22, ptr [r29+r26*2+0x4d] +XDIS 22434: MISC BASE D57B8D74564E lea r22, ptr [r30+r26*2+0x4e] +XDIS 2243a: MISC BASE D57B8D74574F lea r22, ptr [r31+r26*2+0x4f] +XDIS 22440: MISC BASE D56A8D745831 lea r22, ptr [rax+r27*2+0x31] +XDIS 22446: MISC BASE D56A8D745932 lea r22, ptr [rcx+r27*2+0x32] +XDIS 2244c: MISC BASE D56A8D745A33 lea r22, ptr [rdx+r27*2+0x33] +XDIS 22452: MISC BASE D56A8D745B34 lea r22, ptr [rbx+r27*2+0x34] +XDIS 22458: MISC BASE D56A8D745C35 lea r22, ptr [rsp+r27*2+0x35] +XDIS 2245e: MISC BASE D56A8D745D36 lea r22, ptr [rbp+r27*2+0x36] +XDIS 22464: MISC BASE D56A8D745E37 lea r22, ptr [rsi+r27*2+0x37] +XDIS 2246a: MISC BASE D56A8D745F38 lea r22, ptr [rdi+r27*2+0x38] +XDIS 22470: MISC BASE D56B8D745839 lea r22, ptr [r8+r27*2+0x39] +XDIS 22476: MISC BASE D56B8D74593A lea r22, ptr [r9+r27*2+0x3a] +XDIS 2247c: MISC BASE D56B8D745A3B lea r22, ptr [r10+r27*2+0x3b] +XDIS 22482: MISC BASE D56B8D745B3C lea r22, ptr [r11+r27*2+0x3c] +XDIS 22488: MISC BASE D56B8D745C3D lea r22, ptr [r12+r27*2+0x3d] +XDIS 2248e: MISC BASE D56B8D745D3E lea r22, ptr [r13+r27*2+0x3e] +XDIS 22494: MISC BASE D56B8D745E3F lea r22, ptr [r14+r27*2+0x3f] +XDIS 2249a: MISC BASE D56B8D745F40 lea r22, ptr [r15+r27*2+0x40] +XDIS 224a0: MISC BASE D57A8D745841 lea r22, ptr [r16+r27*2+0x41] +XDIS 224a6: MISC BASE D57A8D745942 lea r22, ptr [r17+r27*2+0x42] +XDIS 224ac: MISC BASE D57A8D745A43 lea r22, ptr [r18+r27*2+0x43] +XDIS 224b2: MISC BASE D57A8D745B44 lea r22, ptr [r19+r27*2+0x44] +XDIS 224b8: MISC BASE D57A8D745C45 lea r22, ptr [r20+r27*2+0x45] +XDIS 224be: MISC BASE D57A8D745D46 lea r22, ptr [r21+r27*2+0x46] +XDIS 224c4: MISC BASE D57A8D745E47 lea r22, ptr [r22+r27*2+0x47] +XDIS 224ca: MISC BASE D57A8D745F48 lea r22, ptr [r23+r27*2+0x48] +XDIS 224d0: MISC BASE D57B8D745849 lea r22, ptr [r24+r27*2+0x49] +XDIS 224d6: MISC BASE D57B8D74594A lea r22, ptr [r25+r27*2+0x4a] +XDIS 224dc: MISC BASE D57B8D745A4B lea r22, ptr [r26+r27*2+0x4b] +XDIS 224e2: MISC BASE D57B8D745B4C lea r22, ptr [r27+r27*2+0x4c] +XDIS 224e8: MISC BASE D57B8D745C4D lea r22, ptr [r28+r27*2+0x4d] +XDIS 224ee: MISC BASE D57B8D745D4E lea r22, ptr [r29+r27*2+0x4e] +XDIS 224f4: MISC BASE D57B8D745E4F lea r22, ptr [r30+r27*2+0x4f] +XDIS 224fa: MISC BASE D57B8D745F50 lea r22, ptr [r31+r27*2+0x50] +XDIS 22500: MISC BASE D56A8D746032 lea r22, ptr [rax+r28*2+0x32] +XDIS 22506: MISC BASE D56A8D746133 lea r22, ptr [rcx+r28*2+0x33] +XDIS 2250c: MISC BASE D56A8D746234 lea r22, ptr [rdx+r28*2+0x34] +XDIS 22512: MISC BASE D56A8D746335 lea r22, ptr [rbx+r28*2+0x35] +XDIS 22518: MISC BASE D56A8D746436 lea r22, ptr [rsp+r28*2+0x36] +XDIS 2251e: MISC BASE D56A8D746537 lea r22, ptr [rbp+r28*2+0x37] +XDIS 22524: MISC BASE D56A8D746638 lea r22, ptr [rsi+r28*2+0x38] +XDIS 2252a: MISC BASE D56A8D746739 lea r22, ptr [rdi+r28*2+0x39] +XDIS 22530: MISC BASE D56B8D74603A lea r22, ptr [r8+r28*2+0x3a] +XDIS 22536: MISC BASE D56B8D74613B lea r22, ptr [r9+r28*2+0x3b] +XDIS 2253c: MISC BASE D56B8D74623C lea r22, ptr [r10+r28*2+0x3c] +XDIS 22542: MISC BASE D56B8D74633D lea r22, ptr [r11+r28*2+0x3d] +XDIS 22548: MISC BASE D56B8D74643E lea r22, ptr [r12+r28*2+0x3e] +XDIS 2254e: MISC BASE D56B8D74653F lea r22, ptr [r13+r28*2+0x3f] +XDIS 22554: MISC BASE D56B8D746640 lea r22, ptr [r14+r28*2+0x40] +XDIS 2255a: MISC BASE D56B8D746741 lea r22, ptr [r15+r28*2+0x41] +XDIS 22560: MISC BASE D57A8D746042 lea r22, ptr [r16+r28*2+0x42] +XDIS 22566: MISC BASE D57A8D746143 lea r22, ptr [r17+r28*2+0x43] +XDIS 2256c: MISC BASE D57A8D746244 lea r22, ptr [r18+r28*2+0x44] +XDIS 22572: MISC BASE D57A8D746345 lea r22, ptr [r19+r28*2+0x45] +XDIS 22578: MISC BASE D57A8D746446 lea r22, ptr [r20+r28*2+0x46] +XDIS 2257e: MISC BASE D57A8D746547 lea r22, ptr [r21+r28*2+0x47] +XDIS 22584: MISC BASE D57A8D746648 lea r22, ptr [r22+r28*2+0x48] +XDIS 2258a: MISC BASE D57A8D746749 lea r22, ptr [r23+r28*2+0x49] +XDIS 22590: MISC BASE D57B8D74604A lea r22, ptr [r24+r28*2+0x4a] +XDIS 22596: MISC BASE D57B8D74614B lea r22, ptr [r25+r28*2+0x4b] +XDIS 2259c: MISC BASE D57B8D74624C lea r22, ptr [r26+r28*2+0x4c] +XDIS 225a2: MISC BASE D57B8D74634D lea r22, ptr [r27+r28*2+0x4d] +XDIS 225a8: MISC BASE D57B8D74644E lea r22, ptr [r28+r28*2+0x4e] +XDIS 225ae: MISC BASE D57B8D74654F lea r22, ptr [r29+r28*2+0x4f] +XDIS 225b4: MISC BASE D57B8D746650 lea r22, ptr [r30+r28*2+0x50] +XDIS 225ba: MISC BASE D57B8D746751 lea r22, ptr [r31+r28*2+0x51] +XDIS 225c0: MISC BASE D56A8D746833 lea r22, ptr [rax+r29*2+0x33] +XDIS 225c6: MISC BASE D56A8D746934 lea r22, ptr [rcx+r29*2+0x34] +XDIS 225cc: MISC BASE D56A8D746A35 lea r22, ptr [rdx+r29*2+0x35] +XDIS 225d2: MISC BASE D56A8D746B36 lea r22, ptr [rbx+r29*2+0x36] +XDIS 225d8: MISC BASE D56A8D746C37 lea r22, ptr [rsp+r29*2+0x37] +XDIS 225de: MISC BASE D56A8D746D38 lea r22, ptr [rbp+r29*2+0x38] +XDIS 225e4: MISC BASE D56A8D746E39 lea r22, ptr [rsi+r29*2+0x39] +XDIS 225ea: MISC BASE D56A8D746F3A lea r22, ptr [rdi+r29*2+0x3a] +XDIS 225f0: MISC BASE D56B8D74683B lea r22, ptr [r8+r29*2+0x3b] +XDIS 225f6: MISC BASE D56B8D74693C lea r22, ptr [r9+r29*2+0x3c] +XDIS 225fc: MISC BASE D56B8D746A3D lea r22, ptr [r10+r29*2+0x3d] +XDIS 22602: MISC BASE D56B8D746B3E lea r22, ptr [r11+r29*2+0x3e] +XDIS 22608: MISC BASE D56B8D746C3F lea r22, ptr [r12+r29*2+0x3f] +XDIS 2260e: MISC BASE D56B8D746D40 lea r22, ptr [r13+r29*2+0x40] +XDIS 22614: MISC BASE D56B8D746E41 lea r22, ptr [r14+r29*2+0x41] +XDIS 2261a: MISC BASE D56B8D746F42 lea r22, ptr [r15+r29*2+0x42] +XDIS 22620: MISC BASE D57A8D746843 lea r22, ptr [r16+r29*2+0x43] +XDIS 22626: MISC BASE D57A8D746944 lea r22, ptr [r17+r29*2+0x44] +XDIS 2262c: MISC BASE D57A8D746A45 lea r22, ptr [r18+r29*2+0x45] +XDIS 22632: MISC BASE D57A8D746B46 lea r22, ptr [r19+r29*2+0x46] +XDIS 22638: MISC BASE D57A8D746C47 lea r22, ptr [r20+r29*2+0x47] +XDIS 2263e: MISC BASE D57A8D746D48 lea r22, ptr [r21+r29*2+0x48] +XDIS 22644: MISC BASE D57A8D746E49 lea r22, ptr [r22+r29*2+0x49] +XDIS 2264a: MISC BASE D57A8D746F4A lea r22, ptr [r23+r29*2+0x4a] +XDIS 22650: MISC BASE D57B8D74684B lea r22, ptr [r24+r29*2+0x4b] +XDIS 22656: MISC BASE D57B8D74694C lea r22, ptr [r25+r29*2+0x4c] +XDIS 2265c: MISC BASE D57B8D746A4D lea r22, ptr [r26+r29*2+0x4d] +XDIS 22662: MISC BASE D57B8D746B4E lea r22, ptr [r27+r29*2+0x4e] +XDIS 22668: MISC BASE D57B8D746C4F lea r22, ptr [r28+r29*2+0x4f] +XDIS 2266e: MISC BASE D57B8D746D50 lea r22, ptr [r29+r29*2+0x50] +XDIS 22674: MISC BASE D57B8D746E51 lea r22, ptr [r30+r29*2+0x51] +XDIS 2267a: MISC BASE D57B8D746F52 lea r22, ptr [r31+r29*2+0x52] +XDIS 22680: MISC BASE D56A8D747034 lea r22, ptr [rax+r30*2+0x34] +XDIS 22686: MISC BASE D56A8D747135 lea r22, ptr [rcx+r30*2+0x35] +XDIS 2268c: MISC BASE D56A8D747236 lea r22, ptr [rdx+r30*2+0x36] +XDIS 22692: MISC BASE D56A8D747337 lea r22, ptr [rbx+r30*2+0x37] +XDIS 22698: MISC BASE D56A8D747438 lea r22, ptr [rsp+r30*2+0x38] +XDIS 2269e: MISC BASE D56A8D747539 lea r22, ptr [rbp+r30*2+0x39] +XDIS 226a4: MISC BASE D56A8D74763A lea r22, ptr [rsi+r30*2+0x3a] +XDIS 226aa: MISC BASE D56A8D74773B lea r22, ptr [rdi+r30*2+0x3b] +XDIS 226b0: MISC BASE D56B8D74703C lea r22, ptr [r8+r30*2+0x3c] +XDIS 226b6: MISC BASE D56B8D74713D lea r22, ptr [r9+r30*2+0x3d] +XDIS 226bc: MISC BASE D56B8D74723E lea r22, ptr [r10+r30*2+0x3e] +XDIS 226c2: MISC BASE D56B8D74733F lea r22, ptr [r11+r30*2+0x3f] +XDIS 226c8: MISC BASE D56B8D747440 lea r22, ptr [r12+r30*2+0x40] +XDIS 226ce: MISC BASE D56B8D747541 lea r22, ptr [r13+r30*2+0x41] +XDIS 226d4: MISC BASE D56B8D747642 lea r22, ptr [r14+r30*2+0x42] +XDIS 226da: MISC BASE D56B8D747743 lea r22, ptr [r15+r30*2+0x43] +XDIS 226e0: MISC BASE D57A8D747044 lea r22, ptr [r16+r30*2+0x44] +XDIS 226e6: MISC BASE D57A8D747145 lea r22, ptr [r17+r30*2+0x45] +XDIS 226ec: MISC BASE D57A8D747246 lea r22, ptr [r18+r30*2+0x46] +XDIS 226f2: MISC BASE D57A8D747347 lea r22, ptr [r19+r30*2+0x47] +XDIS 226f8: MISC BASE D57A8D747448 lea r22, ptr [r20+r30*2+0x48] +XDIS 226fe: MISC BASE D57A8D747549 lea r22, ptr [r21+r30*2+0x49] +XDIS 22704: MISC BASE D57A8D74764A lea r22, ptr [r22+r30*2+0x4a] +XDIS 2270a: MISC BASE D57A8D74774B lea r22, ptr [r23+r30*2+0x4b] +XDIS 22710: MISC BASE D57B8D74704C lea r22, ptr [r24+r30*2+0x4c] +XDIS 22716: MISC BASE D57B8D74714D lea r22, ptr [r25+r30*2+0x4d] +XDIS 2271c: MISC BASE D57B8D74724E lea r22, ptr [r26+r30*2+0x4e] +XDIS 22722: MISC BASE D57B8D74734F lea r22, ptr [r27+r30*2+0x4f] +XDIS 22728: MISC BASE D57B8D747450 lea r22, ptr [r28+r30*2+0x50] +XDIS 2272e: MISC BASE D57B8D747551 lea r22, ptr [r29+r30*2+0x51] +XDIS 22734: MISC BASE D57B8D747652 lea r22, ptr [r30+r30*2+0x52] +XDIS 2273a: MISC BASE D57B8D747753 lea r22, ptr [r31+r30*2+0x53] +XDIS 22740: MISC BASE D56A8D747835 lea r22, ptr [rax+r31*2+0x35] +XDIS 22746: MISC BASE D56A8D747936 lea r22, ptr [rcx+r31*2+0x36] +XDIS 2274c: MISC BASE D56A8D747A37 lea r22, ptr [rdx+r31*2+0x37] +XDIS 22752: MISC BASE D56A8D747B38 lea r22, ptr [rbx+r31*2+0x38] +XDIS 22758: MISC BASE D56A8D747C39 lea r22, ptr [rsp+r31*2+0x39] +XDIS 2275e: MISC BASE D56A8D747D3A lea r22, ptr [rbp+r31*2+0x3a] +XDIS 22764: MISC BASE D56A8D747E3B lea r22, ptr [rsi+r31*2+0x3b] +XDIS 2276a: MISC BASE D56A8D747F3C lea r22, ptr [rdi+r31*2+0x3c] +XDIS 22770: MISC BASE D56B8D74783D lea r22, ptr [r8+r31*2+0x3d] +XDIS 22776: MISC BASE D56B8D74793E lea r22, ptr [r9+r31*2+0x3e] +XDIS 2277c: MISC BASE D56B8D747A3F lea r22, ptr [r10+r31*2+0x3f] +XDIS 22782: MISC BASE D56B8D747B40 lea r22, ptr [r11+r31*2+0x40] +XDIS 22788: MISC BASE D56B8D747C41 lea r22, ptr [r12+r31*2+0x41] +XDIS 2278e: MISC BASE D56B8D747D42 lea r22, ptr [r13+r31*2+0x42] +XDIS 22794: MISC BASE D56B8D747E43 lea r22, ptr [r14+r31*2+0x43] +XDIS 2279a: MISC BASE D56B8D747F44 lea r22, ptr [r15+r31*2+0x44] +XDIS 227a0: MISC BASE D57A8D747845 lea r22, ptr [r16+r31*2+0x45] +XDIS 227a6: MISC BASE D57A8D747946 lea r22, ptr [r17+r31*2+0x46] +XDIS 227ac: MISC BASE D57A8D747A47 lea r22, ptr [r18+r31*2+0x47] +XDIS 227b2: MISC BASE D57A8D747B48 lea r22, ptr [r19+r31*2+0x48] +XDIS 227b8: MISC BASE D57A8D747C49 lea r22, ptr [r20+r31*2+0x49] +XDIS 227be: MISC BASE D57A8D747D4A lea r22, ptr [r21+r31*2+0x4a] +XDIS 227c4: MISC BASE D57A8D747E4B lea r22, ptr [r22+r31*2+0x4b] +XDIS 227ca: MISC BASE D57A8D747F4C lea r22, ptr [r23+r31*2+0x4c] +XDIS 227d0: MISC BASE D57B8D74784D lea r22, ptr [r24+r31*2+0x4d] +XDIS 227d6: MISC BASE D57B8D74794E lea r22, ptr [r25+r31*2+0x4e] +XDIS 227dc: MISC BASE D57B8D747A4F lea r22, ptr [r26+r31*2+0x4f] +XDIS 227e2: MISC BASE D57B8D747B50 lea r22, ptr [r27+r31*2+0x50] +XDIS 227e8: MISC BASE D57B8D747C51 lea r22, ptr [r28+r31*2+0x51] +XDIS 227ee: MISC BASE D57B8D747D52 lea r22, ptr [r29+r31*2+0x52] +XDIS 227f4: MISC BASE D57B8D747E53 lea r22, ptr [r30+r31*2+0x53] +XDIS 227fa: MISC BASE D57B8D747F54 lea r22, ptr [r31+r31*2+0x54] +XDIS 22800: MISC BASE D5488D7C4017 lea r23, ptr [rax+rax*2+0x17] +XDIS 22806: MISC BASE D5488D7C4118 lea r23, ptr [rcx+rax*2+0x18] +XDIS 2280c: MISC BASE D5488D7C4219 lea r23, ptr [rdx+rax*2+0x19] +XDIS 22812: MISC BASE D5488D7C431A lea r23, ptr [rbx+rax*2+0x1a] +XDIS 22818: MISC BASE D5488D7C441B lea r23, ptr [rsp+rax*2+0x1b] +XDIS 2281e: MISC BASE D5488D7C451C lea r23, ptr [rbp+rax*2+0x1c] +XDIS 22824: MISC BASE D5488D7C461D lea r23, ptr [rsi+rax*2+0x1d] +XDIS 2282a: MISC BASE D5488D7C471E lea r23, ptr [rdi+rax*2+0x1e] +XDIS 22830: MISC BASE D5498D7C401F lea r23, ptr [r8+rax*2+0x1f] +XDIS 22836: MISC BASE D5498D7C4120 lea r23, ptr [r9+rax*2+0x20] +XDIS 2283c: MISC BASE D5498D7C4221 lea r23, ptr [r10+rax*2+0x21] +XDIS 22842: MISC BASE D5498D7C4322 lea r23, ptr [r11+rax*2+0x22] +XDIS 22848: MISC BASE D5498D7C4423 lea r23, ptr [r12+rax*2+0x23] +XDIS 2284e: MISC BASE D5498D7C4524 lea r23, ptr [r13+rax*2+0x24] +XDIS 22854: MISC BASE D5498D7C4625 lea r23, ptr [r14+rax*2+0x25] +XDIS 2285a: MISC BASE D5498D7C4726 lea r23, ptr [r15+rax*2+0x26] +XDIS 22860: MISC BASE D5588D7C4027 lea r23, ptr [r16+rax*2+0x27] +XDIS 22866: MISC BASE D5588D7C4128 lea r23, ptr [r17+rax*2+0x28] +XDIS 2286c: MISC BASE D5588D7C4229 lea r23, ptr [r18+rax*2+0x29] +XDIS 22872: MISC BASE D5588D7C432A lea r23, ptr [r19+rax*2+0x2a] +XDIS 22878: MISC BASE D5588D7C442B lea r23, ptr [r20+rax*2+0x2b] +XDIS 2287e: MISC BASE D5588D7C452C lea r23, ptr [r21+rax*2+0x2c] +XDIS 22884: MISC BASE D5588D7C462D lea r23, ptr [r22+rax*2+0x2d] +XDIS 2288a: MISC BASE D5588D7C472E lea r23, ptr [r23+rax*2+0x2e] +XDIS 22890: MISC BASE D5598D7C402F lea r23, ptr [r24+rax*2+0x2f] +XDIS 22896: MISC BASE D5598D7C4130 lea r23, ptr [r25+rax*2+0x30] +XDIS 2289c: MISC BASE D5598D7C4231 lea r23, ptr [r26+rax*2+0x31] +XDIS 228a2: MISC BASE D5598D7C4332 lea r23, ptr [r27+rax*2+0x32] +XDIS 228a8: MISC BASE D5598D7C4433 lea r23, ptr [r28+rax*2+0x33] +XDIS 228ae: MISC BASE D5598D7C4534 lea r23, ptr [r29+rax*2+0x34] +XDIS 228b4: MISC BASE D5598D7C4635 lea r23, ptr [r30+rax*2+0x35] +XDIS 228ba: MISC BASE D5598D7C4736 lea r23, ptr [r31+rax*2+0x36] +XDIS 228c0: MISC BASE D5488D7C4818 lea r23, ptr [rax+rcx*2+0x18] +XDIS 228c6: MISC BASE D5488D7C4919 lea r23, ptr [rcx+rcx*2+0x19] +XDIS 228cc: MISC BASE D5488D7C4A1A lea r23, ptr [rdx+rcx*2+0x1a] +XDIS 228d2: MISC BASE D5488D7C4B1B lea r23, ptr [rbx+rcx*2+0x1b] +XDIS 228d8: MISC BASE D5488D7C4C1C lea r23, ptr [rsp+rcx*2+0x1c] +XDIS 228de: MISC BASE D5488D7C4D1D lea r23, ptr [rbp+rcx*2+0x1d] +XDIS 228e4: MISC BASE D5488D7C4E1E lea r23, ptr [rsi+rcx*2+0x1e] +XDIS 228ea: MISC BASE D5488D7C4F1F lea r23, ptr [rdi+rcx*2+0x1f] +XDIS 228f0: MISC BASE D5498D7C4820 lea r23, ptr [r8+rcx*2+0x20] +XDIS 228f6: MISC BASE D5498D7C4921 lea r23, ptr [r9+rcx*2+0x21] +XDIS 228fc: MISC BASE D5498D7C4A22 lea r23, ptr [r10+rcx*2+0x22] +XDIS 22902: MISC BASE D5498D7C4B23 lea r23, ptr [r11+rcx*2+0x23] +XDIS 22908: MISC BASE D5498D7C4C24 lea r23, ptr [r12+rcx*2+0x24] +XDIS 2290e: MISC BASE D5498D7C4D25 lea r23, ptr [r13+rcx*2+0x25] +XDIS 22914: MISC BASE D5498D7C4E26 lea r23, ptr [r14+rcx*2+0x26] +XDIS 2291a: MISC BASE D5498D7C4F27 lea r23, ptr [r15+rcx*2+0x27] +XDIS 22920: MISC BASE D5588D7C4828 lea r23, ptr [r16+rcx*2+0x28] +XDIS 22926: MISC BASE D5588D7C4929 lea r23, ptr [r17+rcx*2+0x29] +XDIS 2292c: MISC BASE D5588D7C4A2A lea r23, ptr [r18+rcx*2+0x2a] +XDIS 22932: MISC BASE D5588D7C4B2B lea r23, ptr [r19+rcx*2+0x2b] +XDIS 22938: MISC BASE D5588D7C4C2C lea r23, ptr [r20+rcx*2+0x2c] +XDIS 2293e: MISC BASE D5588D7C4D2D lea r23, ptr [r21+rcx*2+0x2d] +XDIS 22944: MISC BASE D5588D7C4E2E lea r23, ptr [r22+rcx*2+0x2e] +XDIS 2294a: MISC BASE D5588D7C4F2F lea r23, ptr [r23+rcx*2+0x2f] +XDIS 22950: MISC BASE D5598D7C4830 lea r23, ptr [r24+rcx*2+0x30] +XDIS 22956: MISC BASE D5598D7C4931 lea r23, ptr [r25+rcx*2+0x31] +XDIS 2295c: MISC BASE D5598D7C4A32 lea r23, ptr [r26+rcx*2+0x32] +XDIS 22962: MISC BASE D5598D7C4B33 lea r23, ptr [r27+rcx*2+0x33] +XDIS 22968: MISC BASE D5598D7C4C34 lea r23, ptr [r28+rcx*2+0x34] +XDIS 2296e: MISC BASE D5598D7C4D35 lea r23, ptr [r29+rcx*2+0x35] +XDIS 22974: MISC BASE D5598D7C4E36 lea r23, ptr [r30+rcx*2+0x36] +XDIS 2297a: MISC BASE D5598D7C4F37 lea r23, ptr [r31+rcx*2+0x37] +XDIS 22980: MISC BASE D5488D7C5019 lea r23, ptr [rax+rdx*2+0x19] +XDIS 22986: MISC BASE D5488D7C511A lea r23, ptr [rcx+rdx*2+0x1a] +XDIS 2298c: MISC BASE D5488D7C521B lea r23, ptr [rdx+rdx*2+0x1b] +XDIS 22992: MISC BASE D5488D7C531C lea r23, ptr [rbx+rdx*2+0x1c] +XDIS 22998: MISC BASE D5488D7C541D lea r23, ptr [rsp+rdx*2+0x1d] +XDIS 2299e: MISC BASE D5488D7C551E lea r23, ptr [rbp+rdx*2+0x1e] +XDIS 229a4: MISC BASE D5488D7C561F lea r23, ptr [rsi+rdx*2+0x1f] +XDIS 229aa: MISC BASE D5488D7C5720 lea r23, ptr [rdi+rdx*2+0x20] +XDIS 229b0: MISC BASE D5498D7C5021 lea r23, ptr [r8+rdx*2+0x21] +XDIS 229b6: MISC BASE D5498D7C5122 lea r23, ptr [r9+rdx*2+0x22] +XDIS 229bc: MISC BASE D5498D7C5223 lea r23, ptr [r10+rdx*2+0x23] +XDIS 229c2: MISC BASE D5498D7C5324 lea r23, ptr [r11+rdx*2+0x24] +XDIS 229c8: MISC BASE D5498D7C5425 lea r23, ptr [r12+rdx*2+0x25] +XDIS 229ce: MISC BASE D5498D7C5526 lea r23, ptr [r13+rdx*2+0x26] +XDIS 229d4: MISC BASE D5498D7C5627 lea r23, ptr [r14+rdx*2+0x27] +XDIS 229da: MISC BASE D5498D7C5728 lea r23, ptr [r15+rdx*2+0x28] +XDIS 229e0: MISC BASE D5588D7C5029 lea r23, ptr [r16+rdx*2+0x29] +XDIS 229e6: MISC BASE D5588D7C512A lea r23, ptr [r17+rdx*2+0x2a] +XDIS 229ec: MISC BASE D5588D7C522B lea r23, ptr [r18+rdx*2+0x2b] +XDIS 229f2: MISC BASE D5588D7C532C lea r23, ptr [r19+rdx*2+0x2c] +XDIS 229f8: MISC BASE D5588D7C542D lea r23, ptr [r20+rdx*2+0x2d] +XDIS 229fe: MISC BASE D5588D7C552E lea r23, ptr [r21+rdx*2+0x2e] +XDIS 22a04: MISC BASE D5588D7C562F lea r23, ptr [r22+rdx*2+0x2f] +XDIS 22a0a: MISC BASE D5588D7C5730 lea r23, ptr [r23+rdx*2+0x30] +XDIS 22a10: MISC BASE D5598D7C5031 lea r23, ptr [r24+rdx*2+0x31] +XDIS 22a16: MISC BASE D5598D7C5132 lea r23, ptr [r25+rdx*2+0x32] +XDIS 22a1c: MISC BASE D5598D7C5233 lea r23, ptr [r26+rdx*2+0x33] +XDIS 22a22: MISC BASE D5598D7C5334 lea r23, ptr [r27+rdx*2+0x34] +XDIS 22a28: MISC BASE D5598D7C5435 lea r23, ptr [r28+rdx*2+0x35] +XDIS 22a2e: MISC BASE D5598D7C5536 lea r23, ptr [r29+rdx*2+0x36] +XDIS 22a34: MISC BASE D5598D7C5637 lea r23, ptr [r30+rdx*2+0x37] +XDIS 22a3a: MISC BASE D5598D7C5738 lea r23, ptr [r31+rdx*2+0x38] +XDIS 22a40: MISC BASE D5488D7C581A lea r23, ptr [rax+rbx*2+0x1a] +XDIS 22a46: MISC BASE D5488D7C591B lea r23, ptr [rcx+rbx*2+0x1b] +XDIS 22a4c: MISC BASE D5488D7C5A1C lea r23, ptr [rdx+rbx*2+0x1c] +XDIS 22a52: MISC BASE D5488D7C5B1D lea r23, ptr [rbx+rbx*2+0x1d] +XDIS 22a58: MISC BASE D5488D7C5C1E lea r23, ptr [rsp+rbx*2+0x1e] +XDIS 22a5e: MISC BASE D5488D7C5D1F lea r23, ptr [rbp+rbx*2+0x1f] +XDIS 22a64: MISC BASE D5488D7C5E20 lea r23, ptr [rsi+rbx*2+0x20] +XDIS 22a6a: MISC BASE D5488D7C5F21 lea r23, ptr [rdi+rbx*2+0x21] +XDIS 22a70: MISC BASE D5498D7C5822 lea r23, ptr [r8+rbx*2+0x22] +XDIS 22a76: MISC BASE D5498D7C5923 lea r23, ptr [r9+rbx*2+0x23] +XDIS 22a7c: MISC BASE D5498D7C5A24 lea r23, ptr [r10+rbx*2+0x24] +XDIS 22a82: MISC BASE D5498D7C5B25 lea r23, ptr [r11+rbx*2+0x25] +XDIS 22a88: MISC BASE D5498D7C5C26 lea r23, ptr [r12+rbx*2+0x26] +XDIS 22a8e: MISC BASE D5498D7C5D27 lea r23, ptr [r13+rbx*2+0x27] +XDIS 22a94: MISC BASE D5498D7C5E28 lea r23, ptr [r14+rbx*2+0x28] +XDIS 22a9a: MISC BASE D5498D7C5F29 lea r23, ptr [r15+rbx*2+0x29] +XDIS 22aa0: MISC BASE D5588D7C582A lea r23, ptr [r16+rbx*2+0x2a] +XDIS 22aa6: MISC BASE D5588D7C592B lea r23, ptr [r17+rbx*2+0x2b] +XDIS 22aac: MISC BASE D5588D7C5A2C lea r23, ptr [r18+rbx*2+0x2c] +XDIS 22ab2: MISC BASE D5588D7C5B2D lea r23, ptr [r19+rbx*2+0x2d] +XDIS 22ab8: MISC BASE D5588D7C5C2E lea r23, ptr [r20+rbx*2+0x2e] +XDIS 22abe: MISC BASE D5588D7C5D2F lea r23, ptr [r21+rbx*2+0x2f] +XDIS 22ac4: MISC BASE D5588D7C5E30 lea r23, ptr [r22+rbx*2+0x30] +XDIS 22aca: MISC BASE D5588D7C5F31 lea r23, ptr [r23+rbx*2+0x31] +XDIS 22ad0: MISC BASE D5598D7C5832 lea r23, ptr [r24+rbx*2+0x32] +XDIS 22ad6: MISC BASE D5598D7C5933 lea r23, ptr [r25+rbx*2+0x33] +XDIS 22adc: MISC BASE D5598D7C5A34 lea r23, ptr [r26+rbx*2+0x34] +XDIS 22ae2: MISC BASE D5598D7C5B35 lea r23, ptr [r27+rbx*2+0x35] +XDIS 22ae8: MISC BASE D5598D7C5C36 lea r23, ptr [r28+rbx*2+0x36] +XDIS 22aee: MISC BASE D5598D7C5D37 lea r23, ptr [r29+rbx*2+0x37] +XDIS 22af4: MISC BASE D5598D7C5E38 lea r23, ptr [r30+rbx*2+0x38] +XDIS 22afa: MISC BASE D5598D7C5F39 lea r23, ptr [r31+rbx*2+0x39] +XDIS 22b00: MISC BASE D5488D7C601B lea r23, ptr [rax+0x1b] +XDIS 22b06: MISC BASE D5488D7C611C lea r23, ptr [rcx+0x1c] +XDIS 22b0c: MISC BASE D5488D7C621D lea r23, ptr [rdx+0x1d] +XDIS 22b12: MISC BASE D5488D7C631E lea r23, ptr [rbx+0x1e] +XDIS 22b18: MISC BASE D5488D7C641F lea r23, ptr [rsp+0x1f] +XDIS 22b1e: MISC BASE D5488D7C6520 lea r23, ptr [rbp+0x20] +XDIS 22b24: MISC BASE D5488D7C6621 lea r23, ptr [rsi+0x21] +XDIS 22b2a: MISC BASE D5488D7C6722 lea r23, ptr [rdi+0x22] +XDIS 22b30: MISC BASE D5498D7C6023 lea r23, ptr [r8+0x23] +XDIS 22b36: MISC BASE D5498D7C6124 lea r23, ptr [r9+0x24] +XDIS 22b3c: MISC BASE D5498D7C6225 lea r23, ptr [r10+0x25] +XDIS 22b42: MISC BASE D5498D7C6326 lea r23, ptr [r11+0x26] +XDIS 22b48: MISC BASE D5498D7C6427 lea r23, ptr [r12+0x27] +XDIS 22b4e: MISC BASE D5498D7C6528 lea r23, ptr [r13+0x28] +XDIS 22b54: MISC BASE D5498D7C6629 lea r23, ptr [r14+0x29] +XDIS 22b5a: MISC BASE D5498D7C672A lea r23, ptr [r15+0x2a] +XDIS 22b60: MISC BASE D5588D7C602B lea r23, ptr [r16+0x2b] +XDIS 22b66: MISC BASE D5588D7C612C lea r23, ptr [r17+0x2c] +XDIS 22b6c: MISC BASE D5588D7C622D lea r23, ptr [r18+0x2d] +XDIS 22b72: MISC BASE D5588D7C632E lea r23, ptr [r19+0x2e] +XDIS 22b78: MISC BASE D5588D7C642F lea r23, ptr [r20+0x2f] +XDIS 22b7e: MISC BASE D5588D7C6530 lea r23, ptr [r21+0x30] +XDIS 22b84: MISC BASE D5588D7C6631 lea r23, ptr [r22+0x31] +XDIS 22b8a: MISC BASE D5588D7C6732 lea r23, ptr [r23+0x32] +XDIS 22b90: MISC BASE D5598D7C6033 lea r23, ptr [r24+0x33] +XDIS 22b96: MISC BASE D5598D7C6134 lea r23, ptr [r25+0x34] +XDIS 22b9c: MISC BASE D5598D7C6235 lea r23, ptr [r26+0x35] +XDIS 22ba2: MISC BASE D5598D7C6336 lea r23, ptr [r27+0x36] +XDIS 22ba8: MISC BASE D5598D7C6437 lea r23, ptr [r28+0x37] +XDIS 22bae: MISC BASE D5598D7C6538 lea r23, ptr [r29+0x38] +XDIS 22bb4: MISC BASE D5598D7C6639 lea r23, ptr [r30+0x39] +XDIS 22bba: MISC BASE D5598D7C673A lea r23, ptr [r31+0x3a] +XDIS 22bc0: MISC BASE D5488D7C681C lea r23, ptr [rax+rbp*2+0x1c] +XDIS 22bc6: MISC BASE D5488D7C691D lea r23, ptr [rcx+rbp*2+0x1d] +XDIS 22bcc: MISC BASE D5488D7C6A1E lea r23, ptr [rdx+rbp*2+0x1e] +XDIS 22bd2: MISC BASE D5488D7C6B1F lea r23, ptr [rbx+rbp*2+0x1f] +XDIS 22bd8: MISC BASE D5488D7C6C20 lea r23, ptr [rsp+rbp*2+0x20] +XDIS 22bde: MISC BASE D5488D7C6D21 lea r23, ptr [rbp+rbp*2+0x21] +XDIS 22be4: MISC BASE D5488D7C6E22 lea r23, ptr [rsi+rbp*2+0x22] +XDIS 22bea: MISC BASE D5488D7C6F23 lea r23, ptr [rdi+rbp*2+0x23] +XDIS 22bf0: MISC BASE D5498D7C6824 lea r23, ptr [r8+rbp*2+0x24] +XDIS 22bf6: MISC BASE D5498D7C6925 lea r23, ptr [r9+rbp*2+0x25] +XDIS 22bfc: MISC BASE D5498D7C6A26 lea r23, ptr [r10+rbp*2+0x26] +XDIS 22c02: MISC BASE D5498D7C6B27 lea r23, ptr [r11+rbp*2+0x27] +XDIS 22c08: MISC BASE D5498D7C6C28 lea r23, ptr [r12+rbp*2+0x28] +XDIS 22c0e: MISC BASE D5498D7C6D29 lea r23, ptr [r13+rbp*2+0x29] +XDIS 22c14: MISC BASE D5498D7C6E2A lea r23, ptr [r14+rbp*2+0x2a] +XDIS 22c1a: MISC BASE D5498D7C6F2B lea r23, ptr [r15+rbp*2+0x2b] +XDIS 22c20: MISC BASE D5588D7C682C lea r23, ptr [r16+rbp*2+0x2c] +XDIS 22c26: MISC BASE D5588D7C692D lea r23, ptr [r17+rbp*2+0x2d] +XDIS 22c2c: MISC BASE D5588D7C6A2E lea r23, ptr [r18+rbp*2+0x2e] +XDIS 22c32: MISC BASE D5588D7C6B2F lea r23, ptr [r19+rbp*2+0x2f] +XDIS 22c38: MISC BASE D5588D7C6C30 lea r23, ptr [r20+rbp*2+0x30] +XDIS 22c3e: MISC BASE D5588D7C6D31 lea r23, ptr [r21+rbp*2+0x31] +XDIS 22c44: MISC BASE D5588D7C6E32 lea r23, ptr [r22+rbp*2+0x32] +XDIS 22c4a: MISC BASE D5588D7C6F33 lea r23, ptr [r23+rbp*2+0x33] +XDIS 22c50: MISC BASE D5598D7C6834 lea r23, ptr [r24+rbp*2+0x34] +XDIS 22c56: MISC BASE D5598D7C6935 lea r23, ptr [r25+rbp*2+0x35] +XDIS 22c5c: MISC BASE D5598D7C6A36 lea r23, ptr [r26+rbp*2+0x36] +XDIS 22c62: MISC BASE D5598D7C6B37 lea r23, ptr [r27+rbp*2+0x37] +XDIS 22c68: MISC BASE D5598D7C6C38 lea r23, ptr [r28+rbp*2+0x38] +XDIS 22c6e: MISC BASE D5598D7C6D39 lea r23, ptr [r29+rbp*2+0x39] +XDIS 22c74: MISC BASE D5598D7C6E3A lea r23, ptr [r30+rbp*2+0x3a] +XDIS 22c7a: MISC BASE D5598D7C6F3B lea r23, ptr [r31+rbp*2+0x3b] +XDIS 22c80: MISC BASE D5488D7C701D lea r23, ptr [rax+rsi*2+0x1d] +XDIS 22c86: MISC BASE D5488D7C711E lea r23, ptr [rcx+rsi*2+0x1e] +XDIS 22c8c: MISC BASE D5488D7C721F lea r23, ptr [rdx+rsi*2+0x1f] +XDIS 22c92: MISC BASE D5488D7C7320 lea r23, ptr [rbx+rsi*2+0x20] +XDIS 22c98: MISC BASE D5488D7C7421 lea r23, ptr [rsp+rsi*2+0x21] +XDIS 22c9e: MISC BASE D5488D7C7522 lea r23, ptr [rbp+rsi*2+0x22] +XDIS 22ca4: MISC BASE D5488D7C7623 lea r23, ptr [rsi+rsi*2+0x23] +XDIS 22caa: MISC BASE D5488D7C7724 lea r23, ptr [rdi+rsi*2+0x24] +XDIS 22cb0: MISC BASE D5498D7C7025 lea r23, ptr [r8+rsi*2+0x25] +XDIS 22cb6: MISC BASE D5498D7C7126 lea r23, ptr [r9+rsi*2+0x26] +XDIS 22cbc: MISC BASE D5498D7C7227 lea r23, ptr [r10+rsi*2+0x27] +XDIS 22cc2: MISC BASE D5498D7C7328 lea r23, ptr [r11+rsi*2+0x28] +XDIS 22cc8: MISC BASE D5498D7C7429 lea r23, ptr [r12+rsi*2+0x29] +XDIS 22cce: MISC BASE D5498D7C752A lea r23, ptr [r13+rsi*2+0x2a] +XDIS 22cd4: MISC BASE D5498D7C762B lea r23, ptr [r14+rsi*2+0x2b] +XDIS 22cda: MISC BASE D5498D7C772C lea r23, ptr [r15+rsi*2+0x2c] +XDIS 22ce0: MISC BASE D5588D7C702D lea r23, ptr [r16+rsi*2+0x2d] +XDIS 22ce6: MISC BASE D5588D7C712E lea r23, ptr [r17+rsi*2+0x2e] +XDIS 22cec: MISC BASE D5588D7C722F lea r23, ptr [r18+rsi*2+0x2f] +XDIS 22cf2: MISC BASE D5588D7C7330 lea r23, ptr [r19+rsi*2+0x30] +XDIS 22cf8: MISC BASE D5588D7C7431 lea r23, ptr [r20+rsi*2+0x31] +XDIS 22cfe: MISC BASE D5588D7C7532 lea r23, ptr [r21+rsi*2+0x32] +XDIS 22d04: MISC BASE D5588D7C7633 lea r23, ptr [r22+rsi*2+0x33] +XDIS 22d0a: MISC BASE D5588D7C7734 lea r23, ptr [r23+rsi*2+0x34] +XDIS 22d10: MISC BASE D5598D7C7035 lea r23, ptr [r24+rsi*2+0x35] +XDIS 22d16: MISC BASE D5598D7C7136 lea r23, ptr [r25+rsi*2+0x36] +XDIS 22d1c: MISC BASE D5598D7C7237 lea r23, ptr [r26+rsi*2+0x37] +XDIS 22d22: MISC BASE D5598D7C7338 lea r23, ptr [r27+rsi*2+0x38] +XDIS 22d28: MISC BASE D5598D7C7439 lea r23, ptr [r28+rsi*2+0x39] +XDIS 22d2e: MISC BASE D5598D7C753A lea r23, ptr [r29+rsi*2+0x3a] +XDIS 22d34: MISC BASE D5598D7C763B lea r23, ptr [r30+rsi*2+0x3b] +XDIS 22d3a: MISC BASE D5598D7C773C lea r23, ptr [r31+rsi*2+0x3c] +XDIS 22d40: MISC BASE D5488D7C781E lea r23, ptr [rax+rdi*2+0x1e] +XDIS 22d46: MISC BASE D5488D7C791F lea r23, ptr [rcx+rdi*2+0x1f] +XDIS 22d4c: MISC BASE D5488D7C7A20 lea r23, ptr [rdx+rdi*2+0x20] +XDIS 22d52: MISC BASE D5488D7C7B21 lea r23, ptr [rbx+rdi*2+0x21] +XDIS 22d58: MISC BASE D5488D7C7C22 lea r23, ptr [rsp+rdi*2+0x22] +XDIS 22d5e: MISC BASE D5488D7C7D23 lea r23, ptr [rbp+rdi*2+0x23] +XDIS 22d64: MISC BASE D5488D7C7E24 lea r23, ptr [rsi+rdi*2+0x24] +XDIS 22d6a: MISC BASE D5488D7C7F25 lea r23, ptr [rdi+rdi*2+0x25] +XDIS 22d70: MISC BASE D5498D7C7826 lea r23, ptr [r8+rdi*2+0x26] +XDIS 22d76: MISC BASE D5498D7C7927 lea r23, ptr [r9+rdi*2+0x27] +XDIS 22d7c: MISC BASE D5498D7C7A28 lea r23, ptr [r10+rdi*2+0x28] +XDIS 22d82: MISC BASE D5498D7C7B29 lea r23, ptr [r11+rdi*2+0x29] +XDIS 22d88: MISC BASE D5498D7C7C2A lea r23, ptr [r12+rdi*2+0x2a] +XDIS 22d8e: MISC BASE D5498D7C7D2B lea r23, ptr [r13+rdi*2+0x2b] +XDIS 22d94: MISC BASE D5498D7C7E2C lea r23, ptr [r14+rdi*2+0x2c] +XDIS 22d9a: MISC BASE D5498D7C7F2D lea r23, ptr [r15+rdi*2+0x2d] +XDIS 22da0: MISC BASE D5588D7C782E lea r23, ptr [r16+rdi*2+0x2e] +XDIS 22da6: MISC BASE D5588D7C792F lea r23, ptr [r17+rdi*2+0x2f] +XDIS 22dac: MISC BASE D5588D7C7A30 lea r23, ptr [r18+rdi*2+0x30] +XDIS 22db2: MISC BASE D5588D7C7B31 lea r23, ptr [r19+rdi*2+0x31] +XDIS 22db8: MISC BASE D5588D7C7C32 lea r23, ptr [r20+rdi*2+0x32] +XDIS 22dbe: MISC BASE D5588D7C7D33 lea r23, ptr [r21+rdi*2+0x33] +XDIS 22dc4: MISC BASE D5588D7C7E34 lea r23, ptr [r22+rdi*2+0x34] +XDIS 22dca: MISC BASE D5588D7C7F35 lea r23, ptr [r23+rdi*2+0x35] +XDIS 22dd0: MISC BASE D5598D7C7836 lea r23, ptr [r24+rdi*2+0x36] +XDIS 22dd6: MISC BASE D5598D7C7937 lea r23, ptr [r25+rdi*2+0x37] +XDIS 22ddc: MISC BASE D5598D7C7A38 lea r23, ptr [r26+rdi*2+0x38] +XDIS 22de2: MISC BASE D5598D7C7B39 lea r23, ptr [r27+rdi*2+0x39] +XDIS 22de8: MISC BASE D5598D7C7C3A lea r23, ptr [r28+rdi*2+0x3a] +XDIS 22dee: MISC BASE D5598D7C7D3B lea r23, ptr [r29+rdi*2+0x3b] +XDIS 22df4: MISC BASE D5598D7C7E3C lea r23, ptr [r30+rdi*2+0x3c] +XDIS 22dfa: MISC BASE D5598D7C7F3D lea r23, ptr [r31+rdi*2+0x3d] +XDIS 22e00: MISC BASE D54A8D7C401F lea r23, ptr [rax+r8*2+0x1f] +XDIS 22e06: MISC BASE D54A8D7C4120 lea r23, ptr [rcx+r8*2+0x20] +XDIS 22e0c: MISC BASE D54A8D7C4221 lea r23, ptr [rdx+r8*2+0x21] +XDIS 22e12: MISC BASE D54A8D7C4322 lea r23, ptr [rbx+r8*2+0x22] +XDIS 22e18: MISC BASE D54A8D7C4423 lea r23, ptr [rsp+r8*2+0x23] +XDIS 22e1e: MISC BASE D54A8D7C4524 lea r23, ptr [rbp+r8*2+0x24] +XDIS 22e24: MISC BASE D54A8D7C4625 lea r23, ptr [rsi+r8*2+0x25] +XDIS 22e2a: MISC BASE D54A8D7C4726 lea r23, ptr [rdi+r8*2+0x26] +XDIS 22e30: MISC BASE D54B8D7C4027 lea r23, ptr [r8+r8*2+0x27] +XDIS 22e36: MISC BASE D54B8D7C4128 lea r23, ptr [r9+r8*2+0x28] +XDIS 22e3c: MISC BASE D54B8D7C4229 lea r23, ptr [r10+r8*2+0x29] +XDIS 22e42: MISC BASE D54B8D7C432A lea r23, ptr [r11+r8*2+0x2a] +XDIS 22e48: MISC BASE D54B8D7C442B lea r23, ptr [r12+r8*2+0x2b] +XDIS 22e4e: MISC BASE D54B8D7C452C lea r23, ptr [r13+r8*2+0x2c] +XDIS 22e54: MISC BASE D54B8D7C462D lea r23, ptr [r14+r8*2+0x2d] +XDIS 22e5a: MISC BASE D54B8D7C472E lea r23, ptr [r15+r8*2+0x2e] +XDIS 22e60: MISC BASE D55A8D7C402F lea r23, ptr [r16+r8*2+0x2f] +XDIS 22e66: MISC BASE D55A8D7C4130 lea r23, ptr [r17+r8*2+0x30] +XDIS 22e6c: MISC BASE D55A8D7C4231 lea r23, ptr [r18+r8*2+0x31] +XDIS 22e72: MISC BASE D55A8D7C4332 lea r23, ptr [r19+r8*2+0x32] +XDIS 22e78: MISC BASE D55A8D7C4433 lea r23, ptr [r20+r8*2+0x33] +XDIS 22e7e: MISC BASE D55A8D7C4534 lea r23, ptr [r21+r8*2+0x34] +XDIS 22e84: MISC BASE D55A8D7C4635 lea r23, ptr [r22+r8*2+0x35] +XDIS 22e8a: MISC BASE D55A8D7C4736 lea r23, ptr [r23+r8*2+0x36] +XDIS 22e90: MISC BASE D55B8D7C4037 lea r23, ptr [r24+r8*2+0x37] +XDIS 22e96: MISC BASE D55B8D7C4138 lea r23, ptr [r25+r8*2+0x38] +XDIS 22e9c: MISC BASE D55B8D7C4239 lea r23, ptr [r26+r8*2+0x39] +XDIS 22ea2: MISC BASE D55B8D7C433A lea r23, ptr [r27+r8*2+0x3a] +XDIS 22ea8: MISC BASE D55B8D7C443B lea r23, ptr [r28+r8*2+0x3b] +XDIS 22eae: MISC BASE D55B8D7C453C lea r23, ptr [r29+r8*2+0x3c] +XDIS 22eb4: MISC BASE D55B8D7C463D lea r23, ptr [r30+r8*2+0x3d] +XDIS 22eba: MISC BASE D55B8D7C473E lea r23, ptr [r31+r8*2+0x3e] +XDIS 22ec0: MISC BASE D54A8D7C4820 lea r23, ptr [rax+r9*2+0x20] +XDIS 22ec6: MISC BASE D54A8D7C4921 lea r23, ptr [rcx+r9*2+0x21] +XDIS 22ecc: MISC BASE D54A8D7C4A22 lea r23, ptr [rdx+r9*2+0x22] +XDIS 22ed2: MISC BASE D54A8D7C4B23 lea r23, ptr [rbx+r9*2+0x23] +XDIS 22ed8: MISC BASE D54A8D7C4C24 lea r23, ptr [rsp+r9*2+0x24] +XDIS 22ede: MISC BASE D54A8D7C4D25 lea r23, ptr [rbp+r9*2+0x25] +XDIS 22ee4: MISC BASE D54A8D7C4E26 lea r23, ptr [rsi+r9*2+0x26] +XDIS 22eea: MISC BASE D54A8D7C4F27 lea r23, ptr [rdi+r9*2+0x27] +XDIS 22ef0: MISC BASE D54B8D7C4828 lea r23, ptr [r8+r9*2+0x28] +XDIS 22ef6: MISC BASE D54B8D7C4929 lea r23, ptr [r9+r9*2+0x29] +XDIS 22efc: MISC BASE D54B8D7C4A2A lea r23, ptr [r10+r9*2+0x2a] +XDIS 22f02: MISC BASE D54B8D7C4B2B lea r23, ptr [r11+r9*2+0x2b] +XDIS 22f08: MISC BASE D54B8D7C4C2C lea r23, ptr [r12+r9*2+0x2c] +XDIS 22f0e: MISC BASE D54B8D7C4D2D lea r23, ptr [r13+r9*2+0x2d] +XDIS 22f14: MISC BASE D54B8D7C4E2E lea r23, ptr [r14+r9*2+0x2e] +XDIS 22f1a: MISC BASE D54B8D7C4F2F lea r23, ptr [r15+r9*2+0x2f] +XDIS 22f20: MISC BASE D55A8D7C4830 lea r23, ptr [r16+r9*2+0x30] +XDIS 22f26: MISC BASE D55A8D7C4931 lea r23, ptr [r17+r9*2+0x31] +XDIS 22f2c: MISC BASE D55A8D7C4A32 lea r23, ptr [r18+r9*2+0x32] +XDIS 22f32: MISC BASE D55A8D7C4B33 lea r23, ptr [r19+r9*2+0x33] +XDIS 22f38: MISC BASE D55A8D7C4C34 lea r23, ptr [r20+r9*2+0x34] +XDIS 22f3e: MISC BASE D55A8D7C4D35 lea r23, ptr [r21+r9*2+0x35] +XDIS 22f44: MISC BASE D55A8D7C4E36 lea r23, ptr [r22+r9*2+0x36] +XDIS 22f4a: MISC BASE D55A8D7C4F37 lea r23, ptr [r23+r9*2+0x37] +XDIS 22f50: MISC BASE D55B8D7C4838 lea r23, ptr [r24+r9*2+0x38] +XDIS 22f56: MISC BASE D55B8D7C4939 lea r23, ptr [r25+r9*2+0x39] +XDIS 22f5c: MISC BASE D55B8D7C4A3A lea r23, ptr [r26+r9*2+0x3a] +XDIS 22f62: MISC BASE D55B8D7C4B3B lea r23, ptr [r27+r9*2+0x3b] +XDIS 22f68: MISC BASE D55B8D7C4C3C lea r23, ptr [r28+r9*2+0x3c] +XDIS 22f6e: MISC BASE D55B8D7C4D3D lea r23, ptr [r29+r9*2+0x3d] +XDIS 22f74: MISC BASE D55B8D7C4E3E lea r23, ptr [r30+r9*2+0x3e] +XDIS 22f7a: MISC BASE D55B8D7C4F3F lea r23, ptr [r31+r9*2+0x3f] +XDIS 22f80: MISC BASE D54A8D7C5021 lea r23, ptr [rax+r10*2+0x21] +XDIS 22f86: MISC BASE D54A8D7C5122 lea r23, ptr [rcx+r10*2+0x22] +XDIS 22f8c: MISC BASE D54A8D7C5223 lea r23, ptr [rdx+r10*2+0x23] +XDIS 22f92: MISC BASE D54A8D7C5324 lea r23, ptr [rbx+r10*2+0x24] +XDIS 22f98: MISC BASE D54A8D7C5425 lea r23, ptr [rsp+r10*2+0x25] +XDIS 22f9e: MISC BASE D54A8D7C5526 lea r23, ptr [rbp+r10*2+0x26] +XDIS 22fa4: MISC BASE D54A8D7C5627 lea r23, ptr [rsi+r10*2+0x27] +XDIS 22faa: MISC BASE D54A8D7C5728 lea r23, ptr [rdi+r10*2+0x28] +XDIS 22fb0: MISC BASE D54B8D7C5029 lea r23, ptr [r8+r10*2+0x29] +XDIS 22fb6: MISC BASE D54B8D7C512A lea r23, ptr [r9+r10*2+0x2a] +XDIS 22fbc: MISC BASE D54B8D7C522B lea r23, ptr [r10+r10*2+0x2b] +XDIS 22fc2: MISC BASE D54B8D7C532C lea r23, ptr [r11+r10*2+0x2c] +XDIS 22fc8: MISC BASE D54B8D7C542D lea r23, ptr [r12+r10*2+0x2d] +XDIS 22fce: MISC BASE D54B8D7C552E lea r23, ptr [r13+r10*2+0x2e] +XDIS 22fd4: MISC BASE D54B8D7C562F lea r23, ptr [r14+r10*2+0x2f] +XDIS 22fda: MISC BASE D54B8D7C5730 lea r23, ptr [r15+r10*2+0x30] +XDIS 22fe0: MISC BASE D55A8D7C5031 lea r23, ptr [r16+r10*2+0x31] +XDIS 22fe6: MISC BASE D55A8D7C5132 lea r23, ptr [r17+r10*2+0x32] +XDIS 22fec: MISC BASE D55A8D7C5233 lea r23, ptr [r18+r10*2+0x33] +XDIS 22ff2: MISC BASE D55A8D7C5334 lea r23, ptr [r19+r10*2+0x34] +XDIS 22ff8: MISC BASE D55A8D7C5435 lea r23, ptr [r20+r10*2+0x35] +XDIS 22ffe: MISC BASE D55A8D7C5536 lea r23, ptr [r21+r10*2+0x36] +XDIS 23004: MISC BASE D55A8D7C5637 lea r23, ptr [r22+r10*2+0x37] +XDIS 2300a: MISC BASE D55A8D7C5738 lea r23, ptr [r23+r10*2+0x38] +XDIS 23010: MISC BASE D55B8D7C5039 lea r23, ptr [r24+r10*2+0x39] +XDIS 23016: MISC BASE D55B8D7C513A lea r23, ptr [r25+r10*2+0x3a] +XDIS 2301c: MISC BASE D55B8D7C523B lea r23, ptr [r26+r10*2+0x3b] +XDIS 23022: MISC BASE D55B8D7C533C lea r23, ptr [r27+r10*2+0x3c] +XDIS 23028: MISC BASE D55B8D7C543D lea r23, ptr [r28+r10*2+0x3d] +XDIS 2302e: MISC BASE D55B8D7C553E lea r23, ptr [r29+r10*2+0x3e] +XDIS 23034: MISC BASE D55B8D7C563F lea r23, ptr [r30+r10*2+0x3f] +XDIS 2303a: MISC BASE D55B8D7C5740 lea r23, ptr [r31+r10*2+0x40] +XDIS 23040: MISC BASE D54A8D7C5822 lea r23, ptr [rax+r11*2+0x22] +XDIS 23046: MISC BASE D54A8D7C5923 lea r23, ptr [rcx+r11*2+0x23] +XDIS 2304c: MISC BASE D54A8D7C5A24 lea r23, ptr [rdx+r11*2+0x24] +XDIS 23052: MISC BASE D54A8D7C5B25 lea r23, ptr [rbx+r11*2+0x25] +XDIS 23058: MISC BASE D54A8D7C5C26 lea r23, ptr [rsp+r11*2+0x26] +XDIS 2305e: MISC BASE D54A8D7C5D27 lea r23, ptr [rbp+r11*2+0x27] +XDIS 23064: MISC BASE D54A8D7C5E28 lea r23, ptr [rsi+r11*2+0x28] +XDIS 2306a: MISC BASE D54A8D7C5F29 lea r23, ptr [rdi+r11*2+0x29] +XDIS 23070: MISC BASE D54B8D7C582A lea r23, ptr [r8+r11*2+0x2a] +XDIS 23076: MISC BASE D54B8D7C592B lea r23, ptr [r9+r11*2+0x2b] +XDIS 2307c: MISC BASE D54B8D7C5A2C lea r23, ptr [r10+r11*2+0x2c] +XDIS 23082: MISC BASE D54B8D7C5B2D lea r23, ptr [r11+r11*2+0x2d] +XDIS 23088: MISC BASE D54B8D7C5C2E lea r23, ptr [r12+r11*2+0x2e] +XDIS 2308e: MISC BASE D54B8D7C5D2F lea r23, ptr [r13+r11*2+0x2f] +XDIS 23094: MISC BASE D54B8D7C5E30 lea r23, ptr [r14+r11*2+0x30] +XDIS 2309a: MISC BASE D54B8D7C5F31 lea r23, ptr [r15+r11*2+0x31] +XDIS 230a0: MISC BASE D55A8D7C5832 lea r23, ptr [r16+r11*2+0x32] +XDIS 230a6: MISC BASE D55A8D7C5933 lea r23, ptr [r17+r11*2+0x33] +XDIS 230ac: MISC BASE D55A8D7C5A34 lea r23, ptr [r18+r11*2+0x34] +XDIS 230b2: MISC BASE D55A8D7C5B35 lea r23, ptr [r19+r11*2+0x35] +XDIS 230b8: MISC BASE D55A8D7C5C36 lea r23, ptr [r20+r11*2+0x36] +XDIS 230be: MISC BASE D55A8D7C5D37 lea r23, ptr [r21+r11*2+0x37] +XDIS 230c4: MISC BASE D55A8D7C5E38 lea r23, ptr [r22+r11*2+0x38] +XDIS 230ca: MISC BASE D55A8D7C5F39 lea r23, ptr [r23+r11*2+0x39] +XDIS 230d0: MISC BASE D55B8D7C583A lea r23, ptr [r24+r11*2+0x3a] +XDIS 230d6: MISC BASE D55B8D7C593B lea r23, ptr [r25+r11*2+0x3b] +XDIS 230dc: MISC BASE D55B8D7C5A3C lea r23, ptr [r26+r11*2+0x3c] +XDIS 230e2: MISC BASE D55B8D7C5B3D lea r23, ptr [r27+r11*2+0x3d] +XDIS 230e8: MISC BASE D55B8D7C5C3E lea r23, ptr [r28+r11*2+0x3e] +XDIS 230ee: MISC BASE D55B8D7C5D3F lea r23, ptr [r29+r11*2+0x3f] +XDIS 230f4: MISC BASE D55B8D7C5E40 lea r23, ptr [r30+r11*2+0x40] +XDIS 230fa: MISC BASE D55B8D7C5F41 lea r23, ptr [r31+r11*2+0x41] +XDIS 23100: MISC BASE D54A8D7C6023 lea r23, ptr [rax+r12*2+0x23] +XDIS 23106: MISC BASE D54A8D7C6124 lea r23, ptr [rcx+r12*2+0x24] +XDIS 2310c: MISC BASE D54A8D7C6225 lea r23, ptr [rdx+r12*2+0x25] +XDIS 23112: MISC BASE D54A8D7C6326 lea r23, ptr [rbx+r12*2+0x26] +XDIS 23118: MISC BASE D54A8D7C6427 lea r23, ptr [rsp+r12*2+0x27] +XDIS 2311e: MISC BASE D54A8D7C6528 lea r23, ptr [rbp+r12*2+0x28] +XDIS 23124: MISC BASE D54A8D7C6629 lea r23, ptr [rsi+r12*2+0x29] +XDIS 2312a: MISC BASE D54A8D7C672A lea r23, ptr [rdi+r12*2+0x2a] +XDIS 23130: MISC BASE D54B8D7C602B lea r23, ptr [r8+r12*2+0x2b] +XDIS 23136: MISC BASE D54B8D7C612C lea r23, ptr [r9+r12*2+0x2c] +XDIS 2313c: MISC BASE D54B8D7C622D lea r23, ptr [r10+r12*2+0x2d] +XDIS 23142: MISC BASE D54B8D7C632E lea r23, ptr [r11+r12*2+0x2e] +XDIS 23148: MISC BASE D54B8D7C642F lea r23, ptr [r12+r12*2+0x2f] +XDIS 2314e: MISC BASE D54B8D7C6530 lea r23, ptr [r13+r12*2+0x30] +XDIS 23154: MISC BASE D54B8D7C6631 lea r23, ptr [r14+r12*2+0x31] +XDIS 2315a: MISC BASE D54B8D7C6732 lea r23, ptr [r15+r12*2+0x32] +XDIS 23160: MISC BASE D55A8D7C6033 lea r23, ptr [r16+r12*2+0x33] +XDIS 23166: MISC BASE D55A8D7C6134 lea r23, ptr [r17+r12*2+0x34] +XDIS 2316c: MISC BASE D55A8D7C6235 lea r23, ptr [r18+r12*2+0x35] +XDIS 23172: MISC BASE D55A8D7C6336 lea r23, ptr [r19+r12*2+0x36] +XDIS 23178: MISC BASE D55A8D7C6437 lea r23, ptr [r20+r12*2+0x37] +XDIS 2317e: MISC BASE D55A8D7C6538 lea r23, ptr [r21+r12*2+0x38] +XDIS 23184: MISC BASE D55A8D7C6639 lea r23, ptr [r22+r12*2+0x39] +XDIS 2318a: MISC BASE D55A8D7C673A lea r23, ptr [r23+r12*2+0x3a] +XDIS 23190: MISC BASE D55B8D7C603B lea r23, ptr [r24+r12*2+0x3b] +XDIS 23196: MISC BASE D55B8D7C613C lea r23, ptr [r25+r12*2+0x3c] +XDIS 2319c: MISC BASE D55B8D7C623D lea r23, ptr [r26+r12*2+0x3d] +XDIS 231a2: MISC BASE D55B8D7C633E lea r23, ptr [r27+r12*2+0x3e] +XDIS 231a8: MISC BASE D55B8D7C643F lea r23, ptr [r28+r12*2+0x3f] +XDIS 231ae: MISC BASE D55B8D7C6540 lea r23, ptr [r29+r12*2+0x40] +XDIS 231b4: MISC BASE D55B8D7C6641 lea r23, ptr [r30+r12*2+0x41] +XDIS 231ba: MISC BASE D55B8D7C6742 lea r23, ptr [r31+r12*2+0x42] +XDIS 231c0: MISC BASE D54A8D7C6824 lea r23, ptr [rax+r13*2+0x24] +XDIS 231c6: MISC BASE D54A8D7C6925 lea r23, ptr [rcx+r13*2+0x25] +XDIS 231cc: MISC BASE D54A8D7C6A26 lea r23, ptr [rdx+r13*2+0x26] +XDIS 231d2: MISC BASE D54A8D7C6B27 lea r23, ptr [rbx+r13*2+0x27] +XDIS 231d8: MISC BASE D54A8D7C6C28 lea r23, ptr [rsp+r13*2+0x28] +XDIS 231de: MISC BASE D54A8D7C6D29 lea r23, ptr [rbp+r13*2+0x29] +XDIS 231e4: MISC BASE D54A8D7C6E2A lea r23, ptr [rsi+r13*2+0x2a] +XDIS 231ea: MISC BASE D54A8D7C6F2B lea r23, ptr [rdi+r13*2+0x2b] +XDIS 231f0: MISC BASE D54B8D7C682C lea r23, ptr [r8+r13*2+0x2c] +XDIS 231f6: MISC BASE D54B8D7C692D lea r23, ptr [r9+r13*2+0x2d] +XDIS 231fc: MISC BASE D54B8D7C6A2E lea r23, ptr [r10+r13*2+0x2e] +XDIS 23202: MISC BASE D54B8D7C6B2F lea r23, ptr [r11+r13*2+0x2f] +XDIS 23208: MISC BASE D54B8D7C6C30 lea r23, ptr [r12+r13*2+0x30] +XDIS 2320e: MISC BASE D54B8D7C6D31 lea r23, ptr [r13+r13*2+0x31] +XDIS 23214: MISC BASE D54B8D7C6E32 lea r23, ptr [r14+r13*2+0x32] +XDIS 2321a: MISC BASE D54B8D7C6F33 lea r23, ptr [r15+r13*2+0x33] +XDIS 23220: MISC BASE D55A8D7C6834 lea r23, ptr [r16+r13*2+0x34] +XDIS 23226: MISC BASE D55A8D7C6935 lea r23, ptr [r17+r13*2+0x35] +XDIS 2322c: MISC BASE D55A8D7C6A36 lea r23, ptr [r18+r13*2+0x36] +XDIS 23232: MISC BASE D55A8D7C6B37 lea r23, ptr [r19+r13*2+0x37] +XDIS 23238: MISC BASE D55A8D7C6C38 lea r23, ptr [r20+r13*2+0x38] +XDIS 2323e: MISC BASE D55A8D7C6D39 lea r23, ptr [r21+r13*2+0x39] +XDIS 23244: MISC BASE D55A8D7C6E3A lea r23, ptr [r22+r13*2+0x3a] +XDIS 2324a: MISC BASE D55A8D7C6F3B lea r23, ptr [r23+r13*2+0x3b] +XDIS 23250: MISC BASE D55B8D7C683C lea r23, ptr [r24+r13*2+0x3c] +XDIS 23256: MISC BASE D55B8D7C693D lea r23, ptr [r25+r13*2+0x3d] +XDIS 2325c: MISC BASE D55B8D7C6A3E lea r23, ptr [r26+r13*2+0x3e] +XDIS 23262: MISC BASE D55B8D7C6B3F lea r23, ptr [r27+r13*2+0x3f] +XDIS 23268: MISC BASE D55B8D7C6C40 lea r23, ptr [r28+r13*2+0x40] +XDIS 2326e: MISC BASE D55B8D7C6D41 lea r23, ptr [r29+r13*2+0x41] +XDIS 23274: MISC BASE D55B8D7C6E42 lea r23, ptr [r30+r13*2+0x42] +XDIS 2327a: MISC BASE D55B8D7C6F43 lea r23, ptr [r31+r13*2+0x43] +XDIS 23280: MISC BASE D54A8D7C7025 lea r23, ptr [rax+r14*2+0x25] +XDIS 23286: MISC BASE D54A8D7C7126 lea r23, ptr [rcx+r14*2+0x26] +XDIS 2328c: MISC BASE D54A8D7C7227 lea r23, ptr [rdx+r14*2+0x27] +XDIS 23292: MISC BASE D54A8D7C7328 lea r23, ptr [rbx+r14*2+0x28] +XDIS 23298: MISC BASE D54A8D7C7429 lea r23, ptr [rsp+r14*2+0x29] +XDIS 2329e: MISC BASE D54A8D7C752A lea r23, ptr [rbp+r14*2+0x2a] +XDIS 232a4: MISC BASE D54A8D7C762B lea r23, ptr [rsi+r14*2+0x2b] +XDIS 232aa: MISC BASE D54A8D7C772C lea r23, ptr [rdi+r14*2+0x2c] +XDIS 232b0: MISC BASE D54B8D7C702D lea r23, ptr [r8+r14*2+0x2d] +XDIS 232b6: MISC BASE D54B8D7C712E lea r23, ptr [r9+r14*2+0x2e] +XDIS 232bc: MISC BASE D54B8D7C722F lea r23, ptr [r10+r14*2+0x2f] +XDIS 232c2: MISC BASE D54B8D7C7330 lea r23, ptr [r11+r14*2+0x30] +XDIS 232c8: MISC BASE D54B8D7C7431 lea r23, ptr [r12+r14*2+0x31] +XDIS 232ce: MISC BASE D54B8D7C7532 lea r23, ptr [r13+r14*2+0x32] +XDIS 232d4: MISC BASE D54B8D7C7633 lea r23, ptr [r14+r14*2+0x33] +XDIS 232da: MISC BASE D54B8D7C7734 lea r23, ptr [r15+r14*2+0x34] +XDIS 232e0: MISC BASE D55A8D7C7035 lea r23, ptr [r16+r14*2+0x35] +XDIS 232e6: MISC BASE D55A8D7C7136 lea r23, ptr [r17+r14*2+0x36] +XDIS 232ec: MISC BASE D55A8D7C7237 lea r23, ptr [r18+r14*2+0x37] +XDIS 232f2: MISC BASE D55A8D7C7338 lea r23, ptr [r19+r14*2+0x38] +XDIS 232f8: MISC BASE D55A8D7C7439 lea r23, ptr [r20+r14*2+0x39] +XDIS 232fe: MISC BASE D55A8D7C753A lea r23, ptr [r21+r14*2+0x3a] +XDIS 23304: MISC BASE D55A8D7C763B lea r23, ptr [r22+r14*2+0x3b] +XDIS 2330a: MISC BASE D55A8D7C773C lea r23, ptr [r23+r14*2+0x3c] +XDIS 23310: MISC BASE D55B8D7C703D lea r23, ptr [r24+r14*2+0x3d] +XDIS 23316: MISC BASE D55B8D7C713E lea r23, ptr [r25+r14*2+0x3e] +XDIS 2331c: MISC BASE D55B8D7C723F lea r23, ptr [r26+r14*2+0x3f] +XDIS 23322: MISC BASE D55B8D7C7340 lea r23, ptr [r27+r14*2+0x40] +XDIS 23328: MISC BASE D55B8D7C7441 lea r23, ptr [r28+r14*2+0x41] +XDIS 2332e: MISC BASE D55B8D7C7542 lea r23, ptr [r29+r14*2+0x42] +XDIS 23334: MISC BASE D55B8D7C7643 lea r23, ptr [r30+r14*2+0x43] +XDIS 2333a: MISC BASE D55B8D7C7744 lea r23, ptr [r31+r14*2+0x44] +XDIS 23340: MISC BASE D54A8D7C7826 lea r23, ptr [rax+r15*2+0x26] +XDIS 23346: MISC BASE D54A8D7C7927 lea r23, ptr [rcx+r15*2+0x27] +XDIS 2334c: MISC BASE D54A8D7C7A28 lea r23, ptr [rdx+r15*2+0x28] +XDIS 23352: MISC BASE D54A8D7C7B29 lea r23, ptr [rbx+r15*2+0x29] +XDIS 23358: MISC BASE D54A8D7C7C2A lea r23, ptr [rsp+r15*2+0x2a] +XDIS 2335e: MISC BASE D54A8D7C7D2B lea r23, ptr [rbp+r15*2+0x2b] +XDIS 23364: MISC BASE D54A8D7C7E2C lea r23, ptr [rsi+r15*2+0x2c] +XDIS 2336a: MISC BASE D54A8D7C7F2D lea r23, ptr [rdi+r15*2+0x2d] +XDIS 23370: MISC BASE D54B8D7C782E lea r23, ptr [r8+r15*2+0x2e] +XDIS 23376: MISC BASE D54B8D7C792F lea r23, ptr [r9+r15*2+0x2f] +XDIS 2337c: MISC BASE D54B8D7C7A30 lea r23, ptr [r10+r15*2+0x30] +XDIS 23382: MISC BASE D54B8D7C7B31 lea r23, ptr [r11+r15*2+0x31] +XDIS 23388: MISC BASE D54B8D7C7C32 lea r23, ptr [r12+r15*2+0x32] +XDIS 2338e: MISC BASE D54B8D7C7D33 lea r23, ptr [r13+r15*2+0x33] +XDIS 23394: MISC BASE D54B8D7C7E34 lea r23, ptr [r14+r15*2+0x34] +XDIS 2339a: MISC BASE D54B8D7C7F35 lea r23, ptr [r15+r15*2+0x35] +XDIS 233a0: MISC BASE D55A8D7C7836 lea r23, ptr [r16+r15*2+0x36] +XDIS 233a6: MISC BASE D55A8D7C7937 lea r23, ptr [r17+r15*2+0x37] +XDIS 233ac: MISC BASE D55A8D7C7A38 lea r23, ptr [r18+r15*2+0x38] +XDIS 233b2: MISC BASE D55A8D7C7B39 lea r23, ptr [r19+r15*2+0x39] +XDIS 233b8: MISC BASE D55A8D7C7C3A lea r23, ptr [r20+r15*2+0x3a] +XDIS 233be: MISC BASE D55A8D7C7D3B lea r23, ptr [r21+r15*2+0x3b] +XDIS 233c4: MISC BASE D55A8D7C7E3C lea r23, ptr [r22+r15*2+0x3c] +XDIS 233ca: MISC BASE D55A8D7C7F3D lea r23, ptr [r23+r15*2+0x3d] +XDIS 233d0: MISC BASE D55B8D7C783E lea r23, ptr [r24+r15*2+0x3e] +XDIS 233d6: MISC BASE D55B8D7C793F lea r23, ptr [r25+r15*2+0x3f] +XDIS 233dc: MISC BASE D55B8D7C7A40 lea r23, ptr [r26+r15*2+0x40] +XDIS 233e2: MISC BASE D55B8D7C7B41 lea r23, ptr [r27+r15*2+0x41] +XDIS 233e8: MISC BASE D55B8D7C7C42 lea r23, ptr [r28+r15*2+0x42] +XDIS 233ee: MISC BASE D55B8D7C7D43 lea r23, ptr [r29+r15*2+0x43] +XDIS 233f4: MISC BASE D55B8D7C7E44 lea r23, ptr [r30+r15*2+0x44] +XDIS 233fa: MISC BASE D55B8D7C7F45 lea r23, ptr [r31+r15*2+0x45] +XDIS 23400: MISC BASE D5688D7C4027 lea r23, ptr [rax+r16*2+0x27] +XDIS 23406: MISC BASE D5688D7C4128 lea r23, ptr [rcx+r16*2+0x28] +XDIS 2340c: MISC BASE D5688D7C4229 lea r23, ptr [rdx+r16*2+0x29] +XDIS 23412: MISC BASE D5688D7C432A lea r23, ptr [rbx+r16*2+0x2a] +XDIS 23418: MISC BASE D5688D7C442B lea r23, ptr [rsp+r16*2+0x2b] +XDIS 2341e: MISC BASE D5688D7C452C lea r23, ptr [rbp+r16*2+0x2c] +XDIS 23424: MISC BASE D5688D7C462D lea r23, ptr [rsi+r16*2+0x2d] +XDIS 2342a: MISC BASE D5688D7C472E lea r23, ptr [rdi+r16*2+0x2e] +XDIS 23430: MISC BASE D5698D7C402F lea r23, ptr [r8+r16*2+0x2f] +XDIS 23436: MISC BASE D5698D7C4130 lea r23, ptr [r9+r16*2+0x30] +XDIS 2343c: MISC BASE D5698D7C4231 lea r23, ptr [r10+r16*2+0x31] +XDIS 23442: MISC BASE D5698D7C4332 lea r23, ptr [r11+r16*2+0x32] +XDIS 23448: MISC BASE D5698D7C4433 lea r23, ptr [r12+r16*2+0x33] +XDIS 2344e: MISC BASE D5698D7C4534 lea r23, ptr [r13+r16*2+0x34] +XDIS 23454: MISC BASE D5698D7C4635 lea r23, ptr [r14+r16*2+0x35] +XDIS 2345a: MISC BASE D5698D7C4736 lea r23, ptr [r15+r16*2+0x36] +XDIS 23460: MISC BASE D5788D7C4037 lea r23, ptr [r16+r16*2+0x37] +XDIS 23466: MISC BASE D5788D7C4138 lea r23, ptr [r17+r16*2+0x38] +XDIS 2346c: MISC BASE D5788D7C4239 lea r23, ptr [r18+r16*2+0x39] +XDIS 23472: MISC BASE D5788D7C433A lea r23, ptr [r19+r16*2+0x3a] +XDIS 23478: MISC BASE D5788D7C443B lea r23, ptr [r20+r16*2+0x3b] +XDIS 2347e: MISC BASE D5788D7C453C lea r23, ptr [r21+r16*2+0x3c] +XDIS 23484: MISC BASE D5788D7C463D lea r23, ptr [r22+r16*2+0x3d] +XDIS 2348a: MISC BASE D5788D7C473E lea r23, ptr [r23+r16*2+0x3e] +XDIS 23490: MISC BASE D5798D7C403F lea r23, ptr [r24+r16*2+0x3f] +XDIS 23496: MISC BASE D5798D7C4140 lea r23, ptr [r25+r16*2+0x40] +XDIS 2349c: MISC BASE D5798D7C4241 lea r23, ptr [r26+r16*2+0x41] +XDIS 234a2: MISC BASE D5798D7C4342 lea r23, ptr [r27+r16*2+0x42] +XDIS 234a8: MISC BASE D5798D7C4443 lea r23, ptr [r28+r16*2+0x43] +XDIS 234ae: MISC BASE D5798D7C4544 lea r23, ptr [r29+r16*2+0x44] +XDIS 234b4: MISC BASE D5798D7C4645 lea r23, ptr [r30+r16*2+0x45] +XDIS 234ba: MISC BASE D5798D7C4746 lea r23, ptr [r31+r16*2+0x46] +XDIS 234c0: MISC BASE D5688D7C4828 lea r23, ptr [rax+r17*2+0x28] +XDIS 234c6: MISC BASE D5688D7C4929 lea r23, ptr [rcx+r17*2+0x29] +XDIS 234cc: MISC BASE D5688D7C4A2A lea r23, ptr [rdx+r17*2+0x2a] +XDIS 234d2: MISC BASE D5688D7C4B2B lea r23, ptr [rbx+r17*2+0x2b] +XDIS 234d8: MISC BASE D5688D7C4C2C lea r23, ptr [rsp+r17*2+0x2c] +XDIS 234de: MISC BASE D5688D7C4D2D lea r23, ptr [rbp+r17*2+0x2d] +XDIS 234e4: MISC BASE D5688D7C4E2E lea r23, ptr [rsi+r17*2+0x2e] +XDIS 234ea: MISC BASE D5688D7C4F2F lea r23, ptr [rdi+r17*2+0x2f] +XDIS 234f0: MISC BASE D5698D7C4830 lea r23, ptr [r8+r17*2+0x30] +XDIS 234f6: MISC BASE D5698D7C4931 lea r23, ptr [r9+r17*2+0x31] +XDIS 234fc: MISC BASE D5698D7C4A32 lea r23, ptr [r10+r17*2+0x32] +XDIS 23502: MISC BASE D5698D7C4B33 lea r23, ptr [r11+r17*2+0x33] +XDIS 23508: MISC BASE D5698D7C4C34 lea r23, ptr [r12+r17*2+0x34] +XDIS 2350e: MISC BASE D5698D7C4D35 lea r23, ptr [r13+r17*2+0x35] +XDIS 23514: MISC BASE D5698D7C4E36 lea r23, ptr [r14+r17*2+0x36] +XDIS 2351a: MISC BASE D5698D7C4F37 lea r23, ptr [r15+r17*2+0x37] +XDIS 23520: MISC BASE D5788D7C4838 lea r23, ptr [r16+r17*2+0x38] +XDIS 23526: MISC BASE D5788D7C4939 lea r23, ptr [r17+r17*2+0x39] +XDIS 2352c: MISC BASE D5788D7C4A3A lea r23, ptr [r18+r17*2+0x3a] +XDIS 23532: MISC BASE D5788D7C4B3B lea r23, ptr [r19+r17*2+0x3b] +XDIS 23538: MISC BASE D5788D7C4C3C lea r23, ptr [r20+r17*2+0x3c] +XDIS 2353e: MISC BASE D5788D7C4D3D lea r23, ptr [r21+r17*2+0x3d] +XDIS 23544: MISC BASE D5788D7C4E3E lea r23, ptr [r22+r17*2+0x3e] +XDIS 2354a: MISC BASE D5788D7C4F3F lea r23, ptr [r23+r17*2+0x3f] +XDIS 23550: MISC BASE D5798D7C4840 lea r23, ptr [r24+r17*2+0x40] +XDIS 23556: MISC BASE D5798D7C4941 lea r23, ptr [r25+r17*2+0x41] +XDIS 2355c: MISC BASE D5798D7C4A42 lea r23, ptr [r26+r17*2+0x42] +XDIS 23562: MISC BASE D5798D7C4B43 lea r23, ptr [r27+r17*2+0x43] +XDIS 23568: MISC BASE D5798D7C4C44 lea r23, ptr [r28+r17*2+0x44] +XDIS 2356e: MISC BASE D5798D7C4D45 lea r23, ptr [r29+r17*2+0x45] +XDIS 23574: MISC BASE D5798D7C4E46 lea r23, ptr [r30+r17*2+0x46] +XDIS 2357a: MISC BASE D5798D7C4F47 lea r23, ptr [r31+r17*2+0x47] +XDIS 23580: MISC BASE D5688D7C5029 lea r23, ptr [rax+r18*2+0x29] +XDIS 23586: MISC BASE D5688D7C512A lea r23, ptr [rcx+r18*2+0x2a] +XDIS 2358c: MISC BASE D5688D7C522B lea r23, ptr [rdx+r18*2+0x2b] +XDIS 23592: MISC BASE D5688D7C532C lea r23, ptr [rbx+r18*2+0x2c] +XDIS 23598: MISC BASE D5688D7C542D lea r23, ptr [rsp+r18*2+0x2d] +XDIS 2359e: MISC BASE D5688D7C552E lea r23, ptr [rbp+r18*2+0x2e] +XDIS 235a4: MISC BASE D5688D7C562F lea r23, ptr [rsi+r18*2+0x2f] +XDIS 235aa: MISC BASE D5688D7C5730 lea r23, ptr [rdi+r18*2+0x30] +XDIS 235b0: MISC BASE D5698D7C5031 lea r23, ptr [r8+r18*2+0x31] +XDIS 235b6: MISC BASE D5698D7C5132 lea r23, ptr [r9+r18*2+0x32] +XDIS 235bc: MISC BASE D5698D7C5233 lea r23, ptr [r10+r18*2+0x33] +XDIS 235c2: MISC BASE D5698D7C5334 lea r23, ptr [r11+r18*2+0x34] +XDIS 235c8: MISC BASE D5698D7C5435 lea r23, ptr [r12+r18*2+0x35] +XDIS 235ce: MISC BASE D5698D7C5536 lea r23, ptr [r13+r18*2+0x36] +XDIS 235d4: MISC BASE D5698D7C5637 lea r23, ptr [r14+r18*2+0x37] +XDIS 235da: MISC BASE D5698D7C5738 lea r23, ptr [r15+r18*2+0x38] +XDIS 235e0: MISC BASE D5788D7C5039 lea r23, ptr [r16+r18*2+0x39] +XDIS 235e6: MISC BASE D5788D7C513A lea r23, ptr [r17+r18*2+0x3a] +XDIS 235ec: MISC BASE D5788D7C523B lea r23, ptr [r18+r18*2+0x3b] +XDIS 235f2: MISC BASE D5788D7C533C lea r23, ptr [r19+r18*2+0x3c] +XDIS 235f8: MISC BASE D5788D7C543D lea r23, ptr [r20+r18*2+0x3d] +XDIS 235fe: MISC BASE D5788D7C553E lea r23, ptr [r21+r18*2+0x3e] +XDIS 23604: MISC BASE D5788D7C563F lea r23, ptr [r22+r18*2+0x3f] +XDIS 2360a: MISC BASE D5788D7C5740 lea r23, ptr [r23+r18*2+0x40] +XDIS 23610: MISC BASE D5798D7C5041 lea r23, ptr [r24+r18*2+0x41] +XDIS 23616: MISC BASE D5798D7C5142 lea r23, ptr [r25+r18*2+0x42] +XDIS 2361c: MISC BASE D5798D7C5243 lea r23, ptr [r26+r18*2+0x43] +XDIS 23622: MISC BASE D5798D7C5344 lea r23, ptr [r27+r18*2+0x44] +XDIS 23628: MISC BASE D5798D7C5445 lea r23, ptr [r28+r18*2+0x45] +XDIS 2362e: MISC BASE D5798D7C5546 lea r23, ptr [r29+r18*2+0x46] +XDIS 23634: MISC BASE D5798D7C5647 lea r23, ptr [r30+r18*2+0x47] +XDIS 2363a: MISC BASE D5798D7C5748 lea r23, ptr [r31+r18*2+0x48] +XDIS 23640: MISC BASE D5688D7C582A lea r23, ptr [rax+r19*2+0x2a] +XDIS 23646: MISC BASE D5688D7C592B lea r23, ptr [rcx+r19*2+0x2b] +XDIS 2364c: MISC BASE D5688D7C5A2C lea r23, ptr [rdx+r19*2+0x2c] +XDIS 23652: MISC BASE D5688D7C5B2D lea r23, ptr [rbx+r19*2+0x2d] +XDIS 23658: MISC BASE D5688D7C5C2E lea r23, ptr [rsp+r19*2+0x2e] +XDIS 2365e: MISC BASE D5688D7C5D2F lea r23, ptr [rbp+r19*2+0x2f] +XDIS 23664: MISC BASE D5688D7C5E30 lea r23, ptr [rsi+r19*2+0x30] +XDIS 2366a: MISC BASE D5688D7C5F31 lea r23, ptr [rdi+r19*2+0x31] +XDIS 23670: MISC BASE D5698D7C5832 lea r23, ptr [r8+r19*2+0x32] +XDIS 23676: MISC BASE D5698D7C5933 lea r23, ptr [r9+r19*2+0x33] +XDIS 2367c: MISC BASE D5698D7C5A34 lea r23, ptr [r10+r19*2+0x34] +XDIS 23682: MISC BASE D5698D7C5B35 lea r23, ptr [r11+r19*2+0x35] +XDIS 23688: MISC BASE D5698D7C5C36 lea r23, ptr [r12+r19*2+0x36] +XDIS 2368e: MISC BASE D5698D7C5D37 lea r23, ptr [r13+r19*2+0x37] +XDIS 23694: MISC BASE D5698D7C5E38 lea r23, ptr [r14+r19*2+0x38] +XDIS 2369a: MISC BASE D5698D7C5F39 lea r23, ptr [r15+r19*2+0x39] +XDIS 236a0: MISC BASE D5788D7C583A lea r23, ptr [r16+r19*2+0x3a] +XDIS 236a6: MISC BASE D5788D7C593B lea r23, ptr [r17+r19*2+0x3b] +XDIS 236ac: MISC BASE D5788D7C5A3C lea r23, ptr [r18+r19*2+0x3c] +XDIS 236b2: MISC BASE D5788D7C5B3D lea r23, ptr [r19+r19*2+0x3d] +XDIS 236b8: MISC BASE D5788D7C5C3E lea r23, ptr [r20+r19*2+0x3e] +XDIS 236be: MISC BASE D5788D7C5D3F lea r23, ptr [r21+r19*2+0x3f] +XDIS 236c4: MISC BASE D5788D7C5E40 lea r23, ptr [r22+r19*2+0x40] +XDIS 236ca: MISC BASE D5788D7C5F41 lea r23, ptr [r23+r19*2+0x41] +XDIS 236d0: MISC BASE D5798D7C5842 lea r23, ptr [r24+r19*2+0x42] +XDIS 236d6: MISC BASE D5798D7C5943 lea r23, ptr [r25+r19*2+0x43] +XDIS 236dc: MISC BASE D5798D7C5A44 lea r23, ptr [r26+r19*2+0x44] +XDIS 236e2: MISC BASE D5798D7C5B45 lea r23, ptr [r27+r19*2+0x45] +XDIS 236e8: MISC BASE D5798D7C5C46 lea r23, ptr [r28+r19*2+0x46] +XDIS 236ee: MISC BASE D5798D7C5D47 lea r23, ptr [r29+r19*2+0x47] +XDIS 236f4: MISC BASE D5798D7C5E48 lea r23, ptr [r30+r19*2+0x48] +XDIS 236fa: MISC BASE D5798D7C5F49 lea r23, ptr [r31+r19*2+0x49] +XDIS 23700: MISC BASE D5688D7C602B lea r23, ptr [rax+r20*2+0x2b] +XDIS 23706: MISC BASE D5688D7C612C lea r23, ptr [rcx+r20*2+0x2c] +XDIS 2370c: MISC BASE D5688D7C622D lea r23, ptr [rdx+r20*2+0x2d] +XDIS 23712: MISC BASE D5688D7C632E lea r23, ptr [rbx+r20*2+0x2e] +XDIS 23718: MISC BASE D5688D7C642F lea r23, ptr [rsp+r20*2+0x2f] +XDIS 2371e: MISC BASE D5688D7C6530 lea r23, ptr [rbp+r20*2+0x30] +XDIS 23724: MISC BASE D5688D7C6631 lea r23, ptr [rsi+r20*2+0x31] +XDIS 2372a: MISC BASE D5688D7C6732 lea r23, ptr [rdi+r20*2+0x32] +XDIS 23730: MISC BASE D5698D7C6033 lea r23, ptr [r8+r20*2+0x33] +XDIS 23736: MISC BASE D5698D7C6134 lea r23, ptr [r9+r20*2+0x34] +XDIS 2373c: MISC BASE D5698D7C6235 lea r23, ptr [r10+r20*2+0x35] +XDIS 23742: MISC BASE D5698D7C6336 lea r23, ptr [r11+r20*2+0x36] +XDIS 23748: MISC BASE D5698D7C6437 lea r23, ptr [r12+r20*2+0x37] +XDIS 2374e: MISC BASE D5698D7C6538 lea r23, ptr [r13+r20*2+0x38] +XDIS 23754: MISC BASE D5698D7C6639 lea r23, ptr [r14+r20*2+0x39] +XDIS 2375a: MISC BASE D5698D7C673A lea r23, ptr [r15+r20*2+0x3a] +XDIS 23760: MISC BASE D5788D7C603B lea r23, ptr [r16+r20*2+0x3b] +XDIS 23766: MISC BASE D5788D7C613C lea r23, ptr [r17+r20*2+0x3c] +XDIS 2376c: MISC BASE D5788D7C623D lea r23, ptr [r18+r20*2+0x3d] +XDIS 23772: MISC BASE D5788D7C633E lea r23, ptr [r19+r20*2+0x3e] +XDIS 23778: MISC BASE D5788D7C643F lea r23, ptr [r20+r20*2+0x3f] +XDIS 2377e: MISC BASE D5788D7C6540 lea r23, ptr [r21+r20*2+0x40] +XDIS 23784: MISC BASE D5788D7C6641 lea r23, ptr [r22+r20*2+0x41] +XDIS 2378a: MISC BASE D5788D7C6742 lea r23, ptr [r23+r20*2+0x42] +XDIS 23790: MISC BASE D5798D7C6043 lea r23, ptr [r24+r20*2+0x43] +XDIS 23796: MISC BASE D5798D7C6144 lea r23, ptr [r25+r20*2+0x44] +XDIS 2379c: MISC BASE D5798D7C6245 lea r23, ptr [r26+r20*2+0x45] +XDIS 237a2: MISC BASE D5798D7C6346 lea r23, ptr [r27+r20*2+0x46] +XDIS 237a8: MISC BASE D5798D7C6447 lea r23, ptr [r28+r20*2+0x47] +XDIS 237ae: MISC BASE D5798D7C6548 lea r23, ptr [r29+r20*2+0x48] +XDIS 237b4: MISC BASE D5798D7C6649 lea r23, ptr [r30+r20*2+0x49] +XDIS 237ba: MISC BASE D5798D7C674A lea r23, ptr [r31+r20*2+0x4a] +XDIS 237c0: MISC BASE D5688D7C682C lea r23, ptr [rax+r21*2+0x2c] +XDIS 237c6: MISC BASE D5688D7C692D lea r23, ptr [rcx+r21*2+0x2d] +XDIS 237cc: MISC BASE D5688D7C6A2E lea r23, ptr [rdx+r21*2+0x2e] +XDIS 237d2: MISC BASE D5688D7C6B2F lea r23, ptr [rbx+r21*2+0x2f] +XDIS 237d8: MISC BASE D5688D7C6C30 lea r23, ptr [rsp+r21*2+0x30] +XDIS 237de: MISC BASE D5688D7C6D31 lea r23, ptr [rbp+r21*2+0x31] +XDIS 237e4: MISC BASE D5688D7C6E32 lea r23, ptr [rsi+r21*2+0x32] +XDIS 237ea: MISC BASE D5688D7C6F33 lea r23, ptr [rdi+r21*2+0x33] +XDIS 237f0: MISC BASE D5698D7C6834 lea r23, ptr [r8+r21*2+0x34] +XDIS 237f6: MISC BASE D5698D7C6935 lea r23, ptr [r9+r21*2+0x35] +XDIS 237fc: MISC BASE D5698D7C6A36 lea r23, ptr [r10+r21*2+0x36] +XDIS 23802: MISC BASE D5698D7C6B37 lea r23, ptr [r11+r21*2+0x37] +XDIS 23808: MISC BASE D5698D7C6C38 lea r23, ptr [r12+r21*2+0x38] +XDIS 2380e: MISC BASE D5698D7C6D39 lea r23, ptr [r13+r21*2+0x39] +XDIS 23814: MISC BASE D5698D7C6E3A lea r23, ptr [r14+r21*2+0x3a] +XDIS 2381a: MISC BASE D5698D7C6F3B lea r23, ptr [r15+r21*2+0x3b] +XDIS 23820: MISC BASE D5788D7C683C lea r23, ptr [r16+r21*2+0x3c] +XDIS 23826: MISC BASE D5788D7C693D lea r23, ptr [r17+r21*2+0x3d] +XDIS 2382c: MISC BASE D5788D7C6A3E lea r23, ptr [r18+r21*2+0x3e] +XDIS 23832: MISC BASE D5788D7C6B3F lea r23, ptr [r19+r21*2+0x3f] +XDIS 23838: MISC BASE D5788D7C6C40 lea r23, ptr [r20+r21*2+0x40] +XDIS 2383e: MISC BASE D5788D7C6D41 lea r23, ptr [r21+r21*2+0x41] +XDIS 23844: MISC BASE D5788D7C6E42 lea r23, ptr [r22+r21*2+0x42] +XDIS 2384a: MISC BASE D5788D7C6F43 lea r23, ptr [r23+r21*2+0x43] +XDIS 23850: MISC BASE D5798D7C6844 lea r23, ptr [r24+r21*2+0x44] +XDIS 23856: MISC BASE D5798D7C6945 lea r23, ptr [r25+r21*2+0x45] +XDIS 2385c: MISC BASE D5798D7C6A46 lea r23, ptr [r26+r21*2+0x46] +XDIS 23862: MISC BASE D5798D7C6B47 lea r23, ptr [r27+r21*2+0x47] +XDIS 23868: MISC BASE D5798D7C6C48 lea r23, ptr [r28+r21*2+0x48] +XDIS 2386e: MISC BASE D5798D7C6D49 lea r23, ptr [r29+r21*2+0x49] +XDIS 23874: MISC BASE D5798D7C6E4A lea r23, ptr [r30+r21*2+0x4a] +XDIS 2387a: MISC BASE D5798D7C6F4B lea r23, ptr [r31+r21*2+0x4b] +XDIS 23880: MISC BASE D5688D7C702D lea r23, ptr [rax+r22*2+0x2d] +XDIS 23886: MISC BASE D5688D7C712E lea r23, ptr [rcx+r22*2+0x2e] +XDIS 2388c: MISC BASE D5688D7C722F lea r23, ptr [rdx+r22*2+0x2f] +XDIS 23892: MISC BASE D5688D7C7330 lea r23, ptr [rbx+r22*2+0x30] +XDIS 23898: MISC BASE D5688D7C7431 lea r23, ptr [rsp+r22*2+0x31] +XDIS 2389e: MISC BASE D5688D7C7532 lea r23, ptr [rbp+r22*2+0x32] +XDIS 238a4: MISC BASE D5688D7C7633 lea r23, ptr [rsi+r22*2+0x33] +XDIS 238aa: MISC BASE D5688D7C7734 lea r23, ptr [rdi+r22*2+0x34] +XDIS 238b0: MISC BASE D5698D7C7035 lea r23, ptr [r8+r22*2+0x35] +XDIS 238b6: MISC BASE D5698D7C7136 lea r23, ptr [r9+r22*2+0x36] +XDIS 238bc: MISC BASE D5698D7C7237 lea r23, ptr [r10+r22*2+0x37] +XDIS 238c2: MISC BASE D5698D7C7338 lea r23, ptr [r11+r22*2+0x38] +XDIS 238c8: MISC BASE D5698D7C7439 lea r23, ptr [r12+r22*2+0x39] +XDIS 238ce: MISC BASE D5698D7C753A lea r23, ptr [r13+r22*2+0x3a] +XDIS 238d4: MISC BASE D5698D7C763B lea r23, ptr [r14+r22*2+0x3b] +XDIS 238da: MISC BASE D5698D7C773C lea r23, ptr [r15+r22*2+0x3c] +XDIS 238e0: MISC BASE D5788D7C703D lea r23, ptr [r16+r22*2+0x3d] +XDIS 238e6: MISC BASE D5788D7C713E lea r23, ptr [r17+r22*2+0x3e] +XDIS 238ec: MISC BASE D5788D7C723F lea r23, ptr [r18+r22*2+0x3f] +XDIS 238f2: MISC BASE D5788D7C7340 lea r23, ptr [r19+r22*2+0x40] +XDIS 238f8: MISC BASE D5788D7C7441 lea r23, ptr [r20+r22*2+0x41] +XDIS 238fe: MISC BASE D5788D7C7542 lea r23, ptr [r21+r22*2+0x42] +XDIS 23904: MISC BASE D5788D7C7643 lea r23, ptr [r22+r22*2+0x43] +XDIS 2390a: MISC BASE D5788D7C7744 lea r23, ptr [r23+r22*2+0x44] +XDIS 23910: MISC BASE D5798D7C7045 lea r23, ptr [r24+r22*2+0x45] +XDIS 23916: MISC BASE D5798D7C7146 lea r23, ptr [r25+r22*2+0x46] +XDIS 2391c: MISC BASE D5798D7C7247 lea r23, ptr [r26+r22*2+0x47] +XDIS 23922: MISC BASE D5798D7C7348 lea r23, ptr [r27+r22*2+0x48] +XDIS 23928: MISC BASE D5798D7C7449 lea r23, ptr [r28+r22*2+0x49] +XDIS 2392e: MISC BASE D5798D7C754A lea r23, ptr [r29+r22*2+0x4a] +XDIS 23934: MISC BASE D5798D7C764B lea r23, ptr [r30+r22*2+0x4b] +XDIS 2393a: MISC BASE D5798D7C774C lea r23, ptr [r31+r22*2+0x4c] +XDIS 23940: MISC BASE D5688D7C782E lea r23, ptr [rax+r23*2+0x2e] +XDIS 23946: MISC BASE D5688D7C792F lea r23, ptr [rcx+r23*2+0x2f] +XDIS 2394c: MISC BASE D5688D7C7A30 lea r23, ptr [rdx+r23*2+0x30] +XDIS 23952: MISC BASE D5688D7C7B31 lea r23, ptr [rbx+r23*2+0x31] +XDIS 23958: MISC BASE D5688D7C7C32 lea r23, ptr [rsp+r23*2+0x32] +XDIS 2395e: MISC BASE D5688D7C7D33 lea r23, ptr [rbp+r23*2+0x33] +XDIS 23964: MISC BASE D5688D7C7E34 lea r23, ptr [rsi+r23*2+0x34] +XDIS 2396a: MISC BASE D5688D7C7F35 lea r23, ptr [rdi+r23*2+0x35] +XDIS 23970: MISC BASE D5698D7C7836 lea r23, ptr [r8+r23*2+0x36] +XDIS 23976: MISC BASE D5698D7C7937 lea r23, ptr [r9+r23*2+0x37] +XDIS 2397c: MISC BASE D5698D7C7A38 lea r23, ptr [r10+r23*2+0x38] +XDIS 23982: MISC BASE D5698D7C7B39 lea r23, ptr [r11+r23*2+0x39] +XDIS 23988: MISC BASE D5698D7C7C3A lea r23, ptr [r12+r23*2+0x3a] +XDIS 2398e: MISC BASE D5698D7C7D3B lea r23, ptr [r13+r23*2+0x3b] +XDIS 23994: MISC BASE D5698D7C7E3C lea r23, ptr [r14+r23*2+0x3c] +XDIS 2399a: MISC BASE D5698D7C7F3D lea r23, ptr [r15+r23*2+0x3d] +XDIS 239a0: MISC BASE D5788D7C783E lea r23, ptr [r16+r23*2+0x3e] +XDIS 239a6: MISC BASE D5788D7C793F lea r23, ptr [r17+r23*2+0x3f] +XDIS 239ac: MISC BASE D5788D7C7A40 lea r23, ptr [r18+r23*2+0x40] +XDIS 239b2: MISC BASE D5788D7C7B41 lea r23, ptr [r19+r23*2+0x41] +XDIS 239b8: MISC BASE D5788D7C7C42 lea r23, ptr [r20+r23*2+0x42] +XDIS 239be: MISC BASE D5788D7C7D43 lea r23, ptr [r21+r23*2+0x43] +XDIS 239c4: MISC BASE D5788D7C7E44 lea r23, ptr [r22+r23*2+0x44] +XDIS 239ca: MISC BASE D5788D7C7F45 lea r23, ptr [r23+r23*2+0x45] +XDIS 239d0: MISC BASE D5798D7C7846 lea r23, ptr [r24+r23*2+0x46] +XDIS 239d6: MISC BASE D5798D7C7947 lea r23, ptr [r25+r23*2+0x47] +XDIS 239dc: MISC BASE D5798D7C7A48 lea r23, ptr [r26+r23*2+0x48] +XDIS 239e2: MISC BASE D5798D7C7B49 lea r23, ptr [r27+r23*2+0x49] +XDIS 239e8: MISC BASE D5798D7C7C4A lea r23, ptr [r28+r23*2+0x4a] +XDIS 239ee: MISC BASE D5798D7C7D4B lea r23, ptr [r29+r23*2+0x4b] +XDIS 239f4: MISC BASE D5798D7C7E4C lea r23, ptr [r30+r23*2+0x4c] +XDIS 239fa: MISC BASE D5798D7C7F4D lea r23, ptr [r31+r23*2+0x4d] +XDIS 23a00: MISC BASE D56A8D7C402F lea r23, ptr [rax+r24*2+0x2f] +XDIS 23a06: MISC BASE D56A8D7C4130 lea r23, ptr [rcx+r24*2+0x30] +XDIS 23a0c: MISC BASE D56A8D7C4231 lea r23, ptr [rdx+r24*2+0x31] +XDIS 23a12: MISC BASE D56A8D7C4332 lea r23, ptr [rbx+r24*2+0x32] +XDIS 23a18: MISC BASE D56A8D7C4433 lea r23, ptr [rsp+r24*2+0x33] +XDIS 23a1e: MISC BASE D56A8D7C4534 lea r23, ptr [rbp+r24*2+0x34] +XDIS 23a24: MISC BASE D56A8D7C4635 lea r23, ptr [rsi+r24*2+0x35] +XDIS 23a2a: MISC BASE D56A8D7C4736 lea r23, ptr [rdi+r24*2+0x36] +XDIS 23a30: MISC BASE D56B8D7C4037 lea r23, ptr [r8+r24*2+0x37] +XDIS 23a36: MISC BASE D56B8D7C4138 lea r23, ptr [r9+r24*2+0x38] +XDIS 23a3c: MISC BASE D56B8D7C4239 lea r23, ptr [r10+r24*2+0x39] +XDIS 23a42: MISC BASE D56B8D7C433A lea r23, ptr [r11+r24*2+0x3a] +XDIS 23a48: MISC BASE D56B8D7C443B lea r23, ptr [r12+r24*2+0x3b] +XDIS 23a4e: MISC BASE D56B8D7C453C lea r23, ptr [r13+r24*2+0x3c] +XDIS 23a54: MISC BASE D56B8D7C463D lea r23, ptr [r14+r24*2+0x3d] +XDIS 23a5a: MISC BASE D56B8D7C473E lea r23, ptr [r15+r24*2+0x3e] +XDIS 23a60: MISC BASE D57A8D7C403F lea r23, ptr [r16+r24*2+0x3f] +XDIS 23a66: MISC BASE D57A8D7C4140 lea r23, ptr [r17+r24*2+0x40] +XDIS 23a6c: MISC BASE D57A8D7C4241 lea r23, ptr [r18+r24*2+0x41] +XDIS 23a72: MISC BASE D57A8D7C4342 lea r23, ptr [r19+r24*2+0x42] +XDIS 23a78: MISC BASE D57A8D7C4443 lea r23, ptr [r20+r24*2+0x43] +XDIS 23a7e: MISC BASE D57A8D7C4544 lea r23, ptr [r21+r24*2+0x44] +XDIS 23a84: MISC BASE D57A8D7C4645 lea r23, ptr [r22+r24*2+0x45] +XDIS 23a8a: MISC BASE D57A8D7C4746 lea r23, ptr [r23+r24*2+0x46] +XDIS 23a90: MISC BASE D57B8D7C4047 lea r23, ptr [r24+r24*2+0x47] +XDIS 23a96: MISC BASE D57B8D7C4148 lea r23, ptr [r25+r24*2+0x48] +XDIS 23a9c: MISC BASE D57B8D7C4249 lea r23, ptr [r26+r24*2+0x49] +XDIS 23aa2: MISC BASE D57B8D7C434A lea r23, ptr [r27+r24*2+0x4a] +XDIS 23aa8: MISC BASE D57B8D7C444B lea r23, ptr [r28+r24*2+0x4b] +XDIS 23aae: MISC BASE D57B8D7C454C lea r23, ptr [r29+r24*2+0x4c] +XDIS 23ab4: MISC BASE D57B8D7C464D lea r23, ptr [r30+r24*2+0x4d] +XDIS 23aba: MISC BASE D57B8D7C474E lea r23, ptr [r31+r24*2+0x4e] +XDIS 23ac0: MISC BASE D56A8D7C4830 lea r23, ptr [rax+r25*2+0x30] +XDIS 23ac6: MISC BASE D56A8D7C4931 lea r23, ptr [rcx+r25*2+0x31] +XDIS 23acc: MISC BASE D56A8D7C4A32 lea r23, ptr [rdx+r25*2+0x32] +XDIS 23ad2: MISC BASE D56A8D7C4B33 lea r23, ptr [rbx+r25*2+0x33] +XDIS 23ad8: MISC BASE D56A8D7C4C34 lea r23, ptr [rsp+r25*2+0x34] +XDIS 23ade: MISC BASE D56A8D7C4D35 lea r23, ptr [rbp+r25*2+0x35] +XDIS 23ae4: MISC BASE D56A8D7C4E36 lea r23, ptr [rsi+r25*2+0x36] +XDIS 23aea: MISC BASE D56A8D7C4F37 lea r23, ptr [rdi+r25*2+0x37] +XDIS 23af0: MISC BASE D56B8D7C4838 lea r23, ptr [r8+r25*2+0x38] +XDIS 23af6: MISC BASE D56B8D7C4939 lea r23, ptr [r9+r25*2+0x39] +XDIS 23afc: MISC BASE D56B8D7C4A3A lea r23, ptr [r10+r25*2+0x3a] +XDIS 23b02: MISC BASE D56B8D7C4B3B lea r23, ptr [r11+r25*2+0x3b] +XDIS 23b08: MISC BASE D56B8D7C4C3C lea r23, ptr [r12+r25*2+0x3c] +XDIS 23b0e: MISC BASE D56B8D7C4D3D lea r23, ptr [r13+r25*2+0x3d] +XDIS 23b14: MISC BASE D56B8D7C4E3E lea r23, ptr [r14+r25*2+0x3e] +XDIS 23b1a: MISC BASE D56B8D7C4F3F lea r23, ptr [r15+r25*2+0x3f] +XDIS 23b20: MISC BASE D57A8D7C4840 lea r23, ptr [r16+r25*2+0x40] +XDIS 23b26: MISC BASE D57A8D7C4941 lea r23, ptr [r17+r25*2+0x41] +XDIS 23b2c: MISC BASE D57A8D7C4A42 lea r23, ptr [r18+r25*2+0x42] +XDIS 23b32: MISC BASE D57A8D7C4B43 lea r23, ptr [r19+r25*2+0x43] +XDIS 23b38: MISC BASE D57A8D7C4C44 lea r23, ptr [r20+r25*2+0x44] +XDIS 23b3e: MISC BASE D57A8D7C4D45 lea r23, ptr [r21+r25*2+0x45] +XDIS 23b44: MISC BASE D57A8D7C4E46 lea r23, ptr [r22+r25*2+0x46] +XDIS 23b4a: MISC BASE D57A8D7C4F47 lea r23, ptr [r23+r25*2+0x47] +XDIS 23b50: MISC BASE D57B8D7C4848 lea r23, ptr [r24+r25*2+0x48] +XDIS 23b56: MISC BASE D57B8D7C4949 lea r23, ptr [r25+r25*2+0x49] +XDIS 23b5c: MISC BASE D57B8D7C4A4A lea r23, ptr [r26+r25*2+0x4a] +XDIS 23b62: MISC BASE D57B8D7C4B4B lea r23, ptr [r27+r25*2+0x4b] +XDIS 23b68: MISC BASE D57B8D7C4C4C lea r23, ptr [r28+r25*2+0x4c] +XDIS 23b6e: MISC BASE D57B8D7C4D4D lea r23, ptr [r29+r25*2+0x4d] +XDIS 23b74: MISC BASE D57B8D7C4E4E lea r23, ptr [r30+r25*2+0x4e] +XDIS 23b7a: MISC BASE D57B8D7C4F4F lea r23, ptr [r31+r25*2+0x4f] +XDIS 23b80: MISC BASE D56A8D7C5031 lea r23, ptr [rax+r26*2+0x31] +XDIS 23b86: MISC BASE D56A8D7C5132 lea r23, ptr [rcx+r26*2+0x32] +XDIS 23b8c: MISC BASE D56A8D7C5233 lea r23, ptr [rdx+r26*2+0x33] +XDIS 23b92: MISC BASE D56A8D7C5334 lea r23, ptr [rbx+r26*2+0x34] +XDIS 23b98: MISC BASE D56A8D7C5435 lea r23, ptr [rsp+r26*2+0x35] +XDIS 23b9e: MISC BASE D56A8D7C5536 lea r23, ptr [rbp+r26*2+0x36] +XDIS 23ba4: MISC BASE D56A8D7C5637 lea r23, ptr [rsi+r26*2+0x37] +XDIS 23baa: MISC BASE D56A8D7C5738 lea r23, ptr [rdi+r26*2+0x38] +XDIS 23bb0: MISC BASE D56B8D7C5039 lea r23, ptr [r8+r26*2+0x39] +XDIS 23bb6: MISC BASE D56B8D7C513A lea r23, ptr [r9+r26*2+0x3a] +XDIS 23bbc: MISC BASE D56B8D7C523B lea r23, ptr [r10+r26*2+0x3b] +XDIS 23bc2: MISC BASE D56B8D7C533C lea r23, ptr [r11+r26*2+0x3c] +XDIS 23bc8: MISC BASE D56B8D7C543D lea r23, ptr [r12+r26*2+0x3d] +XDIS 23bce: MISC BASE D56B8D7C553E lea r23, ptr [r13+r26*2+0x3e] +XDIS 23bd4: MISC BASE D56B8D7C563F lea r23, ptr [r14+r26*2+0x3f] +XDIS 23bda: MISC BASE D56B8D7C5740 lea r23, ptr [r15+r26*2+0x40] +XDIS 23be0: MISC BASE D57A8D7C5041 lea r23, ptr [r16+r26*2+0x41] +XDIS 23be6: MISC BASE D57A8D7C5142 lea r23, ptr [r17+r26*2+0x42] +XDIS 23bec: MISC BASE D57A8D7C5243 lea r23, ptr [r18+r26*2+0x43] +XDIS 23bf2: MISC BASE D57A8D7C5344 lea r23, ptr [r19+r26*2+0x44] +XDIS 23bf8: MISC BASE D57A8D7C5445 lea r23, ptr [r20+r26*2+0x45] +XDIS 23bfe: MISC BASE D57A8D7C5546 lea r23, ptr [r21+r26*2+0x46] +XDIS 23c04: MISC BASE D57A8D7C5647 lea r23, ptr [r22+r26*2+0x47] +XDIS 23c0a: MISC BASE D57A8D7C5748 lea r23, ptr [r23+r26*2+0x48] +XDIS 23c10: MISC BASE D57B8D7C5049 lea r23, ptr [r24+r26*2+0x49] +XDIS 23c16: MISC BASE D57B8D7C514A lea r23, ptr [r25+r26*2+0x4a] +XDIS 23c1c: MISC BASE D57B8D7C524B lea r23, ptr [r26+r26*2+0x4b] +XDIS 23c22: MISC BASE D57B8D7C534C lea r23, ptr [r27+r26*2+0x4c] +XDIS 23c28: MISC BASE D57B8D7C544D lea r23, ptr [r28+r26*2+0x4d] +XDIS 23c2e: MISC BASE D57B8D7C554E lea r23, ptr [r29+r26*2+0x4e] +XDIS 23c34: MISC BASE D57B8D7C564F lea r23, ptr [r30+r26*2+0x4f] +XDIS 23c3a: MISC BASE D57B8D7C5750 lea r23, ptr [r31+r26*2+0x50] +XDIS 23c40: MISC BASE D56A8D7C5832 lea r23, ptr [rax+r27*2+0x32] +XDIS 23c46: MISC BASE D56A8D7C5933 lea r23, ptr [rcx+r27*2+0x33] +XDIS 23c4c: MISC BASE D56A8D7C5A34 lea r23, ptr [rdx+r27*2+0x34] +XDIS 23c52: MISC BASE D56A8D7C5B35 lea r23, ptr [rbx+r27*2+0x35] +XDIS 23c58: MISC BASE D56A8D7C5C36 lea r23, ptr [rsp+r27*2+0x36] +XDIS 23c5e: MISC BASE D56A8D7C5D37 lea r23, ptr [rbp+r27*2+0x37] +XDIS 23c64: MISC BASE D56A8D7C5E38 lea r23, ptr [rsi+r27*2+0x38] +XDIS 23c6a: MISC BASE D56A8D7C5F39 lea r23, ptr [rdi+r27*2+0x39] +XDIS 23c70: MISC BASE D56B8D7C583A lea r23, ptr [r8+r27*2+0x3a] +XDIS 23c76: MISC BASE D56B8D7C593B lea r23, ptr [r9+r27*2+0x3b] +XDIS 23c7c: MISC BASE D56B8D7C5A3C lea r23, ptr [r10+r27*2+0x3c] +XDIS 23c82: MISC BASE D56B8D7C5B3D lea r23, ptr [r11+r27*2+0x3d] +XDIS 23c88: MISC BASE D56B8D7C5C3E lea r23, ptr [r12+r27*2+0x3e] +XDIS 23c8e: MISC BASE D56B8D7C5D3F lea r23, ptr [r13+r27*2+0x3f] +XDIS 23c94: MISC BASE D56B8D7C5E40 lea r23, ptr [r14+r27*2+0x40] +XDIS 23c9a: MISC BASE D56B8D7C5F41 lea r23, ptr [r15+r27*2+0x41] +XDIS 23ca0: MISC BASE D57A8D7C5842 lea r23, ptr [r16+r27*2+0x42] +XDIS 23ca6: MISC BASE D57A8D7C5943 lea r23, ptr [r17+r27*2+0x43] +XDIS 23cac: MISC BASE D57A8D7C5A44 lea r23, ptr [r18+r27*2+0x44] +XDIS 23cb2: MISC BASE D57A8D7C5B45 lea r23, ptr [r19+r27*2+0x45] +XDIS 23cb8: MISC BASE D57A8D7C5C46 lea r23, ptr [r20+r27*2+0x46] +XDIS 23cbe: MISC BASE D57A8D7C5D47 lea r23, ptr [r21+r27*2+0x47] +XDIS 23cc4: MISC BASE D57A8D7C5E48 lea r23, ptr [r22+r27*2+0x48] +XDIS 23cca: MISC BASE D57A8D7C5F49 lea r23, ptr [r23+r27*2+0x49] +XDIS 23cd0: MISC BASE D57B8D7C584A lea r23, ptr [r24+r27*2+0x4a] +XDIS 23cd6: MISC BASE D57B8D7C594B lea r23, ptr [r25+r27*2+0x4b] +XDIS 23cdc: MISC BASE D57B8D7C5A4C lea r23, ptr [r26+r27*2+0x4c] +XDIS 23ce2: MISC BASE D57B8D7C5B4D lea r23, ptr [r27+r27*2+0x4d] +XDIS 23ce8: MISC BASE D57B8D7C5C4E lea r23, ptr [r28+r27*2+0x4e] +XDIS 23cee: MISC BASE D57B8D7C5D4F lea r23, ptr [r29+r27*2+0x4f] +XDIS 23cf4: MISC BASE D57B8D7C5E50 lea r23, ptr [r30+r27*2+0x50] +XDIS 23cfa: MISC BASE D57B8D7C5F51 lea r23, ptr [r31+r27*2+0x51] +XDIS 23d00: MISC BASE D56A8D7C6033 lea r23, ptr [rax+r28*2+0x33] +XDIS 23d06: MISC BASE D56A8D7C6134 lea r23, ptr [rcx+r28*2+0x34] +XDIS 23d0c: MISC BASE D56A8D7C6235 lea r23, ptr [rdx+r28*2+0x35] +XDIS 23d12: MISC BASE D56A8D7C6336 lea r23, ptr [rbx+r28*2+0x36] +XDIS 23d18: MISC BASE D56A8D7C6437 lea r23, ptr [rsp+r28*2+0x37] +XDIS 23d1e: MISC BASE D56A8D7C6538 lea r23, ptr [rbp+r28*2+0x38] +XDIS 23d24: MISC BASE D56A8D7C6639 lea r23, ptr [rsi+r28*2+0x39] +XDIS 23d2a: MISC BASE D56A8D7C673A lea r23, ptr [rdi+r28*2+0x3a] +XDIS 23d30: MISC BASE D56B8D7C603B lea r23, ptr [r8+r28*2+0x3b] +XDIS 23d36: MISC BASE D56B8D7C613C lea r23, ptr [r9+r28*2+0x3c] +XDIS 23d3c: MISC BASE D56B8D7C623D lea r23, ptr [r10+r28*2+0x3d] +XDIS 23d42: MISC BASE D56B8D7C633E lea r23, ptr [r11+r28*2+0x3e] +XDIS 23d48: MISC BASE D56B8D7C643F lea r23, ptr [r12+r28*2+0x3f] +XDIS 23d4e: MISC BASE D56B8D7C6540 lea r23, ptr [r13+r28*2+0x40] +XDIS 23d54: MISC BASE D56B8D7C6641 lea r23, ptr [r14+r28*2+0x41] +XDIS 23d5a: MISC BASE D56B8D7C6742 lea r23, ptr [r15+r28*2+0x42] +XDIS 23d60: MISC BASE D57A8D7C6043 lea r23, ptr [r16+r28*2+0x43] +XDIS 23d66: MISC BASE D57A8D7C6144 lea r23, ptr [r17+r28*2+0x44] +XDIS 23d6c: MISC BASE D57A8D7C6245 lea r23, ptr [r18+r28*2+0x45] +XDIS 23d72: MISC BASE D57A8D7C6346 lea r23, ptr [r19+r28*2+0x46] +XDIS 23d78: MISC BASE D57A8D7C6447 lea r23, ptr [r20+r28*2+0x47] +XDIS 23d7e: MISC BASE D57A8D7C6548 lea r23, ptr [r21+r28*2+0x48] +XDIS 23d84: MISC BASE D57A8D7C6649 lea r23, ptr [r22+r28*2+0x49] +XDIS 23d8a: MISC BASE D57A8D7C674A lea r23, ptr [r23+r28*2+0x4a] +XDIS 23d90: MISC BASE D57B8D7C604B lea r23, ptr [r24+r28*2+0x4b] +XDIS 23d96: MISC BASE D57B8D7C614C lea r23, ptr [r25+r28*2+0x4c] +XDIS 23d9c: MISC BASE D57B8D7C624D lea r23, ptr [r26+r28*2+0x4d] +XDIS 23da2: MISC BASE D57B8D7C634E lea r23, ptr [r27+r28*2+0x4e] +XDIS 23da8: MISC BASE D57B8D7C644F lea r23, ptr [r28+r28*2+0x4f] +XDIS 23dae: MISC BASE D57B8D7C6550 lea r23, ptr [r29+r28*2+0x50] +XDIS 23db4: MISC BASE D57B8D7C6651 lea r23, ptr [r30+r28*2+0x51] +XDIS 23dba: MISC BASE D57B8D7C6752 lea r23, ptr [r31+r28*2+0x52] +XDIS 23dc0: MISC BASE D56A8D7C6834 lea r23, ptr [rax+r29*2+0x34] +XDIS 23dc6: MISC BASE D56A8D7C6935 lea r23, ptr [rcx+r29*2+0x35] +XDIS 23dcc: MISC BASE D56A8D7C6A36 lea r23, ptr [rdx+r29*2+0x36] +XDIS 23dd2: MISC BASE D56A8D7C6B37 lea r23, ptr [rbx+r29*2+0x37] +XDIS 23dd8: MISC BASE D56A8D7C6C38 lea r23, ptr [rsp+r29*2+0x38] +XDIS 23dde: MISC BASE D56A8D7C6D39 lea r23, ptr [rbp+r29*2+0x39] +XDIS 23de4: MISC BASE D56A8D7C6E3A lea r23, ptr [rsi+r29*2+0x3a] +XDIS 23dea: MISC BASE D56A8D7C6F3B lea r23, ptr [rdi+r29*2+0x3b] +XDIS 23df0: MISC BASE D56B8D7C683C lea r23, ptr [r8+r29*2+0x3c] +XDIS 23df6: MISC BASE D56B8D7C693D lea r23, ptr [r9+r29*2+0x3d] +XDIS 23dfc: MISC BASE D56B8D7C6A3E lea r23, ptr [r10+r29*2+0x3e] +XDIS 23e02: MISC BASE D56B8D7C6B3F lea r23, ptr [r11+r29*2+0x3f] +XDIS 23e08: MISC BASE D56B8D7C6C40 lea r23, ptr [r12+r29*2+0x40] +XDIS 23e0e: MISC BASE D56B8D7C6D41 lea r23, ptr [r13+r29*2+0x41] +XDIS 23e14: MISC BASE D56B8D7C6E42 lea r23, ptr [r14+r29*2+0x42] +XDIS 23e1a: MISC BASE D56B8D7C6F43 lea r23, ptr [r15+r29*2+0x43] +XDIS 23e20: MISC BASE D57A8D7C6844 lea r23, ptr [r16+r29*2+0x44] +XDIS 23e26: MISC BASE D57A8D7C6945 lea r23, ptr [r17+r29*2+0x45] +XDIS 23e2c: MISC BASE D57A8D7C6A46 lea r23, ptr [r18+r29*2+0x46] +XDIS 23e32: MISC BASE D57A8D7C6B47 lea r23, ptr [r19+r29*2+0x47] +XDIS 23e38: MISC BASE D57A8D7C6C48 lea r23, ptr [r20+r29*2+0x48] +XDIS 23e3e: MISC BASE D57A8D7C6D49 lea r23, ptr [r21+r29*2+0x49] +XDIS 23e44: MISC BASE D57A8D7C6E4A lea r23, ptr [r22+r29*2+0x4a] +XDIS 23e4a: MISC BASE D57A8D7C6F4B lea r23, ptr [r23+r29*2+0x4b] +XDIS 23e50: MISC BASE D57B8D7C684C lea r23, ptr [r24+r29*2+0x4c] +XDIS 23e56: MISC BASE D57B8D7C694D lea r23, ptr [r25+r29*2+0x4d] +XDIS 23e5c: MISC BASE D57B8D7C6A4E lea r23, ptr [r26+r29*2+0x4e] +XDIS 23e62: MISC BASE D57B8D7C6B4F lea r23, ptr [r27+r29*2+0x4f] +XDIS 23e68: MISC BASE D57B8D7C6C50 lea r23, ptr [r28+r29*2+0x50] +XDIS 23e6e: MISC BASE D57B8D7C6D51 lea r23, ptr [r29+r29*2+0x51] +XDIS 23e74: MISC BASE D57B8D7C6E52 lea r23, ptr [r30+r29*2+0x52] +XDIS 23e7a: MISC BASE D57B8D7C6F53 lea r23, ptr [r31+r29*2+0x53] +XDIS 23e80: MISC BASE D56A8D7C7035 lea r23, ptr [rax+r30*2+0x35] +XDIS 23e86: MISC BASE D56A8D7C7136 lea r23, ptr [rcx+r30*2+0x36] +XDIS 23e8c: MISC BASE D56A8D7C7237 lea r23, ptr [rdx+r30*2+0x37] +XDIS 23e92: MISC BASE D56A8D7C7338 lea r23, ptr [rbx+r30*2+0x38] +XDIS 23e98: MISC BASE D56A8D7C7439 lea r23, ptr [rsp+r30*2+0x39] +XDIS 23e9e: MISC BASE D56A8D7C753A lea r23, ptr [rbp+r30*2+0x3a] +XDIS 23ea4: MISC BASE D56A8D7C763B lea r23, ptr [rsi+r30*2+0x3b] +XDIS 23eaa: MISC BASE D56A8D7C773C lea r23, ptr [rdi+r30*2+0x3c] +XDIS 23eb0: MISC BASE D56B8D7C703D lea r23, ptr [r8+r30*2+0x3d] +XDIS 23eb6: MISC BASE D56B8D7C713E lea r23, ptr [r9+r30*2+0x3e] +XDIS 23ebc: MISC BASE D56B8D7C723F lea r23, ptr [r10+r30*2+0x3f] +XDIS 23ec2: MISC BASE D56B8D7C7340 lea r23, ptr [r11+r30*2+0x40] +XDIS 23ec8: MISC BASE D56B8D7C7441 lea r23, ptr [r12+r30*2+0x41] +XDIS 23ece: MISC BASE D56B8D7C7542 lea r23, ptr [r13+r30*2+0x42] +XDIS 23ed4: MISC BASE D56B8D7C7643 lea r23, ptr [r14+r30*2+0x43] +XDIS 23eda: MISC BASE D56B8D7C7744 lea r23, ptr [r15+r30*2+0x44] +XDIS 23ee0: MISC BASE D57A8D7C7045 lea r23, ptr [r16+r30*2+0x45] +XDIS 23ee6: MISC BASE D57A8D7C7146 lea r23, ptr [r17+r30*2+0x46] +XDIS 23eec: MISC BASE D57A8D7C7247 lea r23, ptr [r18+r30*2+0x47] +XDIS 23ef2: MISC BASE D57A8D7C7348 lea r23, ptr [r19+r30*2+0x48] +XDIS 23ef8: MISC BASE D57A8D7C7449 lea r23, ptr [r20+r30*2+0x49] +XDIS 23efe: MISC BASE D57A8D7C754A lea r23, ptr [r21+r30*2+0x4a] +XDIS 23f04: MISC BASE D57A8D7C764B lea r23, ptr [r22+r30*2+0x4b] +XDIS 23f0a: MISC BASE D57A8D7C774C lea r23, ptr [r23+r30*2+0x4c] +XDIS 23f10: MISC BASE D57B8D7C704D lea r23, ptr [r24+r30*2+0x4d] +XDIS 23f16: MISC BASE D57B8D7C714E lea r23, ptr [r25+r30*2+0x4e] +XDIS 23f1c: MISC BASE D57B8D7C724F lea r23, ptr [r26+r30*2+0x4f] +XDIS 23f22: MISC BASE D57B8D7C7350 lea r23, ptr [r27+r30*2+0x50] +XDIS 23f28: MISC BASE D57B8D7C7451 lea r23, ptr [r28+r30*2+0x51] +XDIS 23f2e: MISC BASE D57B8D7C7552 lea r23, ptr [r29+r30*2+0x52] +XDIS 23f34: MISC BASE D57B8D7C7653 lea r23, ptr [r30+r30*2+0x53] +XDIS 23f3a: MISC BASE D57B8D7C7754 lea r23, ptr [r31+r30*2+0x54] +XDIS 23f40: MISC BASE D56A8D7C7836 lea r23, ptr [rax+r31*2+0x36] +XDIS 23f46: MISC BASE D56A8D7C7937 lea r23, ptr [rcx+r31*2+0x37] +XDIS 23f4c: MISC BASE D56A8D7C7A38 lea r23, ptr [rdx+r31*2+0x38] +XDIS 23f52: MISC BASE D56A8D7C7B39 lea r23, ptr [rbx+r31*2+0x39] +XDIS 23f58: MISC BASE D56A8D7C7C3A lea r23, ptr [rsp+r31*2+0x3a] +XDIS 23f5e: MISC BASE D56A8D7C7D3B lea r23, ptr [rbp+r31*2+0x3b] +XDIS 23f64: MISC BASE D56A8D7C7E3C lea r23, ptr [rsi+r31*2+0x3c] +XDIS 23f6a: MISC BASE D56A8D7C7F3D lea r23, ptr [rdi+r31*2+0x3d] +XDIS 23f70: MISC BASE D56B8D7C783E lea r23, ptr [r8+r31*2+0x3e] +XDIS 23f76: MISC BASE D56B8D7C793F lea r23, ptr [r9+r31*2+0x3f] +XDIS 23f7c: MISC BASE D56B8D7C7A40 lea r23, ptr [r10+r31*2+0x40] +XDIS 23f82: MISC BASE D56B8D7C7B41 lea r23, ptr [r11+r31*2+0x41] +XDIS 23f88: MISC BASE D56B8D7C7C42 lea r23, ptr [r12+r31*2+0x42] +XDIS 23f8e: MISC BASE D56B8D7C7D43 lea r23, ptr [r13+r31*2+0x43] +XDIS 23f94: MISC BASE D56B8D7C7E44 lea r23, ptr [r14+r31*2+0x44] +XDIS 23f9a: MISC BASE D56B8D7C7F45 lea r23, ptr [r15+r31*2+0x45] +XDIS 23fa0: MISC BASE D57A8D7C7846 lea r23, ptr [r16+r31*2+0x46] +XDIS 23fa6: MISC BASE D57A8D7C7947 lea r23, ptr [r17+r31*2+0x47] +XDIS 23fac: MISC BASE D57A8D7C7A48 lea r23, ptr [r18+r31*2+0x48] +XDIS 23fb2: MISC BASE D57A8D7C7B49 lea r23, ptr [r19+r31*2+0x49] +XDIS 23fb8: MISC BASE D57A8D7C7C4A lea r23, ptr [r20+r31*2+0x4a] +XDIS 23fbe: MISC BASE D57A8D7C7D4B lea r23, ptr [r21+r31*2+0x4b] +XDIS 23fc4: MISC BASE D57A8D7C7E4C lea r23, ptr [r22+r31*2+0x4c] +XDIS 23fca: MISC BASE D57A8D7C7F4D lea r23, ptr [r23+r31*2+0x4d] +XDIS 23fd0: MISC BASE D57B8D7C784E lea r23, ptr [r24+r31*2+0x4e] +XDIS 23fd6: MISC BASE D57B8D7C794F lea r23, ptr [r25+r31*2+0x4f] +XDIS 23fdc: MISC BASE D57B8D7C7A50 lea r23, ptr [r26+r31*2+0x50] +XDIS 23fe2: MISC BASE D57B8D7C7B51 lea r23, ptr [r27+r31*2+0x51] +XDIS 23fe8: MISC BASE D57B8D7C7C52 lea r23, ptr [r28+r31*2+0x52] +XDIS 23fee: MISC BASE D57B8D7C7D53 lea r23, ptr [r29+r31*2+0x53] +XDIS 23ff4: MISC BASE D57B8D7C7E54 lea r23, ptr [r30+r31*2+0x54] +XDIS 23ffa: MISC BASE D57B8D7C7F55 lea r23, ptr [r31+r31*2+0x55] +XDIS 24000: MISC BASE D54C8D444018 lea r24, ptr [rax+rax*2+0x18] +XDIS 24006: MISC BASE D54C8D444119 lea r24, ptr [rcx+rax*2+0x19] +XDIS 2400c: MISC BASE D54C8D44421A lea r24, ptr [rdx+rax*2+0x1a] +XDIS 24012: MISC BASE D54C8D44431B lea r24, ptr [rbx+rax*2+0x1b] +XDIS 24018: MISC BASE D54C8D44441C lea r24, ptr [rsp+rax*2+0x1c] +XDIS 2401e: MISC BASE D54C8D44451D lea r24, ptr [rbp+rax*2+0x1d] +XDIS 24024: MISC BASE D54C8D44461E lea r24, ptr [rsi+rax*2+0x1e] +XDIS 2402a: MISC BASE D54C8D44471F lea r24, ptr [rdi+rax*2+0x1f] +XDIS 24030: MISC BASE D54D8D444020 lea r24, ptr [r8+rax*2+0x20] +XDIS 24036: MISC BASE D54D8D444121 lea r24, ptr [r9+rax*2+0x21] +XDIS 2403c: MISC BASE D54D8D444222 lea r24, ptr [r10+rax*2+0x22] +XDIS 24042: MISC BASE D54D8D444323 lea r24, ptr [r11+rax*2+0x23] +XDIS 24048: MISC BASE D54D8D444424 lea r24, ptr [r12+rax*2+0x24] +XDIS 2404e: MISC BASE D54D8D444525 lea r24, ptr [r13+rax*2+0x25] +XDIS 24054: MISC BASE D54D8D444626 lea r24, ptr [r14+rax*2+0x26] +XDIS 2405a: MISC BASE D54D8D444727 lea r24, ptr [r15+rax*2+0x27] +XDIS 24060: MISC BASE D55C8D444028 lea r24, ptr [r16+rax*2+0x28] +XDIS 24066: MISC BASE D55C8D444129 lea r24, ptr [r17+rax*2+0x29] +XDIS 2406c: MISC BASE D55C8D44422A lea r24, ptr [r18+rax*2+0x2a] +XDIS 24072: MISC BASE D55C8D44432B lea r24, ptr [r19+rax*2+0x2b] +XDIS 24078: MISC BASE D55C8D44442C lea r24, ptr [r20+rax*2+0x2c] +XDIS 2407e: MISC BASE D55C8D44452D lea r24, ptr [r21+rax*2+0x2d] +XDIS 24084: MISC BASE D55C8D44462E lea r24, ptr [r22+rax*2+0x2e] +XDIS 2408a: MISC BASE D55C8D44472F lea r24, ptr [r23+rax*2+0x2f] +XDIS 24090: MISC BASE D55D8D444030 lea r24, ptr [r24+rax*2+0x30] +XDIS 24096: MISC BASE D55D8D444131 lea r24, ptr [r25+rax*2+0x31] +XDIS 2409c: MISC BASE D55D8D444232 lea r24, ptr [r26+rax*2+0x32] +XDIS 240a2: MISC BASE D55D8D444333 lea r24, ptr [r27+rax*2+0x33] +XDIS 240a8: MISC BASE D55D8D444434 lea r24, ptr [r28+rax*2+0x34] +XDIS 240ae: MISC BASE D55D8D444535 lea r24, ptr [r29+rax*2+0x35] +XDIS 240b4: MISC BASE D55D8D444636 lea r24, ptr [r30+rax*2+0x36] +XDIS 240ba: MISC BASE D55D8D444737 lea r24, ptr [r31+rax*2+0x37] +XDIS 240c0: MISC BASE D54C8D444819 lea r24, ptr [rax+rcx*2+0x19] +XDIS 240c6: MISC BASE D54C8D44491A lea r24, ptr [rcx+rcx*2+0x1a] +XDIS 240cc: MISC BASE D54C8D444A1B lea r24, ptr [rdx+rcx*2+0x1b] +XDIS 240d2: MISC BASE D54C8D444B1C lea r24, ptr [rbx+rcx*2+0x1c] +XDIS 240d8: MISC BASE D54C8D444C1D lea r24, ptr [rsp+rcx*2+0x1d] +XDIS 240de: MISC BASE D54C8D444D1E lea r24, ptr [rbp+rcx*2+0x1e] +XDIS 240e4: MISC BASE D54C8D444E1F lea r24, ptr [rsi+rcx*2+0x1f] +XDIS 240ea: MISC BASE D54C8D444F20 lea r24, ptr [rdi+rcx*2+0x20] +XDIS 240f0: MISC BASE D54D8D444821 lea r24, ptr [r8+rcx*2+0x21] +XDIS 240f6: MISC BASE D54D8D444922 lea r24, ptr [r9+rcx*2+0x22] +XDIS 240fc: MISC BASE D54D8D444A23 lea r24, ptr [r10+rcx*2+0x23] +XDIS 24102: MISC BASE D54D8D444B24 lea r24, ptr [r11+rcx*2+0x24] +XDIS 24108: MISC BASE D54D8D444C25 lea r24, ptr [r12+rcx*2+0x25] +XDIS 2410e: MISC BASE D54D8D444D26 lea r24, ptr [r13+rcx*2+0x26] +XDIS 24114: MISC BASE D54D8D444E27 lea r24, ptr [r14+rcx*2+0x27] +XDIS 2411a: MISC BASE D54D8D444F28 lea r24, ptr [r15+rcx*2+0x28] +XDIS 24120: MISC BASE D55C8D444829 lea r24, ptr [r16+rcx*2+0x29] +XDIS 24126: MISC BASE D55C8D44492A lea r24, ptr [r17+rcx*2+0x2a] +XDIS 2412c: MISC BASE D55C8D444A2B lea r24, ptr [r18+rcx*2+0x2b] +XDIS 24132: MISC BASE D55C8D444B2C lea r24, ptr [r19+rcx*2+0x2c] +XDIS 24138: MISC BASE D55C8D444C2D lea r24, ptr [r20+rcx*2+0x2d] +XDIS 2413e: MISC BASE D55C8D444D2E lea r24, ptr [r21+rcx*2+0x2e] +XDIS 24144: MISC BASE D55C8D444E2F lea r24, ptr [r22+rcx*2+0x2f] +XDIS 2414a: MISC BASE D55C8D444F30 lea r24, ptr [r23+rcx*2+0x30] +XDIS 24150: MISC BASE D55D8D444831 lea r24, ptr [r24+rcx*2+0x31] +XDIS 24156: MISC BASE D55D8D444932 lea r24, ptr [r25+rcx*2+0x32] +XDIS 2415c: MISC BASE D55D8D444A33 lea r24, ptr [r26+rcx*2+0x33] +XDIS 24162: MISC BASE D55D8D444B34 lea r24, ptr [r27+rcx*2+0x34] +XDIS 24168: MISC BASE D55D8D444C35 lea r24, ptr [r28+rcx*2+0x35] +XDIS 2416e: MISC BASE D55D8D444D36 lea r24, ptr [r29+rcx*2+0x36] +XDIS 24174: MISC BASE D55D8D444E37 lea r24, ptr [r30+rcx*2+0x37] +XDIS 2417a: MISC BASE D55D8D444F38 lea r24, ptr [r31+rcx*2+0x38] +XDIS 24180: MISC BASE D54C8D44501A lea r24, ptr [rax+rdx*2+0x1a] +XDIS 24186: MISC BASE D54C8D44511B lea r24, ptr [rcx+rdx*2+0x1b] +XDIS 2418c: MISC BASE D54C8D44521C lea r24, ptr [rdx+rdx*2+0x1c] +XDIS 24192: MISC BASE D54C8D44531D lea r24, ptr [rbx+rdx*2+0x1d] +XDIS 24198: MISC BASE D54C8D44541E lea r24, ptr [rsp+rdx*2+0x1e] +XDIS 2419e: MISC BASE D54C8D44551F lea r24, ptr [rbp+rdx*2+0x1f] +XDIS 241a4: MISC BASE D54C8D445620 lea r24, ptr [rsi+rdx*2+0x20] +XDIS 241aa: MISC BASE D54C8D445721 lea r24, ptr [rdi+rdx*2+0x21] +XDIS 241b0: MISC BASE D54D8D445022 lea r24, ptr [r8+rdx*2+0x22] +XDIS 241b6: MISC BASE D54D8D445123 lea r24, ptr [r9+rdx*2+0x23] +XDIS 241bc: MISC BASE D54D8D445224 lea r24, ptr [r10+rdx*2+0x24] +XDIS 241c2: MISC BASE D54D8D445325 lea r24, ptr [r11+rdx*2+0x25] +XDIS 241c8: MISC BASE D54D8D445426 lea r24, ptr [r12+rdx*2+0x26] +XDIS 241ce: MISC BASE D54D8D445527 lea r24, ptr [r13+rdx*2+0x27] +XDIS 241d4: MISC BASE D54D8D445628 lea r24, ptr [r14+rdx*2+0x28] +XDIS 241da: MISC BASE D54D8D445729 lea r24, ptr [r15+rdx*2+0x29] +XDIS 241e0: MISC BASE D55C8D44502A lea r24, ptr [r16+rdx*2+0x2a] +XDIS 241e6: MISC BASE D55C8D44512B lea r24, ptr [r17+rdx*2+0x2b] +XDIS 241ec: MISC BASE D55C8D44522C lea r24, ptr [r18+rdx*2+0x2c] +XDIS 241f2: MISC BASE D55C8D44532D lea r24, ptr [r19+rdx*2+0x2d] +XDIS 241f8: MISC BASE D55C8D44542E lea r24, ptr [r20+rdx*2+0x2e] +XDIS 241fe: MISC BASE D55C8D44552F lea r24, ptr [r21+rdx*2+0x2f] +XDIS 24204: MISC BASE D55C8D445630 lea r24, ptr [r22+rdx*2+0x30] +XDIS 2420a: MISC BASE D55C8D445731 lea r24, ptr [r23+rdx*2+0x31] +XDIS 24210: MISC BASE D55D8D445032 lea r24, ptr [r24+rdx*2+0x32] +XDIS 24216: MISC BASE D55D8D445133 lea r24, ptr [r25+rdx*2+0x33] +XDIS 2421c: MISC BASE D55D8D445234 lea r24, ptr [r26+rdx*2+0x34] +XDIS 24222: MISC BASE D55D8D445335 lea r24, ptr [r27+rdx*2+0x35] +XDIS 24228: MISC BASE D55D8D445436 lea r24, ptr [r28+rdx*2+0x36] +XDIS 2422e: MISC BASE D55D8D445537 lea r24, ptr [r29+rdx*2+0x37] +XDIS 24234: MISC BASE D55D8D445638 lea r24, ptr [r30+rdx*2+0x38] +XDIS 2423a: MISC BASE D55D8D445739 lea r24, ptr [r31+rdx*2+0x39] +XDIS 24240: MISC BASE D54C8D44581B lea r24, ptr [rax+rbx*2+0x1b] +XDIS 24246: MISC BASE D54C8D44591C lea r24, ptr [rcx+rbx*2+0x1c] +XDIS 2424c: MISC BASE D54C8D445A1D lea r24, ptr [rdx+rbx*2+0x1d] +XDIS 24252: MISC BASE D54C8D445B1E lea r24, ptr [rbx+rbx*2+0x1e] +XDIS 24258: MISC BASE D54C8D445C1F lea r24, ptr [rsp+rbx*2+0x1f] +XDIS 2425e: MISC BASE D54C8D445D20 lea r24, ptr [rbp+rbx*2+0x20] +XDIS 24264: MISC BASE D54C8D445E21 lea r24, ptr [rsi+rbx*2+0x21] +XDIS 2426a: MISC BASE D54C8D445F22 lea r24, ptr [rdi+rbx*2+0x22] +XDIS 24270: MISC BASE D54D8D445823 lea r24, ptr [r8+rbx*2+0x23] +XDIS 24276: MISC BASE D54D8D445924 lea r24, ptr [r9+rbx*2+0x24] +XDIS 2427c: MISC BASE D54D8D445A25 lea r24, ptr [r10+rbx*2+0x25] +XDIS 24282: MISC BASE D54D8D445B26 lea r24, ptr [r11+rbx*2+0x26] +XDIS 24288: MISC BASE D54D8D445C27 lea r24, ptr [r12+rbx*2+0x27] +XDIS 2428e: MISC BASE D54D8D445D28 lea r24, ptr [r13+rbx*2+0x28] +XDIS 24294: MISC BASE D54D8D445E29 lea r24, ptr [r14+rbx*2+0x29] +XDIS 2429a: MISC BASE D54D8D445F2A lea r24, ptr [r15+rbx*2+0x2a] +XDIS 242a0: MISC BASE D55C8D44582B lea r24, ptr [r16+rbx*2+0x2b] +XDIS 242a6: MISC BASE D55C8D44592C lea r24, ptr [r17+rbx*2+0x2c] +XDIS 242ac: MISC BASE D55C8D445A2D lea r24, ptr [r18+rbx*2+0x2d] +XDIS 242b2: MISC BASE D55C8D445B2E lea r24, ptr [r19+rbx*2+0x2e] +XDIS 242b8: MISC BASE D55C8D445C2F lea r24, ptr [r20+rbx*2+0x2f] +XDIS 242be: MISC BASE D55C8D445D30 lea r24, ptr [r21+rbx*2+0x30] +XDIS 242c4: MISC BASE D55C8D445E31 lea r24, ptr [r22+rbx*2+0x31] +XDIS 242ca: MISC BASE D55C8D445F32 lea r24, ptr [r23+rbx*2+0x32] +XDIS 242d0: MISC BASE D55D8D445833 lea r24, ptr [r24+rbx*2+0x33] +XDIS 242d6: MISC BASE D55D8D445934 lea r24, ptr [r25+rbx*2+0x34] +XDIS 242dc: MISC BASE D55D8D445A35 lea r24, ptr [r26+rbx*2+0x35] +XDIS 242e2: MISC BASE D55D8D445B36 lea r24, ptr [r27+rbx*2+0x36] +XDIS 242e8: MISC BASE D55D8D445C37 lea r24, ptr [r28+rbx*2+0x37] +XDIS 242ee: MISC BASE D55D8D445D38 lea r24, ptr [r29+rbx*2+0x38] +XDIS 242f4: MISC BASE D55D8D445E39 lea r24, ptr [r30+rbx*2+0x39] +XDIS 242fa: MISC BASE D55D8D445F3A lea r24, ptr [r31+rbx*2+0x3a] +XDIS 24300: MISC BASE D54C8D44601C lea r24, ptr [rax+0x1c] +XDIS 24306: MISC BASE D54C8D44611D lea r24, ptr [rcx+0x1d] +XDIS 2430c: MISC BASE D54C8D44621E lea r24, ptr [rdx+0x1e] +XDIS 24312: MISC BASE D54C8D44631F lea r24, ptr [rbx+0x1f] +XDIS 24318: MISC BASE D54C8D446420 lea r24, ptr [rsp+0x20] +XDIS 2431e: MISC BASE D54C8D446521 lea r24, ptr [rbp+0x21] +XDIS 24324: MISC BASE D54C8D446622 lea r24, ptr [rsi+0x22] +XDIS 2432a: MISC BASE D54C8D446723 lea r24, ptr [rdi+0x23] +XDIS 24330: MISC BASE D54D8D446024 lea r24, ptr [r8+0x24] +XDIS 24336: MISC BASE D54D8D446125 lea r24, ptr [r9+0x25] +XDIS 2433c: MISC BASE D54D8D446226 lea r24, ptr [r10+0x26] +XDIS 24342: MISC BASE D54D8D446327 lea r24, ptr [r11+0x27] +XDIS 24348: MISC BASE D54D8D446428 lea r24, ptr [r12+0x28] +XDIS 2434e: MISC BASE D54D8D446529 lea r24, ptr [r13+0x29] +XDIS 24354: MISC BASE D54D8D44662A lea r24, ptr [r14+0x2a] +XDIS 2435a: MISC BASE D54D8D44672B lea r24, ptr [r15+0x2b] +XDIS 24360: MISC BASE D55C8D44602C lea r24, ptr [r16+0x2c] +XDIS 24366: MISC BASE D55C8D44612D lea r24, ptr [r17+0x2d] +XDIS 2436c: MISC BASE D55C8D44622E lea r24, ptr [r18+0x2e] +XDIS 24372: MISC BASE D55C8D44632F lea r24, ptr [r19+0x2f] +XDIS 24378: MISC BASE D55C8D446430 lea r24, ptr [r20+0x30] +XDIS 2437e: MISC BASE D55C8D446531 lea r24, ptr [r21+0x31] +XDIS 24384: MISC BASE D55C8D446632 lea r24, ptr [r22+0x32] +XDIS 2438a: MISC BASE D55C8D446733 lea r24, ptr [r23+0x33] +XDIS 24390: MISC BASE D55D8D446034 lea r24, ptr [r24+0x34] +XDIS 24396: MISC BASE D55D8D446135 lea r24, ptr [r25+0x35] +XDIS 2439c: MISC BASE D55D8D446236 lea r24, ptr [r26+0x36] +XDIS 243a2: MISC BASE D55D8D446337 lea r24, ptr [r27+0x37] +XDIS 243a8: MISC BASE D55D8D446438 lea r24, ptr [r28+0x38] +XDIS 243ae: MISC BASE D55D8D446539 lea r24, ptr [r29+0x39] +XDIS 243b4: MISC BASE D55D8D44663A lea r24, ptr [r30+0x3a] +XDIS 243ba: MISC BASE D55D8D44673B lea r24, ptr [r31+0x3b] +XDIS 243c0: MISC BASE D54C8D44681D lea r24, ptr [rax+rbp*2+0x1d] +XDIS 243c6: MISC BASE D54C8D44691E lea r24, ptr [rcx+rbp*2+0x1e] +XDIS 243cc: MISC BASE D54C8D446A1F lea r24, ptr [rdx+rbp*2+0x1f] +XDIS 243d2: MISC BASE D54C8D446B20 lea r24, ptr [rbx+rbp*2+0x20] +XDIS 243d8: MISC BASE D54C8D446C21 lea r24, ptr [rsp+rbp*2+0x21] +XDIS 243de: MISC BASE D54C8D446D22 lea r24, ptr [rbp+rbp*2+0x22] +XDIS 243e4: MISC BASE D54C8D446E23 lea r24, ptr [rsi+rbp*2+0x23] +XDIS 243ea: MISC BASE D54C8D446F24 lea r24, ptr [rdi+rbp*2+0x24] +XDIS 243f0: MISC BASE D54D8D446825 lea r24, ptr [r8+rbp*2+0x25] +XDIS 243f6: MISC BASE D54D8D446926 lea r24, ptr [r9+rbp*2+0x26] +XDIS 243fc: MISC BASE D54D8D446A27 lea r24, ptr [r10+rbp*2+0x27] +XDIS 24402: MISC BASE D54D8D446B28 lea r24, ptr [r11+rbp*2+0x28] +XDIS 24408: MISC BASE D54D8D446C29 lea r24, ptr [r12+rbp*2+0x29] +XDIS 2440e: MISC BASE D54D8D446D2A lea r24, ptr [r13+rbp*2+0x2a] +XDIS 24414: MISC BASE D54D8D446E2B lea r24, ptr [r14+rbp*2+0x2b] +XDIS 2441a: MISC BASE D54D8D446F2C lea r24, ptr [r15+rbp*2+0x2c] +XDIS 24420: MISC BASE D55C8D44682D lea r24, ptr [r16+rbp*2+0x2d] +XDIS 24426: MISC BASE D55C8D44692E lea r24, ptr [r17+rbp*2+0x2e] +XDIS 2442c: MISC BASE D55C8D446A2F lea r24, ptr [r18+rbp*2+0x2f] +XDIS 24432: MISC BASE D55C8D446B30 lea r24, ptr [r19+rbp*2+0x30] +XDIS 24438: MISC BASE D55C8D446C31 lea r24, ptr [r20+rbp*2+0x31] +XDIS 2443e: MISC BASE D55C8D446D32 lea r24, ptr [r21+rbp*2+0x32] +XDIS 24444: MISC BASE D55C8D446E33 lea r24, ptr [r22+rbp*2+0x33] +XDIS 2444a: MISC BASE D55C8D446F34 lea r24, ptr [r23+rbp*2+0x34] +XDIS 24450: MISC BASE D55D8D446835 lea r24, ptr [r24+rbp*2+0x35] +XDIS 24456: MISC BASE D55D8D446936 lea r24, ptr [r25+rbp*2+0x36] +XDIS 2445c: MISC BASE D55D8D446A37 lea r24, ptr [r26+rbp*2+0x37] +XDIS 24462: MISC BASE D55D8D446B38 lea r24, ptr [r27+rbp*2+0x38] +XDIS 24468: MISC BASE D55D8D446C39 lea r24, ptr [r28+rbp*2+0x39] +XDIS 2446e: MISC BASE D55D8D446D3A lea r24, ptr [r29+rbp*2+0x3a] +XDIS 24474: MISC BASE D55D8D446E3B lea r24, ptr [r30+rbp*2+0x3b] +XDIS 2447a: MISC BASE D55D8D446F3C lea r24, ptr [r31+rbp*2+0x3c] +XDIS 24480: MISC BASE D54C8D44701E lea r24, ptr [rax+rsi*2+0x1e] +XDIS 24486: MISC BASE D54C8D44711F lea r24, ptr [rcx+rsi*2+0x1f] +XDIS 2448c: MISC BASE D54C8D447220 lea r24, ptr [rdx+rsi*2+0x20] +XDIS 24492: MISC BASE D54C8D447321 lea r24, ptr [rbx+rsi*2+0x21] +XDIS 24498: MISC BASE D54C8D447422 lea r24, ptr [rsp+rsi*2+0x22] +XDIS 2449e: MISC BASE D54C8D447523 lea r24, ptr [rbp+rsi*2+0x23] +XDIS 244a4: MISC BASE D54C8D447624 lea r24, ptr [rsi+rsi*2+0x24] +XDIS 244aa: MISC BASE D54C8D447725 lea r24, ptr [rdi+rsi*2+0x25] +XDIS 244b0: MISC BASE D54D8D447026 lea r24, ptr [r8+rsi*2+0x26] +XDIS 244b6: MISC BASE D54D8D447127 lea r24, ptr [r9+rsi*2+0x27] +XDIS 244bc: MISC BASE D54D8D447228 lea r24, ptr [r10+rsi*2+0x28] +XDIS 244c2: MISC BASE D54D8D447329 lea r24, ptr [r11+rsi*2+0x29] +XDIS 244c8: MISC BASE D54D8D44742A lea r24, ptr [r12+rsi*2+0x2a] +XDIS 244ce: MISC BASE D54D8D44752B lea r24, ptr [r13+rsi*2+0x2b] +XDIS 244d4: MISC BASE D54D8D44762C lea r24, ptr [r14+rsi*2+0x2c] +XDIS 244da: MISC BASE D54D8D44772D lea r24, ptr [r15+rsi*2+0x2d] +XDIS 244e0: MISC BASE D55C8D44702E lea r24, ptr [r16+rsi*2+0x2e] +XDIS 244e6: MISC BASE D55C8D44712F lea r24, ptr [r17+rsi*2+0x2f] +XDIS 244ec: MISC BASE D55C8D447230 lea r24, ptr [r18+rsi*2+0x30] +XDIS 244f2: MISC BASE D55C8D447331 lea r24, ptr [r19+rsi*2+0x31] +XDIS 244f8: MISC BASE D55C8D447432 lea r24, ptr [r20+rsi*2+0x32] +XDIS 244fe: MISC BASE D55C8D447533 lea r24, ptr [r21+rsi*2+0x33] +XDIS 24504: MISC BASE D55C8D447634 lea r24, ptr [r22+rsi*2+0x34] +XDIS 2450a: MISC BASE D55C8D447735 lea r24, ptr [r23+rsi*2+0x35] +XDIS 24510: MISC BASE D55D8D447036 lea r24, ptr [r24+rsi*2+0x36] +XDIS 24516: MISC BASE D55D8D447137 lea r24, ptr [r25+rsi*2+0x37] +XDIS 2451c: MISC BASE D55D8D447238 lea r24, ptr [r26+rsi*2+0x38] +XDIS 24522: MISC BASE D55D8D447339 lea r24, ptr [r27+rsi*2+0x39] +XDIS 24528: MISC BASE D55D8D44743A lea r24, ptr [r28+rsi*2+0x3a] +XDIS 2452e: MISC BASE D55D8D44753B lea r24, ptr [r29+rsi*2+0x3b] +XDIS 24534: MISC BASE D55D8D44763C lea r24, ptr [r30+rsi*2+0x3c] +XDIS 2453a: MISC BASE D55D8D44773D lea r24, ptr [r31+rsi*2+0x3d] +XDIS 24540: MISC BASE D54C8D44781F lea r24, ptr [rax+rdi*2+0x1f] +XDIS 24546: MISC BASE D54C8D447920 lea r24, ptr [rcx+rdi*2+0x20] +XDIS 2454c: MISC BASE D54C8D447A21 lea r24, ptr [rdx+rdi*2+0x21] +XDIS 24552: MISC BASE D54C8D447B22 lea r24, ptr [rbx+rdi*2+0x22] +XDIS 24558: MISC BASE D54C8D447C23 lea r24, ptr [rsp+rdi*2+0x23] +XDIS 2455e: MISC BASE D54C8D447D24 lea r24, ptr [rbp+rdi*2+0x24] +XDIS 24564: MISC BASE D54C8D447E25 lea r24, ptr [rsi+rdi*2+0x25] +XDIS 2456a: MISC BASE D54C8D447F26 lea r24, ptr [rdi+rdi*2+0x26] +XDIS 24570: MISC BASE D54D8D447827 lea r24, ptr [r8+rdi*2+0x27] +XDIS 24576: MISC BASE D54D8D447928 lea r24, ptr [r9+rdi*2+0x28] +XDIS 2457c: MISC BASE D54D8D447A29 lea r24, ptr [r10+rdi*2+0x29] +XDIS 24582: MISC BASE D54D8D447B2A lea r24, ptr [r11+rdi*2+0x2a] +XDIS 24588: MISC BASE D54D8D447C2B lea r24, ptr [r12+rdi*2+0x2b] +XDIS 2458e: MISC BASE D54D8D447D2C lea r24, ptr [r13+rdi*2+0x2c] +XDIS 24594: MISC BASE D54D8D447E2D lea r24, ptr [r14+rdi*2+0x2d] +XDIS 2459a: MISC BASE D54D8D447F2E lea r24, ptr [r15+rdi*2+0x2e] +XDIS 245a0: MISC BASE D55C8D44782F lea r24, ptr [r16+rdi*2+0x2f] +XDIS 245a6: MISC BASE D55C8D447930 lea r24, ptr [r17+rdi*2+0x30] +XDIS 245ac: MISC BASE D55C8D447A31 lea r24, ptr [r18+rdi*2+0x31] +XDIS 245b2: MISC BASE D55C8D447B32 lea r24, ptr [r19+rdi*2+0x32] +XDIS 245b8: MISC BASE D55C8D447C33 lea r24, ptr [r20+rdi*2+0x33] +XDIS 245be: MISC BASE D55C8D447D34 lea r24, ptr [r21+rdi*2+0x34] +XDIS 245c4: MISC BASE D55C8D447E35 lea r24, ptr [r22+rdi*2+0x35] +XDIS 245ca: MISC BASE D55C8D447F36 lea r24, ptr [r23+rdi*2+0x36] +XDIS 245d0: MISC BASE D55D8D447837 lea r24, ptr [r24+rdi*2+0x37] +XDIS 245d6: MISC BASE D55D8D447938 lea r24, ptr [r25+rdi*2+0x38] +XDIS 245dc: MISC BASE D55D8D447A39 lea r24, ptr [r26+rdi*2+0x39] +XDIS 245e2: MISC BASE D55D8D447B3A lea r24, ptr [r27+rdi*2+0x3a] +XDIS 245e8: MISC BASE D55D8D447C3B lea r24, ptr [r28+rdi*2+0x3b] +XDIS 245ee: MISC BASE D55D8D447D3C lea r24, ptr [r29+rdi*2+0x3c] +XDIS 245f4: MISC BASE D55D8D447E3D lea r24, ptr [r30+rdi*2+0x3d] +XDIS 245fa: MISC BASE D55D8D447F3E lea r24, ptr [r31+rdi*2+0x3e] +XDIS 24600: MISC BASE D54E8D444020 lea r24, ptr [rax+r8*2+0x20] +XDIS 24606: MISC BASE D54E8D444121 lea r24, ptr [rcx+r8*2+0x21] +XDIS 2460c: MISC BASE D54E8D444222 lea r24, ptr [rdx+r8*2+0x22] +XDIS 24612: MISC BASE D54E8D444323 lea r24, ptr [rbx+r8*2+0x23] +XDIS 24618: MISC BASE D54E8D444424 lea r24, ptr [rsp+r8*2+0x24] +XDIS 2461e: MISC BASE D54E8D444525 lea r24, ptr [rbp+r8*2+0x25] +XDIS 24624: MISC BASE D54E8D444626 lea r24, ptr [rsi+r8*2+0x26] +XDIS 2462a: MISC BASE D54E8D444727 lea r24, ptr [rdi+r8*2+0x27] +XDIS 24630: MISC BASE D54F8D444028 lea r24, ptr [r8+r8*2+0x28] +XDIS 24636: MISC BASE D54F8D444129 lea r24, ptr [r9+r8*2+0x29] +XDIS 2463c: MISC BASE D54F8D44422A lea r24, ptr [r10+r8*2+0x2a] +XDIS 24642: MISC BASE D54F8D44432B lea r24, ptr [r11+r8*2+0x2b] +XDIS 24648: MISC BASE D54F8D44442C lea r24, ptr [r12+r8*2+0x2c] +XDIS 2464e: MISC BASE D54F8D44452D lea r24, ptr [r13+r8*2+0x2d] +XDIS 24654: MISC BASE D54F8D44462E lea r24, ptr [r14+r8*2+0x2e] +XDIS 2465a: MISC BASE D54F8D44472F lea r24, ptr [r15+r8*2+0x2f] +XDIS 24660: MISC BASE D55E8D444030 lea r24, ptr [r16+r8*2+0x30] +XDIS 24666: MISC BASE D55E8D444131 lea r24, ptr [r17+r8*2+0x31] +XDIS 2466c: MISC BASE D55E8D444232 lea r24, ptr [r18+r8*2+0x32] +XDIS 24672: MISC BASE D55E8D444333 lea r24, ptr [r19+r8*2+0x33] +XDIS 24678: MISC BASE D55E8D444434 lea r24, ptr [r20+r8*2+0x34] +XDIS 2467e: MISC BASE D55E8D444535 lea r24, ptr [r21+r8*2+0x35] +XDIS 24684: MISC BASE D55E8D444636 lea r24, ptr [r22+r8*2+0x36] +XDIS 2468a: MISC BASE D55E8D444737 lea r24, ptr [r23+r8*2+0x37] +XDIS 24690: MISC BASE D55F8D444038 lea r24, ptr [r24+r8*2+0x38] +XDIS 24696: MISC BASE D55F8D444139 lea r24, ptr [r25+r8*2+0x39] +XDIS 2469c: MISC BASE D55F8D44423A lea r24, ptr [r26+r8*2+0x3a] +XDIS 246a2: MISC BASE D55F8D44433B lea r24, ptr [r27+r8*2+0x3b] +XDIS 246a8: MISC BASE D55F8D44443C lea r24, ptr [r28+r8*2+0x3c] +XDIS 246ae: MISC BASE D55F8D44453D lea r24, ptr [r29+r8*2+0x3d] +XDIS 246b4: MISC BASE D55F8D44463E lea r24, ptr [r30+r8*2+0x3e] +XDIS 246ba: MISC BASE D55F8D44473F lea r24, ptr [r31+r8*2+0x3f] +XDIS 246c0: MISC BASE D54E8D444821 lea r24, ptr [rax+r9*2+0x21] +XDIS 246c6: MISC BASE D54E8D444922 lea r24, ptr [rcx+r9*2+0x22] +XDIS 246cc: MISC BASE D54E8D444A23 lea r24, ptr [rdx+r9*2+0x23] +XDIS 246d2: MISC BASE D54E8D444B24 lea r24, ptr [rbx+r9*2+0x24] +XDIS 246d8: MISC BASE D54E8D444C25 lea r24, ptr [rsp+r9*2+0x25] +XDIS 246de: MISC BASE D54E8D444D26 lea r24, ptr [rbp+r9*2+0x26] +XDIS 246e4: MISC BASE D54E8D444E27 lea r24, ptr [rsi+r9*2+0x27] +XDIS 246ea: MISC BASE D54E8D444F28 lea r24, ptr [rdi+r9*2+0x28] +XDIS 246f0: MISC BASE D54F8D444829 lea r24, ptr [r8+r9*2+0x29] +XDIS 246f6: MISC BASE D54F8D44492A lea r24, ptr [r9+r9*2+0x2a] +XDIS 246fc: MISC BASE D54F8D444A2B lea r24, ptr [r10+r9*2+0x2b] +XDIS 24702: MISC BASE D54F8D444B2C lea r24, ptr [r11+r9*2+0x2c] +XDIS 24708: MISC BASE D54F8D444C2D lea r24, ptr [r12+r9*2+0x2d] +XDIS 2470e: MISC BASE D54F8D444D2E lea r24, ptr [r13+r9*2+0x2e] +XDIS 24714: MISC BASE D54F8D444E2F lea r24, ptr [r14+r9*2+0x2f] +XDIS 2471a: MISC BASE D54F8D444F30 lea r24, ptr [r15+r9*2+0x30] +XDIS 24720: MISC BASE D55E8D444831 lea r24, ptr [r16+r9*2+0x31] +XDIS 24726: MISC BASE D55E8D444932 lea r24, ptr [r17+r9*2+0x32] +XDIS 2472c: MISC BASE D55E8D444A33 lea r24, ptr [r18+r9*2+0x33] +XDIS 24732: MISC BASE D55E8D444B34 lea r24, ptr [r19+r9*2+0x34] +XDIS 24738: MISC BASE D55E8D444C35 lea r24, ptr [r20+r9*2+0x35] +XDIS 2473e: MISC BASE D55E8D444D36 lea r24, ptr [r21+r9*2+0x36] +XDIS 24744: MISC BASE D55E8D444E37 lea r24, ptr [r22+r9*2+0x37] +XDIS 2474a: MISC BASE D55E8D444F38 lea r24, ptr [r23+r9*2+0x38] +XDIS 24750: MISC BASE D55F8D444839 lea r24, ptr [r24+r9*2+0x39] +XDIS 24756: MISC BASE D55F8D44493A lea r24, ptr [r25+r9*2+0x3a] +XDIS 2475c: MISC BASE D55F8D444A3B lea r24, ptr [r26+r9*2+0x3b] +XDIS 24762: MISC BASE D55F8D444B3C lea r24, ptr [r27+r9*2+0x3c] +XDIS 24768: MISC BASE D55F8D444C3D lea r24, ptr [r28+r9*2+0x3d] +XDIS 2476e: MISC BASE D55F8D444D3E lea r24, ptr [r29+r9*2+0x3e] +XDIS 24774: MISC BASE D55F8D444E3F lea r24, ptr [r30+r9*2+0x3f] +XDIS 2477a: MISC BASE D55F8D444F40 lea r24, ptr [r31+r9*2+0x40] +XDIS 24780: MISC BASE D54E8D445022 lea r24, ptr [rax+r10*2+0x22] +XDIS 24786: MISC BASE D54E8D445123 lea r24, ptr [rcx+r10*2+0x23] +XDIS 2478c: MISC BASE D54E8D445224 lea r24, ptr [rdx+r10*2+0x24] +XDIS 24792: MISC BASE D54E8D445325 lea r24, ptr [rbx+r10*2+0x25] +XDIS 24798: MISC BASE D54E8D445426 lea r24, ptr [rsp+r10*2+0x26] +XDIS 2479e: MISC BASE D54E8D445527 lea r24, ptr [rbp+r10*2+0x27] +XDIS 247a4: MISC BASE D54E8D445628 lea r24, ptr [rsi+r10*2+0x28] +XDIS 247aa: MISC BASE D54E8D445729 lea r24, ptr [rdi+r10*2+0x29] +XDIS 247b0: MISC BASE D54F8D44502A lea r24, ptr [r8+r10*2+0x2a] +XDIS 247b6: MISC BASE D54F8D44512B lea r24, ptr [r9+r10*2+0x2b] +XDIS 247bc: MISC BASE D54F8D44522C lea r24, ptr [r10+r10*2+0x2c] +XDIS 247c2: MISC BASE D54F8D44532D lea r24, ptr [r11+r10*2+0x2d] +XDIS 247c8: MISC BASE D54F8D44542E lea r24, ptr [r12+r10*2+0x2e] +XDIS 247ce: MISC BASE D54F8D44552F lea r24, ptr [r13+r10*2+0x2f] +XDIS 247d4: MISC BASE D54F8D445630 lea r24, ptr [r14+r10*2+0x30] +XDIS 247da: MISC BASE D54F8D445731 lea r24, ptr [r15+r10*2+0x31] +XDIS 247e0: MISC BASE D55E8D445032 lea r24, ptr [r16+r10*2+0x32] +XDIS 247e6: MISC BASE D55E8D445133 lea r24, ptr [r17+r10*2+0x33] +XDIS 247ec: MISC BASE D55E8D445234 lea r24, ptr [r18+r10*2+0x34] +XDIS 247f2: MISC BASE D55E8D445335 lea r24, ptr [r19+r10*2+0x35] +XDIS 247f8: MISC BASE D55E8D445436 lea r24, ptr [r20+r10*2+0x36] +XDIS 247fe: MISC BASE D55E8D445537 lea r24, ptr [r21+r10*2+0x37] +XDIS 24804: MISC BASE D55E8D445638 lea r24, ptr [r22+r10*2+0x38] +XDIS 2480a: MISC BASE D55E8D445739 lea r24, ptr [r23+r10*2+0x39] +XDIS 24810: MISC BASE D55F8D44503A lea r24, ptr [r24+r10*2+0x3a] +XDIS 24816: MISC BASE D55F8D44513B lea r24, ptr [r25+r10*2+0x3b] +XDIS 2481c: MISC BASE D55F8D44523C lea r24, ptr [r26+r10*2+0x3c] +XDIS 24822: MISC BASE D55F8D44533D lea r24, ptr [r27+r10*2+0x3d] +XDIS 24828: MISC BASE D55F8D44543E lea r24, ptr [r28+r10*2+0x3e] +XDIS 2482e: MISC BASE D55F8D44553F lea r24, ptr [r29+r10*2+0x3f] +XDIS 24834: MISC BASE D55F8D445640 lea r24, ptr [r30+r10*2+0x40] +XDIS 2483a: MISC BASE D55F8D445741 lea r24, ptr [r31+r10*2+0x41] +XDIS 24840: MISC BASE D54E8D445823 lea r24, ptr [rax+r11*2+0x23] +XDIS 24846: MISC BASE D54E8D445924 lea r24, ptr [rcx+r11*2+0x24] +XDIS 2484c: MISC BASE D54E8D445A25 lea r24, ptr [rdx+r11*2+0x25] +XDIS 24852: MISC BASE D54E8D445B26 lea r24, ptr [rbx+r11*2+0x26] +XDIS 24858: MISC BASE D54E8D445C27 lea r24, ptr [rsp+r11*2+0x27] +XDIS 2485e: MISC BASE D54E8D445D28 lea r24, ptr [rbp+r11*2+0x28] +XDIS 24864: MISC BASE D54E8D445E29 lea r24, ptr [rsi+r11*2+0x29] +XDIS 2486a: MISC BASE D54E8D445F2A lea r24, ptr [rdi+r11*2+0x2a] +XDIS 24870: MISC BASE D54F8D44582B lea r24, ptr [r8+r11*2+0x2b] +XDIS 24876: MISC BASE D54F8D44592C lea r24, ptr [r9+r11*2+0x2c] +XDIS 2487c: MISC BASE D54F8D445A2D lea r24, ptr [r10+r11*2+0x2d] +XDIS 24882: MISC BASE D54F8D445B2E lea r24, ptr [r11+r11*2+0x2e] +XDIS 24888: MISC BASE D54F8D445C2F lea r24, ptr [r12+r11*2+0x2f] +XDIS 2488e: MISC BASE D54F8D445D30 lea r24, ptr [r13+r11*2+0x30] +XDIS 24894: MISC BASE D54F8D445E31 lea r24, ptr [r14+r11*2+0x31] +XDIS 2489a: MISC BASE D54F8D445F32 lea r24, ptr [r15+r11*2+0x32] +XDIS 248a0: MISC BASE D55E8D445833 lea r24, ptr [r16+r11*2+0x33] +XDIS 248a6: MISC BASE D55E8D445934 lea r24, ptr [r17+r11*2+0x34] +XDIS 248ac: MISC BASE D55E8D445A35 lea r24, ptr [r18+r11*2+0x35] +XDIS 248b2: MISC BASE D55E8D445B36 lea r24, ptr [r19+r11*2+0x36] +XDIS 248b8: MISC BASE D55E8D445C37 lea r24, ptr [r20+r11*2+0x37] +XDIS 248be: MISC BASE D55E8D445D38 lea r24, ptr [r21+r11*2+0x38] +XDIS 248c4: MISC BASE D55E8D445E39 lea r24, ptr [r22+r11*2+0x39] +XDIS 248ca: MISC BASE D55E8D445F3A lea r24, ptr [r23+r11*2+0x3a] +XDIS 248d0: MISC BASE D55F8D44583B lea r24, ptr [r24+r11*2+0x3b] +XDIS 248d6: MISC BASE D55F8D44593C lea r24, ptr [r25+r11*2+0x3c] +XDIS 248dc: MISC BASE D55F8D445A3D lea r24, ptr [r26+r11*2+0x3d] +XDIS 248e2: MISC BASE D55F8D445B3E lea r24, ptr [r27+r11*2+0x3e] +XDIS 248e8: MISC BASE D55F8D445C3F lea r24, ptr [r28+r11*2+0x3f] +XDIS 248ee: MISC BASE D55F8D445D40 lea r24, ptr [r29+r11*2+0x40] +XDIS 248f4: MISC BASE D55F8D445E41 lea r24, ptr [r30+r11*2+0x41] +XDIS 248fa: MISC BASE D55F8D445F42 lea r24, ptr [r31+r11*2+0x42] +XDIS 24900: MISC BASE D54E8D446024 lea r24, ptr [rax+r12*2+0x24] +XDIS 24906: MISC BASE D54E8D446125 lea r24, ptr [rcx+r12*2+0x25] +XDIS 2490c: MISC BASE D54E8D446226 lea r24, ptr [rdx+r12*2+0x26] +XDIS 24912: MISC BASE D54E8D446327 lea r24, ptr [rbx+r12*2+0x27] +XDIS 24918: MISC BASE D54E8D446428 lea r24, ptr [rsp+r12*2+0x28] +XDIS 2491e: MISC BASE D54E8D446529 lea r24, ptr [rbp+r12*2+0x29] +XDIS 24924: MISC BASE D54E8D44662A lea r24, ptr [rsi+r12*2+0x2a] +XDIS 2492a: MISC BASE D54E8D44672B lea r24, ptr [rdi+r12*2+0x2b] +XDIS 24930: MISC BASE D54F8D44602C lea r24, ptr [r8+r12*2+0x2c] +XDIS 24936: MISC BASE D54F8D44612D lea r24, ptr [r9+r12*2+0x2d] +XDIS 2493c: MISC BASE D54F8D44622E lea r24, ptr [r10+r12*2+0x2e] +XDIS 24942: MISC BASE D54F8D44632F lea r24, ptr [r11+r12*2+0x2f] +XDIS 24948: MISC BASE D54F8D446430 lea r24, ptr [r12+r12*2+0x30] +XDIS 2494e: MISC BASE D54F8D446531 lea r24, ptr [r13+r12*2+0x31] +XDIS 24954: MISC BASE D54F8D446632 lea r24, ptr [r14+r12*2+0x32] +XDIS 2495a: MISC BASE D54F8D446733 lea r24, ptr [r15+r12*2+0x33] +XDIS 24960: MISC BASE D55E8D446034 lea r24, ptr [r16+r12*2+0x34] +XDIS 24966: MISC BASE D55E8D446135 lea r24, ptr [r17+r12*2+0x35] +XDIS 2496c: MISC BASE D55E8D446236 lea r24, ptr [r18+r12*2+0x36] +XDIS 24972: MISC BASE D55E8D446337 lea r24, ptr [r19+r12*2+0x37] +XDIS 24978: MISC BASE D55E8D446438 lea r24, ptr [r20+r12*2+0x38] +XDIS 2497e: MISC BASE D55E8D446539 lea r24, ptr [r21+r12*2+0x39] +XDIS 24984: MISC BASE D55E8D44663A lea r24, ptr [r22+r12*2+0x3a] +XDIS 2498a: MISC BASE D55E8D44673B lea r24, ptr [r23+r12*2+0x3b] +XDIS 24990: MISC BASE D55F8D44603C lea r24, ptr [r24+r12*2+0x3c] +XDIS 24996: MISC BASE D55F8D44613D lea r24, ptr [r25+r12*2+0x3d] +XDIS 2499c: MISC BASE D55F8D44623E lea r24, ptr [r26+r12*2+0x3e] +XDIS 249a2: MISC BASE D55F8D44633F lea r24, ptr [r27+r12*2+0x3f] +XDIS 249a8: MISC BASE D55F8D446440 lea r24, ptr [r28+r12*2+0x40] +XDIS 249ae: MISC BASE D55F8D446541 lea r24, ptr [r29+r12*2+0x41] +XDIS 249b4: MISC BASE D55F8D446642 lea r24, ptr [r30+r12*2+0x42] +XDIS 249ba: MISC BASE D55F8D446743 lea r24, ptr [r31+r12*2+0x43] +XDIS 249c0: MISC BASE D54E8D446825 lea r24, ptr [rax+r13*2+0x25] +XDIS 249c6: MISC BASE D54E8D446926 lea r24, ptr [rcx+r13*2+0x26] +XDIS 249cc: MISC BASE D54E8D446A27 lea r24, ptr [rdx+r13*2+0x27] +XDIS 249d2: MISC BASE D54E8D446B28 lea r24, ptr [rbx+r13*2+0x28] +XDIS 249d8: MISC BASE D54E8D446C29 lea r24, ptr [rsp+r13*2+0x29] +XDIS 249de: MISC BASE D54E8D446D2A lea r24, ptr [rbp+r13*2+0x2a] +XDIS 249e4: MISC BASE D54E8D446E2B lea r24, ptr [rsi+r13*2+0x2b] +XDIS 249ea: MISC BASE D54E8D446F2C lea r24, ptr [rdi+r13*2+0x2c] +XDIS 249f0: MISC BASE D54F8D44682D lea r24, ptr [r8+r13*2+0x2d] +XDIS 249f6: MISC BASE D54F8D44692E lea r24, ptr [r9+r13*2+0x2e] +XDIS 249fc: MISC BASE D54F8D446A2F lea r24, ptr [r10+r13*2+0x2f] +XDIS 24a02: MISC BASE D54F8D446B30 lea r24, ptr [r11+r13*2+0x30] +XDIS 24a08: MISC BASE D54F8D446C31 lea r24, ptr [r12+r13*2+0x31] +XDIS 24a0e: MISC BASE D54F8D446D32 lea r24, ptr [r13+r13*2+0x32] +XDIS 24a14: MISC BASE D54F8D446E33 lea r24, ptr [r14+r13*2+0x33] +XDIS 24a1a: MISC BASE D54F8D446F34 lea r24, ptr [r15+r13*2+0x34] +XDIS 24a20: MISC BASE D55E8D446835 lea r24, ptr [r16+r13*2+0x35] +XDIS 24a26: MISC BASE D55E8D446936 lea r24, ptr [r17+r13*2+0x36] +XDIS 24a2c: MISC BASE D55E8D446A37 lea r24, ptr [r18+r13*2+0x37] +XDIS 24a32: MISC BASE D55E8D446B38 lea r24, ptr [r19+r13*2+0x38] +XDIS 24a38: MISC BASE D55E8D446C39 lea r24, ptr [r20+r13*2+0x39] +XDIS 24a3e: MISC BASE D55E8D446D3A lea r24, ptr [r21+r13*2+0x3a] +XDIS 24a44: MISC BASE D55E8D446E3B lea r24, ptr [r22+r13*2+0x3b] +XDIS 24a4a: MISC BASE D55E8D446F3C lea r24, ptr [r23+r13*2+0x3c] +XDIS 24a50: MISC BASE D55F8D44683D lea r24, ptr [r24+r13*2+0x3d] +XDIS 24a56: MISC BASE D55F8D44693E lea r24, ptr [r25+r13*2+0x3e] +XDIS 24a5c: MISC BASE D55F8D446A3F lea r24, ptr [r26+r13*2+0x3f] +XDIS 24a62: MISC BASE D55F8D446B40 lea r24, ptr [r27+r13*2+0x40] +XDIS 24a68: MISC BASE D55F8D446C41 lea r24, ptr [r28+r13*2+0x41] +XDIS 24a6e: MISC BASE D55F8D446D42 lea r24, ptr [r29+r13*2+0x42] +XDIS 24a74: MISC BASE D55F8D446E43 lea r24, ptr [r30+r13*2+0x43] +XDIS 24a7a: MISC BASE D55F8D446F44 lea r24, ptr [r31+r13*2+0x44] +XDIS 24a80: MISC BASE D54E8D447026 lea r24, ptr [rax+r14*2+0x26] +XDIS 24a86: MISC BASE D54E8D447127 lea r24, ptr [rcx+r14*2+0x27] +XDIS 24a8c: MISC BASE D54E8D447228 lea r24, ptr [rdx+r14*2+0x28] +XDIS 24a92: MISC BASE D54E8D447329 lea r24, ptr [rbx+r14*2+0x29] +XDIS 24a98: MISC BASE D54E8D44742A lea r24, ptr [rsp+r14*2+0x2a] +XDIS 24a9e: MISC BASE D54E8D44752B lea r24, ptr [rbp+r14*2+0x2b] +XDIS 24aa4: MISC BASE D54E8D44762C lea r24, ptr [rsi+r14*2+0x2c] +XDIS 24aaa: MISC BASE D54E8D44772D lea r24, ptr [rdi+r14*2+0x2d] +XDIS 24ab0: MISC BASE D54F8D44702E lea r24, ptr [r8+r14*2+0x2e] +XDIS 24ab6: MISC BASE D54F8D44712F lea r24, ptr [r9+r14*2+0x2f] +XDIS 24abc: MISC BASE D54F8D447230 lea r24, ptr [r10+r14*2+0x30] +XDIS 24ac2: MISC BASE D54F8D447331 lea r24, ptr [r11+r14*2+0x31] +XDIS 24ac8: MISC BASE D54F8D447432 lea r24, ptr [r12+r14*2+0x32] +XDIS 24ace: MISC BASE D54F8D447533 lea r24, ptr [r13+r14*2+0x33] +XDIS 24ad4: MISC BASE D54F8D447634 lea r24, ptr [r14+r14*2+0x34] +XDIS 24ada: MISC BASE D54F8D447735 lea r24, ptr [r15+r14*2+0x35] +XDIS 24ae0: MISC BASE D55E8D447036 lea r24, ptr [r16+r14*2+0x36] +XDIS 24ae6: MISC BASE D55E8D447137 lea r24, ptr [r17+r14*2+0x37] +XDIS 24aec: MISC BASE D55E8D447238 lea r24, ptr [r18+r14*2+0x38] +XDIS 24af2: MISC BASE D55E8D447339 lea r24, ptr [r19+r14*2+0x39] +XDIS 24af8: MISC BASE D55E8D44743A lea r24, ptr [r20+r14*2+0x3a] +XDIS 24afe: MISC BASE D55E8D44753B lea r24, ptr [r21+r14*2+0x3b] +XDIS 24b04: MISC BASE D55E8D44763C lea r24, ptr [r22+r14*2+0x3c] +XDIS 24b0a: MISC BASE D55E8D44773D lea r24, ptr [r23+r14*2+0x3d] +XDIS 24b10: MISC BASE D55F8D44703E lea r24, ptr [r24+r14*2+0x3e] +XDIS 24b16: MISC BASE D55F8D44713F lea r24, ptr [r25+r14*2+0x3f] +XDIS 24b1c: MISC BASE D55F8D447240 lea r24, ptr [r26+r14*2+0x40] +XDIS 24b22: MISC BASE D55F8D447341 lea r24, ptr [r27+r14*2+0x41] +XDIS 24b28: MISC BASE D55F8D447442 lea r24, ptr [r28+r14*2+0x42] +XDIS 24b2e: MISC BASE D55F8D447543 lea r24, ptr [r29+r14*2+0x43] +XDIS 24b34: MISC BASE D55F8D447644 lea r24, ptr [r30+r14*2+0x44] +XDIS 24b3a: MISC BASE D55F8D447745 lea r24, ptr [r31+r14*2+0x45] +XDIS 24b40: MISC BASE D54E8D447827 lea r24, ptr [rax+r15*2+0x27] +XDIS 24b46: MISC BASE D54E8D447928 lea r24, ptr [rcx+r15*2+0x28] +XDIS 24b4c: MISC BASE D54E8D447A29 lea r24, ptr [rdx+r15*2+0x29] +XDIS 24b52: MISC BASE D54E8D447B2A lea r24, ptr [rbx+r15*2+0x2a] +XDIS 24b58: MISC BASE D54E8D447C2B lea r24, ptr [rsp+r15*2+0x2b] +XDIS 24b5e: MISC BASE D54E8D447D2C lea r24, ptr [rbp+r15*2+0x2c] +XDIS 24b64: MISC BASE D54E8D447E2D lea r24, ptr [rsi+r15*2+0x2d] +XDIS 24b6a: MISC BASE D54E8D447F2E lea r24, ptr [rdi+r15*2+0x2e] +XDIS 24b70: MISC BASE D54F8D44782F lea r24, ptr [r8+r15*2+0x2f] +XDIS 24b76: MISC BASE D54F8D447930 lea r24, ptr [r9+r15*2+0x30] +XDIS 24b7c: MISC BASE D54F8D447A31 lea r24, ptr [r10+r15*2+0x31] +XDIS 24b82: MISC BASE D54F8D447B32 lea r24, ptr [r11+r15*2+0x32] +XDIS 24b88: MISC BASE D54F8D447C33 lea r24, ptr [r12+r15*2+0x33] +XDIS 24b8e: MISC BASE D54F8D447D34 lea r24, ptr [r13+r15*2+0x34] +XDIS 24b94: MISC BASE D54F8D447E35 lea r24, ptr [r14+r15*2+0x35] +XDIS 24b9a: MISC BASE D54F8D447F36 lea r24, ptr [r15+r15*2+0x36] +XDIS 24ba0: MISC BASE D55E8D447837 lea r24, ptr [r16+r15*2+0x37] +XDIS 24ba6: MISC BASE D55E8D447938 lea r24, ptr [r17+r15*2+0x38] +XDIS 24bac: MISC BASE D55E8D447A39 lea r24, ptr [r18+r15*2+0x39] +XDIS 24bb2: MISC BASE D55E8D447B3A lea r24, ptr [r19+r15*2+0x3a] +XDIS 24bb8: MISC BASE D55E8D447C3B lea r24, ptr [r20+r15*2+0x3b] +XDIS 24bbe: MISC BASE D55E8D447D3C lea r24, ptr [r21+r15*2+0x3c] +XDIS 24bc4: MISC BASE D55E8D447E3D lea r24, ptr [r22+r15*2+0x3d] +XDIS 24bca: MISC BASE D55E8D447F3E lea r24, ptr [r23+r15*2+0x3e] +XDIS 24bd0: MISC BASE D55F8D44783F lea r24, ptr [r24+r15*2+0x3f] +XDIS 24bd6: MISC BASE D55F8D447940 lea r24, ptr [r25+r15*2+0x40] +XDIS 24bdc: MISC BASE D55F8D447A41 lea r24, ptr [r26+r15*2+0x41] +XDIS 24be2: MISC BASE D55F8D447B42 lea r24, ptr [r27+r15*2+0x42] +XDIS 24be8: MISC BASE D55F8D447C43 lea r24, ptr [r28+r15*2+0x43] +XDIS 24bee: MISC BASE D55F8D447D44 lea r24, ptr [r29+r15*2+0x44] +XDIS 24bf4: MISC BASE D55F8D447E45 lea r24, ptr [r30+r15*2+0x45] +XDIS 24bfa: MISC BASE D55F8D447F46 lea r24, ptr [r31+r15*2+0x46] +XDIS 24c00: MISC BASE D56C8D444028 lea r24, ptr [rax+r16*2+0x28] +XDIS 24c06: MISC BASE D56C8D444129 lea r24, ptr [rcx+r16*2+0x29] +XDIS 24c0c: MISC BASE D56C8D44422A lea r24, ptr [rdx+r16*2+0x2a] +XDIS 24c12: MISC BASE D56C8D44432B lea r24, ptr [rbx+r16*2+0x2b] +XDIS 24c18: MISC BASE D56C8D44442C lea r24, ptr [rsp+r16*2+0x2c] +XDIS 24c1e: MISC BASE D56C8D44452D lea r24, ptr [rbp+r16*2+0x2d] +XDIS 24c24: MISC BASE D56C8D44462E lea r24, ptr [rsi+r16*2+0x2e] +XDIS 24c2a: MISC BASE D56C8D44472F lea r24, ptr [rdi+r16*2+0x2f] +XDIS 24c30: MISC BASE D56D8D444030 lea r24, ptr [r8+r16*2+0x30] +XDIS 24c36: MISC BASE D56D8D444131 lea r24, ptr [r9+r16*2+0x31] +XDIS 24c3c: MISC BASE D56D8D444232 lea r24, ptr [r10+r16*2+0x32] +XDIS 24c42: MISC BASE D56D8D444333 lea r24, ptr [r11+r16*2+0x33] +XDIS 24c48: MISC BASE D56D8D444434 lea r24, ptr [r12+r16*2+0x34] +XDIS 24c4e: MISC BASE D56D8D444535 lea r24, ptr [r13+r16*2+0x35] +XDIS 24c54: MISC BASE D56D8D444636 lea r24, ptr [r14+r16*2+0x36] +XDIS 24c5a: MISC BASE D56D8D444737 lea r24, ptr [r15+r16*2+0x37] +XDIS 24c60: MISC BASE D57C8D444038 lea r24, ptr [r16+r16*2+0x38] +XDIS 24c66: MISC BASE D57C8D444139 lea r24, ptr [r17+r16*2+0x39] +XDIS 24c6c: MISC BASE D57C8D44423A lea r24, ptr [r18+r16*2+0x3a] +XDIS 24c72: MISC BASE D57C8D44433B lea r24, ptr [r19+r16*2+0x3b] +XDIS 24c78: MISC BASE D57C8D44443C lea r24, ptr [r20+r16*2+0x3c] +XDIS 24c7e: MISC BASE D57C8D44453D lea r24, ptr [r21+r16*2+0x3d] +XDIS 24c84: MISC BASE D57C8D44463E lea r24, ptr [r22+r16*2+0x3e] +XDIS 24c8a: MISC BASE D57C8D44473F lea r24, ptr [r23+r16*2+0x3f] +XDIS 24c90: MISC BASE D57D8D444040 lea r24, ptr [r24+r16*2+0x40] +XDIS 24c96: MISC BASE D57D8D444141 lea r24, ptr [r25+r16*2+0x41] +XDIS 24c9c: MISC BASE D57D8D444242 lea r24, ptr [r26+r16*2+0x42] +XDIS 24ca2: MISC BASE D57D8D444343 lea r24, ptr [r27+r16*2+0x43] +XDIS 24ca8: MISC BASE D57D8D444444 lea r24, ptr [r28+r16*2+0x44] +XDIS 24cae: MISC BASE D57D8D444545 lea r24, ptr [r29+r16*2+0x45] +XDIS 24cb4: MISC BASE D57D8D444646 lea r24, ptr [r30+r16*2+0x46] +XDIS 24cba: MISC BASE D57D8D444747 lea r24, ptr [r31+r16*2+0x47] +XDIS 24cc0: MISC BASE D56C8D444829 lea r24, ptr [rax+r17*2+0x29] +XDIS 24cc6: MISC BASE D56C8D44492A lea r24, ptr [rcx+r17*2+0x2a] +XDIS 24ccc: MISC BASE D56C8D444A2B lea r24, ptr [rdx+r17*2+0x2b] +XDIS 24cd2: MISC BASE D56C8D444B2C lea r24, ptr [rbx+r17*2+0x2c] +XDIS 24cd8: MISC BASE D56C8D444C2D lea r24, ptr [rsp+r17*2+0x2d] +XDIS 24cde: MISC BASE D56C8D444D2E lea r24, ptr [rbp+r17*2+0x2e] +XDIS 24ce4: MISC BASE D56C8D444E2F lea r24, ptr [rsi+r17*2+0x2f] +XDIS 24cea: MISC BASE D56C8D444F30 lea r24, ptr [rdi+r17*2+0x30] +XDIS 24cf0: MISC BASE D56D8D444831 lea r24, ptr [r8+r17*2+0x31] +XDIS 24cf6: MISC BASE D56D8D444932 lea r24, ptr [r9+r17*2+0x32] +XDIS 24cfc: MISC BASE D56D8D444A33 lea r24, ptr [r10+r17*2+0x33] +XDIS 24d02: MISC BASE D56D8D444B34 lea r24, ptr [r11+r17*2+0x34] +XDIS 24d08: MISC BASE D56D8D444C35 lea r24, ptr [r12+r17*2+0x35] +XDIS 24d0e: MISC BASE D56D8D444D36 lea r24, ptr [r13+r17*2+0x36] +XDIS 24d14: MISC BASE D56D8D444E37 lea r24, ptr [r14+r17*2+0x37] +XDIS 24d1a: MISC BASE D56D8D444F38 lea r24, ptr [r15+r17*2+0x38] +XDIS 24d20: MISC BASE D57C8D444839 lea r24, ptr [r16+r17*2+0x39] +XDIS 24d26: MISC BASE D57C8D44493A lea r24, ptr [r17+r17*2+0x3a] +XDIS 24d2c: MISC BASE D57C8D444A3B lea r24, ptr [r18+r17*2+0x3b] +XDIS 24d32: MISC BASE D57C8D444B3C lea r24, ptr [r19+r17*2+0x3c] +XDIS 24d38: MISC BASE D57C8D444C3D lea r24, ptr [r20+r17*2+0x3d] +XDIS 24d3e: MISC BASE D57C8D444D3E lea r24, ptr [r21+r17*2+0x3e] +XDIS 24d44: MISC BASE D57C8D444E3F lea r24, ptr [r22+r17*2+0x3f] +XDIS 24d4a: MISC BASE D57C8D444F40 lea r24, ptr [r23+r17*2+0x40] +XDIS 24d50: MISC BASE D57D8D444841 lea r24, ptr [r24+r17*2+0x41] +XDIS 24d56: MISC BASE D57D8D444942 lea r24, ptr [r25+r17*2+0x42] +XDIS 24d5c: MISC BASE D57D8D444A43 lea r24, ptr [r26+r17*2+0x43] +XDIS 24d62: MISC BASE D57D8D444B44 lea r24, ptr [r27+r17*2+0x44] +XDIS 24d68: MISC BASE D57D8D444C45 lea r24, ptr [r28+r17*2+0x45] +XDIS 24d6e: MISC BASE D57D8D444D46 lea r24, ptr [r29+r17*2+0x46] +XDIS 24d74: MISC BASE D57D8D444E47 lea r24, ptr [r30+r17*2+0x47] +XDIS 24d7a: MISC BASE D57D8D444F48 lea r24, ptr [r31+r17*2+0x48] +XDIS 24d80: MISC BASE D56C8D44502A lea r24, ptr [rax+r18*2+0x2a] +XDIS 24d86: MISC BASE D56C8D44512B lea r24, ptr [rcx+r18*2+0x2b] +XDIS 24d8c: MISC BASE D56C8D44522C lea r24, ptr [rdx+r18*2+0x2c] +XDIS 24d92: MISC BASE D56C8D44532D lea r24, ptr [rbx+r18*2+0x2d] +XDIS 24d98: MISC BASE D56C8D44542E lea r24, ptr [rsp+r18*2+0x2e] +XDIS 24d9e: MISC BASE D56C8D44552F lea r24, ptr [rbp+r18*2+0x2f] +XDIS 24da4: MISC BASE D56C8D445630 lea r24, ptr [rsi+r18*2+0x30] +XDIS 24daa: MISC BASE D56C8D445731 lea r24, ptr [rdi+r18*2+0x31] +XDIS 24db0: MISC BASE D56D8D445032 lea r24, ptr [r8+r18*2+0x32] +XDIS 24db6: MISC BASE D56D8D445133 lea r24, ptr [r9+r18*2+0x33] +XDIS 24dbc: MISC BASE D56D8D445234 lea r24, ptr [r10+r18*2+0x34] +XDIS 24dc2: MISC BASE D56D8D445335 lea r24, ptr [r11+r18*2+0x35] +XDIS 24dc8: MISC BASE D56D8D445436 lea r24, ptr [r12+r18*2+0x36] +XDIS 24dce: MISC BASE D56D8D445537 lea r24, ptr [r13+r18*2+0x37] +XDIS 24dd4: MISC BASE D56D8D445638 lea r24, ptr [r14+r18*2+0x38] +XDIS 24dda: MISC BASE D56D8D445739 lea r24, ptr [r15+r18*2+0x39] +XDIS 24de0: MISC BASE D57C8D44503A lea r24, ptr [r16+r18*2+0x3a] +XDIS 24de6: MISC BASE D57C8D44513B lea r24, ptr [r17+r18*2+0x3b] +XDIS 24dec: MISC BASE D57C8D44523C lea r24, ptr [r18+r18*2+0x3c] +XDIS 24df2: MISC BASE D57C8D44533D lea r24, ptr [r19+r18*2+0x3d] +XDIS 24df8: MISC BASE D57C8D44543E lea r24, ptr [r20+r18*2+0x3e] +XDIS 24dfe: MISC BASE D57C8D44553F lea r24, ptr [r21+r18*2+0x3f] +XDIS 24e04: MISC BASE D57C8D445640 lea r24, ptr [r22+r18*2+0x40] +XDIS 24e0a: MISC BASE D57C8D445741 lea r24, ptr [r23+r18*2+0x41] +XDIS 24e10: MISC BASE D57D8D445042 lea r24, ptr [r24+r18*2+0x42] +XDIS 24e16: MISC BASE D57D8D445143 lea r24, ptr [r25+r18*2+0x43] +XDIS 24e1c: MISC BASE D57D8D445244 lea r24, ptr [r26+r18*2+0x44] +XDIS 24e22: MISC BASE D57D8D445345 lea r24, ptr [r27+r18*2+0x45] +XDIS 24e28: MISC BASE D57D8D445446 lea r24, ptr [r28+r18*2+0x46] +XDIS 24e2e: MISC BASE D57D8D445547 lea r24, ptr [r29+r18*2+0x47] +XDIS 24e34: MISC BASE D57D8D445648 lea r24, ptr [r30+r18*2+0x48] +XDIS 24e3a: MISC BASE D57D8D445749 lea r24, ptr [r31+r18*2+0x49] +XDIS 24e40: MISC BASE D56C8D44582B lea r24, ptr [rax+r19*2+0x2b] +XDIS 24e46: MISC BASE D56C8D44592C lea r24, ptr [rcx+r19*2+0x2c] +XDIS 24e4c: MISC BASE D56C8D445A2D lea r24, ptr [rdx+r19*2+0x2d] +XDIS 24e52: MISC BASE D56C8D445B2E lea r24, ptr [rbx+r19*2+0x2e] +XDIS 24e58: MISC BASE D56C8D445C2F lea r24, ptr [rsp+r19*2+0x2f] +XDIS 24e5e: MISC BASE D56C8D445D30 lea r24, ptr [rbp+r19*2+0x30] +XDIS 24e64: MISC BASE D56C8D445E31 lea r24, ptr [rsi+r19*2+0x31] +XDIS 24e6a: MISC BASE D56C8D445F32 lea r24, ptr [rdi+r19*2+0x32] +XDIS 24e70: MISC BASE D56D8D445833 lea r24, ptr [r8+r19*2+0x33] +XDIS 24e76: MISC BASE D56D8D445934 lea r24, ptr [r9+r19*2+0x34] +XDIS 24e7c: MISC BASE D56D8D445A35 lea r24, ptr [r10+r19*2+0x35] +XDIS 24e82: MISC BASE D56D8D445B36 lea r24, ptr [r11+r19*2+0x36] +XDIS 24e88: MISC BASE D56D8D445C37 lea r24, ptr [r12+r19*2+0x37] +XDIS 24e8e: MISC BASE D56D8D445D38 lea r24, ptr [r13+r19*2+0x38] +XDIS 24e94: MISC BASE D56D8D445E39 lea r24, ptr [r14+r19*2+0x39] +XDIS 24e9a: MISC BASE D56D8D445F3A lea r24, ptr [r15+r19*2+0x3a] +XDIS 24ea0: MISC BASE D57C8D44583B lea r24, ptr [r16+r19*2+0x3b] +XDIS 24ea6: MISC BASE D57C8D44593C lea r24, ptr [r17+r19*2+0x3c] +XDIS 24eac: MISC BASE D57C8D445A3D lea r24, ptr [r18+r19*2+0x3d] +XDIS 24eb2: MISC BASE D57C8D445B3E lea r24, ptr [r19+r19*2+0x3e] +XDIS 24eb8: MISC BASE D57C8D445C3F lea r24, ptr [r20+r19*2+0x3f] +XDIS 24ebe: MISC BASE D57C8D445D40 lea r24, ptr [r21+r19*2+0x40] +XDIS 24ec4: MISC BASE D57C8D445E41 lea r24, ptr [r22+r19*2+0x41] +XDIS 24eca: MISC BASE D57C8D445F42 lea r24, ptr [r23+r19*2+0x42] +XDIS 24ed0: MISC BASE D57D8D445843 lea r24, ptr [r24+r19*2+0x43] +XDIS 24ed6: MISC BASE D57D8D445944 lea r24, ptr [r25+r19*2+0x44] +XDIS 24edc: MISC BASE D57D8D445A45 lea r24, ptr [r26+r19*2+0x45] +XDIS 24ee2: MISC BASE D57D8D445B46 lea r24, ptr [r27+r19*2+0x46] +XDIS 24ee8: MISC BASE D57D8D445C47 lea r24, ptr [r28+r19*2+0x47] +XDIS 24eee: MISC BASE D57D8D445D48 lea r24, ptr [r29+r19*2+0x48] +XDIS 24ef4: MISC BASE D57D8D445E49 lea r24, ptr [r30+r19*2+0x49] +XDIS 24efa: MISC BASE D57D8D445F4A lea r24, ptr [r31+r19*2+0x4a] +XDIS 24f00: MISC BASE D56C8D44602C lea r24, ptr [rax+r20*2+0x2c] +XDIS 24f06: MISC BASE D56C8D44612D lea r24, ptr [rcx+r20*2+0x2d] +XDIS 24f0c: MISC BASE D56C8D44622E lea r24, ptr [rdx+r20*2+0x2e] +XDIS 24f12: MISC BASE D56C8D44632F lea r24, ptr [rbx+r20*2+0x2f] +XDIS 24f18: MISC BASE D56C8D446430 lea r24, ptr [rsp+r20*2+0x30] +XDIS 24f1e: MISC BASE D56C8D446531 lea r24, ptr [rbp+r20*2+0x31] +XDIS 24f24: MISC BASE D56C8D446632 lea r24, ptr [rsi+r20*2+0x32] +XDIS 24f2a: MISC BASE D56C8D446733 lea r24, ptr [rdi+r20*2+0x33] +XDIS 24f30: MISC BASE D56D8D446034 lea r24, ptr [r8+r20*2+0x34] +XDIS 24f36: MISC BASE D56D8D446135 lea r24, ptr [r9+r20*2+0x35] +XDIS 24f3c: MISC BASE D56D8D446236 lea r24, ptr [r10+r20*2+0x36] +XDIS 24f42: MISC BASE D56D8D446337 lea r24, ptr [r11+r20*2+0x37] +XDIS 24f48: MISC BASE D56D8D446438 lea r24, ptr [r12+r20*2+0x38] +XDIS 24f4e: MISC BASE D56D8D446539 lea r24, ptr [r13+r20*2+0x39] +XDIS 24f54: MISC BASE D56D8D44663A lea r24, ptr [r14+r20*2+0x3a] +XDIS 24f5a: MISC BASE D56D8D44673B lea r24, ptr [r15+r20*2+0x3b] +XDIS 24f60: MISC BASE D57C8D44603C lea r24, ptr [r16+r20*2+0x3c] +XDIS 24f66: MISC BASE D57C8D44613D lea r24, ptr [r17+r20*2+0x3d] +XDIS 24f6c: MISC BASE D57C8D44623E lea r24, ptr [r18+r20*2+0x3e] +XDIS 24f72: MISC BASE D57C8D44633F lea r24, ptr [r19+r20*2+0x3f] +XDIS 24f78: MISC BASE D57C8D446440 lea r24, ptr [r20+r20*2+0x40] +XDIS 24f7e: MISC BASE D57C8D446541 lea r24, ptr [r21+r20*2+0x41] +XDIS 24f84: MISC BASE D57C8D446642 lea r24, ptr [r22+r20*2+0x42] +XDIS 24f8a: MISC BASE D57C8D446743 lea r24, ptr [r23+r20*2+0x43] +XDIS 24f90: MISC BASE D57D8D446044 lea r24, ptr [r24+r20*2+0x44] +XDIS 24f96: MISC BASE D57D8D446145 lea r24, ptr [r25+r20*2+0x45] +XDIS 24f9c: MISC BASE D57D8D446246 lea r24, ptr [r26+r20*2+0x46] +XDIS 24fa2: MISC BASE D57D8D446347 lea r24, ptr [r27+r20*2+0x47] +XDIS 24fa8: MISC BASE D57D8D446448 lea r24, ptr [r28+r20*2+0x48] +XDIS 24fae: MISC BASE D57D8D446549 lea r24, ptr [r29+r20*2+0x49] +XDIS 24fb4: MISC BASE D57D8D44664A lea r24, ptr [r30+r20*2+0x4a] +XDIS 24fba: MISC BASE D57D8D44674B lea r24, ptr [r31+r20*2+0x4b] +XDIS 24fc0: MISC BASE D56C8D44682D lea r24, ptr [rax+r21*2+0x2d] +XDIS 24fc6: MISC BASE D56C8D44692E lea r24, ptr [rcx+r21*2+0x2e] +XDIS 24fcc: MISC BASE D56C8D446A2F lea r24, ptr [rdx+r21*2+0x2f] +XDIS 24fd2: MISC BASE D56C8D446B30 lea r24, ptr [rbx+r21*2+0x30] +XDIS 24fd8: MISC BASE D56C8D446C31 lea r24, ptr [rsp+r21*2+0x31] +XDIS 24fde: MISC BASE D56C8D446D32 lea r24, ptr [rbp+r21*2+0x32] +XDIS 24fe4: MISC BASE D56C8D446E33 lea r24, ptr [rsi+r21*2+0x33] +XDIS 24fea: MISC BASE D56C8D446F34 lea r24, ptr [rdi+r21*2+0x34] +XDIS 24ff0: MISC BASE D56D8D446835 lea r24, ptr [r8+r21*2+0x35] +XDIS 24ff6: MISC BASE D56D8D446936 lea r24, ptr [r9+r21*2+0x36] +XDIS 24ffc: MISC BASE D56D8D446A37 lea r24, ptr [r10+r21*2+0x37] +XDIS 25002: MISC BASE D56D8D446B38 lea r24, ptr [r11+r21*2+0x38] +XDIS 25008: MISC BASE D56D8D446C39 lea r24, ptr [r12+r21*2+0x39] +XDIS 2500e: MISC BASE D56D8D446D3A lea r24, ptr [r13+r21*2+0x3a] +XDIS 25014: MISC BASE D56D8D446E3B lea r24, ptr [r14+r21*2+0x3b] +XDIS 2501a: MISC BASE D56D8D446F3C lea r24, ptr [r15+r21*2+0x3c] +XDIS 25020: MISC BASE D57C8D44683D lea r24, ptr [r16+r21*2+0x3d] +XDIS 25026: MISC BASE D57C8D44693E lea r24, ptr [r17+r21*2+0x3e] +XDIS 2502c: MISC BASE D57C8D446A3F lea r24, ptr [r18+r21*2+0x3f] +XDIS 25032: MISC BASE D57C8D446B40 lea r24, ptr [r19+r21*2+0x40] +XDIS 25038: MISC BASE D57C8D446C41 lea r24, ptr [r20+r21*2+0x41] +XDIS 2503e: MISC BASE D57C8D446D42 lea r24, ptr [r21+r21*2+0x42] +XDIS 25044: MISC BASE D57C8D446E43 lea r24, ptr [r22+r21*2+0x43] +XDIS 2504a: MISC BASE D57C8D446F44 lea r24, ptr [r23+r21*2+0x44] +XDIS 25050: MISC BASE D57D8D446845 lea r24, ptr [r24+r21*2+0x45] +XDIS 25056: MISC BASE D57D8D446946 lea r24, ptr [r25+r21*2+0x46] +XDIS 2505c: MISC BASE D57D8D446A47 lea r24, ptr [r26+r21*2+0x47] +XDIS 25062: MISC BASE D57D8D446B48 lea r24, ptr [r27+r21*2+0x48] +XDIS 25068: MISC BASE D57D8D446C49 lea r24, ptr [r28+r21*2+0x49] +XDIS 2506e: MISC BASE D57D8D446D4A lea r24, ptr [r29+r21*2+0x4a] +XDIS 25074: MISC BASE D57D8D446E4B lea r24, ptr [r30+r21*2+0x4b] +XDIS 2507a: MISC BASE D57D8D446F4C lea r24, ptr [r31+r21*2+0x4c] +XDIS 25080: MISC BASE D56C8D44702E lea r24, ptr [rax+r22*2+0x2e] +XDIS 25086: MISC BASE D56C8D44712F lea r24, ptr [rcx+r22*2+0x2f] +XDIS 2508c: MISC BASE D56C8D447230 lea r24, ptr [rdx+r22*2+0x30] +XDIS 25092: MISC BASE D56C8D447331 lea r24, ptr [rbx+r22*2+0x31] +XDIS 25098: MISC BASE D56C8D447432 lea r24, ptr [rsp+r22*2+0x32] +XDIS 2509e: MISC BASE D56C8D447533 lea r24, ptr [rbp+r22*2+0x33] +XDIS 250a4: MISC BASE D56C8D447634 lea r24, ptr [rsi+r22*2+0x34] +XDIS 250aa: MISC BASE D56C8D447735 lea r24, ptr [rdi+r22*2+0x35] +XDIS 250b0: MISC BASE D56D8D447036 lea r24, ptr [r8+r22*2+0x36] +XDIS 250b6: MISC BASE D56D8D447137 lea r24, ptr [r9+r22*2+0x37] +XDIS 250bc: MISC BASE D56D8D447238 lea r24, ptr [r10+r22*2+0x38] +XDIS 250c2: MISC BASE D56D8D447339 lea r24, ptr [r11+r22*2+0x39] +XDIS 250c8: MISC BASE D56D8D44743A lea r24, ptr [r12+r22*2+0x3a] +XDIS 250ce: MISC BASE D56D8D44753B lea r24, ptr [r13+r22*2+0x3b] +XDIS 250d4: MISC BASE D56D8D44763C lea r24, ptr [r14+r22*2+0x3c] +XDIS 250da: MISC BASE D56D8D44773D lea r24, ptr [r15+r22*2+0x3d] +XDIS 250e0: MISC BASE D57C8D44703E lea r24, ptr [r16+r22*2+0x3e] +XDIS 250e6: MISC BASE D57C8D44713F lea r24, ptr [r17+r22*2+0x3f] +XDIS 250ec: MISC BASE D57C8D447240 lea r24, ptr [r18+r22*2+0x40] +XDIS 250f2: MISC BASE D57C8D447341 lea r24, ptr [r19+r22*2+0x41] +XDIS 250f8: MISC BASE D57C8D447442 lea r24, ptr [r20+r22*2+0x42] +XDIS 250fe: MISC BASE D57C8D447543 lea r24, ptr [r21+r22*2+0x43] +XDIS 25104: MISC BASE D57C8D447644 lea r24, ptr [r22+r22*2+0x44] +XDIS 2510a: MISC BASE D57C8D447745 lea r24, ptr [r23+r22*2+0x45] +XDIS 25110: MISC BASE D57D8D447046 lea r24, ptr [r24+r22*2+0x46] +XDIS 25116: MISC BASE D57D8D447147 lea r24, ptr [r25+r22*2+0x47] +XDIS 2511c: MISC BASE D57D8D447248 lea r24, ptr [r26+r22*2+0x48] +XDIS 25122: MISC BASE D57D8D447349 lea r24, ptr [r27+r22*2+0x49] +XDIS 25128: MISC BASE D57D8D44744A lea r24, ptr [r28+r22*2+0x4a] +XDIS 2512e: MISC BASE D57D8D44754B lea r24, ptr [r29+r22*2+0x4b] +XDIS 25134: MISC BASE D57D8D44764C lea r24, ptr [r30+r22*2+0x4c] +XDIS 2513a: MISC BASE D57D8D44774D lea r24, ptr [r31+r22*2+0x4d] +XDIS 25140: MISC BASE D56C8D44782F lea r24, ptr [rax+r23*2+0x2f] +XDIS 25146: MISC BASE D56C8D447930 lea r24, ptr [rcx+r23*2+0x30] +XDIS 2514c: MISC BASE D56C8D447A31 lea r24, ptr [rdx+r23*2+0x31] +XDIS 25152: MISC BASE D56C8D447B32 lea r24, ptr [rbx+r23*2+0x32] +XDIS 25158: MISC BASE D56C8D447C33 lea r24, ptr [rsp+r23*2+0x33] +XDIS 2515e: MISC BASE D56C8D447D34 lea r24, ptr [rbp+r23*2+0x34] +XDIS 25164: MISC BASE D56C8D447E35 lea r24, ptr [rsi+r23*2+0x35] +XDIS 2516a: MISC BASE D56C8D447F36 lea r24, ptr [rdi+r23*2+0x36] +XDIS 25170: MISC BASE D56D8D447837 lea r24, ptr [r8+r23*2+0x37] +XDIS 25176: MISC BASE D56D8D447938 lea r24, ptr [r9+r23*2+0x38] +XDIS 2517c: MISC BASE D56D8D447A39 lea r24, ptr [r10+r23*2+0x39] +XDIS 25182: MISC BASE D56D8D447B3A lea r24, ptr [r11+r23*2+0x3a] +XDIS 25188: MISC BASE D56D8D447C3B lea r24, ptr [r12+r23*2+0x3b] +XDIS 2518e: MISC BASE D56D8D447D3C lea r24, ptr [r13+r23*2+0x3c] +XDIS 25194: MISC BASE D56D8D447E3D lea r24, ptr [r14+r23*2+0x3d] +XDIS 2519a: MISC BASE D56D8D447F3E lea r24, ptr [r15+r23*2+0x3e] +XDIS 251a0: MISC BASE D57C8D44783F lea r24, ptr [r16+r23*2+0x3f] +XDIS 251a6: MISC BASE D57C8D447940 lea r24, ptr [r17+r23*2+0x40] +XDIS 251ac: MISC BASE D57C8D447A41 lea r24, ptr [r18+r23*2+0x41] +XDIS 251b2: MISC BASE D57C8D447B42 lea r24, ptr [r19+r23*2+0x42] +XDIS 251b8: MISC BASE D57C8D447C43 lea r24, ptr [r20+r23*2+0x43] +XDIS 251be: MISC BASE D57C8D447D44 lea r24, ptr [r21+r23*2+0x44] +XDIS 251c4: MISC BASE D57C8D447E45 lea r24, ptr [r22+r23*2+0x45] +XDIS 251ca: MISC BASE D57C8D447F46 lea r24, ptr [r23+r23*2+0x46] +XDIS 251d0: MISC BASE D57D8D447847 lea r24, ptr [r24+r23*2+0x47] +XDIS 251d6: MISC BASE D57D8D447948 lea r24, ptr [r25+r23*2+0x48] +XDIS 251dc: MISC BASE D57D8D447A49 lea r24, ptr [r26+r23*2+0x49] +XDIS 251e2: MISC BASE D57D8D447B4A lea r24, ptr [r27+r23*2+0x4a] +XDIS 251e8: MISC BASE D57D8D447C4B lea r24, ptr [r28+r23*2+0x4b] +XDIS 251ee: MISC BASE D57D8D447D4C lea r24, ptr [r29+r23*2+0x4c] +XDIS 251f4: MISC BASE D57D8D447E4D lea r24, ptr [r30+r23*2+0x4d] +XDIS 251fa: MISC BASE D57D8D447F4E lea r24, ptr [r31+r23*2+0x4e] +XDIS 25200: MISC BASE D56E8D444030 lea r24, ptr [rax+r24*2+0x30] +XDIS 25206: MISC BASE D56E8D444131 lea r24, ptr [rcx+r24*2+0x31] +XDIS 2520c: MISC BASE D56E8D444232 lea r24, ptr [rdx+r24*2+0x32] +XDIS 25212: MISC BASE D56E8D444333 lea r24, ptr [rbx+r24*2+0x33] +XDIS 25218: MISC BASE D56E8D444434 lea r24, ptr [rsp+r24*2+0x34] +XDIS 2521e: MISC BASE D56E8D444535 lea r24, ptr [rbp+r24*2+0x35] +XDIS 25224: MISC BASE D56E8D444636 lea r24, ptr [rsi+r24*2+0x36] +XDIS 2522a: MISC BASE D56E8D444737 lea r24, ptr [rdi+r24*2+0x37] +XDIS 25230: MISC BASE D56F8D444038 lea r24, ptr [r8+r24*2+0x38] +XDIS 25236: MISC BASE D56F8D444139 lea r24, ptr [r9+r24*2+0x39] +XDIS 2523c: MISC BASE D56F8D44423A lea r24, ptr [r10+r24*2+0x3a] +XDIS 25242: MISC BASE D56F8D44433B lea r24, ptr [r11+r24*2+0x3b] +XDIS 25248: MISC BASE D56F8D44443C lea r24, ptr [r12+r24*2+0x3c] +XDIS 2524e: MISC BASE D56F8D44453D lea r24, ptr [r13+r24*2+0x3d] +XDIS 25254: MISC BASE D56F8D44463E lea r24, ptr [r14+r24*2+0x3e] +XDIS 2525a: MISC BASE D56F8D44473F lea r24, ptr [r15+r24*2+0x3f] +XDIS 25260: MISC BASE D57E8D444040 lea r24, ptr [r16+r24*2+0x40] +XDIS 25266: MISC BASE D57E8D444141 lea r24, ptr [r17+r24*2+0x41] +XDIS 2526c: MISC BASE D57E8D444242 lea r24, ptr [r18+r24*2+0x42] +XDIS 25272: MISC BASE D57E8D444343 lea r24, ptr [r19+r24*2+0x43] +XDIS 25278: MISC BASE D57E8D444444 lea r24, ptr [r20+r24*2+0x44] +XDIS 2527e: MISC BASE D57E8D444545 lea r24, ptr [r21+r24*2+0x45] +XDIS 25284: MISC BASE D57E8D444646 lea r24, ptr [r22+r24*2+0x46] +XDIS 2528a: MISC BASE D57E8D444747 lea r24, ptr [r23+r24*2+0x47] +XDIS 25290: MISC BASE D57F8D444048 lea r24, ptr [r24+r24*2+0x48] +XDIS 25296: MISC BASE D57F8D444149 lea r24, ptr [r25+r24*2+0x49] +XDIS 2529c: MISC BASE D57F8D44424A lea r24, ptr [r26+r24*2+0x4a] +XDIS 252a2: MISC BASE D57F8D44434B lea r24, ptr [r27+r24*2+0x4b] +XDIS 252a8: MISC BASE D57F8D44444C lea r24, ptr [r28+r24*2+0x4c] +XDIS 252ae: MISC BASE D57F8D44454D lea r24, ptr [r29+r24*2+0x4d] +XDIS 252b4: MISC BASE D57F8D44464E lea r24, ptr [r30+r24*2+0x4e] +XDIS 252ba: MISC BASE D57F8D44474F lea r24, ptr [r31+r24*2+0x4f] +XDIS 252c0: MISC BASE D56E8D444831 lea r24, ptr [rax+r25*2+0x31] +XDIS 252c6: MISC BASE D56E8D444932 lea r24, ptr [rcx+r25*2+0x32] +XDIS 252cc: MISC BASE D56E8D444A33 lea r24, ptr [rdx+r25*2+0x33] +XDIS 252d2: MISC BASE D56E8D444B34 lea r24, ptr [rbx+r25*2+0x34] +XDIS 252d8: MISC BASE D56E8D444C35 lea r24, ptr [rsp+r25*2+0x35] +XDIS 252de: MISC BASE D56E8D444D36 lea r24, ptr [rbp+r25*2+0x36] +XDIS 252e4: MISC BASE D56E8D444E37 lea r24, ptr [rsi+r25*2+0x37] +XDIS 252ea: MISC BASE D56E8D444F38 lea r24, ptr [rdi+r25*2+0x38] +XDIS 252f0: MISC BASE D56F8D444839 lea r24, ptr [r8+r25*2+0x39] +XDIS 252f6: MISC BASE D56F8D44493A lea r24, ptr [r9+r25*2+0x3a] +XDIS 252fc: MISC BASE D56F8D444A3B lea r24, ptr [r10+r25*2+0x3b] +XDIS 25302: MISC BASE D56F8D444B3C lea r24, ptr [r11+r25*2+0x3c] +XDIS 25308: MISC BASE D56F8D444C3D lea r24, ptr [r12+r25*2+0x3d] +XDIS 2530e: MISC BASE D56F8D444D3E lea r24, ptr [r13+r25*2+0x3e] +XDIS 25314: MISC BASE D56F8D444E3F lea r24, ptr [r14+r25*2+0x3f] +XDIS 2531a: MISC BASE D56F8D444F40 lea r24, ptr [r15+r25*2+0x40] +XDIS 25320: MISC BASE D57E8D444841 lea r24, ptr [r16+r25*2+0x41] +XDIS 25326: MISC BASE D57E8D444942 lea r24, ptr [r17+r25*2+0x42] +XDIS 2532c: MISC BASE D57E8D444A43 lea r24, ptr [r18+r25*2+0x43] +XDIS 25332: MISC BASE D57E8D444B44 lea r24, ptr [r19+r25*2+0x44] +XDIS 25338: MISC BASE D57E8D444C45 lea r24, ptr [r20+r25*2+0x45] +XDIS 2533e: MISC BASE D57E8D444D46 lea r24, ptr [r21+r25*2+0x46] +XDIS 25344: MISC BASE D57E8D444E47 lea r24, ptr [r22+r25*2+0x47] +XDIS 2534a: MISC BASE D57E8D444F48 lea r24, ptr [r23+r25*2+0x48] +XDIS 25350: MISC BASE D57F8D444849 lea r24, ptr [r24+r25*2+0x49] +XDIS 25356: MISC BASE D57F8D44494A lea r24, ptr [r25+r25*2+0x4a] +XDIS 2535c: MISC BASE D57F8D444A4B lea r24, ptr [r26+r25*2+0x4b] +XDIS 25362: MISC BASE D57F8D444B4C lea r24, ptr [r27+r25*2+0x4c] +XDIS 25368: MISC BASE D57F8D444C4D lea r24, ptr [r28+r25*2+0x4d] +XDIS 2536e: MISC BASE D57F8D444D4E lea r24, ptr [r29+r25*2+0x4e] +XDIS 25374: MISC BASE D57F8D444E4F lea r24, ptr [r30+r25*2+0x4f] +XDIS 2537a: MISC BASE D57F8D444F50 lea r24, ptr [r31+r25*2+0x50] +XDIS 25380: MISC BASE D56E8D445032 lea r24, ptr [rax+r26*2+0x32] +XDIS 25386: MISC BASE D56E8D445133 lea r24, ptr [rcx+r26*2+0x33] +XDIS 2538c: MISC BASE D56E8D445234 lea r24, ptr [rdx+r26*2+0x34] +XDIS 25392: MISC BASE D56E8D445335 lea r24, ptr [rbx+r26*2+0x35] +XDIS 25398: MISC BASE D56E8D445436 lea r24, ptr [rsp+r26*2+0x36] +XDIS 2539e: MISC BASE D56E8D445537 lea r24, ptr [rbp+r26*2+0x37] +XDIS 253a4: MISC BASE D56E8D445638 lea r24, ptr [rsi+r26*2+0x38] +XDIS 253aa: MISC BASE D56E8D445739 lea r24, ptr [rdi+r26*2+0x39] +XDIS 253b0: MISC BASE D56F8D44503A lea r24, ptr [r8+r26*2+0x3a] +XDIS 253b6: MISC BASE D56F8D44513B lea r24, ptr [r9+r26*2+0x3b] +XDIS 253bc: MISC BASE D56F8D44523C lea r24, ptr [r10+r26*2+0x3c] +XDIS 253c2: MISC BASE D56F8D44533D lea r24, ptr [r11+r26*2+0x3d] +XDIS 253c8: MISC BASE D56F8D44543E lea r24, ptr [r12+r26*2+0x3e] +XDIS 253ce: MISC BASE D56F8D44553F lea r24, ptr [r13+r26*2+0x3f] +XDIS 253d4: MISC BASE D56F8D445640 lea r24, ptr [r14+r26*2+0x40] +XDIS 253da: MISC BASE D56F8D445741 lea r24, ptr [r15+r26*2+0x41] +XDIS 253e0: MISC BASE D57E8D445042 lea r24, ptr [r16+r26*2+0x42] +XDIS 253e6: MISC BASE D57E8D445143 lea r24, ptr [r17+r26*2+0x43] +XDIS 253ec: MISC BASE D57E8D445244 lea r24, ptr [r18+r26*2+0x44] +XDIS 253f2: MISC BASE D57E8D445345 lea r24, ptr [r19+r26*2+0x45] +XDIS 253f8: MISC BASE D57E8D445446 lea r24, ptr [r20+r26*2+0x46] +XDIS 253fe: MISC BASE D57E8D445547 lea r24, ptr [r21+r26*2+0x47] +XDIS 25404: MISC BASE D57E8D445648 lea r24, ptr [r22+r26*2+0x48] +XDIS 2540a: MISC BASE D57E8D445749 lea r24, ptr [r23+r26*2+0x49] +XDIS 25410: MISC BASE D57F8D44504A lea r24, ptr [r24+r26*2+0x4a] +XDIS 25416: MISC BASE D57F8D44514B lea r24, ptr [r25+r26*2+0x4b] +XDIS 2541c: MISC BASE D57F8D44524C lea r24, ptr [r26+r26*2+0x4c] +XDIS 25422: MISC BASE D57F8D44534D lea r24, ptr [r27+r26*2+0x4d] +XDIS 25428: MISC BASE D57F8D44544E lea r24, ptr [r28+r26*2+0x4e] +XDIS 2542e: MISC BASE D57F8D44554F lea r24, ptr [r29+r26*2+0x4f] +XDIS 25434: MISC BASE D57F8D445650 lea r24, ptr [r30+r26*2+0x50] +XDIS 2543a: MISC BASE D57F8D445751 lea r24, ptr [r31+r26*2+0x51] +XDIS 25440: MISC BASE D56E8D445833 lea r24, ptr [rax+r27*2+0x33] +XDIS 25446: MISC BASE D56E8D445934 lea r24, ptr [rcx+r27*2+0x34] +XDIS 2544c: MISC BASE D56E8D445A35 lea r24, ptr [rdx+r27*2+0x35] +XDIS 25452: MISC BASE D56E8D445B36 lea r24, ptr [rbx+r27*2+0x36] +XDIS 25458: MISC BASE D56E8D445C37 lea r24, ptr [rsp+r27*2+0x37] +XDIS 2545e: MISC BASE D56E8D445D38 lea r24, ptr [rbp+r27*2+0x38] +XDIS 25464: MISC BASE D56E8D445E39 lea r24, ptr [rsi+r27*2+0x39] +XDIS 2546a: MISC BASE D56E8D445F3A lea r24, ptr [rdi+r27*2+0x3a] +XDIS 25470: MISC BASE D56F8D44583B lea r24, ptr [r8+r27*2+0x3b] +XDIS 25476: MISC BASE D56F8D44593C lea r24, ptr [r9+r27*2+0x3c] +XDIS 2547c: MISC BASE D56F8D445A3D lea r24, ptr [r10+r27*2+0x3d] +XDIS 25482: MISC BASE D56F8D445B3E lea r24, ptr [r11+r27*2+0x3e] +XDIS 25488: MISC BASE D56F8D445C3F lea r24, ptr [r12+r27*2+0x3f] +XDIS 2548e: MISC BASE D56F8D445D40 lea r24, ptr [r13+r27*2+0x40] +XDIS 25494: MISC BASE D56F8D445E41 lea r24, ptr [r14+r27*2+0x41] +XDIS 2549a: MISC BASE D56F8D445F42 lea r24, ptr [r15+r27*2+0x42] +XDIS 254a0: MISC BASE D57E8D445843 lea r24, ptr [r16+r27*2+0x43] +XDIS 254a6: MISC BASE D57E8D445944 lea r24, ptr [r17+r27*2+0x44] +XDIS 254ac: MISC BASE D57E8D445A45 lea r24, ptr [r18+r27*2+0x45] +XDIS 254b2: MISC BASE D57E8D445B46 lea r24, ptr [r19+r27*2+0x46] +XDIS 254b8: MISC BASE D57E8D445C47 lea r24, ptr [r20+r27*2+0x47] +XDIS 254be: MISC BASE D57E8D445D48 lea r24, ptr [r21+r27*2+0x48] +XDIS 254c4: MISC BASE D57E8D445E49 lea r24, ptr [r22+r27*2+0x49] +XDIS 254ca: MISC BASE D57E8D445F4A lea r24, ptr [r23+r27*2+0x4a] +XDIS 254d0: MISC BASE D57F8D44584B lea r24, ptr [r24+r27*2+0x4b] +XDIS 254d6: MISC BASE D57F8D44594C lea r24, ptr [r25+r27*2+0x4c] +XDIS 254dc: MISC BASE D57F8D445A4D lea r24, ptr [r26+r27*2+0x4d] +XDIS 254e2: MISC BASE D57F8D445B4E lea r24, ptr [r27+r27*2+0x4e] +XDIS 254e8: MISC BASE D57F8D445C4F lea r24, ptr [r28+r27*2+0x4f] +XDIS 254ee: MISC BASE D57F8D445D50 lea r24, ptr [r29+r27*2+0x50] +XDIS 254f4: MISC BASE D57F8D445E51 lea r24, ptr [r30+r27*2+0x51] +XDIS 254fa: MISC BASE D57F8D445F52 lea r24, ptr [r31+r27*2+0x52] +XDIS 25500: MISC BASE D56E8D446034 lea r24, ptr [rax+r28*2+0x34] +XDIS 25506: MISC BASE D56E8D446135 lea r24, ptr [rcx+r28*2+0x35] +XDIS 2550c: MISC BASE D56E8D446236 lea r24, ptr [rdx+r28*2+0x36] +XDIS 25512: MISC BASE D56E8D446337 lea r24, ptr [rbx+r28*2+0x37] +XDIS 25518: MISC BASE D56E8D446438 lea r24, ptr [rsp+r28*2+0x38] +XDIS 2551e: MISC BASE D56E8D446539 lea r24, ptr [rbp+r28*2+0x39] +XDIS 25524: MISC BASE D56E8D44663A lea r24, ptr [rsi+r28*2+0x3a] +XDIS 2552a: MISC BASE D56E8D44673B lea r24, ptr [rdi+r28*2+0x3b] +XDIS 25530: MISC BASE D56F8D44603C lea r24, ptr [r8+r28*2+0x3c] +XDIS 25536: MISC BASE D56F8D44613D lea r24, ptr [r9+r28*2+0x3d] +XDIS 2553c: MISC BASE D56F8D44623E lea r24, ptr [r10+r28*2+0x3e] +XDIS 25542: MISC BASE D56F8D44633F lea r24, ptr [r11+r28*2+0x3f] +XDIS 25548: MISC BASE D56F8D446440 lea r24, ptr [r12+r28*2+0x40] +XDIS 2554e: MISC BASE D56F8D446541 lea r24, ptr [r13+r28*2+0x41] +XDIS 25554: MISC BASE D56F8D446642 lea r24, ptr [r14+r28*2+0x42] +XDIS 2555a: MISC BASE D56F8D446743 lea r24, ptr [r15+r28*2+0x43] +XDIS 25560: MISC BASE D57E8D446044 lea r24, ptr [r16+r28*2+0x44] +XDIS 25566: MISC BASE D57E8D446145 lea r24, ptr [r17+r28*2+0x45] +XDIS 2556c: MISC BASE D57E8D446246 lea r24, ptr [r18+r28*2+0x46] +XDIS 25572: MISC BASE D57E8D446347 lea r24, ptr [r19+r28*2+0x47] +XDIS 25578: MISC BASE D57E8D446448 lea r24, ptr [r20+r28*2+0x48] +XDIS 2557e: MISC BASE D57E8D446549 lea r24, ptr [r21+r28*2+0x49] +XDIS 25584: MISC BASE D57E8D44664A lea r24, ptr [r22+r28*2+0x4a] +XDIS 2558a: MISC BASE D57E8D44674B lea r24, ptr [r23+r28*2+0x4b] +XDIS 25590: MISC BASE D57F8D44604C lea r24, ptr [r24+r28*2+0x4c] +XDIS 25596: MISC BASE D57F8D44614D lea r24, ptr [r25+r28*2+0x4d] +XDIS 2559c: MISC BASE D57F8D44624E lea r24, ptr [r26+r28*2+0x4e] +XDIS 255a2: MISC BASE D57F8D44634F lea r24, ptr [r27+r28*2+0x4f] +XDIS 255a8: MISC BASE D57F8D446450 lea r24, ptr [r28+r28*2+0x50] +XDIS 255ae: MISC BASE D57F8D446551 lea r24, ptr [r29+r28*2+0x51] +XDIS 255b4: MISC BASE D57F8D446652 lea r24, ptr [r30+r28*2+0x52] +XDIS 255ba: MISC BASE D57F8D446753 lea r24, ptr [r31+r28*2+0x53] +XDIS 255c0: MISC BASE D56E8D446835 lea r24, ptr [rax+r29*2+0x35] +XDIS 255c6: MISC BASE D56E8D446936 lea r24, ptr [rcx+r29*2+0x36] +XDIS 255cc: MISC BASE D56E8D446A37 lea r24, ptr [rdx+r29*2+0x37] +XDIS 255d2: MISC BASE D56E8D446B38 lea r24, ptr [rbx+r29*2+0x38] +XDIS 255d8: MISC BASE D56E8D446C39 lea r24, ptr [rsp+r29*2+0x39] +XDIS 255de: MISC BASE D56E8D446D3A lea r24, ptr [rbp+r29*2+0x3a] +XDIS 255e4: MISC BASE D56E8D446E3B lea r24, ptr [rsi+r29*2+0x3b] +XDIS 255ea: MISC BASE D56E8D446F3C lea r24, ptr [rdi+r29*2+0x3c] +XDIS 255f0: MISC BASE D56F8D44683D lea r24, ptr [r8+r29*2+0x3d] +XDIS 255f6: MISC BASE D56F8D44693E lea r24, ptr [r9+r29*2+0x3e] +XDIS 255fc: MISC BASE D56F8D446A3F lea r24, ptr [r10+r29*2+0x3f] +XDIS 25602: MISC BASE D56F8D446B40 lea r24, ptr [r11+r29*2+0x40] +XDIS 25608: MISC BASE D56F8D446C41 lea r24, ptr [r12+r29*2+0x41] +XDIS 2560e: MISC BASE D56F8D446D42 lea r24, ptr [r13+r29*2+0x42] +XDIS 25614: MISC BASE D56F8D446E43 lea r24, ptr [r14+r29*2+0x43] +XDIS 2561a: MISC BASE D56F8D446F44 lea r24, ptr [r15+r29*2+0x44] +XDIS 25620: MISC BASE D57E8D446845 lea r24, ptr [r16+r29*2+0x45] +XDIS 25626: MISC BASE D57E8D446946 lea r24, ptr [r17+r29*2+0x46] +XDIS 2562c: MISC BASE D57E8D446A47 lea r24, ptr [r18+r29*2+0x47] +XDIS 25632: MISC BASE D57E8D446B48 lea r24, ptr [r19+r29*2+0x48] +XDIS 25638: MISC BASE D57E8D446C49 lea r24, ptr [r20+r29*2+0x49] +XDIS 2563e: MISC BASE D57E8D446D4A lea r24, ptr [r21+r29*2+0x4a] +XDIS 25644: MISC BASE D57E8D446E4B lea r24, ptr [r22+r29*2+0x4b] +XDIS 2564a: MISC BASE D57E8D446F4C lea r24, ptr [r23+r29*2+0x4c] +XDIS 25650: MISC BASE D57F8D44684D lea r24, ptr [r24+r29*2+0x4d] +XDIS 25656: MISC BASE D57F8D44694E lea r24, ptr [r25+r29*2+0x4e] +XDIS 2565c: MISC BASE D57F8D446A4F lea r24, ptr [r26+r29*2+0x4f] +XDIS 25662: MISC BASE D57F8D446B50 lea r24, ptr [r27+r29*2+0x50] +XDIS 25668: MISC BASE D57F8D446C51 lea r24, ptr [r28+r29*2+0x51] +XDIS 2566e: MISC BASE D57F8D446D52 lea r24, ptr [r29+r29*2+0x52] +XDIS 25674: MISC BASE D57F8D446E53 lea r24, ptr [r30+r29*2+0x53] +XDIS 2567a: MISC BASE D57F8D446F54 lea r24, ptr [r31+r29*2+0x54] +XDIS 25680: MISC BASE D56E8D447036 lea r24, ptr [rax+r30*2+0x36] +XDIS 25686: MISC BASE D56E8D447137 lea r24, ptr [rcx+r30*2+0x37] +XDIS 2568c: MISC BASE D56E8D447238 lea r24, ptr [rdx+r30*2+0x38] +XDIS 25692: MISC BASE D56E8D447339 lea r24, ptr [rbx+r30*2+0x39] +XDIS 25698: MISC BASE D56E8D44743A lea r24, ptr [rsp+r30*2+0x3a] +XDIS 2569e: MISC BASE D56E8D44753B lea r24, ptr [rbp+r30*2+0x3b] +XDIS 256a4: MISC BASE D56E8D44763C lea r24, ptr [rsi+r30*2+0x3c] +XDIS 256aa: MISC BASE D56E8D44773D lea r24, ptr [rdi+r30*2+0x3d] +XDIS 256b0: MISC BASE D56F8D44703E lea r24, ptr [r8+r30*2+0x3e] +XDIS 256b6: MISC BASE D56F8D44713F lea r24, ptr [r9+r30*2+0x3f] +XDIS 256bc: MISC BASE D56F8D447240 lea r24, ptr [r10+r30*2+0x40] +XDIS 256c2: MISC BASE D56F8D447341 lea r24, ptr [r11+r30*2+0x41] +XDIS 256c8: MISC BASE D56F8D447442 lea r24, ptr [r12+r30*2+0x42] +XDIS 256ce: MISC BASE D56F8D447543 lea r24, ptr [r13+r30*2+0x43] +XDIS 256d4: MISC BASE D56F8D447644 lea r24, ptr [r14+r30*2+0x44] +XDIS 256da: MISC BASE D56F8D447745 lea r24, ptr [r15+r30*2+0x45] +XDIS 256e0: MISC BASE D57E8D447046 lea r24, ptr [r16+r30*2+0x46] +XDIS 256e6: MISC BASE D57E8D447147 lea r24, ptr [r17+r30*2+0x47] +XDIS 256ec: MISC BASE D57E8D447248 lea r24, ptr [r18+r30*2+0x48] +XDIS 256f2: MISC BASE D57E8D447349 lea r24, ptr [r19+r30*2+0x49] +XDIS 256f8: MISC BASE D57E8D44744A lea r24, ptr [r20+r30*2+0x4a] +XDIS 256fe: MISC BASE D57E8D44754B lea r24, ptr [r21+r30*2+0x4b] +XDIS 25704: MISC BASE D57E8D44764C lea r24, ptr [r22+r30*2+0x4c] +XDIS 2570a: MISC BASE D57E8D44774D lea r24, ptr [r23+r30*2+0x4d] +XDIS 25710: MISC BASE D57F8D44704E lea r24, ptr [r24+r30*2+0x4e] +XDIS 25716: MISC BASE D57F8D44714F lea r24, ptr [r25+r30*2+0x4f] +XDIS 2571c: MISC BASE D57F8D447250 lea r24, ptr [r26+r30*2+0x50] +XDIS 25722: MISC BASE D57F8D447351 lea r24, ptr [r27+r30*2+0x51] +XDIS 25728: MISC BASE D57F8D447452 lea r24, ptr [r28+r30*2+0x52] +XDIS 2572e: MISC BASE D57F8D447553 lea r24, ptr [r29+r30*2+0x53] +XDIS 25734: MISC BASE D57F8D447654 lea r24, ptr [r30+r30*2+0x54] +XDIS 2573a: MISC BASE D57F8D447755 lea r24, ptr [r31+r30*2+0x55] +XDIS 25740: MISC BASE D56E8D447837 lea r24, ptr [rax+r31*2+0x37] +XDIS 25746: MISC BASE D56E8D447938 lea r24, ptr [rcx+r31*2+0x38] +XDIS 2574c: MISC BASE D56E8D447A39 lea r24, ptr [rdx+r31*2+0x39] +XDIS 25752: MISC BASE D56E8D447B3A lea r24, ptr [rbx+r31*2+0x3a] +XDIS 25758: MISC BASE D56E8D447C3B lea r24, ptr [rsp+r31*2+0x3b] +XDIS 2575e: MISC BASE D56E8D447D3C lea r24, ptr [rbp+r31*2+0x3c] +XDIS 25764: MISC BASE D56E8D447E3D lea r24, ptr [rsi+r31*2+0x3d] +XDIS 2576a: MISC BASE D56E8D447F3E lea r24, ptr [rdi+r31*2+0x3e] +XDIS 25770: MISC BASE D56F8D44783F lea r24, ptr [r8+r31*2+0x3f] +XDIS 25776: MISC BASE D56F8D447940 lea r24, ptr [r9+r31*2+0x40] +XDIS 2577c: MISC BASE D56F8D447A41 lea r24, ptr [r10+r31*2+0x41] +XDIS 25782: MISC BASE D56F8D447B42 lea r24, ptr [r11+r31*2+0x42] +XDIS 25788: MISC BASE D56F8D447C43 lea r24, ptr [r12+r31*2+0x43] +XDIS 2578e: MISC BASE D56F8D447D44 lea r24, ptr [r13+r31*2+0x44] +XDIS 25794: MISC BASE D56F8D447E45 lea r24, ptr [r14+r31*2+0x45] +XDIS 2579a: MISC BASE D56F8D447F46 lea r24, ptr [r15+r31*2+0x46] +XDIS 257a0: MISC BASE D57E8D447847 lea r24, ptr [r16+r31*2+0x47] +XDIS 257a6: MISC BASE D57E8D447948 lea r24, ptr [r17+r31*2+0x48] +XDIS 257ac: MISC BASE D57E8D447A49 lea r24, ptr [r18+r31*2+0x49] +XDIS 257b2: MISC BASE D57E8D447B4A lea r24, ptr [r19+r31*2+0x4a] +XDIS 257b8: MISC BASE D57E8D447C4B lea r24, ptr [r20+r31*2+0x4b] +XDIS 257be: MISC BASE D57E8D447D4C lea r24, ptr [r21+r31*2+0x4c] +XDIS 257c4: MISC BASE D57E8D447E4D lea r24, ptr [r22+r31*2+0x4d] +XDIS 257ca: MISC BASE D57E8D447F4E lea r24, ptr [r23+r31*2+0x4e] +XDIS 257d0: MISC BASE D57F8D44784F lea r24, ptr [r24+r31*2+0x4f] +XDIS 257d6: MISC BASE D57F8D447950 lea r24, ptr [r25+r31*2+0x50] +XDIS 257dc: MISC BASE D57F8D447A51 lea r24, ptr [r26+r31*2+0x51] +XDIS 257e2: MISC BASE D57F8D447B52 lea r24, ptr [r27+r31*2+0x52] +XDIS 257e8: MISC BASE D57F8D447C53 lea r24, ptr [r28+r31*2+0x53] +XDIS 257ee: MISC BASE D57F8D447D54 lea r24, ptr [r29+r31*2+0x54] +XDIS 257f4: MISC BASE D57F8D447E55 lea r24, ptr [r30+r31*2+0x55] +XDIS 257fa: MISC BASE D57F8D447F56 lea r24, ptr [r31+r31*2+0x56] +XDIS 25800: MISC BASE D54C8D4C4019 lea r25, ptr [rax+rax*2+0x19] +XDIS 25806: MISC BASE D54C8D4C411A lea r25, ptr [rcx+rax*2+0x1a] +XDIS 2580c: MISC BASE D54C8D4C421B lea r25, ptr [rdx+rax*2+0x1b] +XDIS 25812: MISC BASE D54C8D4C431C lea r25, ptr [rbx+rax*2+0x1c] +XDIS 25818: MISC BASE D54C8D4C441D lea r25, ptr [rsp+rax*2+0x1d] +XDIS 2581e: MISC BASE D54C8D4C451E lea r25, ptr [rbp+rax*2+0x1e] +XDIS 25824: MISC BASE D54C8D4C461F lea r25, ptr [rsi+rax*2+0x1f] +XDIS 2582a: MISC BASE D54C8D4C4720 lea r25, ptr [rdi+rax*2+0x20] +XDIS 25830: MISC BASE D54D8D4C4021 lea r25, ptr [r8+rax*2+0x21] +XDIS 25836: MISC BASE D54D8D4C4122 lea r25, ptr [r9+rax*2+0x22] +XDIS 2583c: MISC BASE D54D8D4C4223 lea r25, ptr [r10+rax*2+0x23] +XDIS 25842: MISC BASE D54D8D4C4324 lea r25, ptr [r11+rax*2+0x24] +XDIS 25848: MISC BASE D54D8D4C4425 lea r25, ptr [r12+rax*2+0x25] +XDIS 2584e: MISC BASE D54D8D4C4526 lea r25, ptr [r13+rax*2+0x26] +XDIS 25854: MISC BASE D54D8D4C4627 lea r25, ptr [r14+rax*2+0x27] +XDIS 2585a: MISC BASE D54D8D4C4728 lea r25, ptr [r15+rax*2+0x28] +XDIS 25860: MISC BASE D55C8D4C4029 lea r25, ptr [r16+rax*2+0x29] +XDIS 25866: MISC BASE D55C8D4C412A lea r25, ptr [r17+rax*2+0x2a] +XDIS 2586c: MISC BASE D55C8D4C422B lea r25, ptr [r18+rax*2+0x2b] +XDIS 25872: MISC BASE D55C8D4C432C lea r25, ptr [r19+rax*2+0x2c] +XDIS 25878: MISC BASE D55C8D4C442D lea r25, ptr [r20+rax*2+0x2d] +XDIS 2587e: MISC BASE D55C8D4C452E lea r25, ptr [r21+rax*2+0x2e] +XDIS 25884: MISC BASE D55C8D4C462F lea r25, ptr [r22+rax*2+0x2f] +XDIS 2588a: MISC BASE D55C8D4C4730 lea r25, ptr [r23+rax*2+0x30] +XDIS 25890: MISC BASE D55D8D4C4031 lea r25, ptr [r24+rax*2+0x31] +XDIS 25896: MISC BASE D55D8D4C4132 lea r25, ptr [r25+rax*2+0x32] +XDIS 2589c: MISC BASE D55D8D4C4233 lea r25, ptr [r26+rax*2+0x33] +XDIS 258a2: MISC BASE D55D8D4C4334 lea r25, ptr [r27+rax*2+0x34] +XDIS 258a8: MISC BASE D55D8D4C4435 lea r25, ptr [r28+rax*2+0x35] +XDIS 258ae: MISC BASE D55D8D4C4536 lea r25, ptr [r29+rax*2+0x36] +XDIS 258b4: MISC BASE D55D8D4C4637 lea r25, ptr [r30+rax*2+0x37] +XDIS 258ba: MISC BASE D55D8D4C4738 lea r25, ptr [r31+rax*2+0x38] +XDIS 258c0: MISC BASE D54C8D4C481A lea r25, ptr [rax+rcx*2+0x1a] +XDIS 258c6: MISC BASE D54C8D4C491B lea r25, ptr [rcx+rcx*2+0x1b] +XDIS 258cc: MISC BASE D54C8D4C4A1C lea r25, ptr [rdx+rcx*2+0x1c] +XDIS 258d2: MISC BASE D54C8D4C4B1D lea r25, ptr [rbx+rcx*2+0x1d] +XDIS 258d8: MISC BASE D54C8D4C4C1E lea r25, ptr [rsp+rcx*2+0x1e] +XDIS 258de: MISC BASE D54C8D4C4D1F lea r25, ptr [rbp+rcx*2+0x1f] +XDIS 258e4: MISC BASE D54C8D4C4E20 lea r25, ptr [rsi+rcx*2+0x20] +XDIS 258ea: MISC BASE D54C8D4C4F21 lea r25, ptr [rdi+rcx*2+0x21] +XDIS 258f0: MISC BASE D54D8D4C4822 lea r25, ptr [r8+rcx*2+0x22] +XDIS 258f6: MISC BASE D54D8D4C4923 lea r25, ptr [r9+rcx*2+0x23] +XDIS 258fc: MISC BASE D54D8D4C4A24 lea r25, ptr [r10+rcx*2+0x24] +XDIS 25902: MISC BASE D54D8D4C4B25 lea r25, ptr [r11+rcx*2+0x25] +XDIS 25908: MISC BASE D54D8D4C4C26 lea r25, ptr [r12+rcx*2+0x26] +XDIS 2590e: MISC BASE D54D8D4C4D27 lea r25, ptr [r13+rcx*2+0x27] +XDIS 25914: MISC BASE D54D8D4C4E28 lea r25, ptr [r14+rcx*2+0x28] +XDIS 2591a: MISC BASE D54D8D4C4F29 lea r25, ptr [r15+rcx*2+0x29] +XDIS 25920: MISC BASE D55C8D4C482A lea r25, ptr [r16+rcx*2+0x2a] +XDIS 25926: MISC BASE D55C8D4C492B lea r25, ptr [r17+rcx*2+0x2b] +XDIS 2592c: MISC BASE D55C8D4C4A2C lea r25, ptr [r18+rcx*2+0x2c] +XDIS 25932: MISC BASE D55C8D4C4B2D lea r25, ptr [r19+rcx*2+0x2d] +XDIS 25938: MISC BASE D55C8D4C4C2E lea r25, ptr [r20+rcx*2+0x2e] +XDIS 2593e: MISC BASE D55C8D4C4D2F lea r25, ptr [r21+rcx*2+0x2f] +XDIS 25944: MISC BASE D55C8D4C4E30 lea r25, ptr [r22+rcx*2+0x30] +XDIS 2594a: MISC BASE D55C8D4C4F31 lea r25, ptr [r23+rcx*2+0x31] +XDIS 25950: MISC BASE D55D8D4C4832 lea r25, ptr [r24+rcx*2+0x32] +XDIS 25956: MISC BASE D55D8D4C4933 lea r25, ptr [r25+rcx*2+0x33] +XDIS 2595c: MISC BASE D55D8D4C4A34 lea r25, ptr [r26+rcx*2+0x34] +XDIS 25962: MISC BASE D55D8D4C4B35 lea r25, ptr [r27+rcx*2+0x35] +XDIS 25968: MISC BASE D55D8D4C4C36 lea r25, ptr [r28+rcx*2+0x36] +XDIS 2596e: MISC BASE D55D8D4C4D37 lea r25, ptr [r29+rcx*2+0x37] +XDIS 25974: MISC BASE D55D8D4C4E38 lea r25, ptr [r30+rcx*2+0x38] +XDIS 2597a: MISC BASE D55D8D4C4F39 lea r25, ptr [r31+rcx*2+0x39] +XDIS 25980: MISC BASE D54C8D4C501B lea r25, ptr [rax+rdx*2+0x1b] +XDIS 25986: MISC BASE D54C8D4C511C lea r25, ptr [rcx+rdx*2+0x1c] +XDIS 2598c: MISC BASE D54C8D4C521D lea r25, ptr [rdx+rdx*2+0x1d] +XDIS 25992: MISC BASE D54C8D4C531E lea r25, ptr [rbx+rdx*2+0x1e] +XDIS 25998: MISC BASE D54C8D4C541F lea r25, ptr [rsp+rdx*2+0x1f] +XDIS 2599e: MISC BASE D54C8D4C5520 lea r25, ptr [rbp+rdx*2+0x20] +XDIS 259a4: MISC BASE D54C8D4C5621 lea r25, ptr [rsi+rdx*2+0x21] +XDIS 259aa: MISC BASE D54C8D4C5722 lea r25, ptr [rdi+rdx*2+0x22] +XDIS 259b0: MISC BASE D54D8D4C5023 lea r25, ptr [r8+rdx*2+0x23] +XDIS 259b6: MISC BASE D54D8D4C5124 lea r25, ptr [r9+rdx*2+0x24] +XDIS 259bc: MISC BASE D54D8D4C5225 lea r25, ptr [r10+rdx*2+0x25] +XDIS 259c2: MISC BASE D54D8D4C5326 lea r25, ptr [r11+rdx*2+0x26] +XDIS 259c8: MISC BASE D54D8D4C5427 lea r25, ptr [r12+rdx*2+0x27] +XDIS 259ce: MISC BASE D54D8D4C5528 lea r25, ptr [r13+rdx*2+0x28] +XDIS 259d4: MISC BASE D54D8D4C5629 lea r25, ptr [r14+rdx*2+0x29] +XDIS 259da: MISC BASE D54D8D4C572A lea r25, ptr [r15+rdx*2+0x2a] +XDIS 259e0: MISC BASE D55C8D4C502B lea r25, ptr [r16+rdx*2+0x2b] +XDIS 259e6: MISC BASE D55C8D4C512C lea r25, ptr [r17+rdx*2+0x2c] +XDIS 259ec: MISC BASE D55C8D4C522D lea r25, ptr [r18+rdx*2+0x2d] +XDIS 259f2: MISC BASE D55C8D4C532E lea r25, ptr [r19+rdx*2+0x2e] +XDIS 259f8: MISC BASE D55C8D4C542F lea r25, ptr [r20+rdx*2+0x2f] +XDIS 259fe: MISC BASE D55C8D4C5530 lea r25, ptr [r21+rdx*2+0x30] +XDIS 25a04: MISC BASE D55C8D4C5631 lea r25, ptr [r22+rdx*2+0x31] +XDIS 25a0a: MISC BASE D55C8D4C5732 lea r25, ptr [r23+rdx*2+0x32] +XDIS 25a10: MISC BASE D55D8D4C5033 lea r25, ptr [r24+rdx*2+0x33] +XDIS 25a16: MISC BASE D55D8D4C5134 lea r25, ptr [r25+rdx*2+0x34] +XDIS 25a1c: MISC BASE D55D8D4C5235 lea r25, ptr [r26+rdx*2+0x35] +XDIS 25a22: MISC BASE D55D8D4C5336 lea r25, ptr [r27+rdx*2+0x36] +XDIS 25a28: MISC BASE D55D8D4C5437 lea r25, ptr [r28+rdx*2+0x37] +XDIS 25a2e: MISC BASE D55D8D4C5538 lea r25, ptr [r29+rdx*2+0x38] +XDIS 25a34: MISC BASE D55D8D4C5639 lea r25, ptr [r30+rdx*2+0x39] +XDIS 25a3a: MISC BASE D55D8D4C573A lea r25, ptr [r31+rdx*2+0x3a] +XDIS 25a40: MISC BASE D54C8D4C581C lea r25, ptr [rax+rbx*2+0x1c] +XDIS 25a46: MISC BASE D54C8D4C591D lea r25, ptr [rcx+rbx*2+0x1d] +XDIS 25a4c: MISC BASE D54C8D4C5A1E lea r25, ptr [rdx+rbx*2+0x1e] +XDIS 25a52: MISC BASE D54C8D4C5B1F lea r25, ptr [rbx+rbx*2+0x1f] +XDIS 25a58: MISC BASE D54C8D4C5C20 lea r25, ptr [rsp+rbx*2+0x20] +XDIS 25a5e: MISC BASE D54C8D4C5D21 lea r25, ptr [rbp+rbx*2+0x21] +XDIS 25a64: MISC BASE D54C8D4C5E22 lea r25, ptr [rsi+rbx*2+0x22] +XDIS 25a6a: MISC BASE D54C8D4C5F23 lea r25, ptr [rdi+rbx*2+0x23] +XDIS 25a70: MISC BASE D54D8D4C5824 lea r25, ptr [r8+rbx*2+0x24] +XDIS 25a76: MISC BASE D54D8D4C5925 lea r25, ptr [r9+rbx*2+0x25] +XDIS 25a7c: MISC BASE D54D8D4C5A26 lea r25, ptr [r10+rbx*2+0x26] +XDIS 25a82: MISC BASE D54D8D4C5B27 lea r25, ptr [r11+rbx*2+0x27] +XDIS 25a88: MISC BASE D54D8D4C5C28 lea r25, ptr [r12+rbx*2+0x28] +XDIS 25a8e: MISC BASE D54D8D4C5D29 lea r25, ptr [r13+rbx*2+0x29] +XDIS 25a94: MISC BASE D54D8D4C5E2A lea r25, ptr [r14+rbx*2+0x2a] +XDIS 25a9a: MISC BASE D54D8D4C5F2B lea r25, ptr [r15+rbx*2+0x2b] +XDIS 25aa0: MISC BASE D55C8D4C582C lea r25, ptr [r16+rbx*2+0x2c] +XDIS 25aa6: MISC BASE D55C8D4C592D lea r25, ptr [r17+rbx*2+0x2d] +XDIS 25aac: MISC BASE D55C8D4C5A2E lea r25, ptr [r18+rbx*2+0x2e] +XDIS 25ab2: MISC BASE D55C8D4C5B2F lea r25, ptr [r19+rbx*2+0x2f] +XDIS 25ab8: MISC BASE D55C8D4C5C30 lea r25, ptr [r20+rbx*2+0x30] +XDIS 25abe: MISC BASE D55C8D4C5D31 lea r25, ptr [r21+rbx*2+0x31] +XDIS 25ac4: MISC BASE D55C8D4C5E32 lea r25, ptr [r22+rbx*2+0x32] +XDIS 25aca: MISC BASE D55C8D4C5F33 lea r25, ptr [r23+rbx*2+0x33] +XDIS 25ad0: MISC BASE D55D8D4C5834 lea r25, ptr [r24+rbx*2+0x34] +XDIS 25ad6: MISC BASE D55D8D4C5935 lea r25, ptr [r25+rbx*2+0x35] +XDIS 25adc: MISC BASE D55D8D4C5A36 lea r25, ptr [r26+rbx*2+0x36] +XDIS 25ae2: MISC BASE D55D8D4C5B37 lea r25, ptr [r27+rbx*2+0x37] +XDIS 25ae8: MISC BASE D55D8D4C5C38 lea r25, ptr [r28+rbx*2+0x38] +XDIS 25aee: MISC BASE D55D8D4C5D39 lea r25, ptr [r29+rbx*2+0x39] +XDIS 25af4: MISC BASE D55D8D4C5E3A lea r25, ptr [r30+rbx*2+0x3a] +XDIS 25afa: MISC BASE D55D8D4C5F3B lea r25, ptr [r31+rbx*2+0x3b] +XDIS 25b00: MISC BASE D54C8D4C601D lea r25, ptr [rax+0x1d] +XDIS 25b06: MISC BASE D54C8D4C611E lea r25, ptr [rcx+0x1e] +XDIS 25b0c: MISC BASE D54C8D4C621F lea r25, ptr [rdx+0x1f] +XDIS 25b12: MISC BASE D54C8D4C6320 lea r25, ptr [rbx+0x20] +XDIS 25b18: MISC BASE D54C8D4C6421 lea r25, ptr [rsp+0x21] +XDIS 25b1e: MISC BASE D54C8D4C6522 lea r25, ptr [rbp+0x22] +XDIS 25b24: MISC BASE D54C8D4C6623 lea r25, ptr [rsi+0x23] +XDIS 25b2a: MISC BASE D54C8D4C6724 lea r25, ptr [rdi+0x24] +XDIS 25b30: MISC BASE D54D8D4C6025 lea r25, ptr [r8+0x25] +XDIS 25b36: MISC BASE D54D8D4C6126 lea r25, ptr [r9+0x26] +XDIS 25b3c: MISC BASE D54D8D4C6227 lea r25, ptr [r10+0x27] +XDIS 25b42: MISC BASE D54D8D4C6328 lea r25, ptr [r11+0x28] +XDIS 25b48: MISC BASE D54D8D4C6429 lea r25, ptr [r12+0x29] +XDIS 25b4e: MISC BASE D54D8D4C652A lea r25, ptr [r13+0x2a] +XDIS 25b54: MISC BASE D54D8D4C662B lea r25, ptr [r14+0x2b] +XDIS 25b5a: MISC BASE D54D8D4C672C lea r25, ptr [r15+0x2c] +XDIS 25b60: MISC BASE D55C8D4C602D lea r25, ptr [r16+0x2d] +XDIS 25b66: MISC BASE D55C8D4C612E lea r25, ptr [r17+0x2e] +XDIS 25b6c: MISC BASE D55C8D4C622F lea r25, ptr [r18+0x2f] +XDIS 25b72: MISC BASE D55C8D4C6330 lea r25, ptr [r19+0x30] +XDIS 25b78: MISC BASE D55C8D4C6431 lea r25, ptr [r20+0x31] +XDIS 25b7e: MISC BASE D55C8D4C6532 lea r25, ptr [r21+0x32] +XDIS 25b84: MISC BASE D55C8D4C6633 lea r25, ptr [r22+0x33] +XDIS 25b8a: MISC BASE D55C8D4C6734 lea r25, ptr [r23+0x34] +XDIS 25b90: MISC BASE D55D8D4C6035 lea r25, ptr [r24+0x35] +XDIS 25b96: MISC BASE D55D8D4C6136 lea r25, ptr [r25+0x36] +XDIS 25b9c: MISC BASE D55D8D4C6237 lea r25, ptr [r26+0x37] +XDIS 25ba2: MISC BASE D55D8D4C6338 lea r25, ptr [r27+0x38] +XDIS 25ba8: MISC BASE D55D8D4C6439 lea r25, ptr [r28+0x39] +XDIS 25bae: MISC BASE D55D8D4C653A lea r25, ptr [r29+0x3a] +XDIS 25bb4: MISC BASE D55D8D4C663B lea r25, ptr [r30+0x3b] +XDIS 25bba: MISC BASE D55D8D4C673C lea r25, ptr [r31+0x3c] +XDIS 25bc0: MISC BASE D54C8D4C681E lea r25, ptr [rax+rbp*2+0x1e] +XDIS 25bc6: MISC BASE D54C8D4C691F lea r25, ptr [rcx+rbp*2+0x1f] +XDIS 25bcc: MISC BASE D54C8D4C6A20 lea r25, ptr [rdx+rbp*2+0x20] +XDIS 25bd2: MISC BASE D54C8D4C6B21 lea r25, ptr [rbx+rbp*2+0x21] +XDIS 25bd8: MISC BASE D54C8D4C6C22 lea r25, ptr [rsp+rbp*2+0x22] +XDIS 25bde: MISC BASE D54C8D4C6D23 lea r25, ptr [rbp+rbp*2+0x23] +XDIS 25be4: MISC BASE D54C8D4C6E24 lea r25, ptr [rsi+rbp*2+0x24] +XDIS 25bea: MISC BASE D54C8D4C6F25 lea r25, ptr [rdi+rbp*2+0x25] +XDIS 25bf0: MISC BASE D54D8D4C6826 lea r25, ptr [r8+rbp*2+0x26] +XDIS 25bf6: MISC BASE D54D8D4C6927 lea r25, ptr [r9+rbp*2+0x27] +XDIS 25bfc: MISC BASE D54D8D4C6A28 lea r25, ptr [r10+rbp*2+0x28] +XDIS 25c02: MISC BASE D54D8D4C6B29 lea r25, ptr [r11+rbp*2+0x29] +XDIS 25c08: MISC BASE D54D8D4C6C2A lea r25, ptr [r12+rbp*2+0x2a] +XDIS 25c0e: MISC BASE D54D8D4C6D2B lea r25, ptr [r13+rbp*2+0x2b] +XDIS 25c14: MISC BASE D54D8D4C6E2C lea r25, ptr [r14+rbp*2+0x2c] +XDIS 25c1a: MISC BASE D54D8D4C6F2D lea r25, ptr [r15+rbp*2+0x2d] +XDIS 25c20: MISC BASE D55C8D4C682E lea r25, ptr [r16+rbp*2+0x2e] +XDIS 25c26: MISC BASE D55C8D4C692F lea r25, ptr [r17+rbp*2+0x2f] +XDIS 25c2c: MISC BASE D55C8D4C6A30 lea r25, ptr [r18+rbp*2+0x30] +XDIS 25c32: MISC BASE D55C8D4C6B31 lea r25, ptr [r19+rbp*2+0x31] +XDIS 25c38: MISC BASE D55C8D4C6C32 lea r25, ptr [r20+rbp*2+0x32] +XDIS 25c3e: MISC BASE D55C8D4C6D33 lea r25, ptr [r21+rbp*2+0x33] +XDIS 25c44: MISC BASE D55C8D4C6E34 lea r25, ptr [r22+rbp*2+0x34] +XDIS 25c4a: MISC BASE D55C8D4C6F35 lea r25, ptr [r23+rbp*2+0x35] +XDIS 25c50: MISC BASE D55D8D4C6836 lea r25, ptr [r24+rbp*2+0x36] +XDIS 25c56: MISC BASE D55D8D4C6937 lea r25, ptr [r25+rbp*2+0x37] +XDIS 25c5c: MISC BASE D55D8D4C6A38 lea r25, ptr [r26+rbp*2+0x38] +XDIS 25c62: MISC BASE D55D8D4C6B39 lea r25, ptr [r27+rbp*2+0x39] +XDIS 25c68: MISC BASE D55D8D4C6C3A lea r25, ptr [r28+rbp*2+0x3a] +XDIS 25c6e: MISC BASE D55D8D4C6D3B lea r25, ptr [r29+rbp*2+0x3b] +XDIS 25c74: MISC BASE D55D8D4C6E3C lea r25, ptr [r30+rbp*2+0x3c] +XDIS 25c7a: MISC BASE D55D8D4C6F3D lea r25, ptr [r31+rbp*2+0x3d] +XDIS 25c80: MISC BASE D54C8D4C701F lea r25, ptr [rax+rsi*2+0x1f] +XDIS 25c86: MISC BASE D54C8D4C7120 lea r25, ptr [rcx+rsi*2+0x20] +XDIS 25c8c: MISC BASE D54C8D4C7221 lea r25, ptr [rdx+rsi*2+0x21] +XDIS 25c92: MISC BASE D54C8D4C7322 lea r25, ptr [rbx+rsi*2+0x22] +XDIS 25c98: MISC BASE D54C8D4C7423 lea r25, ptr [rsp+rsi*2+0x23] +XDIS 25c9e: MISC BASE D54C8D4C7524 lea r25, ptr [rbp+rsi*2+0x24] +XDIS 25ca4: MISC BASE D54C8D4C7625 lea r25, ptr [rsi+rsi*2+0x25] +XDIS 25caa: MISC BASE D54C8D4C7726 lea r25, ptr [rdi+rsi*2+0x26] +XDIS 25cb0: MISC BASE D54D8D4C7027 lea r25, ptr [r8+rsi*2+0x27] +XDIS 25cb6: MISC BASE D54D8D4C7128 lea r25, ptr [r9+rsi*2+0x28] +XDIS 25cbc: MISC BASE D54D8D4C7229 lea r25, ptr [r10+rsi*2+0x29] +XDIS 25cc2: MISC BASE D54D8D4C732A lea r25, ptr [r11+rsi*2+0x2a] +XDIS 25cc8: MISC BASE D54D8D4C742B lea r25, ptr [r12+rsi*2+0x2b] +XDIS 25cce: MISC BASE D54D8D4C752C lea r25, ptr [r13+rsi*2+0x2c] +XDIS 25cd4: MISC BASE D54D8D4C762D lea r25, ptr [r14+rsi*2+0x2d] +XDIS 25cda: MISC BASE D54D8D4C772E lea r25, ptr [r15+rsi*2+0x2e] +XDIS 25ce0: MISC BASE D55C8D4C702F lea r25, ptr [r16+rsi*2+0x2f] +XDIS 25ce6: MISC BASE D55C8D4C7130 lea r25, ptr [r17+rsi*2+0x30] +XDIS 25cec: MISC BASE D55C8D4C7231 lea r25, ptr [r18+rsi*2+0x31] +XDIS 25cf2: MISC BASE D55C8D4C7332 lea r25, ptr [r19+rsi*2+0x32] +XDIS 25cf8: MISC BASE D55C8D4C7433 lea r25, ptr [r20+rsi*2+0x33] +XDIS 25cfe: MISC BASE D55C8D4C7534 lea r25, ptr [r21+rsi*2+0x34] +XDIS 25d04: MISC BASE D55C8D4C7635 lea r25, ptr [r22+rsi*2+0x35] +XDIS 25d0a: MISC BASE D55C8D4C7736 lea r25, ptr [r23+rsi*2+0x36] +XDIS 25d10: MISC BASE D55D8D4C7037 lea r25, ptr [r24+rsi*2+0x37] +XDIS 25d16: MISC BASE D55D8D4C7138 lea r25, ptr [r25+rsi*2+0x38] +XDIS 25d1c: MISC BASE D55D8D4C7239 lea r25, ptr [r26+rsi*2+0x39] +XDIS 25d22: MISC BASE D55D8D4C733A lea r25, ptr [r27+rsi*2+0x3a] +XDIS 25d28: MISC BASE D55D8D4C743B lea r25, ptr [r28+rsi*2+0x3b] +XDIS 25d2e: MISC BASE D55D8D4C753C lea r25, ptr [r29+rsi*2+0x3c] +XDIS 25d34: MISC BASE D55D8D4C763D lea r25, ptr [r30+rsi*2+0x3d] +XDIS 25d3a: MISC BASE D55D8D4C773E lea r25, ptr [r31+rsi*2+0x3e] +XDIS 25d40: MISC BASE D54C8D4C7820 lea r25, ptr [rax+rdi*2+0x20] +XDIS 25d46: MISC BASE D54C8D4C7921 lea r25, ptr [rcx+rdi*2+0x21] +XDIS 25d4c: MISC BASE D54C8D4C7A22 lea r25, ptr [rdx+rdi*2+0x22] +XDIS 25d52: MISC BASE D54C8D4C7B23 lea r25, ptr [rbx+rdi*2+0x23] +XDIS 25d58: MISC BASE D54C8D4C7C24 lea r25, ptr [rsp+rdi*2+0x24] +XDIS 25d5e: MISC BASE D54C8D4C7D25 lea r25, ptr [rbp+rdi*2+0x25] +XDIS 25d64: MISC BASE D54C8D4C7E26 lea r25, ptr [rsi+rdi*2+0x26] +XDIS 25d6a: MISC BASE D54C8D4C7F27 lea r25, ptr [rdi+rdi*2+0x27] +XDIS 25d70: MISC BASE D54D8D4C7828 lea r25, ptr [r8+rdi*2+0x28] +XDIS 25d76: MISC BASE D54D8D4C7929 lea r25, ptr [r9+rdi*2+0x29] +XDIS 25d7c: MISC BASE D54D8D4C7A2A lea r25, ptr [r10+rdi*2+0x2a] +XDIS 25d82: MISC BASE D54D8D4C7B2B lea r25, ptr [r11+rdi*2+0x2b] +XDIS 25d88: MISC BASE D54D8D4C7C2C lea r25, ptr [r12+rdi*2+0x2c] +XDIS 25d8e: MISC BASE D54D8D4C7D2D lea r25, ptr [r13+rdi*2+0x2d] +XDIS 25d94: MISC BASE D54D8D4C7E2E lea r25, ptr [r14+rdi*2+0x2e] +XDIS 25d9a: MISC BASE D54D8D4C7F2F lea r25, ptr [r15+rdi*2+0x2f] +XDIS 25da0: MISC BASE D55C8D4C7830 lea r25, ptr [r16+rdi*2+0x30] +XDIS 25da6: MISC BASE D55C8D4C7931 lea r25, ptr [r17+rdi*2+0x31] +XDIS 25dac: MISC BASE D55C8D4C7A32 lea r25, ptr [r18+rdi*2+0x32] +XDIS 25db2: MISC BASE D55C8D4C7B33 lea r25, ptr [r19+rdi*2+0x33] +XDIS 25db8: MISC BASE D55C8D4C7C34 lea r25, ptr [r20+rdi*2+0x34] +XDIS 25dbe: MISC BASE D55C8D4C7D35 lea r25, ptr [r21+rdi*2+0x35] +XDIS 25dc4: MISC BASE D55C8D4C7E36 lea r25, ptr [r22+rdi*2+0x36] +XDIS 25dca: MISC BASE D55C8D4C7F37 lea r25, ptr [r23+rdi*2+0x37] +XDIS 25dd0: MISC BASE D55D8D4C7838 lea r25, ptr [r24+rdi*2+0x38] +XDIS 25dd6: MISC BASE D55D8D4C7939 lea r25, ptr [r25+rdi*2+0x39] +XDIS 25ddc: MISC BASE D55D8D4C7A3A lea r25, ptr [r26+rdi*2+0x3a] +XDIS 25de2: MISC BASE D55D8D4C7B3B lea r25, ptr [r27+rdi*2+0x3b] +XDIS 25de8: MISC BASE D55D8D4C7C3C lea r25, ptr [r28+rdi*2+0x3c] +XDIS 25dee: MISC BASE D55D8D4C7D3D lea r25, ptr [r29+rdi*2+0x3d] +XDIS 25df4: MISC BASE D55D8D4C7E3E lea r25, ptr [r30+rdi*2+0x3e] +XDIS 25dfa: MISC BASE D55D8D4C7F3F lea r25, ptr [r31+rdi*2+0x3f] +XDIS 25e00: MISC BASE D54E8D4C4021 lea r25, ptr [rax+r8*2+0x21] +XDIS 25e06: MISC BASE D54E8D4C4122 lea r25, ptr [rcx+r8*2+0x22] +XDIS 25e0c: MISC BASE D54E8D4C4223 lea r25, ptr [rdx+r8*2+0x23] +XDIS 25e12: MISC BASE D54E8D4C4324 lea r25, ptr [rbx+r8*2+0x24] +XDIS 25e18: MISC BASE D54E8D4C4425 lea r25, ptr [rsp+r8*2+0x25] +XDIS 25e1e: MISC BASE D54E8D4C4526 lea r25, ptr [rbp+r8*2+0x26] +XDIS 25e24: MISC BASE D54E8D4C4627 lea r25, ptr [rsi+r8*2+0x27] +XDIS 25e2a: MISC BASE D54E8D4C4728 lea r25, ptr [rdi+r8*2+0x28] +XDIS 25e30: MISC BASE D54F8D4C4029 lea r25, ptr [r8+r8*2+0x29] +XDIS 25e36: MISC BASE D54F8D4C412A lea r25, ptr [r9+r8*2+0x2a] +XDIS 25e3c: MISC BASE D54F8D4C422B lea r25, ptr [r10+r8*2+0x2b] +XDIS 25e42: MISC BASE D54F8D4C432C lea r25, ptr [r11+r8*2+0x2c] +XDIS 25e48: MISC BASE D54F8D4C442D lea r25, ptr [r12+r8*2+0x2d] +XDIS 25e4e: MISC BASE D54F8D4C452E lea r25, ptr [r13+r8*2+0x2e] +XDIS 25e54: MISC BASE D54F8D4C462F lea r25, ptr [r14+r8*2+0x2f] +XDIS 25e5a: MISC BASE D54F8D4C4730 lea r25, ptr [r15+r8*2+0x30] +XDIS 25e60: MISC BASE D55E8D4C4031 lea r25, ptr [r16+r8*2+0x31] +XDIS 25e66: MISC BASE D55E8D4C4132 lea r25, ptr [r17+r8*2+0x32] +XDIS 25e6c: MISC BASE D55E8D4C4233 lea r25, ptr [r18+r8*2+0x33] +XDIS 25e72: MISC BASE D55E8D4C4334 lea r25, ptr [r19+r8*2+0x34] +XDIS 25e78: MISC BASE D55E8D4C4435 lea r25, ptr [r20+r8*2+0x35] +XDIS 25e7e: MISC BASE D55E8D4C4536 lea r25, ptr [r21+r8*2+0x36] +XDIS 25e84: MISC BASE D55E8D4C4637 lea r25, ptr [r22+r8*2+0x37] +XDIS 25e8a: MISC BASE D55E8D4C4738 lea r25, ptr [r23+r8*2+0x38] +XDIS 25e90: MISC BASE D55F8D4C4039 lea r25, ptr [r24+r8*2+0x39] +XDIS 25e96: MISC BASE D55F8D4C413A lea r25, ptr [r25+r8*2+0x3a] +XDIS 25e9c: MISC BASE D55F8D4C423B lea r25, ptr [r26+r8*2+0x3b] +XDIS 25ea2: MISC BASE D55F8D4C433C lea r25, ptr [r27+r8*2+0x3c] +XDIS 25ea8: MISC BASE D55F8D4C443D lea r25, ptr [r28+r8*2+0x3d] +XDIS 25eae: MISC BASE D55F8D4C453E lea r25, ptr [r29+r8*2+0x3e] +XDIS 25eb4: MISC BASE D55F8D4C463F lea r25, ptr [r30+r8*2+0x3f] +XDIS 25eba: MISC BASE D55F8D4C4740 lea r25, ptr [r31+r8*2+0x40] +XDIS 25ec0: MISC BASE D54E8D4C4822 lea r25, ptr [rax+r9*2+0x22] +XDIS 25ec6: MISC BASE D54E8D4C4923 lea r25, ptr [rcx+r9*2+0x23] +XDIS 25ecc: MISC BASE D54E8D4C4A24 lea r25, ptr [rdx+r9*2+0x24] +XDIS 25ed2: MISC BASE D54E8D4C4B25 lea r25, ptr [rbx+r9*2+0x25] +XDIS 25ed8: MISC BASE D54E8D4C4C26 lea r25, ptr [rsp+r9*2+0x26] +XDIS 25ede: MISC BASE D54E8D4C4D27 lea r25, ptr [rbp+r9*2+0x27] +XDIS 25ee4: MISC BASE D54E8D4C4E28 lea r25, ptr [rsi+r9*2+0x28] +XDIS 25eea: MISC BASE D54E8D4C4F29 lea r25, ptr [rdi+r9*2+0x29] +XDIS 25ef0: MISC BASE D54F8D4C482A lea r25, ptr [r8+r9*2+0x2a] +XDIS 25ef6: MISC BASE D54F8D4C492B lea r25, ptr [r9+r9*2+0x2b] +XDIS 25efc: MISC BASE D54F8D4C4A2C lea r25, ptr [r10+r9*2+0x2c] +XDIS 25f02: MISC BASE D54F8D4C4B2D lea r25, ptr [r11+r9*2+0x2d] +XDIS 25f08: MISC BASE D54F8D4C4C2E lea r25, ptr [r12+r9*2+0x2e] +XDIS 25f0e: MISC BASE D54F8D4C4D2F lea r25, ptr [r13+r9*2+0x2f] +XDIS 25f14: MISC BASE D54F8D4C4E30 lea r25, ptr [r14+r9*2+0x30] +XDIS 25f1a: MISC BASE D54F8D4C4F31 lea r25, ptr [r15+r9*2+0x31] +XDIS 25f20: MISC BASE D55E8D4C4832 lea r25, ptr [r16+r9*2+0x32] +XDIS 25f26: MISC BASE D55E8D4C4933 lea r25, ptr [r17+r9*2+0x33] +XDIS 25f2c: MISC BASE D55E8D4C4A34 lea r25, ptr [r18+r9*2+0x34] +XDIS 25f32: MISC BASE D55E8D4C4B35 lea r25, ptr [r19+r9*2+0x35] +XDIS 25f38: MISC BASE D55E8D4C4C36 lea r25, ptr [r20+r9*2+0x36] +XDIS 25f3e: MISC BASE D55E8D4C4D37 lea r25, ptr [r21+r9*2+0x37] +XDIS 25f44: MISC BASE D55E8D4C4E38 lea r25, ptr [r22+r9*2+0x38] +XDIS 25f4a: MISC BASE D55E8D4C4F39 lea r25, ptr [r23+r9*2+0x39] +XDIS 25f50: MISC BASE D55F8D4C483A lea r25, ptr [r24+r9*2+0x3a] +XDIS 25f56: MISC BASE D55F8D4C493B lea r25, ptr [r25+r9*2+0x3b] +XDIS 25f5c: MISC BASE D55F8D4C4A3C lea r25, ptr [r26+r9*2+0x3c] +XDIS 25f62: MISC BASE D55F8D4C4B3D lea r25, ptr [r27+r9*2+0x3d] +XDIS 25f68: MISC BASE D55F8D4C4C3E lea r25, ptr [r28+r9*2+0x3e] +XDIS 25f6e: MISC BASE D55F8D4C4D3F lea r25, ptr [r29+r9*2+0x3f] +XDIS 25f74: MISC BASE D55F8D4C4E40 lea r25, ptr [r30+r9*2+0x40] +XDIS 25f7a: MISC BASE D55F8D4C4F41 lea r25, ptr [r31+r9*2+0x41] +XDIS 25f80: MISC BASE D54E8D4C5023 lea r25, ptr [rax+r10*2+0x23] +XDIS 25f86: MISC BASE D54E8D4C5124 lea r25, ptr [rcx+r10*2+0x24] +XDIS 25f8c: MISC BASE D54E8D4C5225 lea r25, ptr [rdx+r10*2+0x25] +XDIS 25f92: MISC BASE D54E8D4C5326 lea r25, ptr [rbx+r10*2+0x26] +XDIS 25f98: MISC BASE D54E8D4C5427 lea r25, ptr [rsp+r10*2+0x27] +XDIS 25f9e: MISC BASE D54E8D4C5528 lea r25, ptr [rbp+r10*2+0x28] +XDIS 25fa4: MISC BASE D54E8D4C5629 lea r25, ptr [rsi+r10*2+0x29] +XDIS 25faa: MISC BASE D54E8D4C572A lea r25, ptr [rdi+r10*2+0x2a] +XDIS 25fb0: MISC BASE D54F8D4C502B lea r25, ptr [r8+r10*2+0x2b] +XDIS 25fb6: MISC BASE D54F8D4C512C lea r25, ptr [r9+r10*2+0x2c] +XDIS 25fbc: MISC BASE D54F8D4C522D lea r25, ptr [r10+r10*2+0x2d] +XDIS 25fc2: MISC BASE D54F8D4C532E lea r25, ptr [r11+r10*2+0x2e] +XDIS 25fc8: MISC BASE D54F8D4C542F lea r25, ptr [r12+r10*2+0x2f] +XDIS 25fce: MISC BASE D54F8D4C5530 lea r25, ptr [r13+r10*2+0x30] +XDIS 25fd4: MISC BASE D54F8D4C5631 lea r25, ptr [r14+r10*2+0x31] +XDIS 25fda: MISC BASE D54F8D4C5732 lea r25, ptr [r15+r10*2+0x32] +XDIS 25fe0: MISC BASE D55E8D4C5033 lea r25, ptr [r16+r10*2+0x33] +XDIS 25fe6: MISC BASE D55E8D4C5134 lea r25, ptr [r17+r10*2+0x34] +XDIS 25fec: MISC BASE D55E8D4C5235 lea r25, ptr [r18+r10*2+0x35] +XDIS 25ff2: MISC BASE D55E8D4C5336 lea r25, ptr [r19+r10*2+0x36] +XDIS 25ff8: MISC BASE D55E8D4C5437 lea r25, ptr [r20+r10*2+0x37] +XDIS 25ffe: MISC BASE D55E8D4C5538 lea r25, ptr [r21+r10*2+0x38] +XDIS 26004: MISC BASE D55E8D4C5639 lea r25, ptr [r22+r10*2+0x39] +XDIS 2600a: MISC BASE D55E8D4C573A lea r25, ptr [r23+r10*2+0x3a] +XDIS 26010: MISC BASE D55F8D4C503B lea r25, ptr [r24+r10*2+0x3b] +XDIS 26016: MISC BASE D55F8D4C513C lea r25, ptr [r25+r10*2+0x3c] +XDIS 2601c: MISC BASE D55F8D4C523D lea r25, ptr [r26+r10*2+0x3d] +XDIS 26022: MISC BASE D55F8D4C533E lea r25, ptr [r27+r10*2+0x3e] +XDIS 26028: MISC BASE D55F8D4C543F lea r25, ptr [r28+r10*2+0x3f] +XDIS 2602e: MISC BASE D55F8D4C5540 lea r25, ptr [r29+r10*2+0x40] +XDIS 26034: MISC BASE D55F8D4C5641 lea r25, ptr [r30+r10*2+0x41] +XDIS 2603a: MISC BASE D55F8D4C5742 lea r25, ptr [r31+r10*2+0x42] +XDIS 26040: MISC BASE D54E8D4C5824 lea r25, ptr [rax+r11*2+0x24] +XDIS 26046: MISC BASE D54E8D4C5925 lea r25, ptr [rcx+r11*2+0x25] +XDIS 2604c: MISC BASE D54E8D4C5A26 lea r25, ptr [rdx+r11*2+0x26] +XDIS 26052: MISC BASE D54E8D4C5B27 lea r25, ptr [rbx+r11*2+0x27] +XDIS 26058: MISC BASE D54E8D4C5C28 lea r25, ptr [rsp+r11*2+0x28] +XDIS 2605e: MISC BASE D54E8D4C5D29 lea r25, ptr [rbp+r11*2+0x29] +XDIS 26064: MISC BASE D54E8D4C5E2A lea r25, ptr [rsi+r11*2+0x2a] +XDIS 2606a: MISC BASE D54E8D4C5F2B lea r25, ptr [rdi+r11*2+0x2b] +XDIS 26070: MISC BASE D54F8D4C582C lea r25, ptr [r8+r11*2+0x2c] +XDIS 26076: MISC BASE D54F8D4C592D lea r25, ptr [r9+r11*2+0x2d] +XDIS 2607c: MISC BASE D54F8D4C5A2E lea r25, ptr [r10+r11*2+0x2e] +XDIS 26082: MISC BASE D54F8D4C5B2F lea r25, ptr [r11+r11*2+0x2f] +XDIS 26088: MISC BASE D54F8D4C5C30 lea r25, ptr [r12+r11*2+0x30] +XDIS 2608e: MISC BASE D54F8D4C5D31 lea r25, ptr [r13+r11*2+0x31] +XDIS 26094: MISC BASE D54F8D4C5E32 lea r25, ptr [r14+r11*2+0x32] +XDIS 2609a: MISC BASE D54F8D4C5F33 lea r25, ptr [r15+r11*2+0x33] +XDIS 260a0: MISC BASE D55E8D4C5834 lea r25, ptr [r16+r11*2+0x34] +XDIS 260a6: MISC BASE D55E8D4C5935 lea r25, ptr [r17+r11*2+0x35] +XDIS 260ac: MISC BASE D55E8D4C5A36 lea r25, ptr [r18+r11*2+0x36] +XDIS 260b2: MISC BASE D55E8D4C5B37 lea r25, ptr [r19+r11*2+0x37] +XDIS 260b8: MISC BASE D55E8D4C5C38 lea r25, ptr [r20+r11*2+0x38] +XDIS 260be: MISC BASE D55E8D4C5D39 lea r25, ptr [r21+r11*2+0x39] +XDIS 260c4: MISC BASE D55E8D4C5E3A lea r25, ptr [r22+r11*2+0x3a] +XDIS 260ca: MISC BASE D55E8D4C5F3B lea r25, ptr [r23+r11*2+0x3b] +XDIS 260d0: MISC BASE D55F8D4C583C lea r25, ptr [r24+r11*2+0x3c] +XDIS 260d6: MISC BASE D55F8D4C593D lea r25, ptr [r25+r11*2+0x3d] +XDIS 260dc: MISC BASE D55F8D4C5A3E lea r25, ptr [r26+r11*2+0x3e] +XDIS 260e2: MISC BASE D55F8D4C5B3F lea r25, ptr [r27+r11*2+0x3f] +XDIS 260e8: MISC BASE D55F8D4C5C40 lea r25, ptr [r28+r11*2+0x40] +XDIS 260ee: MISC BASE D55F8D4C5D41 lea r25, ptr [r29+r11*2+0x41] +XDIS 260f4: MISC BASE D55F8D4C5E42 lea r25, ptr [r30+r11*2+0x42] +XDIS 260fa: MISC BASE D55F8D4C5F43 lea r25, ptr [r31+r11*2+0x43] +XDIS 26100: MISC BASE D54E8D4C6025 lea r25, ptr [rax+r12*2+0x25] +XDIS 26106: MISC BASE D54E8D4C6126 lea r25, ptr [rcx+r12*2+0x26] +XDIS 2610c: MISC BASE D54E8D4C6227 lea r25, ptr [rdx+r12*2+0x27] +XDIS 26112: MISC BASE D54E8D4C6328 lea r25, ptr [rbx+r12*2+0x28] +XDIS 26118: MISC BASE D54E8D4C6429 lea r25, ptr [rsp+r12*2+0x29] +XDIS 2611e: MISC BASE D54E8D4C652A lea r25, ptr [rbp+r12*2+0x2a] +XDIS 26124: MISC BASE D54E8D4C662B lea r25, ptr [rsi+r12*2+0x2b] +XDIS 2612a: MISC BASE D54E8D4C672C lea r25, ptr [rdi+r12*2+0x2c] +XDIS 26130: MISC BASE D54F8D4C602D lea r25, ptr [r8+r12*2+0x2d] +XDIS 26136: MISC BASE D54F8D4C612E lea r25, ptr [r9+r12*2+0x2e] +XDIS 2613c: MISC BASE D54F8D4C622F lea r25, ptr [r10+r12*2+0x2f] +XDIS 26142: MISC BASE D54F8D4C6330 lea r25, ptr [r11+r12*2+0x30] +XDIS 26148: MISC BASE D54F8D4C6431 lea r25, ptr [r12+r12*2+0x31] +XDIS 2614e: MISC BASE D54F8D4C6532 lea r25, ptr [r13+r12*2+0x32] +XDIS 26154: MISC BASE D54F8D4C6633 lea r25, ptr [r14+r12*2+0x33] +XDIS 2615a: MISC BASE D54F8D4C6734 lea r25, ptr [r15+r12*2+0x34] +XDIS 26160: MISC BASE D55E8D4C6035 lea r25, ptr [r16+r12*2+0x35] +XDIS 26166: MISC BASE D55E8D4C6136 lea r25, ptr [r17+r12*2+0x36] +XDIS 2616c: MISC BASE D55E8D4C6237 lea r25, ptr [r18+r12*2+0x37] +XDIS 26172: MISC BASE D55E8D4C6338 lea r25, ptr [r19+r12*2+0x38] +XDIS 26178: MISC BASE D55E8D4C6439 lea r25, ptr [r20+r12*2+0x39] +XDIS 2617e: MISC BASE D55E8D4C653A lea r25, ptr [r21+r12*2+0x3a] +XDIS 26184: MISC BASE D55E8D4C663B lea r25, ptr [r22+r12*2+0x3b] +XDIS 2618a: MISC BASE D55E8D4C673C lea r25, ptr [r23+r12*2+0x3c] +XDIS 26190: MISC BASE D55F8D4C603D lea r25, ptr [r24+r12*2+0x3d] +XDIS 26196: MISC BASE D55F8D4C613E lea r25, ptr [r25+r12*2+0x3e] +XDIS 2619c: MISC BASE D55F8D4C623F lea r25, ptr [r26+r12*2+0x3f] +XDIS 261a2: MISC BASE D55F8D4C6340 lea r25, ptr [r27+r12*2+0x40] +XDIS 261a8: MISC BASE D55F8D4C6441 lea r25, ptr [r28+r12*2+0x41] +XDIS 261ae: MISC BASE D55F8D4C6542 lea r25, ptr [r29+r12*2+0x42] +XDIS 261b4: MISC BASE D55F8D4C6643 lea r25, ptr [r30+r12*2+0x43] +XDIS 261ba: MISC BASE D55F8D4C6744 lea r25, ptr [r31+r12*2+0x44] +XDIS 261c0: MISC BASE D54E8D4C6826 lea r25, ptr [rax+r13*2+0x26] +XDIS 261c6: MISC BASE D54E8D4C6927 lea r25, ptr [rcx+r13*2+0x27] +XDIS 261cc: MISC BASE D54E8D4C6A28 lea r25, ptr [rdx+r13*2+0x28] +XDIS 261d2: MISC BASE D54E8D4C6B29 lea r25, ptr [rbx+r13*2+0x29] +XDIS 261d8: MISC BASE D54E8D4C6C2A lea r25, ptr [rsp+r13*2+0x2a] +XDIS 261de: MISC BASE D54E8D4C6D2B lea r25, ptr [rbp+r13*2+0x2b] +XDIS 261e4: MISC BASE D54E8D4C6E2C lea r25, ptr [rsi+r13*2+0x2c] +XDIS 261ea: MISC BASE D54E8D4C6F2D lea r25, ptr [rdi+r13*2+0x2d] +XDIS 261f0: MISC BASE D54F8D4C682E lea r25, ptr [r8+r13*2+0x2e] +XDIS 261f6: MISC BASE D54F8D4C692F lea r25, ptr [r9+r13*2+0x2f] +XDIS 261fc: MISC BASE D54F8D4C6A30 lea r25, ptr [r10+r13*2+0x30] +XDIS 26202: MISC BASE D54F8D4C6B31 lea r25, ptr [r11+r13*2+0x31] +XDIS 26208: MISC BASE D54F8D4C6C32 lea r25, ptr [r12+r13*2+0x32] +XDIS 2620e: MISC BASE D54F8D4C6D33 lea r25, ptr [r13+r13*2+0x33] +XDIS 26214: MISC BASE D54F8D4C6E34 lea r25, ptr [r14+r13*2+0x34] +XDIS 2621a: MISC BASE D54F8D4C6F35 lea r25, ptr [r15+r13*2+0x35] +XDIS 26220: MISC BASE D55E8D4C6836 lea r25, ptr [r16+r13*2+0x36] +XDIS 26226: MISC BASE D55E8D4C6937 lea r25, ptr [r17+r13*2+0x37] +XDIS 2622c: MISC BASE D55E8D4C6A38 lea r25, ptr [r18+r13*2+0x38] +XDIS 26232: MISC BASE D55E8D4C6B39 lea r25, ptr [r19+r13*2+0x39] +XDIS 26238: MISC BASE D55E8D4C6C3A lea r25, ptr [r20+r13*2+0x3a] +XDIS 2623e: MISC BASE D55E8D4C6D3B lea r25, ptr [r21+r13*2+0x3b] +XDIS 26244: MISC BASE D55E8D4C6E3C lea r25, ptr [r22+r13*2+0x3c] +XDIS 2624a: MISC BASE D55E8D4C6F3D lea r25, ptr [r23+r13*2+0x3d] +XDIS 26250: MISC BASE D55F8D4C683E lea r25, ptr [r24+r13*2+0x3e] +XDIS 26256: MISC BASE D55F8D4C693F lea r25, ptr [r25+r13*2+0x3f] +XDIS 2625c: MISC BASE D55F8D4C6A40 lea r25, ptr [r26+r13*2+0x40] +XDIS 26262: MISC BASE D55F8D4C6B41 lea r25, ptr [r27+r13*2+0x41] +XDIS 26268: MISC BASE D55F8D4C6C42 lea r25, ptr [r28+r13*2+0x42] +XDIS 2626e: MISC BASE D55F8D4C6D43 lea r25, ptr [r29+r13*2+0x43] +XDIS 26274: MISC BASE D55F8D4C6E44 lea r25, ptr [r30+r13*2+0x44] +XDIS 2627a: MISC BASE D55F8D4C6F45 lea r25, ptr [r31+r13*2+0x45] +XDIS 26280: MISC BASE D54E8D4C7027 lea r25, ptr [rax+r14*2+0x27] +XDIS 26286: MISC BASE D54E8D4C7128 lea r25, ptr [rcx+r14*2+0x28] +XDIS 2628c: MISC BASE D54E8D4C7229 lea r25, ptr [rdx+r14*2+0x29] +XDIS 26292: MISC BASE D54E8D4C732A lea r25, ptr [rbx+r14*2+0x2a] +XDIS 26298: MISC BASE D54E8D4C742B lea r25, ptr [rsp+r14*2+0x2b] +XDIS 2629e: MISC BASE D54E8D4C752C lea r25, ptr [rbp+r14*2+0x2c] +XDIS 262a4: MISC BASE D54E8D4C762D lea r25, ptr [rsi+r14*2+0x2d] +XDIS 262aa: MISC BASE D54E8D4C772E lea r25, ptr [rdi+r14*2+0x2e] +XDIS 262b0: MISC BASE D54F8D4C702F lea r25, ptr [r8+r14*2+0x2f] +XDIS 262b6: MISC BASE D54F8D4C7130 lea r25, ptr [r9+r14*2+0x30] +XDIS 262bc: MISC BASE D54F8D4C7231 lea r25, ptr [r10+r14*2+0x31] +XDIS 262c2: MISC BASE D54F8D4C7332 lea r25, ptr [r11+r14*2+0x32] +XDIS 262c8: MISC BASE D54F8D4C7433 lea r25, ptr [r12+r14*2+0x33] +XDIS 262ce: MISC BASE D54F8D4C7534 lea r25, ptr [r13+r14*2+0x34] +XDIS 262d4: MISC BASE D54F8D4C7635 lea r25, ptr [r14+r14*2+0x35] +XDIS 262da: MISC BASE D54F8D4C7736 lea r25, ptr [r15+r14*2+0x36] +XDIS 262e0: MISC BASE D55E8D4C7037 lea r25, ptr [r16+r14*2+0x37] +XDIS 262e6: MISC BASE D55E8D4C7138 lea r25, ptr [r17+r14*2+0x38] +XDIS 262ec: MISC BASE D55E8D4C7239 lea r25, ptr [r18+r14*2+0x39] +XDIS 262f2: MISC BASE D55E8D4C733A lea r25, ptr [r19+r14*2+0x3a] +XDIS 262f8: MISC BASE D55E8D4C743B lea r25, ptr [r20+r14*2+0x3b] +XDIS 262fe: MISC BASE D55E8D4C753C lea r25, ptr [r21+r14*2+0x3c] +XDIS 26304: MISC BASE D55E8D4C763D lea r25, ptr [r22+r14*2+0x3d] +XDIS 2630a: MISC BASE D55E8D4C773E lea r25, ptr [r23+r14*2+0x3e] +XDIS 26310: MISC BASE D55F8D4C703F lea r25, ptr [r24+r14*2+0x3f] +XDIS 26316: MISC BASE D55F8D4C7140 lea r25, ptr [r25+r14*2+0x40] +XDIS 2631c: MISC BASE D55F8D4C7241 lea r25, ptr [r26+r14*2+0x41] +XDIS 26322: MISC BASE D55F8D4C7342 lea r25, ptr [r27+r14*2+0x42] +XDIS 26328: MISC BASE D55F8D4C7443 lea r25, ptr [r28+r14*2+0x43] +XDIS 2632e: MISC BASE D55F8D4C7544 lea r25, ptr [r29+r14*2+0x44] +XDIS 26334: MISC BASE D55F8D4C7645 lea r25, ptr [r30+r14*2+0x45] +XDIS 2633a: MISC BASE D55F8D4C7746 lea r25, ptr [r31+r14*2+0x46] +XDIS 26340: MISC BASE D54E8D4C7828 lea r25, ptr [rax+r15*2+0x28] +XDIS 26346: MISC BASE D54E8D4C7929 lea r25, ptr [rcx+r15*2+0x29] +XDIS 2634c: MISC BASE D54E8D4C7A2A lea r25, ptr [rdx+r15*2+0x2a] +XDIS 26352: MISC BASE D54E8D4C7B2B lea r25, ptr [rbx+r15*2+0x2b] +XDIS 26358: MISC BASE D54E8D4C7C2C lea r25, ptr [rsp+r15*2+0x2c] +XDIS 2635e: MISC BASE D54E8D4C7D2D lea r25, ptr [rbp+r15*2+0x2d] +XDIS 26364: MISC BASE D54E8D4C7E2E lea r25, ptr [rsi+r15*2+0x2e] +XDIS 2636a: MISC BASE D54E8D4C7F2F lea r25, ptr [rdi+r15*2+0x2f] +XDIS 26370: MISC BASE D54F8D4C7830 lea r25, ptr [r8+r15*2+0x30] +XDIS 26376: MISC BASE D54F8D4C7931 lea r25, ptr [r9+r15*2+0x31] +XDIS 2637c: MISC BASE D54F8D4C7A32 lea r25, ptr [r10+r15*2+0x32] +XDIS 26382: MISC BASE D54F8D4C7B33 lea r25, ptr [r11+r15*2+0x33] +XDIS 26388: MISC BASE D54F8D4C7C34 lea r25, ptr [r12+r15*2+0x34] +XDIS 2638e: MISC BASE D54F8D4C7D35 lea r25, ptr [r13+r15*2+0x35] +XDIS 26394: MISC BASE D54F8D4C7E36 lea r25, ptr [r14+r15*2+0x36] +XDIS 2639a: MISC BASE D54F8D4C7F37 lea r25, ptr [r15+r15*2+0x37] +XDIS 263a0: MISC BASE D55E8D4C7838 lea r25, ptr [r16+r15*2+0x38] +XDIS 263a6: MISC BASE D55E8D4C7939 lea r25, ptr [r17+r15*2+0x39] +XDIS 263ac: MISC BASE D55E8D4C7A3A lea r25, ptr [r18+r15*2+0x3a] +XDIS 263b2: MISC BASE D55E8D4C7B3B lea r25, ptr [r19+r15*2+0x3b] +XDIS 263b8: MISC BASE D55E8D4C7C3C lea r25, ptr [r20+r15*2+0x3c] +XDIS 263be: MISC BASE D55E8D4C7D3D lea r25, ptr [r21+r15*2+0x3d] +XDIS 263c4: MISC BASE D55E8D4C7E3E lea r25, ptr [r22+r15*2+0x3e] +XDIS 263ca: MISC BASE D55E8D4C7F3F lea r25, ptr [r23+r15*2+0x3f] +XDIS 263d0: MISC BASE D55F8D4C7840 lea r25, ptr [r24+r15*2+0x40] +XDIS 263d6: MISC BASE D55F8D4C7941 lea r25, ptr [r25+r15*2+0x41] +XDIS 263dc: MISC BASE D55F8D4C7A42 lea r25, ptr [r26+r15*2+0x42] +XDIS 263e2: MISC BASE D55F8D4C7B43 lea r25, ptr [r27+r15*2+0x43] +XDIS 263e8: MISC BASE D55F8D4C7C44 lea r25, ptr [r28+r15*2+0x44] +XDIS 263ee: MISC BASE D55F8D4C7D45 lea r25, ptr [r29+r15*2+0x45] +XDIS 263f4: MISC BASE D55F8D4C7E46 lea r25, ptr [r30+r15*2+0x46] +XDIS 263fa: MISC BASE D55F8D4C7F47 lea r25, ptr [r31+r15*2+0x47] +XDIS 26400: MISC BASE D56C8D4C4029 lea r25, ptr [rax+r16*2+0x29] +XDIS 26406: MISC BASE D56C8D4C412A lea r25, ptr [rcx+r16*2+0x2a] +XDIS 2640c: MISC BASE D56C8D4C422B lea r25, ptr [rdx+r16*2+0x2b] +XDIS 26412: MISC BASE D56C8D4C432C lea r25, ptr [rbx+r16*2+0x2c] +XDIS 26418: MISC BASE D56C8D4C442D lea r25, ptr [rsp+r16*2+0x2d] +XDIS 2641e: MISC BASE D56C8D4C452E lea r25, ptr [rbp+r16*2+0x2e] +XDIS 26424: MISC BASE D56C8D4C462F lea r25, ptr [rsi+r16*2+0x2f] +XDIS 2642a: MISC BASE D56C8D4C4730 lea r25, ptr [rdi+r16*2+0x30] +XDIS 26430: MISC BASE D56D8D4C4031 lea r25, ptr [r8+r16*2+0x31] +XDIS 26436: MISC BASE D56D8D4C4132 lea r25, ptr [r9+r16*2+0x32] +XDIS 2643c: MISC BASE D56D8D4C4233 lea r25, ptr [r10+r16*2+0x33] +XDIS 26442: MISC BASE D56D8D4C4334 lea r25, ptr [r11+r16*2+0x34] +XDIS 26448: MISC BASE D56D8D4C4435 lea r25, ptr [r12+r16*2+0x35] +XDIS 2644e: MISC BASE D56D8D4C4536 lea r25, ptr [r13+r16*2+0x36] +XDIS 26454: MISC BASE D56D8D4C4637 lea r25, ptr [r14+r16*2+0x37] +XDIS 2645a: MISC BASE D56D8D4C4738 lea r25, ptr [r15+r16*2+0x38] +XDIS 26460: MISC BASE D57C8D4C4039 lea r25, ptr [r16+r16*2+0x39] +XDIS 26466: MISC BASE D57C8D4C413A lea r25, ptr [r17+r16*2+0x3a] +XDIS 2646c: MISC BASE D57C8D4C423B lea r25, ptr [r18+r16*2+0x3b] +XDIS 26472: MISC BASE D57C8D4C433C lea r25, ptr [r19+r16*2+0x3c] +XDIS 26478: MISC BASE D57C8D4C443D lea r25, ptr [r20+r16*2+0x3d] +XDIS 2647e: MISC BASE D57C8D4C453E lea r25, ptr [r21+r16*2+0x3e] +XDIS 26484: MISC BASE D57C8D4C463F lea r25, ptr [r22+r16*2+0x3f] +XDIS 2648a: MISC BASE D57C8D4C4740 lea r25, ptr [r23+r16*2+0x40] +XDIS 26490: MISC BASE D57D8D4C4041 lea r25, ptr [r24+r16*2+0x41] +XDIS 26496: MISC BASE D57D8D4C4142 lea r25, ptr [r25+r16*2+0x42] +XDIS 2649c: MISC BASE D57D8D4C4243 lea r25, ptr [r26+r16*2+0x43] +XDIS 264a2: MISC BASE D57D8D4C4344 lea r25, ptr [r27+r16*2+0x44] +XDIS 264a8: MISC BASE D57D8D4C4445 lea r25, ptr [r28+r16*2+0x45] +XDIS 264ae: MISC BASE D57D8D4C4546 lea r25, ptr [r29+r16*2+0x46] +XDIS 264b4: MISC BASE D57D8D4C4647 lea r25, ptr [r30+r16*2+0x47] +XDIS 264ba: MISC BASE D57D8D4C4748 lea r25, ptr [r31+r16*2+0x48] +XDIS 264c0: MISC BASE D56C8D4C482A lea r25, ptr [rax+r17*2+0x2a] +XDIS 264c6: MISC BASE D56C8D4C492B lea r25, ptr [rcx+r17*2+0x2b] +XDIS 264cc: MISC BASE D56C8D4C4A2C lea r25, ptr [rdx+r17*2+0x2c] +XDIS 264d2: MISC BASE D56C8D4C4B2D lea r25, ptr [rbx+r17*2+0x2d] +XDIS 264d8: MISC BASE D56C8D4C4C2E lea r25, ptr [rsp+r17*2+0x2e] +XDIS 264de: MISC BASE D56C8D4C4D2F lea r25, ptr [rbp+r17*2+0x2f] +XDIS 264e4: MISC BASE D56C8D4C4E30 lea r25, ptr [rsi+r17*2+0x30] +XDIS 264ea: MISC BASE D56C8D4C4F31 lea r25, ptr [rdi+r17*2+0x31] +XDIS 264f0: MISC BASE D56D8D4C4832 lea r25, ptr [r8+r17*2+0x32] +XDIS 264f6: MISC BASE D56D8D4C4933 lea r25, ptr [r9+r17*2+0x33] +XDIS 264fc: MISC BASE D56D8D4C4A34 lea r25, ptr [r10+r17*2+0x34] +XDIS 26502: MISC BASE D56D8D4C4B35 lea r25, ptr [r11+r17*2+0x35] +XDIS 26508: MISC BASE D56D8D4C4C36 lea r25, ptr [r12+r17*2+0x36] +XDIS 2650e: MISC BASE D56D8D4C4D37 lea r25, ptr [r13+r17*2+0x37] +XDIS 26514: MISC BASE D56D8D4C4E38 lea r25, ptr [r14+r17*2+0x38] +XDIS 2651a: MISC BASE D56D8D4C4F39 lea r25, ptr [r15+r17*2+0x39] +XDIS 26520: MISC BASE D57C8D4C483A lea r25, ptr [r16+r17*2+0x3a] +XDIS 26526: MISC BASE D57C8D4C493B lea r25, ptr [r17+r17*2+0x3b] +XDIS 2652c: MISC BASE D57C8D4C4A3C lea r25, ptr [r18+r17*2+0x3c] +XDIS 26532: MISC BASE D57C8D4C4B3D lea r25, ptr [r19+r17*2+0x3d] +XDIS 26538: MISC BASE D57C8D4C4C3E lea r25, ptr [r20+r17*2+0x3e] +XDIS 2653e: MISC BASE D57C8D4C4D3F lea r25, ptr [r21+r17*2+0x3f] +XDIS 26544: MISC BASE D57C8D4C4E40 lea r25, ptr [r22+r17*2+0x40] +XDIS 2654a: MISC BASE D57C8D4C4F41 lea r25, ptr [r23+r17*2+0x41] +XDIS 26550: MISC BASE D57D8D4C4842 lea r25, ptr [r24+r17*2+0x42] +XDIS 26556: MISC BASE D57D8D4C4943 lea r25, ptr [r25+r17*2+0x43] +XDIS 2655c: MISC BASE D57D8D4C4A44 lea r25, ptr [r26+r17*2+0x44] +XDIS 26562: MISC BASE D57D8D4C4B45 lea r25, ptr [r27+r17*2+0x45] +XDIS 26568: MISC BASE D57D8D4C4C46 lea r25, ptr [r28+r17*2+0x46] +XDIS 2656e: MISC BASE D57D8D4C4D47 lea r25, ptr [r29+r17*2+0x47] +XDIS 26574: MISC BASE D57D8D4C4E48 lea r25, ptr [r30+r17*2+0x48] +XDIS 2657a: MISC BASE D57D8D4C4F49 lea r25, ptr [r31+r17*2+0x49] +XDIS 26580: MISC BASE D56C8D4C502B lea r25, ptr [rax+r18*2+0x2b] +XDIS 26586: MISC BASE D56C8D4C512C lea r25, ptr [rcx+r18*2+0x2c] +XDIS 2658c: MISC BASE D56C8D4C522D lea r25, ptr [rdx+r18*2+0x2d] +XDIS 26592: MISC BASE D56C8D4C532E lea r25, ptr [rbx+r18*2+0x2e] +XDIS 26598: MISC BASE D56C8D4C542F lea r25, ptr [rsp+r18*2+0x2f] +XDIS 2659e: MISC BASE D56C8D4C5530 lea r25, ptr [rbp+r18*2+0x30] +XDIS 265a4: MISC BASE D56C8D4C5631 lea r25, ptr [rsi+r18*2+0x31] +XDIS 265aa: MISC BASE D56C8D4C5732 lea r25, ptr [rdi+r18*2+0x32] +XDIS 265b0: MISC BASE D56D8D4C5033 lea r25, ptr [r8+r18*2+0x33] +XDIS 265b6: MISC BASE D56D8D4C5134 lea r25, ptr [r9+r18*2+0x34] +XDIS 265bc: MISC BASE D56D8D4C5235 lea r25, ptr [r10+r18*2+0x35] +XDIS 265c2: MISC BASE D56D8D4C5336 lea r25, ptr [r11+r18*2+0x36] +XDIS 265c8: MISC BASE D56D8D4C5437 lea r25, ptr [r12+r18*2+0x37] +XDIS 265ce: MISC BASE D56D8D4C5538 lea r25, ptr [r13+r18*2+0x38] +XDIS 265d4: MISC BASE D56D8D4C5639 lea r25, ptr [r14+r18*2+0x39] +XDIS 265da: MISC BASE D56D8D4C573A lea r25, ptr [r15+r18*2+0x3a] +XDIS 265e0: MISC BASE D57C8D4C503B lea r25, ptr [r16+r18*2+0x3b] +XDIS 265e6: MISC BASE D57C8D4C513C lea r25, ptr [r17+r18*2+0x3c] +XDIS 265ec: MISC BASE D57C8D4C523D lea r25, ptr [r18+r18*2+0x3d] +XDIS 265f2: MISC BASE D57C8D4C533E lea r25, ptr [r19+r18*2+0x3e] +XDIS 265f8: MISC BASE D57C8D4C543F lea r25, ptr [r20+r18*2+0x3f] +XDIS 265fe: MISC BASE D57C8D4C5540 lea r25, ptr [r21+r18*2+0x40] +XDIS 26604: MISC BASE D57C8D4C5641 lea r25, ptr [r22+r18*2+0x41] +XDIS 2660a: MISC BASE D57C8D4C5742 lea r25, ptr [r23+r18*2+0x42] +XDIS 26610: MISC BASE D57D8D4C5043 lea r25, ptr [r24+r18*2+0x43] +XDIS 26616: MISC BASE D57D8D4C5144 lea r25, ptr [r25+r18*2+0x44] +XDIS 2661c: MISC BASE D57D8D4C5245 lea r25, ptr [r26+r18*2+0x45] +XDIS 26622: MISC BASE D57D8D4C5346 lea r25, ptr [r27+r18*2+0x46] +XDIS 26628: MISC BASE D57D8D4C5447 lea r25, ptr [r28+r18*2+0x47] +XDIS 2662e: MISC BASE D57D8D4C5548 lea r25, ptr [r29+r18*2+0x48] +XDIS 26634: MISC BASE D57D8D4C5649 lea r25, ptr [r30+r18*2+0x49] +XDIS 2663a: MISC BASE D57D8D4C574A lea r25, ptr [r31+r18*2+0x4a] +XDIS 26640: MISC BASE D56C8D4C582C lea r25, ptr [rax+r19*2+0x2c] +XDIS 26646: MISC BASE D56C8D4C592D lea r25, ptr [rcx+r19*2+0x2d] +XDIS 2664c: MISC BASE D56C8D4C5A2E lea r25, ptr [rdx+r19*2+0x2e] +XDIS 26652: MISC BASE D56C8D4C5B2F lea r25, ptr [rbx+r19*2+0x2f] +XDIS 26658: MISC BASE D56C8D4C5C30 lea r25, ptr [rsp+r19*2+0x30] +XDIS 2665e: MISC BASE D56C8D4C5D31 lea r25, ptr [rbp+r19*2+0x31] +XDIS 26664: MISC BASE D56C8D4C5E32 lea r25, ptr [rsi+r19*2+0x32] +XDIS 2666a: MISC BASE D56C8D4C5F33 lea r25, ptr [rdi+r19*2+0x33] +XDIS 26670: MISC BASE D56D8D4C5834 lea r25, ptr [r8+r19*2+0x34] +XDIS 26676: MISC BASE D56D8D4C5935 lea r25, ptr [r9+r19*2+0x35] +XDIS 2667c: MISC BASE D56D8D4C5A36 lea r25, ptr [r10+r19*2+0x36] +XDIS 26682: MISC BASE D56D8D4C5B37 lea r25, ptr [r11+r19*2+0x37] +XDIS 26688: MISC BASE D56D8D4C5C38 lea r25, ptr [r12+r19*2+0x38] +XDIS 2668e: MISC BASE D56D8D4C5D39 lea r25, ptr [r13+r19*2+0x39] +XDIS 26694: MISC BASE D56D8D4C5E3A lea r25, ptr [r14+r19*2+0x3a] +XDIS 2669a: MISC BASE D56D8D4C5F3B lea r25, ptr [r15+r19*2+0x3b] +XDIS 266a0: MISC BASE D57C8D4C583C lea r25, ptr [r16+r19*2+0x3c] +XDIS 266a6: MISC BASE D57C8D4C593D lea r25, ptr [r17+r19*2+0x3d] +XDIS 266ac: MISC BASE D57C8D4C5A3E lea r25, ptr [r18+r19*2+0x3e] +XDIS 266b2: MISC BASE D57C8D4C5B3F lea r25, ptr [r19+r19*2+0x3f] +XDIS 266b8: MISC BASE D57C8D4C5C40 lea r25, ptr [r20+r19*2+0x40] +XDIS 266be: MISC BASE D57C8D4C5D41 lea r25, ptr [r21+r19*2+0x41] +XDIS 266c4: MISC BASE D57C8D4C5E42 lea r25, ptr [r22+r19*2+0x42] +XDIS 266ca: MISC BASE D57C8D4C5F43 lea r25, ptr [r23+r19*2+0x43] +XDIS 266d0: MISC BASE D57D8D4C5844 lea r25, ptr [r24+r19*2+0x44] +XDIS 266d6: MISC BASE D57D8D4C5945 lea r25, ptr [r25+r19*2+0x45] +XDIS 266dc: MISC BASE D57D8D4C5A46 lea r25, ptr [r26+r19*2+0x46] +XDIS 266e2: MISC BASE D57D8D4C5B47 lea r25, ptr [r27+r19*2+0x47] +XDIS 266e8: MISC BASE D57D8D4C5C48 lea r25, ptr [r28+r19*2+0x48] +XDIS 266ee: MISC BASE D57D8D4C5D49 lea r25, ptr [r29+r19*2+0x49] +XDIS 266f4: MISC BASE D57D8D4C5E4A lea r25, ptr [r30+r19*2+0x4a] +XDIS 266fa: MISC BASE D57D8D4C5F4B lea r25, ptr [r31+r19*2+0x4b] +XDIS 26700: MISC BASE D56C8D4C602D lea r25, ptr [rax+r20*2+0x2d] +XDIS 26706: MISC BASE D56C8D4C612E lea r25, ptr [rcx+r20*2+0x2e] +XDIS 2670c: MISC BASE D56C8D4C622F lea r25, ptr [rdx+r20*2+0x2f] +XDIS 26712: MISC BASE D56C8D4C6330 lea r25, ptr [rbx+r20*2+0x30] +XDIS 26718: MISC BASE D56C8D4C6431 lea r25, ptr [rsp+r20*2+0x31] +XDIS 2671e: MISC BASE D56C8D4C6532 lea r25, ptr [rbp+r20*2+0x32] +XDIS 26724: MISC BASE D56C8D4C6633 lea r25, ptr [rsi+r20*2+0x33] +XDIS 2672a: MISC BASE D56C8D4C6734 lea r25, ptr [rdi+r20*2+0x34] +XDIS 26730: MISC BASE D56D8D4C6035 lea r25, ptr [r8+r20*2+0x35] +XDIS 26736: MISC BASE D56D8D4C6136 lea r25, ptr [r9+r20*2+0x36] +XDIS 2673c: MISC BASE D56D8D4C6237 lea r25, ptr [r10+r20*2+0x37] +XDIS 26742: MISC BASE D56D8D4C6338 lea r25, ptr [r11+r20*2+0x38] +XDIS 26748: MISC BASE D56D8D4C6439 lea r25, ptr [r12+r20*2+0x39] +XDIS 2674e: MISC BASE D56D8D4C653A lea r25, ptr [r13+r20*2+0x3a] +XDIS 26754: MISC BASE D56D8D4C663B lea r25, ptr [r14+r20*2+0x3b] +XDIS 2675a: MISC BASE D56D8D4C673C lea r25, ptr [r15+r20*2+0x3c] +XDIS 26760: MISC BASE D57C8D4C603D lea r25, ptr [r16+r20*2+0x3d] +XDIS 26766: MISC BASE D57C8D4C613E lea r25, ptr [r17+r20*2+0x3e] +XDIS 2676c: MISC BASE D57C8D4C623F lea r25, ptr [r18+r20*2+0x3f] +XDIS 26772: MISC BASE D57C8D4C6340 lea r25, ptr [r19+r20*2+0x40] +XDIS 26778: MISC BASE D57C8D4C6441 lea r25, ptr [r20+r20*2+0x41] +XDIS 2677e: MISC BASE D57C8D4C6542 lea r25, ptr [r21+r20*2+0x42] +XDIS 26784: MISC BASE D57C8D4C6643 lea r25, ptr [r22+r20*2+0x43] +XDIS 2678a: MISC BASE D57C8D4C6744 lea r25, ptr [r23+r20*2+0x44] +XDIS 26790: MISC BASE D57D8D4C6045 lea r25, ptr [r24+r20*2+0x45] +XDIS 26796: MISC BASE D57D8D4C6146 lea r25, ptr [r25+r20*2+0x46] +XDIS 2679c: MISC BASE D57D8D4C6247 lea r25, ptr [r26+r20*2+0x47] +XDIS 267a2: MISC BASE D57D8D4C6348 lea r25, ptr [r27+r20*2+0x48] +XDIS 267a8: MISC BASE D57D8D4C6449 lea r25, ptr [r28+r20*2+0x49] +XDIS 267ae: MISC BASE D57D8D4C654A lea r25, ptr [r29+r20*2+0x4a] +XDIS 267b4: MISC BASE D57D8D4C664B lea r25, ptr [r30+r20*2+0x4b] +XDIS 267ba: MISC BASE D57D8D4C674C lea r25, ptr [r31+r20*2+0x4c] +XDIS 267c0: MISC BASE D56C8D4C682E lea r25, ptr [rax+r21*2+0x2e] +XDIS 267c6: MISC BASE D56C8D4C692F lea r25, ptr [rcx+r21*2+0x2f] +XDIS 267cc: MISC BASE D56C8D4C6A30 lea r25, ptr [rdx+r21*2+0x30] +XDIS 267d2: MISC BASE D56C8D4C6B31 lea r25, ptr [rbx+r21*2+0x31] +XDIS 267d8: MISC BASE D56C8D4C6C32 lea r25, ptr [rsp+r21*2+0x32] +XDIS 267de: MISC BASE D56C8D4C6D33 lea r25, ptr [rbp+r21*2+0x33] +XDIS 267e4: MISC BASE D56C8D4C6E34 lea r25, ptr [rsi+r21*2+0x34] +XDIS 267ea: MISC BASE D56C8D4C6F35 lea r25, ptr [rdi+r21*2+0x35] +XDIS 267f0: MISC BASE D56D8D4C6836 lea r25, ptr [r8+r21*2+0x36] +XDIS 267f6: MISC BASE D56D8D4C6937 lea r25, ptr [r9+r21*2+0x37] +XDIS 267fc: MISC BASE D56D8D4C6A38 lea r25, ptr [r10+r21*2+0x38] +XDIS 26802: MISC BASE D56D8D4C6B39 lea r25, ptr [r11+r21*2+0x39] +XDIS 26808: MISC BASE D56D8D4C6C3A lea r25, ptr [r12+r21*2+0x3a] +XDIS 2680e: MISC BASE D56D8D4C6D3B lea r25, ptr [r13+r21*2+0x3b] +XDIS 26814: MISC BASE D56D8D4C6E3C lea r25, ptr [r14+r21*2+0x3c] +XDIS 2681a: MISC BASE D56D8D4C6F3D lea r25, ptr [r15+r21*2+0x3d] +XDIS 26820: MISC BASE D57C8D4C683E lea r25, ptr [r16+r21*2+0x3e] +XDIS 26826: MISC BASE D57C8D4C693F lea r25, ptr [r17+r21*2+0x3f] +XDIS 2682c: MISC BASE D57C8D4C6A40 lea r25, ptr [r18+r21*2+0x40] +XDIS 26832: MISC BASE D57C8D4C6B41 lea r25, ptr [r19+r21*2+0x41] +XDIS 26838: MISC BASE D57C8D4C6C42 lea r25, ptr [r20+r21*2+0x42] +XDIS 2683e: MISC BASE D57C8D4C6D43 lea r25, ptr [r21+r21*2+0x43] +XDIS 26844: MISC BASE D57C8D4C6E44 lea r25, ptr [r22+r21*2+0x44] +XDIS 2684a: MISC BASE D57C8D4C6F45 lea r25, ptr [r23+r21*2+0x45] +XDIS 26850: MISC BASE D57D8D4C6846 lea r25, ptr [r24+r21*2+0x46] +XDIS 26856: MISC BASE D57D8D4C6947 lea r25, ptr [r25+r21*2+0x47] +XDIS 2685c: MISC BASE D57D8D4C6A48 lea r25, ptr [r26+r21*2+0x48] +XDIS 26862: MISC BASE D57D8D4C6B49 lea r25, ptr [r27+r21*2+0x49] +XDIS 26868: MISC BASE D57D8D4C6C4A lea r25, ptr [r28+r21*2+0x4a] +XDIS 2686e: MISC BASE D57D8D4C6D4B lea r25, ptr [r29+r21*2+0x4b] +XDIS 26874: MISC BASE D57D8D4C6E4C lea r25, ptr [r30+r21*2+0x4c] +XDIS 2687a: MISC BASE D57D8D4C6F4D lea r25, ptr [r31+r21*2+0x4d] +XDIS 26880: MISC BASE D56C8D4C702F lea r25, ptr [rax+r22*2+0x2f] +XDIS 26886: MISC BASE D56C8D4C7130 lea r25, ptr [rcx+r22*2+0x30] +XDIS 2688c: MISC BASE D56C8D4C7231 lea r25, ptr [rdx+r22*2+0x31] +XDIS 26892: MISC BASE D56C8D4C7332 lea r25, ptr [rbx+r22*2+0x32] +XDIS 26898: MISC BASE D56C8D4C7433 lea r25, ptr [rsp+r22*2+0x33] +XDIS 2689e: MISC BASE D56C8D4C7534 lea r25, ptr [rbp+r22*2+0x34] +XDIS 268a4: MISC BASE D56C8D4C7635 lea r25, ptr [rsi+r22*2+0x35] +XDIS 268aa: MISC BASE D56C8D4C7736 lea r25, ptr [rdi+r22*2+0x36] +XDIS 268b0: MISC BASE D56D8D4C7037 lea r25, ptr [r8+r22*2+0x37] +XDIS 268b6: MISC BASE D56D8D4C7138 lea r25, ptr [r9+r22*2+0x38] +XDIS 268bc: MISC BASE D56D8D4C7239 lea r25, ptr [r10+r22*2+0x39] +XDIS 268c2: MISC BASE D56D8D4C733A lea r25, ptr [r11+r22*2+0x3a] +XDIS 268c8: MISC BASE D56D8D4C743B lea r25, ptr [r12+r22*2+0x3b] +XDIS 268ce: MISC BASE D56D8D4C753C lea r25, ptr [r13+r22*2+0x3c] +XDIS 268d4: MISC BASE D56D8D4C763D lea r25, ptr [r14+r22*2+0x3d] +XDIS 268da: MISC BASE D56D8D4C773E lea r25, ptr [r15+r22*2+0x3e] +XDIS 268e0: MISC BASE D57C8D4C703F lea r25, ptr [r16+r22*2+0x3f] +XDIS 268e6: MISC BASE D57C8D4C7140 lea r25, ptr [r17+r22*2+0x40] +XDIS 268ec: MISC BASE D57C8D4C7241 lea r25, ptr [r18+r22*2+0x41] +XDIS 268f2: MISC BASE D57C8D4C7342 lea r25, ptr [r19+r22*2+0x42] +XDIS 268f8: MISC BASE D57C8D4C7443 lea r25, ptr [r20+r22*2+0x43] +XDIS 268fe: MISC BASE D57C8D4C7544 lea r25, ptr [r21+r22*2+0x44] +XDIS 26904: MISC BASE D57C8D4C7645 lea r25, ptr [r22+r22*2+0x45] +XDIS 2690a: MISC BASE D57C8D4C7746 lea r25, ptr [r23+r22*2+0x46] +XDIS 26910: MISC BASE D57D8D4C7047 lea r25, ptr [r24+r22*2+0x47] +XDIS 26916: MISC BASE D57D8D4C7148 lea r25, ptr [r25+r22*2+0x48] +XDIS 2691c: MISC BASE D57D8D4C7249 lea r25, ptr [r26+r22*2+0x49] +XDIS 26922: MISC BASE D57D8D4C734A lea r25, ptr [r27+r22*2+0x4a] +XDIS 26928: MISC BASE D57D8D4C744B lea r25, ptr [r28+r22*2+0x4b] +XDIS 2692e: MISC BASE D57D8D4C754C lea r25, ptr [r29+r22*2+0x4c] +XDIS 26934: MISC BASE D57D8D4C764D lea r25, ptr [r30+r22*2+0x4d] +XDIS 2693a: MISC BASE D57D8D4C774E lea r25, ptr [r31+r22*2+0x4e] +XDIS 26940: MISC BASE D56C8D4C7830 lea r25, ptr [rax+r23*2+0x30] +XDIS 26946: MISC BASE D56C8D4C7931 lea r25, ptr [rcx+r23*2+0x31] +XDIS 2694c: MISC BASE D56C8D4C7A32 lea r25, ptr [rdx+r23*2+0x32] +XDIS 26952: MISC BASE D56C8D4C7B33 lea r25, ptr [rbx+r23*2+0x33] +XDIS 26958: MISC BASE D56C8D4C7C34 lea r25, ptr [rsp+r23*2+0x34] +XDIS 2695e: MISC BASE D56C8D4C7D35 lea r25, ptr [rbp+r23*2+0x35] +XDIS 26964: MISC BASE D56C8D4C7E36 lea r25, ptr [rsi+r23*2+0x36] +XDIS 2696a: MISC BASE D56C8D4C7F37 lea r25, ptr [rdi+r23*2+0x37] +XDIS 26970: MISC BASE D56D8D4C7838 lea r25, ptr [r8+r23*2+0x38] +XDIS 26976: MISC BASE D56D8D4C7939 lea r25, ptr [r9+r23*2+0x39] +XDIS 2697c: MISC BASE D56D8D4C7A3A lea r25, ptr [r10+r23*2+0x3a] +XDIS 26982: MISC BASE D56D8D4C7B3B lea r25, ptr [r11+r23*2+0x3b] +XDIS 26988: MISC BASE D56D8D4C7C3C lea r25, ptr [r12+r23*2+0x3c] +XDIS 2698e: MISC BASE D56D8D4C7D3D lea r25, ptr [r13+r23*2+0x3d] +XDIS 26994: MISC BASE D56D8D4C7E3E lea r25, ptr [r14+r23*2+0x3e] +XDIS 2699a: MISC BASE D56D8D4C7F3F lea r25, ptr [r15+r23*2+0x3f] +XDIS 269a0: MISC BASE D57C8D4C7840 lea r25, ptr [r16+r23*2+0x40] +XDIS 269a6: MISC BASE D57C8D4C7941 lea r25, ptr [r17+r23*2+0x41] +XDIS 269ac: MISC BASE D57C8D4C7A42 lea r25, ptr [r18+r23*2+0x42] +XDIS 269b2: MISC BASE D57C8D4C7B43 lea r25, ptr [r19+r23*2+0x43] +XDIS 269b8: MISC BASE D57C8D4C7C44 lea r25, ptr [r20+r23*2+0x44] +XDIS 269be: MISC BASE D57C8D4C7D45 lea r25, ptr [r21+r23*2+0x45] +XDIS 269c4: MISC BASE D57C8D4C7E46 lea r25, ptr [r22+r23*2+0x46] +XDIS 269ca: MISC BASE D57C8D4C7F47 lea r25, ptr [r23+r23*2+0x47] +XDIS 269d0: MISC BASE D57D8D4C7848 lea r25, ptr [r24+r23*2+0x48] +XDIS 269d6: MISC BASE D57D8D4C7949 lea r25, ptr [r25+r23*2+0x49] +XDIS 269dc: MISC BASE D57D8D4C7A4A lea r25, ptr [r26+r23*2+0x4a] +XDIS 269e2: MISC BASE D57D8D4C7B4B lea r25, ptr [r27+r23*2+0x4b] +XDIS 269e8: MISC BASE D57D8D4C7C4C lea r25, ptr [r28+r23*2+0x4c] +XDIS 269ee: MISC BASE D57D8D4C7D4D lea r25, ptr [r29+r23*2+0x4d] +XDIS 269f4: MISC BASE D57D8D4C7E4E lea r25, ptr [r30+r23*2+0x4e] +XDIS 269fa: MISC BASE D57D8D4C7F4F lea r25, ptr [r31+r23*2+0x4f] +XDIS 26a00: MISC BASE D56E8D4C4031 lea r25, ptr [rax+r24*2+0x31] +XDIS 26a06: MISC BASE D56E8D4C4132 lea r25, ptr [rcx+r24*2+0x32] +XDIS 26a0c: MISC BASE D56E8D4C4233 lea r25, ptr [rdx+r24*2+0x33] +XDIS 26a12: MISC BASE D56E8D4C4334 lea r25, ptr [rbx+r24*2+0x34] +XDIS 26a18: MISC BASE D56E8D4C4435 lea r25, ptr [rsp+r24*2+0x35] +XDIS 26a1e: MISC BASE D56E8D4C4536 lea r25, ptr [rbp+r24*2+0x36] +XDIS 26a24: MISC BASE D56E8D4C4637 lea r25, ptr [rsi+r24*2+0x37] +XDIS 26a2a: MISC BASE D56E8D4C4738 lea r25, ptr [rdi+r24*2+0x38] +XDIS 26a30: MISC BASE D56F8D4C4039 lea r25, ptr [r8+r24*2+0x39] +XDIS 26a36: MISC BASE D56F8D4C413A lea r25, ptr [r9+r24*2+0x3a] +XDIS 26a3c: MISC BASE D56F8D4C423B lea r25, ptr [r10+r24*2+0x3b] +XDIS 26a42: MISC BASE D56F8D4C433C lea r25, ptr [r11+r24*2+0x3c] +XDIS 26a48: MISC BASE D56F8D4C443D lea r25, ptr [r12+r24*2+0x3d] +XDIS 26a4e: MISC BASE D56F8D4C453E lea r25, ptr [r13+r24*2+0x3e] +XDIS 26a54: MISC BASE D56F8D4C463F lea r25, ptr [r14+r24*2+0x3f] +XDIS 26a5a: MISC BASE D56F8D4C4740 lea r25, ptr [r15+r24*2+0x40] +XDIS 26a60: MISC BASE D57E8D4C4041 lea r25, ptr [r16+r24*2+0x41] +XDIS 26a66: MISC BASE D57E8D4C4142 lea r25, ptr [r17+r24*2+0x42] +XDIS 26a6c: MISC BASE D57E8D4C4243 lea r25, ptr [r18+r24*2+0x43] +XDIS 26a72: MISC BASE D57E8D4C4344 lea r25, ptr [r19+r24*2+0x44] +XDIS 26a78: MISC BASE D57E8D4C4445 lea r25, ptr [r20+r24*2+0x45] +XDIS 26a7e: MISC BASE D57E8D4C4546 lea r25, ptr [r21+r24*2+0x46] +XDIS 26a84: MISC BASE D57E8D4C4647 lea r25, ptr [r22+r24*2+0x47] +XDIS 26a8a: MISC BASE D57E8D4C4748 lea r25, ptr [r23+r24*2+0x48] +XDIS 26a90: MISC BASE D57F8D4C4049 lea r25, ptr [r24+r24*2+0x49] +XDIS 26a96: MISC BASE D57F8D4C414A lea r25, ptr [r25+r24*2+0x4a] +XDIS 26a9c: MISC BASE D57F8D4C424B lea r25, ptr [r26+r24*2+0x4b] +XDIS 26aa2: MISC BASE D57F8D4C434C lea r25, ptr [r27+r24*2+0x4c] +XDIS 26aa8: MISC BASE D57F8D4C444D lea r25, ptr [r28+r24*2+0x4d] +XDIS 26aae: MISC BASE D57F8D4C454E lea r25, ptr [r29+r24*2+0x4e] +XDIS 26ab4: MISC BASE D57F8D4C464F lea r25, ptr [r30+r24*2+0x4f] +XDIS 26aba: MISC BASE D57F8D4C4750 lea r25, ptr [r31+r24*2+0x50] +XDIS 26ac0: MISC BASE D56E8D4C4832 lea r25, ptr [rax+r25*2+0x32] +XDIS 26ac6: MISC BASE D56E8D4C4933 lea r25, ptr [rcx+r25*2+0x33] +XDIS 26acc: MISC BASE D56E8D4C4A34 lea r25, ptr [rdx+r25*2+0x34] +XDIS 26ad2: MISC BASE D56E8D4C4B35 lea r25, ptr [rbx+r25*2+0x35] +XDIS 26ad8: MISC BASE D56E8D4C4C36 lea r25, ptr [rsp+r25*2+0x36] +XDIS 26ade: MISC BASE D56E8D4C4D37 lea r25, ptr [rbp+r25*2+0x37] +XDIS 26ae4: MISC BASE D56E8D4C4E38 lea r25, ptr [rsi+r25*2+0x38] +XDIS 26aea: MISC BASE D56E8D4C4F39 lea r25, ptr [rdi+r25*2+0x39] +XDIS 26af0: MISC BASE D56F8D4C483A lea r25, ptr [r8+r25*2+0x3a] +XDIS 26af6: MISC BASE D56F8D4C493B lea r25, ptr [r9+r25*2+0x3b] +XDIS 26afc: MISC BASE D56F8D4C4A3C lea r25, ptr [r10+r25*2+0x3c] +XDIS 26b02: MISC BASE D56F8D4C4B3D lea r25, ptr [r11+r25*2+0x3d] +XDIS 26b08: MISC BASE D56F8D4C4C3E lea r25, ptr [r12+r25*2+0x3e] +XDIS 26b0e: MISC BASE D56F8D4C4D3F lea r25, ptr [r13+r25*2+0x3f] +XDIS 26b14: MISC BASE D56F8D4C4E40 lea r25, ptr [r14+r25*2+0x40] +XDIS 26b1a: MISC BASE D56F8D4C4F41 lea r25, ptr [r15+r25*2+0x41] +XDIS 26b20: MISC BASE D57E8D4C4842 lea r25, ptr [r16+r25*2+0x42] +XDIS 26b26: MISC BASE D57E8D4C4943 lea r25, ptr [r17+r25*2+0x43] +XDIS 26b2c: MISC BASE D57E8D4C4A44 lea r25, ptr [r18+r25*2+0x44] +XDIS 26b32: MISC BASE D57E8D4C4B45 lea r25, ptr [r19+r25*2+0x45] +XDIS 26b38: MISC BASE D57E8D4C4C46 lea r25, ptr [r20+r25*2+0x46] +XDIS 26b3e: MISC BASE D57E8D4C4D47 lea r25, ptr [r21+r25*2+0x47] +XDIS 26b44: MISC BASE D57E8D4C4E48 lea r25, ptr [r22+r25*2+0x48] +XDIS 26b4a: MISC BASE D57E8D4C4F49 lea r25, ptr [r23+r25*2+0x49] +XDIS 26b50: MISC BASE D57F8D4C484A lea r25, ptr [r24+r25*2+0x4a] +XDIS 26b56: MISC BASE D57F8D4C494B lea r25, ptr [r25+r25*2+0x4b] +XDIS 26b5c: MISC BASE D57F8D4C4A4C lea r25, ptr [r26+r25*2+0x4c] +XDIS 26b62: MISC BASE D57F8D4C4B4D lea r25, ptr [r27+r25*2+0x4d] +XDIS 26b68: MISC BASE D57F8D4C4C4E lea r25, ptr [r28+r25*2+0x4e] +XDIS 26b6e: MISC BASE D57F8D4C4D4F lea r25, ptr [r29+r25*2+0x4f] +XDIS 26b74: MISC BASE D57F8D4C4E50 lea r25, ptr [r30+r25*2+0x50] +XDIS 26b7a: MISC BASE D57F8D4C4F51 lea r25, ptr [r31+r25*2+0x51] +XDIS 26b80: MISC BASE D56E8D4C5033 lea r25, ptr [rax+r26*2+0x33] +XDIS 26b86: MISC BASE D56E8D4C5134 lea r25, ptr [rcx+r26*2+0x34] +XDIS 26b8c: MISC BASE D56E8D4C5235 lea r25, ptr [rdx+r26*2+0x35] +XDIS 26b92: MISC BASE D56E8D4C5336 lea r25, ptr [rbx+r26*2+0x36] +XDIS 26b98: MISC BASE D56E8D4C5437 lea r25, ptr [rsp+r26*2+0x37] +XDIS 26b9e: MISC BASE D56E8D4C5538 lea r25, ptr [rbp+r26*2+0x38] +XDIS 26ba4: MISC BASE D56E8D4C5639 lea r25, ptr [rsi+r26*2+0x39] +XDIS 26baa: MISC BASE D56E8D4C573A lea r25, ptr [rdi+r26*2+0x3a] +XDIS 26bb0: MISC BASE D56F8D4C503B lea r25, ptr [r8+r26*2+0x3b] +XDIS 26bb6: MISC BASE D56F8D4C513C lea r25, ptr [r9+r26*2+0x3c] +XDIS 26bbc: MISC BASE D56F8D4C523D lea r25, ptr [r10+r26*2+0x3d] +XDIS 26bc2: MISC BASE D56F8D4C533E lea r25, ptr [r11+r26*2+0x3e] +XDIS 26bc8: MISC BASE D56F8D4C543F lea r25, ptr [r12+r26*2+0x3f] +XDIS 26bce: MISC BASE D56F8D4C5540 lea r25, ptr [r13+r26*2+0x40] +XDIS 26bd4: MISC BASE D56F8D4C5641 lea r25, ptr [r14+r26*2+0x41] +XDIS 26bda: MISC BASE D56F8D4C5742 lea r25, ptr [r15+r26*2+0x42] +XDIS 26be0: MISC BASE D57E8D4C5043 lea r25, ptr [r16+r26*2+0x43] +XDIS 26be6: MISC BASE D57E8D4C5144 lea r25, ptr [r17+r26*2+0x44] +XDIS 26bec: MISC BASE D57E8D4C5245 lea r25, ptr [r18+r26*2+0x45] +XDIS 26bf2: MISC BASE D57E8D4C5346 lea r25, ptr [r19+r26*2+0x46] +XDIS 26bf8: MISC BASE D57E8D4C5447 lea r25, ptr [r20+r26*2+0x47] +XDIS 26bfe: MISC BASE D57E8D4C5548 lea r25, ptr [r21+r26*2+0x48] +XDIS 26c04: MISC BASE D57E8D4C5649 lea r25, ptr [r22+r26*2+0x49] +XDIS 26c0a: MISC BASE D57E8D4C574A lea r25, ptr [r23+r26*2+0x4a] +XDIS 26c10: MISC BASE D57F8D4C504B lea r25, ptr [r24+r26*2+0x4b] +XDIS 26c16: MISC BASE D57F8D4C514C lea r25, ptr [r25+r26*2+0x4c] +XDIS 26c1c: MISC BASE D57F8D4C524D lea r25, ptr [r26+r26*2+0x4d] +XDIS 26c22: MISC BASE D57F8D4C534E lea r25, ptr [r27+r26*2+0x4e] +XDIS 26c28: MISC BASE D57F8D4C544F lea r25, ptr [r28+r26*2+0x4f] +XDIS 26c2e: MISC BASE D57F8D4C5550 lea r25, ptr [r29+r26*2+0x50] +XDIS 26c34: MISC BASE D57F8D4C5651 lea r25, ptr [r30+r26*2+0x51] +XDIS 26c3a: MISC BASE D57F8D4C5752 lea r25, ptr [r31+r26*2+0x52] +XDIS 26c40: MISC BASE D56E8D4C5834 lea r25, ptr [rax+r27*2+0x34] +XDIS 26c46: MISC BASE D56E8D4C5935 lea r25, ptr [rcx+r27*2+0x35] +XDIS 26c4c: MISC BASE D56E8D4C5A36 lea r25, ptr [rdx+r27*2+0x36] +XDIS 26c52: MISC BASE D56E8D4C5B37 lea r25, ptr [rbx+r27*2+0x37] +XDIS 26c58: MISC BASE D56E8D4C5C38 lea r25, ptr [rsp+r27*2+0x38] +XDIS 26c5e: MISC BASE D56E8D4C5D39 lea r25, ptr [rbp+r27*2+0x39] +XDIS 26c64: MISC BASE D56E8D4C5E3A lea r25, ptr [rsi+r27*2+0x3a] +XDIS 26c6a: MISC BASE D56E8D4C5F3B lea r25, ptr [rdi+r27*2+0x3b] +XDIS 26c70: MISC BASE D56F8D4C583C lea r25, ptr [r8+r27*2+0x3c] +XDIS 26c76: MISC BASE D56F8D4C593D lea r25, ptr [r9+r27*2+0x3d] +XDIS 26c7c: MISC BASE D56F8D4C5A3E lea r25, ptr [r10+r27*2+0x3e] +XDIS 26c82: MISC BASE D56F8D4C5B3F lea r25, ptr [r11+r27*2+0x3f] +XDIS 26c88: MISC BASE D56F8D4C5C40 lea r25, ptr [r12+r27*2+0x40] +XDIS 26c8e: MISC BASE D56F8D4C5D41 lea r25, ptr [r13+r27*2+0x41] +XDIS 26c94: MISC BASE D56F8D4C5E42 lea r25, ptr [r14+r27*2+0x42] +XDIS 26c9a: MISC BASE D56F8D4C5F43 lea r25, ptr [r15+r27*2+0x43] +XDIS 26ca0: MISC BASE D57E8D4C5844 lea r25, ptr [r16+r27*2+0x44] +XDIS 26ca6: MISC BASE D57E8D4C5945 lea r25, ptr [r17+r27*2+0x45] +XDIS 26cac: MISC BASE D57E8D4C5A46 lea r25, ptr [r18+r27*2+0x46] +XDIS 26cb2: MISC BASE D57E8D4C5B47 lea r25, ptr [r19+r27*2+0x47] +XDIS 26cb8: MISC BASE D57E8D4C5C48 lea r25, ptr [r20+r27*2+0x48] +XDIS 26cbe: MISC BASE D57E8D4C5D49 lea r25, ptr [r21+r27*2+0x49] +XDIS 26cc4: MISC BASE D57E8D4C5E4A lea r25, ptr [r22+r27*2+0x4a] +XDIS 26cca: MISC BASE D57E8D4C5F4B lea r25, ptr [r23+r27*2+0x4b] +XDIS 26cd0: MISC BASE D57F8D4C584C lea r25, ptr [r24+r27*2+0x4c] +XDIS 26cd6: MISC BASE D57F8D4C594D lea r25, ptr [r25+r27*2+0x4d] +XDIS 26cdc: MISC BASE D57F8D4C5A4E lea r25, ptr [r26+r27*2+0x4e] +XDIS 26ce2: MISC BASE D57F8D4C5B4F lea r25, ptr [r27+r27*2+0x4f] +XDIS 26ce8: MISC BASE D57F8D4C5C50 lea r25, ptr [r28+r27*2+0x50] +XDIS 26cee: MISC BASE D57F8D4C5D51 lea r25, ptr [r29+r27*2+0x51] +XDIS 26cf4: MISC BASE D57F8D4C5E52 lea r25, ptr [r30+r27*2+0x52] +XDIS 26cfa: MISC BASE D57F8D4C5F53 lea r25, ptr [r31+r27*2+0x53] +XDIS 26d00: MISC BASE D56E8D4C6035 lea r25, ptr [rax+r28*2+0x35] +XDIS 26d06: MISC BASE D56E8D4C6136 lea r25, ptr [rcx+r28*2+0x36] +XDIS 26d0c: MISC BASE D56E8D4C6237 lea r25, ptr [rdx+r28*2+0x37] +XDIS 26d12: MISC BASE D56E8D4C6338 lea r25, ptr [rbx+r28*2+0x38] +XDIS 26d18: MISC BASE D56E8D4C6439 lea r25, ptr [rsp+r28*2+0x39] +XDIS 26d1e: MISC BASE D56E8D4C653A lea r25, ptr [rbp+r28*2+0x3a] +XDIS 26d24: MISC BASE D56E8D4C663B lea r25, ptr [rsi+r28*2+0x3b] +XDIS 26d2a: MISC BASE D56E8D4C673C lea r25, ptr [rdi+r28*2+0x3c] +XDIS 26d30: MISC BASE D56F8D4C603D lea r25, ptr [r8+r28*2+0x3d] +XDIS 26d36: MISC BASE D56F8D4C613E lea r25, ptr [r9+r28*2+0x3e] +XDIS 26d3c: MISC BASE D56F8D4C623F lea r25, ptr [r10+r28*2+0x3f] +XDIS 26d42: MISC BASE D56F8D4C6340 lea r25, ptr [r11+r28*2+0x40] +XDIS 26d48: MISC BASE D56F8D4C6441 lea r25, ptr [r12+r28*2+0x41] +XDIS 26d4e: MISC BASE D56F8D4C6542 lea r25, ptr [r13+r28*2+0x42] +XDIS 26d54: MISC BASE D56F8D4C6643 lea r25, ptr [r14+r28*2+0x43] +XDIS 26d5a: MISC BASE D56F8D4C6744 lea r25, ptr [r15+r28*2+0x44] +XDIS 26d60: MISC BASE D57E8D4C6045 lea r25, ptr [r16+r28*2+0x45] +XDIS 26d66: MISC BASE D57E8D4C6146 lea r25, ptr [r17+r28*2+0x46] +XDIS 26d6c: MISC BASE D57E8D4C6247 lea r25, ptr [r18+r28*2+0x47] +XDIS 26d72: MISC BASE D57E8D4C6348 lea r25, ptr [r19+r28*2+0x48] +XDIS 26d78: MISC BASE D57E8D4C6449 lea r25, ptr [r20+r28*2+0x49] +XDIS 26d7e: MISC BASE D57E8D4C654A lea r25, ptr [r21+r28*2+0x4a] +XDIS 26d84: MISC BASE D57E8D4C664B lea r25, ptr [r22+r28*2+0x4b] +XDIS 26d8a: MISC BASE D57E8D4C674C lea r25, ptr [r23+r28*2+0x4c] +XDIS 26d90: MISC BASE D57F8D4C604D lea r25, ptr [r24+r28*2+0x4d] +XDIS 26d96: MISC BASE D57F8D4C614E lea r25, ptr [r25+r28*2+0x4e] +XDIS 26d9c: MISC BASE D57F8D4C624F lea r25, ptr [r26+r28*2+0x4f] +XDIS 26da2: MISC BASE D57F8D4C6350 lea r25, ptr [r27+r28*2+0x50] +XDIS 26da8: MISC BASE D57F8D4C6451 lea r25, ptr [r28+r28*2+0x51] +XDIS 26dae: MISC BASE D57F8D4C6552 lea r25, ptr [r29+r28*2+0x52] +XDIS 26db4: MISC BASE D57F8D4C6653 lea r25, ptr [r30+r28*2+0x53] +XDIS 26dba: MISC BASE D57F8D4C6754 lea r25, ptr [r31+r28*2+0x54] +XDIS 26dc0: MISC BASE D56E8D4C6836 lea r25, ptr [rax+r29*2+0x36] +XDIS 26dc6: MISC BASE D56E8D4C6937 lea r25, ptr [rcx+r29*2+0x37] +XDIS 26dcc: MISC BASE D56E8D4C6A38 lea r25, ptr [rdx+r29*2+0x38] +XDIS 26dd2: MISC BASE D56E8D4C6B39 lea r25, ptr [rbx+r29*2+0x39] +XDIS 26dd8: MISC BASE D56E8D4C6C3A lea r25, ptr [rsp+r29*2+0x3a] +XDIS 26dde: MISC BASE D56E8D4C6D3B lea r25, ptr [rbp+r29*2+0x3b] +XDIS 26de4: MISC BASE D56E8D4C6E3C lea r25, ptr [rsi+r29*2+0x3c] +XDIS 26dea: MISC BASE D56E8D4C6F3D lea r25, ptr [rdi+r29*2+0x3d] +XDIS 26df0: MISC BASE D56F8D4C683E lea r25, ptr [r8+r29*2+0x3e] +XDIS 26df6: MISC BASE D56F8D4C693F lea r25, ptr [r9+r29*2+0x3f] +XDIS 26dfc: MISC BASE D56F8D4C6A40 lea r25, ptr [r10+r29*2+0x40] +XDIS 26e02: MISC BASE D56F8D4C6B41 lea r25, ptr [r11+r29*2+0x41] +XDIS 26e08: MISC BASE D56F8D4C6C42 lea r25, ptr [r12+r29*2+0x42] +XDIS 26e0e: MISC BASE D56F8D4C6D43 lea r25, ptr [r13+r29*2+0x43] +XDIS 26e14: MISC BASE D56F8D4C6E44 lea r25, ptr [r14+r29*2+0x44] +XDIS 26e1a: MISC BASE D56F8D4C6F45 lea r25, ptr [r15+r29*2+0x45] +XDIS 26e20: MISC BASE D57E8D4C6846 lea r25, ptr [r16+r29*2+0x46] +XDIS 26e26: MISC BASE D57E8D4C6947 lea r25, ptr [r17+r29*2+0x47] +XDIS 26e2c: MISC BASE D57E8D4C6A48 lea r25, ptr [r18+r29*2+0x48] +XDIS 26e32: MISC BASE D57E8D4C6B49 lea r25, ptr [r19+r29*2+0x49] +XDIS 26e38: MISC BASE D57E8D4C6C4A lea r25, ptr [r20+r29*2+0x4a] +XDIS 26e3e: MISC BASE D57E8D4C6D4B lea r25, ptr [r21+r29*2+0x4b] +XDIS 26e44: MISC BASE D57E8D4C6E4C lea r25, ptr [r22+r29*2+0x4c] +XDIS 26e4a: MISC BASE D57E8D4C6F4D lea r25, ptr [r23+r29*2+0x4d] +XDIS 26e50: MISC BASE D57F8D4C684E lea r25, ptr [r24+r29*2+0x4e] +XDIS 26e56: MISC BASE D57F8D4C694F lea r25, ptr [r25+r29*2+0x4f] +XDIS 26e5c: MISC BASE D57F8D4C6A50 lea r25, ptr [r26+r29*2+0x50] +XDIS 26e62: MISC BASE D57F8D4C6B51 lea r25, ptr [r27+r29*2+0x51] +XDIS 26e68: MISC BASE D57F8D4C6C52 lea r25, ptr [r28+r29*2+0x52] +XDIS 26e6e: MISC BASE D57F8D4C6D53 lea r25, ptr [r29+r29*2+0x53] +XDIS 26e74: MISC BASE D57F8D4C6E54 lea r25, ptr [r30+r29*2+0x54] +XDIS 26e7a: MISC BASE D57F8D4C6F55 lea r25, ptr [r31+r29*2+0x55] +XDIS 26e80: MISC BASE D56E8D4C7037 lea r25, ptr [rax+r30*2+0x37] +XDIS 26e86: MISC BASE D56E8D4C7138 lea r25, ptr [rcx+r30*2+0x38] +XDIS 26e8c: MISC BASE D56E8D4C7239 lea r25, ptr [rdx+r30*2+0x39] +XDIS 26e92: MISC BASE D56E8D4C733A lea r25, ptr [rbx+r30*2+0x3a] +XDIS 26e98: MISC BASE D56E8D4C743B lea r25, ptr [rsp+r30*2+0x3b] +XDIS 26e9e: MISC BASE D56E8D4C753C lea r25, ptr [rbp+r30*2+0x3c] +XDIS 26ea4: MISC BASE D56E8D4C763D lea r25, ptr [rsi+r30*2+0x3d] +XDIS 26eaa: MISC BASE D56E8D4C773E lea r25, ptr [rdi+r30*2+0x3e] +XDIS 26eb0: MISC BASE D56F8D4C703F lea r25, ptr [r8+r30*2+0x3f] +XDIS 26eb6: MISC BASE D56F8D4C7140 lea r25, ptr [r9+r30*2+0x40] +XDIS 26ebc: MISC BASE D56F8D4C7241 lea r25, ptr [r10+r30*2+0x41] +XDIS 26ec2: MISC BASE D56F8D4C7342 lea r25, ptr [r11+r30*2+0x42] +XDIS 26ec8: MISC BASE D56F8D4C7443 lea r25, ptr [r12+r30*2+0x43] +XDIS 26ece: MISC BASE D56F8D4C7544 lea r25, ptr [r13+r30*2+0x44] +XDIS 26ed4: MISC BASE D56F8D4C7645 lea r25, ptr [r14+r30*2+0x45] +XDIS 26eda: MISC BASE D56F8D4C7746 lea r25, ptr [r15+r30*2+0x46] +XDIS 26ee0: MISC BASE D57E8D4C7047 lea r25, ptr [r16+r30*2+0x47] +XDIS 26ee6: MISC BASE D57E8D4C7148 lea r25, ptr [r17+r30*2+0x48] +XDIS 26eec: MISC BASE D57E8D4C7249 lea r25, ptr [r18+r30*2+0x49] +XDIS 26ef2: MISC BASE D57E8D4C734A lea r25, ptr [r19+r30*2+0x4a] +XDIS 26ef8: MISC BASE D57E8D4C744B lea r25, ptr [r20+r30*2+0x4b] +XDIS 26efe: MISC BASE D57E8D4C754C lea r25, ptr [r21+r30*2+0x4c] +XDIS 26f04: MISC BASE D57E8D4C764D lea r25, ptr [r22+r30*2+0x4d] +XDIS 26f0a: MISC BASE D57E8D4C774E lea r25, ptr [r23+r30*2+0x4e] +XDIS 26f10: MISC BASE D57F8D4C704F lea r25, ptr [r24+r30*2+0x4f] +XDIS 26f16: MISC BASE D57F8D4C7150 lea r25, ptr [r25+r30*2+0x50] +XDIS 26f1c: MISC BASE D57F8D4C7251 lea r25, ptr [r26+r30*2+0x51] +XDIS 26f22: MISC BASE D57F8D4C7352 lea r25, ptr [r27+r30*2+0x52] +XDIS 26f28: MISC BASE D57F8D4C7453 lea r25, ptr [r28+r30*2+0x53] +XDIS 26f2e: MISC BASE D57F8D4C7554 lea r25, ptr [r29+r30*2+0x54] +XDIS 26f34: MISC BASE D57F8D4C7655 lea r25, ptr [r30+r30*2+0x55] +XDIS 26f3a: MISC BASE D57F8D4C7756 lea r25, ptr [r31+r30*2+0x56] +XDIS 26f40: MISC BASE D56E8D4C7838 lea r25, ptr [rax+r31*2+0x38] +XDIS 26f46: MISC BASE D56E8D4C7939 lea r25, ptr [rcx+r31*2+0x39] +XDIS 26f4c: MISC BASE D56E8D4C7A3A lea r25, ptr [rdx+r31*2+0x3a] +XDIS 26f52: MISC BASE D56E8D4C7B3B lea r25, ptr [rbx+r31*2+0x3b] +XDIS 26f58: MISC BASE D56E8D4C7C3C lea r25, ptr [rsp+r31*2+0x3c] +XDIS 26f5e: MISC BASE D56E8D4C7D3D lea r25, ptr [rbp+r31*2+0x3d] +XDIS 26f64: MISC BASE D56E8D4C7E3E lea r25, ptr [rsi+r31*2+0x3e] +XDIS 26f6a: MISC BASE D56E8D4C7F3F lea r25, ptr [rdi+r31*2+0x3f] +XDIS 26f70: MISC BASE D56F8D4C7840 lea r25, ptr [r8+r31*2+0x40] +XDIS 26f76: MISC BASE D56F8D4C7941 lea r25, ptr [r9+r31*2+0x41] +XDIS 26f7c: MISC BASE D56F8D4C7A42 lea r25, ptr [r10+r31*2+0x42] +XDIS 26f82: MISC BASE D56F8D4C7B43 lea r25, ptr [r11+r31*2+0x43] +XDIS 26f88: MISC BASE D56F8D4C7C44 lea r25, ptr [r12+r31*2+0x44] +XDIS 26f8e: MISC BASE D56F8D4C7D45 lea r25, ptr [r13+r31*2+0x45] +XDIS 26f94: MISC BASE D56F8D4C7E46 lea r25, ptr [r14+r31*2+0x46] +XDIS 26f9a: MISC BASE D56F8D4C7F47 lea r25, ptr [r15+r31*2+0x47] +XDIS 26fa0: MISC BASE D57E8D4C7848 lea r25, ptr [r16+r31*2+0x48] +XDIS 26fa6: MISC BASE D57E8D4C7949 lea r25, ptr [r17+r31*2+0x49] +XDIS 26fac: MISC BASE D57E8D4C7A4A lea r25, ptr [r18+r31*2+0x4a] +XDIS 26fb2: MISC BASE D57E8D4C7B4B lea r25, ptr [r19+r31*2+0x4b] +XDIS 26fb8: MISC BASE D57E8D4C7C4C lea r25, ptr [r20+r31*2+0x4c] +XDIS 26fbe: MISC BASE D57E8D4C7D4D lea r25, ptr [r21+r31*2+0x4d] +XDIS 26fc4: MISC BASE D57E8D4C7E4E lea r25, ptr [r22+r31*2+0x4e] +XDIS 26fca: MISC BASE D57E8D4C7F4F lea r25, ptr [r23+r31*2+0x4f] +XDIS 26fd0: MISC BASE D57F8D4C7850 lea r25, ptr [r24+r31*2+0x50] +XDIS 26fd6: MISC BASE D57F8D4C7951 lea r25, ptr [r25+r31*2+0x51] +XDIS 26fdc: MISC BASE D57F8D4C7A52 lea r25, ptr [r26+r31*2+0x52] +XDIS 26fe2: MISC BASE D57F8D4C7B53 lea r25, ptr [r27+r31*2+0x53] +XDIS 26fe8: MISC BASE D57F8D4C7C54 lea r25, ptr [r28+r31*2+0x54] +XDIS 26fee: MISC BASE D57F8D4C7D55 lea r25, ptr [r29+r31*2+0x55] +XDIS 26ff4: MISC BASE D57F8D4C7E56 lea r25, ptr [r30+r31*2+0x56] +XDIS 26ffa: MISC BASE D57F8D4C7F57 lea r25, ptr [r31+r31*2+0x57] +XDIS 27000: MISC BASE D54C8D54401A lea r26, ptr [rax+rax*2+0x1a] +XDIS 27006: MISC BASE D54C8D54411B lea r26, ptr [rcx+rax*2+0x1b] +XDIS 2700c: MISC BASE D54C8D54421C lea r26, ptr [rdx+rax*2+0x1c] +XDIS 27012: MISC BASE D54C8D54431D lea r26, ptr [rbx+rax*2+0x1d] +XDIS 27018: MISC BASE D54C8D54441E lea r26, ptr [rsp+rax*2+0x1e] +XDIS 2701e: MISC BASE D54C8D54451F lea r26, ptr [rbp+rax*2+0x1f] +XDIS 27024: MISC BASE D54C8D544620 lea r26, ptr [rsi+rax*2+0x20] +XDIS 2702a: MISC BASE D54C8D544721 lea r26, ptr [rdi+rax*2+0x21] +XDIS 27030: MISC BASE D54D8D544022 lea r26, ptr [r8+rax*2+0x22] +XDIS 27036: MISC BASE D54D8D544123 lea r26, ptr [r9+rax*2+0x23] +XDIS 2703c: MISC BASE D54D8D544224 lea r26, ptr [r10+rax*2+0x24] +XDIS 27042: MISC BASE D54D8D544325 lea r26, ptr [r11+rax*2+0x25] +XDIS 27048: MISC BASE D54D8D544426 lea r26, ptr [r12+rax*2+0x26] +XDIS 2704e: MISC BASE D54D8D544527 lea r26, ptr [r13+rax*2+0x27] +XDIS 27054: MISC BASE D54D8D544628 lea r26, ptr [r14+rax*2+0x28] +XDIS 2705a: MISC BASE D54D8D544729 lea r26, ptr [r15+rax*2+0x29] +XDIS 27060: MISC BASE D55C8D54402A lea r26, ptr [r16+rax*2+0x2a] +XDIS 27066: MISC BASE D55C8D54412B lea r26, ptr [r17+rax*2+0x2b] +XDIS 2706c: MISC BASE D55C8D54422C lea r26, ptr [r18+rax*2+0x2c] +XDIS 27072: MISC BASE D55C8D54432D lea r26, ptr [r19+rax*2+0x2d] +XDIS 27078: MISC BASE D55C8D54442E lea r26, ptr [r20+rax*2+0x2e] +XDIS 2707e: MISC BASE D55C8D54452F lea r26, ptr [r21+rax*2+0x2f] +XDIS 27084: MISC BASE D55C8D544630 lea r26, ptr [r22+rax*2+0x30] +XDIS 2708a: MISC BASE D55C8D544731 lea r26, ptr [r23+rax*2+0x31] +XDIS 27090: MISC BASE D55D8D544032 lea r26, ptr [r24+rax*2+0x32] +XDIS 27096: MISC BASE D55D8D544133 lea r26, ptr [r25+rax*2+0x33] +XDIS 2709c: MISC BASE D55D8D544234 lea r26, ptr [r26+rax*2+0x34] +XDIS 270a2: MISC BASE D55D8D544335 lea r26, ptr [r27+rax*2+0x35] +XDIS 270a8: MISC BASE D55D8D544436 lea r26, ptr [r28+rax*2+0x36] +XDIS 270ae: MISC BASE D55D8D544537 lea r26, ptr [r29+rax*2+0x37] +XDIS 270b4: MISC BASE D55D8D544638 lea r26, ptr [r30+rax*2+0x38] +XDIS 270ba: MISC BASE D55D8D544739 lea r26, ptr [r31+rax*2+0x39] +XDIS 270c0: MISC BASE D54C8D54481B lea r26, ptr [rax+rcx*2+0x1b] +XDIS 270c6: MISC BASE D54C8D54491C lea r26, ptr [rcx+rcx*2+0x1c] +XDIS 270cc: MISC BASE D54C8D544A1D lea r26, ptr [rdx+rcx*2+0x1d] +XDIS 270d2: MISC BASE D54C8D544B1E lea r26, ptr [rbx+rcx*2+0x1e] +XDIS 270d8: MISC BASE D54C8D544C1F lea r26, ptr [rsp+rcx*2+0x1f] +XDIS 270de: MISC BASE D54C8D544D20 lea r26, ptr [rbp+rcx*2+0x20] +XDIS 270e4: MISC BASE D54C8D544E21 lea r26, ptr [rsi+rcx*2+0x21] +XDIS 270ea: MISC BASE D54C8D544F22 lea r26, ptr [rdi+rcx*2+0x22] +XDIS 270f0: MISC BASE D54D8D544823 lea r26, ptr [r8+rcx*2+0x23] +XDIS 270f6: MISC BASE D54D8D544924 lea r26, ptr [r9+rcx*2+0x24] +XDIS 270fc: MISC BASE D54D8D544A25 lea r26, ptr [r10+rcx*2+0x25] +XDIS 27102: MISC BASE D54D8D544B26 lea r26, ptr [r11+rcx*2+0x26] +XDIS 27108: MISC BASE D54D8D544C27 lea r26, ptr [r12+rcx*2+0x27] +XDIS 2710e: MISC BASE D54D8D544D28 lea r26, ptr [r13+rcx*2+0x28] +XDIS 27114: MISC BASE D54D8D544E29 lea r26, ptr [r14+rcx*2+0x29] +XDIS 2711a: MISC BASE D54D8D544F2A lea r26, ptr [r15+rcx*2+0x2a] +XDIS 27120: MISC BASE D55C8D54482B lea r26, ptr [r16+rcx*2+0x2b] +XDIS 27126: MISC BASE D55C8D54492C lea r26, ptr [r17+rcx*2+0x2c] +XDIS 2712c: MISC BASE D55C8D544A2D lea r26, ptr [r18+rcx*2+0x2d] +XDIS 27132: MISC BASE D55C8D544B2E lea r26, ptr [r19+rcx*2+0x2e] +XDIS 27138: MISC BASE D55C8D544C2F lea r26, ptr [r20+rcx*2+0x2f] +XDIS 2713e: MISC BASE D55C8D544D30 lea r26, ptr [r21+rcx*2+0x30] +XDIS 27144: MISC BASE D55C8D544E31 lea r26, ptr [r22+rcx*2+0x31] +XDIS 2714a: MISC BASE D55C8D544F32 lea r26, ptr [r23+rcx*2+0x32] +XDIS 27150: MISC BASE D55D8D544833 lea r26, ptr [r24+rcx*2+0x33] +XDIS 27156: MISC BASE D55D8D544934 lea r26, ptr [r25+rcx*2+0x34] +XDIS 2715c: MISC BASE D55D8D544A35 lea r26, ptr [r26+rcx*2+0x35] +XDIS 27162: MISC BASE D55D8D544B36 lea r26, ptr [r27+rcx*2+0x36] +XDIS 27168: MISC BASE D55D8D544C37 lea r26, ptr [r28+rcx*2+0x37] +XDIS 2716e: MISC BASE D55D8D544D38 lea r26, ptr [r29+rcx*2+0x38] +XDIS 27174: MISC BASE D55D8D544E39 lea r26, ptr [r30+rcx*2+0x39] +XDIS 2717a: MISC BASE D55D8D544F3A lea r26, ptr [r31+rcx*2+0x3a] +XDIS 27180: MISC BASE D54C8D54501C lea r26, ptr [rax+rdx*2+0x1c] +XDIS 27186: MISC BASE D54C8D54511D lea r26, ptr [rcx+rdx*2+0x1d] +XDIS 2718c: MISC BASE D54C8D54521E lea r26, ptr [rdx+rdx*2+0x1e] +XDIS 27192: MISC BASE D54C8D54531F lea r26, ptr [rbx+rdx*2+0x1f] +XDIS 27198: MISC BASE D54C8D545420 lea r26, ptr [rsp+rdx*2+0x20] +XDIS 2719e: MISC BASE D54C8D545521 lea r26, ptr [rbp+rdx*2+0x21] +XDIS 271a4: MISC BASE D54C8D545622 lea r26, ptr [rsi+rdx*2+0x22] +XDIS 271aa: MISC BASE D54C8D545723 lea r26, ptr [rdi+rdx*2+0x23] +XDIS 271b0: MISC BASE D54D8D545024 lea r26, ptr [r8+rdx*2+0x24] +XDIS 271b6: MISC BASE D54D8D545125 lea r26, ptr [r9+rdx*2+0x25] +XDIS 271bc: MISC BASE D54D8D545226 lea r26, ptr [r10+rdx*2+0x26] +XDIS 271c2: MISC BASE D54D8D545327 lea r26, ptr [r11+rdx*2+0x27] +XDIS 271c8: MISC BASE D54D8D545428 lea r26, ptr [r12+rdx*2+0x28] +XDIS 271ce: MISC BASE D54D8D545529 lea r26, ptr [r13+rdx*2+0x29] +XDIS 271d4: MISC BASE D54D8D54562A lea r26, ptr [r14+rdx*2+0x2a] +XDIS 271da: MISC BASE D54D8D54572B lea r26, ptr [r15+rdx*2+0x2b] +XDIS 271e0: MISC BASE D55C8D54502C lea r26, ptr [r16+rdx*2+0x2c] +XDIS 271e6: MISC BASE D55C8D54512D lea r26, ptr [r17+rdx*2+0x2d] +XDIS 271ec: MISC BASE D55C8D54522E lea r26, ptr [r18+rdx*2+0x2e] +XDIS 271f2: MISC BASE D55C8D54532F lea r26, ptr [r19+rdx*2+0x2f] +XDIS 271f8: MISC BASE D55C8D545430 lea r26, ptr [r20+rdx*2+0x30] +XDIS 271fe: MISC BASE D55C8D545531 lea r26, ptr [r21+rdx*2+0x31] +XDIS 27204: MISC BASE D55C8D545632 lea r26, ptr [r22+rdx*2+0x32] +XDIS 2720a: MISC BASE D55C8D545733 lea r26, ptr [r23+rdx*2+0x33] +XDIS 27210: MISC BASE D55D8D545034 lea r26, ptr [r24+rdx*2+0x34] +XDIS 27216: MISC BASE D55D8D545135 lea r26, ptr [r25+rdx*2+0x35] +XDIS 2721c: MISC BASE D55D8D545236 lea r26, ptr [r26+rdx*2+0x36] +XDIS 27222: MISC BASE D55D8D545337 lea r26, ptr [r27+rdx*2+0x37] +XDIS 27228: MISC BASE D55D8D545438 lea r26, ptr [r28+rdx*2+0x38] +XDIS 2722e: MISC BASE D55D8D545539 lea r26, ptr [r29+rdx*2+0x39] +XDIS 27234: MISC BASE D55D8D54563A lea r26, ptr [r30+rdx*2+0x3a] +XDIS 2723a: MISC BASE D55D8D54573B lea r26, ptr [r31+rdx*2+0x3b] +XDIS 27240: MISC BASE D54C8D54581D lea r26, ptr [rax+rbx*2+0x1d] +XDIS 27246: MISC BASE D54C8D54591E lea r26, ptr [rcx+rbx*2+0x1e] +XDIS 2724c: MISC BASE D54C8D545A1F lea r26, ptr [rdx+rbx*2+0x1f] +XDIS 27252: MISC BASE D54C8D545B20 lea r26, ptr [rbx+rbx*2+0x20] +XDIS 27258: MISC BASE D54C8D545C21 lea r26, ptr [rsp+rbx*2+0x21] +XDIS 2725e: MISC BASE D54C8D545D22 lea r26, ptr [rbp+rbx*2+0x22] +XDIS 27264: MISC BASE D54C8D545E23 lea r26, ptr [rsi+rbx*2+0x23] +XDIS 2726a: MISC BASE D54C8D545F24 lea r26, ptr [rdi+rbx*2+0x24] +XDIS 27270: MISC BASE D54D8D545825 lea r26, ptr [r8+rbx*2+0x25] +XDIS 27276: MISC BASE D54D8D545926 lea r26, ptr [r9+rbx*2+0x26] +XDIS 2727c: MISC BASE D54D8D545A27 lea r26, ptr [r10+rbx*2+0x27] +XDIS 27282: MISC BASE D54D8D545B28 lea r26, ptr [r11+rbx*2+0x28] +XDIS 27288: MISC BASE D54D8D545C29 lea r26, ptr [r12+rbx*2+0x29] +XDIS 2728e: MISC BASE D54D8D545D2A lea r26, ptr [r13+rbx*2+0x2a] +XDIS 27294: MISC BASE D54D8D545E2B lea r26, ptr [r14+rbx*2+0x2b] +XDIS 2729a: MISC BASE D54D8D545F2C lea r26, ptr [r15+rbx*2+0x2c] +XDIS 272a0: MISC BASE D55C8D54582D lea r26, ptr [r16+rbx*2+0x2d] +XDIS 272a6: MISC BASE D55C8D54592E lea r26, ptr [r17+rbx*2+0x2e] +XDIS 272ac: MISC BASE D55C8D545A2F lea r26, ptr [r18+rbx*2+0x2f] +XDIS 272b2: MISC BASE D55C8D545B30 lea r26, ptr [r19+rbx*2+0x30] +XDIS 272b8: MISC BASE D55C8D545C31 lea r26, ptr [r20+rbx*2+0x31] +XDIS 272be: MISC BASE D55C8D545D32 lea r26, ptr [r21+rbx*2+0x32] +XDIS 272c4: MISC BASE D55C8D545E33 lea r26, ptr [r22+rbx*2+0x33] +XDIS 272ca: MISC BASE D55C8D545F34 lea r26, ptr [r23+rbx*2+0x34] +XDIS 272d0: MISC BASE D55D8D545835 lea r26, ptr [r24+rbx*2+0x35] +XDIS 272d6: MISC BASE D55D8D545936 lea r26, ptr [r25+rbx*2+0x36] +XDIS 272dc: MISC BASE D55D8D545A37 lea r26, ptr [r26+rbx*2+0x37] +XDIS 272e2: MISC BASE D55D8D545B38 lea r26, ptr [r27+rbx*2+0x38] +XDIS 272e8: MISC BASE D55D8D545C39 lea r26, ptr [r28+rbx*2+0x39] +XDIS 272ee: MISC BASE D55D8D545D3A lea r26, ptr [r29+rbx*2+0x3a] +XDIS 272f4: MISC BASE D55D8D545E3B lea r26, ptr [r30+rbx*2+0x3b] +XDIS 272fa: MISC BASE D55D8D545F3C lea r26, ptr [r31+rbx*2+0x3c] +XDIS 27300: MISC BASE D54C8D54601E lea r26, ptr [rax+0x1e] +XDIS 27306: MISC BASE D54C8D54611F lea r26, ptr [rcx+0x1f] +XDIS 2730c: MISC BASE D54C8D546220 lea r26, ptr [rdx+0x20] +XDIS 27312: MISC BASE D54C8D546321 lea r26, ptr [rbx+0x21] +XDIS 27318: MISC BASE D54C8D546422 lea r26, ptr [rsp+0x22] +XDIS 2731e: MISC BASE D54C8D546523 lea r26, ptr [rbp+0x23] +XDIS 27324: MISC BASE D54C8D546624 lea r26, ptr [rsi+0x24] +XDIS 2732a: MISC BASE D54C8D546725 lea r26, ptr [rdi+0x25] +XDIS 27330: MISC BASE D54D8D546026 lea r26, ptr [r8+0x26] +XDIS 27336: MISC BASE D54D8D546127 lea r26, ptr [r9+0x27] +XDIS 2733c: MISC BASE D54D8D546228 lea r26, ptr [r10+0x28] +XDIS 27342: MISC BASE D54D8D546329 lea r26, ptr [r11+0x29] +XDIS 27348: MISC BASE D54D8D54642A lea r26, ptr [r12+0x2a] +XDIS 2734e: MISC BASE D54D8D54652B lea r26, ptr [r13+0x2b] +XDIS 27354: MISC BASE D54D8D54662C lea r26, ptr [r14+0x2c] +XDIS 2735a: MISC BASE D54D8D54672D lea r26, ptr [r15+0x2d] +XDIS 27360: MISC BASE D55C8D54602E lea r26, ptr [r16+0x2e] +XDIS 27366: MISC BASE D55C8D54612F lea r26, ptr [r17+0x2f] +XDIS 2736c: MISC BASE D55C8D546230 lea r26, ptr [r18+0x30] +XDIS 27372: MISC BASE D55C8D546331 lea r26, ptr [r19+0x31] +XDIS 27378: MISC BASE D55C8D546432 lea r26, ptr [r20+0x32] +XDIS 2737e: MISC BASE D55C8D546533 lea r26, ptr [r21+0x33] +XDIS 27384: MISC BASE D55C8D546634 lea r26, ptr [r22+0x34] +XDIS 2738a: MISC BASE D55C8D546735 lea r26, ptr [r23+0x35] +XDIS 27390: MISC BASE D55D8D546036 lea r26, ptr [r24+0x36] +XDIS 27396: MISC BASE D55D8D546137 lea r26, ptr [r25+0x37] +XDIS 2739c: MISC BASE D55D8D546238 lea r26, ptr [r26+0x38] +XDIS 273a2: MISC BASE D55D8D546339 lea r26, ptr [r27+0x39] +XDIS 273a8: MISC BASE D55D8D54643A lea r26, ptr [r28+0x3a] +XDIS 273ae: MISC BASE D55D8D54653B lea r26, ptr [r29+0x3b] +XDIS 273b4: MISC BASE D55D8D54663C lea r26, ptr [r30+0x3c] +XDIS 273ba: MISC BASE D55D8D54673D lea r26, ptr [r31+0x3d] +XDIS 273c0: MISC BASE D54C8D54681F lea r26, ptr [rax+rbp*2+0x1f] +XDIS 273c6: MISC BASE D54C8D546920 lea r26, ptr [rcx+rbp*2+0x20] +XDIS 273cc: MISC BASE D54C8D546A21 lea r26, ptr [rdx+rbp*2+0x21] +XDIS 273d2: MISC BASE D54C8D546B22 lea r26, ptr [rbx+rbp*2+0x22] +XDIS 273d8: MISC BASE D54C8D546C23 lea r26, ptr [rsp+rbp*2+0x23] +XDIS 273de: MISC BASE D54C8D546D24 lea r26, ptr [rbp+rbp*2+0x24] +XDIS 273e4: MISC BASE D54C8D546E25 lea r26, ptr [rsi+rbp*2+0x25] +XDIS 273ea: MISC BASE D54C8D546F26 lea r26, ptr [rdi+rbp*2+0x26] +XDIS 273f0: MISC BASE D54D8D546827 lea r26, ptr [r8+rbp*2+0x27] +XDIS 273f6: MISC BASE D54D8D546928 lea r26, ptr [r9+rbp*2+0x28] +XDIS 273fc: MISC BASE D54D8D546A29 lea r26, ptr [r10+rbp*2+0x29] +XDIS 27402: MISC BASE D54D8D546B2A lea r26, ptr [r11+rbp*2+0x2a] +XDIS 27408: MISC BASE D54D8D546C2B lea r26, ptr [r12+rbp*2+0x2b] +XDIS 2740e: MISC BASE D54D8D546D2C lea r26, ptr [r13+rbp*2+0x2c] +XDIS 27414: MISC BASE D54D8D546E2D lea r26, ptr [r14+rbp*2+0x2d] +XDIS 2741a: MISC BASE D54D8D546F2E lea r26, ptr [r15+rbp*2+0x2e] +XDIS 27420: MISC BASE D55C8D54682F lea r26, ptr [r16+rbp*2+0x2f] +XDIS 27426: MISC BASE D55C8D546930 lea r26, ptr [r17+rbp*2+0x30] +XDIS 2742c: MISC BASE D55C8D546A31 lea r26, ptr [r18+rbp*2+0x31] +XDIS 27432: MISC BASE D55C8D546B32 lea r26, ptr [r19+rbp*2+0x32] +XDIS 27438: MISC BASE D55C8D546C33 lea r26, ptr [r20+rbp*2+0x33] +XDIS 2743e: MISC BASE D55C8D546D34 lea r26, ptr [r21+rbp*2+0x34] +XDIS 27444: MISC BASE D55C8D546E35 lea r26, ptr [r22+rbp*2+0x35] +XDIS 2744a: MISC BASE D55C8D546F36 lea r26, ptr [r23+rbp*2+0x36] +XDIS 27450: MISC BASE D55D8D546837 lea r26, ptr [r24+rbp*2+0x37] +XDIS 27456: MISC BASE D55D8D546938 lea r26, ptr [r25+rbp*2+0x38] +XDIS 2745c: MISC BASE D55D8D546A39 lea r26, ptr [r26+rbp*2+0x39] +XDIS 27462: MISC BASE D55D8D546B3A lea r26, ptr [r27+rbp*2+0x3a] +XDIS 27468: MISC BASE D55D8D546C3B lea r26, ptr [r28+rbp*2+0x3b] +XDIS 2746e: MISC BASE D55D8D546D3C lea r26, ptr [r29+rbp*2+0x3c] +XDIS 27474: MISC BASE D55D8D546E3D lea r26, ptr [r30+rbp*2+0x3d] +XDIS 2747a: MISC BASE D55D8D546F3E lea r26, ptr [r31+rbp*2+0x3e] +XDIS 27480: MISC BASE D54C8D547020 lea r26, ptr [rax+rsi*2+0x20] +XDIS 27486: MISC BASE D54C8D547121 lea r26, ptr [rcx+rsi*2+0x21] +XDIS 2748c: MISC BASE D54C8D547222 lea r26, ptr [rdx+rsi*2+0x22] +XDIS 27492: MISC BASE D54C8D547323 lea r26, ptr [rbx+rsi*2+0x23] +XDIS 27498: MISC BASE D54C8D547424 lea r26, ptr [rsp+rsi*2+0x24] +XDIS 2749e: MISC BASE D54C8D547525 lea r26, ptr [rbp+rsi*2+0x25] +XDIS 274a4: MISC BASE D54C8D547626 lea r26, ptr [rsi+rsi*2+0x26] +XDIS 274aa: MISC BASE D54C8D547727 lea r26, ptr [rdi+rsi*2+0x27] +XDIS 274b0: MISC BASE D54D8D547028 lea r26, ptr [r8+rsi*2+0x28] +XDIS 274b6: MISC BASE D54D8D547129 lea r26, ptr [r9+rsi*2+0x29] +XDIS 274bc: MISC BASE D54D8D54722A lea r26, ptr [r10+rsi*2+0x2a] +XDIS 274c2: MISC BASE D54D8D54732B lea r26, ptr [r11+rsi*2+0x2b] +XDIS 274c8: MISC BASE D54D8D54742C lea r26, ptr [r12+rsi*2+0x2c] +XDIS 274ce: MISC BASE D54D8D54752D lea r26, ptr [r13+rsi*2+0x2d] +XDIS 274d4: MISC BASE D54D8D54762E lea r26, ptr [r14+rsi*2+0x2e] +XDIS 274da: MISC BASE D54D8D54772F lea r26, ptr [r15+rsi*2+0x2f] +XDIS 274e0: MISC BASE D55C8D547030 lea r26, ptr [r16+rsi*2+0x30] +XDIS 274e6: MISC BASE D55C8D547131 lea r26, ptr [r17+rsi*2+0x31] +XDIS 274ec: MISC BASE D55C8D547232 lea r26, ptr [r18+rsi*2+0x32] +XDIS 274f2: MISC BASE D55C8D547333 lea r26, ptr [r19+rsi*2+0x33] +XDIS 274f8: MISC BASE D55C8D547434 lea r26, ptr [r20+rsi*2+0x34] +XDIS 274fe: MISC BASE D55C8D547535 lea r26, ptr [r21+rsi*2+0x35] +XDIS 27504: MISC BASE D55C8D547636 lea r26, ptr [r22+rsi*2+0x36] +XDIS 2750a: MISC BASE D55C8D547737 lea r26, ptr [r23+rsi*2+0x37] +XDIS 27510: MISC BASE D55D8D547038 lea r26, ptr [r24+rsi*2+0x38] +XDIS 27516: MISC BASE D55D8D547139 lea r26, ptr [r25+rsi*2+0x39] +XDIS 2751c: MISC BASE D55D8D54723A lea r26, ptr [r26+rsi*2+0x3a] +XDIS 27522: MISC BASE D55D8D54733B lea r26, ptr [r27+rsi*2+0x3b] +XDIS 27528: MISC BASE D55D8D54743C lea r26, ptr [r28+rsi*2+0x3c] +XDIS 2752e: MISC BASE D55D8D54753D lea r26, ptr [r29+rsi*2+0x3d] +XDIS 27534: MISC BASE D55D8D54763E lea r26, ptr [r30+rsi*2+0x3e] +XDIS 2753a: MISC BASE D55D8D54773F lea r26, ptr [r31+rsi*2+0x3f] +XDIS 27540: MISC BASE D54C8D547821 lea r26, ptr [rax+rdi*2+0x21] +XDIS 27546: MISC BASE D54C8D547922 lea r26, ptr [rcx+rdi*2+0x22] +XDIS 2754c: MISC BASE D54C8D547A23 lea r26, ptr [rdx+rdi*2+0x23] +XDIS 27552: MISC BASE D54C8D547B24 lea r26, ptr [rbx+rdi*2+0x24] +XDIS 27558: MISC BASE D54C8D547C25 lea r26, ptr [rsp+rdi*2+0x25] +XDIS 2755e: MISC BASE D54C8D547D26 lea r26, ptr [rbp+rdi*2+0x26] +XDIS 27564: MISC BASE D54C8D547E27 lea r26, ptr [rsi+rdi*2+0x27] +XDIS 2756a: MISC BASE D54C8D547F28 lea r26, ptr [rdi+rdi*2+0x28] +XDIS 27570: MISC BASE D54D8D547829 lea r26, ptr [r8+rdi*2+0x29] +XDIS 27576: MISC BASE D54D8D54792A lea r26, ptr [r9+rdi*2+0x2a] +XDIS 2757c: MISC BASE D54D8D547A2B lea r26, ptr [r10+rdi*2+0x2b] +XDIS 27582: MISC BASE D54D8D547B2C lea r26, ptr [r11+rdi*2+0x2c] +XDIS 27588: MISC BASE D54D8D547C2D lea r26, ptr [r12+rdi*2+0x2d] +XDIS 2758e: MISC BASE D54D8D547D2E lea r26, ptr [r13+rdi*2+0x2e] +XDIS 27594: MISC BASE D54D8D547E2F lea r26, ptr [r14+rdi*2+0x2f] +XDIS 2759a: MISC BASE D54D8D547F30 lea r26, ptr [r15+rdi*2+0x30] +XDIS 275a0: MISC BASE D55C8D547831 lea r26, ptr [r16+rdi*2+0x31] +XDIS 275a6: MISC BASE D55C8D547932 lea r26, ptr [r17+rdi*2+0x32] +XDIS 275ac: MISC BASE D55C8D547A33 lea r26, ptr [r18+rdi*2+0x33] +XDIS 275b2: MISC BASE D55C8D547B34 lea r26, ptr [r19+rdi*2+0x34] +XDIS 275b8: MISC BASE D55C8D547C35 lea r26, ptr [r20+rdi*2+0x35] +XDIS 275be: MISC BASE D55C8D547D36 lea r26, ptr [r21+rdi*2+0x36] +XDIS 275c4: MISC BASE D55C8D547E37 lea r26, ptr [r22+rdi*2+0x37] +XDIS 275ca: MISC BASE D55C8D547F38 lea r26, ptr [r23+rdi*2+0x38] +XDIS 275d0: MISC BASE D55D8D547839 lea r26, ptr [r24+rdi*2+0x39] +XDIS 275d6: MISC BASE D55D8D54793A lea r26, ptr [r25+rdi*2+0x3a] +XDIS 275dc: MISC BASE D55D8D547A3B lea r26, ptr [r26+rdi*2+0x3b] +XDIS 275e2: MISC BASE D55D8D547B3C lea r26, ptr [r27+rdi*2+0x3c] +XDIS 275e8: MISC BASE D55D8D547C3D lea r26, ptr [r28+rdi*2+0x3d] +XDIS 275ee: MISC BASE D55D8D547D3E lea r26, ptr [r29+rdi*2+0x3e] +XDIS 275f4: MISC BASE D55D8D547E3F lea r26, ptr [r30+rdi*2+0x3f] +XDIS 275fa: MISC BASE D55D8D547F40 lea r26, ptr [r31+rdi*2+0x40] +XDIS 27600: MISC BASE D54E8D544022 lea r26, ptr [rax+r8*2+0x22] +XDIS 27606: MISC BASE D54E8D544123 lea r26, ptr [rcx+r8*2+0x23] +XDIS 2760c: MISC BASE D54E8D544224 lea r26, ptr [rdx+r8*2+0x24] +XDIS 27612: MISC BASE D54E8D544325 lea r26, ptr [rbx+r8*2+0x25] +XDIS 27618: MISC BASE D54E8D544426 lea r26, ptr [rsp+r8*2+0x26] +XDIS 2761e: MISC BASE D54E8D544527 lea r26, ptr [rbp+r8*2+0x27] +XDIS 27624: MISC BASE D54E8D544628 lea r26, ptr [rsi+r8*2+0x28] +XDIS 2762a: MISC BASE D54E8D544729 lea r26, ptr [rdi+r8*2+0x29] +XDIS 27630: MISC BASE D54F8D54402A lea r26, ptr [r8+r8*2+0x2a] +XDIS 27636: MISC BASE D54F8D54412B lea r26, ptr [r9+r8*2+0x2b] +XDIS 2763c: MISC BASE D54F8D54422C lea r26, ptr [r10+r8*2+0x2c] +XDIS 27642: MISC BASE D54F8D54432D lea r26, ptr [r11+r8*2+0x2d] +XDIS 27648: MISC BASE D54F8D54442E lea r26, ptr [r12+r8*2+0x2e] +XDIS 2764e: MISC BASE D54F8D54452F lea r26, ptr [r13+r8*2+0x2f] +XDIS 27654: MISC BASE D54F8D544630 lea r26, ptr [r14+r8*2+0x30] +XDIS 2765a: MISC BASE D54F8D544731 lea r26, ptr [r15+r8*2+0x31] +XDIS 27660: MISC BASE D55E8D544032 lea r26, ptr [r16+r8*2+0x32] +XDIS 27666: MISC BASE D55E8D544133 lea r26, ptr [r17+r8*2+0x33] +XDIS 2766c: MISC BASE D55E8D544234 lea r26, ptr [r18+r8*2+0x34] +XDIS 27672: MISC BASE D55E8D544335 lea r26, ptr [r19+r8*2+0x35] +XDIS 27678: MISC BASE D55E8D544436 lea r26, ptr [r20+r8*2+0x36] +XDIS 2767e: MISC BASE D55E8D544537 lea r26, ptr [r21+r8*2+0x37] +XDIS 27684: MISC BASE D55E8D544638 lea r26, ptr [r22+r8*2+0x38] +XDIS 2768a: MISC BASE D55E8D544739 lea r26, ptr [r23+r8*2+0x39] +XDIS 27690: MISC BASE D55F8D54403A lea r26, ptr [r24+r8*2+0x3a] +XDIS 27696: MISC BASE D55F8D54413B lea r26, ptr [r25+r8*2+0x3b] +XDIS 2769c: MISC BASE D55F8D54423C lea r26, ptr [r26+r8*2+0x3c] +XDIS 276a2: MISC BASE D55F8D54433D lea r26, ptr [r27+r8*2+0x3d] +XDIS 276a8: MISC BASE D55F8D54443E lea r26, ptr [r28+r8*2+0x3e] +XDIS 276ae: MISC BASE D55F8D54453F lea r26, ptr [r29+r8*2+0x3f] +XDIS 276b4: MISC BASE D55F8D544640 lea r26, ptr [r30+r8*2+0x40] +XDIS 276ba: MISC BASE D55F8D544741 lea r26, ptr [r31+r8*2+0x41] +XDIS 276c0: MISC BASE D54E8D544823 lea r26, ptr [rax+r9*2+0x23] +XDIS 276c6: MISC BASE D54E8D544924 lea r26, ptr [rcx+r9*2+0x24] +XDIS 276cc: MISC BASE D54E8D544A25 lea r26, ptr [rdx+r9*2+0x25] +XDIS 276d2: MISC BASE D54E8D544B26 lea r26, ptr [rbx+r9*2+0x26] +XDIS 276d8: MISC BASE D54E8D544C27 lea r26, ptr [rsp+r9*2+0x27] +XDIS 276de: MISC BASE D54E8D544D28 lea r26, ptr [rbp+r9*2+0x28] +XDIS 276e4: MISC BASE D54E8D544E29 lea r26, ptr [rsi+r9*2+0x29] +XDIS 276ea: MISC BASE D54E8D544F2A lea r26, ptr [rdi+r9*2+0x2a] +XDIS 276f0: MISC BASE D54F8D54482B lea r26, ptr [r8+r9*2+0x2b] +XDIS 276f6: MISC BASE D54F8D54492C lea r26, ptr [r9+r9*2+0x2c] +XDIS 276fc: MISC BASE D54F8D544A2D lea r26, ptr [r10+r9*2+0x2d] +XDIS 27702: MISC BASE D54F8D544B2E lea r26, ptr [r11+r9*2+0x2e] +XDIS 27708: MISC BASE D54F8D544C2F lea r26, ptr [r12+r9*2+0x2f] +XDIS 2770e: MISC BASE D54F8D544D30 lea r26, ptr [r13+r9*2+0x30] +XDIS 27714: MISC BASE D54F8D544E31 lea r26, ptr [r14+r9*2+0x31] +XDIS 2771a: MISC BASE D54F8D544F32 lea r26, ptr [r15+r9*2+0x32] +XDIS 27720: MISC BASE D55E8D544833 lea r26, ptr [r16+r9*2+0x33] +XDIS 27726: MISC BASE D55E8D544934 lea r26, ptr [r17+r9*2+0x34] +XDIS 2772c: MISC BASE D55E8D544A35 lea r26, ptr [r18+r9*2+0x35] +XDIS 27732: MISC BASE D55E8D544B36 lea r26, ptr [r19+r9*2+0x36] +XDIS 27738: MISC BASE D55E8D544C37 lea r26, ptr [r20+r9*2+0x37] +XDIS 2773e: MISC BASE D55E8D544D38 lea r26, ptr [r21+r9*2+0x38] +XDIS 27744: MISC BASE D55E8D544E39 lea r26, ptr [r22+r9*2+0x39] +XDIS 2774a: MISC BASE D55E8D544F3A lea r26, ptr [r23+r9*2+0x3a] +XDIS 27750: MISC BASE D55F8D54483B lea r26, ptr [r24+r9*2+0x3b] +XDIS 27756: MISC BASE D55F8D54493C lea r26, ptr [r25+r9*2+0x3c] +XDIS 2775c: MISC BASE D55F8D544A3D lea r26, ptr [r26+r9*2+0x3d] +XDIS 27762: MISC BASE D55F8D544B3E lea r26, ptr [r27+r9*2+0x3e] +XDIS 27768: MISC BASE D55F8D544C3F lea r26, ptr [r28+r9*2+0x3f] +XDIS 2776e: MISC BASE D55F8D544D40 lea r26, ptr [r29+r9*2+0x40] +XDIS 27774: MISC BASE D55F8D544E41 lea r26, ptr [r30+r9*2+0x41] +XDIS 2777a: MISC BASE D55F8D544F42 lea r26, ptr [r31+r9*2+0x42] +XDIS 27780: MISC BASE D54E8D545024 lea r26, ptr [rax+r10*2+0x24] +XDIS 27786: MISC BASE D54E8D545125 lea r26, ptr [rcx+r10*2+0x25] +XDIS 2778c: MISC BASE D54E8D545226 lea r26, ptr [rdx+r10*2+0x26] +XDIS 27792: MISC BASE D54E8D545327 lea r26, ptr [rbx+r10*2+0x27] +XDIS 27798: MISC BASE D54E8D545428 lea r26, ptr [rsp+r10*2+0x28] +XDIS 2779e: MISC BASE D54E8D545529 lea r26, ptr [rbp+r10*2+0x29] +XDIS 277a4: MISC BASE D54E8D54562A lea r26, ptr [rsi+r10*2+0x2a] +XDIS 277aa: MISC BASE D54E8D54572B lea r26, ptr [rdi+r10*2+0x2b] +XDIS 277b0: MISC BASE D54F8D54502C lea r26, ptr [r8+r10*2+0x2c] +XDIS 277b6: MISC BASE D54F8D54512D lea r26, ptr [r9+r10*2+0x2d] +XDIS 277bc: MISC BASE D54F8D54522E lea r26, ptr [r10+r10*2+0x2e] +XDIS 277c2: MISC BASE D54F8D54532F lea r26, ptr [r11+r10*2+0x2f] +XDIS 277c8: MISC BASE D54F8D545430 lea r26, ptr [r12+r10*2+0x30] +XDIS 277ce: MISC BASE D54F8D545531 lea r26, ptr [r13+r10*2+0x31] +XDIS 277d4: MISC BASE D54F8D545632 lea r26, ptr [r14+r10*2+0x32] +XDIS 277da: MISC BASE D54F8D545733 lea r26, ptr [r15+r10*2+0x33] +XDIS 277e0: MISC BASE D55E8D545034 lea r26, ptr [r16+r10*2+0x34] +XDIS 277e6: MISC BASE D55E8D545135 lea r26, ptr [r17+r10*2+0x35] +XDIS 277ec: MISC BASE D55E8D545236 lea r26, ptr [r18+r10*2+0x36] +XDIS 277f2: MISC BASE D55E8D545337 lea r26, ptr [r19+r10*2+0x37] +XDIS 277f8: MISC BASE D55E8D545438 lea r26, ptr [r20+r10*2+0x38] +XDIS 277fe: MISC BASE D55E8D545539 lea r26, ptr [r21+r10*2+0x39] +XDIS 27804: MISC BASE D55E8D54563A lea r26, ptr [r22+r10*2+0x3a] +XDIS 2780a: MISC BASE D55E8D54573B lea r26, ptr [r23+r10*2+0x3b] +XDIS 27810: MISC BASE D55F8D54503C lea r26, ptr [r24+r10*2+0x3c] +XDIS 27816: MISC BASE D55F8D54513D lea r26, ptr [r25+r10*2+0x3d] +XDIS 2781c: MISC BASE D55F8D54523E lea r26, ptr [r26+r10*2+0x3e] +XDIS 27822: MISC BASE D55F8D54533F lea r26, ptr [r27+r10*2+0x3f] +XDIS 27828: MISC BASE D55F8D545440 lea r26, ptr [r28+r10*2+0x40] +XDIS 2782e: MISC BASE D55F8D545541 lea r26, ptr [r29+r10*2+0x41] +XDIS 27834: MISC BASE D55F8D545642 lea r26, ptr [r30+r10*2+0x42] +XDIS 2783a: MISC BASE D55F8D545743 lea r26, ptr [r31+r10*2+0x43] +XDIS 27840: MISC BASE D54E8D545825 lea r26, ptr [rax+r11*2+0x25] +XDIS 27846: MISC BASE D54E8D545926 lea r26, ptr [rcx+r11*2+0x26] +XDIS 2784c: MISC BASE D54E8D545A27 lea r26, ptr [rdx+r11*2+0x27] +XDIS 27852: MISC BASE D54E8D545B28 lea r26, ptr [rbx+r11*2+0x28] +XDIS 27858: MISC BASE D54E8D545C29 lea r26, ptr [rsp+r11*2+0x29] +XDIS 2785e: MISC BASE D54E8D545D2A lea r26, ptr [rbp+r11*2+0x2a] +XDIS 27864: MISC BASE D54E8D545E2B lea r26, ptr [rsi+r11*2+0x2b] +XDIS 2786a: MISC BASE D54E8D545F2C lea r26, ptr [rdi+r11*2+0x2c] +XDIS 27870: MISC BASE D54F8D54582D lea r26, ptr [r8+r11*2+0x2d] +XDIS 27876: MISC BASE D54F8D54592E lea r26, ptr [r9+r11*2+0x2e] +XDIS 2787c: MISC BASE D54F8D545A2F lea r26, ptr [r10+r11*2+0x2f] +XDIS 27882: MISC BASE D54F8D545B30 lea r26, ptr [r11+r11*2+0x30] +XDIS 27888: MISC BASE D54F8D545C31 lea r26, ptr [r12+r11*2+0x31] +XDIS 2788e: MISC BASE D54F8D545D32 lea r26, ptr [r13+r11*2+0x32] +XDIS 27894: MISC BASE D54F8D545E33 lea r26, ptr [r14+r11*2+0x33] +XDIS 2789a: MISC BASE D54F8D545F34 lea r26, ptr [r15+r11*2+0x34] +XDIS 278a0: MISC BASE D55E8D545835 lea r26, ptr [r16+r11*2+0x35] +XDIS 278a6: MISC BASE D55E8D545936 lea r26, ptr [r17+r11*2+0x36] +XDIS 278ac: MISC BASE D55E8D545A37 lea r26, ptr [r18+r11*2+0x37] +XDIS 278b2: MISC BASE D55E8D545B38 lea r26, ptr [r19+r11*2+0x38] +XDIS 278b8: MISC BASE D55E8D545C39 lea r26, ptr [r20+r11*2+0x39] +XDIS 278be: MISC BASE D55E8D545D3A lea r26, ptr [r21+r11*2+0x3a] +XDIS 278c4: MISC BASE D55E8D545E3B lea r26, ptr [r22+r11*2+0x3b] +XDIS 278ca: MISC BASE D55E8D545F3C lea r26, ptr [r23+r11*2+0x3c] +XDIS 278d0: MISC BASE D55F8D54583D lea r26, ptr [r24+r11*2+0x3d] +XDIS 278d6: MISC BASE D55F8D54593E lea r26, ptr [r25+r11*2+0x3e] +XDIS 278dc: MISC BASE D55F8D545A3F lea r26, ptr [r26+r11*2+0x3f] +XDIS 278e2: MISC BASE D55F8D545B40 lea r26, ptr [r27+r11*2+0x40] +XDIS 278e8: MISC BASE D55F8D545C41 lea r26, ptr [r28+r11*2+0x41] +XDIS 278ee: MISC BASE D55F8D545D42 lea r26, ptr [r29+r11*2+0x42] +XDIS 278f4: MISC BASE D55F8D545E43 lea r26, ptr [r30+r11*2+0x43] +XDIS 278fa: MISC BASE D55F8D545F44 lea r26, ptr [r31+r11*2+0x44] +XDIS 27900: MISC BASE D54E8D546026 lea r26, ptr [rax+r12*2+0x26] +XDIS 27906: MISC BASE D54E8D546127 lea r26, ptr [rcx+r12*2+0x27] +XDIS 2790c: MISC BASE D54E8D546228 lea r26, ptr [rdx+r12*2+0x28] +XDIS 27912: MISC BASE D54E8D546329 lea r26, ptr [rbx+r12*2+0x29] +XDIS 27918: MISC BASE D54E8D54642A lea r26, ptr [rsp+r12*2+0x2a] +XDIS 2791e: MISC BASE D54E8D54652B lea r26, ptr [rbp+r12*2+0x2b] +XDIS 27924: MISC BASE D54E8D54662C lea r26, ptr [rsi+r12*2+0x2c] +XDIS 2792a: MISC BASE D54E8D54672D lea r26, ptr [rdi+r12*2+0x2d] +XDIS 27930: MISC BASE D54F8D54602E lea r26, ptr [r8+r12*2+0x2e] +XDIS 27936: MISC BASE D54F8D54612F lea r26, ptr [r9+r12*2+0x2f] +XDIS 2793c: MISC BASE D54F8D546230 lea r26, ptr [r10+r12*2+0x30] +XDIS 27942: MISC BASE D54F8D546331 lea r26, ptr [r11+r12*2+0x31] +XDIS 27948: MISC BASE D54F8D546432 lea r26, ptr [r12+r12*2+0x32] +XDIS 2794e: MISC BASE D54F8D546533 lea r26, ptr [r13+r12*2+0x33] +XDIS 27954: MISC BASE D54F8D546634 lea r26, ptr [r14+r12*2+0x34] +XDIS 2795a: MISC BASE D54F8D546735 lea r26, ptr [r15+r12*2+0x35] +XDIS 27960: MISC BASE D55E8D546036 lea r26, ptr [r16+r12*2+0x36] +XDIS 27966: MISC BASE D55E8D546137 lea r26, ptr [r17+r12*2+0x37] +XDIS 2796c: MISC BASE D55E8D546238 lea r26, ptr [r18+r12*2+0x38] +XDIS 27972: MISC BASE D55E8D546339 lea r26, ptr [r19+r12*2+0x39] +XDIS 27978: MISC BASE D55E8D54643A lea r26, ptr [r20+r12*2+0x3a] +XDIS 2797e: MISC BASE D55E8D54653B lea r26, ptr [r21+r12*2+0x3b] +XDIS 27984: MISC BASE D55E8D54663C lea r26, ptr [r22+r12*2+0x3c] +XDIS 2798a: MISC BASE D55E8D54673D lea r26, ptr [r23+r12*2+0x3d] +XDIS 27990: MISC BASE D55F8D54603E lea r26, ptr [r24+r12*2+0x3e] +XDIS 27996: MISC BASE D55F8D54613F lea r26, ptr [r25+r12*2+0x3f] +XDIS 2799c: MISC BASE D55F8D546240 lea r26, ptr [r26+r12*2+0x40] +XDIS 279a2: MISC BASE D55F8D546341 lea r26, ptr [r27+r12*2+0x41] +XDIS 279a8: MISC BASE D55F8D546442 lea r26, ptr [r28+r12*2+0x42] +XDIS 279ae: MISC BASE D55F8D546543 lea r26, ptr [r29+r12*2+0x43] +XDIS 279b4: MISC BASE D55F8D546644 lea r26, ptr [r30+r12*2+0x44] +XDIS 279ba: MISC BASE D55F8D546745 lea r26, ptr [r31+r12*2+0x45] +XDIS 279c0: MISC BASE D54E8D546827 lea r26, ptr [rax+r13*2+0x27] +XDIS 279c6: MISC BASE D54E8D546928 lea r26, ptr [rcx+r13*2+0x28] +XDIS 279cc: MISC BASE D54E8D546A29 lea r26, ptr [rdx+r13*2+0x29] +XDIS 279d2: MISC BASE D54E8D546B2A lea r26, ptr [rbx+r13*2+0x2a] +XDIS 279d8: MISC BASE D54E8D546C2B lea r26, ptr [rsp+r13*2+0x2b] +XDIS 279de: MISC BASE D54E8D546D2C lea r26, ptr [rbp+r13*2+0x2c] +XDIS 279e4: MISC BASE D54E8D546E2D lea r26, ptr [rsi+r13*2+0x2d] +XDIS 279ea: MISC BASE D54E8D546F2E lea r26, ptr [rdi+r13*2+0x2e] +XDIS 279f0: MISC BASE D54F8D54682F lea r26, ptr [r8+r13*2+0x2f] +XDIS 279f6: MISC BASE D54F8D546930 lea r26, ptr [r9+r13*2+0x30] +XDIS 279fc: MISC BASE D54F8D546A31 lea r26, ptr [r10+r13*2+0x31] +XDIS 27a02: MISC BASE D54F8D546B32 lea r26, ptr [r11+r13*2+0x32] +XDIS 27a08: MISC BASE D54F8D546C33 lea r26, ptr [r12+r13*2+0x33] +XDIS 27a0e: MISC BASE D54F8D546D34 lea r26, ptr [r13+r13*2+0x34] +XDIS 27a14: MISC BASE D54F8D546E35 lea r26, ptr [r14+r13*2+0x35] +XDIS 27a1a: MISC BASE D54F8D546F36 lea r26, ptr [r15+r13*2+0x36] +XDIS 27a20: MISC BASE D55E8D546837 lea r26, ptr [r16+r13*2+0x37] +XDIS 27a26: MISC BASE D55E8D546938 lea r26, ptr [r17+r13*2+0x38] +XDIS 27a2c: MISC BASE D55E8D546A39 lea r26, ptr [r18+r13*2+0x39] +XDIS 27a32: MISC BASE D55E8D546B3A lea r26, ptr [r19+r13*2+0x3a] +XDIS 27a38: MISC BASE D55E8D546C3B lea r26, ptr [r20+r13*2+0x3b] +XDIS 27a3e: MISC BASE D55E8D546D3C lea r26, ptr [r21+r13*2+0x3c] +XDIS 27a44: MISC BASE D55E8D546E3D lea r26, ptr [r22+r13*2+0x3d] +XDIS 27a4a: MISC BASE D55E8D546F3E lea r26, ptr [r23+r13*2+0x3e] +XDIS 27a50: MISC BASE D55F8D54683F lea r26, ptr [r24+r13*2+0x3f] +XDIS 27a56: MISC BASE D55F8D546940 lea r26, ptr [r25+r13*2+0x40] +XDIS 27a5c: MISC BASE D55F8D546A41 lea r26, ptr [r26+r13*2+0x41] +XDIS 27a62: MISC BASE D55F8D546B42 lea r26, ptr [r27+r13*2+0x42] +XDIS 27a68: MISC BASE D55F8D546C43 lea r26, ptr [r28+r13*2+0x43] +XDIS 27a6e: MISC BASE D55F8D546D44 lea r26, ptr [r29+r13*2+0x44] +XDIS 27a74: MISC BASE D55F8D546E45 lea r26, ptr [r30+r13*2+0x45] +XDIS 27a7a: MISC BASE D55F8D546F46 lea r26, ptr [r31+r13*2+0x46] +XDIS 27a80: MISC BASE D54E8D547028 lea r26, ptr [rax+r14*2+0x28] +XDIS 27a86: MISC BASE D54E8D547129 lea r26, ptr [rcx+r14*2+0x29] +XDIS 27a8c: MISC BASE D54E8D54722A lea r26, ptr [rdx+r14*2+0x2a] +XDIS 27a92: MISC BASE D54E8D54732B lea r26, ptr [rbx+r14*2+0x2b] +XDIS 27a98: MISC BASE D54E8D54742C lea r26, ptr [rsp+r14*2+0x2c] +XDIS 27a9e: MISC BASE D54E8D54752D lea r26, ptr [rbp+r14*2+0x2d] +XDIS 27aa4: MISC BASE D54E8D54762E lea r26, ptr [rsi+r14*2+0x2e] +XDIS 27aaa: MISC BASE D54E8D54772F lea r26, ptr [rdi+r14*2+0x2f] +XDIS 27ab0: MISC BASE D54F8D547030 lea r26, ptr [r8+r14*2+0x30] +XDIS 27ab6: MISC BASE D54F8D547131 lea r26, ptr [r9+r14*2+0x31] +XDIS 27abc: MISC BASE D54F8D547232 lea r26, ptr [r10+r14*2+0x32] +XDIS 27ac2: MISC BASE D54F8D547333 lea r26, ptr [r11+r14*2+0x33] +XDIS 27ac8: MISC BASE D54F8D547434 lea r26, ptr [r12+r14*2+0x34] +XDIS 27ace: MISC BASE D54F8D547535 lea r26, ptr [r13+r14*2+0x35] +XDIS 27ad4: MISC BASE D54F8D547636 lea r26, ptr [r14+r14*2+0x36] +XDIS 27ada: MISC BASE D54F8D547737 lea r26, ptr [r15+r14*2+0x37] +XDIS 27ae0: MISC BASE D55E8D547038 lea r26, ptr [r16+r14*2+0x38] +XDIS 27ae6: MISC BASE D55E8D547139 lea r26, ptr [r17+r14*2+0x39] +XDIS 27aec: MISC BASE D55E8D54723A lea r26, ptr [r18+r14*2+0x3a] +XDIS 27af2: MISC BASE D55E8D54733B lea r26, ptr [r19+r14*2+0x3b] +XDIS 27af8: MISC BASE D55E8D54743C lea r26, ptr [r20+r14*2+0x3c] +XDIS 27afe: MISC BASE D55E8D54753D lea r26, ptr [r21+r14*2+0x3d] +XDIS 27b04: MISC BASE D55E8D54763E lea r26, ptr [r22+r14*2+0x3e] +XDIS 27b0a: MISC BASE D55E8D54773F lea r26, ptr [r23+r14*2+0x3f] +XDIS 27b10: MISC BASE D55F8D547040 lea r26, ptr [r24+r14*2+0x40] +XDIS 27b16: MISC BASE D55F8D547141 lea r26, ptr [r25+r14*2+0x41] +XDIS 27b1c: MISC BASE D55F8D547242 lea r26, ptr [r26+r14*2+0x42] +XDIS 27b22: MISC BASE D55F8D547343 lea r26, ptr [r27+r14*2+0x43] +XDIS 27b28: MISC BASE D55F8D547444 lea r26, ptr [r28+r14*2+0x44] +XDIS 27b2e: MISC BASE D55F8D547545 lea r26, ptr [r29+r14*2+0x45] +XDIS 27b34: MISC BASE D55F8D547646 lea r26, ptr [r30+r14*2+0x46] +XDIS 27b3a: MISC BASE D55F8D547747 lea r26, ptr [r31+r14*2+0x47] +XDIS 27b40: MISC BASE D54E8D547829 lea r26, ptr [rax+r15*2+0x29] +XDIS 27b46: MISC BASE D54E8D54792A lea r26, ptr [rcx+r15*2+0x2a] +XDIS 27b4c: MISC BASE D54E8D547A2B lea r26, ptr [rdx+r15*2+0x2b] +XDIS 27b52: MISC BASE D54E8D547B2C lea r26, ptr [rbx+r15*2+0x2c] +XDIS 27b58: MISC BASE D54E8D547C2D lea r26, ptr [rsp+r15*2+0x2d] +XDIS 27b5e: MISC BASE D54E8D547D2E lea r26, ptr [rbp+r15*2+0x2e] +XDIS 27b64: MISC BASE D54E8D547E2F lea r26, ptr [rsi+r15*2+0x2f] +XDIS 27b6a: MISC BASE D54E8D547F30 lea r26, ptr [rdi+r15*2+0x30] +XDIS 27b70: MISC BASE D54F8D547831 lea r26, ptr [r8+r15*2+0x31] +XDIS 27b76: MISC BASE D54F8D547932 lea r26, ptr [r9+r15*2+0x32] +XDIS 27b7c: MISC BASE D54F8D547A33 lea r26, ptr [r10+r15*2+0x33] +XDIS 27b82: MISC BASE D54F8D547B34 lea r26, ptr [r11+r15*2+0x34] +XDIS 27b88: MISC BASE D54F8D547C35 lea r26, ptr [r12+r15*2+0x35] +XDIS 27b8e: MISC BASE D54F8D547D36 lea r26, ptr [r13+r15*2+0x36] +XDIS 27b94: MISC BASE D54F8D547E37 lea r26, ptr [r14+r15*2+0x37] +XDIS 27b9a: MISC BASE D54F8D547F38 lea r26, ptr [r15+r15*2+0x38] +XDIS 27ba0: MISC BASE D55E8D547839 lea r26, ptr [r16+r15*2+0x39] +XDIS 27ba6: MISC BASE D55E8D54793A lea r26, ptr [r17+r15*2+0x3a] +XDIS 27bac: MISC BASE D55E8D547A3B lea r26, ptr [r18+r15*2+0x3b] +XDIS 27bb2: MISC BASE D55E8D547B3C lea r26, ptr [r19+r15*2+0x3c] +XDIS 27bb8: MISC BASE D55E8D547C3D lea r26, ptr [r20+r15*2+0x3d] +XDIS 27bbe: MISC BASE D55E8D547D3E lea r26, ptr [r21+r15*2+0x3e] +XDIS 27bc4: MISC BASE D55E8D547E3F lea r26, ptr [r22+r15*2+0x3f] +XDIS 27bca: MISC BASE D55E8D547F40 lea r26, ptr [r23+r15*2+0x40] +XDIS 27bd0: MISC BASE D55F8D547841 lea r26, ptr [r24+r15*2+0x41] +XDIS 27bd6: MISC BASE D55F8D547942 lea r26, ptr [r25+r15*2+0x42] +XDIS 27bdc: MISC BASE D55F8D547A43 lea r26, ptr [r26+r15*2+0x43] +XDIS 27be2: MISC BASE D55F8D547B44 lea r26, ptr [r27+r15*2+0x44] +XDIS 27be8: MISC BASE D55F8D547C45 lea r26, ptr [r28+r15*2+0x45] +XDIS 27bee: MISC BASE D55F8D547D46 lea r26, ptr [r29+r15*2+0x46] +XDIS 27bf4: MISC BASE D55F8D547E47 lea r26, ptr [r30+r15*2+0x47] +XDIS 27bfa: MISC BASE D55F8D547F48 lea r26, ptr [r31+r15*2+0x48] +XDIS 27c00: MISC BASE D56C8D54402A lea r26, ptr [rax+r16*2+0x2a] +XDIS 27c06: MISC BASE D56C8D54412B lea r26, ptr [rcx+r16*2+0x2b] +XDIS 27c0c: MISC BASE D56C8D54422C lea r26, ptr [rdx+r16*2+0x2c] +XDIS 27c12: MISC BASE D56C8D54432D lea r26, ptr [rbx+r16*2+0x2d] +XDIS 27c18: MISC BASE D56C8D54442E lea r26, ptr [rsp+r16*2+0x2e] +XDIS 27c1e: MISC BASE D56C8D54452F lea r26, ptr [rbp+r16*2+0x2f] +XDIS 27c24: MISC BASE D56C8D544630 lea r26, ptr [rsi+r16*2+0x30] +XDIS 27c2a: MISC BASE D56C8D544731 lea r26, ptr [rdi+r16*2+0x31] +XDIS 27c30: MISC BASE D56D8D544032 lea r26, ptr [r8+r16*2+0x32] +XDIS 27c36: MISC BASE D56D8D544133 lea r26, ptr [r9+r16*2+0x33] +XDIS 27c3c: MISC BASE D56D8D544234 lea r26, ptr [r10+r16*2+0x34] +XDIS 27c42: MISC BASE D56D8D544335 lea r26, ptr [r11+r16*2+0x35] +XDIS 27c48: MISC BASE D56D8D544436 lea r26, ptr [r12+r16*2+0x36] +XDIS 27c4e: MISC BASE D56D8D544537 lea r26, ptr [r13+r16*2+0x37] +XDIS 27c54: MISC BASE D56D8D544638 lea r26, ptr [r14+r16*2+0x38] +XDIS 27c5a: MISC BASE D56D8D544739 lea r26, ptr [r15+r16*2+0x39] +XDIS 27c60: MISC BASE D57C8D54403A lea r26, ptr [r16+r16*2+0x3a] +XDIS 27c66: MISC BASE D57C8D54413B lea r26, ptr [r17+r16*2+0x3b] +XDIS 27c6c: MISC BASE D57C8D54423C lea r26, ptr [r18+r16*2+0x3c] +XDIS 27c72: MISC BASE D57C8D54433D lea r26, ptr [r19+r16*2+0x3d] +XDIS 27c78: MISC BASE D57C8D54443E lea r26, ptr [r20+r16*2+0x3e] +XDIS 27c7e: MISC BASE D57C8D54453F lea r26, ptr [r21+r16*2+0x3f] +XDIS 27c84: MISC BASE D57C8D544640 lea r26, ptr [r22+r16*2+0x40] +XDIS 27c8a: MISC BASE D57C8D544741 lea r26, ptr [r23+r16*2+0x41] +XDIS 27c90: MISC BASE D57D8D544042 lea r26, ptr [r24+r16*2+0x42] +XDIS 27c96: MISC BASE D57D8D544143 lea r26, ptr [r25+r16*2+0x43] +XDIS 27c9c: MISC BASE D57D8D544244 lea r26, ptr [r26+r16*2+0x44] +XDIS 27ca2: MISC BASE D57D8D544345 lea r26, ptr [r27+r16*2+0x45] +XDIS 27ca8: MISC BASE D57D8D544446 lea r26, ptr [r28+r16*2+0x46] +XDIS 27cae: MISC BASE D57D8D544547 lea r26, ptr [r29+r16*2+0x47] +XDIS 27cb4: MISC BASE D57D8D544648 lea r26, ptr [r30+r16*2+0x48] +XDIS 27cba: MISC BASE D57D8D544749 lea r26, ptr [r31+r16*2+0x49] +XDIS 27cc0: MISC BASE D56C8D54482B lea r26, ptr [rax+r17*2+0x2b] +XDIS 27cc6: MISC BASE D56C8D54492C lea r26, ptr [rcx+r17*2+0x2c] +XDIS 27ccc: MISC BASE D56C8D544A2D lea r26, ptr [rdx+r17*2+0x2d] +XDIS 27cd2: MISC BASE D56C8D544B2E lea r26, ptr [rbx+r17*2+0x2e] +XDIS 27cd8: MISC BASE D56C8D544C2F lea r26, ptr [rsp+r17*2+0x2f] +XDIS 27cde: MISC BASE D56C8D544D30 lea r26, ptr [rbp+r17*2+0x30] +XDIS 27ce4: MISC BASE D56C8D544E31 lea r26, ptr [rsi+r17*2+0x31] +XDIS 27cea: MISC BASE D56C8D544F32 lea r26, ptr [rdi+r17*2+0x32] +XDIS 27cf0: MISC BASE D56D8D544833 lea r26, ptr [r8+r17*2+0x33] +XDIS 27cf6: MISC BASE D56D8D544934 lea r26, ptr [r9+r17*2+0x34] +XDIS 27cfc: MISC BASE D56D8D544A35 lea r26, ptr [r10+r17*2+0x35] +XDIS 27d02: MISC BASE D56D8D544B36 lea r26, ptr [r11+r17*2+0x36] +XDIS 27d08: MISC BASE D56D8D544C37 lea r26, ptr [r12+r17*2+0x37] +XDIS 27d0e: MISC BASE D56D8D544D38 lea r26, ptr [r13+r17*2+0x38] +XDIS 27d14: MISC BASE D56D8D544E39 lea r26, ptr [r14+r17*2+0x39] +XDIS 27d1a: MISC BASE D56D8D544F3A lea r26, ptr [r15+r17*2+0x3a] +XDIS 27d20: MISC BASE D57C8D54483B lea r26, ptr [r16+r17*2+0x3b] +XDIS 27d26: MISC BASE D57C8D54493C lea r26, ptr [r17+r17*2+0x3c] +XDIS 27d2c: MISC BASE D57C8D544A3D lea r26, ptr [r18+r17*2+0x3d] +XDIS 27d32: MISC BASE D57C8D544B3E lea r26, ptr [r19+r17*2+0x3e] +XDIS 27d38: MISC BASE D57C8D544C3F lea r26, ptr [r20+r17*2+0x3f] +XDIS 27d3e: MISC BASE D57C8D544D40 lea r26, ptr [r21+r17*2+0x40] +XDIS 27d44: MISC BASE D57C8D544E41 lea r26, ptr [r22+r17*2+0x41] +XDIS 27d4a: MISC BASE D57C8D544F42 lea r26, ptr [r23+r17*2+0x42] +XDIS 27d50: MISC BASE D57D8D544843 lea r26, ptr [r24+r17*2+0x43] +XDIS 27d56: MISC BASE D57D8D544944 lea r26, ptr [r25+r17*2+0x44] +XDIS 27d5c: MISC BASE D57D8D544A45 lea r26, ptr [r26+r17*2+0x45] +XDIS 27d62: MISC BASE D57D8D544B46 lea r26, ptr [r27+r17*2+0x46] +XDIS 27d68: MISC BASE D57D8D544C47 lea r26, ptr [r28+r17*2+0x47] +XDIS 27d6e: MISC BASE D57D8D544D48 lea r26, ptr [r29+r17*2+0x48] +XDIS 27d74: MISC BASE D57D8D544E49 lea r26, ptr [r30+r17*2+0x49] +XDIS 27d7a: MISC BASE D57D8D544F4A lea r26, ptr [r31+r17*2+0x4a] +XDIS 27d80: MISC BASE D56C8D54502C lea r26, ptr [rax+r18*2+0x2c] +XDIS 27d86: MISC BASE D56C8D54512D lea r26, ptr [rcx+r18*2+0x2d] +XDIS 27d8c: MISC BASE D56C8D54522E lea r26, ptr [rdx+r18*2+0x2e] +XDIS 27d92: MISC BASE D56C8D54532F lea r26, ptr [rbx+r18*2+0x2f] +XDIS 27d98: MISC BASE D56C8D545430 lea r26, ptr [rsp+r18*2+0x30] +XDIS 27d9e: MISC BASE D56C8D545531 lea r26, ptr [rbp+r18*2+0x31] +XDIS 27da4: MISC BASE D56C8D545632 lea r26, ptr [rsi+r18*2+0x32] +XDIS 27daa: MISC BASE D56C8D545733 lea r26, ptr [rdi+r18*2+0x33] +XDIS 27db0: MISC BASE D56D8D545034 lea r26, ptr [r8+r18*2+0x34] +XDIS 27db6: MISC BASE D56D8D545135 lea r26, ptr [r9+r18*2+0x35] +XDIS 27dbc: MISC BASE D56D8D545236 lea r26, ptr [r10+r18*2+0x36] +XDIS 27dc2: MISC BASE D56D8D545337 lea r26, ptr [r11+r18*2+0x37] +XDIS 27dc8: MISC BASE D56D8D545438 lea r26, ptr [r12+r18*2+0x38] +XDIS 27dce: MISC BASE D56D8D545539 lea r26, ptr [r13+r18*2+0x39] +XDIS 27dd4: MISC BASE D56D8D54563A lea r26, ptr [r14+r18*2+0x3a] +XDIS 27dda: MISC BASE D56D8D54573B lea r26, ptr [r15+r18*2+0x3b] +XDIS 27de0: MISC BASE D57C8D54503C lea r26, ptr [r16+r18*2+0x3c] +XDIS 27de6: MISC BASE D57C8D54513D lea r26, ptr [r17+r18*2+0x3d] +XDIS 27dec: MISC BASE D57C8D54523E lea r26, ptr [r18+r18*2+0x3e] +XDIS 27df2: MISC BASE D57C8D54533F lea r26, ptr [r19+r18*2+0x3f] +XDIS 27df8: MISC BASE D57C8D545440 lea r26, ptr [r20+r18*2+0x40] +XDIS 27dfe: MISC BASE D57C8D545541 lea r26, ptr [r21+r18*2+0x41] +XDIS 27e04: MISC BASE D57C8D545642 lea r26, ptr [r22+r18*2+0x42] +XDIS 27e0a: MISC BASE D57C8D545743 lea r26, ptr [r23+r18*2+0x43] +XDIS 27e10: MISC BASE D57D8D545044 lea r26, ptr [r24+r18*2+0x44] +XDIS 27e16: MISC BASE D57D8D545145 lea r26, ptr [r25+r18*2+0x45] +XDIS 27e1c: MISC BASE D57D8D545246 lea r26, ptr [r26+r18*2+0x46] +XDIS 27e22: MISC BASE D57D8D545347 lea r26, ptr [r27+r18*2+0x47] +XDIS 27e28: MISC BASE D57D8D545448 lea r26, ptr [r28+r18*2+0x48] +XDIS 27e2e: MISC BASE D57D8D545549 lea r26, ptr [r29+r18*2+0x49] +XDIS 27e34: MISC BASE D57D8D54564A lea r26, ptr [r30+r18*2+0x4a] +XDIS 27e3a: MISC BASE D57D8D54574B lea r26, ptr [r31+r18*2+0x4b] +XDIS 27e40: MISC BASE D56C8D54582D lea r26, ptr [rax+r19*2+0x2d] +XDIS 27e46: MISC BASE D56C8D54592E lea r26, ptr [rcx+r19*2+0x2e] +XDIS 27e4c: MISC BASE D56C8D545A2F lea r26, ptr [rdx+r19*2+0x2f] +XDIS 27e52: MISC BASE D56C8D545B30 lea r26, ptr [rbx+r19*2+0x30] +XDIS 27e58: MISC BASE D56C8D545C31 lea r26, ptr [rsp+r19*2+0x31] +XDIS 27e5e: MISC BASE D56C8D545D32 lea r26, ptr [rbp+r19*2+0x32] +XDIS 27e64: MISC BASE D56C8D545E33 lea r26, ptr [rsi+r19*2+0x33] +XDIS 27e6a: MISC BASE D56C8D545F34 lea r26, ptr [rdi+r19*2+0x34] +XDIS 27e70: MISC BASE D56D8D545835 lea r26, ptr [r8+r19*2+0x35] +XDIS 27e76: MISC BASE D56D8D545936 lea r26, ptr [r9+r19*2+0x36] +XDIS 27e7c: MISC BASE D56D8D545A37 lea r26, ptr [r10+r19*2+0x37] +XDIS 27e82: MISC BASE D56D8D545B38 lea r26, ptr [r11+r19*2+0x38] +XDIS 27e88: MISC BASE D56D8D545C39 lea r26, ptr [r12+r19*2+0x39] +XDIS 27e8e: MISC BASE D56D8D545D3A lea r26, ptr [r13+r19*2+0x3a] +XDIS 27e94: MISC BASE D56D8D545E3B lea r26, ptr [r14+r19*2+0x3b] +XDIS 27e9a: MISC BASE D56D8D545F3C lea r26, ptr [r15+r19*2+0x3c] +XDIS 27ea0: MISC BASE D57C8D54583D lea r26, ptr [r16+r19*2+0x3d] +XDIS 27ea6: MISC BASE D57C8D54593E lea r26, ptr [r17+r19*2+0x3e] +XDIS 27eac: MISC BASE D57C8D545A3F lea r26, ptr [r18+r19*2+0x3f] +XDIS 27eb2: MISC BASE D57C8D545B40 lea r26, ptr [r19+r19*2+0x40] +XDIS 27eb8: MISC BASE D57C8D545C41 lea r26, ptr [r20+r19*2+0x41] +XDIS 27ebe: MISC BASE D57C8D545D42 lea r26, ptr [r21+r19*2+0x42] +XDIS 27ec4: MISC BASE D57C8D545E43 lea r26, ptr [r22+r19*2+0x43] +XDIS 27eca: MISC BASE D57C8D545F44 lea r26, ptr [r23+r19*2+0x44] +XDIS 27ed0: MISC BASE D57D8D545845 lea r26, ptr [r24+r19*2+0x45] +XDIS 27ed6: MISC BASE D57D8D545946 lea r26, ptr [r25+r19*2+0x46] +XDIS 27edc: MISC BASE D57D8D545A47 lea r26, ptr [r26+r19*2+0x47] +XDIS 27ee2: MISC BASE D57D8D545B48 lea r26, ptr [r27+r19*2+0x48] +XDIS 27ee8: MISC BASE D57D8D545C49 lea r26, ptr [r28+r19*2+0x49] +XDIS 27eee: MISC BASE D57D8D545D4A lea r26, ptr [r29+r19*2+0x4a] +XDIS 27ef4: MISC BASE D57D8D545E4B lea r26, ptr [r30+r19*2+0x4b] +XDIS 27efa: MISC BASE D57D8D545F4C lea r26, ptr [r31+r19*2+0x4c] +XDIS 27f00: MISC BASE D56C8D54602E lea r26, ptr [rax+r20*2+0x2e] +XDIS 27f06: MISC BASE D56C8D54612F lea r26, ptr [rcx+r20*2+0x2f] +XDIS 27f0c: MISC BASE D56C8D546230 lea r26, ptr [rdx+r20*2+0x30] +XDIS 27f12: MISC BASE D56C8D546331 lea r26, ptr [rbx+r20*2+0x31] +XDIS 27f18: MISC BASE D56C8D546432 lea r26, ptr [rsp+r20*2+0x32] +XDIS 27f1e: MISC BASE D56C8D546533 lea r26, ptr [rbp+r20*2+0x33] +XDIS 27f24: MISC BASE D56C8D546634 lea r26, ptr [rsi+r20*2+0x34] +XDIS 27f2a: MISC BASE D56C8D546735 lea r26, ptr [rdi+r20*2+0x35] +XDIS 27f30: MISC BASE D56D8D546036 lea r26, ptr [r8+r20*2+0x36] +XDIS 27f36: MISC BASE D56D8D546137 lea r26, ptr [r9+r20*2+0x37] +XDIS 27f3c: MISC BASE D56D8D546238 lea r26, ptr [r10+r20*2+0x38] +XDIS 27f42: MISC BASE D56D8D546339 lea r26, ptr [r11+r20*2+0x39] +XDIS 27f48: MISC BASE D56D8D54643A lea r26, ptr [r12+r20*2+0x3a] +XDIS 27f4e: MISC BASE D56D8D54653B lea r26, ptr [r13+r20*2+0x3b] +XDIS 27f54: MISC BASE D56D8D54663C lea r26, ptr [r14+r20*2+0x3c] +XDIS 27f5a: MISC BASE D56D8D54673D lea r26, ptr [r15+r20*2+0x3d] +XDIS 27f60: MISC BASE D57C8D54603E lea r26, ptr [r16+r20*2+0x3e] +XDIS 27f66: MISC BASE D57C8D54613F lea r26, ptr [r17+r20*2+0x3f] +XDIS 27f6c: MISC BASE D57C8D546240 lea r26, ptr [r18+r20*2+0x40] +XDIS 27f72: MISC BASE D57C8D546341 lea r26, ptr [r19+r20*2+0x41] +XDIS 27f78: MISC BASE D57C8D546442 lea r26, ptr [r20+r20*2+0x42] +XDIS 27f7e: MISC BASE D57C8D546543 lea r26, ptr [r21+r20*2+0x43] +XDIS 27f84: MISC BASE D57C8D546644 lea r26, ptr [r22+r20*2+0x44] +XDIS 27f8a: MISC BASE D57C8D546745 lea r26, ptr [r23+r20*2+0x45] +XDIS 27f90: MISC BASE D57D8D546046 lea r26, ptr [r24+r20*2+0x46] +XDIS 27f96: MISC BASE D57D8D546147 lea r26, ptr [r25+r20*2+0x47] +XDIS 27f9c: MISC BASE D57D8D546248 lea r26, ptr [r26+r20*2+0x48] +XDIS 27fa2: MISC BASE D57D8D546349 lea r26, ptr [r27+r20*2+0x49] +XDIS 27fa8: MISC BASE D57D8D54644A lea r26, ptr [r28+r20*2+0x4a] +XDIS 27fae: MISC BASE D57D8D54654B lea r26, ptr [r29+r20*2+0x4b] +XDIS 27fb4: MISC BASE D57D8D54664C lea r26, ptr [r30+r20*2+0x4c] +XDIS 27fba: MISC BASE D57D8D54674D lea r26, ptr [r31+r20*2+0x4d] +XDIS 27fc0: MISC BASE D56C8D54682F lea r26, ptr [rax+r21*2+0x2f] +XDIS 27fc6: MISC BASE D56C8D546930 lea r26, ptr [rcx+r21*2+0x30] +XDIS 27fcc: MISC BASE D56C8D546A31 lea r26, ptr [rdx+r21*2+0x31] +XDIS 27fd2: MISC BASE D56C8D546B32 lea r26, ptr [rbx+r21*2+0x32] +XDIS 27fd8: MISC BASE D56C8D546C33 lea r26, ptr [rsp+r21*2+0x33] +XDIS 27fde: MISC BASE D56C8D546D34 lea r26, ptr [rbp+r21*2+0x34] +XDIS 27fe4: MISC BASE D56C8D546E35 lea r26, ptr [rsi+r21*2+0x35] +XDIS 27fea: MISC BASE D56C8D546F36 lea r26, ptr [rdi+r21*2+0x36] +XDIS 27ff0: MISC BASE D56D8D546837 lea r26, ptr [r8+r21*2+0x37] +XDIS 27ff6: MISC BASE D56D8D546938 lea r26, ptr [r9+r21*2+0x38] +XDIS 27ffc: MISC BASE D56D8D546A39 lea r26, ptr [r10+r21*2+0x39] +XDIS 28002: MISC BASE D56D8D546B3A lea r26, ptr [r11+r21*2+0x3a] +XDIS 28008: MISC BASE D56D8D546C3B lea r26, ptr [r12+r21*2+0x3b] +XDIS 2800e: MISC BASE D56D8D546D3C lea r26, ptr [r13+r21*2+0x3c] +XDIS 28014: MISC BASE D56D8D546E3D lea r26, ptr [r14+r21*2+0x3d] +XDIS 2801a: MISC BASE D56D8D546F3E lea r26, ptr [r15+r21*2+0x3e] +XDIS 28020: MISC BASE D57C8D54683F lea r26, ptr [r16+r21*2+0x3f] +XDIS 28026: MISC BASE D57C8D546940 lea r26, ptr [r17+r21*2+0x40] +XDIS 2802c: MISC BASE D57C8D546A41 lea r26, ptr [r18+r21*2+0x41] +XDIS 28032: MISC BASE D57C8D546B42 lea r26, ptr [r19+r21*2+0x42] +XDIS 28038: MISC BASE D57C8D546C43 lea r26, ptr [r20+r21*2+0x43] +XDIS 2803e: MISC BASE D57C8D546D44 lea r26, ptr [r21+r21*2+0x44] +XDIS 28044: MISC BASE D57C8D546E45 lea r26, ptr [r22+r21*2+0x45] +XDIS 2804a: MISC BASE D57C8D546F46 lea r26, ptr [r23+r21*2+0x46] +XDIS 28050: MISC BASE D57D8D546847 lea r26, ptr [r24+r21*2+0x47] +XDIS 28056: MISC BASE D57D8D546948 lea r26, ptr [r25+r21*2+0x48] +XDIS 2805c: MISC BASE D57D8D546A49 lea r26, ptr [r26+r21*2+0x49] +XDIS 28062: MISC BASE D57D8D546B4A lea r26, ptr [r27+r21*2+0x4a] +XDIS 28068: MISC BASE D57D8D546C4B lea r26, ptr [r28+r21*2+0x4b] +XDIS 2806e: MISC BASE D57D8D546D4C lea r26, ptr [r29+r21*2+0x4c] +XDIS 28074: MISC BASE D57D8D546E4D lea r26, ptr [r30+r21*2+0x4d] +XDIS 2807a: MISC BASE D57D8D546F4E lea r26, ptr [r31+r21*2+0x4e] +XDIS 28080: MISC BASE D56C8D547030 lea r26, ptr [rax+r22*2+0x30] +XDIS 28086: MISC BASE D56C8D547131 lea r26, ptr [rcx+r22*2+0x31] +XDIS 2808c: MISC BASE D56C8D547232 lea r26, ptr [rdx+r22*2+0x32] +XDIS 28092: MISC BASE D56C8D547333 lea r26, ptr [rbx+r22*2+0x33] +XDIS 28098: MISC BASE D56C8D547434 lea r26, ptr [rsp+r22*2+0x34] +XDIS 2809e: MISC BASE D56C8D547535 lea r26, ptr [rbp+r22*2+0x35] +XDIS 280a4: MISC BASE D56C8D547636 lea r26, ptr [rsi+r22*2+0x36] +XDIS 280aa: MISC BASE D56C8D547737 lea r26, ptr [rdi+r22*2+0x37] +XDIS 280b0: MISC BASE D56D8D547038 lea r26, ptr [r8+r22*2+0x38] +XDIS 280b6: MISC BASE D56D8D547139 lea r26, ptr [r9+r22*2+0x39] +XDIS 280bc: MISC BASE D56D8D54723A lea r26, ptr [r10+r22*2+0x3a] +XDIS 280c2: MISC BASE D56D8D54733B lea r26, ptr [r11+r22*2+0x3b] +XDIS 280c8: MISC BASE D56D8D54743C lea r26, ptr [r12+r22*2+0x3c] +XDIS 280ce: MISC BASE D56D8D54753D lea r26, ptr [r13+r22*2+0x3d] +XDIS 280d4: MISC BASE D56D8D54763E lea r26, ptr [r14+r22*2+0x3e] +XDIS 280da: MISC BASE D56D8D54773F lea r26, ptr [r15+r22*2+0x3f] +XDIS 280e0: MISC BASE D57C8D547040 lea r26, ptr [r16+r22*2+0x40] +XDIS 280e6: MISC BASE D57C8D547141 lea r26, ptr [r17+r22*2+0x41] +XDIS 280ec: MISC BASE D57C8D547242 lea r26, ptr [r18+r22*2+0x42] +XDIS 280f2: MISC BASE D57C8D547343 lea r26, ptr [r19+r22*2+0x43] +XDIS 280f8: MISC BASE D57C8D547444 lea r26, ptr [r20+r22*2+0x44] +XDIS 280fe: MISC BASE D57C8D547545 lea r26, ptr [r21+r22*2+0x45] +XDIS 28104: MISC BASE D57C8D547646 lea r26, ptr [r22+r22*2+0x46] +XDIS 2810a: MISC BASE D57C8D547747 lea r26, ptr [r23+r22*2+0x47] +XDIS 28110: MISC BASE D57D8D547048 lea r26, ptr [r24+r22*2+0x48] +XDIS 28116: MISC BASE D57D8D547149 lea r26, ptr [r25+r22*2+0x49] +XDIS 2811c: MISC BASE D57D8D54724A lea r26, ptr [r26+r22*2+0x4a] +XDIS 28122: MISC BASE D57D8D54734B lea r26, ptr [r27+r22*2+0x4b] +XDIS 28128: MISC BASE D57D8D54744C lea r26, ptr [r28+r22*2+0x4c] +XDIS 2812e: MISC BASE D57D8D54754D lea r26, ptr [r29+r22*2+0x4d] +XDIS 28134: MISC BASE D57D8D54764E lea r26, ptr [r30+r22*2+0x4e] +XDIS 2813a: MISC BASE D57D8D54774F lea r26, ptr [r31+r22*2+0x4f] +XDIS 28140: MISC BASE D56C8D547831 lea r26, ptr [rax+r23*2+0x31] +XDIS 28146: MISC BASE D56C8D547932 lea r26, ptr [rcx+r23*2+0x32] +XDIS 2814c: MISC BASE D56C8D547A33 lea r26, ptr [rdx+r23*2+0x33] +XDIS 28152: MISC BASE D56C8D547B34 lea r26, ptr [rbx+r23*2+0x34] +XDIS 28158: MISC BASE D56C8D547C35 lea r26, ptr [rsp+r23*2+0x35] +XDIS 2815e: MISC BASE D56C8D547D36 lea r26, ptr [rbp+r23*2+0x36] +XDIS 28164: MISC BASE D56C8D547E37 lea r26, ptr [rsi+r23*2+0x37] +XDIS 2816a: MISC BASE D56C8D547F38 lea r26, ptr [rdi+r23*2+0x38] +XDIS 28170: MISC BASE D56D8D547839 lea r26, ptr [r8+r23*2+0x39] +XDIS 28176: MISC BASE D56D8D54793A lea r26, ptr [r9+r23*2+0x3a] +XDIS 2817c: MISC BASE D56D8D547A3B lea r26, ptr [r10+r23*2+0x3b] +XDIS 28182: MISC BASE D56D8D547B3C lea r26, ptr [r11+r23*2+0x3c] +XDIS 28188: MISC BASE D56D8D547C3D lea r26, ptr [r12+r23*2+0x3d] +XDIS 2818e: MISC BASE D56D8D547D3E lea r26, ptr [r13+r23*2+0x3e] +XDIS 28194: MISC BASE D56D8D547E3F lea r26, ptr [r14+r23*2+0x3f] +XDIS 2819a: MISC BASE D56D8D547F40 lea r26, ptr [r15+r23*2+0x40] +XDIS 281a0: MISC BASE D57C8D547841 lea r26, ptr [r16+r23*2+0x41] +XDIS 281a6: MISC BASE D57C8D547942 lea r26, ptr [r17+r23*2+0x42] +XDIS 281ac: MISC BASE D57C8D547A43 lea r26, ptr [r18+r23*2+0x43] +XDIS 281b2: MISC BASE D57C8D547B44 lea r26, ptr [r19+r23*2+0x44] +XDIS 281b8: MISC BASE D57C8D547C45 lea r26, ptr [r20+r23*2+0x45] +XDIS 281be: MISC BASE D57C8D547D46 lea r26, ptr [r21+r23*2+0x46] +XDIS 281c4: MISC BASE D57C8D547E47 lea r26, ptr [r22+r23*2+0x47] +XDIS 281ca: MISC BASE D57C8D547F48 lea r26, ptr [r23+r23*2+0x48] +XDIS 281d0: MISC BASE D57D8D547849 lea r26, ptr [r24+r23*2+0x49] +XDIS 281d6: MISC BASE D57D8D54794A lea r26, ptr [r25+r23*2+0x4a] +XDIS 281dc: MISC BASE D57D8D547A4B lea r26, ptr [r26+r23*2+0x4b] +XDIS 281e2: MISC BASE D57D8D547B4C lea r26, ptr [r27+r23*2+0x4c] +XDIS 281e8: MISC BASE D57D8D547C4D lea r26, ptr [r28+r23*2+0x4d] +XDIS 281ee: MISC BASE D57D8D547D4E lea r26, ptr [r29+r23*2+0x4e] +XDIS 281f4: MISC BASE D57D8D547E4F lea r26, ptr [r30+r23*2+0x4f] +XDIS 281fa: MISC BASE D57D8D547F50 lea r26, ptr [r31+r23*2+0x50] +XDIS 28200: MISC BASE D56E8D544032 lea r26, ptr [rax+r24*2+0x32] +XDIS 28206: MISC BASE D56E8D544133 lea r26, ptr [rcx+r24*2+0x33] +XDIS 2820c: MISC BASE D56E8D544234 lea r26, ptr [rdx+r24*2+0x34] +XDIS 28212: MISC BASE D56E8D544335 lea r26, ptr [rbx+r24*2+0x35] +XDIS 28218: MISC BASE D56E8D544436 lea r26, ptr [rsp+r24*2+0x36] +XDIS 2821e: MISC BASE D56E8D544537 lea r26, ptr [rbp+r24*2+0x37] +XDIS 28224: MISC BASE D56E8D544638 lea r26, ptr [rsi+r24*2+0x38] +XDIS 2822a: MISC BASE D56E8D544739 lea r26, ptr [rdi+r24*2+0x39] +XDIS 28230: MISC BASE D56F8D54403A lea r26, ptr [r8+r24*2+0x3a] +XDIS 28236: MISC BASE D56F8D54413B lea r26, ptr [r9+r24*2+0x3b] +XDIS 2823c: MISC BASE D56F8D54423C lea r26, ptr [r10+r24*2+0x3c] +XDIS 28242: MISC BASE D56F8D54433D lea r26, ptr [r11+r24*2+0x3d] +XDIS 28248: MISC BASE D56F8D54443E lea r26, ptr [r12+r24*2+0x3e] +XDIS 2824e: MISC BASE D56F8D54453F lea r26, ptr [r13+r24*2+0x3f] +XDIS 28254: MISC BASE D56F8D544640 lea r26, ptr [r14+r24*2+0x40] +XDIS 2825a: MISC BASE D56F8D544741 lea r26, ptr [r15+r24*2+0x41] +XDIS 28260: MISC BASE D57E8D544042 lea r26, ptr [r16+r24*2+0x42] +XDIS 28266: MISC BASE D57E8D544143 lea r26, ptr [r17+r24*2+0x43] +XDIS 2826c: MISC BASE D57E8D544244 lea r26, ptr [r18+r24*2+0x44] +XDIS 28272: MISC BASE D57E8D544345 lea r26, ptr [r19+r24*2+0x45] +XDIS 28278: MISC BASE D57E8D544446 lea r26, ptr [r20+r24*2+0x46] +XDIS 2827e: MISC BASE D57E8D544547 lea r26, ptr [r21+r24*2+0x47] +XDIS 28284: MISC BASE D57E8D544648 lea r26, ptr [r22+r24*2+0x48] +XDIS 2828a: MISC BASE D57E8D544749 lea r26, ptr [r23+r24*2+0x49] +XDIS 28290: MISC BASE D57F8D54404A lea r26, ptr [r24+r24*2+0x4a] +XDIS 28296: MISC BASE D57F8D54414B lea r26, ptr [r25+r24*2+0x4b] +XDIS 2829c: MISC BASE D57F8D54424C lea r26, ptr [r26+r24*2+0x4c] +XDIS 282a2: MISC BASE D57F8D54434D lea r26, ptr [r27+r24*2+0x4d] +XDIS 282a8: MISC BASE D57F8D54444E lea r26, ptr [r28+r24*2+0x4e] +XDIS 282ae: MISC BASE D57F8D54454F lea r26, ptr [r29+r24*2+0x4f] +XDIS 282b4: MISC BASE D57F8D544650 lea r26, ptr [r30+r24*2+0x50] +XDIS 282ba: MISC BASE D57F8D544751 lea r26, ptr [r31+r24*2+0x51] +XDIS 282c0: MISC BASE D56E8D544833 lea r26, ptr [rax+r25*2+0x33] +XDIS 282c6: MISC BASE D56E8D544934 lea r26, ptr [rcx+r25*2+0x34] +XDIS 282cc: MISC BASE D56E8D544A35 lea r26, ptr [rdx+r25*2+0x35] +XDIS 282d2: MISC BASE D56E8D544B36 lea r26, ptr [rbx+r25*2+0x36] +XDIS 282d8: MISC BASE D56E8D544C37 lea r26, ptr [rsp+r25*2+0x37] +XDIS 282de: MISC BASE D56E8D544D38 lea r26, ptr [rbp+r25*2+0x38] +XDIS 282e4: MISC BASE D56E8D544E39 lea r26, ptr [rsi+r25*2+0x39] +XDIS 282ea: MISC BASE D56E8D544F3A lea r26, ptr [rdi+r25*2+0x3a] +XDIS 282f0: MISC BASE D56F8D54483B lea r26, ptr [r8+r25*2+0x3b] +XDIS 282f6: MISC BASE D56F8D54493C lea r26, ptr [r9+r25*2+0x3c] +XDIS 282fc: MISC BASE D56F8D544A3D lea r26, ptr [r10+r25*2+0x3d] +XDIS 28302: MISC BASE D56F8D544B3E lea r26, ptr [r11+r25*2+0x3e] +XDIS 28308: MISC BASE D56F8D544C3F lea r26, ptr [r12+r25*2+0x3f] +XDIS 2830e: MISC BASE D56F8D544D40 lea r26, ptr [r13+r25*2+0x40] +XDIS 28314: MISC BASE D56F8D544E41 lea r26, ptr [r14+r25*2+0x41] +XDIS 2831a: MISC BASE D56F8D544F42 lea r26, ptr [r15+r25*2+0x42] +XDIS 28320: MISC BASE D57E8D544843 lea r26, ptr [r16+r25*2+0x43] +XDIS 28326: MISC BASE D57E8D544944 lea r26, ptr [r17+r25*2+0x44] +XDIS 2832c: MISC BASE D57E8D544A45 lea r26, ptr [r18+r25*2+0x45] +XDIS 28332: MISC BASE D57E8D544B46 lea r26, ptr [r19+r25*2+0x46] +XDIS 28338: MISC BASE D57E8D544C47 lea r26, ptr [r20+r25*2+0x47] +XDIS 2833e: MISC BASE D57E8D544D48 lea r26, ptr [r21+r25*2+0x48] +XDIS 28344: MISC BASE D57E8D544E49 lea r26, ptr [r22+r25*2+0x49] +XDIS 2834a: MISC BASE D57E8D544F4A lea r26, ptr [r23+r25*2+0x4a] +XDIS 28350: MISC BASE D57F8D54484B lea r26, ptr [r24+r25*2+0x4b] +XDIS 28356: MISC BASE D57F8D54494C lea r26, ptr [r25+r25*2+0x4c] +XDIS 2835c: MISC BASE D57F8D544A4D lea r26, ptr [r26+r25*2+0x4d] +XDIS 28362: MISC BASE D57F8D544B4E lea r26, ptr [r27+r25*2+0x4e] +XDIS 28368: MISC BASE D57F8D544C4F lea r26, ptr [r28+r25*2+0x4f] +XDIS 2836e: MISC BASE D57F8D544D50 lea r26, ptr [r29+r25*2+0x50] +XDIS 28374: MISC BASE D57F8D544E51 lea r26, ptr [r30+r25*2+0x51] +XDIS 2837a: MISC BASE D57F8D544F52 lea r26, ptr [r31+r25*2+0x52] +XDIS 28380: MISC BASE D56E8D545034 lea r26, ptr [rax+r26*2+0x34] +XDIS 28386: MISC BASE D56E8D545135 lea r26, ptr [rcx+r26*2+0x35] +XDIS 2838c: MISC BASE D56E8D545236 lea r26, ptr [rdx+r26*2+0x36] +XDIS 28392: MISC BASE D56E8D545337 lea r26, ptr [rbx+r26*2+0x37] +XDIS 28398: MISC BASE D56E8D545438 lea r26, ptr [rsp+r26*2+0x38] +XDIS 2839e: MISC BASE D56E8D545539 lea r26, ptr [rbp+r26*2+0x39] +XDIS 283a4: MISC BASE D56E8D54563A lea r26, ptr [rsi+r26*2+0x3a] +XDIS 283aa: MISC BASE D56E8D54573B lea r26, ptr [rdi+r26*2+0x3b] +XDIS 283b0: MISC BASE D56F8D54503C lea r26, ptr [r8+r26*2+0x3c] +XDIS 283b6: MISC BASE D56F8D54513D lea r26, ptr [r9+r26*2+0x3d] +XDIS 283bc: MISC BASE D56F8D54523E lea r26, ptr [r10+r26*2+0x3e] +XDIS 283c2: MISC BASE D56F8D54533F lea r26, ptr [r11+r26*2+0x3f] +XDIS 283c8: MISC BASE D56F8D545440 lea r26, ptr [r12+r26*2+0x40] +XDIS 283ce: MISC BASE D56F8D545541 lea r26, ptr [r13+r26*2+0x41] +XDIS 283d4: MISC BASE D56F8D545642 lea r26, ptr [r14+r26*2+0x42] +XDIS 283da: MISC BASE D56F8D545743 lea r26, ptr [r15+r26*2+0x43] +XDIS 283e0: MISC BASE D57E8D545044 lea r26, ptr [r16+r26*2+0x44] +XDIS 283e6: MISC BASE D57E8D545145 lea r26, ptr [r17+r26*2+0x45] +XDIS 283ec: MISC BASE D57E8D545246 lea r26, ptr [r18+r26*2+0x46] +XDIS 283f2: MISC BASE D57E8D545347 lea r26, ptr [r19+r26*2+0x47] +XDIS 283f8: MISC BASE D57E8D545448 lea r26, ptr [r20+r26*2+0x48] +XDIS 283fe: MISC BASE D57E8D545549 lea r26, ptr [r21+r26*2+0x49] +XDIS 28404: MISC BASE D57E8D54564A lea r26, ptr [r22+r26*2+0x4a] +XDIS 2840a: MISC BASE D57E8D54574B lea r26, ptr [r23+r26*2+0x4b] +XDIS 28410: MISC BASE D57F8D54504C lea r26, ptr [r24+r26*2+0x4c] +XDIS 28416: MISC BASE D57F8D54514D lea r26, ptr [r25+r26*2+0x4d] +XDIS 2841c: MISC BASE D57F8D54524E lea r26, ptr [r26+r26*2+0x4e] +XDIS 28422: MISC BASE D57F8D54534F lea r26, ptr [r27+r26*2+0x4f] +XDIS 28428: MISC BASE D57F8D545450 lea r26, ptr [r28+r26*2+0x50] +XDIS 2842e: MISC BASE D57F8D545551 lea r26, ptr [r29+r26*2+0x51] +XDIS 28434: MISC BASE D57F8D545652 lea r26, ptr [r30+r26*2+0x52] +XDIS 2843a: MISC BASE D57F8D545753 lea r26, ptr [r31+r26*2+0x53] +XDIS 28440: MISC BASE D56E8D545835 lea r26, ptr [rax+r27*2+0x35] +XDIS 28446: MISC BASE D56E8D545936 lea r26, ptr [rcx+r27*2+0x36] +XDIS 2844c: MISC BASE D56E8D545A37 lea r26, ptr [rdx+r27*2+0x37] +XDIS 28452: MISC BASE D56E8D545B38 lea r26, ptr [rbx+r27*2+0x38] +XDIS 28458: MISC BASE D56E8D545C39 lea r26, ptr [rsp+r27*2+0x39] +XDIS 2845e: MISC BASE D56E8D545D3A lea r26, ptr [rbp+r27*2+0x3a] +XDIS 28464: MISC BASE D56E8D545E3B lea r26, ptr [rsi+r27*2+0x3b] +XDIS 2846a: MISC BASE D56E8D545F3C lea r26, ptr [rdi+r27*2+0x3c] +XDIS 28470: MISC BASE D56F8D54583D lea r26, ptr [r8+r27*2+0x3d] +XDIS 28476: MISC BASE D56F8D54593E lea r26, ptr [r9+r27*2+0x3e] +XDIS 2847c: MISC BASE D56F8D545A3F lea r26, ptr [r10+r27*2+0x3f] +XDIS 28482: MISC BASE D56F8D545B40 lea r26, ptr [r11+r27*2+0x40] +XDIS 28488: MISC BASE D56F8D545C41 lea r26, ptr [r12+r27*2+0x41] +XDIS 2848e: MISC BASE D56F8D545D42 lea r26, ptr [r13+r27*2+0x42] +XDIS 28494: MISC BASE D56F8D545E43 lea r26, ptr [r14+r27*2+0x43] +XDIS 2849a: MISC BASE D56F8D545F44 lea r26, ptr [r15+r27*2+0x44] +XDIS 284a0: MISC BASE D57E8D545845 lea r26, ptr [r16+r27*2+0x45] +XDIS 284a6: MISC BASE D57E8D545946 lea r26, ptr [r17+r27*2+0x46] +XDIS 284ac: MISC BASE D57E8D545A47 lea r26, ptr [r18+r27*2+0x47] +XDIS 284b2: MISC BASE D57E8D545B48 lea r26, ptr [r19+r27*2+0x48] +XDIS 284b8: MISC BASE D57E8D545C49 lea r26, ptr [r20+r27*2+0x49] +XDIS 284be: MISC BASE D57E8D545D4A lea r26, ptr [r21+r27*2+0x4a] +XDIS 284c4: MISC BASE D57E8D545E4B lea r26, ptr [r22+r27*2+0x4b] +XDIS 284ca: MISC BASE D57E8D545F4C lea r26, ptr [r23+r27*2+0x4c] +XDIS 284d0: MISC BASE D57F8D54584D lea r26, ptr [r24+r27*2+0x4d] +XDIS 284d6: MISC BASE D57F8D54594E lea r26, ptr [r25+r27*2+0x4e] +XDIS 284dc: MISC BASE D57F8D545A4F lea r26, ptr [r26+r27*2+0x4f] +XDIS 284e2: MISC BASE D57F8D545B50 lea r26, ptr [r27+r27*2+0x50] +XDIS 284e8: MISC BASE D57F8D545C51 lea r26, ptr [r28+r27*2+0x51] +XDIS 284ee: MISC BASE D57F8D545D52 lea r26, ptr [r29+r27*2+0x52] +XDIS 284f4: MISC BASE D57F8D545E53 lea r26, ptr [r30+r27*2+0x53] +XDIS 284fa: MISC BASE D57F8D545F54 lea r26, ptr [r31+r27*2+0x54] +XDIS 28500: MISC BASE D56E8D546036 lea r26, ptr [rax+r28*2+0x36] +XDIS 28506: MISC BASE D56E8D546137 lea r26, ptr [rcx+r28*2+0x37] +XDIS 2850c: MISC BASE D56E8D546238 lea r26, ptr [rdx+r28*2+0x38] +XDIS 28512: MISC BASE D56E8D546339 lea r26, ptr [rbx+r28*2+0x39] +XDIS 28518: MISC BASE D56E8D54643A lea r26, ptr [rsp+r28*2+0x3a] +XDIS 2851e: MISC BASE D56E8D54653B lea r26, ptr [rbp+r28*2+0x3b] +XDIS 28524: MISC BASE D56E8D54663C lea r26, ptr [rsi+r28*2+0x3c] +XDIS 2852a: MISC BASE D56E8D54673D lea r26, ptr [rdi+r28*2+0x3d] +XDIS 28530: MISC BASE D56F8D54603E lea r26, ptr [r8+r28*2+0x3e] +XDIS 28536: MISC BASE D56F8D54613F lea r26, ptr [r9+r28*2+0x3f] +XDIS 2853c: MISC BASE D56F8D546240 lea r26, ptr [r10+r28*2+0x40] +XDIS 28542: MISC BASE D56F8D546341 lea r26, ptr [r11+r28*2+0x41] +XDIS 28548: MISC BASE D56F8D546442 lea r26, ptr [r12+r28*2+0x42] +XDIS 2854e: MISC BASE D56F8D546543 lea r26, ptr [r13+r28*2+0x43] +XDIS 28554: MISC BASE D56F8D546644 lea r26, ptr [r14+r28*2+0x44] +XDIS 2855a: MISC BASE D56F8D546745 lea r26, ptr [r15+r28*2+0x45] +XDIS 28560: MISC BASE D57E8D546046 lea r26, ptr [r16+r28*2+0x46] +XDIS 28566: MISC BASE D57E8D546147 lea r26, ptr [r17+r28*2+0x47] +XDIS 2856c: MISC BASE D57E8D546248 lea r26, ptr [r18+r28*2+0x48] +XDIS 28572: MISC BASE D57E8D546349 lea r26, ptr [r19+r28*2+0x49] +XDIS 28578: MISC BASE D57E8D54644A lea r26, ptr [r20+r28*2+0x4a] +XDIS 2857e: MISC BASE D57E8D54654B lea r26, ptr [r21+r28*2+0x4b] +XDIS 28584: MISC BASE D57E8D54664C lea r26, ptr [r22+r28*2+0x4c] +XDIS 2858a: MISC BASE D57E8D54674D lea r26, ptr [r23+r28*2+0x4d] +XDIS 28590: MISC BASE D57F8D54604E lea r26, ptr [r24+r28*2+0x4e] +XDIS 28596: MISC BASE D57F8D54614F lea r26, ptr [r25+r28*2+0x4f] +XDIS 2859c: MISC BASE D57F8D546250 lea r26, ptr [r26+r28*2+0x50] +XDIS 285a2: MISC BASE D57F8D546351 lea r26, ptr [r27+r28*2+0x51] +XDIS 285a8: MISC BASE D57F8D546452 lea r26, ptr [r28+r28*2+0x52] +XDIS 285ae: MISC BASE D57F8D546553 lea r26, ptr [r29+r28*2+0x53] +XDIS 285b4: MISC BASE D57F8D546654 lea r26, ptr [r30+r28*2+0x54] +XDIS 285ba: MISC BASE D57F8D546755 lea r26, ptr [r31+r28*2+0x55] +XDIS 285c0: MISC BASE D56E8D546837 lea r26, ptr [rax+r29*2+0x37] +XDIS 285c6: MISC BASE D56E8D546938 lea r26, ptr [rcx+r29*2+0x38] +XDIS 285cc: MISC BASE D56E8D546A39 lea r26, ptr [rdx+r29*2+0x39] +XDIS 285d2: MISC BASE D56E8D546B3A lea r26, ptr [rbx+r29*2+0x3a] +XDIS 285d8: MISC BASE D56E8D546C3B lea r26, ptr [rsp+r29*2+0x3b] +XDIS 285de: MISC BASE D56E8D546D3C lea r26, ptr [rbp+r29*2+0x3c] +XDIS 285e4: MISC BASE D56E8D546E3D lea r26, ptr [rsi+r29*2+0x3d] +XDIS 285ea: MISC BASE D56E8D546F3E lea r26, ptr [rdi+r29*2+0x3e] +XDIS 285f0: MISC BASE D56F8D54683F lea r26, ptr [r8+r29*2+0x3f] +XDIS 285f6: MISC BASE D56F8D546940 lea r26, ptr [r9+r29*2+0x40] +XDIS 285fc: MISC BASE D56F8D546A41 lea r26, ptr [r10+r29*2+0x41] +XDIS 28602: MISC BASE D56F8D546B42 lea r26, ptr [r11+r29*2+0x42] +XDIS 28608: MISC BASE D56F8D546C43 lea r26, ptr [r12+r29*2+0x43] +XDIS 2860e: MISC BASE D56F8D546D44 lea r26, ptr [r13+r29*2+0x44] +XDIS 28614: MISC BASE D56F8D546E45 lea r26, ptr [r14+r29*2+0x45] +XDIS 2861a: MISC BASE D56F8D546F46 lea r26, ptr [r15+r29*2+0x46] +XDIS 28620: MISC BASE D57E8D546847 lea r26, ptr [r16+r29*2+0x47] +XDIS 28626: MISC BASE D57E8D546948 lea r26, ptr [r17+r29*2+0x48] +XDIS 2862c: MISC BASE D57E8D546A49 lea r26, ptr [r18+r29*2+0x49] +XDIS 28632: MISC BASE D57E8D546B4A lea r26, ptr [r19+r29*2+0x4a] +XDIS 28638: MISC BASE D57E8D546C4B lea r26, ptr [r20+r29*2+0x4b] +XDIS 2863e: MISC BASE D57E8D546D4C lea r26, ptr [r21+r29*2+0x4c] +XDIS 28644: MISC BASE D57E8D546E4D lea r26, ptr [r22+r29*2+0x4d] +XDIS 2864a: MISC BASE D57E8D546F4E lea r26, ptr [r23+r29*2+0x4e] +XDIS 28650: MISC BASE D57F8D54684F lea r26, ptr [r24+r29*2+0x4f] +XDIS 28656: MISC BASE D57F8D546950 lea r26, ptr [r25+r29*2+0x50] +XDIS 2865c: MISC BASE D57F8D546A51 lea r26, ptr [r26+r29*2+0x51] +XDIS 28662: MISC BASE D57F8D546B52 lea r26, ptr [r27+r29*2+0x52] +XDIS 28668: MISC BASE D57F8D546C53 lea r26, ptr [r28+r29*2+0x53] +XDIS 2866e: MISC BASE D57F8D546D54 lea r26, ptr [r29+r29*2+0x54] +XDIS 28674: MISC BASE D57F8D546E55 lea r26, ptr [r30+r29*2+0x55] +XDIS 2867a: MISC BASE D57F8D546F56 lea r26, ptr [r31+r29*2+0x56] +XDIS 28680: MISC BASE D56E8D547038 lea r26, ptr [rax+r30*2+0x38] +XDIS 28686: MISC BASE D56E8D547139 lea r26, ptr [rcx+r30*2+0x39] +XDIS 2868c: MISC BASE D56E8D54723A lea r26, ptr [rdx+r30*2+0x3a] +XDIS 28692: MISC BASE D56E8D54733B lea r26, ptr [rbx+r30*2+0x3b] +XDIS 28698: MISC BASE D56E8D54743C lea r26, ptr [rsp+r30*2+0x3c] +XDIS 2869e: MISC BASE D56E8D54753D lea r26, ptr [rbp+r30*2+0x3d] +XDIS 286a4: MISC BASE D56E8D54763E lea r26, ptr [rsi+r30*2+0x3e] +XDIS 286aa: MISC BASE D56E8D54773F lea r26, ptr [rdi+r30*2+0x3f] +XDIS 286b0: MISC BASE D56F8D547040 lea r26, ptr [r8+r30*2+0x40] +XDIS 286b6: MISC BASE D56F8D547141 lea r26, ptr [r9+r30*2+0x41] +XDIS 286bc: MISC BASE D56F8D547242 lea r26, ptr [r10+r30*2+0x42] +XDIS 286c2: MISC BASE D56F8D547343 lea r26, ptr [r11+r30*2+0x43] +XDIS 286c8: MISC BASE D56F8D547444 lea r26, ptr [r12+r30*2+0x44] +XDIS 286ce: MISC BASE D56F8D547545 lea r26, ptr [r13+r30*2+0x45] +XDIS 286d4: MISC BASE D56F8D547646 lea r26, ptr [r14+r30*2+0x46] +XDIS 286da: MISC BASE D56F8D547747 lea r26, ptr [r15+r30*2+0x47] +XDIS 286e0: MISC BASE D57E8D547048 lea r26, ptr [r16+r30*2+0x48] +XDIS 286e6: MISC BASE D57E8D547149 lea r26, ptr [r17+r30*2+0x49] +XDIS 286ec: MISC BASE D57E8D54724A lea r26, ptr [r18+r30*2+0x4a] +XDIS 286f2: MISC BASE D57E8D54734B lea r26, ptr [r19+r30*2+0x4b] +XDIS 286f8: MISC BASE D57E8D54744C lea r26, ptr [r20+r30*2+0x4c] +XDIS 286fe: MISC BASE D57E8D54754D lea r26, ptr [r21+r30*2+0x4d] +XDIS 28704: MISC BASE D57E8D54764E lea r26, ptr [r22+r30*2+0x4e] +XDIS 2870a: MISC BASE D57E8D54774F lea r26, ptr [r23+r30*2+0x4f] +XDIS 28710: MISC BASE D57F8D547050 lea r26, ptr [r24+r30*2+0x50] +XDIS 28716: MISC BASE D57F8D547151 lea r26, ptr [r25+r30*2+0x51] +XDIS 2871c: MISC BASE D57F8D547252 lea r26, ptr [r26+r30*2+0x52] +XDIS 28722: MISC BASE D57F8D547353 lea r26, ptr [r27+r30*2+0x53] +XDIS 28728: MISC BASE D57F8D547454 lea r26, ptr [r28+r30*2+0x54] +XDIS 2872e: MISC BASE D57F8D547555 lea r26, ptr [r29+r30*2+0x55] +XDIS 28734: MISC BASE D57F8D547656 lea r26, ptr [r30+r30*2+0x56] +XDIS 2873a: MISC BASE D57F8D547757 lea r26, ptr [r31+r30*2+0x57] +XDIS 28740: MISC BASE D56E8D547839 lea r26, ptr [rax+r31*2+0x39] +XDIS 28746: MISC BASE D56E8D54793A lea r26, ptr [rcx+r31*2+0x3a] +XDIS 2874c: MISC BASE D56E8D547A3B lea r26, ptr [rdx+r31*2+0x3b] +XDIS 28752: MISC BASE D56E8D547B3C lea r26, ptr [rbx+r31*2+0x3c] +XDIS 28758: MISC BASE D56E8D547C3D lea r26, ptr [rsp+r31*2+0x3d] +XDIS 2875e: MISC BASE D56E8D547D3E lea r26, ptr [rbp+r31*2+0x3e] +XDIS 28764: MISC BASE D56E8D547E3F lea r26, ptr [rsi+r31*2+0x3f] +XDIS 2876a: MISC BASE D56E8D547F40 lea r26, ptr [rdi+r31*2+0x40] +XDIS 28770: MISC BASE D56F8D547841 lea r26, ptr [r8+r31*2+0x41] +XDIS 28776: MISC BASE D56F8D547942 lea r26, ptr [r9+r31*2+0x42] +XDIS 2877c: MISC BASE D56F8D547A43 lea r26, ptr [r10+r31*2+0x43] +XDIS 28782: MISC BASE D56F8D547B44 lea r26, ptr [r11+r31*2+0x44] +XDIS 28788: MISC BASE D56F8D547C45 lea r26, ptr [r12+r31*2+0x45] +XDIS 2878e: MISC BASE D56F8D547D46 lea r26, ptr [r13+r31*2+0x46] +XDIS 28794: MISC BASE D56F8D547E47 lea r26, ptr [r14+r31*2+0x47] +XDIS 2879a: MISC BASE D56F8D547F48 lea r26, ptr [r15+r31*2+0x48] +XDIS 287a0: MISC BASE D57E8D547849 lea r26, ptr [r16+r31*2+0x49] +XDIS 287a6: MISC BASE D57E8D54794A lea r26, ptr [r17+r31*2+0x4a] +XDIS 287ac: MISC BASE D57E8D547A4B lea r26, ptr [r18+r31*2+0x4b] +XDIS 287b2: MISC BASE D57E8D547B4C lea r26, ptr [r19+r31*2+0x4c] +XDIS 287b8: MISC BASE D57E8D547C4D lea r26, ptr [r20+r31*2+0x4d] +XDIS 287be: MISC BASE D57E8D547D4E lea r26, ptr [r21+r31*2+0x4e] +XDIS 287c4: MISC BASE D57E8D547E4F lea r26, ptr [r22+r31*2+0x4f] +XDIS 287ca: MISC BASE D57E8D547F50 lea r26, ptr [r23+r31*2+0x50] +XDIS 287d0: MISC BASE D57F8D547851 lea r26, ptr [r24+r31*2+0x51] +XDIS 287d6: MISC BASE D57F8D547952 lea r26, ptr [r25+r31*2+0x52] +XDIS 287dc: MISC BASE D57F8D547A53 lea r26, ptr [r26+r31*2+0x53] +XDIS 287e2: MISC BASE D57F8D547B54 lea r26, ptr [r27+r31*2+0x54] +XDIS 287e8: MISC BASE D57F8D547C55 lea r26, ptr [r28+r31*2+0x55] +XDIS 287ee: MISC BASE D57F8D547D56 lea r26, ptr [r29+r31*2+0x56] +XDIS 287f4: MISC BASE D57F8D547E57 lea r26, ptr [r30+r31*2+0x57] +XDIS 287fa: MISC BASE D57F8D547F58 lea r26, ptr [r31+r31*2+0x58] +XDIS 28800: MISC BASE D54C8D5C401B lea r27, ptr [rax+rax*2+0x1b] +XDIS 28806: MISC BASE D54C8D5C411C lea r27, ptr [rcx+rax*2+0x1c] +XDIS 2880c: MISC BASE D54C8D5C421D lea r27, ptr [rdx+rax*2+0x1d] +XDIS 28812: MISC BASE D54C8D5C431E lea r27, ptr [rbx+rax*2+0x1e] +XDIS 28818: MISC BASE D54C8D5C441F lea r27, ptr [rsp+rax*2+0x1f] +XDIS 2881e: MISC BASE D54C8D5C4520 lea r27, ptr [rbp+rax*2+0x20] +XDIS 28824: MISC BASE D54C8D5C4621 lea r27, ptr [rsi+rax*2+0x21] +XDIS 2882a: MISC BASE D54C8D5C4722 lea r27, ptr [rdi+rax*2+0x22] +XDIS 28830: MISC BASE D54D8D5C4023 lea r27, ptr [r8+rax*2+0x23] +XDIS 28836: MISC BASE D54D8D5C4124 lea r27, ptr [r9+rax*2+0x24] +XDIS 2883c: MISC BASE D54D8D5C4225 lea r27, ptr [r10+rax*2+0x25] +XDIS 28842: MISC BASE D54D8D5C4326 lea r27, ptr [r11+rax*2+0x26] +XDIS 28848: MISC BASE D54D8D5C4427 lea r27, ptr [r12+rax*2+0x27] +XDIS 2884e: MISC BASE D54D8D5C4528 lea r27, ptr [r13+rax*2+0x28] +XDIS 28854: MISC BASE D54D8D5C4629 lea r27, ptr [r14+rax*2+0x29] +XDIS 2885a: MISC BASE D54D8D5C472A lea r27, ptr [r15+rax*2+0x2a] +XDIS 28860: MISC BASE D55C8D5C402B lea r27, ptr [r16+rax*2+0x2b] +XDIS 28866: MISC BASE D55C8D5C412C lea r27, ptr [r17+rax*2+0x2c] +XDIS 2886c: MISC BASE D55C8D5C422D lea r27, ptr [r18+rax*2+0x2d] +XDIS 28872: MISC BASE D55C8D5C432E lea r27, ptr [r19+rax*2+0x2e] +XDIS 28878: MISC BASE D55C8D5C442F lea r27, ptr [r20+rax*2+0x2f] +XDIS 2887e: MISC BASE D55C8D5C4530 lea r27, ptr [r21+rax*2+0x30] +XDIS 28884: MISC BASE D55C8D5C4631 lea r27, ptr [r22+rax*2+0x31] +XDIS 2888a: MISC BASE D55C8D5C4732 lea r27, ptr [r23+rax*2+0x32] +XDIS 28890: MISC BASE D55D8D5C4033 lea r27, ptr [r24+rax*2+0x33] +XDIS 28896: MISC BASE D55D8D5C4134 lea r27, ptr [r25+rax*2+0x34] +XDIS 2889c: MISC BASE D55D8D5C4235 lea r27, ptr [r26+rax*2+0x35] +XDIS 288a2: MISC BASE D55D8D5C4336 lea r27, ptr [r27+rax*2+0x36] +XDIS 288a8: MISC BASE D55D8D5C4437 lea r27, ptr [r28+rax*2+0x37] +XDIS 288ae: MISC BASE D55D8D5C4538 lea r27, ptr [r29+rax*2+0x38] +XDIS 288b4: MISC BASE D55D8D5C4639 lea r27, ptr [r30+rax*2+0x39] +XDIS 288ba: MISC BASE D55D8D5C473A lea r27, ptr [r31+rax*2+0x3a] +XDIS 288c0: MISC BASE D54C8D5C481C lea r27, ptr [rax+rcx*2+0x1c] +XDIS 288c6: MISC BASE D54C8D5C491D lea r27, ptr [rcx+rcx*2+0x1d] +XDIS 288cc: MISC BASE D54C8D5C4A1E lea r27, ptr [rdx+rcx*2+0x1e] +XDIS 288d2: MISC BASE D54C8D5C4B1F lea r27, ptr [rbx+rcx*2+0x1f] +XDIS 288d8: MISC BASE D54C8D5C4C20 lea r27, ptr [rsp+rcx*2+0x20] +XDIS 288de: MISC BASE D54C8D5C4D21 lea r27, ptr [rbp+rcx*2+0x21] +XDIS 288e4: MISC BASE D54C8D5C4E22 lea r27, ptr [rsi+rcx*2+0x22] +XDIS 288ea: MISC BASE D54C8D5C4F23 lea r27, ptr [rdi+rcx*2+0x23] +XDIS 288f0: MISC BASE D54D8D5C4824 lea r27, ptr [r8+rcx*2+0x24] +XDIS 288f6: MISC BASE D54D8D5C4925 lea r27, ptr [r9+rcx*2+0x25] +XDIS 288fc: MISC BASE D54D8D5C4A26 lea r27, ptr [r10+rcx*2+0x26] +XDIS 28902: MISC BASE D54D8D5C4B27 lea r27, ptr [r11+rcx*2+0x27] +XDIS 28908: MISC BASE D54D8D5C4C28 lea r27, ptr [r12+rcx*2+0x28] +XDIS 2890e: MISC BASE D54D8D5C4D29 lea r27, ptr [r13+rcx*2+0x29] +XDIS 28914: MISC BASE D54D8D5C4E2A lea r27, ptr [r14+rcx*2+0x2a] +XDIS 2891a: MISC BASE D54D8D5C4F2B lea r27, ptr [r15+rcx*2+0x2b] +XDIS 28920: MISC BASE D55C8D5C482C lea r27, ptr [r16+rcx*2+0x2c] +XDIS 28926: MISC BASE D55C8D5C492D lea r27, ptr [r17+rcx*2+0x2d] +XDIS 2892c: MISC BASE D55C8D5C4A2E lea r27, ptr [r18+rcx*2+0x2e] +XDIS 28932: MISC BASE D55C8D5C4B2F lea r27, ptr [r19+rcx*2+0x2f] +XDIS 28938: MISC BASE D55C8D5C4C30 lea r27, ptr [r20+rcx*2+0x30] +XDIS 2893e: MISC BASE D55C8D5C4D31 lea r27, ptr [r21+rcx*2+0x31] +XDIS 28944: MISC BASE D55C8D5C4E32 lea r27, ptr [r22+rcx*2+0x32] +XDIS 2894a: MISC BASE D55C8D5C4F33 lea r27, ptr [r23+rcx*2+0x33] +XDIS 28950: MISC BASE D55D8D5C4834 lea r27, ptr [r24+rcx*2+0x34] +XDIS 28956: MISC BASE D55D8D5C4935 lea r27, ptr [r25+rcx*2+0x35] +XDIS 2895c: MISC BASE D55D8D5C4A36 lea r27, ptr [r26+rcx*2+0x36] +XDIS 28962: MISC BASE D55D8D5C4B37 lea r27, ptr [r27+rcx*2+0x37] +XDIS 28968: MISC BASE D55D8D5C4C38 lea r27, ptr [r28+rcx*2+0x38] +XDIS 2896e: MISC BASE D55D8D5C4D39 lea r27, ptr [r29+rcx*2+0x39] +XDIS 28974: MISC BASE D55D8D5C4E3A lea r27, ptr [r30+rcx*2+0x3a] +XDIS 2897a: MISC BASE D55D8D5C4F3B lea r27, ptr [r31+rcx*2+0x3b] +XDIS 28980: MISC BASE D54C8D5C501D lea r27, ptr [rax+rdx*2+0x1d] +XDIS 28986: MISC BASE D54C8D5C511E lea r27, ptr [rcx+rdx*2+0x1e] +XDIS 2898c: MISC BASE D54C8D5C521F lea r27, ptr [rdx+rdx*2+0x1f] +XDIS 28992: MISC BASE D54C8D5C5320 lea r27, ptr [rbx+rdx*2+0x20] +XDIS 28998: MISC BASE D54C8D5C5421 lea r27, ptr [rsp+rdx*2+0x21] +XDIS 2899e: MISC BASE D54C8D5C5522 lea r27, ptr [rbp+rdx*2+0x22] +XDIS 289a4: MISC BASE D54C8D5C5623 lea r27, ptr [rsi+rdx*2+0x23] +XDIS 289aa: MISC BASE D54C8D5C5724 lea r27, ptr [rdi+rdx*2+0x24] +XDIS 289b0: MISC BASE D54D8D5C5025 lea r27, ptr [r8+rdx*2+0x25] +XDIS 289b6: MISC BASE D54D8D5C5126 lea r27, ptr [r9+rdx*2+0x26] +XDIS 289bc: MISC BASE D54D8D5C5227 lea r27, ptr [r10+rdx*2+0x27] +XDIS 289c2: MISC BASE D54D8D5C5328 lea r27, ptr [r11+rdx*2+0x28] +XDIS 289c8: MISC BASE D54D8D5C5429 lea r27, ptr [r12+rdx*2+0x29] +XDIS 289ce: MISC BASE D54D8D5C552A lea r27, ptr [r13+rdx*2+0x2a] +XDIS 289d4: MISC BASE D54D8D5C562B lea r27, ptr [r14+rdx*2+0x2b] +XDIS 289da: MISC BASE D54D8D5C572C lea r27, ptr [r15+rdx*2+0x2c] +XDIS 289e0: MISC BASE D55C8D5C502D lea r27, ptr [r16+rdx*2+0x2d] +XDIS 289e6: MISC BASE D55C8D5C512E lea r27, ptr [r17+rdx*2+0x2e] +XDIS 289ec: MISC BASE D55C8D5C522F lea r27, ptr [r18+rdx*2+0x2f] +XDIS 289f2: MISC BASE D55C8D5C5330 lea r27, ptr [r19+rdx*2+0x30] +XDIS 289f8: MISC BASE D55C8D5C5431 lea r27, ptr [r20+rdx*2+0x31] +XDIS 289fe: MISC BASE D55C8D5C5532 lea r27, ptr [r21+rdx*2+0x32] +XDIS 28a04: MISC BASE D55C8D5C5633 lea r27, ptr [r22+rdx*2+0x33] +XDIS 28a0a: MISC BASE D55C8D5C5734 lea r27, ptr [r23+rdx*2+0x34] +XDIS 28a10: MISC BASE D55D8D5C5035 lea r27, ptr [r24+rdx*2+0x35] +XDIS 28a16: MISC BASE D55D8D5C5136 lea r27, ptr [r25+rdx*2+0x36] +XDIS 28a1c: MISC BASE D55D8D5C5237 lea r27, ptr [r26+rdx*2+0x37] +XDIS 28a22: MISC BASE D55D8D5C5338 lea r27, ptr [r27+rdx*2+0x38] +XDIS 28a28: MISC BASE D55D8D5C5439 lea r27, ptr [r28+rdx*2+0x39] +XDIS 28a2e: MISC BASE D55D8D5C553A lea r27, ptr [r29+rdx*2+0x3a] +XDIS 28a34: MISC BASE D55D8D5C563B lea r27, ptr [r30+rdx*2+0x3b] +XDIS 28a3a: MISC BASE D55D8D5C573C lea r27, ptr [r31+rdx*2+0x3c] +XDIS 28a40: MISC BASE D54C8D5C581E lea r27, ptr [rax+rbx*2+0x1e] +XDIS 28a46: MISC BASE D54C8D5C591F lea r27, ptr [rcx+rbx*2+0x1f] +XDIS 28a4c: MISC BASE D54C8D5C5A20 lea r27, ptr [rdx+rbx*2+0x20] +XDIS 28a52: MISC BASE D54C8D5C5B21 lea r27, ptr [rbx+rbx*2+0x21] +XDIS 28a58: MISC BASE D54C8D5C5C22 lea r27, ptr [rsp+rbx*2+0x22] +XDIS 28a5e: MISC BASE D54C8D5C5D23 lea r27, ptr [rbp+rbx*2+0x23] +XDIS 28a64: MISC BASE D54C8D5C5E24 lea r27, ptr [rsi+rbx*2+0x24] +XDIS 28a6a: MISC BASE D54C8D5C5F25 lea r27, ptr [rdi+rbx*2+0x25] +XDIS 28a70: MISC BASE D54D8D5C5826 lea r27, ptr [r8+rbx*2+0x26] +XDIS 28a76: MISC BASE D54D8D5C5927 lea r27, ptr [r9+rbx*2+0x27] +XDIS 28a7c: MISC BASE D54D8D5C5A28 lea r27, ptr [r10+rbx*2+0x28] +XDIS 28a82: MISC BASE D54D8D5C5B29 lea r27, ptr [r11+rbx*2+0x29] +XDIS 28a88: MISC BASE D54D8D5C5C2A lea r27, ptr [r12+rbx*2+0x2a] +XDIS 28a8e: MISC BASE D54D8D5C5D2B lea r27, ptr [r13+rbx*2+0x2b] +XDIS 28a94: MISC BASE D54D8D5C5E2C lea r27, ptr [r14+rbx*2+0x2c] +XDIS 28a9a: MISC BASE D54D8D5C5F2D lea r27, ptr [r15+rbx*2+0x2d] +XDIS 28aa0: MISC BASE D55C8D5C582E lea r27, ptr [r16+rbx*2+0x2e] +XDIS 28aa6: MISC BASE D55C8D5C592F lea r27, ptr [r17+rbx*2+0x2f] +XDIS 28aac: MISC BASE D55C8D5C5A30 lea r27, ptr [r18+rbx*2+0x30] +XDIS 28ab2: MISC BASE D55C8D5C5B31 lea r27, ptr [r19+rbx*2+0x31] +XDIS 28ab8: MISC BASE D55C8D5C5C32 lea r27, ptr [r20+rbx*2+0x32] +XDIS 28abe: MISC BASE D55C8D5C5D33 lea r27, ptr [r21+rbx*2+0x33] +XDIS 28ac4: MISC BASE D55C8D5C5E34 lea r27, ptr [r22+rbx*2+0x34] +XDIS 28aca: MISC BASE D55C8D5C5F35 lea r27, ptr [r23+rbx*2+0x35] +XDIS 28ad0: MISC BASE D55D8D5C5836 lea r27, ptr [r24+rbx*2+0x36] +XDIS 28ad6: MISC BASE D55D8D5C5937 lea r27, ptr [r25+rbx*2+0x37] +XDIS 28adc: MISC BASE D55D8D5C5A38 lea r27, ptr [r26+rbx*2+0x38] +XDIS 28ae2: MISC BASE D55D8D5C5B39 lea r27, ptr [r27+rbx*2+0x39] +XDIS 28ae8: MISC BASE D55D8D5C5C3A lea r27, ptr [r28+rbx*2+0x3a] +XDIS 28aee: MISC BASE D55D8D5C5D3B lea r27, ptr [r29+rbx*2+0x3b] +XDIS 28af4: MISC BASE D55D8D5C5E3C lea r27, ptr [r30+rbx*2+0x3c] +XDIS 28afa: MISC BASE D55D8D5C5F3D lea r27, ptr [r31+rbx*2+0x3d] +XDIS 28b00: MISC BASE D54C8D5C601F lea r27, ptr [rax+0x1f] +XDIS 28b06: MISC BASE D54C8D5C6120 lea r27, ptr [rcx+0x20] +XDIS 28b0c: MISC BASE D54C8D5C6221 lea r27, ptr [rdx+0x21] +XDIS 28b12: MISC BASE D54C8D5C6322 lea r27, ptr [rbx+0x22] +XDIS 28b18: MISC BASE D54C8D5C6423 lea r27, ptr [rsp+0x23] +XDIS 28b1e: MISC BASE D54C8D5C6524 lea r27, ptr [rbp+0x24] +XDIS 28b24: MISC BASE D54C8D5C6625 lea r27, ptr [rsi+0x25] +XDIS 28b2a: MISC BASE D54C8D5C6726 lea r27, ptr [rdi+0x26] +XDIS 28b30: MISC BASE D54D8D5C6027 lea r27, ptr [r8+0x27] +XDIS 28b36: MISC BASE D54D8D5C6128 lea r27, ptr [r9+0x28] +XDIS 28b3c: MISC BASE D54D8D5C6229 lea r27, ptr [r10+0x29] +XDIS 28b42: MISC BASE D54D8D5C632A lea r27, ptr [r11+0x2a] +XDIS 28b48: MISC BASE D54D8D5C642B lea r27, ptr [r12+0x2b] +XDIS 28b4e: MISC BASE D54D8D5C652C lea r27, ptr [r13+0x2c] +XDIS 28b54: MISC BASE D54D8D5C662D lea r27, ptr [r14+0x2d] +XDIS 28b5a: MISC BASE D54D8D5C672E lea r27, ptr [r15+0x2e] +XDIS 28b60: MISC BASE D55C8D5C602F lea r27, ptr [r16+0x2f] +XDIS 28b66: MISC BASE D55C8D5C6130 lea r27, ptr [r17+0x30] +XDIS 28b6c: MISC BASE D55C8D5C6231 lea r27, ptr [r18+0x31] +XDIS 28b72: MISC BASE D55C8D5C6332 lea r27, ptr [r19+0x32] +XDIS 28b78: MISC BASE D55C8D5C6433 lea r27, ptr [r20+0x33] +XDIS 28b7e: MISC BASE D55C8D5C6534 lea r27, ptr [r21+0x34] +XDIS 28b84: MISC BASE D55C8D5C6635 lea r27, ptr [r22+0x35] +XDIS 28b8a: MISC BASE D55C8D5C6736 lea r27, ptr [r23+0x36] +XDIS 28b90: MISC BASE D55D8D5C6037 lea r27, ptr [r24+0x37] +XDIS 28b96: MISC BASE D55D8D5C6138 lea r27, ptr [r25+0x38] +XDIS 28b9c: MISC BASE D55D8D5C6239 lea r27, ptr [r26+0x39] +XDIS 28ba2: MISC BASE D55D8D5C633A lea r27, ptr [r27+0x3a] +XDIS 28ba8: MISC BASE D55D8D5C643B lea r27, ptr [r28+0x3b] +XDIS 28bae: MISC BASE D55D8D5C653C lea r27, ptr [r29+0x3c] +XDIS 28bb4: MISC BASE D55D8D5C663D lea r27, ptr [r30+0x3d] +XDIS 28bba: MISC BASE D55D8D5C673E lea r27, ptr [r31+0x3e] +XDIS 28bc0: MISC BASE D54C8D5C6820 lea r27, ptr [rax+rbp*2+0x20] +XDIS 28bc6: MISC BASE D54C8D5C6921 lea r27, ptr [rcx+rbp*2+0x21] +XDIS 28bcc: MISC BASE D54C8D5C6A22 lea r27, ptr [rdx+rbp*2+0x22] +XDIS 28bd2: MISC BASE D54C8D5C6B23 lea r27, ptr [rbx+rbp*2+0x23] +XDIS 28bd8: MISC BASE D54C8D5C6C24 lea r27, ptr [rsp+rbp*2+0x24] +XDIS 28bde: MISC BASE D54C8D5C6D25 lea r27, ptr [rbp+rbp*2+0x25] +XDIS 28be4: MISC BASE D54C8D5C6E26 lea r27, ptr [rsi+rbp*2+0x26] +XDIS 28bea: MISC BASE D54C8D5C6F27 lea r27, ptr [rdi+rbp*2+0x27] +XDIS 28bf0: MISC BASE D54D8D5C6828 lea r27, ptr [r8+rbp*2+0x28] +XDIS 28bf6: MISC BASE D54D8D5C6929 lea r27, ptr [r9+rbp*2+0x29] +XDIS 28bfc: MISC BASE D54D8D5C6A2A lea r27, ptr [r10+rbp*2+0x2a] +XDIS 28c02: MISC BASE D54D8D5C6B2B lea r27, ptr [r11+rbp*2+0x2b] +XDIS 28c08: MISC BASE D54D8D5C6C2C lea r27, ptr [r12+rbp*2+0x2c] +XDIS 28c0e: MISC BASE D54D8D5C6D2D lea r27, ptr [r13+rbp*2+0x2d] +XDIS 28c14: MISC BASE D54D8D5C6E2E lea r27, ptr [r14+rbp*2+0x2e] +XDIS 28c1a: MISC BASE D54D8D5C6F2F lea r27, ptr [r15+rbp*2+0x2f] +XDIS 28c20: MISC BASE D55C8D5C6830 lea r27, ptr [r16+rbp*2+0x30] +XDIS 28c26: MISC BASE D55C8D5C6931 lea r27, ptr [r17+rbp*2+0x31] +XDIS 28c2c: MISC BASE D55C8D5C6A32 lea r27, ptr [r18+rbp*2+0x32] +XDIS 28c32: MISC BASE D55C8D5C6B33 lea r27, ptr [r19+rbp*2+0x33] +XDIS 28c38: MISC BASE D55C8D5C6C34 lea r27, ptr [r20+rbp*2+0x34] +XDIS 28c3e: MISC BASE D55C8D5C6D35 lea r27, ptr [r21+rbp*2+0x35] +XDIS 28c44: MISC BASE D55C8D5C6E36 lea r27, ptr [r22+rbp*2+0x36] +XDIS 28c4a: MISC BASE D55C8D5C6F37 lea r27, ptr [r23+rbp*2+0x37] +XDIS 28c50: MISC BASE D55D8D5C6838 lea r27, ptr [r24+rbp*2+0x38] +XDIS 28c56: MISC BASE D55D8D5C6939 lea r27, ptr [r25+rbp*2+0x39] +XDIS 28c5c: MISC BASE D55D8D5C6A3A lea r27, ptr [r26+rbp*2+0x3a] +XDIS 28c62: MISC BASE D55D8D5C6B3B lea r27, ptr [r27+rbp*2+0x3b] +XDIS 28c68: MISC BASE D55D8D5C6C3C lea r27, ptr [r28+rbp*2+0x3c] +XDIS 28c6e: MISC BASE D55D8D5C6D3D lea r27, ptr [r29+rbp*2+0x3d] +XDIS 28c74: MISC BASE D55D8D5C6E3E lea r27, ptr [r30+rbp*2+0x3e] +XDIS 28c7a: MISC BASE D55D8D5C6F3F lea r27, ptr [r31+rbp*2+0x3f] +XDIS 28c80: MISC BASE D54C8D5C7021 lea r27, ptr [rax+rsi*2+0x21] +XDIS 28c86: MISC BASE D54C8D5C7122 lea r27, ptr [rcx+rsi*2+0x22] +XDIS 28c8c: MISC BASE D54C8D5C7223 lea r27, ptr [rdx+rsi*2+0x23] +XDIS 28c92: MISC BASE D54C8D5C7324 lea r27, ptr [rbx+rsi*2+0x24] +XDIS 28c98: MISC BASE D54C8D5C7425 lea r27, ptr [rsp+rsi*2+0x25] +XDIS 28c9e: MISC BASE D54C8D5C7526 lea r27, ptr [rbp+rsi*2+0x26] +XDIS 28ca4: MISC BASE D54C8D5C7627 lea r27, ptr [rsi+rsi*2+0x27] +XDIS 28caa: MISC BASE D54C8D5C7728 lea r27, ptr [rdi+rsi*2+0x28] +XDIS 28cb0: MISC BASE D54D8D5C7029 lea r27, ptr [r8+rsi*2+0x29] +XDIS 28cb6: MISC BASE D54D8D5C712A lea r27, ptr [r9+rsi*2+0x2a] +XDIS 28cbc: MISC BASE D54D8D5C722B lea r27, ptr [r10+rsi*2+0x2b] +XDIS 28cc2: MISC BASE D54D8D5C732C lea r27, ptr [r11+rsi*2+0x2c] +XDIS 28cc8: MISC BASE D54D8D5C742D lea r27, ptr [r12+rsi*2+0x2d] +XDIS 28cce: MISC BASE D54D8D5C752E lea r27, ptr [r13+rsi*2+0x2e] +XDIS 28cd4: MISC BASE D54D8D5C762F lea r27, ptr [r14+rsi*2+0x2f] +XDIS 28cda: MISC BASE D54D8D5C7730 lea r27, ptr [r15+rsi*2+0x30] +XDIS 28ce0: MISC BASE D55C8D5C7031 lea r27, ptr [r16+rsi*2+0x31] +XDIS 28ce6: MISC BASE D55C8D5C7132 lea r27, ptr [r17+rsi*2+0x32] +XDIS 28cec: MISC BASE D55C8D5C7233 lea r27, ptr [r18+rsi*2+0x33] +XDIS 28cf2: MISC BASE D55C8D5C7334 lea r27, ptr [r19+rsi*2+0x34] +XDIS 28cf8: MISC BASE D55C8D5C7435 lea r27, ptr [r20+rsi*2+0x35] +XDIS 28cfe: MISC BASE D55C8D5C7536 lea r27, ptr [r21+rsi*2+0x36] +XDIS 28d04: MISC BASE D55C8D5C7637 lea r27, ptr [r22+rsi*2+0x37] +XDIS 28d0a: MISC BASE D55C8D5C7738 lea r27, ptr [r23+rsi*2+0x38] +XDIS 28d10: MISC BASE D55D8D5C7039 lea r27, ptr [r24+rsi*2+0x39] +XDIS 28d16: MISC BASE D55D8D5C713A lea r27, ptr [r25+rsi*2+0x3a] +XDIS 28d1c: MISC BASE D55D8D5C723B lea r27, ptr [r26+rsi*2+0x3b] +XDIS 28d22: MISC BASE D55D8D5C733C lea r27, ptr [r27+rsi*2+0x3c] +XDIS 28d28: MISC BASE D55D8D5C743D lea r27, ptr [r28+rsi*2+0x3d] +XDIS 28d2e: MISC BASE D55D8D5C753E lea r27, ptr [r29+rsi*2+0x3e] +XDIS 28d34: MISC BASE D55D8D5C763F lea r27, ptr [r30+rsi*2+0x3f] +XDIS 28d3a: MISC BASE D55D8D5C7740 lea r27, ptr [r31+rsi*2+0x40] +XDIS 28d40: MISC BASE D54C8D5C7822 lea r27, ptr [rax+rdi*2+0x22] +XDIS 28d46: MISC BASE D54C8D5C7923 lea r27, ptr [rcx+rdi*2+0x23] +XDIS 28d4c: MISC BASE D54C8D5C7A24 lea r27, ptr [rdx+rdi*2+0x24] +XDIS 28d52: MISC BASE D54C8D5C7B25 lea r27, ptr [rbx+rdi*2+0x25] +XDIS 28d58: MISC BASE D54C8D5C7C26 lea r27, ptr [rsp+rdi*2+0x26] +XDIS 28d5e: MISC BASE D54C8D5C7D27 lea r27, ptr [rbp+rdi*2+0x27] +XDIS 28d64: MISC BASE D54C8D5C7E28 lea r27, ptr [rsi+rdi*2+0x28] +XDIS 28d6a: MISC BASE D54C8D5C7F29 lea r27, ptr [rdi+rdi*2+0x29] +XDIS 28d70: MISC BASE D54D8D5C782A lea r27, ptr [r8+rdi*2+0x2a] +XDIS 28d76: MISC BASE D54D8D5C792B lea r27, ptr [r9+rdi*2+0x2b] +XDIS 28d7c: MISC BASE D54D8D5C7A2C lea r27, ptr [r10+rdi*2+0x2c] +XDIS 28d82: MISC BASE D54D8D5C7B2D lea r27, ptr [r11+rdi*2+0x2d] +XDIS 28d88: MISC BASE D54D8D5C7C2E lea r27, ptr [r12+rdi*2+0x2e] +XDIS 28d8e: MISC BASE D54D8D5C7D2F lea r27, ptr [r13+rdi*2+0x2f] +XDIS 28d94: MISC BASE D54D8D5C7E30 lea r27, ptr [r14+rdi*2+0x30] +XDIS 28d9a: MISC BASE D54D8D5C7F31 lea r27, ptr [r15+rdi*2+0x31] +XDIS 28da0: MISC BASE D55C8D5C7832 lea r27, ptr [r16+rdi*2+0x32] +XDIS 28da6: MISC BASE D55C8D5C7933 lea r27, ptr [r17+rdi*2+0x33] +XDIS 28dac: MISC BASE D55C8D5C7A34 lea r27, ptr [r18+rdi*2+0x34] +XDIS 28db2: MISC BASE D55C8D5C7B35 lea r27, ptr [r19+rdi*2+0x35] +XDIS 28db8: MISC BASE D55C8D5C7C36 lea r27, ptr [r20+rdi*2+0x36] +XDIS 28dbe: MISC BASE D55C8D5C7D37 lea r27, ptr [r21+rdi*2+0x37] +XDIS 28dc4: MISC BASE D55C8D5C7E38 lea r27, ptr [r22+rdi*2+0x38] +XDIS 28dca: MISC BASE D55C8D5C7F39 lea r27, ptr [r23+rdi*2+0x39] +XDIS 28dd0: MISC BASE D55D8D5C783A lea r27, ptr [r24+rdi*2+0x3a] +XDIS 28dd6: MISC BASE D55D8D5C793B lea r27, ptr [r25+rdi*2+0x3b] +XDIS 28ddc: MISC BASE D55D8D5C7A3C lea r27, ptr [r26+rdi*2+0x3c] +XDIS 28de2: MISC BASE D55D8D5C7B3D lea r27, ptr [r27+rdi*2+0x3d] +XDIS 28de8: MISC BASE D55D8D5C7C3E lea r27, ptr [r28+rdi*2+0x3e] +XDIS 28dee: MISC BASE D55D8D5C7D3F lea r27, ptr [r29+rdi*2+0x3f] +XDIS 28df4: MISC BASE D55D8D5C7E40 lea r27, ptr [r30+rdi*2+0x40] +XDIS 28dfa: MISC BASE D55D8D5C7F41 lea r27, ptr [r31+rdi*2+0x41] +XDIS 28e00: MISC BASE D54E8D5C4023 lea r27, ptr [rax+r8*2+0x23] +XDIS 28e06: MISC BASE D54E8D5C4124 lea r27, ptr [rcx+r8*2+0x24] +XDIS 28e0c: MISC BASE D54E8D5C4225 lea r27, ptr [rdx+r8*2+0x25] +XDIS 28e12: MISC BASE D54E8D5C4326 lea r27, ptr [rbx+r8*2+0x26] +XDIS 28e18: MISC BASE D54E8D5C4427 lea r27, ptr [rsp+r8*2+0x27] +XDIS 28e1e: MISC BASE D54E8D5C4528 lea r27, ptr [rbp+r8*2+0x28] +XDIS 28e24: MISC BASE D54E8D5C4629 lea r27, ptr [rsi+r8*2+0x29] +XDIS 28e2a: MISC BASE D54E8D5C472A lea r27, ptr [rdi+r8*2+0x2a] +XDIS 28e30: MISC BASE D54F8D5C402B lea r27, ptr [r8+r8*2+0x2b] +XDIS 28e36: MISC BASE D54F8D5C412C lea r27, ptr [r9+r8*2+0x2c] +XDIS 28e3c: MISC BASE D54F8D5C422D lea r27, ptr [r10+r8*2+0x2d] +XDIS 28e42: MISC BASE D54F8D5C432E lea r27, ptr [r11+r8*2+0x2e] +XDIS 28e48: MISC BASE D54F8D5C442F lea r27, ptr [r12+r8*2+0x2f] +XDIS 28e4e: MISC BASE D54F8D5C4530 lea r27, ptr [r13+r8*2+0x30] +XDIS 28e54: MISC BASE D54F8D5C4631 lea r27, ptr [r14+r8*2+0x31] +XDIS 28e5a: MISC BASE D54F8D5C4732 lea r27, ptr [r15+r8*2+0x32] +XDIS 28e60: MISC BASE D55E8D5C4033 lea r27, ptr [r16+r8*2+0x33] +XDIS 28e66: MISC BASE D55E8D5C4134 lea r27, ptr [r17+r8*2+0x34] +XDIS 28e6c: MISC BASE D55E8D5C4235 lea r27, ptr [r18+r8*2+0x35] +XDIS 28e72: MISC BASE D55E8D5C4336 lea r27, ptr [r19+r8*2+0x36] +XDIS 28e78: MISC BASE D55E8D5C4437 lea r27, ptr [r20+r8*2+0x37] +XDIS 28e7e: MISC BASE D55E8D5C4538 lea r27, ptr [r21+r8*2+0x38] +XDIS 28e84: MISC BASE D55E8D5C4639 lea r27, ptr [r22+r8*2+0x39] +XDIS 28e8a: MISC BASE D55E8D5C473A lea r27, ptr [r23+r8*2+0x3a] +XDIS 28e90: MISC BASE D55F8D5C403B lea r27, ptr [r24+r8*2+0x3b] +XDIS 28e96: MISC BASE D55F8D5C413C lea r27, ptr [r25+r8*2+0x3c] +XDIS 28e9c: MISC BASE D55F8D5C423D lea r27, ptr [r26+r8*2+0x3d] +XDIS 28ea2: MISC BASE D55F8D5C433E lea r27, ptr [r27+r8*2+0x3e] +XDIS 28ea8: MISC BASE D55F8D5C443F lea r27, ptr [r28+r8*2+0x3f] +XDIS 28eae: MISC BASE D55F8D5C4540 lea r27, ptr [r29+r8*2+0x40] +XDIS 28eb4: MISC BASE D55F8D5C4641 lea r27, ptr [r30+r8*2+0x41] +XDIS 28eba: MISC BASE D55F8D5C4742 lea r27, ptr [r31+r8*2+0x42] +XDIS 28ec0: MISC BASE D54E8D5C4824 lea r27, ptr [rax+r9*2+0x24] +XDIS 28ec6: MISC BASE D54E8D5C4925 lea r27, ptr [rcx+r9*2+0x25] +XDIS 28ecc: MISC BASE D54E8D5C4A26 lea r27, ptr [rdx+r9*2+0x26] +XDIS 28ed2: MISC BASE D54E8D5C4B27 lea r27, ptr [rbx+r9*2+0x27] +XDIS 28ed8: MISC BASE D54E8D5C4C28 lea r27, ptr [rsp+r9*2+0x28] +XDIS 28ede: MISC BASE D54E8D5C4D29 lea r27, ptr [rbp+r9*2+0x29] +XDIS 28ee4: MISC BASE D54E8D5C4E2A lea r27, ptr [rsi+r9*2+0x2a] +XDIS 28eea: MISC BASE D54E8D5C4F2B lea r27, ptr [rdi+r9*2+0x2b] +XDIS 28ef0: MISC BASE D54F8D5C482C lea r27, ptr [r8+r9*2+0x2c] +XDIS 28ef6: MISC BASE D54F8D5C492D lea r27, ptr [r9+r9*2+0x2d] +XDIS 28efc: MISC BASE D54F8D5C4A2E lea r27, ptr [r10+r9*2+0x2e] +XDIS 28f02: MISC BASE D54F8D5C4B2F lea r27, ptr [r11+r9*2+0x2f] +XDIS 28f08: MISC BASE D54F8D5C4C30 lea r27, ptr [r12+r9*2+0x30] +XDIS 28f0e: MISC BASE D54F8D5C4D31 lea r27, ptr [r13+r9*2+0x31] +XDIS 28f14: MISC BASE D54F8D5C4E32 lea r27, ptr [r14+r9*2+0x32] +XDIS 28f1a: MISC BASE D54F8D5C4F33 lea r27, ptr [r15+r9*2+0x33] +XDIS 28f20: MISC BASE D55E8D5C4834 lea r27, ptr [r16+r9*2+0x34] +XDIS 28f26: MISC BASE D55E8D5C4935 lea r27, ptr [r17+r9*2+0x35] +XDIS 28f2c: MISC BASE D55E8D5C4A36 lea r27, ptr [r18+r9*2+0x36] +XDIS 28f32: MISC BASE D55E8D5C4B37 lea r27, ptr [r19+r9*2+0x37] +XDIS 28f38: MISC BASE D55E8D5C4C38 lea r27, ptr [r20+r9*2+0x38] +XDIS 28f3e: MISC BASE D55E8D5C4D39 lea r27, ptr [r21+r9*2+0x39] +XDIS 28f44: MISC BASE D55E8D5C4E3A lea r27, ptr [r22+r9*2+0x3a] +XDIS 28f4a: MISC BASE D55E8D5C4F3B lea r27, ptr [r23+r9*2+0x3b] +XDIS 28f50: MISC BASE D55F8D5C483C lea r27, ptr [r24+r9*2+0x3c] +XDIS 28f56: MISC BASE D55F8D5C493D lea r27, ptr [r25+r9*2+0x3d] +XDIS 28f5c: MISC BASE D55F8D5C4A3E lea r27, ptr [r26+r9*2+0x3e] +XDIS 28f62: MISC BASE D55F8D5C4B3F lea r27, ptr [r27+r9*2+0x3f] +XDIS 28f68: MISC BASE D55F8D5C4C40 lea r27, ptr [r28+r9*2+0x40] +XDIS 28f6e: MISC BASE D55F8D5C4D41 lea r27, ptr [r29+r9*2+0x41] +XDIS 28f74: MISC BASE D55F8D5C4E42 lea r27, ptr [r30+r9*2+0x42] +XDIS 28f7a: MISC BASE D55F8D5C4F43 lea r27, ptr [r31+r9*2+0x43] +XDIS 28f80: MISC BASE D54E8D5C5025 lea r27, ptr [rax+r10*2+0x25] +XDIS 28f86: MISC BASE D54E8D5C5126 lea r27, ptr [rcx+r10*2+0x26] +XDIS 28f8c: MISC BASE D54E8D5C5227 lea r27, ptr [rdx+r10*2+0x27] +XDIS 28f92: MISC BASE D54E8D5C5328 lea r27, ptr [rbx+r10*2+0x28] +XDIS 28f98: MISC BASE D54E8D5C5429 lea r27, ptr [rsp+r10*2+0x29] +XDIS 28f9e: MISC BASE D54E8D5C552A lea r27, ptr [rbp+r10*2+0x2a] +XDIS 28fa4: MISC BASE D54E8D5C562B lea r27, ptr [rsi+r10*2+0x2b] +XDIS 28faa: MISC BASE D54E8D5C572C lea r27, ptr [rdi+r10*2+0x2c] +XDIS 28fb0: MISC BASE D54F8D5C502D lea r27, ptr [r8+r10*2+0x2d] +XDIS 28fb6: MISC BASE D54F8D5C512E lea r27, ptr [r9+r10*2+0x2e] +XDIS 28fbc: MISC BASE D54F8D5C522F lea r27, ptr [r10+r10*2+0x2f] +XDIS 28fc2: MISC BASE D54F8D5C5330 lea r27, ptr [r11+r10*2+0x30] +XDIS 28fc8: MISC BASE D54F8D5C5431 lea r27, ptr [r12+r10*2+0x31] +XDIS 28fce: MISC BASE D54F8D5C5532 lea r27, ptr [r13+r10*2+0x32] +XDIS 28fd4: MISC BASE D54F8D5C5633 lea r27, ptr [r14+r10*2+0x33] +XDIS 28fda: MISC BASE D54F8D5C5734 lea r27, ptr [r15+r10*2+0x34] +XDIS 28fe0: MISC BASE D55E8D5C5035 lea r27, ptr [r16+r10*2+0x35] +XDIS 28fe6: MISC BASE D55E8D5C5136 lea r27, ptr [r17+r10*2+0x36] +XDIS 28fec: MISC BASE D55E8D5C5237 lea r27, ptr [r18+r10*2+0x37] +XDIS 28ff2: MISC BASE D55E8D5C5338 lea r27, ptr [r19+r10*2+0x38] +XDIS 28ff8: MISC BASE D55E8D5C5439 lea r27, ptr [r20+r10*2+0x39] +XDIS 28ffe: MISC BASE D55E8D5C553A lea r27, ptr [r21+r10*2+0x3a] +XDIS 29004: MISC BASE D55E8D5C563B lea r27, ptr [r22+r10*2+0x3b] +XDIS 2900a: MISC BASE D55E8D5C573C lea r27, ptr [r23+r10*2+0x3c] +XDIS 29010: MISC BASE D55F8D5C503D lea r27, ptr [r24+r10*2+0x3d] +XDIS 29016: MISC BASE D55F8D5C513E lea r27, ptr [r25+r10*2+0x3e] +XDIS 2901c: MISC BASE D55F8D5C523F lea r27, ptr [r26+r10*2+0x3f] +XDIS 29022: MISC BASE D55F8D5C5340 lea r27, ptr [r27+r10*2+0x40] +XDIS 29028: MISC BASE D55F8D5C5441 lea r27, ptr [r28+r10*2+0x41] +XDIS 2902e: MISC BASE D55F8D5C5542 lea r27, ptr [r29+r10*2+0x42] +XDIS 29034: MISC BASE D55F8D5C5643 lea r27, ptr [r30+r10*2+0x43] +XDIS 2903a: MISC BASE D55F8D5C5744 lea r27, ptr [r31+r10*2+0x44] +XDIS 29040: MISC BASE D54E8D5C5826 lea r27, ptr [rax+r11*2+0x26] +XDIS 29046: MISC BASE D54E8D5C5927 lea r27, ptr [rcx+r11*2+0x27] +XDIS 2904c: MISC BASE D54E8D5C5A28 lea r27, ptr [rdx+r11*2+0x28] +XDIS 29052: MISC BASE D54E8D5C5B29 lea r27, ptr [rbx+r11*2+0x29] +XDIS 29058: MISC BASE D54E8D5C5C2A lea r27, ptr [rsp+r11*2+0x2a] +XDIS 2905e: MISC BASE D54E8D5C5D2B lea r27, ptr [rbp+r11*2+0x2b] +XDIS 29064: MISC BASE D54E8D5C5E2C lea r27, ptr [rsi+r11*2+0x2c] +XDIS 2906a: MISC BASE D54E8D5C5F2D lea r27, ptr [rdi+r11*2+0x2d] +XDIS 29070: MISC BASE D54F8D5C582E lea r27, ptr [r8+r11*2+0x2e] +XDIS 29076: MISC BASE D54F8D5C592F lea r27, ptr [r9+r11*2+0x2f] +XDIS 2907c: MISC BASE D54F8D5C5A30 lea r27, ptr [r10+r11*2+0x30] +XDIS 29082: MISC BASE D54F8D5C5B31 lea r27, ptr [r11+r11*2+0x31] +XDIS 29088: MISC BASE D54F8D5C5C32 lea r27, ptr [r12+r11*2+0x32] +XDIS 2908e: MISC BASE D54F8D5C5D33 lea r27, ptr [r13+r11*2+0x33] +XDIS 29094: MISC BASE D54F8D5C5E34 lea r27, ptr [r14+r11*2+0x34] +XDIS 2909a: MISC BASE D54F8D5C5F35 lea r27, ptr [r15+r11*2+0x35] +XDIS 290a0: MISC BASE D55E8D5C5836 lea r27, ptr [r16+r11*2+0x36] +XDIS 290a6: MISC BASE D55E8D5C5937 lea r27, ptr [r17+r11*2+0x37] +XDIS 290ac: MISC BASE D55E8D5C5A38 lea r27, ptr [r18+r11*2+0x38] +XDIS 290b2: MISC BASE D55E8D5C5B39 lea r27, ptr [r19+r11*2+0x39] +XDIS 290b8: MISC BASE D55E8D5C5C3A lea r27, ptr [r20+r11*2+0x3a] +XDIS 290be: MISC BASE D55E8D5C5D3B lea r27, ptr [r21+r11*2+0x3b] +XDIS 290c4: MISC BASE D55E8D5C5E3C lea r27, ptr [r22+r11*2+0x3c] +XDIS 290ca: MISC BASE D55E8D5C5F3D lea r27, ptr [r23+r11*2+0x3d] +XDIS 290d0: MISC BASE D55F8D5C583E lea r27, ptr [r24+r11*2+0x3e] +XDIS 290d6: MISC BASE D55F8D5C593F lea r27, ptr [r25+r11*2+0x3f] +XDIS 290dc: MISC BASE D55F8D5C5A40 lea r27, ptr [r26+r11*2+0x40] +XDIS 290e2: MISC BASE D55F8D5C5B41 lea r27, ptr [r27+r11*2+0x41] +XDIS 290e8: MISC BASE D55F8D5C5C42 lea r27, ptr [r28+r11*2+0x42] +XDIS 290ee: MISC BASE D55F8D5C5D43 lea r27, ptr [r29+r11*2+0x43] +XDIS 290f4: MISC BASE D55F8D5C5E44 lea r27, ptr [r30+r11*2+0x44] +XDIS 290fa: MISC BASE D55F8D5C5F45 lea r27, ptr [r31+r11*2+0x45] +XDIS 29100: MISC BASE D54E8D5C6027 lea r27, ptr [rax+r12*2+0x27] +XDIS 29106: MISC BASE D54E8D5C6128 lea r27, ptr [rcx+r12*2+0x28] +XDIS 2910c: MISC BASE D54E8D5C6229 lea r27, ptr [rdx+r12*2+0x29] +XDIS 29112: MISC BASE D54E8D5C632A lea r27, ptr [rbx+r12*2+0x2a] +XDIS 29118: MISC BASE D54E8D5C642B lea r27, ptr [rsp+r12*2+0x2b] +XDIS 2911e: MISC BASE D54E8D5C652C lea r27, ptr [rbp+r12*2+0x2c] +XDIS 29124: MISC BASE D54E8D5C662D lea r27, ptr [rsi+r12*2+0x2d] +XDIS 2912a: MISC BASE D54E8D5C672E lea r27, ptr [rdi+r12*2+0x2e] +XDIS 29130: MISC BASE D54F8D5C602F lea r27, ptr [r8+r12*2+0x2f] +XDIS 29136: MISC BASE D54F8D5C6130 lea r27, ptr [r9+r12*2+0x30] +XDIS 2913c: MISC BASE D54F8D5C6231 lea r27, ptr [r10+r12*2+0x31] +XDIS 29142: MISC BASE D54F8D5C6332 lea r27, ptr [r11+r12*2+0x32] +XDIS 29148: MISC BASE D54F8D5C6433 lea r27, ptr [r12+r12*2+0x33] +XDIS 2914e: MISC BASE D54F8D5C6534 lea r27, ptr [r13+r12*2+0x34] +XDIS 29154: MISC BASE D54F8D5C6635 lea r27, ptr [r14+r12*2+0x35] +XDIS 2915a: MISC BASE D54F8D5C6736 lea r27, ptr [r15+r12*2+0x36] +XDIS 29160: MISC BASE D55E8D5C6037 lea r27, ptr [r16+r12*2+0x37] +XDIS 29166: MISC BASE D55E8D5C6138 lea r27, ptr [r17+r12*2+0x38] +XDIS 2916c: MISC BASE D55E8D5C6239 lea r27, ptr [r18+r12*2+0x39] +XDIS 29172: MISC BASE D55E8D5C633A lea r27, ptr [r19+r12*2+0x3a] +XDIS 29178: MISC BASE D55E8D5C643B lea r27, ptr [r20+r12*2+0x3b] +XDIS 2917e: MISC BASE D55E8D5C653C lea r27, ptr [r21+r12*2+0x3c] +XDIS 29184: MISC BASE D55E8D5C663D lea r27, ptr [r22+r12*2+0x3d] +XDIS 2918a: MISC BASE D55E8D5C673E lea r27, ptr [r23+r12*2+0x3e] +XDIS 29190: MISC BASE D55F8D5C603F lea r27, ptr [r24+r12*2+0x3f] +XDIS 29196: MISC BASE D55F8D5C6140 lea r27, ptr [r25+r12*2+0x40] +XDIS 2919c: MISC BASE D55F8D5C6241 lea r27, ptr [r26+r12*2+0x41] +XDIS 291a2: MISC BASE D55F8D5C6342 lea r27, ptr [r27+r12*2+0x42] +XDIS 291a8: MISC BASE D55F8D5C6443 lea r27, ptr [r28+r12*2+0x43] +XDIS 291ae: MISC BASE D55F8D5C6544 lea r27, ptr [r29+r12*2+0x44] +XDIS 291b4: MISC BASE D55F8D5C6645 lea r27, ptr [r30+r12*2+0x45] +XDIS 291ba: MISC BASE D55F8D5C6746 lea r27, ptr [r31+r12*2+0x46] +XDIS 291c0: MISC BASE D54E8D5C6828 lea r27, ptr [rax+r13*2+0x28] +XDIS 291c6: MISC BASE D54E8D5C6929 lea r27, ptr [rcx+r13*2+0x29] +XDIS 291cc: MISC BASE D54E8D5C6A2A lea r27, ptr [rdx+r13*2+0x2a] +XDIS 291d2: MISC BASE D54E8D5C6B2B lea r27, ptr [rbx+r13*2+0x2b] +XDIS 291d8: MISC BASE D54E8D5C6C2C lea r27, ptr [rsp+r13*2+0x2c] +XDIS 291de: MISC BASE D54E8D5C6D2D lea r27, ptr [rbp+r13*2+0x2d] +XDIS 291e4: MISC BASE D54E8D5C6E2E lea r27, ptr [rsi+r13*2+0x2e] +XDIS 291ea: MISC BASE D54E8D5C6F2F lea r27, ptr [rdi+r13*2+0x2f] +XDIS 291f0: MISC BASE D54F8D5C6830 lea r27, ptr [r8+r13*2+0x30] +XDIS 291f6: MISC BASE D54F8D5C6931 lea r27, ptr [r9+r13*2+0x31] +XDIS 291fc: MISC BASE D54F8D5C6A32 lea r27, ptr [r10+r13*2+0x32] +XDIS 29202: MISC BASE D54F8D5C6B33 lea r27, ptr [r11+r13*2+0x33] +XDIS 29208: MISC BASE D54F8D5C6C34 lea r27, ptr [r12+r13*2+0x34] +XDIS 2920e: MISC BASE D54F8D5C6D35 lea r27, ptr [r13+r13*2+0x35] +XDIS 29214: MISC BASE D54F8D5C6E36 lea r27, ptr [r14+r13*2+0x36] +XDIS 2921a: MISC BASE D54F8D5C6F37 lea r27, ptr [r15+r13*2+0x37] +XDIS 29220: MISC BASE D55E8D5C6838 lea r27, ptr [r16+r13*2+0x38] +XDIS 29226: MISC BASE D55E8D5C6939 lea r27, ptr [r17+r13*2+0x39] +XDIS 2922c: MISC BASE D55E8D5C6A3A lea r27, ptr [r18+r13*2+0x3a] +XDIS 29232: MISC BASE D55E8D5C6B3B lea r27, ptr [r19+r13*2+0x3b] +XDIS 29238: MISC BASE D55E8D5C6C3C lea r27, ptr [r20+r13*2+0x3c] +XDIS 2923e: MISC BASE D55E8D5C6D3D lea r27, ptr [r21+r13*2+0x3d] +XDIS 29244: MISC BASE D55E8D5C6E3E lea r27, ptr [r22+r13*2+0x3e] +XDIS 2924a: MISC BASE D55E8D5C6F3F lea r27, ptr [r23+r13*2+0x3f] +XDIS 29250: MISC BASE D55F8D5C6840 lea r27, ptr [r24+r13*2+0x40] +XDIS 29256: MISC BASE D55F8D5C6941 lea r27, ptr [r25+r13*2+0x41] +XDIS 2925c: MISC BASE D55F8D5C6A42 lea r27, ptr [r26+r13*2+0x42] +XDIS 29262: MISC BASE D55F8D5C6B43 lea r27, ptr [r27+r13*2+0x43] +XDIS 29268: MISC BASE D55F8D5C6C44 lea r27, ptr [r28+r13*2+0x44] +XDIS 2926e: MISC BASE D55F8D5C6D45 lea r27, ptr [r29+r13*2+0x45] +XDIS 29274: MISC BASE D55F8D5C6E46 lea r27, ptr [r30+r13*2+0x46] +XDIS 2927a: MISC BASE D55F8D5C6F47 lea r27, ptr [r31+r13*2+0x47] +XDIS 29280: MISC BASE D54E8D5C7029 lea r27, ptr [rax+r14*2+0x29] +XDIS 29286: MISC BASE D54E8D5C712A lea r27, ptr [rcx+r14*2+0x2a] +XDIS 2928c: MISC BASE D54E8D5C722B lea r27, ptr [rdx+r14*2+0x2b] +XDIS 29292: MISC BASE D54E8D5C732C lea r27, ptr [rbx+r14*2+0x2c] +XDIS 29298: MISC BASE D54E8D5C742D lea r27, ptr [rsp+r14*2+0x2d] +XDIS 2929e: MISC BASE D54E8D5C752E lea r27, ptr [rbp+r14*2+0x2e] +XDIS 292a4: MISC BASE D54E8D5C762F lea r27, ptr [rsi+r14*2+0x2f] +XDIS 292aa: MISC BASE D54E8D5C7730 lea r27, ptr [rdi+r14*2+0x30] +XDIS 292b0: MISC BASE D54F8D5C7031 lea r27, ptr [r8+r14*2+0x31] +XDIS 292b6: MISC BASE D54F8D5C7132 lea r27, ptr [r9+r14*2+0x32] +XDIS 292bc: MISC BASE D54F8D5C7233 lea r27, ptr [r10+r14*2+0x33] +XDIS 292c2: MISC BASE D54F8D5C7334 lea r27, ptr [r11+r14*2+0x34] +XDIS 292c8: MISC BASE D54F8D5C7435 lea r27, ptr [r12+r14*2+0x35] +XDIS 292ce: MISC BASE D54F8D5C7536 lea r27, ptr [r13+r14*2+0x36] +XDIS 292d4: MISC BASE D54F8D5C7637 lea r27, ptr [r14+r14*2+0x37] +XDIS 292da: MISC BASE D54F8D5C7738 lea r27, ptr [r15+r14*2+0x38] +XDIS 292e0: MISC BASE D55E8D5C7039 lea r27, ptr [r16+r14*2+0x39] +XDIS 292e6: MISC BASE D55E8D5C713A lea r27, ptr [r17+r14*2+0x3a] +XDIS 292ec: MISC BASE D55E8D5C723B lea r27, ptr [r18+r14*2+0x3b] +XDIS 292f2: MISC BASE D55E8D5C733C lea r27, ptr [r19+r14*2+0x3c] +XDIS 292f8: MISC BASE D55E8D5C743D lea r27, ptr [r20+r14*2+0x3d] +XDIS 292fe: MISC BASE D55E8D5C753E lea r27, ptr [r21+r14*2+0x3e] +XDIS 29304: MISC BASE D55E8D5C763F lea r27, ptr [r22+r14*2+0x3f] +XDIS 2930a: MISC BASE D55E8D5C7740 lea r27, ptr [r23+r14*2+0x40] +XDIS 29310: MISC BASE D55F8D5C7041 lea r27, ptr [r24+r14*2+0x41] +XDIS 29316: MISC BASE D55F8D5C7142 lea r27, ptr [r25+r14*2+0x42] +XDIS 2931c: MISC BASE D55F8D5C7243 lea r27, ptr [r26+r14*2+0x43] +XDIS 29322: MISC BASE D55F8D5C7344 lea r27, ptr [r27+r14*2+0x44] +XDIS 29328: MISC BASE D55F8D5C7445 lea r27, ptr [r28+r14*2+0x45] +XDIS 2932e: MISC BASE D55F8D5C7546 lea r27, ptr [r29+r14*2+0x46] +XDIS 29334: MISC BASE D55F8D5C7647 lea r27, ptr [r30+r14*2+0x47] +XDIS 2933a: MISC BASE D55F8D5C7748 lea r27, ptr [r31+r14*2+0x48] +XDIS 29340: MISC BASE D54E8D5C782A lea r27, ptr [rax+r15*2+0x2a] +XDIS 29346: MISC BASE D54E8D5C792B lea r27, ptr [rcx+r15*2+0x2b] +XDIS 2934c: MISC BASE D54E8D5C7A2C lea r27, ptr [rdx+r15*2+0x2c] +XDIS 29352: MISC BASE D54E8D5C7B2D lea r27, ptr [rbx+r15*2+0x2d] +XDIS 29358: MISC BASE D54E8D5C7C2E lea r27, ptr [rsp+r15*2+0x2e] +XDIS 2935e: MISC BASE D54E8D5C7D2F lea r27, ptr [rbp+r15*2+0x2f] +XDIS 29364: MISC BASE D54E8D5C7E30 lea r27, ptr [rsi+r15*2+0x30] +XDIS 2936a: MISC BASE D54E8D5C7F31 lea r27, ptr [rdi+r15*2+0x31] +XDIS 29370: MISC BASE D54F8D5C7832 lea r27, ptr [r8+r15*2+0x32] +XDIS 29376: MISC BASE D54F8D5C7933 lea r27, ptr [r9+r15*2+0x33] +XDIS 2937c: MISC BASE D54F8D5C7A34 lea r27, ptr [r10+r15*2+0x34] +XDIS 29382: MISC BASE D54F8D5C7B35 lea r27, ptr [r11+r15*2+0x35] +XDIS 29388: MISC BASE D54F8D5C7C36 lea r27, ptr [r12+r15*2+0x36] +XDIS 2938e: MISC BASE D54F8D5C7D37 lea r27, ptr [r13+r15*2+0x37] +XDIS 29394: MISC BASE D54F8D5C7E38 lea r27, ptr [r14+r15*2+0x38] +XDIS 2939a: MISC BASE D54F8D5C7F39 lea r27, ptr [r15+r15*2+0x39] +XDIS 293a0: MISC BASE D55E8D5C783A lea r27, ptr [r16+r15*2+0x3a] +XDIS 293a6: MISC BASE D55E8D5C793B lea r27, ptr [r17+r15*2+0x3b] +XDIS 293ac: MISC BASE D55E8D5C7A3C lea r27, ptr [r18+r15*2+0x3c] +XDIS 293b2: MISC BASE D55E8D5C7B3D lea r27, ptr [r19+r15*2+0x3d] +XDIS 293b8: MISC BASE D55E8D5C7C3E lea r27, ptr [r20+r15*2+0x3e] +XDIS 293be: MISC BASE D55E8D5C7D3F lea r27, ptr [r21+r15*2+0x3f] +XDIS 293c4: MISC BASE D55E8D5C7E40 lea r27, ptr [r22+r15*2+0x40] +XDIS 293ca: MISC BASE D55E8D5C7F41 lea r27, ptr [r23+r15*2+0x41] +XDIS 293d0: MISC BASE D55F8D5C7842 lea r27, ptr [r24+r15*2+0x42] +XDIS 293d6: MISC BASE D55F8D5C7943 lea r27, ptr [r25+r15*2+0x43] +XDIS 293dc: MISC BASE D55F8D5C7A44 lea r27, ptr [r26+r15*2+0x44] +XDIS 293e2: MISC BASE D55F8D5C7B45 lea r27, ptr [r27+r15*2+0x45] +XDIS 293e8: MISC BASE D55F8D5C7C46 lea r27, ptr [r28+r15*2+0x46] +XDIS 293ee: MISC BASE D55F8D5C7D47 lea r27, ptr [r29+r15*2+0x47] +XDIS 293f4: MISC BASE D55F8D5C7E48 lea r27, ptr [r30+r15*2+0x48] +XDIS 293fa: MISC BASE D55F8D5C7F49 lea r27, ptr [r31+r15*2+0x49] +XDIS 29400: MISC BASE D56C8D5C402B lea r27, ptr [rax+r16*2+0x2b] +XDIS 29406: MISC BASE D56C8D5C412C lea r27, ptr [rcx+r16*2+0x2c] +XDIS 2940c: MISC BASE D56C8D5C422D lea r27, ptr [rdx+r16*2+0x2d] +XDIS 29412: MISC BASE D56C8D5C432E lea r27, ptr [rbx+r16*2+0x2e] +XDIS 29418: MISC BASE D56C8D5C442F lea r27, ptr [rsp+r16*2+0x2f] +XDIS 2941e: MISC BASE D56C8D5C4530 lea r27, ptr [rbp+r16*2+0x30] +XDIS 29424: MISC BASE D56C8D5C4631 lea r27, ptr [rsi+r16*2+0x31] +XDIS 2942a: MISC BASE D56C8D5C4732 lea r27, ptr [rdi+r16*2+0x32] +XDIS 29430: MISC BASE D56D8D5C4033 lea r27, ptr [r8+r16*2+0x33] +XDIS 29436: MISC BASE D56D8D5C4134 lea r27, ptr [r9+r16*2+0x34] +XDIS 2943c: MISC BASE D56D8D5C4235 lea r27, ptr [r10+r16*2+0x35] +XDIS 29442: MISC BASE D56D8D5C4336 lea r27, ptr [r11+r16*2+0x36] +XDIS 29448: MISC BASE D56D8D5C4437 lea r27, ptr [r12+r16*2+0x37] +XDIS 2944e: MISC BASE D56D8D5C4538 lea r27, ptr [r13+r16*2+0x38] +XDIS 29454: MISC BASE D56D8D5C4639 lea r27, ptr [r14+r16*2+0x39] +XDIS 2945a: MISC BASE D56D8D5C473A lea r27, ptr [r15+r16*2+0x3a] +XDIS 29460: MISC BASE D57C8D5C403B lea r27, ptr [r16+r16*2+0x3b] +XDIS 29466: MISC BASE D57C8D5C413C lea r27, ptr [r17+r16*2+0x3c] +XDIS 2946c: MISC BASE D57C8D5C423D lea r27, ptr [r18+r16*2+0x3d] +XDIS 29472: MISC BASE D57C8D5C433E lea r27, ptr [r19+r16*2+0x3e] +XDIS 29478: MISC BASE D57C8D5C443F lea r27, ptr [r20+r16*2+0x3f] +XDIS 2947e: MISC BASE D57C8D5C4540 lea r27, ptr [r21+r16*2+0x40] +XDIS 29484: MISC BASE D57C8D5C4641 lea r27, ptr [r22+r16*2+0x41] +XDIS 2948a: MISC BASE D57C8D5C4742 lea r27, ptr [r23+r16*2+0x42] +XDIS 29490: MISC BASE D57D8D5C4043 lea r27, ptr [r24+r16*2+0x43] +XDIS 29496: MISC BASE D57D8D5C4144 lea r27, ptr [r25+r16*2+0x44] +XDIS 2949c: MISC BASE D57D8D5C4245 lea r27, ptr [r26+r16*2+0x45] +XDIS 294a2: MISC BASE D57D8D5C4346 lea r27, ptr [r27+r16*2+0x46] +XDIS 294a8: MISC BASE D57D8D5C4447 lea r27, ptr [r28+r16*2+0x47] +XDIS 294ae: MISC BASE D57D8D5C4548 lea r27, ptr [r29+r16*2+0x48] +XDIS 294b4: MISC BASE D57D8D5C4649 lea r27, ptr [r30+r16*2+0x49] +XDIS 294ba: MISC BASE D57D8D5C474A lea r27, ptr [r31+r16*2+0x4a] +XDIS 294c0: MISC BASE D56C8D5C482C lea r27, ptr [rax+r17*2+0x2c] +XDIS 294c6: MISC BASE D56C8D5C492D lea r27, ptr [rcx+r17*2+0x2d] +XDIS 294cc: MISC BASE D56C8D5C4A2E lea r27, ptr [rdx+r17*2+0x2e] +XDIS 294d2: MISC BASE D56C8D5C4B2F lea r27, ptr [rbx+r17*2+0x2f] +XDIS 294d8: MISC BASE D56C8D5C4C30 lea r27, ptr [rsp+r17*2+0x30] +XDIS 294de: MISC BASE D56C8D5C4D31 lea r27, ptr [rbp+r17*2+0x31] +XDIS 294e4: MISC BASE D56C8D5C4E32 lea r27, ptr [rsi+r17*2+0x32] +XDIS 294ea: MISC BASE D56C8D5C4F33 lea r27, ptr [rdi+r17*2+0x33] +XDIS 294f0: MISC BASE D56D8D5C4834 lea r27, ptr [r8+r17*2+0x34] +XDIS 294f6: MISC BASE D56D8D5C4935 lea r27, ptr [r9+r17*2+0x35] +XDIS 294fc: MISC BASE D56D8D5C4A36 lea r27, ptr [r10+r17*2+0x36] +XDIS 29502: MISC BASE D56D8D5C4B37 lea r27, ptr [r11+r17*2+0x37] +XDIS 29508: MISC BASE D56D8D5C4C38 lea r27, ptr [r12+r17*2+0x38] +XDIS 2950e: MISC BASE D56D8D5C4D39 lea r27, ptr [r13+r17*2+0x39] +XDIS 29514: MISC BASE D56D8D5C4E3A lea r27, ptr [r14+r17*2+0x3a] +XDIS 2951a: MISC BASE D56D8D5C4F3B lea r27, ptr [r15+r17*2+0x3b] +XDIS 29520: MISC BASE D57C8D5C483C lea r27, ptr [r16+r17*2+0x3c] +XDIS 29526: MISC BASE D57C8D5C493D lea r27, ptr [r17+r17*2+0x3d] +XDIS 2952c: MISC BASE D57C8D5C4A3E lea r27, ptr [r18+r17*2+0x3e] +XDIS 29532: MISC BASE D57C8D5C4B3F lea r27, ptr [r19+r17*2+0x3f] +XDIS 29538: MISC BASE D57C8D5C4C40 lea r27, ptr [r20+r17*2+0x40] +XDIS 2953e: MISC BASE D57C8D5C4D41 lea r27, ptr [r21+r17*2+0x41] +XDIS 29544: MISC BASE D57C8D5C4E42 lea r27, ptr [r22+r17*2+0x42] +XDIS 2954a: MISC BASE D57C8D5C4F43 lea r27, ptr [r23+r17*2+0x43] +XDIS 29550: MISC BASE D57D8D5C4844 lea r27, ptr [r24+r17*2+0x44] +XDIS 29556: MISC BASE D57D8D5C4945 lea r27, ptr [r25+r17*2+0x45] +XDIS 2955c: MISC BASE D57D8D5C4A46 lea r27, ptr [r26+r17*2+0x46] +XDIS 29562: MISC BASE D57D8D5C4B47 lea r27, ptr [r27+r17*2+0x47] +XDIS 29568: MISC BASE D57D8D5C4C48 lea r27, ptr [r28+r17*2+0x48] +XDIS 2956e: MISC BASE D57D8D5C4D49 lea r27, ptr [r29+r17*2+0x49] +XDIS 29574: MISC BASE D57D8D5C4E4A lea r27, ptr [r30+r17*2+0x4a] +XDIS 2957a: MISC BASE D57D8D5C4F4B lea r27, ptr [r31+r17*2+0x4b] +XDIS 29580: MISC BASE D56C8D5C502D lea r27, ptr [rax+r18*2+0x2d] +XDIS 29586: MISC BASE D56C8D5C512E lea r27, ptr [rcx+r18*2+0x2e] +XDIS 2958c: MISC BASE D56C8D5C522F lea r27, ptr [rdx+r18*2+0x2f] +XDIS 29592: MISC BASE D56C8D5C5330 lea r27, ptr [rbx+r18*2+0x30] +XDIS 29598: MISC BASE D56C8D5C5431 lea r27, ptr [rsp+r18*2+0x31] +XDIS 2959e: MISC BASE D56C8D5C5532 lea r27, ptr [rbp+r18*2+0x32] +XDIS 295a4: MISC BASE D56C8D5C5633 lea r27, ptr [rsi+r18*2+0x33] +XDIS 295aa: MISC BASE D56C8D5C5734 lea r27, ptr [rdi+r18*2+0x34] +XDIS 295b0: MISC BASE D56D8D5C5035 lea r27, ptr [r8+r18*2+0x35] +XDIS 295b6: MISC BASE D56D8D5C5136 lea r27, ptr [r9+r18*2+0x36] +XDIS 295bc: MISC BASE D56D8D5C5237 lea r27, ptr [r10+r18*2+0x37] +XDIS 295c2: MISC BASE D56D8D5C5338 lea r27, ptr [r11+r18*2+0x38] +XDIS 295c8: MISC BASE D56D8D5C5439 lea r27, ptr [r12+r18*2+0x39] +XDIS 295ce: MISC BASE D56D8D5C553A lea r27, ptr [r13+r18*2+0x3a] +XDIS 295d4: MISC BASE D56D8D5C563B lea r27, ptr [r14+r18*2+0x3b] +XDIS 295da: MISC BASE D56D8D5C573C lea r27, ptr [r15+r18*2+0x3c] +XDIS 295e0: MISC BASE D57C8D5C503D lea r27, ptr [r16+r18*2+0x3d] +XDIS 295e6: MISC BASE D57C8D5C513E lea r27, ptr [r17+r18*2+0x3e] +XDIS 295ec: MISC BASE D57C8D5C523F lea r27, ptr [r18+r18*2+0x3f] +XDIS 295f2: MISC BASE D57C8D5C5340 lea r27, ptr [r19+r18*2+0x40] +XDIS 295f8: MISC BASE D57C8D5C5441 lea r27, ptr [r20+r18*2+0x41] +XDIS 295fe: MISC BASE D57C8D5C5542 lea r27, ptr [r21+r18*2+0x42] +XDIS 29604: MISC BASE D57C8D5C5643 lea r27, ptr [r22+r18*2+0x43] +XDIS 2960a: MISC BASE D57C8D5C5744 lea r27, ptr [r23+r18*2+0x44] +XDIS 29610: MISC BASE D57D8D5C5045 lea r27, ptr [r24+r18*2+0x45] +XDIS 29616: MISC BASE D57D8D5C5146 lea r27, ptr [r25+r18*2+0x46] +XDIS 2961c: MISC BASE D57D8D5C5247 lea r27, ptr [r26+r18*2+0x47] +XDIS 29622: MISC BASE D57D8D5C5348 lea r27, ptr [r27+r18*2+0x48] +XDIS 29628: MISC BASE D57D8D5C5449 lea r27, ptr [r28+r18*2+0x49] +XDIS 2962e: MISC BASE D57D8D5C554A lea r27, ptr [r29+r18*2+0x4a] +XDIS 29634: MISC BASE D57D8D5C564B lea r27, ptr [r30+r18*2+0x4b] +XDIS 2963a: MISC BASE D57D8D5C574C lea r27, ptr [r31+r18*2+0x4c] +XDIS 29640: MISC BASE D56C8D5C582E lea r27, ptr [rax+r19*2+0x2e] +XDIS 29646: MISC BASE D56C8D5C592F lea r27, ptr [rcx+r19*2+0x2f] +XDIS 2964c: MISC BASE D56C8D5C5A30 lea r27, ptr [rdx+r19*2+0x30] +XDIS 29652: MISC BASE D56C8D5C5B31 lea r27, ptr [rbx+r19*2+0x31] +XDIS 29658: MISC BASE D56C8D5C5C32 lea r27, ptr [rsp+r19*2+0x32] +XDIS 2965e: MISC BASE D56C8D5C5D33 lea r27, ptr [rbp+r19*2+0x33] +XDIS 29664: MISC BASE D56C8D5C5E34 lea r27, ptr [rsi+r19*2+0x34] +XDIS 2966a: MISC BASE D56C8D5C5F35 lea r27, ptr [rdi+r19*2+0x35] +XDIS 29670: MISC BASE D56D8D5C5836 lea r27, ptr [r8+r19*2+0x36] +XDIS 29676: MISC BASE D56D8D5C5937 lea r27, ptr [r9+r19*2+0x37] +XDIS 2967c: MISC BASE D56D8D5C5A38 lea r27, ptr [r10+r19*2+0x38] +XDIS 29682: MISC BASE D56D8D5C5B39 lea r27, ptr [r11+r19*2+0x39] +XDIS 29688: MISC BASE D56D8D5C5C3A lea r27, ptr [r12+r19*2+0x3a] +XDIS 2968e: MISC BASE D56D8D5C5D3B lea r27, ptr [r13+r19*2+0x3b] +XDIS 29694: MISC BASE D56D8D5C5E3C lea r27, ptr [r14+r19*2+0x3c] +XDIS 2969a: MISC BASE D56D8D5C5F3D lea r27, ptr [r15+r19*2+0x3d] +XDIS 296a0: MISC BASE D57C8D5C583E lea r27, ptr [r16+r19*2+0x3e] +XDIS 296a6: MISC BASE D57C8D5C593F lea r27, ptr [r17+r19*2+0x3f] +XDIS 296ac: MISC BASE D57C8D5C5A40 lea r27, ptr [r18+r19*2+0x40] +XDIS 296b2: MISC BASE D57C8D5C5B41 lea r27, ptr [r19+r19*2+0x41] +XDIS 296b8: MISC BASE D57C8D5C5C42 lea r27, ptr [r20+r19*2+0x42] +XDIS 296be: MISC BASE D57C8D5C5D43 lea r27, ptr [r21+r19*2+0x43] +XDIS 296c4: MISC BASE D57C8D5C5E44 lea r27, ptr [r22+r19*2+0x44] +XDIS 296ca: MISC BASE D57C8D5C5F45 lea r27, ptr [r23+r19*2+0x45] +XDIS 296d0: MISC BASE D57D8D5C5846 lea r27, ptr [r24+r19*2+0x46] +XDIS 296d6: MISC BASE D57D8D5C5947 lea r27, ptr [r25+r19*2+0x47] +XDIS 296dc: MISC BASE D57D8D5C5A48 lea r27, ptr [r26+r19*2+0x48] +XDIS 296e2: MISC BASE D57D8D5C5B49 lea r27, ptr [r27+r19*2+0x49] +XDIS 296e8: MISC BASE D57D8D5C5C4A lea r27, ptr [r28+r19*2+0x4a] +XDIS 296ee: MISC BASE D57D8D5C5D4B lea r27, ptr [r29+r19*2+0x4b] +XDIS 296f4: MISC BASE D57D8D5C5E4C lea r27, ptr [r30+r19*2+0x4c] +XDIS 296fa: MISC BASE D57D8D5C5F4D lea r27, ptr [r31+r19*2+0x4d] +XDIS 29700: MISC BASE D56C8D5C602F lea r27, ptr [rax+r20*2+0x2f] +XDIS 29706: MISC BASE D56C8D5C6130 lea r27, ptr [rcx+r20*2+0x30] +XDIS 2970c: MISC BASE D56C8D5C6231 lea r27, ptr [rdx+r20*2+0x31] +XDIS 29712: MISC BASE D56C8D5C6332 lea r27, ptr [rbx+r20*2+0x32] +XDIS 29718: MISC BASE D56C8D5C6433 lea r27, ptr [rsp+r20*2+0x33] +XDIS 2971e: MISC BASE D56C8D5C6534 lea r27, ptr [rbp+r20*2+0x34] +XDIS 29724: MISC BASE D56C8D5C6635 lea r27, ptr [rsi+r20*2+0x35] +XDIS 2972a: MISC BASE D56C8D5C6736 lea r27, ptr [rdi+r20*2+0x36] +XDIS 29730: MISC BASE D56D8D5C6037 lea r27, ptr [r8+r20*2+0x37] +XDIS 29736: MISC BASE D56D8D5C6138 lea r27, ptr [r9+r20*2+0x38] +XDIS 2973c: MISC BASE D56D8D5C6239 lea r27, ptr [r10+r20*2+0x39] +XDIS 29742: MISC BASE D56D8D5C633A lea r27, ptr [r11+r20*2+0x3a] +XDIS 29748: MISC BASE D56D8D5C643B lea r27, ptr [r12+r20*2+0x3b] +XDIS 2974e: MISC BASE D56D8D5C653C lea r27, ptr [r13+r20*2+0x3c] +XDIS 29754: MISC BASE D56D8D5C663D lea r27, ptr [r14+r20*2+0x3d] +XDIS 2975a: MISC BASE D56D8D5C673E lea r27, ptr [r15+r20*2+0x3e] +XDIS 29760: MISC BASE D57C8D5C603F lea r27, ptr [r16+r20*2+0x3f] +XDIS 29766: MISC BASE D57C8D5C6140 lea r27, ptr [r17+r20*2+0x40] +XDIS 2976c: MISC BASE D57C8D5C6241 lea r27, ptr [r18+r20*2+0x41] +XDIS 29772: MISC BASE D57C8D5C6342 lea r27, ptr [r19+r20*2+0x42] +XDIS 29778: MISC BASE D57C8D5C6443 lea r27, ptr [r20+r20*2+0x43] +XDIS 2977e: MISC BASE D57C8D5C6544 lea r27, ptr [r21+r20*2+0x44] +XDIS 29784: MISC BASE D57C8D5C6645 lea r27, ptr [r22+r20*2+0x45] +XDIS 2978a: MISC BASE D57C8D5C6746 lea r27, ptr [r23+r20*2+0x46] +XDIS 29790: MISC BASE D57D8D5C6047 lea r27, ptr [r24+r20*2+0x47] +XDIS 29796: MISC BASE D57D8D5C6148 lea r27, ptr [r25+r20*2+0x48] +XDIS 2979c: MISC BASE D57D8D5C6249 lea r27, ptr [r26+r20*2+0x49] +XDIS 297a2: MISC BASE D57D8D5C634A lea r27, ptr [r27+r20*2+0x4a] +XDIS 297a8: MISC BASE D57D8D5C644B lea r27, ptr [r28+r20*2+0x4b] +XDIS 297ae: MISC BASE D57D8D5C654C lea r27, ptr [r29+r20*2+0x4c] +XDIS 297b4: MISC BASE D57D8D5C664D lea r27, ptr [r30+r20*2+0x4d] +XDIS 297ba: MISC BASE D57D8D5C674E lea r27, ptr [r31+r20*2+0x4e] +XDIS 297c0: MISC BASE D56C8D5C6830 lea r27, ptr [rax+r21*2+0x30] +XDIS 297c6: MISC BASE D56C8D5C6931 lea r27, ptr [rcx+r21*2+0x31] +XDIS 297cc: MISC BASE D56C8D5C6A32 lea r27, ptr [rdx+r21*2+0x32] +XDIS 297d2: MISC BASE D56C8D5C6B33 lea r27, ptr [rbx+r21*2+0x33] +XDIS 297d8: MISC BASE D56C8D5C6C34 lea r27, ptr [rsp+r21*2+0x34] +XDIS 297de: MISC BASE D56C8D5C6D35 lea r27, ptr [rbp+r21*2+0x35] +XDIS 297e4: MISC BASE D56C8D5C6E36 lea r27, ptr [rsi+r21*2+0x36] +XDIS 297ea: MISC BASE D56C8D5C6F37 lea r27, ptr [rdi+r21*2+0x37] +XDIS 297f0: MISC BASE D56D8D5C6838 lea r27, ptr [r8+r21*2+0x38] +XDIS 297f6: MISC BASE D56D8D5C6939 lea r27, ptr [r9+r21*2+0x39] +XDIS 297fc: MISC BASE D56D8D5C6A3A lea r27, ptr [r10+r21*2+0x3a] +XDIS 29802: MISC BASE D56D8D5C6B3B lea r27, ptr [r11+r21*2+0x3b] +XDIS 29808: MISC BASE D56D8D5C6C3C lea r27, ptr [r12+r21*2+0x3c] +XDIS 2980e: MISC BASE D56D8D5C6D3D lea r27, ptr [r13+r21*2+0x3d] +XDIS 29814: MISC BASE D56D8D5C6E3E lea r27, ptr [r14+r21*2+0x3e] +XDIS 2981a: MISC BASE D56D8D5C6F3F lea r27, ptr [r15+r21*2+0x3f] +XDIS 29820: MISC BASE D57C8D5C6840 lea r27, ptr [r16+r21*2+0x40] +XDIS 29826: MISC BASE D57C8D5C6941 lea r27, ptr [r17+r21*2+0x41] +XDIS 2982c: MISC BASE D57C8D5C6A42 lea r27, ptr [r18+r21*2+0x42] +XDIS 29832: MISC BASE D57C8D5C6B43 lea r27, ptr [r19+r21*2+0x43] +XDIS 29838: MISC BASE D57C8D5C6C44 lea r27, ptr [r20+r21*2+0x44] +XDIS 2983e: MISC BASE D57C8D5C6D45 lea r27, ptr [r21+r21*2+0x45] +XDIS 29844: MISC BASE D57C8D5C6E46 lea r27, ptr [r22+r21*2+0x46] +XDIS 2984a: MISC BASE D57C8D5C6F47 lea r27, ptr [r23+r21*2+0x47] +XDIS 29850: MISC BASE D57D8D5C6848 lea r27, ptr [r24+r21*2+0x48] +XDIS 29856: MISC BASE D57D8D5C6949 lea r27, ptr [r25+r21*2+0x49] +XDIS 2985c: MISC BASE D57D8D5C6A4A lea r27, ptr [r26+r21*2+0x4a] +XDIS 29862: MISC BASE D57D8D5C6B4B lea r27, ptr [r27+r21*2+0x4b] +XDIS 29868: MISC BASE D57D8D5C6C4C lea r27, ptr [r28+r21*2+0x4c] +XDIS 2986e: MISC BASE D57D8D5C6D4D lea r27, ptr [r29+r21*2+0x4d] +XDIS 29874: MISC BASE D57D8D5C6E4E lea r27, ptr [r30+r21*2+0x4e] +XDIS 2987a: MISC BASE D57D8D5C6F4F lea r27, ptr [r31+r21*2+0x4f] +XDIS 29880: MISC BASE D56C8D5C7031 lea r27, ptr [rax+r22*2+0x31] +XDIS 29886: MISC BASE D56C8D5C7132 lea r27, ptr [rcx+r22*2+0x32] +XDIS 2988c: MISC BASE D56C8D5C7233 lea r27, ptr [rdx+r22*2+0x33] +XDIS 29892: MISC BASE D56C8D5C7334 lea r27, ptr [rbx+r22*2+0x34] +XDIS 29898: MISC BASE D56C8D5C7435 lea r27, ptr [rsp+r22*2+0x35] +XDIS 2989e: MISC BASE D56C8D5C7536 lea r27, ptr [rbp+r22*2+0x36] +XDIS 298a4: MISC BASE D56C8D5C7637 lea r27, ptr [rsi+r22*2+0x37] +XDIS 298aa: MISC BASE D56C8D5C7738 lea r27, ptr [rdi+r22*2+0x38] +XDIS 298b0: MISC BASE D56D8D5C7039 lea r27, ptr [r8+r22*2+0x39] +XDIS 298b6: MISC BASE D56D8D5C713A lea r27, ptr [r9+r22*2+0x3a] +XDIS 298bc: MISC BASE D56D8D5C723B lea r27, ptr [r10+r22*2+0x3b] +XDIS 298c2: MISC BASE D56D8D5C733C lea r27, ptr [r11+r22*2+0x3c] +XDIS 298c8: MISC BASE D56D8D5C743D lea r27, ptr [r12+r22*2+0x3d] +XDIS 298ce: MISC BASE D56D8D5C753E lea r27, ptr [r13+r22*2+0x3e] +XDIS 298d4: MISC BASE D56D8D5C763F lea r27, ptr [r14+r22*2+0x3f] +XDIS 298da: MISC BASE D56D8D5C7740 lea r27, ptr [r15+r22*2+0x40] +XDIS 298e0: MISC BASE D57C8D5C7041 lea r27, ptr [r16+r22*2+0x41] +XDIS 298e6: MISC BASE D57C8D5C7142 lea r27, ptr [r17+r22*2+0x42] +XDIS 298ec: MISC BASE D57C8D5C7243 lea r27, ptr [r18+r22*2+0x43] +XDIS 298f2: MISC BASE D57C8D5C7344 lea r27, ptr [r19+r22*2+0x44] +XDIS 298f8: MISC BASE D57C8D5C7445 lea r27, ptr [r20+r22*2+0x45] +XDIS 298fe: MISC BASE D57C8D5C7546 lea r27, ptr [r21+r22*2+0x46] +XDIS 29904: MISC BASE D57C8D5C7647 lea r27, ptr [r22+r22*2+0x47] +XDIS 2990a: MISC BASE D57C8D5C7748 lea r27, ptr [r23+r22*2+0x48] +XDIS 29910: MISC BASE D57D8D5C7049 lea r27, ptr [r24+r22*2+0x49] +XDIS 29916: MISC BASE D57D8D5C714A lea r27, ptr [r25+r22*2+0x4a] +XDIS 2991c: MISC BASE D57D8D5C724B lea r27, ptr [r26+r22*2+0x4b] +XDIS 29922: MISC BASE D57D8D5C734C lea r27, ptr [r27+r22*2+0x4c] +XDIS 29928: MISC BASE D57D8D5C744D lea r27, ptr [r28+r22*2+0x4d] +XDIS 2992e: MISC BASE D57D8D5C754E lea r27, ptr [r29+r22*2+0x4e] +XDIS 29934: MISC BASE D57D8D5C764F lea r27, ptr [r30+r22*2+0x4f] +XDIS 2993a: MISC BASE D57D8D5C7750 lea r27, ptr [r31+r22*2+0x50] +XDIS 29940: MISC BASE D56C8D5C7832 lea r27, ptr [rax+r23*2+0x32] +XDIS 29946: MISC BASE D56C8D5C7933 lea r27, ptr [rcx+r23*2+0x33] +XDIS 2994c: MISC BASE D56C8D5C7A34 lea r27, ptr [rdx+r23*2+0x34] +XDIS 29952: MISC BASE D56C8D5C7B35 lea r27, ptr [rbx+r23*2+0x35] +XDIS 29958: MISC BASE D56C8D5C7C36 lea r27, ptr [rsp+r23*2+0x36] +XDIS 2995e: MISC BASE D56C8D5C7D37 lea r27, ptr [rbp+r23*2+0x37] +XDIS 29964: MISC BASE D56C8D5C7E38 lea r27, ptr [rsi+r23*2+0x38] +XDIS 2996a: MISC BASE D56C8D5C7F39 lea r27, ptr [rdi+r23*2+0x39] +XDIS 29970: MISC BASE D56D8D5C783A lea r27, ptr [r8+r23*2+0x3a] +XDIS 29976: MISC BASE D56D8D5C793B lea r27, ptr [r9+r23*2+0x3b] +XDIS 2997c: MISC BASE D56D8D5C7A3C lea r27, ptr [r10+r23*2+0x3c] +XDIS 29982: MISC BASE D56D8D5C7B3D lea r27, ptr [r11+r23*2+0x3d] +XDIS 29988: MISC BASE D56D8D5C7C3E lea r27, ptr [r12+r23*2+0x3e] +XDIS 2998e: MISC BASE D56D8D5C7D3F lea r27, ptr [r13+r23*2+0x3f] +XDIS 29994: MISC BASE D56D8D5C7E40 lea r27, ptr [r14+r23*2+0x40] +XDIS 2999a: MISC BASE D56D8D5C7F41 lea r27, ptr [r15+r23*2+0x41] +XDIS 299a0: MISC BASE D57C8D5C7842 lea r27, ptr [r16+r23*2+0x42] +XDIS 299a6: MISC BASE D57C8D5C7943 lea r27, ptr [r17+r23*2+0x43] +XDIS 299ac: MISC BASE D57C8D5C7A44 lea r27, ptr [r18+r23*2+0x44] +XDIS 299b2: MISC BASE D57C8D5C7B45 lea r27, ptr [r19+r23*2+0x45] +XDIS 299b8: MISC BASE D57C8D5C7C46 lea r27, ptr [r20+r23*2+0x46] +XDIS 299be: MISC BASE D57C8D5C7D47 lea r27, ptr [r21+r23*2+0x47] +XDIS 299c4: MISC BASE D57C8D5C7E48 lea r27, ptr [r22+r23*2+0x48] +XDIS 299ca: MISC BASE D57C8D5C7F49 lea r27, ptr [r23+r23*2+0x49] +XDIS 299d0: MISC BASE D57D8D5C784A lea r27, ptr [r24+r23*2+0x4a] +XDIS 299d6: MISC BASE D57D8D5C794B lea r27, ptr [r25+r23*2+0x4b] +XDIS 299dc: MISC BASE D57D8D5C7A4C lea r27, ptr [r26+r23*2+0x4c] +XDIS 299e2: MISC BASE D57D8D5C7B4D lea r27, ptr [r27+r23*2+0x4d] +XDIS 299e8: MISC BASE D57D8D5C7C4E lea r27, ptr [r28+r23*2+0x4e] +XDIS 299ee: MISC BASE D57D8D5C7D4F lea r27, ptr [r29+r23*2+0x4f] +XDIS 299f4: MISC BASE D57D8D5C7E50 lea r27, ptr [r30+r23*2+0x50] +XDIS 299fa: MISC BASE D57D8D5C7F51 lea r27, ptr [r31+r23*2+0x51] +XDIS 29a00: MISC BASE D56E8D5C4033 lea r27, ptr [rax+r24*2+0x33] +XDIS 29a06: MISC BASE D56E8D5C4134 lea r27, ptr [rcx+r24*2+0x34] +XDIS 29a0c: MISC BASE D56E8D5C4235 lea r27, ptr [rdx+r24*2+0x35] +XDIS 29a12: MISC BASE D56E8D5C4336 lea r27, ptr [rbx+r24*2+0x36] +XDIS 29a18: MISC BASE D56E8D5C4437 lea r27, ptr [rsp+r24*2+0x37] +XDIS 29a1e: MISC BASE D56E8D5C4538 lea r27, ptr [rbp+r24*2+0x38] +XDIS 29a24: MISC BASE D56E8D5C4639 lea r27, ptr [rsi+r24*2+0x39] +XDIS 29a2a: MISC BASE D56E8D5C473A lea r27, ptr [rdi+r24*2+0x3a] +XDIS 29a30: MISC BASE D56F8D5C403B lea r27, ptr [r8+r24*2+0x3b] +XDIS 29a36: MISC BASE D56F8D5C413C lea r27, ptr [r9+r24*2+0x3c] +XDIS 29a3c: MISC BASE D56F8D5C423D lea r27, ptr [r10+r24*2+0x3d] +XDIS 29a42: MISC BASE D56F8D5C433E lea r27, ptr [r11+r24*2+0x3e] +XDIS 29a48: MISC BASE D56F8D5C443F lea r27, ptr [r12+r24*2+0x3f] +XDIS 29a4e: MISC BASE D56F8D5C4540 lea r27, ptr [r13+r24*2+0x40] +XDIS 29a54: MISC BASE D56F8D5C4641 lea r27, ptr [r14+r24*2+0x41] +XDIS 29a5a: MISC BASE D56F8D5C4742 lea r27, ptr [r15+r24*2+0x42] +XDIS 29a60: MISC BASE D57E8D5C4043 lea r27, ptr [r16+r24*2+0x43] +XDIS 29a66: MISC BASE D57E8D5C4144 lea r27, ptr [r17+r24*2+0x44] +XDIS 29a6c: MISC BASE D57E8D5C4245 lea r27, ptr [r18+r24*2+0x45] +XDIS 29a72: MISC BASE D57E8D5C4346 lea r27, ptr [r19+r24*2+0x46] +XDIS 29a78: MISC BASE D57E8D5C4447 lea r27, ptr [r20+r24*2+0x47] +XDIS 29a7e: MISC BASE D57E8D5C4548 lea r27, ptr [r21+r24*2+0x48] +XDIS 29a84: MISC BASE D57E8D5C4649 lea r27, ptr [r22+r24*2+0x49] +XDIS 29a8a: MISC BASE D57E8D5C474A lea r27, ptr [r23+r24*2+0x4a] +XDIS 29a90: MISC BASE D57F8D5C404B lea r27, ptr [r24+r24*2+0x4b] +XDIS 29a96: MISC BASE D57F8D5C414C lea r27, ptr [r25+r24*2+0x4c] +XDIS 29a9c: MISC BASE D57F8D5C424D lea r27, ptr [r26+r24*2+0x4d] +XDIS 29aa2: MISC BASE D57F8D5C434E lea r27, ptr [r27+r24*2+0x4e] +XDIS 29aa8: MISC BASE D57F8D5C444F lea r27, ptr [r28+r24*2+0x4f] +XDIS 29aae: MISC BASE D57F8D5C4550 lea r27, ptr [r29+r24*2+0x50] +XDIS 29ab4: MISC BASE D57F8D5C4651 lea r27, ptr [r30+r24*2+0x51] +XDIS 29aba: MISC BASE D57F8D5C4752 lea r27, ptr [r31+r24*2+0x52] +XDIS 29ac0: MISC BASE D56E8D5C4834 lea r27, ptr [rax+r25*2+0x34] +XDIS 29ac6: MISC BASE D56E8D5C4935 lea r27, ptr [rcx+r25*2+0x35] +XDIS 29acc: MISC BASE D56E8D5C4A36 lea r27, ptr [rdx+r25*2+0x36] +XDIS 29ad2: MISC BASE D56E8D5C4B37 lea r27, ptr [rbx+r25*2+0x37] +XDIS 29ad8: MISC BASE D56E8D5C4C38 lea r27, ptr [rsp+r25*2+0x38] +XDIS 29ade: MISC BASE D56E8D5C4D39 lea r27, ptr [rbp+r25*2+0x39] +XDIS 29ae4: MISC BASE D56E8D5C4E3A lea r27, ptr [rsi+r25*2+0x3a] +XDIS 29aea: MISC BASE D56E8D5C4F3B lea r27, ptr [rdi+r25*2+0x3b] +XDIS 29af0: MISC BASE D56F8D5C483C lea r27, ptr [r8+r25*2+0x3c] +XDIS 29af6: MISC BASE D56F8D5C493D lea r27, ptr [r9+r25*2+0x3d] +XDIS 29afc: MISC BASE D56F8D5C4A3E lea r27, ptr [r10+r25*2+0x3e] +XDIS 29b02: MISC BASE D56F8D5C4B3F lea r27, ptr [r11+r25*2+0x3f] +XDIS 29b08: MISC BASE D56F8D5C4C40 lea r27, ptr [r12+r25*2+0x40] +XDIS 29b0e: MISC BASE D56F8D5C4D41 lea r27, ptr [r13+r25*2+0x41] +XDIS 29b14: MISC BASE D56F8D5C4E42 lea r27, ptr [r14+r25*2+0x42] +XDIS 29b1a: MISC BASE D56F8D5C4F43 lea r27, ptr [r15+r25*2+0x43] +XDIS 29b20: MISC BASE D57E8D5C4844 lea r27, ptr [r16+r25*2+0x44] +XDIS 29b26: MISC BASE D57E8D5C4945 lea r27, ptr [r17+r25*2+0x45] +XDIS 29b2c: MISC BASE D57E8D5C4A46 lea r27, ptr [r18+r25*2+0x46] +XDIS 29b32: MISC BASE D57E8D5C4B47 lea r27, ptr [r19+r25*2+0x47] +XDIS 29b38: MISC BASE D57E8D5C4C48 lea r27, ptr [r20+r25*2+0x48] +XDIS 29b3e: MISC BASE D57E8D5C4D49 lea r27, ptr [r21+r25*2+0x49] +XDIS 29b44: MISC BASE D57E8D5C4E4A lea r27, ptr [r22+r25*2+0x4a] +XDIS 29b4a: MISC BASE D57E8D5C4F4B lea r27, ptr [r23+r25*2+0x4b] +XDIS 29b50: MISC BASE D57F8D5C484C lea r27, ptr [r24+r25*2+0x4c] +XDIS 29b56: MISC BASE D57F8D5C494D lea r27, ptr [r25+r25*2+0x4d] +XDIS 29b5c: MISC BASE D57F8D5C4A4E lea r27, ptr [r26+r25*2+0x4e] +XDIS 29b62: MISC BASE D57F8D5C4B4F lea r27, ptr [r27+r25*2+0x4f] +XDIS 29b68: MISC BASE D57F8D5C4C50 lea r27, ptr [r28+r25*2+0x50] +XDIS 29b6e: MISC BASE D57F8D5C4D51 lea r27, ptr [r29+r25*2+0x51] +XDIS 29b74: MISC BASE D57F8D5C4E52 lea r27, ptr [r30+r25*2+0x52] +XDIS 29b7a: MISC BASE D57F8D5C4F53 lea r27, ptr [r31+r25*2+0x53] +XDIS 29b80: MISC BASE D56E8D5C5035 lea r27, ptr [rax+r26*2+0x35] +XDIS 29b86: MISC BASE D56E8D5C5136 lea r27, ptr [rcx+r26*2+0x36] +XDIS 29b8c: MISC BASE D56E8D5C5237 lea r27, ptr [rdx+r26*2+0x37] +XDIS 29b92: MISC BASE D56E8D5C5338 lea r27, ptr [rbx+r26*2+0x38] +XDIS 29b98: MISC BASE D56E8D5C5439 lea r27, ptr [rsp+r26*2+0x39] +XDIS 29b9e: MISC BASE D56E8D5C553A lea r27, ptr [rbp+r26*2+0x3a] +XDIS 29ba4: MISC BASE D56E8D5C563B lea r27, ptr [rsi+r26*2+0x3b] +XDIS 29baa: MISC BASE D56E8D5C573C lea r27, ptr [rdi+r26*2+0x3c] +XDIS 29bb0: MISC BASE D56F8D5C503D lea r27, ptr [r8+r26*2+0x3d] +XDIS 29bb6: MISC BASE D56F8D5C513E lea r27, ptr [r9+r26*2+0x3e] +XDIS 29bbc: MISC BASE D56F8D5C523F lea r27, ptr [r10+r26*2+0x3f] +XDIS 29bc2: MISC BASE D56F8D5C5340 lea r27, ptr [r11+r26*2+0x40] +XDIS 29bc8: MISC BASE D56F8D5C5441 lea r27, ptr [r12+r26*2+0x41] +XDIS 29bce: MISC BASE D56F8D5C5542 lea r27, ptr [r13+r26*2+0x42] +XDIS 29bd4: MISC BASE D56F8D5C5643 lea r27, ptr [r14+r26*2+0x43] +XDIS 29bda: MISC BASE D56F8D5C5744 lea r27, ptr [r15+r26*2+0x44] +XDIS 29be0: MISC BASE D57E8D5C5045 lea r27, ptr [r16+r26*2+0x45] +XDIS 29be6: MISC BASE D57E8D5C5146 lea r27, ptr [r17+r26*2+0x46] +XDIS 29bec: MISC BASE D57E8D5C5247 lea r27, ptr [r18+r26*2+0x47] +XDIS 29bf2: MISC BASE D57E8D5C5348 lea r27, ptr [r19+r26*2+0x48] +XDIS 29bf8: MISC BASE D57E8D5C5449 lea r27, ptr [r20+r26*2+0x49] +XDIS 29bfe: MISC BASE D57E8D5C554A lea r27, ptr [r21+r26*2+0x4a] +XDIS 29c04: MISC BASE D57E8D5C564B lea r27, ptr [r22+r26*2+0x4b] +XDIS 29c0a: MISC BASE D57E8D5C574C lea r27, ptr [r23+r26*2+0x4c] +XDIS 29c10: MISC BASE D57F8D5C504D lea r27, ptr [r24+r26*2+0x4d] +XDIS 29c16: MISC BASE D57F8D5C514E lea r27, ptr [r25+r26*2+0x4e] +XDIS 29c1c: MISC BASE D57F8D5C524F lea r27, ptr [r26+r26*2+0x4f] +XDIS 29c22: MISC BASE D57F8D5C5350 lea r27, ptr [r27+r26*2+0x50] +XDIS 29c28: MISC BASE D57F8D5C5451 lea r27, ptr [r28+r26*2+0x51] +XDIS 29c2e: MISC BASE D57F8D5C5552 lea r27, ptr [r29+r26*2+0x52] +XDIS 29c34: MISC BASE D57F8D5C5653 lea r27, ptr [r30+r26*2+0x53] +XDIS 29c3a: MISC BASE D57F8D5C5754 lea r27, ptr [r31+r26*2+0x54] +XDIS 29c40: MISC BASE D56E8D5C5836 lea r27, ptr [rax+r27*2+0x36] +XDIS 29c46: MISC BASE D56E8D5C5937 lea r27, ptr [rcx+r27*2+0x37] +XDIS 29c4c: MISC BASE D56E8D5C5A38 lea r27, ptr [rdx+r27*2+0x38] +XDIS 29c52: MISC BASE D56E8D5C5B39 lea r27, ptr [rbx+r27*2+0x39] +XDIS 29c58: MISC BASE D56E8D5C5C3A lea r27, ptr [rsp+r27*2+0x3a] +XDIS 29c5e: MISC BASE D56E8D5C5D3B lea r27, ptr [rbp+r27*2+0x3b] +XDIS 29c64: MISC BASE D56E8D5C5E3C lea r27, ptr [rsi+r27*2+0x3c] +XDIS 29c6a: MISC BASE D56E8D5C5F3D lea r27, ptr [rdi+r27*2+0x3d] +XDIS 29c70: MISC BASE D56F8D5C583E lea r27, ptr [r8+r27*2+0x3e] +XDIS 29c76: MISC BASE D56F8D5C593F lea r27, ptr [r9+r27*2+0x3f] +XDIS 29c7c: MISC BASE D56F8D5C5A40 lea r27, ptr [r10+r27*2+0x40] +XDIS 29c82: MISC BASE D56F8D5C5B41 lea r27, ptr [r11+r27*2+0x41] +XDIS 29c88: MISC BASE D56F8D5C5C42 lea r27, ptr [r12+r27*2+0x42] +XDIS 29c8e: MISC BASE D56F8D5C5D43 lea r27, ptr [r13+r27*2+0x43] +XDIS 29c94: MISC BASE D56F8D5C5E44 lea r27, ptr [r14+r27*2+0x44] +XDIS 29c9a: MISC BASE D56F8D5C5F45 lea r27, ptr [r15+r27*2+0x45] +XDIS 29ca0: MISC BASE D57E8D5C5846 lea r27, ptr [r16+r27*2+0x46] +XDIS 29ca6: MISC BASE D57E8D5C5947 lea r27, ptr [r17+r27*2+0x47] +XDIS 29cac: MISC BASE D57E8D5C5A48 lea r27, ptr [r18+r27*2+0x48] +XDIS 29cb2: MISC BASE D57E8D5C5B49 lea r27, ptr [r19+r27*2+0x49] +XDIS 29cb8: MISC BASE D57E8D5C5C4A lea r27, ptr [r20+r27*2+0x4a] +XDIS 29cbe: MISC BASE D57E8D5C5D4B lea r27, ptr [r21+r27*2+0x4b] +XDIS 29cc4: MISC BASE D57E8D5C5E4C lea r27, ptr [r22+r27*2+0x4c] +XDIS 29cca: MISC BASE D57E8D5C5F4D lea r27, ptr [r23+r27*2+0x4d] +XDIS 29cd0: MISC BASE D57F8D5C584E lea r27, ptr [r24+r27*2+0x4e] +XDIS 29cd6: MISC BASE D57F8D5C594F lea r27, ptr [r25+r27*2+0x4f] +XDIS 29cdc: MISC BASE D57F8D5C5A50 lea r27, ptr [r26+r27*2+0x50] +XDIS 29ce2: MISC BASE D57F8D5C5B51 lea r27, ptr [r27+r27*2+0x51] +XDIS 29ce8: MISC BASE D57F8D5C5C52 lea r27, ptr [r28+r27*2+0x52] +XDIS 29cee: MISC BASE D57F8D5C5D53 lea r27, ptr [r29+r27*2+0x53] +XDIS 29cf4: MISC BASE D57F8D5C5E54 lea r27, ptr [r30+r27*2+0x54] +XDIS 29cfa: MISC BASE D57F8D5C5F55 lea r27, ptr [r31+r27*2+0x55] +XDIS 29d00: MISC BASE D56E8D5C6037 lea r27, ptr [rax+r28*2+0x37] +XDIS 29d06: MISC BASE D56E8D5C6138 lea r27, ptr [rcx+r28*2+0x38] +XDIS 29d0c: MISC BASE D56E8D5C6239 lea r27, ptr [rdx+r28*2+0x39] +XDIS 29d12: MISC BASE D56E8D5C633A lea r27, ptr [rbx+r28*2+0x3a] +XDIS 29d18: MISC BASE D56E8D5C643B lea r27, ptr [rsp+r28*2+0x3b] +XDIS 29d1e: MISC BASE D56E8D5C653C lea r27, ptr [rbp+r28*2+0x3c] +XDIS 29d24: MISC BASE D56E8D5C663D lea r27, ptr [rsi+r28*2+0x3d] +XDIS 29d2a: MISC BASE D56E8D5C673E lea r27, ptr [rdi+r28*2+0x3e] +XDIS 29d30: MISC BASE D56F8D5C603F lea r27, ptr [r8+r28*2+0x3f] +XDIS 29d36: MISC BASE D56F8D5C6140 lea r27, ptr [r9+r28*2+0x40] +XDIS 29d3c: MISC BASE D56F8D5C6241 lea r27, ptr [r10+r28*2+0x41] +XDIS 29d42: MISC BASE D56F8D5C6342 lea r27, ptr [r11+r28*2+0x42] +XDIS 29d48: MISC BASE D56F8D5C6443 lea r27, ptr [r12+r28*2+0x43] +XDIS 29d4e: MISC BASE D56F8D5C6544 lea r27, ptr [r13+r28*2+0x44] +XDIS 29d54: MISC BASE D56F8D5C6645 lea r27, ptr [r14+r28*2+0x45] +XDIS 29d5a: MISC BASE D56F8D5C6746 lea r27, ptr [r15+r28*2+0x46] +XDIS 29d60: MISC BASE D57E8D5C6047 lea r27, ptr [r16+r28*2+0x47] +XDIS 29d66: MISC BASE D57E8D5C6148 lea r27, ptr [r17+r28*2+0x48] +XDIS 29d6c: MISC BASE D57E8D5C6249 lea r27, ptr [r18+r28*2+0x49] +XDIS 29d72: MISC BASE D57E8D5C634A lea r27, ptr [r19+r28*2+0x4a] +XDIS 29d78: MISC BASE D57E8D5C644B lea r27, ptr [r20+r28*2+0x4b] +XDIS 29d7e: MISC BASE D57E8D5C654C lea r27, ptr [r21+r28*2+0x4c] +XDIS 29d84: MISC BASE D57E8D5C664D lea r27, ptr [r22+r28*2+0x4d] +XDIS 29d8a: MISC BASE D57E8D5C674E lea r27, ptr [r23+r28*2+0x4e] +XDIS 29d90: MISC BASE D57F8D5C604F lea r27, ptr [r24+r28*2+0x4f] +XDIS 29d96: MISC BASE D57F8D5C6150 lea r27, ptr [r25+r28*2+0x50] +XDIS 29d9c: MISC BASE D57F8D5C6251 lea r27, ptr [r26+r28*2+0x51] +XDIS 29da2: MISC BASE D57F8D5C6352 lea r27, ptr [r27+r28*2+0x52] +XDIS 29da8: MISC BASE D57F8D5C6453 lea r27, ptr [r28+r28*2+0x53] +XDIS 29dae: MISC BASE D57F8D5C6554 lea r27, ptr [r29+r28*2+0x54] +XDIS 29db4: MISC BASE D57F8D5C6655 lea r27, ptr [r30+r28*2+0x55] +XDIS 29dba: MISC BASE D57F8D5C6756 lea r27, ptr [r31+r28*2+0x56] +XDIS 29dc0: MISC BASE D56E8D5C6838 lea r27, ptr [rax+r29*2+0x38] +XDIS 29dc6: MISC BASE D56E8D5C6939 lea r27, ptr [rcx+r29*2+0x39] +XDIS 29dcc: MISC BASE D56E8D5C6A3A lea r27, ptr [rdx+r29*2+0x3a] +XDIS 29dd2: MISC BASE D56E8D5C6B3B lea r27, ptr [rbx+r29*2+0x3b] +XDIS 29dd8: MISC BASE D56E8D5C6C3C lea r27, ptr [rsp+r29*2+0x3c] +XDIS 29dde: MISC BASE D56E8D5C6D3D lea r27, ptr [rbp+r29*2+0x3d] +XDIS 29de4: MISC BASE D56E8D5C6E3E lea r27, ptr [rsi+r29*2+0x3e] +XDIS 29dea: MISC BASE D56E8D5C6F3F lea r27, ptr [rdi+r29*2+0x3f] +XDIS 29df0: MISC BASE D56F8D5C6840 lea r27, ptr [r8+r29*2+0x40] +XDIS 29df6: MISC BASE D56F8D5C6941 lea r27, ptr [r9+r29*2+0x41] +XDIS 29dfc: MISC BASE D56F8D5C6A42 lea r27, ptr [r10+r29*2+0x42] +XDIS 29e02: MISC BASE D56F8D5C6B43 lea r27, ptr [r11+r29*2+0x43] +XDIS 29e08: MISC BASE D56F8D5C6C44 lea r27, ptr [r12+r29*2+0x44] +XDIS 29e0e: MISC BASE D56F8D5C6D45 lea r27, ptr [r13+r29*2+0x45] +XDIS 29e14: MISC BASE D56F8D5C6E46 lea r27, ptr [r14+r29*2+0x46] +XDIS 29e1a: MISC BASE D56F8D5C6F47 lea r27, ptr [r15+r29*2+0x47] +XDIS 29e20: MISC BASE D57E8D5C6848 lea r27, ptr [r16+r29*2+0x48] +XDIS 29e26: MISC BASE D57E8D5C6949 lea r27, ptr [r17+r29*2+0x49] +XDIS 29e2c: MISC BASE D57E8D5C6A4A lea r27, ptr [r18+r29*2+0x4a] +XDIS 29e32: MISC BASE D57E8D5C6B4B lea r27, ptr [r19+r29*2+0x4b] +XDIS 29e38: MISC BASE D57E8D5C6C4C lea r27, ptr [r20+r29*2+0x4c] +XDIS 29e3e: MISC BASE D57E8D5C6D4D lea r27, ptr [r21+r29*2+0x4d] +XDIS 29e44: MISC BASE D57E8D5C6E4E lea r27, ptr [r22+r29*2+0x4e] +XDIS 29e4a: MISC BASE D57E8D5C6F4F lea r27, ptr [r23+r29*2+0x4f] +XDIS 29e50: MISC BASE D57F8D5C6850 lea r27, ptr [r24+r29*2+0x50] +XDIS 29e56: MISC BASE D57F8D5C6951 lea r27, ptr [r25+r29*2+0x51] +XDIS 29e5c: MISC BASE D57F8D5C6A52 lea r27, ptr [r26+r29*2+0x52] +XDIS 29e62: MISC BASE D57F8D5C6B53 lea r27, ptr [r27+r29*2+0x53] +XDIS 29e68: MISC BASE D57F8D5C6C54 lea r27, ptr [r28+r29*2+0x54] +XDIS 29e6e: MISC BASE D57F8D5C6D55 lea r27, ptr [r29+r29*2+0x55] +XDIS 29e74: MISC BASE D57F8D5C6E56 lea r27, ptr [r30+r29*2+0x56] +XDIS 29e7a: MISC BASE D57F8D5C6F57 lea r27, ptr [r31+r29*2+0x57] +XDIS 29e80: MISC BASE D56E8D5C7039 lea r27, ptr [rax+r30*2+0x39] +XDIS 29e86: MISC BASE D56E8D5C713A lea r27, ptr [rcx+r30*2+0x3a] +XDIS 29e8c: MISC BASE D56E8D5C723B lea r27, ptr [rdx+r30*2+0x3b] +XDIS 29e92: MISC BASE D56E8D5C733C lea r27, ptr [rbx+r30*2+0x3c] +XDIS 29e98: MISC BASE D56E8D5C743D lea r27, ptr [rsp+r30*2+0x3d] +XDIS 29e9e: MISC BASE D56E8D5C753E lea r27, ptr [rbp+r30*2+0x3e] +XDIS 29ea4: MISC BASE D56E8D5C763F lea r27, ptr [rsi+r30*2+0x3f] +XDIS 29eaa: MISC BASE D56E8D5C7740 lea r27, ptr [rdi+r30*2+0x40] +XDIS 29eb0: MISC BASE D56F8D5C7041 lea r27, ptr [r8+r30*2+0x41] +XDIS 29eb6: MISC BASE D56F8D5C7142 lea r27, ptr [r9+r30*2+0x42] +XDIS 29ebc: MISC BASE D56F8D5C7243 lea r27, ptr [r10+r30*2+0x43] +XDIS 29ec2: MISC BASE D56F8D5C7344 lea r27, ptr [r11+r30*2+0x44] +XDIS 29ec8: MISC BASE D56F8D5C7445 lea r27, ptr [r12+r30*2+0x45] +XDIS 29ece: MISC BASE D56F8D5C7546 lea r27, ptr [r13+r30*2+0x46] +XDIS 29ed4: MISC BASE D56F8D5C7647 lea r27, ptr [r14+r30*2+0x47] +XDIS 29eda: MISC BASE D56F8D5C7748 lea r27, ptr [r15+r30*2+0x48] +XDIS 29ee0: MISC BASE D57E8D5C7049 lea r27, ptr [r16+r30*2+0x49] +XDIS 29ee6: MISC BASE D57E8D5C714A lea r27, ptr [r17+r30*2+0x4a] +XDIS 29eec: MISC BASE D57E8D5C724B lea r27, ptr [r18+r30*2+0x4b] +XDIS 29ef2: MISC BASE D57E8D5C734C lea r27, ptr [r19+r30*2+0x4c] +XDIS 29ef8: MISC BASE D57E8D5C744D lea r27, ptr [r20+r30*2+0x4d] +XDIS 29efe: MISC BASE D57E8D5C754E lea r27, ptr [r21+r30*2+0x4e] +XDIS 29f04: MISC BASE D57E8D5C764F lea r27, ptr [r22+r30*2+0x4f] +XDIS 29f0a: MISC BASE D57E8D5C7750 lea r27, ptr [r23+r30*2+0x50] +XDIS 29f10: MISC BASE D57F8D5C7051 lea r27, ptr [r24+r30*2+0x51] +XDIS 29f16: MISC BASE D57F8D5C7152 lea r27, ptr [r25+r30*2+0x52] +XDIS 29f1c: MISC BASE D57F8D5C7253 lea r27, ptr [r26+r30*2+0x53] +XDIS 29f22: MISC BASE D57F8D5C7354 lea r27, ptr [r27+r30*2+0x54] +XDIS 29f28: MISC BASE D57F8D5C7455 lea r27, ptr [r28+r30*2+0x55] +XDIS 29f2e: MISC BASE D57F8D5C7556 lea r27, ptr [r29+r30*2+0x56] +XDIS 29f34: MISC BASE D57F8D5C7657 lea r27, ptr [r30+r30*2+0x57] +XDIS 29f3a: MISC BASE D57F8D5C7758 lea r27, ptr [r31+r30*2+0x58] +XDIS 29f40: MISC BASE D56E8D5C783A lea r27, ptr [rax+r31*2+0x3a] +XDIS 29f46: MISC BASE D56E8D5C793B lea r27, ptr [rcx+r31*2+0x3b] +XDIS 29f4c: MISC BASE D56E8D5C7A3C lea r27, ptr [rdx+r31*2+0x3c] +XDIS 29f52: MISC BASE D56E8D5C7B3D lea r27, ptr [rbx+r31*2+0x3d] +XDIS 29f58: MISC BASE D56E8D5C7C3E lea r27, ptr [rsp+r31*2+0x3e] +XDIS 29f5e: MISC BASE D56E8D5C7D3F lea r27, ptr [rbp+r31*2+0x3f] +XDIS 29f64: MISC BASE D56E8D5C7E40 lea r27, ptr [rsi+r31*2+0x40] +XDIS 29f6a: MISC BASE D56E8D5C7F41 lea r27, ptr [rdi+r31*2+0x41] +XDIS 29f70: MISC BASE D56F8D5C7842 lea r27, ptr [r8+r31*2+0x42] +XDIS 29f76: MISC BASE D56F8D5C7943 lea r27, ptr [r9+r31*2+0x43] +XDIS 29f7c: MISC BASE D56F8D5C7A44 lea r27, ptr [r10+r31*2+0x44] +XDIS 29f82: MISC BASE D56F8D5C7B45 lea r27, ptr [r11+r31*2+0x45] +XDIS 29f88: MISC BASE D56F8D5C7C46 lea r27, ptr [r12+r31*2+0x46] +XDIS 29f8e: MISC BASE D56F8D5C7D47 lea r27, ptr [r13+r31*2+0x47] +XDIS 29f94: MISC BASE D56F8D5C7E48 lea r27, ptr [r14+r31*2+0x48] +XDIS 29f9a: MISC BASE D56F8D5C7F49 lea r27, ptr [r15+r31*2+0x49] +XDIS 29fa0: MISC BASE D57E8D5C784A lea r27, ptr [r16+r31*2+0x4a] +XDIS 29fa6: MISC BASE D57E8D5C794B lea r27, ptr [r17+r31*2+0x4b] +XDIS 29fac: MISC BASE D57E8D5C7A4C lea r27, ptr [r18+r31*2+0x4c] +XDIS 29fb2: MISC BASE D57E8D5C7B4D lea r27, ptr [r19+r31*2+0x4d] +XDIS 29fb8: MISC BASE D57E8D5C7C4E lea r27, ptr [r20+r31*2+0x4e] +XDIS 29fbe: MISC BASE D57E8D5C7D4F lea r27, ptr [r21+r31*2+0x4f] +XDIS 29fc4: MISC BASE D57E8D5C7E50 lea r27, ptr [r22+r31*2+0x50] +XDIS 29fca: MISC BASE D57E8D5C7F51 lea r27, ptr [r23+r31*2+0x51] +XDIS 29fd0: MISC BASE D57F8D5C7852 lea r27, ptr [r24+r31*2+0x52] +XDIS 29fd6: MISC BASE D57F8D5C7953 lea r27, ptr [r25+r31*2+0x53] +XDIS 29fdc: MISC BASE D57F8D5C7A54 lea r27, ptr [r26+r31*2+0x54] +XDIS 29fe2: MISC BASE D57F8D5C7B55 lea r27, ptr [r27+r31*2+0x55] +XDIS 29fe8: MISC BASE D57F8D5C7C56 lea r27, ptr [r28+r31*2+0x56] +XDIS 29fee: MISC BASE D57F8D5C7D57 lea r27, ptr [r29+r31*2+0x57] +XDIS 29ff4: MISC BASE D57F8D5C7E58 lea r27, ptr [r30+r31*2+0x58] +XDIS 29ffa: MISC BASE D57F8D5C7F59 lea r27, ptr [r31+r31*2+0x59] +XDIS 2a000: MISC BASE D54C8D64401C lea r28, ptr [rax+rax*2+0x1c] +XDIS 2a006: MISC BASE D54C8D64411D lea r28, ptr [rcx+rax*2+0x1d] +XDIS 2a00c: MISC BASE D54C8D64421E lea r28, ptr [rdx+rax*2+0x1e] +XDIS 2a012: MISC BASE D54C8D64431F lea r28, ptr [rbx+rax*2+0x1f] +XDIS 2a018: MISC BASE D54C8D644420 lea r28, ptr [rsp+rax*2+0x20] +XDIS 2a01e: MISC BASE D54C8D644521 lea r28, ptr [rbp+rax*2+0x21] +XDIS 2a024: MISC BASE D54C8D644622 lea r28, ptr [rsi+rax*2+0x22] +XDIS 2a02a: MISC BASE D54C8D644723 lea r28, ptr [rdi+rax*2+0x23] +XDIS 2a030: MISC BASE D54D8D644024 lea r28, ptr [r8+rax*2+0x24] +XDIS 2a036: MISC BASE D54D8D644125 lea r28, ptr [r9+rax*2+0x25] +XDIS 2a03c: MISC BASE D54D8D644226 lea r28, ptr [r10+rax*2+0x26] +XDIS 2a042: MISC BASE D54D8D644327 lea r28, ptr [r11+rax*2+0x27] +XDIS 2a048: MISC BASE D54D8D644428 lea r28, ptr [r12+rax*2+0x28] +XDIS 2a04e: MISC BASE D54D8D644529 lea r28, ptr [r13+rax*2+0x29] +XDIS 2a054: MISC BASE D54D8D64462A lea r28, ptr [r14+rax*2+0x2a] +XDIS 2a05a: MISC BASE D54D8D64472B lea r28, ptr [r15+rax*2+0x2b] +XDIS 2a060: MISC BASE D55C8D64402C lea r28, ptr [r16+rax*2+0x2c] +XDIS 2a066: MISC BASE D55C8D64412D lea r28, ptr [r17+rax*2+0x2d] +XDIS 2a06c: MISC BASE D55C8D64422E lea r28, ptr [r18+rax*2+0x2e] +XDIS 2a072: MISC BASE D55C8D64432F lea r28, ptr [r19+rax*2+0x2f] +XDIS 2a078: MISC BASE D55C8D644430 lea r28, ptr [r20+rax*2+0x30] +XDIS 2a07e: MISC BASE D55C8D644531 lea r28, ptr [r21+rax*2+0x31] +XDIS 2a084: MISC BASE D55C8D644632 lea r28, ptr [r22+rax*2+0x32] +XDIS 2a08a: MISC BASE D55C8D644733 lea r28, ptr [r23+rax*2+0x33] +XDIS 2a090: MISC BASE D55D8D644034 lea r28, ptr [r24+rax*2+0x34] +XDIS 2a096: MISC BASE D55D8D644135 lea r28, ptr [r25+rax*2+0x35] +XDIS 2a09c: MISC BASE D55D8D644236 lea r28, ptr [r26+rax*2+0x36] +XDIS 2a0a2: MISC BASE D55D8D644337 lea r28, ptr [r27+rax*2+0x37] +XDIS 2a0a8: MISC BASE D55D8D644438 lea r28, ptr [r28+rax*2+0x38] +XDIS 2a0ae: MISC BASE D55D8D644539 lea r28, ptr [r29+rax*2+0x39] +XDIS 2a0b4: MISC BASE D55D8D64463A lea r28, ptr [r30+rax*2+0x3a] +XDIS 2a0ba: MISC BASE D55D8D64473B lea r28, ptr [r31+rax*2+0x3b] +XDIS 2a0c0: MISC BASE D54C8D64481D lea r28, ptr [rax+rcx*2+0x1d] +XDIS 2a0c6: MISC BASE D54C8D64491E lea r28, ptr [rcx+rcx*2+0x1e] +XDIS 2a0cc: MISC BASE D54C8D644A1F lea r28, ptr [rdx+rcx*2+0x1f] +XDIS 2a0d2: MISC BASE D54C8D644B20 lea r28, ptr [rbx+rcx*2+0x20] +XDIS 2a0d8: MISC BASE D54C8D644C21 lea r28, ptr [rsp+rcx*2+0x21] +XDIS 2a0de: MISC BASE D54C8D644D22 lea r28, ptr [rbp+rcx*2+0x22] +XDIS 2a0e4: MISC BASE D54C8D644E23 lea r28, ptr [rsi+rcx*2+0x23] +XDIS 2a0ea: MISC BASE D54C8D644F24 lea r28, ptr [rdi+rcx*2+0x24] +XDIS 2a0f0: MISC BASE D54D8D644825 lea r28, ptr [r8+rcx*2+0x25] +XDIS 2a0f6: MISC BASE D54D8D644926 lea r28, ptr [r9+rcx*2+0x26] +XDIS 2a0fc: MISC BASE D54D8D644A27 lea r28, ptr [r10+rcx*2+0x27] +XDIS 2a102: MISC BASE D54D8D644B28 lea r28, ptr [r11+rcx*2+0x28] +XDIS 2a108: MISC BASE D54D8D644C29 lea r28, ptr [r12+rcx*2+0x29] +XDIS 2a10e: MISC BASE D54D8D644D2A lea r28, ptr [r13+rcx*2+0x2a] +XDIS 2a114: MISC BASE D54D8D644E2B lea r28, ptr [r14+rcx*2+0x2b] +XDIS 2a11a: MISC BASE D54D8D644F2C lea r28, ptr [r15+rcx*2+0x2c] +XDIS 2a120: MISC BASE D55C8D64482D lea r28, ptr [r16+rcx*2+0x2d] +XDIS 2a126: MISC BASE D55C8D64492E lea r28, ptr [r17+rcx*2+0x2e] +XDIS 2a12c: MISC BASE D55C8D644A2F lea r28, ptr [r18+rcx*2+0x2f] +XDIS 2a132: MISC BASE D55C8D644B30 lea r28, ptr [r19+rcx*2+0x30] +XDIS 2a138: MISC BASE D55C8D644C31 lea r28, ptr [r20+rcx*2+0x31] +XDIS 2a13e: MISC BASE D55C8D644D32 lea r28, ptr [r21+rcx*2+0x32] +XDIS 2a144: MISC BASE D55C8D644E33 lea r28, ptr [r22+rcx*2+0x33] +XDIS 2a14a: MISC BASE D55C8D644F34 lea r28, ptr [r23+rcx*2+0x34] +XDIS 2a150: MISC BASE D55D8D644835 lea r28, ptr [r24+rcx*2+0x35] +XDIS 2a156: MISC BASE D55D8D644936 lea r28, ptr [r25+rcx*2+0x36] +XDIS 2a15c: MISC BASE D55D8D644A37 lea r28, ptr [r26+rcx*2+0x37] +XDIS 2a162: MISC BASE D55D8D644B38 lea r28, ptr [r27+rcx*2+0x38] +XDIS 2a168: MISC BASE D55D8D644C39 lea r28, ptr [r28+rcx*2+0x39] +XDIS 2a16e: MISC BASE D55D8D644D3A lea r28, ptr [r29+rcx*2+0x3a] +XDIS 2a174: MISC BASE D55D8D644E3B lea r28, ptr [r30+rcx*2+0x3b] +XDIS 2a17a: MISC BASE D55D8D644F3C lea r28, ptr [r31+rcx*2+0x3c] +XDIS 2a180: MISC BASE D54C8D64501E lea r28, ptr [rax+rdx*2+0x1e] +XDIS 2a186: MISC BASE D54C8D64511F lea r28, ptr [rcx+rdx*2+0x1f] +XDIS 2a18c: MISC BASE D54C8D645220 lea r28, ptr [rdx+rdx*2+0x20] +XDIS 2a192: MISC BASE D54C8D645321 lea r28, ptr [rbx+rdx*2+0x21] +XDIS 2a198: MISC BASE D54C8D645422 lea r28, ptr [rsp+rdx*2+0x22] +XDIS 2a19e: MISC BASE D54C8D645523 lea r28, ptr [rbp+rdx*2+0x23] +XDIS 2a1a4: MISC BASE D54C8D645624 lea r28, ptr [rsi+rdx*2+0x24] +XDIS 2a1aa: MISC BASE D54C8D645725 lea r28, ptr [rdi+rdx*2+0x25] +XDIS 2a1b0: MISC BASE D54D8D645026 lea r28, ptr [r8+rdx*2+0x26] +XDIS 2a1b6: MISC BASE D54D8D645127 lea r28, ptr [r9+rdx*2+0x27] +XDIS 2a1bc: MISC BASE D54D8D645228 lea r28, ptr [r10+rdx*2+0x28] +XDIS 2a1c2: MISC BASE D54D8D645329 lea r28, ptr [r11+rdx*2+0x29] +XDIS 2a1c8: MISC BASE D54D8D64542A lea r28, ptr [r12+rdx*2+0x2a] +XDIS 2a1ce: MISC BASE D54D8D64552B lea r28, ptr [r13+rdx*2+0x2b] +XDIS 2a1d4: MISC BASE D54D8D64562C lea r28, ptr [r14+rdx*2+0x2c] +XDIS 2a1da: MISC BASE D54D8D64572D lea r28, ptr [r15+rdx*2+0x2d] +XDIS 2a1e0: MISC BASE D55C8D64502E lea r28, ptr [r16+rdx*2+0x2e] +XDIS 2a1e6: MISC BASE D55C8D64512F lea r28, ptr [r17+rdx*2+0x2f] +XDIS 2a1ec: MISC BASE D55C8D645230 lea r28, ptr [r18+rdx*2+0x30] +XDIS 2a1f2: MISC BASE D55C8D645331 lea r28, ptr [r19+rdx*2+0x31] +XDIS 2a1f8: MISC BASE D55C8D645432 lea r28, ptr [r20+rdx*2+0x32] +XDIS 2a1fe: MISC BASE D55C8D645533 lea r28, ptr [r21+rdx*2+0x33] +XDIS 2a204: MISC BASE D55C8D645634 lea r28, ptr [r22+rdx*2+0x34] +XDIS 2a20a: MISC BASE D55C8D645735 lea r28, ptr [r23+rdx*2+0x35] +XDIS 2a210: MISC BASE D55D8D645036 lea r28, ptr [r24+rdx*2+0x36] +XDIS 2a216: MISC BASE D55D8D645137 lea r28, ptr [r25+rdx*2+0x37] +XDIS 2a21c: MISC BASE D55D8D645238 lea r28, ptr [r26+rdx*2+0x38] +XDIS 2a222: MISC BASE D55D8D645339 lea r28, ptr [r27+rdx*2+0x39] +XDIS 2a228: MISC BASE D55D8D64543A lea r28, ptr [r28+rdx*2+0x3a] +XDIS 2a22e: MISC BASE D55D8D64553B lea r28, ptr [r29+rdx*2+0x3b] +XDIS 2a234: MISC BASE D55D8D64563C lea r28, ptr [r30+rdx*2+0x3c] +XDIS 2a23a: MISC BASE D55D8D64573D lea r28, ptr [r31+rdx*2+0x3d] +XDIS 2a240: MISC BASE D54C8D64581F lea r28, ptr [rax+rbx*2+0x1f] +XDIS 2a246: MISC BASE D54C8D645920 lea r28, ptr [rcx+rbx*2+0x20] +XDIS 2a24c: MISC BASE D54C8D645A21 lea r28, ptr [rdx+rbx*2+0x21] +XDIS 2a252: MISC BASE D54C8D645B22 lea r28, ptr [rbx+rbx*2+0x22] +XDIS 2a258: MISC BASE D54C8D645C23 lea r28, ptr [rsp+rbx*2+0x23] +XDIS 2a25e: MISC BASE D54C8D645D24 lea r28, ptr [rbp+rbx*2+0x24] +XDIS 2a264: MISC BASE D54C8D645E25 lea r28, ptr [rsi+rbx*2+0x25] +XDIS 2a26a: MISC BASE D54C8D645F26 lea r28, ptr [rdi+rbx*2+0x26] +XDIS 2a270: MISC BASE D54D8D645827 lea r28, ptr [r8+rbx*2+0x27] +XDIS 2a276: MISC BASE D54D8D645928 lea r28, ptr [r9+rbx*2+0x28] +XDIS 2a27c: MISC BASE D54D8D645A29 lea r28, ptr [r10+rbx*2+0x29] +XDIS 2a282: MISC BASE D54D8D645B2A lea r28, ptr [r11+rbx*2+0x2a] +XDIS 2a288: MISC BASE D54D8D645C2B lea r28, ptr [r12+rbx*2+0x2b] +XDIS 2a28e: MISC BASE D54D8D645D2C lea r28, ptr [r13+rbx*2+0x2c] +XDIS 2a294: MISC BASE D54D8D645E2D lea r28, ptr [r14+rbx*2+0x2d] +XDIS 2a29a: MISC BASE D54D8D645F2E lea r28, ptr [r15+rbx*2+0x2e] +XDIS 2a2a0: MISC BASE D55C8D64582F lea r28, ptr [r16+rbx*2+0x2f] +XDIS 2a2a6: MISC BASE D55C8D645930 lea r28, ptr [r17+rbx*2+0x30] +XDIS 2a2ac: MISC BASE D55C8D645A31 lea r28, ptr [r18+rbx*2+0x31] +XDIS 2a2b2: MISC BASE D55C8D645B32 lea r28, ptr [r19+rbx*2+0x32] +XDIS 2a2b8: MISC BASE D55C8D645C33 lea r28, ptr [r20+rbx*2+0x33] +XDIS 2a2be: MISC BASE D55C8D645D34 lea r28, ptr [r21+rbx*2+0x34] +XDIS 2a2c4: MISC BASE D55C8D645E35 lea r28, ptr [r22+rbx*2+0x35] +XDIS 2a2ca: MISC BASE D55C8D645F36 lea r28, ptr [r23+rbx*2+0x36] +XDIS 2a2d0: MISC BASE D55D8D645837 lea r28, ptr [r24+rbx*2+0x37] +XDIS 2a2d6: MISC BASE D55D8D645938 lea r28, ptr [r25+rbx*2+0x38] +XDIS 2a2dc: MISC BASE D55D8D645A39 lea r28, ptr [r26+rbx*2+0x39] +XDIS 2a2e2: MISC BASE D55D8D645B3A lea r28, ptr [r27+rbx*2+0x3a] +XDIS 2a2e8: MISC BASE D55D8D645C3B lea r28, ptr [r28+rbx*2+0x3b] +XDIS 2a2ee: MISC BASE D55D8D645D3C lea r28, ptr [r29+rbx*2+0x3c] +XDIS 2a2f4: MISC BASE D55D8D645E3D lea r28, ptr [r30+rbx*2+0x3d] +XDIS 2a2fa: MISC BASE D55D8D645F3E lea r28, ptr [r31+rbx*2+0x3e] +XDIS 2a300: MISC BASE D54C8D646020 lea r28, ptr [rax+0x20] +XDIS 2a306: MISC BASE D54C8D646121 lea r28, ptr [rcx+0x21] +XDIS 2a30c: MISC BASE D54C8D646222 lea r28, ptr [rdx+0x22] +XDIS 2a312: MISC BASE D54C8D646323 lea r28, ptr [rbx+0x23] +XDIS 2a318: MISC BASE D54C8D646424 lea r28, ptr [rsp+0x24] +XDIS 2a31e: MISC BASE D54C8D646525 lea r28, ptr [rbp+0x25] +XDIS 2a324: MISC BASE D54C8D646626 lea r28, ptr [rsi+0x26] +XDIS 2a32a: MISC BASE D54C8D646727 lea r28, ptr [rdi+0x27] +XDIS 2a330: MISC BASE D54D8D646028 lea r28, ptr [r8+0x28] +XDIS 2a336: MISC BASE D54D8D646129 lea r28, ptr [r9+0x29] +XDIS 2a33c: MISC BASE D54D8D64622A lea r28, ptr [r10+0x2a] +XDIS 2a342: MISC BASE D54D8D64632B lea r28, ptr [r11+0x2b] +XDIS 2a348: MISC BASE D54D8D64642C lea r28, ptr [r12+0x2c] +XDIS 2a34e: MISC BASE D54D8D64652D lea r28, ptr [r13+0x2d] +XDIS 2a354: MISC BASE D54D8D64662E lea r28, ptr [r14+0x2e] +XDIS 2a35a: MISC BASE D54D8D64672F lea r28, ptr [r15+0x2f] +XDIS 2a360: MISC BASE D55C8D646030 lea r28, ptr [r16+0x30] +XDIS 2a366: MISC BASE D55C8D646131 lea r28, ptr [r17+0x31] +XDIS 2a36c: MISC BASE D55C8D646232 lea r28, ptr [r18+0x32] +XDIS 2a372: MISC BASE D55C8D646333 lea r28, ptr [r19+0x33] +XDIS 2a378: MISC BASE D55C8D646434 lea r28, ptr [r20+0x34] +XDIS 2a37e: MISC BASE D55C8D646535 lea r28, ptr [r21+0x35] +XDIS 2a384: MISC BASE D55C8D646636 lea r28, ptr [r22+0x36] +XDIS 2a38a: MISC BASE D55C8D646737 lea r28, ptr [r23+0x37] +XDIS 2a390: MISC BASE D55D8D646038 lea r28, ptr [r24+0x38] +XDIS 2a396: MISC BASE D55D8D646139 lea r28, ptr [r25+0x39] +XDIS 2a39c: MISC BASE D55D8D64623A lea r28, ptr [r26+0x3a] +XDIS 2a3a2: MISC BASE D55D8D64633B lea r28, ptr [r27+0x3b] +XDIS 2a3a8: MISC BASE D55D8D64643C lea r28, ptr [r28+0x3c] +XDIS 2a3ae: MISC BASE D55D8D64653D lea r28, ptr [r29+0x3d] +XDIS 2a3b4: MISC BASE D55D8D64663E lea r28, ptr [r30+0x3e] +XDIS 2a3ba: MISC BASE D55D8D64673F lea r28, ptr [r31+0x3f] +XDIS 2a3c0: MISC BASE D54C8D646821 lea r28, ptr [rax+rbp*2+0x21] +XDIS 2a3c6: MISC BASE D54C8D646922 lea r28, ptr [rcx+rbp*2+0x22] +XDIS 2a3cc: MISC BASE D54C8D646A23 lea r28, ptr [rdx+rbp*2+0x23] +XDIS 2a3d2: MISC BASE D54C8D646B24 lea r28, ptr [rbx+rbp*2+0x24] +XDIS 2a3d8: MISC BASE D54C8D646C25 lea r28, ptr [rsp+rbp*2+0x25] +XDIS 2a3de: MISC BASE D54C8D646D26 lea r28, ptr [rbp+rbp*2+0x26] +XDIS 2a3e4: MISC BASE D54C8D646E27 lea r28, ptr [rsi+rbp*2+0x27] +XDIS 2a3ea: MISC BASE D54C8D646F28 lea r28, ptr [rdi+rbp*2+0x28] +XDIS 2a3f0: MISC BASE D54D8D646829 lea r28, ptr [r8+rbp*2+0x29] +XDIS 2a3f6: MISC BASE D54D8D64692A lea r28, ptr [r9+rbp*2+0x2a] +XDIS 2a3fc: MISC BASE D54D8D646A2B lea r28, ptr [r10+rbp*2+0x2b] +XDIS 2a402: MISC BASE D54D8D646B2C lea r28, ptr [r11+rbp*2+0x2c] +XDIS 2a408: MISC BASE D54D8D646C2D lea r28, ptr [r12+rbp*2+0x2d] +XDIS 2a40e: MISC BASE D54D8D646D2E lea r28, ptr [r13+rbp*2+0x2e] +XDIS 2a414: MISC BASE D54D8D646E2F lea r28, ptr [r14+rbp*2+0x2f] +XDIS 2a41a: MISC BASE D54D8D646F30 lea r28, ptr [r15+rbp*2+0x30] +XDIS 2a420: MISC BASE D55C8D646831 lea r28, ptr [r16+rbp*2+0x31] +XDIS 2a426: MISC BASE D55C8D646932 lea r28, ptr [r17+rbp*2+0x32] +XDIS 2a42c: MISC BASE D55C8D646A33 lea r28, ptr [r18+rbp*2+0x33] +XDIS 2a432: MISC BASE D55C8D646B34 lea r28, ptr [r19+rbp*2+0x34] +XDIS 2a438: MISC BASE D55C8D646C35 lea r28, ptr [r20+rbp*2+0x35] +XDIS 2a43e: MISC BASE D55C8D646D36 lea r28, ptr [r21+rbp*2+0x36] +XDIS 2a444: MISC BASE D55C8D646E37 lea r28, ptr [r22+rbp*2+0x37] +XDIS 2a44a: MISC BASE D55C8D646F38 lea r28, ptr [r23+rbp*2+0x38] +XDIS 2a450: MISC BASE D55D8D646839 lea r28, ptr [r24+rbp*2+0x39] +XDIS 2a456: MISC BASE D55D8D64693A lea r28, ptr [r25+rbp*2+0x3a] +XDIS 2a45c: MISC BASE D55D8D646A3B lea r28, ptr [r26+rbp*2+0x3b] +XDIS 2a462: MISC BASE D55D8D646B3C lea r28, ptr [r27+rbp*2+0x3c] +XDIS 2a468: MISC BASE D55D8D646C3D lea r28, ptr [r28+rbp*2+0x3d] +XDIS 2a46e: MISC BASE D55D8D646D3E lea r28, ptr [r29+rbp*2+0x3e] +XDIS 2a474: MISC BASE D55D8D646E3F lea r28, ptr [r30+rbp*2+0x3f] +XDIS 2a47a: MISC BASE D55D8D646F40 lea r28, ptr [r31+rbp*2+0x40] +XDIS 2a480: MISC BASE D54C8D647022 lea r28, ptr [rax+rsi*2+0x22] +XDIS 2a486: MISC BASE D54C8D647123 lea r28, ptr [rcx+rsi*2+0x23] +XDIS 2a48c: MISC BASE D54C8D647224 lea r28, ptr [rdx+rsi*2+0x24] +XDIS 2a492: MISC BASE D54C8D647325 lea r28, ptr [rbx+rsi*2+0x25] +XDIS 2a498: MISC BASE D54C8D647426 lea r28, ptr [rsp+rsi*2+0x26] +XDIS 2a49e: MISC BASE D54C8D647527 lea r28, ptr [rbp+rsi*2+0x27] +XDIS 2a4a4: MISC BASE D54C8D647628 lea r28, ptr [rsi+rsi*2+0x28] +XDIS 2a4aa: MISC BASE D54C8D647729 lea r28, ptr [rdi+rsi*2+0x29] +XDIS 2a4b0: MISC BASE D54D8D64702A lea r28, ptr [r8+rsi*2+0x2a] +XDIS 2a4b6: MISC BASE D54D8D64712B lea r28, ptr [r9+rsi*2+0x2b] +XDIS 2a4bc: MISC BASE D54D8D64722C lea r28, ptr [r10+rsi*2+0x2c] +XDIS 2a4c2: MISC BASE D54D8D64732D lea r28, ptr [r11+rsi*2+0x2d] +XDIS 2a4c8: MISC BASE D54D8D64742E lea r28, ptr [r12+rsi*2+0x2e] +XDIS 2a4ce: MISC BASE D54D8D64752F lea r28, ptr [r13+rsi*2+0x2f] +XDIS 2a4d4: MISC BASE D54D8D647630 lea r28, ptr [r14+rsi*2+0x30] +XDIS 2a4da: MISC BASE D54D8D647731 lea r28, ptr [r15+rsi*2+0x31] +XDIS 2a4e0: MISC BASE D55C8D647032 lea r28, ptr [r16+rsi*2+0x32] +XDIS 2a4e6: MISC BASE D55C8D647133 lea r28, ptr [r17+rsi*2+0x33] +XDIS 2a4ec: MISC BASE D55C8D647234 lea r28, ptr [r18+rsi*2+0x34] +XDIS 2a4f2: MISC BASE D55C8D647335 lea r28, ptr [r19+rsi*2+0x35] +XDIS 2a4f8: MISC BASE D55C8D647436 lea r28, ptr [r20+rsi*2+0x36] +XDIS 2a4fe: MISC BASE D55C8D647537 lea r28, ptr [r21+rsi*2+0x37] +XDIS 2a504: MISC BASE D55C8D647638 lea r28, ptr [r22+rsi*2+0x38] +XDIS 2a50a: MISC BASE D55C8D647739 lea r28, ptr [r23+rsi*2+0x39] +XDIS 2a510: MISC BASE D55D8D64703A lea r28, ptr [r24+rsi*2+0x3a] +XDIS 2a516: MISC BASE D55D8D64713B lea r28, ptr [r25+rsi*2+0x3b] +XDIS 2a51c: MISC BASE D55D8D64723C lea r28, ptr [r26+rsi*2+0x3c] +XDIS 2a522: MISC BASE D55D8D64733D lea r28, ptr [r27+rsi*2+0x3d] +XDIS 2a528: MISC BASE D55D8D64743E lea r28, ptr [r28+rsi*2+0x3e] +XDIS 2a52e: MISC BASE D55D8D64753F lea r28, ptr [r29+rsi*2+0x3f] +XDIS 2a534: MISC BASE D55D8D647640 lea r28, ptr [r30+rsi*2+0x40] +XDIS 2a53a: MISC BASE D55D8D647741 lea r28, ptr [r31+rsi*2+0x41] +XDIS 2a540: MISC BASE D54C8D647823 lea r28, ptr [rax+rdi*2+0x23] +XDIS 2a546: MISC BASE D54C8D647924 lea r28, ptr [rcx+rdi*2+0x24] +XDIS 2a54c: MISC BASE D54C8D647A25 lea r28, ptr [rdx+rdi*2+0x25] +XDIS 2a552: MISC BASE D54C8D647B26 lea r28, ptr [rbx+rdi*2+0x26] +XDIS 2a558: MISC BASE D54C8D647C27 lea r28, ptr [rsp+rdi*2+0x27] +XDIS 2a55e: MISC BASE D54C8D647D28 lea r28, ptr [rbp+rdi*2+0x28] +XDIS 2a564: MISC BASE D54C8D647E29 lea r28, ptr [rsi+rdi*2+0x29] +XDIS 2a56a: MISC BASE D54C8D647F2A lea r28, ptr [rdi+rdi*2+0x2a] +XDIS 2a570: MISC BASE D54D8D64782B lea r28, ptr [r8+rdi*2+0x2b] +XDIS 2a576: MISC BASE D54D8D64792C lea r28, ptr [r9+rdi*2+0x2c] +XDIS 2a57c: MISC BASE D54D8D647A2D lea r28, ptr [r10+rdi*2+0x2d] +XDIS 2a582: MISC BASE D54D8D647B2E lea r28, ptr [r11+rdi*2+0x2e] +XDIS 2a588: MISC BASE D54D8D647C2F lea r28, ptr [r12+rdi*2+0x2f] +XDIS 2a58e: MISC BASE D54D8D647D30 lea r28, ptr [r13+rdi*2+0x30] +XDIS 2a594: MISC BASE D54D8D647E31 lea r28, ptr [r14+rdi*2+0x31] +XDIS 2a59a: MISC BASE D54D8D647F32 lea r28, ptr [r15+rdi*2+0x32] +XDIS 2a5a0: MISC BASE D55C8D647833 lea r28, ptr [r16+rdi*2+0x33] +XDIS 2a5a6: MISC BASE D55C8D647934 lea r28, ptr [r17+rdi*2+0x34] +XDIS 2a5ac: MISC BASE D55C8D647A35 lea r28, ptr [r18+rdi*2+0x35] +XDIS 2a5b2: MISC BASE D55C8D647B36 lea r28, ptr [r19+rdi*2+0x36] +XDIS 2a5b8: MISC BASE D55C8D647C37 lea r28, ptr [r20+rdi*2+0x37] +XDIS 2a5be: MISC BASE D55C8D647D38 lea r28, ptr [r21+rdi*2+0x38] +XDIS 2a5c4: MISC BASE D55C8D647E39 lea r28, ptr [r22+rdi*2+0x39] +XDIS 2a5ca: MISC BASE D55C8D647F3A lea r28, ptr [r23+rdi*2+0x3a] +XDIS 2a5d0: MISC BASE D55D8D64783B lea r28, ptr [r24+rdi*2+0x3b] +XDIS 2a5d6: MISC BASE D55D8D64793C lea r28, ptr [r25+rdi*2+0x3c] +XDIS 2a5dc: MISC BASE D55D8D647A3D lea r28, ptr [r26+rdi*2+0x3d] +XDIS 2a5e2: MISC BASE D55D8D647B3E lea r28, ptr [r27+rdi*2+0x3e] +XDIS 2a5e8: MISC BASE D55D8D647C3F lea r28, ptr [r28+rdi*2+0x3f] +XDIS 2a5ee: MISC BASE D55D8D647D40 lea r28, ptr [r29+rdi*2+0x40] +XDIS 2a5f4: MISC BASE D55D8D647E41 lea r28, ptr [r30+rdi*2+0x41] +XDIS 2a5fa: MISC BASE D55D8D647F42 lea r28, ptr [r31+rdi*2+0x42] +XDIS 2a600: MISC BASE D54E8D644024 lea r28, ptr [rax+r8*2+0x24] +XDIS 2a606: MISC BASE D54E8D644125 lea r28, ptr [rcx+r8*2+0x25] +XDIS 2a60c: MISC BASE D54E8D644226 lea r28, ptr [rdx+r8*2+0x26] +XDIS 2a612: MISC BASE D54E8D644327 lea r28, ptr [rbx+r8*2+0x27] +XDIS 2a618: MISC BASE D54E8D644428 lea r28, ptr [rsp+r8*2+0x28] +XDIS 2a61e: MISC BASE D54E8D644529 lea r28, ptr [rbp+r8*2+0x29] +XDIS 2a624: MISC BASE D54E8D64462A lea r28, ptr [rsi+r8*2+0x2a] +XDIS 2a62a: MISC BASE D54E8D64472B lea r28, ptr [rdi+r8*2+0x2b] +XDIS 2a630: MISC BASE D54F8D64402C lea r28, ptr [r8+r8*2+0x2c] +XDIS 2a636: MISC BASE D54F8D64412D lea r28, ptr [r9+r8*2+0x2d] +XDIS 2a63c: MISC BASE D54F8D64422E lea r28, ptr [r10+r8*2+0x2e] +XDIS 2a642: MISC BASE D54F8D64432F lea r28, ptr [r11+r8*2+0x2f] +XDIS 2a648: MISC BASE D54F8D644430 lea r28, ptr [r12+r8*2+0x30] +XDIS 2a64e: MISC BASE D54F8D644531 lea r28, ptr [r13+r8*2+0x31] +XDIS 2a654: MISC BASE D54F8D644632 lea r28, ptr [r14+r8*2+0x32] +XDIS 2a65a: MISC BASE D54F8D644733 lea r28, ptr [r15+r8*2+0x33] +XDIS 2a660: MISC BASE D55E8D644034 lea r28, ptr [r16+r8*2+0x34] +XDIS 2a666: MISC BASE D55E8D644135 lea r28, ptr [r17+r8*2+0x35] +XDIS 2a66c: MISC BASE D55E8D644236 lea r28, ptr [r18+r8*2+0x36] +XDIS 2a672: MISC BASE D55E8D644337 lea r28, ptr [r19+r8*2+0x37] +XDIS 2a678: MISC BASE D55E8D644438 lea r28, ptr [r20+r8*2+0x38] +XDIS 2a67e: MISC BASE D55E8D644539 lea r28, ptr [r21+r8*2+0x39] +XDIS 2a684: MISC BASE D55E8D64463A lea r28, ptr [r22+r8*2+0x3a] +XDIS 2a68a: MISC BASE D55E8D64473B lea r28, ptr [r23+r8*2+0x3b] +XDIS 2a690: MISC BASE D55F8D64403C lea r28, ptr [r24+r8*2+0x3c] +XDIS 2a696: MISC BASE D55F8D64413D lea r28, ptr [r25+r8*2+0x3d] +XDIS 2a69c: MISC BASE D55F8D64423E lea r28, ptr [r26+r8*2+0x3e] +XDIS 2a6a2: MISC BASE D55F8D64433F lea r28, ptr [r27+r8*2+0x3f] +XDIS 2a6a8: MISC BASE D55F8D644440 lea r28, ptr [r28+r8*2+0x40] +XDIS 2a6ae: MISC BASE D55F8D644541 lea r28, ptr [r29+r8*2+0x41] +XDIS 2a6b4: MISC BASE D55F8D644642 lea r28, ptr [r30+r8*2+0x42] +XDIS 2a6ba: MISC BASE D55F8D644743 lea r28, ptr [r31+r8*2+0x43] +XDIS 2a6c0: MISC BASE D54E8D644825 lea r28, ptr [rax+r9*2+0x25] +XDIS 2a6c6: MISC BASE D54E8D644926 lea r28, ptr [rcx+r9*2+0x26] +XDIS 2a6cc: MISC BASE D54E8D644A27 lea r28, ptr [rdx+r9*2+0x27] +XDIS 2a6d2: MISC BASE D54E8D644B28 lea r28, ptr [rbx+r9*2+0x28] +XDIS 2a6d8: MISC BASE D54E8D644C29 lea r28, ptr [rsp+r9*2+0x29] +XDIS 2a6de: MISC BASE D54E8D644D2A lea r28, ptr [rbp+r9*2+0x2a] +XDIS 2a6e4: MISC BASE D54E8D644E2B lea r28, ptr [rsi+r9*2+0x2b] +XDIS 2a6ea: MISC BASE D54E8D644F2C lea r28, ptr [rdi+r9*2+0x2c] +XDIS 2a6f0: MISC BASE D54F8D64482D lea r28, ptr [r8+r9*2+0x2d] +XDIS 2a6f6: MISC BASE D54F8D64492E lea r28, ptr [r9+r9*2+0x2e] +XDIS 2a6fc: MISC BASE D54F8D644A2F lea r28, ptr [r10+r9*2+0x2f] +XDIS 2a702: MISC BASE D54F8D644B30 lea r28, ptr [r11+r9*2+0x30] +XDIS 2a708: MISC BASE D54F8D644C31 lea r28, ptr [r12+r9*2+0x31] +XDIS 2a70e: MISC BASE D54F8D644D32 lea r28, ptr [r13+r9*2+0x32] +XDIS 2a714: MISC BASE D54F8D644E33 lea r28, ptr [r14+r9*2+0x33] +XDIS 2a71a: MISC BASE D54F8D644F34 lea r28, ptr [r15+r9*2+0x34] +XDIS 2a720: MISC BASE D55E8D644835 lea r28, ptr [r16+r9*2+0x35] +XDIS 2a726: MISC BASE D55E8D644936 lea r28, ptr [r17+r9*2+0x36] +XDIS 2a72c: MISC BASE D55E8D644A37 lea r28, ptr [r18+r9*2+0x37] +XDIS 2a732: MISC BASE D55E8D644B38 lea r28, ptr [r19+r9*2+0x38] +XDIS 2a738: MISC BASE D55E8D644C39 lea r28, ptr [r20+r9*2+0x39] +XDIS 2a73e: MISC BASE D55E8D644D3A lea r28, ptr [r21+r9*2+0x3a] +XDIS 2a744: MISC BASE D55E8D644E3B lea r28, ptr [r22+r9*2+0x3b] +XDIS 2a74a: MISC BASE D55E8D644F3C lea r28, ptr [r23+r9*2+0x3c] +XDIS 2a750: MISC BASE D55F8D64483D lea r28, ptr [r24+r9*2+0x3d] +XDIS 2a756: MISC BASE D55F8D64493E lea r28, ptr [r25+r9*2+0x3e] +XDIS 2a75c: MISC BASE D55F8D644A3F lea r28, ptr [r26+r9*2+0x3f] +XDIS 2a762: MISC BASE D55F8D644B40 lea r28, ptr [r27+r9*2+0x40] +XDIS 2a768: MISC BASE D55F8D644C41 lea r28, ptr [r28+r9*2+0x41] +XDIS 2a76e: MISC BASE D55F8D644D42 lea r28, ptr [r29+r9*2+0x42] +XDIS 2a774: MISC BASE D55F8D644E43 lea r28, ptr [r30+r9*2+0x43] +XDIS 2a77a: MISC BASE D55F8D644F44 lea r28, ptr [r31+r9*2+0x44] +XDIS 2a780: MISC BASE D54E8D645026 lea r28, ptr [rax+r10*2+0x26] +XDIS 2a786: MISC BASE D54E8D645127 lea r28, ptr [rcx+r10*2+0x27] +XDIS 2a78c: MISC BASE D54E8D645228 lea r28, ptr [rdx+r10*2+0x28] +XDIS 2a792: MISC BASE D54E8D645329 lea r28, ptr [rbx+r10*2+0x29] +XDIS 2a798: MISC BASE D54E8D64542A lea r28, ptr [rsp+r10*2+0x2a] +XDIS 2a79e: MISC BASE D54E8D64552B lea r28, ptr [rbp+r10*2+0x2b] +XDIS 2a7a4: MISC BASE D54E8D64562C lea r28, ptr [rsi+r10*2+0x2c] +XDIS 2a7aa: MISC BASE D54E8D64572D lea r28, ptr [rdi+r10*2+0x2d] +XDIS 2a7b0: MISC BASE D54F8D64502E lea r28, ptr [r8+r10*2+0x2e] +XDIS 2a7b6: MISC BASE D54F8D64512F lea r28, ptr [r9+r10*2+0x2f] +XDIS 2a7bc: MISC BASE D54F8D645230 lea r28, ptr [r10+r10*2+0x30] +XDIS 2a7c2: MISC BASE D54F8D645331 lea r28, ptr [r11+r10*2+0x31] +XDIS 2a7c8: MISC BASE D54F8D645432 lea r28, ptr [r12+r10*2+0x32] +XDIS 2a7ce: MISC BASE D54F8D645533 lea r28, ptr [r13+r10*2+0x33] +XDIS 2a7d4: MISC BASE D54F8D645634 lea r28, ptr [r14+r10*2+0x34] +XDIS 2a7da: MISC BASE D54F8D645735 lea r28, ptr [r15+r10*2+0x35] +XDIS 2a7e0: MISC BASE D55E8D645036 lea r28, ptr [r16+r10*2+0x36] +XDIS 2a7e6: MISC BASE D55E8D645137 lea r28, ptr [r17+r10*2+0x37] +XDIS 2a7ec: MISC BASE D55E8D645238 lea r28, ptr [r18+r10*2+0x38] +XDIS 2a7f2: MISC BASE D55E8D645339 lea r28, ptr [r19+r10*2+0x39] +XDIS 2a7f8: MISC BASE D55E8D64543A lea r28, ptr [r20+r10*2+0x3a] +XDIS 2a7fe: MISC BASE D55E8D64553B lea r28, ptr [r21+r10*2+0x3b] +XDIS 2a804: MISC BASE D55E8D64563C lea r28, ptr [r22+r10*2+0x3c] +XDIS 2a80a: MISC BASE D55E8D64573D lea r28, ptr [r23+r10*2+0x3d] +XDIS 2a810: MISC BASE D55F8D64503E lea r28, ptr [r24+r10*2+0x3e] +XDIS 2a816: MISC BASE D55F8D64513F lea r28, ptr [r25+r10*2+0x3f] +XDIS 2a81c: MISC BASE D55F8D645240 lea r28, ptr [r26+r10*2+0x40] +XDIS 2a822: MISC BASE D55F8D645341 lea r28, ptr [r27+r10*2+0x41] +XDIS 2a828: MISC BASE D55F8D645442 lea r28, ptr [r28+r10*2+0x42] +XDIS 2a82e: MISC BASE D55F8D645543 lea r28, ptr [r29+r10*2+0x43] +XDIS 2a834: MISC BASE D55F8D645644 lea r28, ptr [r30+r10*2+0x44] +XDIS 2a83a: MISC BASE D55F8D645745 lea r28, ptr [r31+r10*2+0x45] +XDIS 2a840: MISC BASE D54E8D645827 lea r28, ptr [rax+r11*2+0x27] +XDIS 2a846: MISC BASE D54E8D645928 lea r28, ptr [rcx+r11*2+0x28] +XDIS 2a84c: MISC BASE D54E8D645A29 lea r28, ptr [rdx+r11*2+0x29] +XDIS 2a852: MISC BASE D54E8D645B2A lea r28, ptr [rbx+r11*2+0x2a] +XDIS 2a858: MISC BASE D54E8D645C2B lea r28, ptr [rsp+r11*2+0x2b] +XDIS 2a85e: MISC BASE D54E8D645D2C lea r28, ptr [rbp+r11*2+0x2c] +XDIS 2a864: MISC BASE D54E8D645E2D lea r28, ptr [rsi+r11*2+0x2d] +XDIS 2a86a: MISC BASE D54E8D645F2E lea r28, ptr [rdi+r11*2+0x2e] +XDIS 2a870: MISC BASE D54F8D64582F lea r28, ptr [r8+r11*2+0x2f] +XDIS 2a876: MISC BASE D54F8D645930 lea r28, ptr [r9+r11*2+0x30] +XDIS 2a87c: MISC BASE D54F8D645A31 lea r28, ptr [r10+r11*2+0x31] +XDIS 2a882: MISC BASE D54F8D645B32 lea r28, ptr [r11+r11*2+0x32] +XDIS 2a888: MISC BASE D54F8D645C33 lea r28, ptr [r12+r11*2+0x33] +XDIS 2a88e: MISC BASE D54F8D645D34 lea r28, ptr [r13+r11*2+0x34] +XDIS 2a894: MISC BASE D54F8D645E35 lea r28, ptr [r14+r11*2+0x35] +XDIS 2a89a: MISC BASE D54F8D645F36 lea r28, ptr [r15+r11*2+0x36] +XDIS 2a8a0: MISC BASE D55E8D645837 lea r28, ptr [r16+r11*2+0x37] +XDIS 2a8a6: MISC BASE D55E8D645938 lea r28, ptr [r17+r11*2+0x38] +XDIS 2a8ac: MISC BASE D55E8D645A39 lea r28, ptr [r18+r11*2+0x39] +XDIS 2a8b2: MISC BASE D55E8D645B3A lea r28, ptr [r19+r11*2+0x3a] +XDIS 2a8b8: MISC BASE D55E8D645C3B lea r28, ptr [r20+r11*2+0x3b] +XDIS 2a8be: MISC BASE D55E8D645D3C lea r28, ptr [r21+r11*2+0x3c] +XDIS 2a8c4: MISC BASE D55E8D645E3D lea r28, ptr [r22+r11*2+0x3d] +XDIS 2a8ca: MISC BASE D55E8D645F3E lea r28, ptr [r23+r11*2+0x3e] +XDIS 2a8d0: MISC BASE D55F8D64583F lea r28, ptr [r24+r11*2+0x3f] +XDIS 2a8d6: MISC BASE D55F8D645940 lea r28, ptr [r25+r11*2+0x40] +XDIS 2a8dc: MISC BASE D55F8D645A41 lea r28, ptr [r26+r11*2+0x41] +XDIS 2a8e2: MISC BASE D55F8D645B42 lea r28, ptr [r27+r11*2+0x42] +XDIS 2a8e8: MISC BASE D55F8D645C43 lea r28, ptr [r28+r11*2+0x43] +XDIS 2a8ee: MISC BASE D55F8D645D44 lea r28, ptr [r29+r11*2+0x44] +XDIS 2a8f4: MISC BASE D55F8D645E45 lea r28, ptr [r30+r11*2+0x45] +XDIS 2a8fa: MISC BASE D55F8D645F46 lea r28, ptr [r31+r11*2+0x46] +XDIS 2a900: MISC BASE D54E8D646028 lea r28, ptr [rax+r12*2+0x28] +XDIS 2a906: MISC BASE D54E8D646129 lea r28, ptr [rcx+r12*2+0x29] +XDIS 2a90c: MISC BASE D54E8D64622A lea r28, ptr [rdx+r12*2+0x2a] +XDIS 2a912: MISC BASE D54E8D64632B lea r28, ptr [rbx+r12*2+0x2b] +XDIS 2a918: MISC BASE D54E8D64642C lea r28, ptr [rsp+r12*2+0x2c] +XDIS 2a91e: MISC BASE D54E8D64652D lea r28, ptr [rbp+r12*2+0x2d] +XDIS 2a924: MISC BASE D54E8D64662E lea r28, ptr [rsi+r12*2+0x2e] +XDIS 2a92a: MISC BASE D54E8D64672F lea r28, ptr [rdi+r12*2+0x2f] +XDIS 2a930: MISC BASE D54F8D646030 lea r28, ptr [r8+r12*2+0x30] +XDIS 2a936: MISC BASE D54F8D646131 lea r28, ptr [r9+r12*2+0x31] +XDIS 2a93c: MISC BASE D54F8D646232 lea r28, ptr [r10+r12*2+0x32] +XDIS 2a942: MISC BASE D54F8D646333 lea r28, ptr [r11+r12*2+0x33] +XDIS 2a948: MISC BASE D54F8D646434 lea r28, ptr [r12+r12*2+0x34] +XDIS 2a94e: MISC BASE D54F8D646535 lea r28, ptr [r13+r12*2+0x35] +XDIS 2a954: MISC BASE D54F8D646636 lea r28, ptr [r14+r12*2+0x36] +XDIS 2a95a: MISC BASE D54F8D646737 lea r28, ptr [r15+r12*2+0x37] +XDIS 2a960: MISC BASE D55E8D646038 lea r28, ptr [r16+r12*2+0x38] +XDIS 2a966: MISC BASE D55E8D646139 lea r28, ptr [r17+r12*2+0x39] +XDIS 2a96c: MISC BASE D55E8D64623A lea r28, ptr [r18+r12*2+0x3a] +XDIS 2a972: MISC BASE D55E8D64633B lea r28, ptr [r19+r12*2+0x3b] +XDIS 2a978: MISC BASE D55E8D64643C lea r28, ptr [r20+r12*2+0x3c] +XDIS 2a97e: MISC BASE D55E8D64653D lea r28, ptr [r21+r12*2+0x3d] +XDIS 2a984: MISC BASE D55E8D64663E lea r28, ptr [r22+r12*2+0x3e] +XDIS 2a98a: MISC BASE D55E8D64673F lea r28, ptr [r23+r12*2+0x3f] +XDIS 2a990: MISC BASE D55F8D646040 lea r28, ptr [r24+r12*2+0x40] +XDIS 2a996: MISC BASE D55F8D646141 lea r28, ptr [r25+r12*2+0x41] +XDIS 2a99c: MISC BASE D55F8D646242 lea r28, ptr [r26+r12*2+0x42] +XDIS 2a9a2: MISC BASE D55F8D646343 lea r28, ptr [r27+r12*2+0x43] +XDIS 2a9a8: MISC BASE D55F8D646444 lea r28, ptr [r28+r12*2+0x44] +XDIS 2a9ae: MISC BASE D55F8D646545 lea r28, ptr [r29+r12*2+0x45] +XDIS 2a9b4: MISC BASE D55F8D646646 lea r28, ptr [r30+r12*2+0x46] +XDIS 2a9ba: MISC BASE D55F8D646747 lea r28, ptr [r31+r12*2+0x47] +XDIS 2a9c0: MISC BASE D54E8D646829 lea r28, ptr [rax+r13*2+0x29] +XDIS 2a9c6: MISC BASE D54E8D64692A lea r28, ptr [rcx+r13*2+0x2a] +XDIS 2a9cc: MISC BASE D54E8D646A2B lea r28, ptr [rdx+r13*2+0x2b] +XDIS 2a9d2: MISC BASE D54E8D646B2C lea r28, ptr [rbx+r13*2+0x2c] +XDIS 2a9d8: MISC BASE D54E8D646C2D lea r28, ptr [rsp+r13*2+0x2d] +XDIS 2a9de: MISC BASE D54E8D646D2E lea r28, ptr [rbp+r13*2+0x2e] +XDIS 2a9e4: MISC BASE D54E8D646E2F lea r28, ptr [rsi+r13*2+0x2f] +XDIS 2a9ea: MISC BASE D54E8D646F30 lea r28, ptr [rdi+r13*2+0x30] +XDIS 2a9f0: MISC BASE D54F8D646831 lea r28, ptr [r8+r13*2+0x31] +XDIS 2a9f6: MISC BASE D54F8D646932 lea r28, ptr [r9+r13*2+0x32] +XDIS 2a9fc: MISC BASE D54F8D646A33 lea r28, ptr [r10+r13*2+0x33] +XDIS 2aa02: MISC BASE D54F8D646B34 lea r28, ptr [r11+r13*2+0x34] +XDIS 2aa08: MISC BASE D54F8D646C35 lea r28, ptr [r12+r13*2+0x35] +XDIS 2aa0e: MISC BASE D54F8D646D36 lea r28, ptr [r13+r13*2+0x36] +XDIS 2aa14: MISC BASE D54F8D646E37 lea r28, ptr [r14+r13*2+0x37] +XDIS 2aa1a: MISC BASE D54F8D646F38 lea r28, ptr [r15+r13*2+0x38] +XDIS 2aa20: MISC BASE D55E8D646839 lea r28, ptr [r16+r13*2+0x39] +XDIS 2aa26: MISC BASE D55E8D64693A lea r28, ptr [r17+r13*2+0x3a] +XDIS 2aa2c: MISC BASE D55E8D646A3B lea r28, ptr [r18+r13*2+0x3b] +XDIS 2aa32: MISC BASE D55E8D646B3C lea r28, ptr [r19+r13*2+0x3c] +XDIS 2aa38: MISC BASE D55E8D646C3D lea r28, ptr [r20+r13*2+0x3d] +XDIS 2aa3e: MISC BASE D55E8D646D3E lea r28, ptr [r21+r13*2+0x3e] +XDIS 2aa44: MISC BASE D55E8D646E3F lea r28, ptr [r22+r13*2+0x3f] +XDIS 2aa4a: MISC BASE D55E8D646F40 lea r28, ptr [r23+r13*2+0x40] +XDIS 2aa50: MISC BASE D55F8D646841 lea r28, ptr [r24+r13*2+0x41] +XDIS 2aa56: MISC BASE D55F8D646942 lea r28, ptr [r25+r13*2+0x42] +XDIS 2aa5c: MISC BASE D55F8D646A43 lea r28, ptr [r26+r13*2+0x43] +XDIS 2aa62: MISC BASE D55F8D646B44 lea r28, ptr [r27+r13*2+0x44] +XDIS 2aa68: MISC BASE D55F8D646C45 lea r28, ptr [r28+r13*2+0x45] +XDIS 2aa6e: MISC BASE D55F8D646D46 lea r28, ptr [r29+r13*2+0x46] +XDIS 2aa74: MISC BASE D55F8D646E47 lea r28, ptr [r30+r13*2+0x47] +XDIS 2aa7a: MISC BASE D55F8D646F48 lea r28, ptr [r31+r13*2+0x48] +XDIS 2aa80: MISC BASE D54E8D64702A lea r28, ptr [rax+r14*2+0x2a] +XDIS 2aa86: MISC BASE D54E8D64712B lea r28, ptr [rcx+r14*2+0x2b] +XDIS 2aa8c: MISC BASE D54E8D64722C lea r28, ptr [rdx+r14*2+0x2c] +XDIS 2aa92: MISC BASE D54E8D64732D lea r28, ptr [rbx+r14*2+0x2d] +XDIS 2aa98: MISC BASE D54E8D64742E lea r28, ptr [rsp+r14*2+0x2e] +XDIS 2aa9e: MISC BASE D54E8D64752F lea r28, ptr [rbp+r14*2+0x2f] +XDIS 2aaa4: MISC BASE D54E8D647630 lea r28, ptr [rsi+r14*2+0x30] +XDIS 2aaaa: MISC BASE D54E8D647731 lea r28, ptr [rdi+r14*2+0x31] +XDIS 2aab0: MISC BASE D54F8D647032 lea r28, ptr [r8+r14*2+0x32] +XDIS 2aab6: MISC BASE D54F8D647133 lea r28, ptr [r9+r14*2+0x33] +XDIS 2aabc: MISC BASE D54F8D647234 lea r28, ptr [r10+r14*2+0x34] +XDIS 2aac2: MISC BASE D54F8D647335 lea r28, ptr [r11+r14*2+0x35] +XDIS 2aac8: MISC BASE D54F8D647436 lea r28, ptr [r12+r14*2+0x36] +XDIS 2aace: MISC BASE D54F8D647537 lea r28, ptr [r13+r14*2+0x37] +XDIS 2aad4: MISC BASE D54F8D647638 lea r28, ptr [r14+r14*2+0x38] +XDIS 2aada: MISC BASE D54F8D647739 lea r28, ptr [r15+r14*2+0x39] +XDIS 2aae0: MISC BASE D55E8D64703A lea r28, ptr [r16+r14*2+0x3a] +XDIS 2aae6: MISC BASE D55E8D64713B lea r28, ptr [r17+r14*2+0x3b] +XDIS 2aaec: MISC BASE D55E8D64723C lea r28, ptr [r18+r14*2+0x3c] +XDIS 2aaf2: MISC BASE D55E8D64733D lea r28, ptr [r19+r14*2+0x3d] +XDIS 2aaf8: MISC BASE D55E8D64743E lea r28, ptr [r20+r14*2+0x3e] +XDIS 2aafe: MISC BASE D55E8D64753F lea r28, ptr [r21+r14*2+0x3f] +XDIS 2ab04: MISC BASE D55E8D647640 lea r28, ptr [r22+r14*2+0x40] +XDIS 2ab0a: MISC BASE D55E8D647741 lea r28, ptr [r23+r14*2+0x41] +XDIS 2ab10: MISC BASE D55F8D647042 lea r28, ptr [r24+r14*2+0x42] +XDIS 2ab16: MISC BASE D55F8D647143 lea r28, ptr [r25+r14*2+0x43] +XDIS 2ab1c: MISC BASE D55F8D647244 lea r28, ptr [r26+r14*2+0x44] +XDIS 2ab22: MISC BASE D55F8D647345 lea r28, ptr [r27+r14*2+0x45] +XDIS 2ab28: MISC BASE D55F8D647446 lea r28, ptr [r28+r14*2+0x46] +XDIS 2ab2e: MISC BASE D55F8D647547 lea r28, ptr [r29+r14*2+0x47] +XDIS 2ab34: MISC BASE D55F8D647648 lea r28, ptr [r30+r14*2+0x48] +XDIS 2ab3a: MISC BASE D55F8D647749 lea r28, ptr [r31+r14*2+0x49] +XDIS 2ab40: MISC BASE D54E8D64782B lea r28, ptr [rax+r15*2+0x2b] +XDIS 2ab46: MISC BASE D54E8D64792C lea r28, ptr [rcx+r15*2+0x2c] +XDIS 2ab4c: MISC BASE D54E8D647A2D lea r28, ptr [rdx+r15*2+0x2d] +XDIS 2ab52: MISC BASE D54E8D647B2E lea r28, ptr [rbx+r15*2+0x2e] +XDIS 2ab58: MISC BASE D54E8D647C2F lea r28, ptr [rsp+r15*2+0x2f] +XDIS 2ab5e: MISC BASE D54E8D647D30 lea r28, ptr [rbp+r15*2+0x30] +XDIS 2ab64: MISC BASE D54E8D647E31 lea r28, ptr [rsi+r15*2+0x31] +XDIS 2ab6a: MISC BASE D54E8D647F32 lea r28, ptr [rdi+r15*2+0x32] +XDIS 2ab70: MISC BASE D54F8D647833 lea r28, ptr [r8+r15*2+0x33] +XDIS 2ab76: MISC BASE D54F8D647934 lea r28, ptr [r9+r15*2+0x34] +XDIS 2ab7c: MISC BASE D54F8D647A35 lea r28, ptr [r10+r15*2+0x35] +XDIS 2ab82: MISC BASE D54F8D647B36 lea r28, ptr [r11+r15*2+0x36] +XDIS 2ab88: MISC BASE D54F8D647C37 lea r28, ptr [r12+r15*2+0x37] +XDIS 2ab8e: MISC BASE D54F8D647D38 lea r28, ptr [r13+r15*2+0x38] +XDIS 2ab94: MISC BASE D54F8D647E39 lea r28, ptr [r14+r15*2+0x39] +XDIS 2ab9a: MISC BASE D54F8D647F3A lea r28, ptr [r15+r15*2+0x3a] +XDIS 2aba0: MISC BASE D55E8D64783B lea r28, ptr [r16+r15*2+0x3b] +XDIS 2aba6: MISC BASE D55E8D64793C lea r28, ptr [r17+r15*2+0x3c] +XDIS 2abac: MISC BASE D55E8D647A3D lea r28, ptr [r18+r15*2+0x3d] +XDIS 2abb2: MISC BASE D55E8D647B3E lea r28, ptr [r19+r15*2+0x3e] +XDIS 2abb8: MISC BASE D55E8D647C3F lea r28, ptr [r20+r15*2+0x3f] +XDIS 2abbe: MISC BASE D55E8D647D40 lea r28, ptr [r21+r15*2+0x40] +XDIS 2abc4: MISC BASE D55E8D647E41 lea r28, ptr [r22+r15*2+0x41] +XDIS 2abca: MISC BASE D55E8D647F42 lea r28, ptr [r23+r15*2+0x42] +XDIS 2abd0: MISC BASE D55F8D647843 lea r28, ptr [r24+r15*2+0x43] +XDIS 2abd6: MISC BASE D55F8D647944 lea r28, ptr [r25+r15*2+0x44] +XDIS 2abdc: MISC BASE D55F8D647A45 lea r28, ptr [r26+r15*2+0x45] +XDIS 2abe2: MISC BASE D55F8D647B46 lea r28, ptr [r27+r15*2+0x46] +XDIS 2abe8: MISC BASE D55F8D647C47 lea r28, ptr [r28+r15*2+0x47] +XDIS 2abee: MISC BASE D55F8D647D48 lea r28, ptr [r29+r15*2+0x48] +XDIS 2abf4: MISC BASE D55F8D647E49 lea r28, ptr [r30+r15*2+0x49] +XDIS 2abfa: MISC BASE D55F8D647F4A lea r28, ptr [r31+r15*2+0x4a] +XDIS 2ac00: MISC BASE D56C8D64402C lea r28, ptr [rax+r16*2+0x2c] +XDIS 2ac06: MISC BASE D56C8D64412D lea r28, ptr [rcx+r16*2+0x2d] +XDIS 2ac0c: MISC BASE D56C8D64422E lea r28, ptr [rdx+r16*2+0x2e] +XDIS 2ac12: MISC BASE D56C8D64432F lea r28, ptr [rbx+r16*2+0x2f] +XDIS 2ac18: MISC BASE D56C8D644430 lea r28, ptr [rsp+r16*2+0x30] +XDIS 2ac1e: MISC BASE D56C8D644531 lea r28, ptr [rbp+r16*2+0x31] +XDIS 2ac24: MISC BASE D56C8D644632 lea r28, ptr [rsi+r16*2+0x32] +XDIS 2ac2a: MISC BASE D56C8D644733 lea r28, ptr [rdi+r16*2+0x33] +XDIS 2ac30: MISC BASE D56D8D644034 lea r28, ptr [r8+r16*2+0x34] +XDIS 2ac36: MISC BASE D56D8D644135 lea r28, ptr [r9+r16*2+0x35] +XDIS 2ac3c: MISC BASE D56D8D644236 lea r28, ptr [r10+r16*2+0x36] +XDIS 2ac42: MISC BASE D56D8D644337 lea r28, ptr [r11+r16*2+0x37] +XDIS 2ac48: MISC BASE D56D8D644438 lea r28, ptr [r12+r16*2+0x38] +XDIS 2ac4e: MISC BASE D56D8D644539 lea r28, ptr [r13+r16*2+0x39] +XDIS 2ac54: MISC BASE D56D8D64463A lea r28, ptr [r14+r16*2+0x3a] +XDIS 2ac5a: MISC BASE D56D8D64473B lea r28, ptr [r15+r16*2+0x3b] +XDIS 2ac60: MISC BASE D57C8D64403C lea r28, ptr [r16+r16*2+0x3c] +XDIS 2ac66: MISC BASE D57C8D64413D lea r28, ptr [r17+r16*2+0x3d] +XDIS 2ac6c: MISC BASE D57C8D64423E lea r28, ptr [r18+r16*2+0x3e] +XDIS 2ac72: MISC BASE D57C8D64433F lea r28, ptr [r19+r16*2+0x3f] +XDIS 2ac78: MISC BASE D57C8D644440 lea r28, ptr [r20+r16*2+0x40] +XDIS 2ac7e: MISC BASE D57C8D644541 lea r28, ptr [r21+r16*2+0x41] +XDIS 2ac84: MISC BASE D57C8D644642 lea r28, ptr [r22+r16*2+0x42] +XDIS 2ac8a: MISC BASE D57C8D644743 lea r28, ptr [r23+r16*2+0x43] +XDIS 2ac90: MISC BASE D57D8D644044 lea r28, ptr [r24+r16*2+0x44] +XDIS 2ac96: MISC BASE D57D8D644145 lea r28, ptr [r25+r16*2+0x45] +XDIS 2ac9c: MISC BASE D57D8D644246 lea r28, ptr [r26+r16*2+0x46] +XDIS 2aca2: MISC BASE D57D8D644347 lea r28, ptr [r27+r16*2+0x47] +XDIS 2aca8: MISC BASE D57D8D644448 lea r28, ptr [r28+r16*2+0x48] +XDIS 2acae: MISC BASE D57D8D644549 lea r28, ptr [r29+r16*2+0x49] +XDIS 2acb4: MISC BASE D57D8D64464A lea r28, ptr [r30+r16*2+0x4a] +XDIS 2acba: MISC BASE D57D8D64474B lea r28, ptr [r31+r16*2+0x4b] +XDIS 2acc0: MISC BASE D56C8D64482D lea r28, ptr [rax+r17*2+0x2d] +XDIS 2acc6: MISC BASE D56C8D64492E lea r28, ptr [rcx+r17*2+0x2e] +XDIS 2accc: MISC BASE D56C8D644A2F lea r28, ptr [rdx+r17*2+0x2f] +XDIS 2acd2: MISC BASE D56C8D644B30 lea r28, ptr [rbx+r17*2+0x30] +XDIS 2acd8: MISC BASE D56C8D644C31 lea r28, ptr [rsp+r17*2+0x31] +XDIS 2acde: MISC BASE D56C8D644D32 lea r28, ptr [rbp+r17*2+0x32] +XDIS 2ace4: MISC BASE D56C8D644E33 lea r28, ptr [rsi+r17*2+0x33] +XDIS 2acea: MISC BASE D56C8D644F34 lea r28, ptr [rdi+r17*2+0x34] +XDIS 2acf0: MISC BASE D56D8D644835 lea r28, ptr [r8+r17*2+0x35] +XDIS 2acf6: MISC BASE D56D8D644936 lea r28, ptr [r9+r17*2+0x36] +XDIS 2acfc: MISC BASE D56D8D644A37 lea r28, ptr [r10+r17*2+0x37] +XDIS 2ad02: MISC BASE D56D8D644B38 lea r28, ptr [r11+r17*2+0x38] +XDIS 2ad08: MISC BASE D56D8D644C39 lea r28, ptr [r12+r17*2+0x39] +XDIS 2ad0e: MISC BASE D56D8D644D3A lea r28, ptr [r13+r17*2+0x3a] +XDIS 2ad14: MISC BASE D56D8D644E3B lea r28, ptr [r14+r17*2+0x3b] +XDIS 2ad1a: MISC BASE D56D8D644F3C lea r28, ptr [r15+r17*2+0x3c] +XDIS 2ad20: MISC BASE D57C8D64483D lea r28, ptr [r16+r17*2+0x3d] +XDIS 2ad26: MISC BASE D57C8D64493E lea r28, ptr [r17+r17*2+0x3e] +XDIS 2ad2c: MISC BASE D57C8D644A3F lea r28, ptr [r18+r17*2+0x3f] +XDIS 2ad32: MISC BASE D57C8D644B40 lea r28, ptr [r19+r17*2+0x40] +XDIS 2ad38: MISC BASE D57C8D644C41 lea r28, ptr [r20+r17*2+0x41] +XDIS 2ad3e: MISC BASE D57C8D644D42 lea r28, ptr [r21+r17*2+0x42] +XDIS 2ad44: MISC BASE D57C8D644E43 lea r28, ptr [r22+r17*2+0x43] +XDIS 2ad4a: MISC BASE D57C8D644F44 lea r28, ptr [r23+r17*2+0x44] +XDIS 2ad50: MISC BASE D57D8D644845 lea r28, ptr [r24+r17*2+0x45] +XDIS 2ad56: MISC BASE D57D8D644946 lea r28, ptr [r25+r17*2+0x46] +XDIS 2ad5c: MISC BASE D57D8D644A47 lea r28, ptr [r26+r17*2+0x47] +XDIS 2ad62: MISC BASE D57D8D644B48 lea r28, ptr [r27+r17*2+0x48] +XDIS 2ad68: MISC BASE D57D8D644C49 lea r28, ptr [r28+r17*2+0x49] +XDIS 2ad6e: MISC BASE D57D8D644D4A lea r28, ptr [r29+r17*2+0x4a] +XDIS 2ad74: MISC BASE D57D8D644E4B lea r28, ptr [r30+r17*2+0x4b] +XDIS 2ad7a: MISC BASE D57D8D644F4C lea r28, ptr [r31+r17*2+0x4c] +XDIS 2ad80: MISC BASE D56C8D64502E lea r28, ptr [rax+r18*2+0x2e] +XDIS 2ad86: MISC BASE D56C8D64512F lea r28, ptr [rcx+r18*2+0x2f] +XDIS 2ad8c: MISC BASE D56C8D645230 lea r28, ptr [rdx+r18*2+0x30] +XDIS 2ad92: MISC BASE D56C8D645331 lea r28, ptr [rbx+r18*2+0x31] +XDIS 2ad98: MISC BASE D56C8D645432 lea r28, ptr [rsp+r18*2+0x32] +XDIS 2ad9e: MISC BASE D56C8D645533 lea r28, ptr [rbp+r18*2+0x33] +XDIS 2ada4: MISC BASE D56C8D645634 lea r28, ptr [rsi+r18*2+0x34] +XDIS 2adaa: MISC BASE D56C8D645735 lea r28, ptr [rdi+r18*2+0x35] +XDIS 2adb0: MISC BASE D56D8D645036 lea r28, ptr [r8+r18*2+0x36] +XDIS 2adb6: MISC BASE D56D8D645137 lea r28, ptr [r9+r18*2+0x37] +XDIS 2adbc: MISC BASE D56D8D645238 lea r28, ptr [r10+r18*2+0x38] +XDIS 2adc2: MISC BASE D56D8D645339 lea r28, ptr [r11+r18*2+0x39] +XDIS 2adc8: MISC BASE D56D8D64543A lea r28, ptr [r12+r18*2+0x3a] +XDIS 2adce: MISC BASE D56D8D64553B lea r28, ptr [r13+r18*2+0x3b] +XDIS 2add4: MISC BASE D56D8D64563C lea r28, ptr [r14+r18*2+0x3c] +XDIS 2adda: MISC BASE D56D8D64573D lea r28, ptr [r15+r18*2+0x3d] +XDIS 2ade0: MISC BASE D57C8D64503E lea r28, ptr [r16+r18*2+0x3e] +XDIS 2ade6: MISC BASE D57C8D64513F lea r28, ptr [r17+r18*2+0x3f] +XDIS 2adec: MISC BASE D57C8D645240 lea r28, ptr [r18+r18*2+0x40] +XDIS 2adf2: MISC BASE D57C8D645341 lea r28, ptr [r19+r18*2+0x41] +XDIS 2adf8: MISC BASE D57C8D645442 lea r28, ptr [r20+r18*2+0x42] +XDIS 2adfe: MISC BASE D57C8D645543 lea r28, ptr [r21+r18*2+0x43] +XDIS 2ae04: MISC BASE D57C8D645644 lea r28, ptr [r22+r18*2+0x44] +XDIS 2ae0a: MISC BASE D57C8D645745 lea r28, ptr [r23+r18*2+0x45] +XDIS 2ae10: MISC BASE D57D8D645046 lea r28, ptr [r24+r18*2+0x46] +XDIS 2ae16: MISC BASE D57D8D645147 lea r28, ptr [r25+r18*2+0x47] +XDIS 2ae1c: MISC BASE D57D8D645248 lea r28, ptr [r26+r18*2+0x48] +XDIS 2ae22: MISC BASE D57D8D645349 lea r28, ptr [r27+r18*2+0x49] +XDIS 2ae28: MISC BASE D57D8D64544A lea r28, ptr [r28+r18*2+0x4a] +XDIS 2ae2e: MISC BASE D57D8D64554B lea r28, ptr [r29+r18*2+0x4b] +XDIS 2ae34: MISC BASE D57D8D64564C lea r28, ptr [r30+r18*2+0x4c] +XDIS 2ae3a: MISC BASE D57D8D64574D lea r28, ptr [r31+r18*2+0x4d] +XDIS 2ae40: MISC BASE D56C8D64582F lea r28, ptr [rax+r19*2+0x2f] +XDIS 2ae46: MISC BASE D56C8D645930 lea r28, ptr [rcx+r19*2+0x30] +XDIS 2ae4c: MISC BASE D56C8D645A31 lea r28, ptr [rdx+r19*2+0x31] +XDIS 2ae52: MISC BASE D56C8D645B32 lea r28, ptr [rbx+r19*2+0x32] +XDIS 2ae58: MISC BASE D56C8D645C33 lea r28, ptr [rsp+r19*2+0x33] +XDIS 2ae5e: MISC BASE D56C8D645D34 lea r28, ptr [rbp+r19*2+0x34] +XDIS 2ae64: MISC BASE D56C8D645E35 lea r28, ptr [rsi+r19*2+0x35] +XDIS 2ae6a: MISC BASE D56C8D645F36 lea r28, ptr [rdi+r19*2+0x36] +XDIS 2ae70: MISC BASE D56D8D645837 lea r28, ptr [r8+r19*2+0x37] +XDIS 2ae76: MISC BASE D56D8D645938 lea r28, ptr [r9+r19*2+0x38] +XDIS 2ae7c: MISC BASE D56D8D645A39 lea r28, ptr [r10+r19*2+0x39] +XDIS 2ae82: MISC BASE D56D8D645B3A lea r28, ptr [r11+r19*2+0x3a] +XDIS 2ae88: MISC BASE D56D8D645C3B lea r28, ptr [r12+r19*2+0x3b] +XDIS 2ae8e: MISC BASE D56D8D645D3C lea r28, ptr [r13+r19*2+0x3c] +XDIS 2ae94: MISC BASE D56D8D645E3D lea r28, ptr [r14+r19*2+0x3d] +XDIS 2ae9a: MISC BASE D56D8D645F3E lea r28, ptr [r15+r19*2+0x3e] +XDIS 2aea0: MISC BASE D57C8D64583F lea r28, ptr [r16+r19*2+0x3f] +XDIS 2aea6: MISC BASE D57C8D645940 lea r28, ptr [r17+r19*2+0x40] +XDIS 2aeac: MISC BASE D57C8D645A41 lea r28, ptr [r18+r19*2+0x41] +XDIS 2aeb2: MISC BASE D57C8D645B42 lea r28, ptr [r19+r19*2+0x42] +XDIS 2aeb8: MISC BASE D57C8D645C43 lea r28, ptr [r20+r19*2+0x43] +XDIS 2aebe: MISC BASE D57C8D645D44 lea r28, ptr [r21+r19*2+0x44] +XDIS 2aec4: MISC BASE D57C8D645E45 lea r28, ptr [r22+r19*2+0x45] +XDIS 2aeca: MISC BASE D57C8D645F46 lea r28, ptr [r23+r19*2+0x46] +XDIS 2aed0: MISC BASE D57D8D645847 lea r28, ptr [r24+r19*2+0x47] +XDIS 2aed6: MISC BASE D57D8D645948 lea r28, ptr [r25+r19*2+0x48] +XDIS 2aedc: MISC BASE D57D8D645A49 lea r28, ptr [r26+r19*2+0x49] +XDIS 2aee2: MISC BASE D57D8D645B4A lea r28, ptr [r27+r19*2+0x4a] +XDIS 2aee8: MISC BASE D57D8D645C4B lea r28, ptr [r28+r19*2+0x4b] +XDIS 2aeee: MISC BASE D57D8D645D4C lea r28, ptr [r29+r19*2+0x4c] +XDIS 2aef4: MISC BASE D57D8D645E4D lea r28, ptr [r30+r19*2+0x4d] +XDIS 2aefa: MISC BASE D57D8D645F4E lea r28, ptr [r31+r19*2+0x4e] +XDIS 2af00: MISC BASE D56C8D646030 lea r28, ptr [rax+r20*2+0x30] +XDIS 2af06: MISC BASE D56C8D646131 lea r28, ptr [rcx+r20*2+0x31] +XDIS 2af0c: MISC BASE D56C8D646232 lea r28, ptr [rdx+r20*2+0x32] +XDIS 2af12: MISC BASE D56C8D646333 lea r28, ptr [rbx+r20*2+0x33] +XDIS 2af18: MISC BASE D56C8D646434 lea r28, ptr [rsp+r20*2+0x34] +XDIS 2af1e: MISC BASE D56C8D646535 lea r28, ptr [rbp+r20*2+0x35] +XDIS 2af24: MISC BASE D56C8D646636 lea r28, ptr [rsi+r20*2+0x36] +XDIS 2af2a: MISC BASE D56C8D646737 lea r28, ptr [rdi+r20*2+0x37] +XDIS 2af30: MISC BASE D56D8D646038 lea r28, ptr [r8+r20*2+0x38] +XDIS 2af36: MISC BASE D56D8D646139 lea r28, ptr [r9+r20*2+0x39] +XDIS 2af3c: MISC BASE D56D8D64623A lea r28, ptr [r10+r20*2+0x3a] +XDIS 2af42: MISC BASE D56D8D64633B lea r28, ptr [r11+r20*2+0x3b] +XDIS 2af48: MISC BASE D56D8D64643C lea r28, ptr [r12+r20*2+0x3c] +XDIS 2af4e: MISC BASE D56D8D64653D lea r28, ptr [r13+r20*2+0x3d] +XDIS 2af54: MISC BASE D56D8D64663E lea r28, ptr [r14+r20*2+0x3e] +XDIS 2af5a: MISC BASE D56D8D64673F lea r28, ptr [r15+r20*2+0x3f] +XDIS 2af60: MISC BASE D57C8D646040 lea r28, ptr [r16+r20*2+0x40] +XDIS 2af66: MISC BASE D57C8D646141 lea r28, ptr [r17+r20*2+0x41] +XDIS 2af6c: MISC BASE D57C8D646242 lea r28, ptr [r18+r20*2+0x42] +XDIS 2af72: MISC BASE D57C8D646343 lea r28, ptr [r19+r20*2+0x43] +XDIS 2af78: MISC BASE D57C8D646444 lea r28, ptr [r20+r20*2+0x44] +XDIS 2af7e: MISC BASE D57C8D646545 lea r28, ptr [r21+r20*2+0x45] +XDIS 2af84: MISC BASE D57C8D646646 lea r28, ptr [r22+r20*2+0x46] +XDIS 2af8a: MISC BASE D57C8D646747 lea r28, ptr [r23+r20*2+0x47] +XDIS 2af90: MISC BASE D57D8D646048 lea r28, ptr [r24+r20*2+0x48] +XDIS 2af96: MISC BASE D57D8D646149 lea r28, ptr [r25+r20*2+0x49] +XDIS 2af9c: MISC BASE D57D8D64624A lea r28, ptr [r26+r20*2+0x4a] +XDIS 2afa2: MISC BASE D57D8D64634B lea r28, ptr [r27+r20*2+0x4b] +XDIS 2afa8: MISC BASE D57D8D64644C lea r28, ptr [r28+r20*2+0x4c] +XDIS 2afae: MISC BASE D57D8D64654D lea r28, ptr [r29+r20*2+0x4d] +XDIS 2afb4: MISC BASE D57D8D64664E lea r28, ptr [r30+r20*2+0x4e] +XDIS 2afba: MISC BASE D57D8D64674F lea r28, ptr [r31+r20*2+0x4f] +XDIS 2afc0: MISC BASE D56C8D646831 lea r28, ptr [rax+r21*2+0x31] +XDIS 2afc6: MISC BASE D56C8D646932 lea r28, ptr [rcx+r21*2+0x32] +XDIS 2afcc: MISC BASE D56C8D646A33 lea r28, ptr [rdx+r21*2+0x33] +XDIS 2afd2: MISC BASE D56C8D646B34 lea r28, ptr [rbx+r21*2+0x34] +XDIS 2afd8: MISC BASE D56C8D646C35 lea r28, ptr [rsp+r21*2+0x35] +XDIS 2afde: MISC BASE D56C8D646D36 lea r28, ptr [rbp+r21*2+0x36] +XDIS 2afe4: MISC BASE D56C8D646E37 lea r28, ptr [rsi+r21*2+0x37] +XDIS 2afea: MISC BASE D56C8D646F38 lea r28, ptr [rdi+r21*2+0x38] +XDIS 2aff0: MISC BASE D56D8D646839 lea r28, ptr [r8+r21*2+0x39] +XDIS 2aff6: MISC BASE D56D8D64693A lea r28, ptr [r9+r21*2+0x3a] +XDIS 2affc: MISC BASE D56D8D646A3B lea r28, ptr [r10+r21*2+0x3b] +XDIS 2b002: MISC BASE D56D8D646B3C lea r28, ptr [r11+r21*2+0x3c] +XDIS 2b008: MISC BASE D56D8D646C3D lea r28, ptr [r12+r21*2+0x3d] +XDIS 2b00e: MISC BASE D56D8D646D3E lea r28, ptr [r13+r21*2+0x3e] +XDIS 2b014: MISC BASE D56D8D646E3F lea r28, ptr [r14+r21*2+0x3f] +XDIS 2b01a: MISC BASE D56D8D646F40 lea r28, ptr [r15+r21*2+0x40] +XDIS 2b020: MISC BASE D57C8D646841 lea r28, ptr [r16+r21*2+0x41] +XDIS 2b026: MISC BASE D57C8D646942 lea r28, ptr [r17+r21*2+0x42] +XDIS 2b02c: MISC BASE D57C8D646A43 lea r28, ptr [r18+r21*2+0x43] +XDIS 2b032: MISC BASE D57C8D646B44 lea r28, ptr [r19+r21*2+0x44] +XDIS 2b038: MISC BASE D57C8D646C45 lea r28, ptr [r20+r21*2+0x45] +XDIS 2b03e: MISC BASE D57C8D646D46 lea r28, ptr [r21+r21*2+0x46] +XDIS 2b044: MISC BASE D57C8D646E47 lea r28, ptr [r22+r21*2+0x47] +XDIS 2b04a: MISC BASE D57C8D646F48 lea r28, ptr [r23+r21*2+0x48] +XDIS 2b050: MISC BASE D57D8D646849 lea r28, ptr [r24+r21*2+0x49] +XDIS 2b056: MISC BASE D57D8D64694A lea r28, ptr [r25+r21*2+0x4a] +XDIS 2b05c: MISC BASE D57D8D646A4B lea r28, ptr [r26+r21*2+0x4b] +XDIS 2b062: MISC BASE D57D8D646B4C lea r28, ptr [r27+r21*2+0x4c] +XDIS 2b068: MISC BASE D57D8D646C4D lea r28, ptr [r28+r21*2+0x4d] +XDIS 2b06e: MISC BASE D57D8D646D4E lea r28, ptr [r29+r21*2+0x4e] +XDIS 2b074: MISC BASE D57D8D646E4F lea r28, ptr [r30+r21*2+0x4f] +XDIS 2b07a: MISC BASE D57D8D646F50 lea r28, ptr [r31+r21*2+0x50] +XDIS 2b080: MISC BASE D56C8D647032 lea r28, ptr [rax+r22*2+0x32] +XDIS 2b086: MISC BASE D56C8D647133 lea r28, ptr [rcx+r22*2+0x33] +XDIS 2b08c: MISC BASE D56C8D647234 lea r28, ptr [rdx+r22*2+0x34] +XDIS 2b092: MISC BASE D56C8D647335 lea r28, ptr [rbx+r22*2+0x35] +XDIS 2b098: MISC BASE D56C8D647436 lea r28, ptr [rsp+r22*2+0x36] +XDIS 2b09e: MISC BASE D56C8D647537 lea r28, ptr [rbp+r22*2+0x37] +XDIS 2b0a4: MISC BASE D56C8D647638 lea r28, ptr [rsi+r22*2+0x38] +XDIS 2b0aa: MISC BASE D56C8D647739 lea r28, ptr [rdi+r22*2+0x39] +XDIS 2b0b0: MISC BASE D56D8D64703A lea r28, ptr [r8+r22*2+0x3a] +XDIS 2b0b6: MISC BASE D56D8D64713B lea r28, ptr [r9+r22*2+0x3b] +XDIS 2b0bc: MISC BASE D56D8D64723C lea r28, ptr [r10+r22*2+0x3c] +XDIS 2b0c2: MISC BASE D56D8D64733D lea r28, ptr [r11+r22*2+0x3d] +XDIS 2b0c8: MISC BASE D56D8D64743E lea r28, ptr [r12+r22*2+0x3e] +XDIS 2b0ce: MISC BASE D56D8D64753F lea r28, ptr [r13+r22*2+0x3f] +XDIS 2b0d4: MISC BASE D56D8D647640 lea r28, ptr [r14+r22*2+0x40] +XDIS 2b0da: MISC BASE D56D8D647741 lea r28, ptr [r15+r22*2+0x41] +XDIS 2b0e0: MISC BASE D57C8D647042 lea r28, ptr [r16+r22*2+0x42] +XDIS 2b0e6: MISC BASE D57C8D647143 lea r28, ptr [r17+r22*2+0x43] +XDIS 2b0ec: MISC BASE D57C8D647244 lea r28, ptr [r18+r22*2+0x44] +XDIS 2b0f2: MISC BASE D57C8D647345 lea r28, ptr [r19+r22*2+0x45] +XDIS 2b0f8: MISC BASE D57C8D647446 lea r28, ptr [r20+r22*2+0x46] +XDIS 2b0fe: MISC BASE D57C8D647547 lea r28, ptr [r21+r22*2+0x47] +XDIS 2b104: MISC BASE D57C8D647648 lea r28, ptr [r22+r22*2+0x48] +XDIS 2b10a: MISC BASE D57C8D647749 lea r28, ptr [r23+r22*2+0x49] +XDIS 2b110: MISC BASE D57D8D64704A lea r28, ptr [r24+r22*2+0x4a] +XDIS 2b116: MISC BASE D57D8D64714B lea r28, ptr [r25+r22*2+0x4b] +XDIS 2b11c: MISC BASE D57D8D64724C lea r28, ptr [r26+r22*2+0x4c] +XDIS 2b122: MISC BASE D57D8D64734D lea r28, ptr [r27+r22*2+0x4d] +XDIS 2b128: MISC BASE D57D8D64744E lea r28, ptr [r28+r22*2+0x4e] +XDIS 2b12e: MISC BASE D57D8D64754F lea r28, ptr [r29+r22*2+0x4f] +XDIS 2b134: MISC BASE D57D8D647650 lea r28, ptr [r30+r22*2+0x50] +XDIS 2b13a: MISC BASE D57D8D647751 lea r28, ptr [r31+r22*2+0x51] +XDIS 2b140: MISC BASE D56C8D647833 lea r28, ptr [rax+r23*2+0x33] +XDIS 2b146: MISC BASE D56C8D647934 lea r28, ptr [rcx+r23*2+0x34] +XDIS 2b14c: MISC BASE D56C8D647A35 lea r28, ptr [rdx+r23*2+0x35] +XDIS 2b152: MISC BASE D56C8D647B36 lea r28, ptr [rbx+r23*2+0x36] +XDIS 2b158: MISC BASE D56C8D647C37 lea r28, ptr [rsp+r23*2+0x37] +XDIS 2b15e: MISC BASE D56C8D647D38 lea r28, ptr [rbp+r23*2+0x38] +XDIS 2b164: MISC BASE D56C8D647E39 lea r28, ptr [rsi+r23*2+0x39] +XDIS 2b16a: MISC BASE D56C8D647F3A lea r28, ptr [rdi+r23*2+0x3a] +XDIS 2b170: MISC BASE D56D8D64783B lea r28, ptr [r8+r23*2+0x3b] +XDIS 2b176: MISC BASE D56D8D64793C lea r28, ptr [r9+r23*2+0x3c] +XDIS 2b17c: MISC BASE D56D8D647A3D lea r28, ptr [r10+r23*2+0x3d] +XDIS 2b182: MISC BASE D56D8D647B3E lea r28, ptr [r11+r23*2+0x3e] +XDIS 2b188: MISC BASE D56D8D647C3F lea r28, ptr [r12+r23*2+0x3f] +XDIS 2b18e: MISC BASE D56D8D647D40 lea r28, ptr [r13+r23*2+0x40] +XDIS 2b194: MISC BASE D56D8D647E41 lea r28, ptr [r14+r23*2+0x41] +XDIS 2b19a: MISC BASE D56D8D647F42 lea r28, ptr [r15+r23*2+0x42] +XDIS 2b1a0: MISC BASE D57C8D647843 lea r28, ptr [r16+r23*2+0x43] +XDIS 2b1a6: MISC BASE D57C8D647944 lea r28, ptr [r17+r23*2+0x44] +XDIS 2b1ac: MISC BASE D57C8D647A45 lea r28, ptr [r18+r23*2+0x45] +XDIS 2b1b2: MISC BASE D57C8D647B46 lea r28, ptr [r19+r23*2+0x46] +XDIS 2b1b8: MISC BASE D57C8D647C47 lea r28, ptr [r20+r23*2+0x47] +XDIS 2b1be: MISC BASE D57C8D647D48 lea r28, ptr [r21+r23*2+0x48] +XDIS 2b1c4: MISC BASE D57C8D647E49 lea r28, ptr [r22+r23*2+0x49] +XDIS 2b1ca: MISC BASE D57C8D647F4A lea r28, ptr [r23+r23*2+0x4a] +XDIS 2b1d0: MISC BASE D57D8D64784B lea r28, ptr [r24+r23*2+0x4b] +XDIS 2b1d6: MISC BASE D57D8D64794C lea r28, ptr [r25+r23*2+0x4c] +XDIS 2b1dc: MISC BASE D57D8D647A4D lea r28, ptr [r26+r23*2+0x4d] +XDIS 2b1e2: MISC BASE D57D8D647B4E lea r28, ptr [r27+r23*2+0x4e] +XDIS 2b1e8: MISC BASE D57D8D647C4F lea r28, ptr [r28+r23*2+0x4f] +XDIS 2b1ee: MISC BASE D57D8D647D50 lea r28, ptr [r29+r23*2+0x50] +XDIS 2b1f4: MISC BASE D57D8D647E51 lea r28, ptr [r30+r23*2+0x51] +XDIS 2b1fa: MISC BASE D57D8D647F52 lea r28, ptr [r31+r23*2+0x52] +XDIS 2b200: MISC BASE D56E8D644034 lea r28, ptr [rax+r24*2+0x34] +XDIS 2b206: MISC BASE D56E8D644135 lea r28, ptr [rcx+r24*2+0x35] +XDIS 2b20c: MISC BASE D56E8D644236 lea r28, ptr [rdx+r24*2+0x36] +XDIS 2b212: MISC BASE D56E8D644337 lea r28, ptr [rbx+r24*2+0x37] +XDIS 2b218: MISC BASE D56E8D644438 lea r28, ptr [rsp+r24*2+0x38] +XDIS 2b21e: MISC BASE D56E8D644539 lea r28, ptr [rbp+r24*2+0x39] +XDIS 2b224: MISC BASE D56E8D64463A lea r28, ptr [rsi+r24*2+0x3a] +XDIS 2b22a: MISC BASE D56E8D64473B lea r28, ptr [rdi+r24*2+0x3b] +XDIS 2b230: MISC BASE D56F8D64403C lea r28, ptr [r8+r24*2+0x3c] +XDIS 2b236: MISC BASE D56F8D64413D lea r28, ptr [r9+r24*2+0x3d] +XDIS 2b23c: MISC BASE D56F8D64423E lea r28, ptr [r10+r24*2+0x3e] +XDIS 2b242: MISC BASE D56F8D64433F lea r28, ptr [r11+r24*2+0x3f] +XDIS 2b248: MISC BASE D56F8D644440 lea r28, ptr [r12+r24*2+0x40] +XDIS 2b24e: MISC BASE D56F8D644541 lea r28, ptr [r13+r24*2+0x41] +XDIS 2b254: MISC BASE D56F8D644642 lea r28, ptr [r14+r24*2+0x42] +XDIS 2b25a: MISC BASE D56F8D644743 lea r28, ptr [r15+r24*2+0x43] +XDIS 2b260: MISC BASE D57E8D644044 lea r28, ptr [r16+r24*2+0x44] +XDIS 2b266: MISC BASE D57E8D644145 lea r28, ptr [r17+r24*2+0x45] +XDIS 2b26c: MISC BASE D57E8D644246 lea r28, ptr [r18+r24*2+0x46] +XDIS 2b272: MISC BASE D57E8D644347 lea r28, ptr [r19+r24*2+0x47] +XDIS 2b278: MISC BASE D57E8D644448 lea r28, ptr [r20+r24*2+0x48] +XDIS 2b27e: MISC BASE D57E8D644549 lea r28, ptr [r21+r24*2+0x49] +XDIS 2b284: MISC BASE D57E8D64464A lea r28, ptr [r22+r24*2+0x4a] +XDIS 2b28a: MISC BASE D57E8D64474B lea r28, ptr [r23+r24*2+0x4b] +XDIS 2b290: MISC BASE D57F8D64404C lea r28, ptr [r24+r24*2+0x4c] +XDIS 2b296: MISC BASE D57F8D64414D lea r28, ptr [r25+r24*2+0x4d] +XDIS 2b29c: MISC BASE D57F8D64424E lea r28, ptr [r26+r24*2+0x4e] +XDIS 2b2a2: MISC BASE D57F8D64434F lea r28, ptr [r27+r24*2+0x4f] +XDIS 2b2a8: MISC BASE D57F8D644450 lea r28, ptr [r28+r24*2+0x50] +XDIS 2b2ae: MISC BASE D57F8D644551 lea r28, ptr [r29+r24*2+0x51] +XDIS 2b2b4: MISC BASE D57F8D644652 lea r28, ptr [r30+r24*2+0x52] +XDIS 2b2ba: MISC BASE D57F8D644753 lea r28, ptr [r31+r24*2+0x53] +XDIS 2b2c0: MISC BASE D56E8D644835 lea r28, ptr [rax+r25*2+0x35] +XDIS 2b2c6: MISC BASE D56E8D644936 lea r28, ptr [rcx+r25*2+0x36] +XDIS 2b2cc: MISC BASE D56E8D644A37 lea r28, ptr [rdx+r25*2+0x37] +XDIS 2b2d2: MISC BASE D56E8D644B38 lea r28, ptr [rbx+r25*2+0x38] +XDIS 2b2d8: MISC BASE D56E8D644C39 lea r28, ptr [rsp+r25*2+0x39] +XDIS 2b2de: MISC BASE D56E8D644D3A lea r28, ptr [rbp+r25*2+0x3a] +XDIS 2b2e4: MISC BASE D56E8D644E3B lea r28, ptr [rsi+r25*2+0x3b] +XDIS 2b2ea: MISC BASE D56E8D644F3C lea r28, ptr [rdi+r25*2+0x3c] +XDIS 2b2f0: MISC BASE D56F8D64483D lea r28, ptr [r8+r25*2+0x3d] +XDIS 2b2f6: MISC BASE D56F8D64493E lea r28, ptr [r9+r25*2+0x3e] +XDIS 2b2fc: MISC BASE D56F8D644A3F lea r28, ptr [r10+r25*2+0x3f] +XDIS 2b302: MISC BASE D56F8D644B40 lea r28, ptr [r11+r25*2+0x40] +XDIS 2b308: MISC BASE D56F8D644C41 lea r28, ptr [r12+r25*2+0x41] +XDIS 2b30e: MISC BASE D56F8D644D42 lea r28, ptr [r13+r25*2+0x42] +XDIS 2b314: MISC BASE D56F8D644E43 lea r28, ptr [r14+r25*2+0x43] +XDIS 2b31a: MISC BASE D56F8D644F44 lea r28, ptr [r15+r25*2+0x44] +XDIS 2b320: MISC BASE D57E8D644845 lea r28, ptr [r16+r25*2+0x45] +XDIS 2b326: MISC BASE D57E8D644946 lea r28, ptr [r17+r25*2+0x46] +XDIS 2b32c: MISC BASE D57E8D644A47 lea r28, ptr [r18+r25*2+0x47] +XDIS 2b332: MISC BASE D57E8D644B48 lea r28, ptr [r19+r25*2+0x48] +XDIS 2b338: MISC BASE D57E8D644C49 lea r28, ptr [r20+r25*2+0x49] +XDIS 2b33e: MISC BASE D57E8D644D4A lea r28, ptr [r21+r25*2+0x4a] +XDIS 2b344: MISC BASE D57E8D644E4B lea r28, ptr [r22+r25*2+0x4b] +XDIS 2b34a: MISC BASE D57E8D644F4C lea r28, ptr [r23+r25*2+0x4c] +XDIS 2b350: MISC BASE D57F8D64484D lea r28, ptr [r24+r25*2+0x4d] +XDIS 2b356: MISC BASE D57F8D64494E lea r28, ptr [r25+r25*2+0x4e] +XDIS 2b35c: MISC BASE D57F8D644A4F lea r28, ptr [r26+r25*2+0x4f] +XDIS 2b362: MISC BASE D57F8D644B50 lea r28, ptr [r27+r25*2+0x50] +XDIS 2b368: MISC BASE D57F8D644C51 lea r28, ptr [r28+r25*2+0x51] +XDIS 2b36e: MISC BASE D57F8D644D52 lea r28, ptr [r29+r25*2+0x52] +XDIS 2b374: MISC BASE D57F8D644E53 lea r28, ptr [r30+r25*2+0x53] +XDIS 2b37a: MISC BASE D57F8D644F54 lea r28, ptr [r31+r25*2+0x54] +XDIS 2b380: MISC BASE D56E8D645036 lea r28, ptr [rax+r26*2+0x36] +XDIS 2b386: MISC BASE D56E8D645137 lea r28, ptr [rcx+r26*2+0x37] +XDIS 2b38c: MISC BASE D56E8D645238 lea r28, ptr [rdx+r26*2+0x38] +XDIS 2b392: MISC BASE D56E8D645339 lea r28, ptr [rbx+r26*2+0x39] +XDIS 2b398: MISC BASE D56E8D64543A lea r28, ptr [rsp+r26*2+0x3a] +XDIS 2b39e: MISC BASE D56E8D64553B lea r28, ptr [rbp+r26*2+0x3b] +XDIS 2b3a4: MISC BASE D56E8D64563C lea r28, ptr [rsi+r26*2+0x3c] +XDIS 2b3aa: MISC BASE D56E8D64573D lea r28, ptr [rdi+r26*2+0x3d] +XDIS 2b3b0: MISC BASE D56F8D64503E lea r28, ptr [r8+r26*2+0x3e] +XDIS 2b3b6: MISC BASE D56F8D64513F lea r28, ptr [r9+r26*2+0x3f] +XDIS 2b3bc: MISC BASE D56F8D645240 lea r28, ptr [r10+r26*2+0x40] +XDIS 2b3c2: MISC BASE D56F8D645341 lea r28, ptr [r11+r26*2+0x41] +XDIS 2b3c8: MISC BASE D56F8D645442 lea r28, ptr [r12+r26*2+0x42] +XDIS 2b3ce: MISC BASE D56F8D645543 lea r28, ptr [r13+r26*2+0x43] +XDIS 2b3d4: MISC BASE D56F8D645644 lea r28, ptr [r14+r26*2+0x44] +XDIS 2b3da: MISC BASE D56F8D645745 lea r28, ptr [r15+r26*2+0x45] +XDIS 2b3e0: MISC BASE D57E8D645046 lea r28, ptr [r16+r26*2+0x46] +XDIS 2b3e6: MISC BASE D57E8D645147 lea r28, ptr [r17+r26*2+0x47] +XDIS 2b3ec: MISC BASE D57E8D645248 lea r28, ptr [r18+r26*2+0x48] +XDIS 2b3f2: MISC BASE D57E8D645349 lea r28, ptr [r19+r26*2+0x49] +XDIS 2b3f8: MISC BASE D57E8D64544A lea r28, ptr [r20+r26*2+0x4a] +XDIS 2b3fe: MISC BASE D57E8D64554B lea r28, ptr [r21+r26*2+0x4b] +XDIS 2b404: MISC BASE D57E8D64564C lea r28, ptr [r22+r26*2+0x4c] +XDIS 2b40a: MISC BASE D57E8D64574D lea r28, ptr [r23+r26*2+0x4d] +XDIS 2b410: MISC BASE D57F8D64504E lea r28, ptr [r24+r26*2+0x4e] +XDIS 2b416: MISC BASE D57F8D64514F lea r28, ptr [r25+r26*2+0x4f] +XDIS 2b41c: MISC BASE D57F8D645250 lea r28, ptr [r26+r26*2+0x50] +XDIS 2b422: MISC BASE D57F8D645351 lea r28, ptr [r27+r26*2+0x51] +XDIS 2b428: MISC BASE D57F8D645452 lea r28, ptr [r28+r26*2+0x52] +XDIS 2b42e: MISC BASE D57F8D645553 lea r28, ptr [r29+r26*2+0x53] +XDIS 2b434: MISC BASE D57F8D645654 lea r28, ptr [r30+r26*2+0x54] +XDIS 2b43a: MISC BASE D57F8D645755 lea r28, ptr [r31+r26*2+0x55] +XDIS 2b440: MISC BASE D56E8D645837 lea r28, ptr [rax+r27*2+0x37] +XDIS 2b446: MISC BASE D56E8D645938 lea r28, ptr [rcx+r27*2+0x38] +XDIS 2b44c: MISC BASE D56E8D645A39 lea r28, ptr [rdx+r27*2+0x39] +XDIS 2b452: MISC BASE D56E8D645B3A lea r28, ptr [rbx+r27*2+0x3a] +XDIS 2b458: MISC BASE D56E8D645C3B lea r28, ptr [rsp+r27*2+0x3b] +XDIS 2b45e: MISC BASE D56E8D645D3C lea r28, ptr [rbp+r27*2+0x3c] +XDIS 2b464: MISC BASE D56E8D645E3D lea r28, ptr [rsi+r27*2+0x3d] +XDIS 2b46a: MISC BASE D56E8D645F3E lea r28, ptr [rdi+r27*2+0x3e] +XDIS 2b470: MISC BASE D56F8D64583F lea r28, ptr [r8+r27*2+0x3f] +XDIS 2b476: MISC BASE D56F8D645940 lea r28, ptr [r9+r27*2+0x40] +XDIS 2b47c: MISC BASE D56F8D645A41 lea r28, ptr [r10+r27*2+0x41] +XDIS 2b482: MISC BASE D56F8D645B42 lea r28, ptr [r11+r27*2+0x42] +XDIS 2b488: MISC BASE D56F8D645C43 lea r28, ptr [r12+r27*2+0x43] +XDIS 2b48e: MISC BASE D56F8D645D44 lea r28, ptr [r13+r27*2+0x44] +XDIS 2b494: MISC BASE D56F8D645E45 lea r28, ptr [r14+r27*2+0x45] +XDIS 2b49a: MISC BASE D56F8D645F46 lea r28, ptr [r15+r27*2+0x46] +XDIS 2b4a0: MISC BASE D57E8D645847 lea r28, ptr [r16+r27*2+0x47] +XDIS 2b4a6: MISC BASE D57E8D645948 lea r28, ptr [r17+r27*2+0x48] +XDIS 2b4ac: MISC BASE D57E8D645A49 lea r28, ptr [r18+r27*2+0x49] +XDIS 2b4b2: MISC BASE D57E8D645B4A lea r28, ptr [r19+r27*2+0x4a] +XDIS 2b4b8: MISC BASE D57E8D645C4B lea r28, ptr [r20+r27*2+0x4b] +XDIS 2b4be: MISC BASE D57E8D645D4C lea r28, ptr [r21+r27*2+0x4c] +XDIS 2b4c4: MISC BASE D57E8D645E4D lea r28, ptr [r22+r27*2+0x4d] +XDIS 2b4ca: MISC BASE D57E8D645F4E lea r28, ptr [r23+r27*2+0x4e] +XDIS 2b4d0: MISC BASE D57F8D64584F lea r28, ptr [r24+r27*2+0x4f] +XDIS 2b4d6: MISC BASE D57F8D645950 lea r28, ptr [r25+r27*2+0x50] +XDIS 2b4dc: MISC BASE D57F8D645A51 lea r28, ptr [r26+r27*2+0x51] +XDIS 2b4e2: MISC BASE D57F8D645B52 lea r28, ptr [r27+r27*2+0x52] +XDIS 2b4e8: MISC BASE D57F8D645C53 lea r28, ptr [r28+r27*2+0x53] +XDIS 2b4ee: MISC BASE D57F8D645D54 lea r28, ptr [r29+r27*2+0x54] +XDIS 2b4f4: MISC BASE D57F8D645E55 lea r28, ptr [r30+r27*2+0x55] +XDIS 2b4fa: MISC BASE D57F8D645F56 lea r28, ptr [r31+r27*2+0x56] +XDIS 2b500: MISC BASE D56E8D646038 lea r28, ptr [rax+r28*2+0x38] +XDIS 2b506: MISC BASE D56E8D646139 lea r28, ptr [rcx+r28*2+0x39] +XDIS 2b50c: MISC BASE D56E8D64623A lea r28, ptr [rdx+r28*2+0x3a] +XDIS 2b512: MISC BASE D56E8D64633B lea r28, ptr [rbx+r28*2+0x3b] +XDIS 2b518: MISC BASE D56E8D64643C lea r28, ptr [rsp+r28*2+0x3c] +XDIS 2b51e: MISC BASE D56E8D64653D lea r28, ptr [rbp+r28*2+0x3d] +XDIS 2b524: MISC BASE D56E8D64663E lea r28, ptr [rsi+r28*2+0x3e] +XDIS 2b52a: MISC BASE D56E8D64673F lea r28, ptr [rdi+r28*2+0x3f] +XDIS 2b530: MISC BASE D56F8D646040 lea r28, ptr [r8+r28*2+0x40] +XDIS 2b536: MISC BASE D56F8D646141 lea r28, ptr [r9+r28*2+0x41] +XDIS 2b53c: MISC BASE D56F8D646242 lea r28, ptr [r10+r28*2+0x42] +XDIS 2b542: MISC BASE D56F8D646343 lea r28, ptr [r11+r28*2+0x43] +XDIS 2b548: MISC BASE D56F8D646444 lea r28, ptr [r12+r28*2+0x44] +XDIS 2b54e: MISC BASE D56F8D646545 lea r28, ptr [r13+r28*2+0x45] +XDIS 2b554: MISC BASE D56F8D646646 lea r28, ptr [r14+r28*2+0x46] +XDIS 2b55a: MISC BASE D56F8D646747 lea r28, ptr [r15+r28*2+0x47] +XDIS 2b560: MISC BASE D57E8D646048 lea r28, ptr [r16+r28*2+0x48] +XDIS 2b566: MISC BASE D57E8D646149 lea r28, ptr [r17+r28*2+0x49] +XDIS 2b56c: MISC BASE D57E8D64624A lea r28, ptr [r18+r28*2+0x4a] +XDIS 2b572: MISC BASE D57E8D64634B lea r28, ptr [r19+r28*2+0x4b] +XDIS 2b578: MISC BASE D57E8D64644C lea r28, ptr [r20+r28*2+0x4c] +XDIS 2b57e: MISC BASE D57E8D64654D lea r28, ptr [r21+r28*2+0x4d] +XDIS 2b584: MISC BASE D57E8D64664E lea r28, ptr [r22+r28*2+0x4e] +XDIS 2b58a: MISC BASE D57E8D64674F lea r28, ptr [r23+r28*2+0x4f] +XDIS 2b590: MISC BASE D57F8D646050 lea r28, ptr [r24+r28*2+0x50] +XDIS 2b596: MISC BASE D57F8D646151 lea r28, ptr [r25+r28*2+0x51] +XDIS 2b59c: MISC BASE D57F8D646252 lea r28, ptr [r26+r28*2+0x52] +XDIS 2b5a2: MISC BASE D57F8D646353 lea r28, ptr [r27+r28*2+0x53] +XDIS 2b5a8: MISC BASE D57F8D646454 lea r28, ptr [r28+r28*2+0x54] +XDIS 2b5ae: MISC BASE D57F8D646555 lea r28, ptr [r29+r28*2+0x55] +XDIS 2b5b4: MISC BASE D57F8D646656 lea r28, ptr [r30+r28*2+0x56] +XDIS 2b5ba: MISC BASE D57F8D646757 lea r28, ptr [r31+r28*2+0x57] +XDIS 2b5c0: MISC BASE D56E8D646839 lea r28, ptr [rax+r29*2+0x39] +XDIS 2b5c6: MISC BASE D56E8D64693A lea r28, ptr [rcx+r29*2+0x3a] +XDIS 2b5cc: MISC BASE D56E8D646A3B lea r28, ptr [rdx+r29*2+0x3b] +XDIS 2b5d2: MISC BASE D56E8D646B3C lea r28, ptr [rbx+r29*2+0x3c] +XDIS 2b5d8: MISC BASE D56E8D646C3D lea r28, ptr [rsp+r29*2+0x3d] +XDIS 2b5de: MISC BASE D56E8D646D3E lea r28, ptr [rbp+r29*2+0x3e] +XDIS 2b5e4: MISC BASE D56E8D646E3F lea r28, ptr [rsi+r29*2+0x3f] +XDIS 2b5ea: MISC BASE D56E8D646F40 lea r28, ptr [rdi+r29*2+0x40] +XDIS 2b5f0: MISC BASE D56F8D646841 lea r28, ptr [r8+r29*2+0x41] +XDIS 2b5f6: MISC BASE D56F8D646942 lea r28, ptr [r9+r29*2+0x42] +XDIS 2b5fc: MISC BASE D56F8D646A43 lea r28, ptr [r10+r29*2+0x43] +XDIS 2b602: MISC BASE D56F8D646B44 lea r28, ptr [r11+r29*2+0x44] +XDIS 2b608: MISC BASE D56F8D646C45 lea r28, ptr [r12+r29*2+0x45] +XDIS 2b60e: MISC BASE D56F8D646D46 lea r28, ptr [r13+r29*2+0x46] +XDIS 2b614: MISC BASE D56F8D646E47 lea r28, ptr [r14+r29*2+0x47] +XDIS 2b61a: MISC BASE D56F8D646F48 lea r28, ptr [r15+r29*2+0x48] +XDIS 2b620: MISC BASE D57E8D646849 lea r28, ptr [r16+r29*2+0x49] +XDIS 2b626: MISC BASE D57E8D64694A lea r28, ptr [r17+r29*2+0x4a] +XDIS 2b62c: MISC BASE D57E8D646A4B lea r28, ptr [r18+r29*2+0x4b] +XDIS 2b632: MISC BASE D57E8D646B4C lea r28, ptr [r19+r29*2+0x4c] +XDIS 2b638: MISC BASE D57E8D646C4D lea r28, ptr [r20+r29*2+0x4d] +XDIS 2b63e: MISC BASE D57E8D646D4E lea r28, ptr [r21+r29*2+0x4e] +XDIS 2b644: MISC BASE D57E8D646E4F lea r28, ptr [r22+r29*2+0x4f] +XDIS 2b64a: MISC BASE D57E8D646F50 lea r28, ptr [r23+r29*2+0x50] +XDIS 2b650: MISC BASE D57F8D646851 lea r28, ptr [r24+r29*2+0x51] +XDIS 2b656: MISC BASE D57F8D646952 lea r28, ptr [r25+r29*2+0x52] +XDIS 2b65c: MISC BASE D57F8D646A53 lea r28, ptr [r26+r29*2+0x53] +XDIS 2b662: MISC BASE D57F8D646B54 lea r28, ptr [r27+r29*2+0x54] +XDIS 2b668: MISC BASE D57F8D646C55 lea r28, ptr [r28+r29*2+0x55] +XDIS 2b66e: MISC BASE D57F8D646D56 lea r28, ptr [r29+r29*2+0x56] +XDIS 2b674: MISC BASE D57F8D646E57 lea r28, ptr [r30+r29*2+0x57] +XDIS 2b67a: MISC BASE D57F8D646F58 lea r28, ptr [r31+r29*2+0x58] +XDIS 2b680: MISC BASE D56E8D64703A lea r28, ptr [rax+r30*2+0x3a] +XDIS 2b686: MISC BASE D56E8D64713B lea r28, ptr [rcx+r30*2+0x3b] +XDIS 2b68c: MISC BASE D56E8D64723C lea r28, ptr [rdx+r30*2+0x3c] +XDIS 2b692: MISC BASE D56E8D64733D lea r28, ptr [rbx+r30*2+0x3d] +XDIS 2b698: MISC BASE D56E8D64743E lea r28, ptr [rsp+r30*2+0x3e] +XDIS 2b69e: MISC BASE D56E8D64753F lea r28, ptr [rbp+r30*2+0x3f] +XDIS 2b6a4: MISC BASE D56E8D647640 lea r28, ptr [rsi+r30*2+0x40] +XDIS 2b6aa: MISC BASE D56E8D647741 lea r28, ptr [rdi+r30*2+0x41] +XDIS 2b6b0: MISC BASE D56F8D647042 lea r28, ptr [r8+r30*2+0x42] +XDIS 2b6b6: MISC BASE D56F8D647143 lea r28, ptr [r9+r30*2+0x43] +XDIS 2b6bc: MISC BASE D56F8D647244 lea r28, ptr [r10+r30*2+0x44] +XDIS 2b6c2: MISC BASE D56F8D647345 lea r28, ptr [r11+r30*2+0x45] +XDIS 2b6c8: MISC BASE D56F8D647446 lea r28, ptr [r12+r30*2+0x46] +XDIS 2b6ce: MISC BASE D56F8D647547 lea r28, ptr [r13+r30*2+0x47] +XDIS 2b6d4: MISC BASE D56F8D647648 lea r28, ptr [r14+r30*2+0x48] +XDIS 2b6da: MISC BASE D56F8D647749 lea r28, ptr [r15+r30*2+0x49] +XDIS 2b6e0: MISC BASE D57E8D64704A lea r28, ptr [r16+r30*2+0x4a] +XDIS 2b6e6: MISC BASE D57E8D64714B lea r28, ptr [r17+r30*2+0x4b] +XDIS 2b6ec: MISC BASE D57E8D64724C lea r28, ptr [r18+r30*2+0x4c] +XDIS 2b6f2: MISC BASE D57E8D64734D lea r28, ptr [r19+r30*2+0x4d] +XDIS 2b6f8: MISC BASE D57E8D64744E lea r28, ptr [r20+r30*2+0x4e] +XDIS 2b6fe: MISC BASE D57E8D64754F lea r28, ptr [r21+r30*2+0x4f] +XDIS 2b704: MISC BASE D57E8D647650 lea r28, ptr [r22+r30*2+0x50] +XDIS 2b70a: MISC BASE D57E8D647751 lea r28, ptr [r23+r30*2+0x51] +XDIS 2b710: MISC BASE D57F8D647052 lea r28, ptr [r24+r30*2+0x52] +XDIS 2b716: MISC BASE D57F8D647153 lea r28, ptr [r25+r30*2+0x53] +XDIS 2b71c: MISC BASE D57F8D647254 lea r28, ptr [r26+r30*2+0x54] +XDIS 2b722: MISC BASE D57F8D647355 lea r28, ptr [r27+r30*2+0x55] +XDIS 2b728: MISC BASE D57F8D647456 lea r28, ptr [r28+r30*2+0x56] +XDIS 2b72e: MISC BASE D57F8D647557 lea r28, ptr [r29+r30*2+0x57] +XDIS 2b734: MISC BASE D57F8D647658 lea r28, ptr [r30+r30*2+0x58] +XDIS 2b73a: MISC BASE D57F8D647759 lea r28, ptr [r31+r30*2+0x59] +XDIS 2b740: MISC BASE D56E8D64783B lea r28, ptr [rax+r31*2+0x3b] +XDIS 2b746: MISC BASE D56E8D64793C lea r28, ptr [rcx+r31*2+0x3c] +XDIS 2b74c: MISC BASE D56E8D647A3D lea r28, ptr [rdx+r31*2+0x3d] +XDIS 2b752: MISC BASE D56E8D647B3E lea r28, ptr [rbx+r31*2+0x3e] +XDIS 2b758: MISC BASE D56E8D647C3F lea r28, ptr [rsp+r31*2+0x3f] +XDIS 2b75e: MISC BASE D56E8D647D40 lea r28, ptr [rbp+r31*2+0x40] +XDIS 2b764: MISC BASE D56E8D647E41 lea r28, ptr [rsi+r31*2+0x41] +XDIS 2b76a: MISC BASE D56E8D647F42 lea r28, ptr [rdi+r31*2+0x42] +XDIS 2b770: MISC BASE D56F8D647843 lea r28, ptr [r8+r31*2+0x43] +XDIS 2b776: MISC BASE D56F8D647944 lea r28, ptr [r9+r31*2+0x44] +XDIS 2b77c: MISC BASE D56F8D647A45 lea r28, ptr [r10+r31*2+0x45] +XDIS 2b782: MISC BASE D56F8D647B46 lea r28, ptr [r11+r31*2+0x46] +XDIS 2b788: MISC BASE D56F8D647C47 lea r28, ptr [r12+r31*2+0x47] +XDIS 2b78e: MISC BASE D56F8D647D48 lea r28, ptr [r13+r31*2+0x48] +XDIS 2b794: MISC BASE D56F8D647E49 lea r28, ptr [r14+r31*2+0x49] +XDIS 2b79a: MISC BASE D56F8D647F4A lea r28, ptr [r15+r31*2+0x4a] +XDIS 2b7a0: MISC BASE D57E8D64784B lea r28, ptr [r16+r31*2+0x4b] +XDIS 2b7a6: MISC BASE D57E8D64794C lea r28, ptr [r17+r31*2+0x4c] +XDIS 2b7ac: MISC BASE D57E8D647A4D lea r28, ptr [r18+r31*2+0x4d] +XDIS 2b7b2: MISC BASE D57E8D647B4E lea r28, ptr [r19+r31*2+0x4e] +XDIS 2b7b8: MISC BASE D57E8D647C4F lea r28, ptr [r20+r31*2+0x4f] +XDIS 2b7be: MISC BASE D57E8D647D50 lea r28, ptr [r21+r31*2+0x50] +XDIS 2b7c4: MISC BASE D57E8D647E51 lea r28, ptr [r22+r31*2+0x51] +XDIS 2b7ca: MISC BASE D57E8D647F52 lea r28, ptr [r23+r31*2+0x52] +XDIS 2b7d0: MISC BASE D57F8D647853 lea r28, ptr [r24+r31*2+0x53] +XDIS 2b7d6: MISC BASE D57F8D647954 lea r28, ptr [r25+r31*2+0x54] +XDIS 2b7dc: MISC BASE D57F8D647A55 lea r28, ptr [r26+r31*2+0x55] +XDIS 2b7e2: MISC BASE D57F8D647B56 lea r28, ptr [r27+r31*2+0x56] +XDIS 2b7e8: MISC BASE D57F8D647C57 lea r28, ptr [r28+r31*2+0x57] +XDIS 2b7ee: MISC BASE D57F8D647D58 lea r28, ptr [r29+r31*2+0x58] +XDIS 2b7f4: MISC BASE D57F8D647E59 lea r28, ptr [r30+r31*2+0x59] +XDIS 2b7fa: MISC BASE D57F8D647F5A lea r28, ptr [r31+r31*2+0x5a] +XDIS 2b800: MISC BASE D54C8D6C401D lea r29, ptr [rax+rax*2+0x1d] +XDIS 2b806: MISC BASE D54C8D6C411E lea r29, ptr [rcx+rax*2+0x1e] +XDIS 2b80c: MISC BASE D54C8D6C421F lea r29, ptr [rdx+rax*2+0x1f] +XDIS 2b812: MISC BASE D54C8D6C4320 lea r29, ptr [rbx+rax*2+0x20] +XDIS 2b818: MISC BASE D54C8D6C4421 lea r29, ptr [rsp+rax*2+0x21] +XDIS 2b81e: MISC BASE D54C8D6C4522 lea r29, ptr [rbp+rax*2+0x22] +XDIS 2b824: MISC BASE D54C8D6C4623 lea r29, ptr [rsi+rax*2+0x23] +XDIS 2b82a: MISC BASE D54C8D6C4724 lea r29, ptr [rdi+rax*2+0x24] +XDIS 2b830: MISC BASE D54D8D6C4025 lea r29, ptr [r8+rax*2+0x25] +XDIS 2b836: MISC BASE D54D8D6C4126 lea r29, ptr [r9+rax*2+0x26] +XDIS 2b83c: MISC BASE D54D8D6C4227 lea r29, ptr [r10+rax*2+0x27] +XDIS 2b842: MISC BASE D54D8D6C4328 lea r29, ptr [r11+rax*2+0x28] +XDIS 2b848: MISC BASE D54D8D6C4429 lea r29, ptr [r12+rax*2+0x29] +XDIS 2b84e: MISC BASE D54D8D6C452A lea r29, ptr [r13+rax*2+0x2a] +XDIS 2b854: MISC BASE D54D8D6C462B lea r29, ptr [r14+rax*2+0x2b] +XDIS 2b85a: MISC BASE D54D8D6C472C lea r29, ptr [r15+rax*2+0x2c] +XDIS 2b860: MISC BASE D55C8D6C402D lea r29, ptr [r16+rax*2+0x2d] +XDIS 2b866: MISC BASE D55C8D6C412E lea r29, ptr [r17+rax*2+0x2e] +XDIS 2b86c: MISC BASE D55C8D6C422F lea r29, ptr [r18+rax*2+0x2f] +XDIS 2b872: MISC BASE D55C8D6C4330 lea r29, ptr [r19+rax*2+0x30] +XDIS 2b878: MISC BASE D55C8D6C4431 lea r29, ptr [r20+rax*2+0x31] +XDIS 2b87e: MISC BASE D55C8D6C4532 lea r29, ptr [r21+rax*2+0x32] +XDIS 2b884: MISC BASE D55C8D6C4633 lea r29, ptr [r22+rax*2+0x33] +XDIS 2b88a: MISC BASE D55C8D6C4734 lea r29, ptr [r23+rax*2+0x34] +XDIS 2b890: MISC BASE D55D8D6C4035 lea r29, ptr [r24+rax*2+0x35] +XDIS 2b896: MISC BASE D55D8D6C4136 lea r29, ptr [r25+rax*2+0x36] +XDIS 2b89c: MISC BASE D55D8D6C4237 lea r29, ptr [r26+rax*2+0x37] +XDIS 2b8a2: MISC BASE D55D8D6C4338 lea r29, ptr [r27+rax*2+0x38] +XDIS 2b8a8: MISC BASE D55D8D6C4439 lea r29, ptr [r28+rax*2+0x39] +XDIS 2b8ae: MISC BASE D55D8D6C453A lea r29, ptr [r29+rax*2+0x3a] +XDIS 2b8b4: MISC BASE D55D8D6C463B lea r29, ptr [r30+rax*2+0x3b] +XDIS 2b8ba: MISC BASE D55D8D6C473C lea r29, ptr [r31+rax*2+0x3c] +XDIS 2b8c0: MISC BASE D54C8D6C481E lea r29, ptr [rax+rcx*2+0x1e] +XDIS 2b8c6: MISC BASE D54C8D6C491F lea r29, ptr [rcx+rcx*2+0x1f] +XDIS 2b8cc: MISC BASE D54C8D6C4A20 lea r29, ptr [rdx+rcx*2+0x20] +XDIS 2b8d2: MISC BASE D54C8D6C4B21 lea r29, ptr [rbx+rcx*2+0x21] +XDIS 2b8d8: MISC BASE D54C8D6C4C22 lea r29, ptr [rsp+rcx*2+0x22] +XDIS 2b8de: MISC BASE D54C8D6C4D23 lea r29, ptr [rbp+rcx*2+0x23] +XDIS 2b8e4: MISC BASE D54C8D6C4E24 lea r29, ptr [rsi+rcx*2+0x24] +XDIS 2b8ea: MISC BASE D54C8D6C4F25 lea r29, ptr [rdi+rcx*2+0x25] +XDIS 2b8f0: MISC BASE D54D8D6C4826 lea r29, ptr [r8+rcx*2+0x26] +XDIS 2b8f6: MISC BASE D54D8D6C4927 lea r29, ptr [r9+rcx*2+0x27] +XDIS 2b8fc: MISC BASE D54D8D6C4A28 lea r29, ptr [r10+rcx*2+0x28] +XDIS 2b902: MISC BASE D54D8D6C4B29 lea r29, ptr [r11+rcx*2+0x29] +XDIS 2b908: MISC BASE D54D8D6C4C2A lea r29, ptr [r12+rcx*2+0x2a] +XDIS 2b90e: MISC BASE D54D8D6C4D2B lea r29, ptr [r13+rcx*2+0x2b] +XDIS 2b914: MISC BASE D54D8D6C4E2C lea r29, ptr [r14+rcx*2+0x2c] +XDIS 2b91a: MISC BASE D54D8D6C4F2D lea r29, ptr [r15+rcx*2+0x2d] +XDIS 2b920: MISC BASE D55C8D6C482E lea r29, ptr [r16+rcx*2+0x2e] +XDIS 2b926: MISC BASE D55C8D6C492F lea r29, ptr [r17+rcx*2+0x2f] +XDIS 2b92c: MISC BASE D55C8D6C4A30 lea r29, ptr [r18+rcx*2+0x30] +XDIS 2b932: MISC BASE D55C8D6C4B31 lea r29, ptr [r19+rcx*2+0x31] +XDIS 2b938: MISC BASE D55C8D6C4C32 lea r29, ptr [r20+rcx*2+0x32] +XDIS 2b93e: MISC BASE D55C8D6C4D33 lea r29, ptr [r21+rcx*2+0x33] +XDIS 2b944: MISC BASE D55C8D6C4E34 lea r29, ptr [r22+rcx*2+0x34] +XDIS 2b94a: MISC BASE D55C8D6C4F35 lea r29, ptr [r23+rcx*2+0x35] +XDIS 2b950: MISC BASE D55D8D6C4836 lea r29, ptr [r24+rcx*2+0x36] +XDIS 2b956: MISC BASE D55D8D6C4937 lea r29, ptr [r25+rcx*2+0x37] +XDIS 2b95c: MISC BASE D55D8D6C4A38 lea r29, ptr [r26+rcx*2+0x38] +XDIS 2b962: MISC BASE D55D8D6C4B39 lea r29, ptr [r27+rcx*2+0x39] +XDIS 2b968: MISC BASE D55D8D6C4C3A lea r29, ptr [r28+rcx*2+0x3a] +XDIS 2b96e: MISC BASE D55D8D6C4D3B lea r29, ptr [r29+rcx*2+0x3b] +XDIS 2b974: MISC BASE D55D8D6C4E3C lea r29, ptr [r30+rcx*2+0x3c] +XDIS 2b97a: MISC BASE D55D8D6C4F3D lea r29, ptr [r31+rcx*2+0x3d] +XDIS 2b980: MISC BASE D54C8D6C501F lea r29, ptr [rax+rdx*2+0x1f] +XDIS 2b986: MISC BASE D54C8D6C5120 lea r29, ptr [rcx+rdx*2+0x20] +XDIS 2b98c: MISC BASE D54C8D6C5221 lea r29, ptr [rdx+rdx*2+0x21] +XDIS 2b992: MISC BASE D54C8D6C5322 lea r29, ptr [rbx+rdx*2+0x22] +XDIS 2b998: MISC BASE D54C8D6C5423 lea r29, ptr [rsp+rdx*2+0x23] +XDIS 2b99e: MISC BASE D54C8D6C5524 lea r29, ptr [rbp+rdx*2+0x24] +XDIS 2b9a4: MISC BASE D54C8D6C5625 lea r29, ptr [rsi+rdx*2+0x25] +XDIS 2b9aa: MISC BASE D54C8D6C5726 lea r29, ptr [rdi+rdx*2+0x26] +XDIS 2b9b0: MISC BASE D54D8D6C5027 lea r29, ptr [r8+rdx*2+0x27] +XDIS 2b9b6: MISC BASE D54D8D6C5128 lea r29, ptr [r9+rdx*2+0x28] +XDIS 2b9bc: MISC BASE D54D8D6C5229 lea r29, ptr [r10+rdx*2+0x29] +XDIS 2b9c2: MISC BASE D54D8D6C532A lea r29, ptr [r11+rdx*2+0x2a] +XDIS 2b9c8: MISC BASE D54D8D6C542B lea r29, ptr [r12+rdx*2+0x2b] +XDIS 2b9ce: MISC BASE D54D8D6C552C lea r29, ptr [r13+rdx*2+0x2c] +XDIS 2b9d4: MISC BASE D54D8D6C562D lea r29, ptr [r14+rdx*2+0x2d] +XDIS 2b9da: MISC BASE D54D8D6C572E lea r29, ptr [r15+rdx*2+0x2e] +XDIS 2b9e0: MISC BASE D55C8D6C502F lea r29, ptr [r16+rdx*2+0x2f] +XDIS 2b9e6: MISC BASE D55C8D6C5130 lea r29, ptr [r17+rdx*2+0x30] +XDIS 2b9ec: MISC BASE D55C8D6C5231 lea r29, ptr [r18+rdx*2+0x31] +XDIS 2b9f2: MISC BASE D55C8D6C5332 lea r29, ptr [r19+rdx*2+0x32] +XDIS 2b9f8: MISC BASE D55C8D6C5433 lea r29, ptr [r20+rdx*2+0x33] +XDIS 2b9fe: MISC BASE D55C8D6C5534 lea r29, ptr [r21+rdx*2+0x34] +XDIS 2ba04: MISC BASE D55C8D6C5635 lea r29, ptr [r22+rdx*2+0x35] +XDIS 2ba0a: MISC BASE D55C8D6C5736 lea r29, ptr [r23+rdx*2+0x36] +XDIS 2ba10: MISC BASE D55D8D6C5037 lea r29, ptr [r24+rdx*2+0x37] +XDIS 2ba16: MISC BASE D55D8D6C5138 lea r29, ptr [r25+rdx*2+0x38] +XDIS 2ba1c: MISC BASE D55D8D6C5239 lea r29, ptr [r26+rdx*2+0x39] +XDIS 2ba22: MISC BASE D55D8D6C533A lea r29, ptr [r27+rdx*2+0x3a] +XDIS 2ba28: MISC BASE D55D8D6C543B lea r29, ptr [r28+rdx*2+0x3b] +XDIS 2ba2e: MISC BASE D55D8D6C553C lea r29, ptr [r29+rdx*2+0x3c] +XDIS 2ba34: MISC BASE D55D8D6C563D lea r29, ptr [r30+rdx*2+0x3d] +XDIS 2ba3a: MISC BASE D55D8D6C573E lea r29, ptr [r31+rdx*2+0x3e] +XDIS 2ba40: MISC BASE D54C8D6C5820 lea r29, ptr [rax+rbx*2+0x20] +XDIS 2ba46: MISC BASE D54C8D6C5921 lea r29, ptr [rcx+rbx*2+0x21] +XDIS 2ba4c: MISC BASE D54C8D6C5A22 lea r29, ptr [rdx+rbx*2+0x22] +XDIS 2ba52: MISC BASE D54C8D6C5B23 lea r29, ptr [rbx+rbx*2+0x23] +XDIS 2ba58: MISC BASE D54C8D6C5C24 lea r29, ptr [rsp+rbx*2+0x24] +XDIS 2ba5e: MISC BASE D54C8D6C5D25 lea r29, ptr [rbp+rbx*2+0x25] +XDIS 2ba64: MISC BASE D54C8D6C5E26 lea r29, ptr [rsi+rbx*2+0x26] +XDIS 2ba6a: MISC BASE D54C8D6C5F27 lea r29, ptr [rdi+rbx*2+0x27] +XDIS 2ba70: MISC BASE D54D8D6C5828 lea r29, ptr [r8+rbx*2+0x28] +XDIS 2ba76: MISC BASE D54D8D6C5929 lea r29, ptr [r9+rbx*2+0x29] +XDIS 2ba7c: MISC BASE D54D8D6C5A2A lea r29, ptr [r10+rbx*2+0x2a] +XDIS 2ba82: MISC BASE D54D8D6C5B2B lea r29, ptr [r11+rbx*2+0x2b] +XDIS 2ba88: MISC BASE D54D8D6C5C2C lea r29, ptr [r12+rbx*2+0x2c] +XDIS 2ba8e: MISC BASE D54D8D6C5D2D lea r29, ptr [r13+rbx*2+0x2d] +XDIS 2ba94: MISC BASE D54D8D6C5E2E lea r29, ptr [r14+rbx*2+0x2e] +XDIS 2ba9a: MISC BASE D54D8D6C5F2F lea r29, ptr [r15+rbx*2+0x2f] +XDIS 2baa0: MISC BASE D55C8D6C5830 lea r29, ptr [r16+rbx*2+0x30] +XDIS 2baa6: MISC BASE D55C8D6C5931 lea r29, ptr [r17+rbx*2+0x31] +XDIS 2baac: MISC BASE D55C8D6C5A32 lea r29, ptr [r18+rbx*2+0x32] +XDIS 2bab2: MISC BASE D55C8D6C5B33 lea r29, ptr [r19+rbx*2+0x33] +XDIS 2bab8: MISC BASE D55C8D6C5C34 lea r29, ptr [r20+rbx*2+0x34] +XDIS 2babe: MISC BASE D55C8D6C5D35 lea r29, ptr [r21+rbx*2+0x35] +XDIS 2bac4: MISC BASE D55C8D6C5E36 lea r29, ptr [r22+rbx*2+0x36] +XDIS 2baca: MISC BASE D55C8D6C5F37 lea r29, ptr [r23+rbx*2+0x37] +XDIS 2bad0: MISC BASE D55D8D6C5838 lea r29, ptr [r24+rbx*2+0x38] +XDIS 2bad6: MISC BASE D55D8D6C5939 lea r29, ptr [r25+rbx*2+0x39] +XDIS 2badc: MISC BASE D55D8D6C5A3A lea r29, ptr [r26+rbx*2+0x3a] +XDIS 2bae2: MISC BASE D55D8D6C5B3B lea r29, ptr [r27+rbx*2+0x3b] +XDIS 2bae8: MISC BASE D55D8D6C5C3C lea r29, ptr [r28+rbx*2+0x3c] +XDIS 2baee: MISC BASE D55D8D6C5D3D lea r29, ptr [r29+rbx*2+0x3d] +XDIS 2baf4: MISC BASE D55D8D6C5E3E lea r29, ptr [r30+rbx*2+0x3e] +XDIS 2bafa: MISC BASE D55D8D6C5F3F lea r29, ptr [r31+rbx*2+0x3f] +XDIS 2bb00: MISC BASE D54C8D6C6021 lea r29, ptr [rax+0x21] +XDIS 2bb06: MISC BASE D54C8D6C6122 lea r29, ptr [rcx+0x22] +XDIS 2bb0c: MISC BASE D54C8D6C6223 lea r29, ptr [rdx+0x23] +XDIS 2bb12: MISC BASE D54C8D6C6324 lea r29, ptr [rbx+0x24] +XDIS 2bb18: MISC BASE D54C8D6C6425 lea r29, ptr [rsp+0x25] +XDIS 2bb1e: MISC BASE D54C8D6C6526 lea r29, ptr [rbp+0x26] +XDIS 2bb24: MISC BASE D54C8D6C6627 lea r29, ptr [rsi+0x27] +XDIS 2bb2a: MISC BASE D54C8D6C6728 lea r29, ptr [rdi+0x28] +XDIS 2bb30: MISC BASE D54D8D6C6029 lea r29, ptr [r8+0x29] +XDIS 2bb36: MISC BASE D54D8D6C612A lea r29, ptr [r9+0x2a] +XDIS 2bb3c: MISC BASE D54D8D6C622B lea r29, ptr [r10+0x2b] +XDIS 2bb42: MISC BASE D54D8D6C632C lea r29, ptr [r11+0x2c] +XDIS 2bb48: MISC BASE D54D8D6C642D lea r29, ptr [r12+0x2d] +XDIS 2bb4e: MISC BASE D54D8D6C652E lea r29, ptr [r13+0x2e] +XDIS 2bb54: MISC BASE D54D8D6C662F lea r29, ptr [r14+0x2f] +XDIS 2bb5a: MISC BASE D54D8D6C6730 lea r29, ptr [r15+0x30] +XDIS 2bb60: MISC BASE D55C8D6C6031 lea r29, ptr [r16+0x31] +XDIS 2bb66: MISC BASE D55C8D6C6132 lea r29, ptr [r17+0x32] +XDIS 2bb6c: MISC BASE D55C8D6C6233 lea r29, ptr [r18+0x33] +XDIS 2bb72: MISC BASE D55C8D6C6334 lea r29, ptr [r19+0x34] +XDIS 2bb78: MISC BASE D55C8D6C6435 lea r29, ptr [r20+0x35] +XDIS 2bb7e: MISC BASE D55C8D6C6536 lea r29, ptr [r21+0x36] +XDIS 2bb84: MISC BASE D55C8D6C6637 lea r29, ptr [r22+0x37] +XDIS 2bb8a: MISC BASE D55C8D6C6738 lea r29, ptr [r23+0x38] +XDIS 2bb90: MISC BASE D55D8D6C6039 lea r29, ptr [r24+0x39] +XDIS 2bb96: MISC BASE D55D8D6C613A lea r29, ptr [r25+0x3a] +XDIS 2bb9c: MISC BASE D55D8D6C623B lea r29, ptr [r26+0x3b] +XDIS 2bba2: MISC BASE D55D8D6C633C lea r29, ptr [r27+0x3c] +XDIS 2bba8: MISC BASE D55D8D6C643D lea r29, ptr [r28+0x3d] +XDIS 2bbae: MISC BASE D55D8D6C653E lea r29, ptr [r29+0x3e] +XDIS 2bbb4: MISC BASE D55D8D6C663F lea r29, ptr [r30+0x3f] +XDIS 2bbba: MISC BASE D55D8D6C6740 lea r29, ptr [r31+0x40] +XDIS 2bbc0: MISC BASE D54C8D6C6822 lea r29, ptr [rax+rbp*2+0x22] +XDIS 2bbc6: MISC BASE D54C8D6C6923 lea r29, ptr [rcx+rbp*2+0x23] +XDIS 2bbcc: MISC BASE D54C8D6C6A24 lea r29, ptr [rdx+rbp*2+0x24] +XDIS 2bbd2: MISC BASE D54C8D6C6B25 lea r29, ptr [rbx+rbp*2+0x25] +XDIS 2bbd8: MISC BASE D54C8D6C6C26 lea r29, ptr [rsp+rbp*2+0x26] +XDIS 2bbde: MISC BASE D54C8D6C6D27 lea r29, ptr [rbp+rbp*2+0x27] +XDIS 2bbe4: MISC BASE D54C8D6C6E28 lea r29, ptr [rsi+rbp*2+0x28] +XDIS 2bbea: MISC BASE D54C8D6C6F29 lea r29, ptr [rdi+rbp*2+0x29] +XDIS 2bbf0: MISC BASE D54D8D6C682A lea r29, ptr [r8+rbp*2+0x2a] +XDIS 2bbf6: MISC BASE D54D8D6C692B lea r29, ptr [r9+rbp*2+0x2b] +XDIS 2bbfc: MISC BASE D54D8D6C6A2C lea r29, ptr [r10+rbp*2+0x2c] +XDIS 2bc02: MISC BASE D54D8D6C6B2D lea r29, ptr [r11+rbp*2+0x2d] +XDIS 2bc08: MISC BASE D54D8D6C6C2E lea r29, ptr [r12+rbp*2+0x2e] +XDIS 2bc0e: MISC BASE D54D8D6C6D2F lea r29, ptr [r13+rbp*2+0x2f] +XDIS 2bc14: MISC BASE D54D8D6C6E30 lea r29, ptr [r14+rbp*2+0x30] +XDIS 2bc1a: MISC BASE D54D8D6C6F31 lea r29, ptr [r15+rbp*2+0x31] +XDIS 2bc20: MISC BASE D55C8D6C6832 lea r29, ptr [r16+rbp*2+0x32] +XDIS 2bc26: MISC BASE D55C8D6C6933 lea r29, ptr [r17+rbp*2+0x33] +XDIS 2bc2c: MISC BASE D55C8D6C6A34 lea r29, ptr [r18+rbp*2+0x34] +XDIS 2bc32: MISC BASE D55C8D6C6B35 lea r29, ptr [r19+rbp*2+0x35] +XDIS 2bc38: MISC BASE D55C8D6C6C36 lea r29, ptr [r20+rbp*2+0x36] +XDIS 2bc3e: MISC BASE D55C8D6C6D37 lea r29, ptr [r21+rbp*2+0x37] +XDIS 2bc44: MISC BASE D55C8D6C6E38 lea r29, ptr [r22+rbp*2+0x38] +XDIS 2bc4a: MISC BASE D55C8D6C6F39 lea r29, ptr [r23+rbp*2+0x39] +XDIS 2bc50: MISC BASE D55D8D6C683A lea r29, ptr [r24+rbp*2+0x3a] +XDIS 2bc56: MISC BASE D55D8D6C693B lea r29, ptr [r25+rbp*2+0x3b] +XDIS 2bc5c: MISC BASE D55D8D6C6A3C lea r29, ptr [r26+rbp*2+0x3c] +XDIS 2bc62: MISC BASE D55D8D6C6B3D lea r29, ptr [r27+rbp*2+0x3d] +XDIS 2bc68: MISC BASE D55D8D6C6C3E lea r29, ptr [r28+rbp*2+0x3e] +XDIS 2bc6e: MISC BASE D55D8D6C6D3F lea r29, ptr [r29+rbp*2+0x3f] +XDIS 2bc74: MISC BASE D55D8D6C6E40 lea r29, ptr [r30+rbp*2+0x40] +XDIS 2bc7a: MISC BASE D55D8D6C6F41 lea r29, ptr [r31+rbp*2+0x41] +XDIS 2bc80: MISC BASE D54C8D6C7023 lea r29, ptr [rax+rsi*2+0x23] +XDIS 2bc86: MISC BASE D54C8D6C7124 lea r29, ptr [rcx+rsi*2+0x24] +XDIS 2bc8c: MISC BASE D54C8D6C7225 lea r29, ptr [rdx+rsi*2+0x25] +XDIS 2bc92: MISC BASE D54C8D6C7326 lea r29, ptr [rbx+rsi*2+0x26] +XDIS 2bc98: MISC BASE D54C8D6C7427 lea r29, ptr [rsp+rsi*2+0x27] +XDIS 2bc9e: MISC BASE D54C8D6C7528 lea r29, ptr [rbp+rsi*2+0x28] +XDIS 2bca4: MISC BASE D54C8D6C7629 lea r29, ptr [rsi+rsi*2+0x29] +XDIS 2bcaa: MISC BASE D54C8D6C772A lea r29, ptr [rdi+rsi*2+0x2a] +XDIS 2bcb0: MISC BASE D54D8D6C702B lea r29, ptr [r8+rsi*2+0x2b] +XDIS 2bcb6: MISC BASE D54D8D6C712C lea r29, ptr [r9+rsi*2+0x2c] +XDIS 2bcbc: MISC BASE D54D8D6C722D lea r29, ptr [r10+rsi*2+0x2d] +XDIS 2bcc2: MISC BASE D54D8D6C732E lea r29, ptr [r11+rsi*2+0x2e] +XDIS 2bcc8: MISC BASE D54D8D6C742F lea r29, ptr [r12+rsi*2+0x2f] +XDIS 2bcce: MISC BASE D54D8D6C7530 lea r29, ptr [r13+rsi*2+0x30] +XDIS 2bcd4: MISC BASE D54D8D6C7631 lea r29, ptr [r14+rsi*2+0x31] +XDIS 2bcda: MISC BASE D54D8D6C7732 lea r29, ptr [r15+rsi*2+0x32] +XDIS 2bce0: MISC BASE D55C8D6C7033 lea r29, ptr [r16+rsi*2+0x33] +XDIS 2bce6: MISC BASE D55C8D6C7134 lea r29, ptr [r17+rsi*2+0x34] +XDIS 2bcec: MISC BASE D55C8D6C7235 lea r29, ptr [r18+rsi*2+0x35] +XDIS 2bcf2: MISC BASE D55C8D6C7336 lea r29, ptr [r19+rsi*2+0x36] +XDIS 2bcf8: MISC BASE D55C8D6C7437 lea r29, ptr [r20+rsi*2+0x37] +XDIS 2bcfe: MISC BASE D55C8D6C7538 lea r29, ptr [r21+rsi*2+0x38] +XDIS 2bd04: MISC BASE D55C8D6C7639 lea r29, ptr [r22+rsi*2+0x39] +XDIS 2bd0a: MISC BASE D55C8D6C773A lea r29, ptr [r23+rsi*2+0x3a] +XDIS 2bd10: MISC BASE D55D8D6C703B lea r29, ptr [r24+rsi*2+0x3b] +XDIS 2bd16: MISC BASE D55D8D6C713C lea r29, ptr [r25+rsi*2+0x3c] +XDIS 2bd1c: MISC BASE D55D8D6C723D lea r29, ptr [r26+rsi*2+0x3d] +XDIS 2bd22: MISC BASE D55D8D6C733E lea r29, ptr [r27+rsi*2+0x3e] +XDIS 2bd28: MISC BASE D55D8D6C743F lea r29, ptr [r28+rsi*2+0x3f] +XDIS 2bd2e: MISC BASE D55D8D6C7540 lea r29, ptr [r29+rsi*2+0x40] +XDIS 2bd34: MISC BASE D55D8D6C7641 lea r29, ptr [r30+rsi*2+0x41] +XDIS 2bd3a: MISC BASE D55D8D6C7742 lea r29, ptr [r31+rsi*2+0x42] +XDIS 2bd40: MISC BASE D54C8D6C7824 lea r29, ptr [rax+rdi*2+0x24] +XDIS 2bd46: MISC BASE D54C8D6C7925 lea r29, ptr [rcx+rdi*2+0x25] +XDIS 2bd4c: MISC BASE D54C8D6C7A26 lea r29, ptr [rdx+rdi*2+0x26] +XDIS 2bd52: MISC BASE D54C8D6C7B27 lea r29, ptr [rbx+rdi*2+0x27] +XDIS 2bd58: MISC BASE D54C8D6C7C28 lea r29, ptr [rsp+rdi*2+0x28] +XDIS 2bd5e: MISC BASE D54C8D6C7D29 lea r29, ptr [rbp+rdi*2+0x29] +XDIS 2bd64: MISC BASE D54C8D6C7E2A lea r29, ptr [rsi+rdi*2+0x2a] +XDIS 2bd6a: MISC BASE D54C8D6C7F2B lea r29, ptr [rdi+rdi*2+0x2b] +XDIS 2bd70: MISC BASE D54D8D6C782C lea r29, ptr [r8+rdi*2+0x2c] +XDIS 2bd76: MISC BASE D54D8D6C792D lea r29, ptr [r9+rdi*2+0x2d] +XDIS 2bd7c: MISC BASE D54D8D6C7A2E lea r29, ptr [r10+rdi*2+0x2e] +XDIS 2bd82: MISC BASE D54D8D6C7B2F lea r29, ptr [r11+rdi*2+0x2f] +XDIS 2bd88: MISC BASE D54D8D6C7C30 lea r29, ptr [r12+rdi*2+0x30] +XDIS 2bd8e: MISC BASE D54D8D6C7D31 lea r29, ptr [r13+rdi*2+0x31] +XDIS 2bd94: MISC BASE D54D8D6C7E32 lea r29, ptr [r14+rdi*2+0x32] +XDIS 2bd9a: MISC BASE D54D8D6C7F33 lea r29, ptr [r15+rdi*2+0x33] +XDIS 2bda0: MISC BASE D55C8D6C7834 lea r29, ptr [r16+rdi*2+0x34] +XDIS 2bda6: MISC BASE D55C8D6C7935 lea r29, ptr [r17+rdi*2+0x35] +XDIS 2bdac: MISC BASE D55C8D6C7A36 lea r29, ptr [r18+rdi*2+0x36] +XDIS 2bdb2: MISC BASE D55C8D6C7B37 lea r29, ptr [r19+rdi*2+0x37] +XDIS 2bdb8: MISC BASE D55C8D6C7C38 lea r29, ptr [r20+rdi*2+0x38] +XDIS 2bdbe: MISC BASE D55C8D6C7D39 lea r29, ptr [r21+rdi*2+0x39] +XDIS 2bdc4: MISC BASE D55C8D6C7E3A lea r29, ptr [r22+rdi*2+0x3a] +XDIS 2bdca: MISC BASE D55C8D6C7F3B lea r29, ptr [r23+rdi*2+0x3b] +XDIS 2bdd0: MISC BASE D55D8D6C783C lea r29, ptr [r24+rdi*2+0x3c] +XDIS 2bdd6: MISC BASE D55D8D6C793D lea r29, ptr [r25+rdi*2+0x3d] +XDIS 2bddc: MISC BASE D55D8D6C7A3E lea r29, ptr [r26+rdi*2+0x3e] +XDIS 2bde2: MISC BASE D55D8D6C7B3F lea r29, ptr [r27+rdi*2+0x3f] +XDIS 2bde8: MISC BASE D55D8D6C7C40 lea r29, ptr [r28+rdi*2+0x40] +XDIS 2bdee: MISC BASE D55D8D6C7D41 lea r29, ptr [r29+rdi*2+0x41] +XDIS 2bdf4: MISC BASE D55D8D6C7E42 lea r29, ptr [r30+rdi*2+0x42] +XDIS 2bdfa: MISC BASE D55D8D6C7F43 lea r29, ptr [r31+rdi*2+0x43] +XDIS 2be00: MISC BASE D54E8D6C4025 lea r29, ptr [rax+r8*2+0x25] +XDIS 2be06: MISC BASE D54E8D6C4126 lea r29, ptr [rcx+r8*2+0x26] +XDIS 2be0c: MISC BASE D54E8D6C4227 lea r29, ptr [rdx+r8*2+0x27] +XDIS 2be12: MISC BASE D54E8D6C4328 lea r29, ptr [rbx+r8*2+0x28] +XDIS 2be18: MISC BASE D54E8D6C4429 lea r29, ptr [rsp+r8*2+0x29] +XDIS 2be1e: MISC BASE D54E8D6C452A lea r29, ptr [rbp+r8*2+0x2a] +XDIS 2be24: MISC BASE D54E8D6C462B lea r29, ptr [rsi+r8*2+0x2b] +XDIS 2be2a: MISC BASE D54E8D6C472C lea r29, ptr [rdi+r8*2+0x2c] +XDIS 2be30: MISC BASE D54F8D6C402D lea r29, ptr [r8+r8*2+0x2d] +XDIS 2be36: MISC BASE D54F8D6C412E lea r29, ptr [r9+r8*2+0x2e] +XDIS 2be3c: MISC BASE D54F8D6C422F lea r29, ptr [r10+r8*2+0x2f] +XDIS 2be42: MISC BASE D54F8D6C4330 lea r29, ptr [r11+r8*2+0x30] +XDIS 2be48: MISC BASE D54F8D6C4431 lea r29, ptr [r12+r8*2+0x31] +XDIS 2be4e: MISC BASE D54F8D6C4532 lea r29, ptr [r13+r8*2+0x32] +XDIS 2be54: MISC BASE D54F8D6C4633 lea r29, ptr [r14+r8*2+0x33] +XDIS 2be5a: MISC BASE D54F8D6C4734 lea r29, ptr [r15+r8*2+0x34] +XDIS 2be60: MISC BASE D55E8D6C4035 lea r29, ptr [r16+r8*2+0x35] +XDIS 2be66: MISC BASE D55E8D6C4136 lea r29, ptr [r17+r8*2+0x36] +XDIS 2be6c: MISC BASE D55E8D6C4237 lea r29, ptr [r18+r8*2+0x37] +XDIS 2be72: MISC BASE D55E8D6C4338 lea r29, ptr [r19+r8*2+0x38] +XDIS 2be78: MISC BASE D55E8D6C4439 lea r29, ptr [r20+r8*2+0x39] +XDIS 2be7e: MISC BASE D55E8D6C453A lea r29, ptr [r21+r8*2+0x3a] +XDIS 2be84: MISC BASE D55E8D6C463B lea r29, ptr [r22+r8*2+0x3b] +XDIS 2be8a: MISC BASE D55E8D6C473C lea r29, ptr [r23+r8*2+0x3c] +XDIS 2be90: MISC BASE D55F8D6C403D lea r29, ptr [r24+r8*2+0x3d] +XDIS 2be96: MISC BASE D55F8D6C413E lea r29, ptr [r25+r8*2+0x3e] +XDIS 2be9c: MISC BASE D55F8D6C423F lea r29, ptr [r26+r8*2+0x3f] +XDIS 2bea2: MISC BASE D55F8D6C4340 lea r29, ptr [r27+r8*2+0x40] +XDIS 2bea8: MISC BASE D55F8D6C4441 lea r29, ptr [r28+r8*2+0x41] +XDIS 2beae: MISC BASE D55F8D6C4542 lea r29, ptr [r29+r8*2+0x42] +XDIS 2beb4: MISC BASE D55F8D6C4643 lea r29, ptr [r30+r8*2+0x43] +XDIS 2beba: MISC BASE D55F8D6C4744 lea r29, ptr [r31+r8*2+0x44] +XDIS 2bec0: MISC BASE D54E8D6C4826 lea r29, ptr [rax+r9*2+0x26] +XDIS 2bec6: MISC BASE D54E8D6C4927 lea r29, ptr [rcx+r9*2+0x27] +XDIS 2becc: MISC BASE D54E8D6C4A28 lea r29, ptr [rdx+r9*2+0x28] +XDIS 2bed2: MISC BASE D54E8D6C4B29 lea r29, ptr [rbx+r9*2+0x29] +XDIS 2bed8: MISC BASE D54E8D6C4C2A lea r29, ptr [rsp+r9*2+0x2a] +XDIS 2bede: MISC BASE D54E8D6C4D2B lea r29, ptr [rbp+r9*2+0x2b] +XDIS 2bee4: MISC BASE D54E8D6C4E2C lea r29, ptr [rsi+r9*2+0x2c] +XDIS 2beea: MISC BASE D54E8D6C4F2D lea r29, ptr [rdi+r9*2+0x2d] +XDIS 2bef0: MISC BASE D54F8D6C482E lea r29, ptr [r8+r9*2+0x2e] +XDIS 2bef6: MISC BASE D54F8D6C492F lea r29, ptr [r9+r9*2+0x2f] +XDIS 2befc: MISC BASE D54F8D6C4A30 lea r29, ptr [r10+r9*2+0x30] +XDIS 2bf02: MISC BASE D54F8D6C4B31 lea r29, ptr [r11+r9*2+0x31] +XDIS 2bf08: MISC BASE D54F8D6C4C32 lea r29, ptr [r12+r9*2+0x32] +XDIS 2bf0e: MISC BASE D54F8D6C4D33 lea r29, ptr [r13+r9*2+0x33] +XDIS 2bf14: MISC BASE D54F8D6C4E34 lea r29, ptr [r14+r9*2+0x34] +XDIS 2bf1a: MISC BASE D54F8D6C4F35 lea r29, ptr [r15+r9*2+0x35] +XDIS 2bf20: MISC BASE D55E8D6C4836 lea r29, ptr [r16+r9*2+0x36] +XDIS 2bf26: MISC BASE D55E8D6C4937 lea r29, ptr [r17+r9*2+0x37] +XDIS 2bf2c: MISC BASE D55E8D6C4A38 lea r29, ptr [r18+r9*2+0x38] +XDIS 2bf32: MISC BASE D55E8D6C4B39 lea r29, ptr [r19+r9*2+0x39] +XDIS 2bf38: MISC BASE D55E8D6C4C3A lea r29, ptr [r20+r9*2+0x3a] +XDIS 2bf3e: MISC BASE D55E8D6C4D3B lea r29, ptr [r21+r9*2+0x3b] +XDIS 2bf44: MISC BASE D55E8D6C4E3C lea r29, ptr [r22+r9*2+0x3c] +XDIS 2bf4a: MISC BASE D55E8D6C4F3D lea r29, ptr [r23+r9*2+0x3d] +XDIS 2bf50: MISC BASE D55F8D6C483E lea r29, ptr [r24+r9*2+0x3e] +XDIS 2bf56: MISC BASE D55F8D6C493F lea r29, ptr [r25+r9*2+0x3f] +XDIS 2bf5c: MISC BASE D55F8D6C4A40 lea r29, ptr [r26+r9*2+0x40] +XDIS 2bf62: MISC BASE D55F8D6C4B41 lea r29, ptr [r27+r9*2+0x41] +XDIS 2bf68: MISC BASE D55F8D6C4C42 lea r29, ptr [r28+r9*2+0x42] +XDIS 2bf6e: MISC BASE D55F8D6C4D43 lea r29, ptr [r29+r9*2+0x43] +XDIS 2bf74: MISC BASE D55F8D6C4E44 lea r29, ptr [r30+r9*2+0x44] +XDIS 2bf7a: MISC BASE D55F8D6C4F45 lea r29, ptr [r31+r9*2+0x45] +XDIS 2bf80: MISC BASE D54E8D6C5027 lea r29, ptr [rax+r10*2+0x27] +XDIS 2bf86: MISC BASE D54E8D6C5128 lea r29, ptr [rcx+r10*2+0x28] +XDIS 2bf8c: MISC BASE D54E8D6C5229 lea r29, ptr [rdx+r10*2+0x29] +XDIS 2bf92: MISC BASE D54E8D6C532A lea r29, ptr [rbx+r10*2+0x2a] +XDIS 2bf98: MISC BASE D54E8D6C542B lea r29, ptr [rsp+r10*2+0x2b] +XDIS 2bf9e: MISC BASE D54E8D6C552C lea r29, ptr [rbp+r10*2+0x2c] +XDIS 2bfa4: MISC BASE D54E8D6C562D lea r29, ptr [rsi+r10*2+0x2d] +XDIS 2bfaa: MISC BASE D54E8D6C572E lea r29, ptr [rdi+r10*2+0x2e] +XDIS 2bfb0: MISC BASE D54F8D6C502F lea r29, ptr [r8+r10*2+0x2f] +XDIS 2bfb6: MISC BASE D54F8D6C5130 lea r29, ptr [r9+r10*2+0x30] +XDIS 2bfbc: MISC BASE D54F8D6C5231 lea r29, ptr [r10+r10*2+0x31] +XDIS 2bfc2: MISC BASE D54F8D6C5332 lea r29, ptr [r11+r10*2+0x32] +XDIS 2bfc8: MISC BASE D54F8D6C5433 lea r29, ptr [r12+r10*2+0x33] +XDIS 2bfce: MISC BASE D54F8D6C5534 lea r29, ptr [r13+r10*2+0x34] +XDIS 2bfd4: MISC BASE D54F8D6C5635 lea r29, ptr [r14+r10*2+0x35] +XDIS 2bfda: MISC BASE D54F8D6C5736 lea r29, ptr [r15+r10*2+0x36] +XDIS 2bfe0: MISC BASE D55E8D6C5037 lea r29, ptr [r16+r10*2+0x37] +XDIS 2bfe6: MISC BASE D55E8D6C5138 lea r29, ptr [r17+r10*2+0x38] +XDIS 2bfec: MISC BASE D55E8D6C5239 lea r29, ptr [r18+r10*2+0x39] +XDIS 2bff2: MISC BASE D55E8D6C533A lea r29, ptr [r19+r10*2+0x3a] +XDIS 2bff8: MISC BASE D55E8D6C543B lea r29, ptr [r20+r10*2+0x3b] +XDIS 2bffe: MISC BASE D55E8D6C553C lea r29, ptr [r21+r10*2+0x3c] +XDIS 2c004: MISC BASE D55E8D6C563D lea r29, ptr [r22+r10*2+0x3d] +XDIS 2c00a: MISC BASE D55E8D6C573E lea r29, ptr [r23+r10*2+0x3e] +XDIS 2c010: MISC BASE D55F8D6C503F lea r29, ptr [r24+r10*2+0x3f] +XDIS 2c016: MISC BASE D55F8D6C5140 lea r29, ptr [r25+r10*2+0x40] +XDIS 2c01c: MISC BASE D55F8D6C5241 lea r29, ptr [r26+r10*2+0x41] +XDIS 2c022: MISC BASE D55F8D6C5342 lea r29, ptr [r27+r10*2+0x42] +XDIS 2c028: MISC BASE D55F8D6C5443 lea r29, ptr [r28+r10*2+0x43] +XDIS 2c02e: MISC BASE D55F8D6C5544 lea r29, ptr [r29+r10*2+0x44] +XDIS 2c034: MISC BASE D55F8D6C5645 lea r29, ptr [r30+r10*2+0x45] +XDIS 2c03a: MISC BASE D55F8D6C5746 lea r29, ptr [r31+r10*2+0x46] +XDIS 2c040: MISC BASE D54E8D6C5828 lea r29, ptr [rax+r11*2+0x28] +XDIS 2c046: MISC BASE D54E8D6C5929 lea r29, ptr [rcx+r11*2+0x29] +XDIS 2c04c: MISC BASE D54E8D6C5A2A lea r29, ptr [rdx+r11*2+0x2a] +XDIS 2c052: MISC BASE D54E8D6C5B2B lea r29, ptr [rbx+r11*2+0x2b] +XDIS 2c058: MISC BASE D54E8D6C5C2C lea r29, ptr [rsp+r11*2+0x2c] +XDIS 2c05e: MISC BASE D54E8D6C5D2D lea r29, ptr [rbp+r11*2+0x2d] +XDIS 2c064: MISC BASE D54E8D6C5E2E lea r29, ptr [rsi+r11*2+0x2e] +XDIS 2c06a: MISC BASE D54E8D6C5F2F lea r29, ptr [rdi+r11*2+0x2f] +XDIS 2c070: MISC BASE D54F8D6C5830 lea r29, ptr [r8+r11*2+0x30] +XDIS 2c076: MISC BASE D54F8D6C5931 lea r29, ptr [r9+r11*2+0x31] +XDIS 2c07c: MISC BASE D54F8D6C5A32 lea r29, ptr [r10+r11*2+0x32] +XDIS 2c082: MISC BASE D54F8D6C5B33 lea r29, ptr [r11+r11*2+0x33] +XDIS 2c088: MISC BASE D54F8D6C5C34 lea r29, ptr [r12+r11*2+0x34] +XDIS 2c08e: MISC BASE D54F8D6C5D35 lea r29, ptr [r13+r11*2+0x35] +XDIS 2c094: MISC BASE D54F8D6C5E36 lea r29, ptr [r14+r11*2+0x36] +XDIS 2c09a: MISC BASE D54F8D6C5F37 lea r29, ptr [r15+r11*2+0x37] +XDIS 2c0a0: MISC BASE D55E8D6C5838 lea r29, ptr [r16+r11*2+0x38] +XDIS 2c0a6: MISC BASE D55E8D6C5939 lea r29, ptr [r17+r11*2+0x39] +XDIS 2c0ac: MISC BASE D55E8D6C5A3A lea r29, ptr [r18+r11*2+0x3a] +XDIS 2c0b2: MISC BASE D55E8D6C5B3B lea r29, ptr [r19+r11*2+0x3b] +XDIS 2c0b8: MISC BASE D55E8D6C5C3C lea r29, ptr [r20+r11*2+0x3c] +XDIS 2c0be: MISC BASE D55E8D6C5D3D lea r29, ptr [r21+r11*2+0x3d] +XDIS 2c0c4: MISC BASE D55E8D6C5E3E lea r29, ptr [r22+r11*2+0x3e] +XDIS 2c0ca: MISC BASE D55E8D6C5F3F lea r29, ptr [r23+r11*2+0x3f] +XDIS 2c0d0: MISC BASE D55F8D6C5840 lea r29, ptr [r24+r11*2+0x40] +XDIS 2c0d6: MISC BASE D55F8D6C5941 lea r29, ptr [r25+r11*2+0x41] +XDIS 2c0dc: MISC BASE D55F8D6C5A42 lea r29, ptr [r26+r11*2+0x42] +XDIS 2c0e2: MISC BASE D55F8D6C5B43 lea r29, ptr [r27+r11*2+0x43] +XDIS 2c0e8: MISC BASE D55F8D6C5C44 lea r29, ptr [r28+r11*2+0x44] +XDIS 2c0ee: MISC BASE D55F8D6C5D45 lea r29, ptr [r29+r11*2+0x45] +XDIS 2c0f4: MISC BASE D55F8D6C5E46 lea r29, ptr [r30+r11*2+0x46] +XDIS 2c0fa: MISC BASE D55F8D6C5F47 lea r29, ptr [r31+r11*2+0x47] +XDIS 2c100: MISC BASE D54E8D6C6029 lea r29, ptr [rax+r12*2+0x29] +XDIS 2c106: MISC BASE D54E8D6C612A lea r29, ptr [rcx+r12*2+0x2a] +XDIS 2c10c: MISC BASE D54E8D6C622B lea r29, ptr [rdx+r12*2+0x2b] +XDIS 2c112: MISC BASE D54E8D6C632C lea r29, ptr [rbx+r12*2+0x2c] +XDIS 2c118: MISC BASE D54E8D6C642D lea r29, ptr [rsp+r12*2+0x2d] +XDIS 2c11e: MISC BASE D54E8D6C652E lea r29, ptr [rbp+r12*2+0x2e] +XDIS 2c124: MISC BASE D54E8D6C662F lea r29, ptr [rsi+r12*2+0x2f] +XDIS 2c12a: MISC BASE D54E8D6C6730 lea r29, ptr [rdi+r12*2+0x30] +XDIS 2c130: MISC BASE D54F8D6C6031 lea r29, ptr [r8+r12*2+0x31] +XDIS 2c136: MISC BASE D54F8D6C6132 lea r29, ptr [r9+r12*2+0x32] +XDIS 2c13c: MISC BASE D54F8D6C6233 lea r29, ptr [r10+r12*2+0x33] +XDIS 2c142: MISC BASE D54F8D6C6334 lea r29, ptr [r11+r12*2+0x34] +XDIS 2c148: MISC BASE D54F8D6C6435 lea r29, ptr [r12+r12*2+0x35] +XDIS 2c14e: MISC BASE D54F8D6C6536 lea r29, ptr [r13+r12*2+0x36] +XDIS 2c154: MISC BASE D54F8D6C6637 lea r29, ptr [r14+r12*2+0x37] +XDIS 2c15a: MISC BASE D54F8D6C6738 lea r29, ptr [r15+r12*2+0x38] +XDIS 2c160: MISC BASE D55E8D6C6039 lea r29, ptr [r16+r12*2+0x39] +XDIS 2c166: MISC BASE D55E8D6C613A lea r29, ptr [r17+r12*2+0x3a] +XDIS 2c16c: MISC BASE D55E8D6C623B lea r29, ptr [r18+r12*2+0x3b] +XDIS 2c172: MISC BASE D55E8D6C633C lea r29, ptr [r19+r12*2+0x3c] +XDIS 2c178: MISC BASE D55E8D6C643D lea r29, ptr [r20+r12*2+0x3d] +XDIS 2c17e: MISC BASE D55E8D6C653E lea r29, ptr [r21+r12*2+0x3e] +XDIS 2c184: MISC BASE D55E8D6C663F lea r29, ptr [r22+r12*2+0x3f] +XDIS 2c18a: MISC BASE D55E8D6C6740 lea r29, ptr [r23+r12*2+0x40] +XDIS 2c190: MISC BASE D55F8D6C6041 lea r29, ptr [r24+r12*2+0x41] +XDIS 2c196: MISC BASE D55F8D6C6142 lea r29, ptr [r25+r12*2+0x42] +XDIS 2c19c: MISC BASE D55F8D6C6243 lea r29, ptr [r26+r12*2+0x43] +XDIS 2c1a2: MISC BASE D55F8D6C6344 lea r29, ptr [r27+r12*2+0x44] +XDIS 2c1a8: MISC BASE D55F8D6C6445 lea r29, ptr [r28+r12*2+0x45] +XDIS 2c1ae: MISC BASE D55F8D6C6546 lea r29, ptr [r29+r12*2+0x46] +XDIS 2c1b4: MISC BASE D55F8D6C6647 lea r29, ptr [r30+r12*2+0x47] +XDIS 2c1ba: MISC BASE D55F8D6C6748 lea r29, ptr [r31+r12*2+0x48] +XDIS 2c1c0: MISC BASE D54E8D6C682A lea r29, ptr [rax+r13*2+0x2a] +XDIS 2c1c6: MISC BASE D54E8D6C692B lea r29, ptr [rcx+r13*2+0x2b] +XDIS 2c1cc: MISC BASE D54E8D6C6A2C lea r29, ptr [rdx+r13*2+0x2c] +XDIS 2c1d2: MISC BASE D54E8D6C6B2D lea r29, ptr [rbx+r13*2+0x2d] +XDIS 2c1d8: MISC BASE D54E8D6C6C2E lea r29, ptr [rsp+r13*2+0x2e] +XDIS 2c1de: MISC BASE D54E8D6C6D2F lea r29, ptr [rbp+r13*2+0x2f] +XDIS 2c1e4: MISC BASE D54E8D6C6E30 lea r29, ptr [rsi+r13*2+0x30] +XDIS 2c1ea: MISC BASE D54E8D6C6F31 lea r29, ptr [rdi+r13*2+0x31] +XDIS 2c1f0: MISC BASE D54F8D6C6832 lea r29, ptr [r8+r13*2+0x32] +XDIS 2c1f6: MISC BASE D54F8D6C6933 lea r29, ptr [r9+r13*2+0x33] +XDIS 2c1fc: MISC BASE D54F8D6C6A34 lea r29, ptr [r10+r13*2+0x34] +XDIS 2c202: MISC BASE D54F8D6C6B35 lea r29, ptr [r11+r13*2+0x35] +XDIS 2c208: MISC BASE D54F8D6C6C36 lea r29, ptr [r12+r13*2+0x36] +XDIS 2c20e: MISC BASE D54F8D6C6D37 lea r29, ptr [r13+r13*2+0x37] +XDIS 2c214: MISC BASE D54F8D6C6E38 lea r29, ptr [r14+r13*2+0x38] +XDIS 2c21a: MISC BASE D54F8D6C6F39 lea r29, ptr [r15+r13*2+0x39] +XDIS 2c220: MISC BASE D55E8D6C683A lea r29, ptr [r16+r13*2+0x3a] +XDIS 2c226: MISC BASE D55E8D6C693B lea r29, ptr [r17+r13*2+0x3b] +XDIS 2c22c: MISC BASE D55E8D6C6A3C lea r29, ptr [r18+r13*2+0x3c] +XDIS 2c232: MISC BASE D55E8D6C6B3D lea r29, ptr [r19+r13*2+0x3d] +XDIS 2c238: MISC BASE D55E8D6C6C3E lea r29, ptr [r20+r13*2+0x3e] +XDIS 2c23e: MISC BASE D55E8D6C6D3F lea r29, ptr [r21+r13*2+0x3f] +XDIS 2c244: MISC BASE D55E8D6C6E40 lea r29, ptr [r22+r13*2+0x40] +XDIS 2c24a: MISC BASE D55E8D6C6F41 lea r29, ptr [r23+r13*2+0x41] +XDIS 2c250: MISC BASE D55F8D6C6842 lea r29, ptr [r24+r13*2+0x42] +XDIS 2c256: MISC BASE D55F8D6C6943 lea r29, ptr [r25+r13*2+0x43] +XDIS 2c25c: MISC BASE D55F8D6C6A44 lea r29, ptr [r26+r13*2+0x44] +XDIS 2c262: MISC BASE D55F8D6C6B45 lea r29, ptr [r27+r13*2+0x45] +XDIS 2c268: MISC BASE D55F8D6C6C46 lea r29, ptr [r28+r13*2+0x46] +XDIS 2c26e: MISC BASE D55F8D6C6D47 lea r29, ptr [r29+r13*2+0x47] +XDIS 2c274: MISC BASE D55F8D6C6E48 lea r29, ptr [r30+r13*2+0x48] +XDIS 2c27a: MISC BASE D55F8D6C6F49 lea r29, ptr [r31+r13*2+0x49] +XDIS 2c280: MISC BASE D54E8D6C702B lea r29, ptr [rax+r14*2+0x2b] +XDIS 2c286: MISC BASE D54E8D6C712C lea r29, ptr [rcx+r14*2+0x2c] +XDIS 2c28c: MISC BASE D54E8D6C722D lea r29, ptr [rdx+r14*2+0x2d] +XDIS 2c292: MISC BASE D54E8D6C732E lea r29, ptr [rbx+r14*2+0x2e] +XDIS 2c298: MISC BASE D54E8D6C742F lea r29, ptr [rsp+r14*2+0x2f] +XDIS 2c29e: MISC BASE D54E8D6C7530 lea r29, ptr [rbp+r14*2+0x30] +XDIS 2c2a4: MISC BASE D54E8D6C7631 lea r29, ptr [rsi+r14*2+0x31] +XDIS 2c2aa: MISC BASE D54E8D6C7732 lea r29, ptr [rdi+r14*2+0x32] +XDIS 2c2b0: MISC BASE D54F8D6C7033 lea r29, ptr [r8+r14*2+0x33] +XDIS 2c2b6: MISC BASE D54F8D6C7134 lea r29, ptr [r9+r14*2+0x34] +XDIS 2c2bc: MISC BASE D54F8D6C7235 lea r29, ptr [r10+r14*2+0x35] +XDIS 2c2c2: MISC BASE D54F8D6C7336 lea r29, ptr [r11+r14*2+0x36] +XDIS 2c2c8: MISC BASE D54F8D6C7437 lea r29, ptr [r12+r14*2+0x37] +XDIS 2c2ce: MISC BASE D54F8D6C7538 lea r29, ptr [r13+r14*2+0x38] +XDIS 2c2d4: MISC BASE D54F8D6C7639 lea r29, ptr [r14+r14*2+0x39] +XDIS 2c2da: MISC BASE D54F8D6C773A lea r29, ptr [r15+r14*2+0x3a] +XDIS 2c2e0: MISC BASE D55E8D6C703B lea r29, ptr [r16+r14*2+0x3b] +XDIS 2c2e6: MISC BASE D55E8D6C713C lea r29, ptr [r17+r14*2+0x3c] +XDIS 2c2ec: MISC BASE D55E8D6C723D lea r29, ptr [r18+r14*2+0x3d] +XDIS 2c2f2: MISC BASE D55E8D6C733E lea r29, ptr [r19+r14*2+0x3e] +XDIS 2c2f8: MISC BASE D55E8D6C743F lea r29, ptr [r20+r14*2+0x3f] +XDIS 2c2fe: MISC BASE D55E8D6C7540 lea r29, ptr [r21+r14*2+0x40] +XDIS 2c304: MISC BASE D55E8D6C7641 lea r29, ptr [r22+r14*2+0x41] +XDIS 2c30a: MISC BASE D55E8D6C7742 lea r29, ptr [r23+r14*2+0x42] +XDIS 2c310: MISC BASE D55F8D6C7043 lea r29, ptr [r24+r14*2+0x43] +XDIS 2c316: MISC BASE D55F8D6C7144 lea r29, ptr [r25+r14*2+0x44] +XDIS 2c31c: MISC BASE D55F8D6C7245 lea r29, ptr [r26+r14*2+0x45] +XDIS 2c322: MISC BASE D55F8D6C7346 lea r29, ptr [r27+r14*2+0x46] +XDIS 2c328: MISC BASE D55F8D6C7447 lea r29, ptr [r28+r14*2+0x47] +XDIS 2c32e: MISC BASE D55F8D6C7548 lea r29, ptr [r29+r14*2+0x48] +XDIS 2c334: MISC BASE D55F8D6C7649 lea r29, ptr [r30+r14*2+0x49] +XDIS 2c33a: MISC BASE D55F8D6C774A lea r29, ptr [r31+r14*2+0x4a] +XDIS 2c340: MISC BASE D54E8D6C782C lea r29, ptr [rax+r15*2+0x2c] +XDIS 2c346: MISC BASE D54E8D6C792D lea r29, ptr [rcx+r15*2+0x2d] +XDIS 2c34c: MISC BASE D54E8D6C7A2E lea r29, ptr [rdx+r15*2+0x2e] +XDIS 2c352: MISC BASE D54E8D6C7B2F lea r29, ptr [rbx+r15*2+0x2f] +XDIS 2c358: MISC BASE D54E8D6C7C30 lea r29, ptr [rsp+r15*2+0x30] +XDIS 2c35e: MISC BASE D54E8D6C7D31 lea r29, ptr [rbp+r15*2+0x31] +XDIS 2c364: MISC BASE D54E8D6C7E32 lea r29, ptr [rsi+r15*2+0x32] +XDIS 2c36a: MISC BASE D54E8D6C7F33 lea r29, ptr [rdi+r15*2+0x33] +XDIS 2c370: MISC BASE D54F8D6C7834 lea r29, ptr [r8+r15*2+0x34] +XDIS 2c376: MISC BASE D54F8D6C7935 lea r29, ptr [r9+r15*2+0x35] +XDIS 2c37c: MISC BASE D54F8D6C7A36 lea r29, ptr [r10+r15*2+0x36] +XDIS 2c382: MISC BASE D54F8D6C7B37 lea r29, ptr [r11+r15*2+0x37] +XDIS 2c388: MISC BASE D54F8D6C7C38 lea r29, ptr [r12+r15*2+0x38] +XDIS 2c38e: MISC BASE D54F8D6C7D39 lea r29, ptr [r13+r15*2+0x39] +XDIS 2c394: MISC BASE D54F8D6C7E3A lea r29, ptr [r14+r15*2+0x3a] +XDIS 2c39a: MISC BASE D54F8D6C7F3B lea r29, ptr [r15+r15*2+0x3b] +XDIS 2c3a0: MISC BASE D55E8D6C783C lea r29, ptr [r16+r15*2+0x3c] +XDIS 2c3a6: MISC BASE D55E8D6C793D lea r29, ptr [r17+r15*2+0x3d] +XDIS 2c3ac: MISC BASE D55E8D6C7A3E lea r29, ptr [r18+r15*2+0x3e] +XDIS 2c3b2: MISC BASE D55E8D6C7B3F lea r29, ptr [r19+r15*2+0x3f] +XDIS 2c3b8: MISC BASE D55E8D6C7C40 lea r29, ptr [r20+r15*2+0x40] +XDIS 2c3be: MISC BASE D55E8D6C7D41 lea r29, ptr [r21+r15*2+0x41] +XDIS 2c3c4: MISC BASE D55E8D6C7E42 lea r29, ptr [r22+r15*2+0x42] +XDIS 2c3ca: MISC BASE D55E8D6C7F43 lea r29, ptr [r23+r15*2+0x43] +XDIS 2c3d0: MISC BASE D55F8D6C7844 lea r29, ptr [r24+r15*2+0x44] +XDIS 2c3d6: MISC BASE D55F8D6C7945 lea r29, ptr [r25+r15*2+0x45] +XDIS 2c3dc: MISC BASE D55F8D6C7A46 lea r29, ptr [r26+r15*2+0x46] +XDIS 2c3e2: MISC BASE D55F8D6C7B47 lea r29, ptr [r27+r15*2+0x47] +XDIS 2c3e8: MISC BASE D55F8D6C7C48 lea r29, ptr [r28+r15*2+0x48] +XDIS 2c3ee: MISC BASE D55F8D6C7D49 lea r29, ptr [r29+r15*2+0x49] +XDIS 2c3f4: MISC BASE D55F8D6C7E4A lea r29, ptr [r30+r15*2+0x4a] +XDIS 2c3fa: MISC BASE D55F8D6C7F4B lea r29, ptr [r31+r15*2+0x4b] +XDIS 2c400: MISC BASE D56C8D6C402D lea r29, ptr [rax+r16*2+0x2d] +XDIS 2c406: MISC BASE D56C8D6C412E lea r29, ptr [rcx+r16*2+0x2e] +XDIS 2c40c: MISC BASE D56C8D6C422F lea r29, ptr [rdx+r16*2+0x2f] +XDIS 2c412: MISC BASE D56C8D6C4330 lea r29, ptr [rbx+r16*2+0x30] +XDIS 2c418: MISC BASE D56C8D6C4431 lea r29, ptr [rsp+r16*2+0x31] +XDIS 2c41e: MISC BASE D56C8D6C4532 lea r29, ptr [rbp+r16*2+0x32] +XDIS 2c424: MISC BASE D56C8D6C4633 lea r29, ptr [rsi+r16*2+0x33] +XDIS 2c42a: MISC BASE D56C8D6C4734 lea r29, ptr [rdi+r16*2+0x34] +XDIS 2c430: MISC BASE D56D8D6C4035 lea r29, ptr [r8+r16*2+0x35] +XDIS 2c436: MISC BASE D56D8D6C4136 lea r29, ptr [r9+r16*2+0x36] +XDIS 2c43c: MISC BASE D56D8D6C4237 lea r29, ptr [r10+r16*2+0x37] +XDIS 2c442: MISC BASE D56D8D6C4338 lea r29, ptr [r11+r16*2+0x38] +XDIS 2c448: MISC BASE D56D8D6C4439 lea r29, ptr [r12+r16*2+0x39] +XDIS 2c44e: MISC BASE D56D8D6C453A lea r29, ptr [r13+r16*2+0x3a] +XDIS 2c454: MISC BASE D56D8D6C463B lea r29, ptr [r14+r16*2+0x3b] +XDIS 2c45a: MISC BASE D56D8D6C473C lea r29, ptr [r15+r16*2+0x3c] +XDIS 2c460: MISC BASE D57C8D6C403D lea r29, ptr [r16+r16*2+0x3d] +XDIS 2c466: MISC BASE D57C8D6C413E lea r29, ptr [r17+r16*2+0x3e] +XDIS 2c46c: MISC BASE D57C8D6C423F lea r29, ptr [r18+r16*2+0x3f] +XDIS 2c472: MISC BASE D57C8D6C4340 lea r29, ptr [r19+r16*2+0x40] +XDIS 2c478: MISC BASE D57C8D6C4441 lea r29, ptr [r20+r16*2+0x41] +XDIS 2c47e: MISC BASE D57C8D6C4542 lea r29, ptr [r21+r16*2+0x42] +XDIS 2c484: MISC BASE D57C8D6C4643 lea r29, ptr [r22+r16*2+0x43] +XDIS 2c48a: MISC BASE D57C8D6C4744 lea r29, ptr [r23+r16*2+0x44] +XDIS 2c490: MISC BASE D57D8D6C4045 lea r29, ptr [r24+r16*2+0x45] +XDIS 2c496: MISC BASE D57D8D6C4146 lea r29, ptr [r25+r16*2+0x46] +XDIS 2c49c: MISC BASE D57D8D6C4247 lea r29, ptr [r26+r16*2+0x47] +XDIS 2c4a2: MISC BASE D57D8D6C4348 lea r29, ptr [r27+r16*2+0x48] +XDIS 2c4a8: MISC BASE D57D8D6C4449 lea r29, ptr [r28+r16*2+0x49] +XDIS 2c4ae: MISC BASE D57D8D6C454A lea r29, ptr [r29+r16*2+0x4a] +XDIS 2c4b4: MISC BASE D57D8D6C464B lea r29, ptr [r30+r16*2+0x4b] +XDIS 2c4ba: MISC BASE D57D8D6C474C lea r29, ptr [r31+r16*2+0x4c] +XDIS 2c4c0: MISC BASE D56C8D6C482E lea r29, ptr [rax+r17*2+0x2e] +XDIS 2c4c6: MISC BASE D56C8D6C492F lea r29, ptr [rcx+r17*2+0x2f] +XDIS 2c4cc: MISC BASE D56C8D6C4A30 lea r29, ptr [rdx+r17*2+0x30] +XDIS 2c4d2: MISC BASE D56C8D6C4B31 lea r29, ptr [rbx+r17*2+0x31] +XDIS 2c4d8: MISC BASE D56C8D6C4C32 lea r29, ptr [rsp+r17*2+0x32] +XDIS 2c4de: MISC BASE D56C8D6C4D33 lea r29, ptr [rbp+r17*2+0x33] +XDIS 2c4e4: MISC BASE D56C8D6C4E34 lea r29, ptr [rsi+r17*2+0x34] +XDIS 2c4ea: MISC BASE D56C8D6C4F35 lea r29, ptr [rdi+r17*2+0x35] +XDIS 2c4f0: MISC BASE D56D8D6C4836 lea r29, ptr [r8+r17*2+0x36] +XDIS 2c4f6: MISC BASE D56D8D6C4937 lea r29, ptr [r9+r17*2+0x37] +XDIS 2c4fc: MISC BASE D56D8D6C4A38 lea r29, ptr [r10+r17*2+0x38] +XDIS 2c502: MISC BASE D56D8D6C4B39 lea r29, ptr [r11+r17*2+0x39] +XDIS 2c508: MISC BASE D56D8D6C4C3A lea r29, ptr [r12+r17*2+0x3a] +XDIS 2c50e: MISC BASE D56D8D6C4D3B lea r29, ptr [r13+r17*2+0x3b] +XDIS 2c514: MISC BASE D56D8D6C4E3C lea r29, ptr [r14+r17*2+0x3c] +XDIS 2c51a: MISC BASE D56D8D6C4F3D lea r29, ptr [r15+r17*2+0x3d] +XDIS 2c520: MISC BASE D57C8D6C483E lea r29, ptr [r16+r17*2+0x3e] +XDIS 2c526: MISC BASE D57C8D6C493F lea r29, ptr [r17+r17*2+0x3f] +XDIS 2c52c: MISC BASE D57C8D6C4A40 lea r29, ptr [r18+r17*2+0x40] +XDIS 2c532: MISC BASE D57C8D6C4B41 lea r29, ptr [r19+r17*2+0x41] +XDIS 2c538: MISC BASE D57C8D6C4C42 lea r29, ptr [r20+r17*2+0x42] +XDIS 2c53e: MISC BASE D57C8D6C4D43 lea r29, ptr [r21+r17*2+0x43] +XDIS 2c544: MISC BASE D57C8D6C4E44 lea r29, ptr [r22+r17*2+0x44] +XDIS 2c54a: MISC BASE D57C8D6C4F45 lea r29, ptr [r23+r17*2+0x45] +XDIS 2c550: MISC BASE D57D8D6C4846 lea r29, ptr [r24+r17*2+0x46] +XDIS 2c556: MISC BASE D57D8D6C4947 lea r29, ptr [r25+r17*2+0x47] +XDIS 2c55c: MISC BASE D57D8D6C4A48 lea r29, ptr [r26+r17*2+0x48] +XDIS 2c562: MISC BASE D57D8D6C4B49 lea r29, ptr [r27+r17*2+0x49] +XDIS 2c568: MISC BASE D57D8D6C4C4A lea r29, ptr [r28+r17*2+0x4a] +XDIS 2c56e: MISC BASE D57D8D6C4D4B lea r29, ptr [r29+r17*2+0x4b] +XDIS 2c574: MISC BASE D57D8D6C4E4C lea r29, ptr [r30+r17*2+0x4c] +XDIS 2c57a: MISC BASE D57D8D6C4F4D lea r29, ptr [r31+r17*2+0x4d] +XDIS 2c580: MISC BASE D56C8D6C502F lea r29, ptr [rax+r18*2+0x2f] +XDIS 2c586: MISC BASE D56C8D6C5130 lea r29, ptr [rcx+r18*2+0x30] +XDIS 2c58c: MISC BASE D56C8D6C5231 lea r29, ptr [rdx+r18*2+0x31] +XDIS 2c592: MISC BASE D56C8D6C5332 lea r29, ptr [rbx+r18*2+0x32] +XDIS 2c598: MISC BASE D56C8D6C5433 lea r29, ptr [rsp+r18*2+0x33] +XDIS 2c59e: MISC BASE D56C8D6C5534 lea r29, ptr [rbp+r18*2+0x34] +XDIS 2c5a4: MISC BASE D56C8D6C5635 lea r29, ptr [rsi+r18*2+0x35] +XDIS 2c5aa: MISC BASE D56C8D6C5736 lea r29, ptr [rdi+r18*2+0x36] +XDIS 2c5b0: MISC BASE D56D8D6C5037 lea r29, ptr [r8+r18*2+0x37] +XDIS 2c5b6: MISC BASE D56D8D6C5138 lea r29, ptr [r9+r18*2+0x38] +XDIS 2c5bc: MISC BASE D56D8D6C5239 lea r29, ptr [r10+r18*2+0x39] +XDIS 2c5c2: MISC BASE D56D8D6C533A lea r29, ptr [r11+r18*2+0x3a] +XDIS 2c5c8: MISC BASE D56D8D6C543B lea r29, ptr [r12+r18*2+0x3b] +XDIS 2c5ce: MISC BASE D56D8D6C553C lea r29, ptr [r13+r18*2+0x3c] +XDIS 2c5d4: MISC BASE D56D8D6C563D lea r29, ptr [r14+r18*2+0x3d] +XDIS 2c5da: MISC BASE D56D8D6C573E lea r29, ptr [r15+r18*2+0x3e] +XDIS 2c5e0: MISC BASE D57C8D6C503F lea r29, ptr [r16+r18*2+0x3f] +XDIS 2c5e6: MISC BASE D57C8D6C5140 lea r29, ptr [r17+r18*2+0x40] +XDIS 2c5ec: MISC BASE D57C8D6C5241 lea r29, ptr [r18+r18*2+0x41] +XDIS 2c5f2: MISC BASE D57C8D6C5342 lea r29, ptr [r19+r18*2+0x42] +XDIS 2c5f8: MISC BASE D57C8D6C5443 lea r29, ptr [r20+r18*2+0x43] +XDIS 2c5fe: MISC BASE D57C8D6C5544 lea r29, ptr [r21+r18*2+0x44] +XDIS 2c604: MISC BASE D57C8D6C5645 lea r29, ptr [r22+r18*2+0x45] +XDIS 2c60a: MISC BASE D57C8D6C5746 lea r29, ptr [r23+r18*2+0x46] +XDIS 2c610: MISC BASE D57D8D6C5047 lea r29, ptr [r24+r18*2+0x47] +XDIS 2c616: MISC BASE D57D8D6C5148 lea r29, ptr [r25+r18*2+0x48] +XDIS 2c61c: MISC BASE D57D8D6C5249 lea r29, ptr [r26+r18*2+0x49] +XDIS 2c622: MISC BASE D57D8D6C534A lea r29, ptr [r27+r18*2+0x4a] +XDIS 2c628: MISC BASE D57D8D6C544B lea r29, ptr [r28+r18*2+0x4b] +XDIS 2c62e: MISC BASE D57D8D6C554C lea r29, ptr [r29+r18*2+0x4c] +XDIS 2c634: MISC BASE D57D8D6C564D lea r29, ptr [r30+r18*2+0x4d] +XDIS 2c63a: MISC BASE D57D8D6C574E lea r29, ptr [r31+r18*2+0x4e] +XDIS 2c640: MISC BASE D56C8D6C5830 lea r29, ptr [rax+r19*2+0x30] +XDIS 2c646: MISC BASE D56C8D6C5931 lea r29, ptr [rcx+r19*2+0x31] +XDIS 2c64c: MISC BASE D56C8D6C5A32 lea r29, ptr [rdx+r19*2+0x32] +XDIS 2c652: MISC BASE D56C8D6C5B33 lea r29, ptr [rbx+r19*2+0x33] +XDIS 2c658: MISC BASE D56C8D6C5C34 lea r29, ptr [rsp+r19*2+0x34] +XDIS 2c65e: MISC BASE D56C8D6C5D35 lea r29, ptr [rbp+r19*2+0x35] +XDIS 2c664: MISC BASE D56C8D6C5E36 lea r29, ptr [rsi+r19*2+0x36] +XDIS 2c66a: MISC BASE D56C8D6C5F37 lea r29, ptr [rdi+r19*2+0x37] +XDIS 2c670: MISC BASE D56D8D6C5838 lea r29, ptr [r8+r19*2+0x38] +XDIS 2c676: MISC BASE D56D8D6C5939 lea r29, ptr [r9+r19*2+0x39] +XDIS 2c67c: MISC BASE D56D8D6C5A3A lea r29, ptr [r10+r19*2+0x3a] +XDIS 2c682: MISC BASE D56D8D6C5B3B lea r29, ptr [r11+r19*2+0x3b] +XDIS 2c688: MISC BASE D56D8D6C5C3C lea r29, ptr [r12+r19*2+0x3c] +XDIS 2c68e: MISC BASE D56D8D6C5D3D lea r29, ptr [r13+r19*2+0x3d] +XDIS 2c694: MISC BASE D56D8D6C5E3E lea r29, ptr [r14+r19*2+0x3e] +XDIS 2c69a: MISC BASE D56D8D6C5F3F lea r29, ptr [r15+r19*2+0x3f] +XDIS 2c6a0: MISC BASE D57C8D6C5840 lea r29, ptr [r16+r19*2+0x40] +XDIS 2c6a6: MISC BASE D57C8D6C5941 lea r29, ptr [r17+r19*2+0x41] +XDIS 2c6ac: MISC BASE D57C8D6C5A42 lea r29, ptr [r18+r19*2+0x42] +XDIS 2c6b2: MISC BASE D57C8D6C5B43 lea r29, ptr [r19+r19*2+0x43] +XDIS 2c6b8: MISC BASE D57C8D6C5C44 lea r29, ptr [r20+r19*2+0x44] +XDIS 2c6be: MISC BASE D57C8D6C5D45 lea r29, ptr [r21+r19*2+0x45] +XDIS 2c6c4: MISC BASE D57C8D6C5E46 lea r29, ptr [r22+r19*2+0x46] +XDIS 2c6ca: MISC BASE D57C8D6C5F47 lea r29, ptr [r23+r19*2+0x47] +XDIS 2c6d0: MISC BASE D57D8D6C5848 lea r29, ptr [r24+r19*2+0x48] +XDIS 2c6d6: MISC BASE D57D8D6C5949 lea r29, ptr [r25+r19*2+0x49] +XDIS 2c6dc: MISC BASE D57D8D6C5A4A lea r29, ptr [r26+r19*2+0x4a] +XDIS 2c6e2: MISC BASE D57D8D6C5B4B lea r29, ptr [r27+r19*2+0x4b] +XDIS 2c6e8: MISC BASE D57D8D6C5C4C lea r29, ptr [r28+r19*2+0x4c] +XDIS 2c6ee: MISC BASE D57D8D6C5D4D lea r29, ptr [r29+r19*2+0x4d] +XDIS 2c6f4: MISC BASE D57D8D6C5E4E lea r29, ptr [r30+r19*2+0x4e] +XDIS 2c6fa: MISC BASE D57D8D6C5F4F lea r29, ptr [r31+r19*2+0x4f] +XDIS 2c700: MISC BASE D56C8D6C6031 lea r29, ptr [rax+r20*2+0x31] +XDIS 2c706: MISC BASE D56C8D6C6132 lea r29, ptr [rcx+r20*2+0x32] +XDIS 2c70c: MISC BASE D56C8D6C6233 lea r29, ptr [rdx+r20*2+0x33] +XDIS 2c712: MISC BASE D56C8D6C6334 lea r29, ptr [rbx+r20*2+0x34] +XDIS 2c718: MISC BASE D56C8D6C6435 lea r29, ptr [rsp+r20*2+0x35] +XDIS 2c71e: MISC BASE D56C8D6C6536 lea r29, ptr [rbp+r20*2+0x36] +XDIS 2c724: MISC BASE D56C8D6C6637 lea r29, ptr [rsi+r20*2+0x37] +XDIS 2c72a: MISC BASE D56C8D6C6738 lea r29, ptr [rdi+r20*2+0x38] +XDIS 2c730: MISC BASE D56D8D6C6039 lea r29, ptr [r8+r20*2+0x39] +XDIS 2c736: MISC BASE D56D8D6C613A lea r29, ptr [r9+r20*2+0x3a] +XDIS 2c73c: MISC BASE D56D8D6C623B lea r29, ptr [r10+r20*2+0x3b] +XDIS 2c742: MISC BASE D56D8D6C633C lea r29, ptr [r11+r20*2+0x3c] +XDIS 2c748: MISC BASE D56D8D6C643D lea r29, ptr [r12+r20*2+0x3d] +XDIS 2c74e: MISC BASE D56D8D6C653E lea r29, ptr [r13+r20*2+0x3e] +XDIS 2c754: MISC BASE D56D8D6C663F lea r29, ptr [r14+r20*2+0x3f] +XDIS 2c75a: MISC BASE D56D8D6C6740 lea r29, ptr [r15+r20*2+0x40] +XDIS 2c760: MISC BASE D57C8D6C6041 lea r29, ptr [r16+r20*2+0x41] +XDIS 2c766: MISC BASE D57C8D6C6142 lea r29, ptr [r17+r20*2+0x42] +XDIS 2c76c: MISC BASE D57C8D6C6243 lea r29, ptr [r18+r20*2+0x43] +XDIS 2c772: MISC BASE D57C8D6C6344 lea r29, ptr [r19+r20*2+0x44] +XDIS 2c778: MISC BASE D57C8D6C6445 lea r29, ptr [r20+r20*2+0x45] +XDIS 2c77e: MISC BASE D57C8D6C6546 lea r29, ptr [r21+r20*2+0x46] +XDIS 2c784: MISC BASE D57C8D6C6647 lea r29, ptr [r22+r20*2+0x47] +XDIS 2c78a: MISC BASE D57C8D6C6748 lea r29, ptr [r23+r20*2+0x48] +XDIS 2c790: MISC BASE D57D8D6C6049 lea r29, ptr [r24+r20*2+0x49] +XDIS 2c796: MISC BASE D57D8D6C614A lea r29, ptr [r25+r20*2+0x4a] +XDIS 2c79c: MISC BASE D57D8D6C624B lea r29, ptr [r26+r20*2+0x4b] +XDIS 2c7a2: MISC BASE D57D8D6C634C lea r29, ptr [r27+r20*2+0x4c] +XDIS 2c7a8: MISC BASE D57D8D6C644D lea r29, ptr [r28+r20*2+0x4d] +XDIS 2c7ae: MISC BASE D57D8D6C654E lea r29, ptr [r29+r20*2+0x4e] +XDIS 2c7b4: MISC BASE D57D8D6C664F lea r29, ptr [r30+r20*2+0x4f] +XDIS 2c7ba: MISC BASE D57D8D6C6750 lea r29, ptr [r31+r20*2+0x50] +XDIS 2c7c0: MISC BASE D56C8D6C6832 lea r29, ptr [rax+r21*2+0x32] +XDIS 2c7c6: MISC BASE D56C8D6C6933 lea r29, ptr [rcx+r21*2+0x33] +XDIS 2c7cc: MISC BASE D56C8D6C6A34 lea r29, ptr [rdx+r21*2+0x34] +XDIS 2c7d2: MISC BASE D56C8D6C6B35 lea r29, ptr [rbx+r21*2+0x35] +XDIS 2c7d8: MISC BASE D56C8D6C6C36 lea r29, ptr [rsp+r21*2+0x36] +XDIS 2c7de: MISC BASE D56C8D6C6D37 lea r29, ptr [rbp+r21*2+0x37] +XDIS 2c7e4: MISC BASE D56C8D6C6E38 lea r29, ptr [rsi+r21*2+0x38] +XDIS 2c7ea: MISC BASE D56C8D6C6F39 lea r29, ptr [rdi+r21*2+0x39] +XDIS 2c7f0: MISC BASE D56D8D6C683A lea r29, ptr [r8+r21*2+0x3a] +XDIS 2c7f6: MISC BASE D56D8D6C693B lea r29, ptr [r9+r21*2+0x3b] +XDIS 2c7fc: MISC BASE D56D8D6C6A3C lea r29, ptr [r10+r21*2+0x3c] +XDIS 2c802: MISC BASE D56D8D6C6B3D lea r29, ptr [r11+r21*2+0x3d] +XDIS 2c808: MISC BASE D56D8D6C6C3E lea r29, ptr [r12+r21*2+0x3e] +XDIS 2c80e: MISC BASE D56D8D6C6D3F lea r29, ptr [r13+r21*2+0x3f] +XDIS 2c814: MISC BASE D56D8D6C6E40 lea r29, ptr [r14+r21*2+0x40] +XDIS 2c81a: MISC BASE D56D8D6C6F41 lea r29, ptr [r15+r21*2+0x41] +XDIS 2c820: MISC BASE D57C8D6C6842 lea r29, ptr [r16+r21*2+0x42] +XDIS 2c826: MISC BASE D57C8D6C6943 lea r29, ptr [r17+r21*2+0x43] +XDIS 2c82c: MISC BASE D57C8D6C6A44 lea r29, ptr [r18+r21*2+0x44] +XDIS 2c832: MISC BASE D57C8D6C6B45 lea r29, ptr [r19+r21*2+0x45] +XDIS 2c838: MISC BASE D57C8D6C6C46 lea r29, ptr [r20+r21*2+0x46] +XDIS 2c83e: MISC BASE D57C8D6C6D47 lea r29, ptr [r21+r21*2+0x47] +XDIS 2c844: MISC BASE D57C8D6C6E48 lea r29, ptr [r22+r21*2+0x48] +XDIS 2c84a: MISC BASE D57C8D6C6F49 lea r29, ptr [r23+r21*2+0x49] +XDIS 2c850: MISC BASE D57D8D6C684A lea r29, ptr [r24+r21*2+0x4a] +XDIS 2c856: MISC BASE D57D8D6C694B lea r29, ptr [r25+r21*2+0x4b] +XDIS 2c85c: MISC BASE D57D8D6C6A4C lea r29, ptr [r26+r21*2+0x4c] +XDIS 2c862: MISC BASE D57D8D6C6B4D lea r29, ptr [r27+r21*2+0x4d] +XDIS 2c868: MISC BASE D57D8D6C6C4E lea r29, ptr [r28+r21*2+0x4e] +XDIS 2c86e: MISC BASE D57D8D6C6D4F lea r29, ptr [r29+r21*2+0x4f] +XDIS 2c874: MISC BASE D57D8D6C6E50 lea r29, ptr [r30+r21*2+0x50] +XDIS 2c87a: MISC BASE D57D8D6C6F51 lea r29, ptr [r31+r21*2+0x51] +XDIS 2c880: MISC BASE D56C8D6C7033 lea r29, ptr [rax+r22*2+0x33] +XDIS 2c886: MISC BASE D56C8D6C7134 lea r29, ptr [rcx+r22*2+0x34] +XDIS 2c88c: MISC BASE D56C8D6C7235 lea r29, ptr [rdx+r22*2+0x35] +XDIS 2c892: MISC BASE D56C8D6C7336 lea r29, ptr [rbx+r22*2+0x36] +XDIS 2c898: MISC BASE D56C8D6C7437 lea r29, ptr [rsp+r22*2+0x37] +XDIS 2c89e: MISC BASE D56C8D6C7538 lea r29, ptr [rbp+r22*2+0x38] +XDIS 2c8a4: MISC BASE D56C8D6C7639 lea r29, ptr [rsi+r22*2+0x39] +XDIS 2c8aa: MISC BASE D56C8D6C773A lea r29, ptr [rdi+r22*2+0x3a] +XDIS 2c8b0: MISC BASE D56D8D6C703B lea r29, ptr [r8+r22*2+0x3b] +XDIS 2c8b6: MISC BASE D56D8D6C713C lea r29, ptr [r9+r22*2+0x3c] +XDIS 2c8bc: MISC BASE D56D8D6C723D lea r29, ptr [r10+r22*2+0x3d] +XDIS 2c8c2: MISC BASE D56D8D6C733E lea r29, ptr [r11+r22*2+0x3e] +XDIS 2c8c8: MISC BASE D56D8D6C743F lea r29, ptr [r12+r22*2+0x3f] +XDIS 2c8ce: MISC BASE D56D8D6C7540 lea r29, ptr [r13+r22*2+0x40] +XDIS 2c8d4: MISC BASE D56D8D6C7641 lea r29, ptr [r14+r22*2+0x41] +XDIS 2c8da: MISC BASE D56D8D6C7742 lea r29, ptr [r15+r22*2+0x42] +XDIS 2c8e0: MISC BASE D57C8D6C7043 lea r29, ptr [r16+r22*2+0x43] +XDIS 2c8e6: MISC BASE D57C8D6C7144 lea r29, ptr [r17+r22*2+0x44] +XDIS 2c8ec: MISC BASE D57C8D6C7245 lea r29, ptr [r18+r22*2+0x45] +XDIS 2c8f2: MISC BASE D57C8D6C7346 lea r29, ptr [r19+r22*2+0x46] +XDIS 2c8f8: MISC BASE D57C8D6C7447 lea r29, ptr [r20+r22*2+0x47] +XDIS 2c8fe: MISC BASE D57C8D6C7548 lea r29, ptr [r21+r22*2+0x48] +XDIS 2c904: MISC BASE D57C8D6C7649 lea r29, ptr [r22+r22*2+0x49] +XDIS 2c90a: MISC BASE D57C8D6C774A lea r29, ptr [r23+r22*2+0x4a] +XDIS 2c910: MISC BASE D57D8D6C704B lea r29, ptr [r24+r22*2+0x4b] +XDIS 2c916: MISC BASE D57D8D6C714C lea r29, ptr [r25+r22*2+0x4c] +XDIS 2c91c: MISC BASE D57D8D6C724D lea r29, ptr [r26+r22*2+0x4d] +XDIS 2c922: MISC BASE D57D8D6C734E lea r29, ptr [r27+r22*2+0x4e] +XDIS 2c928: MISC BASE D57D8D6C744F lea r29, ptr [r28+r22*2+0x4f] +XDIS 2c92e: MISC BASE D57D8D6C7550 lea r29, ptr [r29+r22*2+0x50] +XDIS 2c934: MISC BASE D57D8D6C7651 lea r29, ptr [r30+r22*2+0x51] +XDIS 2c93a: MISC BASE D57D8D6C7752 lea r29, ptr [r31+r22*2+0x52] +XDIS 2c940: MISC BASE D56C8D6C7834 lea r29, ptr [rax+r23*2+0x34] +XDIS 2c946: MISC BASE D56C8D6C7935 lea r29, ptr [rcx+r23*2+0x35] +XDIS 2c94c: MISC BASE D56C8D6C7A36 lea r29, ptr [rdx+r23*2+0x36] +XDIS 2c952: MISC BASE D56C8D6C7B37 lea r29, ptr [rbx+r23*2+0x37] +XDIS 2c958: MISC BASE D56C8D6C7C38 lea r29, ptr [rsp+r23*2+0x38] +XDIS 2c95e: MISC BASE D56C8D6C7D39 lea r29, ptr [rbp+r23*2+0x39] +XDIS 2c964: MISC BASE D56C8D6C7E3A lea r29, ptr [rsi+r23*2+0x3a] +XDIS 2c96a: MISC BASE D56C8D6C7F3B lea r29, ptr [rdi+r23*2+0x3b] +XDIS 2c970: MISC BASE D56D8D6C783C lea r29, ptr [r8+r23*2+0x3c] +XDIS 2c976: MISC BASE D56D8D6C793D lea r29, ptr [r9+r23*2+0x3d] +XDIS 2c97c: MISC BASE D56D8D6C7A3E lea r29, ptr [r10+r23*2+0x3e] +XDIS 2c982: MISC BASE D56D8D6C7B3F lea r29, ptr [r11+r23*2+0x3f] +XDIS 2c988: MISC BASE D56D8D6C7C40 lea r29, ptr [r12+r23*2+0x40] +XDIS 2c98e: MISC BASE D56D8D6C7D41 lea r29, ptr [r13+r23*2+0x41] +XDIS 2c994: MISC BASE D56D8D6C7E42 lea r29, ptr [r14+r23*2+0x42] +XDIS 2c99a: MISC BASE D56D8D6C7F43 lea r29, ptr [r15+r23*2+0x43] +XDIS 2c9a0: MISC BASE D57C8D6C7844 lea r29, ptr [r16+r23*2+0x44] +XDIS 2c9a6: MISC BASE D57C8D6C7945 lea r29, ptr [r17+r23*2+0x45] +XDIS 2c9ac: MISC BASE D57C8D6C7A46 lea r29, ptr [r18+r23*2+0x46] +XDIS 2c9b2: MISC BASE D57C8D6C7B47 lea r29, ptr [r19+r23*2+0x47] +XDIS 2c9b8: MISC BASE D57C8D6C7C48 lea r29, ptr [r20+r23*2+0x48] +XDIS 2c9be: MISC BASE D57C8D6C7D49 lea r29, ptr [r21+r23*2+0x49] +XDIS 2c9c4: MISC BASE D57C8D6C7E4A lea r29, ptr [r22+r23*2+0x4a] +XDIS 2c9ca: MISC BASE D57C8D6C7F4B lea r29, ptr [r23+r23*2+0x4b] +XDIS 2c9d0: MISC BASE D57D8D6C784C lea r29, ptr [r24+r23*2+0x4c] +XDIS 2c9d6: MISC BASE D57D8D6C794D lea r29, ptr [r25+r23*2+0x4d] +XDIS 2c9dc: MISC BASE D57D8D6C7A4E lea r29, ptr [r26+r23*2+0x4e] +XDIS 2c9e2: MISC BASE D57D8D6C7B4F lea r29, ptr [r27+r23*2+0x4f] +XDIS 2c9e8: MISC BASE D57D8D6C7C50 lea r29, ptr [r28+r23*2+0x50] +XDIS 2c9ee: MISC BASE D57D8D6C7D51 lea r29, ptr [r29+r23*2+0x51] +XDIS 2c9f4: MISC BASE D57D8D6C7E52 lea r29, ptr [r30+r23*2+0x52] +XDIS 2c9fa: MISC BASE D57D8D6C7F53 lea r29, ptr [r31+r23*2+0x53] +XDIS 2ca00: MISC BASE D56E8D6C4035 lea r29, ptr [rax+r24*2+0x35] +XDIS 2ca06: MISC BASE D56E8D6C4136 lea r29, ptr [rcx+r24*2+0x36] +XDIS 2ca0c: MISC BASE D56E8D6C4237 lea r29, ptr [rdx+r24*2+0x37] +XDIS 2ca12: MISC BASE D56E8D6C4338 lea r29, ptr [rbx+r24*2+0x38] +XDIS 2ca18: MISC BASE D56E8D6C4439 lea r29, ptr [rsp+r24*2+0x39] +XDIS 2ca1e: MISC BASE D56E8D6C453A lea r29, ptr [rbp+r24*2+0x3a] +XDIS 2ca24: MISC BASE D56E8D6C463B lea r29, ptr [rsi+r24*2+0x3b] +XDIS 2ca2a: MISC BASE D56E8D6C473C lea r29, ptr [rdi+r24*2+0x3c] +XDIS 2ca30: MISC BASE D56F8D6C403D lea r29, ptr [r8+r24*2+0x3d] +XDIS 2ca36: MISC BASE D56F8D6C413E lea r29, ptr [r9+r24*2+0x3e] +XDIS 2ca3c: MISC BASE D56F8D6C423F lea r29, ptr [r10+r24*2+0x3f] +XDIS 2ca42: MISC BASE D56F8D6C4340 lea r29, ptr [r11+r24*2+0x40] +XDIS 2ca48: MISC BASE D56F8D6C4441 lea r29, ptr [r12+r24*2+0x41] +XDIS 2ca4e: MISC BASE D56F8D6C4542 lea r29, ptr [r13+r24*2+0x42] +XDIS 2ca54: MISC BASE D56F8D6C4643 lea r29, ptr [r14+r24*2+0x43] +XDIS 2ca5a: MISC BASE D56F8D6C4744 lea r29, ptr [r15+r24*2+0x44] +XDIS 2ca60: MISC BASE D57E8D6C4045 lea r29, ptr [r16+r24*2+0x45] +XDIS 2ca66: MISC BASE D57E8D6C4146 lea r29, ptr [r17+r24*2+0x46] +XDIS 2ca6c: MISC BASE D57E8D6C4247 lea r29, ptr [r18+r24*2+0x47] +XDIS 2ca72: MISC BASE D57E8D6C4348 lea r29, ptr [r19+r24*2+0x48] +XDIS 2ca78: MISC BASE D57E8D6C4449 lea r29, ptr [r20+r24*2+0x49] +XDIS 2ca7e: MISC BASE D57E8D6C454A lea r29, ptr [r21+r24*2+0x4a] +XDIS 2ca84: MISC BASE D57E8D6C464B lea r29, ptr [r22+r24*2+0x4b] +XDIS 2ca8a: MISC BASE D57E8D6C474C lea r29, ptr [r23+r24*2+0x4c] +XDIS 2ca90: MISC BASE D57F8D6C404D lea r29, ptr [r24+r24*2+0x4d] +XDIS 2ca96: MISC BASE D57F8D6C414E lea r29, ptr [r25+r24*2+0x4e] +XDIS 2ca9c: MISC BASE D57F8D6C424F lea r29, ptr [r26+r24*2+0x4f] +XDIS 2caa2: MISC BASE D57F8D6C4350 lea r29, ptr [r27+r24*2+0x50] +XDIS 2caa8: MISC BASE D57F8D6C4451 lea r29, ptr [r28+r24*2+0x51] +XDIS 2caae: MISC BASE D57F8D6C4552 lea r29, ptr [r29+r24*2+0x52] +XDIS 2cab4: MISC BASE D57F8D6C4653 lea r29, ptr [r30+r24*2+0x53] +XDIS 2caba: MISC BASE D57F8D6C4754 lea r29, ptr [r31+r24*2+0x54] +XDIS 2cac0: MISC BASE D56E8D6C4836 lea r29, ptr [rax+r25*2+0x36] +XDIS 2cac6: MISC BASE D56E8D6C4937 lea r29, ptr [rcx+r25*2+0x37] +XDIS 2cacc: MISC BASE D56E8D6C4A38 lea r29, ptr [rdx+r25*2+0x38] +XDIS 2cad2: MISC BASE D56E8D6C4B39 lea r29, ptr [rbx+r25*2+0x39] +XDIS 2cad8: MISC BASE D56E8D6C4C3A lea r29, ptr [rsp+r25*2+0x3a] +XDIS 2cade: MISC BASE D56E8D6C4D3B lea r29, ptr [rbp+r25*2+0x3b] +XDIS 2cae4: MISC BASE D56E8D6C4E3C lea r29, ptr [rsi+r25*2+0x3c] +XDIS 2caea: MISC BASE D56E8D6C4F3D lea r29, ptr [rdi+r25*2+0x3d] +XDIS 2caf0: MISC BASE D56F8D6C483E lea r29, ptr [r8+r25*2+0x3e] +XDIS 2caf6: MISC BASE D56F8D6C493F lea r29, ptr [r9+r25*2+0x3f] +XDIS 2cafc: MISC BASE D56F8D6C4A40 lea r29, ptr [r10+r25*2+0x40] +XDIS 2cb02: MISC BASE D56F8D6C4B41 lea r29, ptr [r11+r25*2+0x41] +XDIS 2cb08: MISC BASE D56F8D6C4C42 lea r29, ptr [r12+r25*2+0x42] +XDIS 2cb0e: MISC BASE D56F8D6C4D43 lea r29, ptr [r13+r25*2+0x43] +XDIS 2cb14: MISC BASE D56F8D6C4E44 lea r29, ptr [r14+r25*2+0x44] +XDIS 2cb1a: MISC BASE D56F8D6C4F45 lea r29, ptr [r15+r25*2+0x45] +XDIS 2cb20: MISC BASE D57E8D6C4846 lea r29, ptr [r16+r25*2+0x46] +XDIS 2cb26: MISC BASE D57E8D6C4947 lea r29, ptr [r17+r25*2+0x47] +XDIS 2cb2c: MISC BASE D57E8D6C4A48 lea r29, ptr [r18+r25*2+0x48] +XDIS 2cb32: MISC BASE D57E8D6C4B49 lea r29, ptr [r19+r25*2+0x49] +XDIS 2cb38: MISC BASE D57E8D6C4C4A lea r29, ptr [r20+r25*2+0x4a] +XDIS 2cb3e: MISC BASE D57E8D6C4D4B lea r29, ptr [r21+r25*2+0x4b] +XDIS 2cb44: MISC BASE D57E8D6C4E4C lea r29, ptr [r22+r25*2+0x4c] +XDIS 2cb4a: MISC BASE D57E8D6C4F4D lea r29, ptr [r23+r25*2+0x4d] +XDIS 2cb50: MISC BASE D57F8D6C484E lea r29, ptr [r24+r25*2+0x4e] +XDIS 2cb56: MISC BASE D57F8D6C494F lea r29, ptr [r25+r25*2+0x4f] +XDIS 2cb5c: MISC BASE D57F8D6C4A50 lea r29, ptr [r26+r25*2+0x50] +XDIS 2cb62: MISC BASE D57F8D6C4B51 lea r29, ptr [r27+r25*2+0x51] +XDIS 2cb68: MISC BASE D57F8D6C4C52 lea r29, ptr [r28+r25*2+0x52] +XDIS 2cb6e: MISC BASE D57F8D6C4D53 lea r29, ptr [r29+r25*2+0x53] +XDIS 2cb74: MISC BASE D57F8D6C4E54 lea r29, ptr [r30+r25*2+0x54] +XDIS 2cb7a: MISC BASE D57F8D6C4F55 lea r29, ptr [r31+r25*2+0x55] +XDIS 2cb80: MISC BASE D56E8D6C5037 lea r29, ptr [rax+r26*2+0x37] +XDIS 2cb86: MISC BASE D56E8D6C5138 lea r29, ptr [rcx+r26*2+0x38] +XDIS 2cb8c: MISC BASE D56E8D6C5239 lea r29, ptr [rdx+r26*2+0x39] +XDIS 2cb92: MISC BASE D56E8D6C533A lea r29, ptr [rbx+r26*2+0x3a] +XDIS 2cb98: MISC BASE D56E8D6C543B lea r29, ptr [rsp+r26*2+0x3b] +XDIS 2cb9e: MISC BASE D56E8D6C553C lea r29, ptr [rbp+r26*2+0x3c] +XDIS 2cba4: MISC BASE D56E8D6C563D lea r29, ptr [rsi+r26*2+0x3d] +XDIS 2cbaa: MISC BASE D56E8D6C573E lea r29, ptr [rdi+r26*2+0x3e] +XDIS 2cbb0: MISC BASE D56F8D6C503F lea r29, ptr [r8+r26*2+0x3f] +XDIS 2cbb6: MISC BASE D56F8D6C5140 lea r29, ptr [r9+r26*2+0x40] +XDIS 2cbbc: MISC BASE D56F8D6C5241 lea r29, ptr [r10+r26*2+0x41] +XDIS 2cbc2: MISC BASE D56F8D6C5342 lea r29, ptr [r11+r26*2+0x42] +XDIS 2cbc8: MISC BASE D56F8D6C5443 lea r29, ptr [r12+r26*2+0x43] +XDIS 2cbce: MISC BASE D56F8D6C5544 lea r29, ptr [r13+r26*2+0x44] +XDIS 2cbd4: MISC BASE D56F8D6C5645 lea r29, ptr [r14+r26*2+0x45] +XDIS 2cbda: MISC BASE D56F8D6C5746 lea r29, ptr [r15+r26*2+0x46] +XDIS 2cbe0: MISC BASE D57E8D6C5047 lea r29, ptr [r16+r26*2+0x47] +XDIS 2cbe6: MISC BASE D57E8D6C5148 lea r29, ptr [r17+r26*2+0x48] +XDIS 2cbec: MISC BASE D57E8D6C5249 lea r29, ptr [r18+r26*2+0x49] +XDIS 2cbf2: MISC BASE D57E8D6C534A lea r29, ptr [r19+r26*2+0x4a] +XDIS 2cbf8: MISC BASE D57E8D6C544B lea r29, ptr [r20+r26*2+0x4b] +XDIS 2cbfe: MISC BASE D57E8D6C554C lea r29, ptr [r21+r26*2+0x4c] +XDIS 2cc04: MISC BASE D57E8D6C564D lea r29, ptr [r22+r26*2+0x4d] +XDIS 2cc0a: MISC BASE D57E8D6C574E lea r29, ptr [r23+r26*2+0x4e] +XDIS 2cc10: MISC BASE D57F8D6C504F lea r29, ptr [r24+r26*2+0x4f] +XDIS 2cc16: MISC BASE D57F8D6C5150 lea r29, ptr [r25+r26*2+0x50] +XDIS 2cc1c: MISC BASE D57F8D6C5251 lea r29, ptr [r26+r26*2+0x51] +XDIS 2cc22: MISC BASE D57F8D6C5352 lea r29, ptr [r27+r26*2+0x52] +XDIS 2cc28: MISC BASE D57F8D6C5453 lea r29, ptr [r28+r26*2+0x53] +XDIS 2cc2e: MISC BASE D57F8D6C5554 lea r29, ptr [r29+r26*2+0x54] +XDIS 2cc34: MISC BASE D57F8D6C5655 lea r29, ptr [r30+r26*2+0x55] +XDIS 2cc3a: MISC BASE D57F8D6C5756 lea r29, ptr [r31+r26*2+0x56] +XDIS 2cc40: MISC BASE D56E8D6C5838 lea r29, ptr [rax+r27*2+0x38] +XDIS 2cc46: MISC BASE D56E8D6C5939 lea r29, ptr [rcx+r27*2+0x39] +XDIS 2cc4c: MISC BASE D56E8D6C5A3A lea r29, ptr [rdx+r27*2+0x3a] +XDIS 2cc52: MISC BASE D56E8D6C5B3B lea r29, ptr [rbx+r27*2+0x3b] +XDIS 2cc58: MISC BASE D56E8D6C5C3C lea r29, ptr [rsp+r27*2+0x3c] +XDIS 2cc5e: MISC BASE D56E8D6C5D3D lea r29, ptr [rbp+r27*2+0x3d] +XDIS 2cc64: MISC BASE D56E8D6C5E3E lea r29, ptr [rsi+r27*2+0x3e] +XDIS 2cc6a: MISC BASE D56E8D6C5F3F lea r29, ptr [rdi+r27*2+0x3f] +XDIS 2cc70: MISC BASE D56F8D6C5840 lea r29, ptr [r8+r27*2+0x40] +XDIS 2cc76: MISC BASE D56F8D6C5941 lea r29, ptr [r9+r27*2+0x41] +XDIS 2cc7c: MISC BASE D56F8D6C5A42 lea r29, ptr [r10+r27*2+0x42] +XDIS 2cc82: MISC BASE D56F8D6C5B43 lea r29, ptr [r11+r27*2+0x43] +XDIS 2cc88: MISC BASE D56F8D6C5C44 lea r29, ptr [r12+r27*2+0x44] +XDIS 2cc8e: MISC BASE D56F8D6C5D45 lea r29, ptr [r13+r27*2+0x45] +XDIS 2cc94: MISC BASE D56F8D6C5E46 lea r29, ptr [r14+r27*2+0x46] +XDIS 2cc9a: MISC BASE D56F8D6C5F47 lea r29, ptr [r15+r27*2+0x47] +XDIS 2cca0: MISC BASE D57E8D6C5848 lea r29, ptr [r16+r27*2+0x48] +XDIS 2cca6: MISC BASE D57E8D6C5949 lea r29, ptr [r17+r27*2+0x49] +XDIS 2ccac: MISC BASE D57E8D6C5A4A lea r29, ptr [r18+r27*2+0x4a] +XDIS 2ccb2: MISC BASE D57E8D6C5B4B lea r29, ptr [r19+r27*2+0x4b] +XDIS 2ccb8: MISC BASE D57E8D6C5C4C lea r29, ptr [r20+r27*2+0x4c] +XDIS 2ccbe: MISC BASE D57E8D6C5D4D lea r29, ptr [r21+r27*2+0x4d] +XDIS 2ccc4: MISC BASE D57E8D6C5E4E lea r29, ptr [r22+r27*2+0x4e] +XDIS 2ccca: MISC BASE D57E8D6C5F4F lea r29, ptr [r23+r27*2+0x4f] +XDIS 2ccd0: MISC BASE D57F8D6C5850 lea r29, ptr [r24+r27*2+0x50] +XDIS 2ccd6: MISC BASE D57F8D6C5951 lea r29, ptr [r25+r27*2+0x51] +XDIS 2ccdc: MISC BASE D57F8D6C5A52 lea r29, ptr [r26+r27*2+0x52] +XDIS 2cce2: MISC BASE D57F8D6C5B53 lea r29, ptr [r27+r27*2+0x53] +XDIS 2cce8: MISC BASE D57F8D6C5C54 lea r29, ptr [r28+r27*2+0x54] +XDIS 2ccee: MISC BASE D57F8D6C5D55 lea r29, ptr [r29+r27*2+0x55] +XDIS 2ccf4: MISC BASE D57F8D6C5E56 lea r29, ptr [r30+r27*2+0x56] +XDIS 2ccfa: MISC BASE D57F8D6C5F57 lea r29, ptr [r31+r27*2+0x57] +XDIS 2cd00: MISC BASE D56E8D6C6039 lea r29, ptr [rax+r28*2+0x39] +XDIS 2cd06: MISC BASE D56E8D6C613A lea r29, ptr [rcx+r28*2+0x3a] +XDIS 2cd0c: MISC BASE D56E8D6C623B lea r29, ptr [rdx+r28*2+0x3b] +XDIS 2cd12: MISC BASE D56E8D6C633C lea r29, ptr [rbx+r28*2+0x3c] +XDIS 2cd18: MISC BASE D56E8D6C643D lea r29, ptr [rsp+r28*2+0x3d] +XDIS 2cd1e: MISC BASE D56E8D6C653E lea r29, ptr [rbp+r28*2+0x3e] +XDIS 2cd24: MISC BASE D56E8D6C663F lea r29, ptr [rsi+r28*2+0x3f] +XDIS 2cd2a: MISC BASE D56E8D6C6740 lea r29, ptr [rdi+r28*2+0x40] +XDIS 2cd30: MISC BASE D56F8D6C6041 lea r29, ptr [r8+r28*2+0x41] +XDIS 2cd36: MISC BASE D56F8D6C6142 lea r29, ptr [r9+r28*2+0x42] +XDIS 2cd3c: MISC BASE D56F8D6C6243 lea r29, ptr [r10+r28*2+0x43] +XDIS 2cd42: MISC BASE D56F8D6C6344 lea r29, ptr [r11+r28*2+0x44] +XDIS 2cd48: MISC BASE D56F8D6C6445 lea r29, ptr [r12+r28*2+0x45] +XDIS 2cd4e: MISC BASE D56F8D6C6546 lea r29, ptr [r13+r28*2+0x46] +XDIS 2cd54: MISC BASE D56F8D6C6647 lea r29, ptr [r14+r28*2+0x47] +XDIS 2cd5a: MISC BASE D56F8D6C6748 lea r29, ptr [r15+r28*2+0x48] +XDIS 2cd60: MISC BASE D57E8D6C6049 lea r29, ptr [r16+r28*2+0x49] +XDIS 2cd66: MISC BASE D57E8D6C614A lea r29, ptr [r17+r28*2+0x4a] +XDIS 2cd6c: MISC BASE D57E8D6C624B lea r29, ptr [r18+r28*2+0x4b] +XDIS 2cd72: MISC BASE D57E8D6C634C lea r29, ptr [r19+r28*2+0x4c] +XDIS 2cd78: MISC BASE D57E8D6C644D lea r29, ptr [r20+r28*2+0x4d] +XDIS 2cd7e: MISC BASE D57E8D6C654E lea r29, ptr [r21+r28*2+0x4e] +XDIS 2cd84: MISC BASE D57E8D6C664F lea r29, ptr [r22+r28*2+0x4f] +XDIS 2cd8a: MISC BASE D57E8D6C6750 lea r29, ptr [r23+r28*2+0x50] +XDIS 2cd90: MISC BASE D57F8D6C6051 lea r29, ptr [r24+r28*2+0x51] +XDIS 2cd96: MISC BASE D57F8D6C6152 lea r29, ptr [r25+r28*2+0x52] +XDIS 2cd9c: MISC BASE D57F8D6C6253 lea r29, ptr [r26+r28*2+0x53] +XDIS 2cda2: MISC BASE D57F8D6C6354 lea r29, ptr [r27+r28*2+0x54] +XDIS 2cda8: MISC BASE D57F8D6C6455 lea r29, ptr [r28+r28*2+0x55] +XDIS 2cdae: MISC BASE D57F8D6C6556 lea r29, ptr [r29+r28*2+0x56] +XDIS 2cdb4: MISC BASE D57F8D6C6657 lea r29, ptr [r30+r28*2+0x57] +XDIS 2cdba: MISC BASE D57F8D6C6758 lea r29, ptr [r31+r28*2+0x58] +XDIS 2cdc0: MISC BASE D56E8D6C683A lea r29, ptr [rax+r29*2+0x3a] +XDIS 2cdc6: MISC BASE D56E8D6C693B lea r29, ptr [rcx+r29*2+0x3b] +XDIS 2cdcc: MISC BASE D56E8D6C6A3C lea r29, ptr [rdx+r29*2+0x3c] +XDIS 2cdd2: MISC BASE D56E8D6C6B3D lea r29, ptr [rbx+r29*2+0x3d] +XDIS 2cdd8: MISC BASE D56E8D6C6C3E lea r29, ptr [rsp+r29*2+0x3e] +XDIS 2cdde: MISC BASE D56E8D6C6D3F lea r29, ptr [rbp+r29*2+0x3f] +XDIS 2cde4: MISC BASE D56E8D6C6E40 lea r29, ptr [rsi+r29*2+0x40] +XDIS 2cdea: MISC BASE D56E8D6C6F41 lea r29, ptr [rdi+r29*2+0x41] +XDIS 2cdf0: MISC BASE D56F8D6C6842 lea r29, ptr [r8+r29*2+0x42] +XDIS 2cdf6: MISC BASE D56F8D6C6943 lea r29, ptr [r9+r29*2+0x43] +XDIS 2cdfc: MISC BASE D56F8D6C6A44 lea r29, ptr [r10+r29*2+0x44] +XDIS 2ce02: MISC BASE D56F8D6C6B45 lea r29, ptr [r11+r29*2+0x45] +XDIS 2ce08: MISC BASE D56F8D6C6C46 lea r29, ptr [r12+r29*2+0x46] +XDIS 2ce0e: MISC BASE D56F8D6C6D47 lea r29, ptr [r13+r29*2+0x47] +XDIS 2ce14: MISC BASE D56F8D6C6E48 lea r29, ptr [r14+r29*2+0x48] +XDIS 2ce1a: MISC BASE D56F8D6C6F49 lea r29, ptr [r15+r29*2+0x49] +XDIS 2ce20: MISC BASE D57E8D6C684A lea r29, ptr [r16+r29*2+0x4a] +XDIS 2ce26: MISC BASE D57E8D6C694B lea r29, ptr [r17+r29*2+0x4b] +XDIS 2ce2c: MISC BASE D57E8D6C6A4C lea r29, ptr [r18+r29*2+0x4c] +XDIS 2ce32: MISC BASE D57E8D6C6B4D lea r29, ptr [r19+r29*2+0x4d] +XDIS 2ce38: MISC BASE D57E8D6C6C4E lea r29, ptr [r20+r29*2+0x4e] +XDIS 2ce3e: MISC BASE D57E8D6C6D4F lea r29, ptr [r21+r29*2+0x4f] +XDIS 2ce44: MISC BASE D57E8D6C6E50 lea r29, ptr [r22+r29*2+0x50] +XDIS 2ce4a: MISC BASE D57E8D6C6F51 lea r29, ptr [r23+r29*2+0x51] +XDIS 2ce50: MISC BASE D57F8D6C6852 lea r29, ptr [r24+r29*2+0x52] +XDIS 2ce56: MISC BASE D57F8D6C6953 lea r29, ptr [r25+r29*2+0x53] +XDIS 2ce5c: MISC BASE D57F8D6C6A54 lea r29, ptr [r26+r29*2+0x54] +XDIS 2ce62: MISC BASE D57F8D6C6B55 lea r29, ptr [r27+r29*2+0x55] +XDIS 2ce68: MISC BASE D57F8D6C6C56 lea r29, ptr [r28+r29*2+0x56] +XDIS 2ce6e: MISC BASE D57F8D6C6D57 lea r29, ptr [r29+r29*2+0x57] +XDIS 2ce74: MISC BASE D57F8D6C6E58 lea r29, ptr [r30+r29*2+0x58] +XDIS 2ce7a: MISC BASE D57F8D6C6F59 lea r29, ptr [r31+r29*2+0x59] +XDIS 2ce80: MISC BASE D56E8D6C703B lea r29, ptr [rax+r30*2+0x3b] +XDIS 2ce86: MISC BASE D56E8D6C713C lea r29, ptr [rcx+r30*2+0x3c] +XDIS 2ce8c: MISC BASE D56E8D6C723D lea r29, ptr [rdx+r30*2+0x3d] +XDIS 2ce92: MISC BASE D56E8D6C733E lea r29, ptr [rbx+r30*2+0x3e] +XDIS 2ce98: MISC BASE D56E8D6C743F lea r29, ptr [rsp+r30*2+0x3f] +XDIS 2ce9e: MISC BASE D56E8D6C7540 lea r29, ptr [rbp+r30*2+0x40] +XDIS 2cea4: MISC BASE D56E8D6C7641 lea r29, ptr [rsi+r30*2+0x41] +XDIS 2ceaa: MISC BASE D56E8D6C7742 lea r29, ptr [rdi+r30*2+0x42] +XDIS 2ceb0: MISC BASE D56F8D6C7043 lea r29, ptr [r8+r30*2+0x43] +XDIS 2ceb6: MISC BASE D56F8D6C7144 lea r29, ptr [r9+r30*2+0x44] +XDIS 2cebc: MISC BASE D56F8D6C7245 lea r29, ptr [r10+r30*2+0x45] +XDIS 2cec2: MISC BASE D56F8D6C7346 lea r29, ptr [r11+r30*2+0x46] +XDIS 2cec8: MISC BASE D56F8D6C7447 lea r29, ptr [r12+r30*2+0x47] +XDIS 2cece: MISC BASE D56F8D6C7548 lea r29, ptr [r13+r30*2+0x48] +XDIS 2ced4: MISC BASE D56F8D6C7649 lea r29, ptr [r14+r30*2+0x49] +XDIS 2ceda: MISC BASE D56F8D6C774A lea r29, ptr [r15+r30*2+0x4a] +XDIS 2cee0: MISC BASE D57E8D6C704B lea r29, ptr [r16+r30*2+0x4b] +XDIS 2cee6: MISC BASE D57E8D6C714C lea r29, ptr [r17+r30*2+0x4c] +XDIS 2ceec: MISC BASE D57E8D6C724D lea r29, ptr [r18+r30*2+0x4d] +XDIS 2cef2: MISC BASE D57E8D6C734E lea r29, ptr [r19+r30*2+0x4e] +XDIS 2cef8: MISC BASE D57E8D6C744F lea r29, ptr [r20+r30*2+0x4f] +XDIS 2cefe: MISC BASE D57E8D6C7550 lea r29, ptr [r21+r30*2+0x50] +XDIS 2cf04: MISC BASE D57E8D6C7651 lea r29, ptr [r22+r30*2+0x51] +XDIS 2cf0a: MISC BASE D57E8D6C7752 lea r29, ptr [r23+r30*2+0x52] +XDIS 2cf10: MISC BASE D57F8D6C7053 lea r29, ptr [r24+r30*2+0x53] +XDIS 2cf16: MISC BASE D57F8D6C7154 lea r29, ptr [r25+r30*2+0x54] +XDIS 2cf1c: MISC BASE D57F8D6C7255 lea r29, ptr [r26+r30*2+0x55] +XDIS 2cf22: MISC BASE D57F8D6C7356 lea r29, ptr [r27+r30*2+0x56] +XDIS 2cf28: MISC BASE D57F8D6C7457 lea r29, ptr [r28+r30*2+0x57] +XDIS 2cf2e: MISC BASE D57F8D6C7558 lea r29, ptr [r29+r30*2+0x58] +XDIS 2cf34: MISC BASE D57F8D6C7659 lea r29, ptr [r30+r30*2+0x59] +XDIS 2cf3a: MISC BASE D57F8D6C775A lea r29, ptr [r31+r30*2+0x5a] +XDIS 2cf40: MISC BASE D56E8D6C783C lea r29, ptr [rax+r31*2+0x3c] +XDIS 2cf46: MISC BASE D56E8D6C793D lea r29, ptr [rcx+r31*2+0x3d] +XDIS 2cf4c: MISC BASE D56E8D6C7A3E lea r29, ptr [rdx+r31*2+0x3e] +XDIS 2cf52: MISC BASE D56E8D6C7B3F lea r29, ptr [rbx+r31*2+0x3f] +XDIS 2cf58: MISC BASE D56E8D6C7C40 lea r29, ptr [rsp+r31*2+0x40] +XDIS 2cf5e: MISC BASE D56E8D6C7D41 lea r29, ptr [rbp+r31*2+0x41] +XDIS 2cf64: MISC BASE D56E8D6C7E42 lea r29, ptr [rsi+r31*2+0x42] +XDIS 2cf6a: MISC BASE D56E8D6C7F43 lea r29, ptr [rdi+r31*2+0x43] +XDIS 2cf70: MISC BASE D56F8D6C7844 lea r29, ptr [r8+r31*2+0x44] +XDIS 2cf76: MISC BASE D56F8D6C7945 lea r29, ptr [r9+r31*2+0x45] +XDIS 2cf7c: MISC BASE D56F8D6C7A46 lea r29, ptr [r10+r31*2+0x46] +XDIS 2cf82: MISC BASE D56F8D6C7B47 lea r29, ptr [r11+r31*2+0x47] +XDIS 2cf88: MISC BASE D56F8D6C7C48 lea r29, ptr [r12+r31*2+0x48] +XDIS 2cf8e: MISC BASE D56F8D6C7D49 lea r29, ptr [r13+r31*2+0x49] +XDIS 2cf94: MISC BASE D56F8D6C7E4A lea r29, ptr [r14+r31*2+0x4a] +XDIS 2cf9a: MISC BASE D56F8D6C7F4B lea r29, ptr [r15+r31*2+0x4b] +XDIS 2cfa0: MISC BASE D57E8D6C784C lea r29, ptr [r16+r31*2+0x4c] +XDIS 2cfa6: MISC BASE D57E8D6C794D lea r29, ptr [r17+r31*2+0x4d] +XDIS 2cfac: MISC BASE D57E8D6C7A4E lea r29, ptr [r18+r31*2+0x4e] +XDIS 2cfb2: MISC BASE D57E8D6C7B4F lea r29, ptr [r19+r31*2+0x4f] +XDIS 2cfb8: MISC BASE D57E8D6C7C50 lea r29, ptr [r20+r31*2+0x50] +XDIS 2cfbe: MISC BASE D57E8D6C7D51 lea r29, ptr [r21+r31*2+0x51] +XDIS 2cfc4: MISC BASE D57E8D6C7E52 lea r29, ptr [r22+r31*2+0x52] +XDIS 2cfca: MISC BASE D57E8D6C7F53 lea r29, ptr [r23+r31*2+0x53] +XDIS 2cfd0: MISC BASE D57F8D6C7854 lea r29, ptr [r24+r31*2+0x54] +XDIS 2cfd6: MISC BASE D57F8D6C7955 lea r29, ptr [r25+r31*2+0x55] +XDIS 2cfdc: MISC BASE D57F8D6C7A56 lea r29, ptr [r26+r31*2+0x56] +XDIS 2cfe2: MISC BASE D57F8D6C7B57 lea r29, ptr [r27+r31*2+0x57] +XDIS 2cfe8: MISC BASE D57F8D6C7C58 lea r29, ptr [r28+r31*2+0x58] +XDIS 2cfee: MISC BASE D57F8D6C7D59 lea r29, ptr [r29+r31*2+0x59] +XDIS 2cff4: MISC BASE D57F8D6C7E5A lea r29, ptr [r30+r31*2+0x5a] +XDIS 2cffa: MISC BASE D57F8D6C7F5B lea r29, ptr [r31+r31*2+0x5b] +XDIS 2d000: MISC BASE D54C8D74401E lea r30, ptr [rax+rax*2+0x1e] +XDIS 2d006: MISC BASE D54C8D74411F lea r30, ptr [rcx+rax*2+0x1f] +XDIS 2d00c: MISC BASE D54C8D744220 lea r30, ptr [rdx+rax*2+0x20] +XDIS 2d012: MISC BASE D54C8D744321 lea r30, ptr [rbx+rax*2+0x21] +XDIS 2d018: MISC BASE D54C8D744422 lea r30, ptr [rsp+rax*2+0x22] +XDIS 2d01e: MISC BASE D54C8D744523 lea r30, ptr [rbp+rax*2+0x23] +XDIS 2d024: MISC BASE D54C8D744624 lea r30, ptr [rsi+rax*2+0x24] +XDIS 2d02a: MISC BASE D54C8D744725 lea r30, ptr [rdi+rax*2+0x25] +XDIS 2d030: MISC BASE D54D8D744026 lea r30, ptr [r8+rax*2+0x26] +XDIS 2d036: MISC BASE D54D8D744127 lea r30, ptr [r9+rax*2+0x27] +XDIS 2d03c: MISC BASE D54D8D744228 lea r30, ptr [r10+rax*2+0x28] +XDIS 2d042: MISC BASE D54D8D744329 lea r30, ptr [r11+rax*2+0x29] +XDIS 2d048: MISC BASE D54D8D74442A lea r30, ptr [r12+rax*2+0x2a] +XDIS 2d04e: MISC BASE D54D8D74452B lea r30, ptr [r13+rax*2+0x2b] +XDIS 2d054: MISC BASE D54D8D74462C lea r30, ptr [r14+rax*2+0x2c] +XDIS 2d05a: MISC BASE D54D8D74472D lea r30, ptr [r15+rax*2+0x2d] +XDIS 2d060: MISC BASE D55C8D74402E lea r30, ptr [r16+rax*2+0x2e] +XDIS 2d066: MISC BASE D55C8D74412F lea r30, ptr [r17+rax*2+0x2f] +XDIS 2d06c: MISC BASE D55C8D744230 lea r30, ptr [r18+rax*2+0x30] +XDIS 2d072: MISC BASE D55C8D744331 lea r30, ptr [r19+rax*2+0x31] +XDIS 2d078: MISC BASE D55C8D744432 lea r30, ptr [r20+rax*2+0x32] +XDIS 2d07e: MISC BASE D55C8D744533 lea r30, ptr [r21+rax*2+0x33] +XDIS 2d084: MISC BASE D55C8D744634 lea r30, ptr [r22+rax*2+0x34] +XDIS 2d08a: MISC BASE D55C8D744735 lea r30, ptr [r23+rax*2+0x35] +XDIS 2d090: MISC BASE D55D8D744036 lea r30, ptr [r24+rax*2+0x36] +XDIS 2d096: MISC BASE D55D8D744137 lea r30, ptr [r25+rax*2+0x37] +XDIS 2d09c: MISC BASE D55D8D744238 lea r30, ptr [r26+rax*2+0x38] +XDIS 2d0a2: MISC BASE D55D8D744339 lea r30, ptr [r27+rax*2+0x39] +XDIS 2d0a8: MISC BASE D55D8D74443A lea r30, ptr [r28+rax*2+0x3a] +XDIS 2d0ae: MISC BASE D55D8D74453B lea r30, ptr [r29+rax*2+0x3b] +XDIS 2d0b4: MISC BASE D55D8D74463C lea r30, ptr [r30+rax*2+0x3c] +XDIS 2d0ba: MISC BASE D55D8D74473D lea r30, ptr [r31+rax*2+0x3d] +XDIS 2d0c0: MISC BASE D54C8D74481F lea r30, ptr [rax+rcx*2+0x1f] +XDIS 2d0c6: MISC BASE D54C8D744920 lea r30, ptr [rcx+rcx*2+0x20] +XDIS 2d0cc: MISC BASE D54C8D744A21 lea r30, ptr [rdx+rcx*2+0x21] +XDIS 2d0d2: MISC BASE D54C8D744B22 lea r30, ptr [rbx+rcx*2+0x22] +XDIS 2d0d8: MISC BASE D54C8D744C23 lea r30, ptr [rsp+rcx*2+0x23] +XDIS 2d0de: MISC BASE D54C8D744D24 lea r30, ptr [rbp+rcx*2+0x24] +XDIS 2d0e4: MISC BASE D54C8D744E25 lea r30, ptr [rsi+rcx*2+0x25] +XDIS 2d0ea: MISC BASE D54C8D744F26 lea r30, ptr [rdi+rcx*2+0x26] +XDIS 2d0f0: MISC BASE D54D8D744827 lea r30, ptr [r8+rcx*2+0x27] +XDIS 2d0f6: MISC BASE D54D8D744928 lea r30, ptr [r9+rcx*2+0x28] +XDIS 2d0fc: MISC BASE D54D8D744A29 lea r30, ptr [r10+rcx*2+0x29] +XDIS 2d102: MISC BASE D54D8D744B2A lea r30, ptr [r11+rcx*2+0x2a] +XDIS 2d108: MISC BASE D54D8D744C2B lea r30, ptr [r12+rcx*2+0x2b] +XDIS 2d10e: MISC BASE D54D8D744D2C lea r30, ptr [r13+rcx*2+0x2c] +XDIS 2d114: MISC BASE D54D8D744E2D lea r30, ptr [r14+rcx*2+0x2d] +XDIS 2d11a: MISC BASE D54D8D744F2E lea r30, ptr [r15+rcx*2+0x2e] +XDIS 2d120: MISC BASE D55C8D74482F lea r30, ptr [r16+rcx*2+0x2f] +XDIS 2d126: MISC BASE D55C8D744930 lea r30, ptr [r17+rcx*2+0x30] +XDIS 2d12c: MISC BASE D55C8D744A31 lea r30, ptr [r18+rcx*2+0x31] +XDIS 2d132: MISC BASE D55C8D744B32 lea r30, ptr [r19+rcx*2+0x32] +XDIS 2d138: MISC BASE D55C8D744C33 lea r30, ptr [r20+rcx*2+0x33] +XDIS 2d13e: MISC BASE D55C8D744D34 lea r30, ptr [r21+rcx*2+0x34] +XDIS 2d144: MISC BASE D55C8D744E35 lea r30, ptr [r22+rcx*2+0x35] +XDIS 2d14a: MISC BASE D55C8D744F36 lea r30, ptr [r23+rcx*2+0x36] +XDIS 2d150: MISC BASE D55D8D744837 lea r30, ptr [r24+rcx*2+0x37] +XDIS 2d156: MISC BASE D55D8D744938 lea r30, ptr [r25+rcx*2+0x38] +XDIS 2d15c: MISC BASE D55D8D744A39 lea r30, ptr [r26+rcx*2+0x39] +XDIS 2d162: MISC BASE D55D8D744B3A lea r30, ptr [r27+rcx*2+0x3a] +XDIS 2d168: MISC BASE D55D8D744C3B lea r30, ptr [r28+rcx*2+0x3b] +XDIS 2d16e: MISC BASE D55D8D744D3C lea r30, ptr [r29+rcx*2+0x3c] +XDIS 2d174: MISC BASE D55D8D744E3D lea r30, ptr [r30+rcx*2+0x3d] +XDIS 2d17a: MISC BASE D55D8D744F3E lea r30, ptr [r31+rcx*2+0x3e] +XDIS 2d180: MISC BASE D54C8D745020 lea r30, ptr [rax+rdx*2+0x20] +XDIS 2d186: MISC BASE D54C8D745121 lea r30, ptr [rcx+rdx*2+0x21] +XDIS 2d18c: MISC BASE D54C8D745222 lea r30, ptr [rdx+rdx*2+0x22] +XDIS 2d192: MISC BASE D54C8D745323 lea r30, ptr [rbx+rdx*2+0x23] +XDIS 2d198: MISC BASE D54C8D745424 lea r30, ptr [rsp+rdx*2+0x24] +XDIS 2d19e: MISC BASE D54C8D745525 lea r30, ptr [rbp+rdx*2+0x25] +XDIS 2d1a4: MISC BASE D54C8D745626 lea r30, ptr [rsi+rdx*2+0x26] +XDIS 2d1aa: MISC BASE D54C8D745727 lea r30, ptr [rdi+rdx*2+0x27] +XDIS 2d1b0: MISC BASE D54D8D745028 lea r30, ptr [r8+rdx*2+0x28] +XDIS 2d1b6: MISC BASE D54D8D745129 lea r30, ptr [r9+rdx*2+0x29] +XDIS 2d1bc: MISC BASE D54D8D74522A lea r30, ptr [r10+rdx*2+0x2a] +XDIS 2d1c2: MISC BASE D54D8D74532B lea r30, ptr [r11+rdx*2+0x2b] +XDIS 2d1c8: MISC BASE D54D8D74542C lea r30, ptr [r12+rdx*2+0x2c] +XDIS 2d1ce: MISC BASE D54D8D74552D lea r30, ptr [r13+rdx*2+0x2d] +XDIS 2d1d4: MISC BASE D54D8D74562E lea r30, ptr [r14+rdx*2+0x2e] +XDIS 2d1da: MISC BASE D54D8D74572F lea r30, ptr [r15+rdx*2+0x2f] +XDIS 2d1e0: MISC BASE D55C8D745030 lea r30, ptr [r16+rdx*2+0x30] +XDIS 2d1e6: MISC BASE D55C8D745131 lea r30, ptr [r17+rdx*2+0x31] +XDIS 2d1ec: MISC BASE D55C8D745232 lea r30, ptr [r18+rdx*2+0x32] +XDIS 2d1f2: MISC BASE D55C8D745333 lea r30, ptr [r19+rdx*2+0x33] +XDIS 2d1f8: MISC BASE D55C8D745434 lea r30, ptr [r20+rdx*2+0x34] +XDIS 2d1fe: MISC BASE D55C8D745535 lea r30, ptr [r21+rdx*2+0x35] +XDIS 2d204: MISC BASE D55C8D745636 lea r30, ptr [r22+rdx*2+0x36] +XDIS 2d20a: MISC BASE D55C8D745737 lea r30, ptr [r23+rdx*2+0x37] +XDIS 2d210: MISC BASE D55D8D745038 lea r30, ptr [r24+rdx*2+0x38] +XDIS 2d216: MISC BASE D55D8D745139 lea r30, ptr [r25+rdx*2+0x39] +XDIS 2d21c: MISC BASE D55D8D74523A lea r30, ptr [r26+rdx*2+0x3a] +XDIS 2d222: MISC BASE D55D8D74533B lea r30, ptr [r27+rdx*2+0x3b] +XDIS 2d228: MISC BASE D55D8D74543C lea r30, ptr [r28+rdx*2+0x3c] +XDIS 2d22e: MISC BASE D55D8D74553D lea r30, ptr [r29+rdx*2+0x3d] +XDIS 2d234: MISC BASE D55D8D74563E lea r30, ptr [r30+rdx*2+0x3e] +XDIS 2d23a: MISC BASE D55D8D74573F lea r30, ptr [r31+rdx*2+0x3f] +XDIS 2d240: MISC BASE D54C8D745821 lea r30, ptr [rax+rbx*2+0x21] +XDIS 2d246: MISC BASE D54C8D745922 lea r30, ptr [rcx+rbx*2+0x22] +XDIS 2d24c: MISC BASE D54C8D745A23 lea r30, ptr [rdx+rbx*2+0x23] +XDIS 2d252: MISC BASE D54C8D745B24 lea r30, ptr [rbx+rbx*2+0x24] +XDIS 2d258: MISC BASE D54C8D745C25 lea r30, ptr [rsp+rbx*2+0x25] +XDIS 2d25e: MISC BASE D54C8D745D26 lea r30, ptr [rbp+rbx*2+0x26] +XDIS 2d264: MISC BASE D54C8D745E27 lea r30, ptr [rsi+rbx*2+0x27] +XDIS 2d26a: MISC BASE D54C8D745F28 lea r30, ptr [rdi+rbx*2+0x28] +XDIS 2d270: MISC BASE D54D8D745829 lea r30, ptr [r8+rbx*2+0x29] +XDIS 2d276: MISC BASE D54D8D74592A lea r30, ptr [r9+rbx*2+0x2a] +XDIS 2d27c: MISC BASE D54D8D745A2B lea r30, ptr [r10+rbx*2+0x2b] +XDIS 2d282: MISC BASE D54D8D745B2C lea r30, ptr [r11+rbx*2+0x2c] +XDIS 2d288: MISC BASE D54D8D745C2D lea r30, ptr [r12+rbx*2+0x2d] +XDIS 2d28e: MISC BASE D54D8D745D2E lea r30, ptr [r13+rbx*2+0x2e] +XDIS 2d294: MISC BASE D54D8D745E2F lea r30, ptr [r14+rbx*2+0x2f] +XDIS 2d29a: MISC BASE D54D8D745F30 lea r30, ptr [r15+rbx*2+0x30] +XDIS 2d2a0: MISC BASE D55C8D745831 lea r30, ptr [r16+rbx*2+0x31] +XDIS 2d2a6: MISC BASE D55C8D745932 lea r30, ptr [r17+rbx*2+0x32] +XDIS 2d2ac: MISC BASE D55C8D745A33 lea r30, ptr [r18+rbx*2+0x33] +XDIS 2d2b2: MISC BASE D55C8D745B34 lea r30, ptr [r19+rbx*2+0x34] +XDIS 2d2b8: MISC BASE D55C8D745C35 lea r30, ptr [r20+rbx*2+0x35] +XDIS 2d2be: MISC BASE D55C8D745D36 lea r30, ptr [r21+rbx*2+0x36] +XDIS 2d2c4: MISC BASE D55C8D745E37 lea r30, ptr [r22+rbx*2+0x37] +XDIS 2d2ca: MISC BASE D55C8D745F38 lea r30, ptr [r23+rbx*2+0x38] +XDIS 2d2d0: MISC BASE D55D8D745839 lea r30, ptr [r24+rbx*2+0x39] +XDIS 2d2d6: MISC BASE D55D8D74593A lea r30, ptr [r25+rbx*2+0x3a] +XDIS 2d2dc: MISC BASE D55D8D745A3B lea r30, ptr [r26+rbx*2+0x3b] +XDIS 2d2e2: MISC BASE D55D8D745B3C lea r30, ptr [r27+rbx*2+0x3c] +XDIS 2d2e8: MISC BASE D55D8D745C3D lea r30, ptr [r28+rbx*2+0x3d] +XDIS 2d2ee: MISC BASE D55D8D745D3E lea r30, ptr [r29+rbx*2+0x3e] +XDIS 2d2f4: MISC BASE D55D8D745E3F lea r30, ptr [r30+rbx*2+0x3f] +XDIS 2d2fa: MISC BASE D55D8D745F40 lea r30, ptr [r31+rbx*2+0x40] +XDIS 2d300: MISC BASE D54C8D746022 lea r30, ptr [rax+0x22] +XDIS 2d306: MISC BASE D54C8D746123 lea r30, ptr [rcx+0x23] +XDIS 2d30c: MISC BASE D54C8D746224 lea r30, ptr [rdx+0x24] +XDIS 2d312: MISC BASE D54C8D746325 lea r30, ptr [rbx+0x25] +XDIS 2d318: MISC BASE D54C8D746426 lea r30, ptr [rsp+0x26] +XDIS 2d31e: MISC BASE D54C8D746527 lea r30, ptr [rbp+0x27] +XDIS 2d324: MISC BASE D54C8D746628 lea r30, ptr [rsi+0x28] +XDIS 2d32a: MISC BASE D54C8D746729 lea r30, ptr [rdi+0x29] +XDIS 2d330: MISC BASE D54D8D74602A lea r30, ptr [r8+0x2a] +XDIS 2d336: MISC BASE D54D8D74612B lea r30, ptr [r9+0x2b] +XDIS 2d33c: MISC BASE D54D8D74622C lea r30, ptr [r10+0x2c] +XDIS 2d342: MISC BASE D54D8D74632D lea r30, ptr [r11+0x2d] +XDIS 2d348: MISC BASE D54D8D74642E lea r30, ptr [r12+0x2e] +XDIS 2d34e: MISC BASE D54D8D74652F lea r30, ptr [r13+0x2f] +XDIS 2d354: MISC BASE D54D8D746630 lea r30, ptr [r14+0x30] +XDIS 2d35a: MISC BASE D54D8D746731 lea r30, ptr [r15+0x31] +XDIS 2d360: MISC BASE D55C8D746032 lea r30, ptr [r16+0x32] +XDIS 2d366: MISC BASE D55C8D746133 lea r30, ptr [r17+0x33] +XDIS 2d36c: MISC BASE D55C8D746234 lea r30, ptr [r18+0x34] +XDIS 2d372: MISC BASE D55C8D746335 lea r30, ptr [r19+0x35] +XDIS 2d378: MISC BASE D55C8D746436 lea r30, ptr [r20+0x36] +XDIS 2d37e: MISC BASE D55C8D746537 lea r30, ptr [r21+0x37] +XDIS 2d384: MISC BASE D55C8D746638 lea r30, ptr [r22+0x38] +XDIS 2d38a: MISC BASE D55C8D746739 lea r30, ptr [r23+0x39] +XDIS 2d390: MISC BASE D55D8D74603A lea r30, ptr [r24+0x3a] +XDIS 2d396: MISC BASE D55D8D74613B lea r30, ptr [r25+0x3b] +XDIS 2d39c: MISC BASE D55D8D74623C lea r30, ptr [r26+0x3c] +XDIS 2d3a2: MISC BASE D55D8D74633D lea r30, ptr [r27+0x3d] +XDIS 2d3a8: MISC BASE D55D8D74643E lea r30, ptr [r28+0x3e] +XDIS 2d3ae: MISC BASE D55D8D74653F lea r30, ptr [r29+0x3f] +XDIS 2d3b4: MISC BASE D55D8D746640 lea r30, ptr [r30+0x40] +XDIS 2d3ba: MISC BASE D55D8D746741 lea r30, ptr [r31+0x41] +XDIS 2d3c0: MISC BASE D54C8D746823 lea r30, ptr [rax+rbp*2+0x23] +XDIS 2d3c6: MISC BASE D54C8D746924 lea r30, ptr [rcx+rbp*2+0x24] +XDIS 2d3cc: MISC BASE D54C8D746A25 lea r30, ptr [rdx+rbp*2+0x25] +XDIS 2d3d2: MISC BASE D54C8D746B26 lea r30, ptr [rbx+rbp*2+0x26] +XDIS 2d3d8: MISC BASE D54C8D746C27 lea r30, ptr [rsp+rbp*2+0x27] +XDIS 2d3de: MISC BASE D54C8D746D28 lea r30, ptr [rbp+rbp*2+0x28] +XDIS 2d3e4: MISC BASE D54C8D746E29 lea r30, ptr [rsi+rbp*2+0x29] +XDIS 2d3ea: MISC BASE D54C8D746F2A lea r30, ptr [rdi+rbp*2+0x2a] +XDIS 2d3f0: MISC BASE D54D8D74682B lea r30, ptr [r8+rbp*2+0x2b] +XDIS 2d3f6: MISC BASE D54D8D74692C lea r30, ptr [r9+rbp*2+0x2c] +XDIS 2d3fc: MISC BASE D54D8D746A2D lea r30, ptr [r10+rbp*2+0x2d] +XDIS 2d402: MISC BASE D54D8D746B2E lea r30, ptr [r11+rbp*2+0x2e] +XDIS 2d408: MISC BASE D54D8D746C2F lea r30, ptr [r12+rbp*2+0x2f] +XDIS 2d40e: MISC BASE D54D8D746D30 lea r30, ptr [r13+rbp*2+0x30] +XDIS 2d414: MISC BASE D54D8D746E31 lea r30, ptr [r14+rbp*2+0x31] +XDIS 2d41a: MISC BASE D54D8D746F32 lea r30, ptr [r15+rbp*2+0x32] +XDIS 2d420: MISC BASE D55C8D746833 lea r30, ptr [r16+rbp*2+0x33] +XDIS 2d426: MISC BASE D55C8D746934 lea r30, ptr [r17+rbp*2+0x34] +XDIS 2d42c: MISC BASE D55C8D746A35 lea r30, ptr [r18+rbp*2+0x35] +XDIS 2d432: MISC BASE D55C8D746B36 lea r30, ptr [r19+rbp*2+0x36] +XDIS 2d438: MISC BASE D55C8D746C37 lea r30, ptr [r20+rbp*2+0x37] +XDIS 2d43e: MISC BASE D55C8D746D38 lea r30, ptr [r21+rbp*2+0x38] +XDIS 2d444: MISC BASE D55C8D746E39 lea r30, ptr [r22+rbp*2+0x39] +XDIS 2d44a: MISC BASE D55C8D746F3A lea r30, ptr [r23+rbp*2+0x3a] +XDIS 2d450: MISC BASE D55D8D74683B lea r30, ptr [r24+rbp*2+0x3b] +XDIS 2d456: MISC BASE D55D8D74693C lea r30, ptr [r25+rbp*2+0x3c] +XDIS 2d45c: MISC BASE D55D8D746A3D lea r30, ptr [r26+rbp*2+0x3d] +XDIS 2d462: MISC BASE D55D8D746B3E lea r30, ptr [r27+rbp*2+0x3e] +XDIS 2d468: MISC BASE D55D8D746C3F lea r30, ptr [r28+rbp*2+0x3f] +XDIS 2d46e: MISC BASE D55D8D746D40 lea r30, ptr [r29+rbp*2+0x40] +XDIS 2d474: MISC BASE D55D8D746E41 lea r30, ptr [r30+rbp*2+0x41] +XDIS 2d47a: MISC BASE D55D8D746F42 lea r30, ptr [r31+rbp*2+0x42] +XDIS 2d480: MISC BASE D54C8D747024 lea r30, ptr [rax+rsi*2+0x24] +XDIS 2d486: MISC BASE D54C8D747125 lea r30, ptr [rcx+rsi*2+0x25] +XDIS 2d48c: MISC BASE D54C8D747226 lea r30, ptr [rdx+rsi*2+0x26] +XDIS 2d492: MISC BASE D54C8D747327 lea r30, ptr [rbx+rsi*2+0x27] +XDIS 2d498: MISC BASE D54C8D747428 lea r30, ptr [rsp+rsi*2+0x28] +XDIS 2d49e: MISC BASE D54C8D747529 lea r30, ptr [rbp+rsi*2+0x29] +XDIS 2d4a4: MISC BASE D54C8D74762A lea r30, ptr [rsi+rsi*2+0x2a] +XDIS 2d4aa: MISC BASE D54C8D74772B lea r30, ptr [rdi+rsi*2+0x2b] +XDIS 2d4b0: MISC BASE D54D8D74702C lea r30, ptr [r8+rsi*2+0x2c] +XDIS 2d4b6: MISC BASE D54D8D74712D lea r30, ptr [r9+rsi*2+0x2d] +XDIS 2d4bc: MISC BASE D54D8D74722E lea r30, ptr [r10+rsi*2+0x2e] +XDIS 2d4c2: MISC BASE D54D8D74732F lea r30, ptr [r11+rsi*2+0x2f] +XDIS 2d4c8: MISC BASE D54D8D747430 lea r30, ptr [r12+rsi*2+0x30] +XDIS 2d4ce: MISC BASE D54D8D747531 lea r30, ptr [r13+rsi*2+0x31] +XDIS 2d4d4: MISC BASE D54D8D747632 lea r30, ptr [r14+rsi*2+0x32] +XDIS 2d4da: MISC BASE D54D8D747733 lea r30, ptr [r15+rsi*2+0x33] +XDIS 2d4e0: MISC BASE D55C8D747034 lea r30, ptr [r16+rsi*2+0x34] +XDIS 2d4e6: MISC BASE D55C8D747135 lea r30, ptr [r17+rsi*2+0x35] +XDIS 2d4ec: MISC BASE D55C8D747236 lea r30, ptr [r18+rsi*2+0x36] +XDIS 2d4f2: MISC BASE D55C8D747337 lea r30, ptr [r19+rsi*2+0x37] +XDIS 2d4f8: MISC BASE D55C8D747438 lea r30, ptr [r20+rsi*2+0x38] +XDIS 2d4fe: MISC BASE D55C8D747539 lea r30, ptr [r21+rsi*2+0x39] +XDIS 2d504: MISC BASE D55C8D74763A lea r30, ptr [r22+rsi*2+0x3a] +XDIS 2d50a: MISC BASE D55C8D74773B lea r30, ptr [r23+rsi*2+0x3b] +XDIS 2d510: MISC BASE D55D8D74703C lea r30, ptr [r24+rsi*2+0x3c] +XDIS 2d516: MISC BASE D55D8D74713D lea r30, ptr [r25+rsi*2+0x3d] +XDIS 2d51c: MISC BASE D55D8D74723E lea r30, ptr [r26+rsi*2+0x3e] +XDIS 2d522: MISC BASE D55D8D74733F lea r30, ptr [r27+rsi*2+0x3f] +XDIS 2d528: MISC BASE D55D8D747440 lea r30, ptr [r28+rsi*2+0x40] +XDIS 2d52e: MISC BASE D55D8D747541 lea r30, ptr [r29+rsi*2+0x41] +XDIS 2d534: MISC BASE D55D8D747642 lea r30, ptr [r30+rsi*2+0x42] +XDIS 2d53a: MISC BASE D55D8D747743 lea r30, ptr [r31+rsi*2+0x43] +XDIS 2d540: MISC BASE D54C8D747825 lea r30, ptr [rax+rdi*2+0x25] +XDIS 2d546: MISC BASE D54C8D747926 lea r30, ptr [rcx+rdi*2+0x26] +XDIS 2d54c: MISC BASE D54C8D747A27 lea r30, ptr [rdx+rdi*2+0x27] +XDIS 2d552: MISC BASE D54C8D747B28 lea r30, ptr [rbx+rdi*2+0x28] +XDIS 2d558: MISC BASE D54C8D747C29 lea r30, ptr [rsp+rdi*2+0x29] +XDIS 2d55e: MISC BASE D54C8D747D2A lea r30, ptr [rbp+rdi*2+0x2a] +XDIS 2d564: MISC BASE D54C8D747E2B lea r30, ptr [rsi+rdi*2+0x2b] +XDIS 2d56a: MISC BASE D54C8D747F2C lea r30, ptr [rdi+rdi*2+0x2c] +XDIS 2d570: MISC BASE D54D8D74782D lea r30, ptr [r8+rdi*2+0x2d] +XDIS 2d576: MISC BASE D54D8D74792E lea r30, ptr [r9+rdi*2+0x2e] +XDIS 2d57c: MISC BASE D54D8D747A2F lea r30, ptr [r10+rdi*2+0x2f] +XDIS 2d582: MISC BASE D54D8D747B30 lea r30, ptr [r11+rdi*2+0x30] +XDIS 2d588: MISC BASE D54D8D747C31 lea r30, ptr [r12+rdi*2+0x31] +XDIS 2d58e: MISC BASE D54D8D747D32 lea r30, ptr [r13+rdi*2+0x32] +XDIS 2d594: MISC BASE D54D8D747E33 lea r30, ptr [r14+rdi*2+0x33] +XDIS 2d59a: MISC BASE D54D8D747F34 lea r30, ptr [r15+rdi*2+0x34] +XDIS 2d5a0: MISC BASE D55C8D747835 lea r30, ptr [r16+rdi*2+0x35] +XDIS 2d5a6: MISC BASE D55C8D747936 lea r30, ptr [r17+rdi*2+0x36] +XDIS 2d5ac: MISC BASE D55C8D747A37 lea r30, ptr [r18+rdi*2+0x37] +XDIS 2d5b2: MISC BASE D55C8D747B38 lea r30, ptr [r19+rdi*2+0x38] +XDIS 2d5b8: MISC BASE D55C8D747C39 lea r30, ptr [r20+rdi*2+0x39] +XDIS 2d5be: MISC BASE D55C8D747D3A lea r30, ptr [r21+rdi*2+0x3a] +XDIS 2d5c4: MISC BASE D55C8D747E3B lea r30, ptr [r22+rdi*2+0x3b] +XDIS 2d5ca: MISC BASE D55C8D747F3C lea r30, ptr [r23+rdi*2+0x3c] +XDIS 2d5d0: MISC BASE D55D8D74783D lea r30, ptr [r24+rdi*2+0x3d] +XDIS 2d5d6: MISC BASE D55D8D74793E lea r30, ptr [r25+rdi*2+0x3e] +XDIS 2d5dc: MISC BASE D55D8D747A3F lea r30, ptr [r26+rdi*2+0x3f] +XDIS 2d5e2: MISC BASE D55D8D747B40 lea r30, ptr [r27+rdi*2+0x40] +XDIS 2d5e8: MISC BASE D55D8D747C41 lea r30, ptr [r28+rdi*2+0x41] +XDIS 2d5ee: MISC BASE D55D8D747D42 lea r30, ptr [r29+rdi*2+0x42] +XDIS 2d5f4: MISC BASE D55D8D747E43 lea r30, ptr [r30+rdi*2+0x43] +XDIS 2d5fa: MISC BASE D55D8D747F44 lea r30, ptr [r31+rdi*2+0x44] +XDIS 2d600: MISC BASE D54E8D744026 lea r30, ptr [rax+r8*2+0x26] +XDIS 2d606: MISC BASE D54E8D744127 lea r30, ptr [rcx+r8*2+0x27] +XDIS 2d60c: MISC BASE D54E8D744228 lea r30, ptr [rdx+r8*2+0x28] +XDIS 2d612: MISC BASE D54E8D744329 lea r30, ptr [rbx+r8*2+0x29] +XDIS 2d618: MISC BASE D54E8D74442A lea r30, ptr [rsp+r8*2+0x2a] +XDIS 2d61e: MISC BASE D54E8D74452B lea r30, ptr [rbp+r8*2+0x2b] +XDIS 2d624: MISC BASE D54E8D74462C lea r30, ptr [rsi+r8*2+0x2c] +XDIS 2d62a: MISC BASE D54E8D74472D lea r30, ptr [rdi+r8*2+0x2d] +XDIS 2d630: MISC BASE D54F8D74402E lea r30, ptr [r8+r8*2+0x2e] +XDIS 2d636: MISC BASE D54F8D74412F lea r30, ptr [r9+r8*2+0x2f] +XDIS 2d63c: MISC BASE D54F8D744230 lea r30, ptr [r10+r8*2+0x30] +XDIS 2d642: MISC BASE D54F8D744331 lea r30, ptr [r11+r8*2+0x31] +XDIS 2d648: MISC BASE D54F8D744432 lea r30, ptr [r12+r8*2+0x32] +XDIS 2d64e: MISC BASE D54F8D744533 lea r30, ptr [r13+r8*2+0x33] +XDIS 2d654: MISC BASE D54F8D744634 lea r30, ptr [r14+r8*2+0x34] +XDIS 2d65a: MISC BASE D54F8D744735 lea r30, ptr [r15+r8*2+0x35] +XDIS 2d660: MISC BASE D55E8D744036 lea r30, ptr [r16+r8*2+0x36] +XDIS 2d666: MISC BASE D55E8D744137 lea r30, ptr [r17+r8*2+0x37] +XDIS 2d66c: MISC BASE D55E8D744238 lea r30, ptr [r18+r8*2+0x38] +XDIS 2d672: MISC BASE D55E8D744339 lea r30, ptr [r19+r8*2+0x39] +XDIS 2d678: MISC BASE D55E8D74443A lea r30, ptr [r20+r8*2+0x3a] +XDIS 2d67e: MISC BASE D55E8D74453B lea r30, ptr [r21+r8*2+0x3b] +XDIS 2d684: MISC BASE D55E8D74463C lea r30, ptr [r22+r8*2+0x3c] +XDIS 2d68a: MISC BASE D55E8D74473D lea r30, ptr [r23+r8*2+0x3d] +XDIS 2d690: MISC BASE D55F8D74403E lea r30, ptr [r24+r8*2+0x3e] +XDIS 2d696: MISC BASE D55F8D74413F lea r30, ptr [r25+r8*2+0x3f] +XDIS 2d69c: MISC BASE D55F8D744240 lea r30, ptr [r26+r8*2+0x40] +XDIS 2d6a2: MISC BASE D55F8D744341 lea r30, ptr [r27+r8*2+0x41] +XDIS 2d6a8: MISC BASE D55F8D744442 lea r30, ptr [r28+r8*2+0x42] +XDIS 2d6ae: MISC BASE D55F8D744543 lea r30, ptr [r29+r8*2+0x43] +XDIS 2d6b4: MISC BASE D55F8D744644 lea r30, ptr [r30+r8*2+0x44] +XDIS 2d6ba: MISC BASE D55F8D744745 lea r30, ptr [r31+r8*2+0x45] +XDIS 2d6c0: MISC BASE D54E8D744827 lea r30, ptr [rax+r9*2+0x27] +XDIS 2d6c6: MISC BASE D54E8D744928 lea r30, ptr [rcx+r9*2+0x28] +XDIS 2d6cc: MISC BASE D54E8D744A29 lea r30, ptr [rdx+r9*2+0x29] +XDIS 2d6d2: MISC BASE D54E8D744B2A lea r30, ptr [rbx+r9*2+0x2a] +XDIS 2d6d8: MISC BASE D54E8D744C2B lea r30, ptr [rsp+r9*2+0x2b] +XDIS 2d6de: MISC BASE D54E8D744D2C lea r30, ptr [rbp+r9*2+0x2c] +XDIS 2d6e4: MISC BASE D54E8D744E2D lea r30, ptr [rsi+r9*2+0x2d] +XDIS 2d6ea: MISC BASE D54E8D744F2E lea r30, ptr [rdi+r9*2+0x2e] +XDIS 2d6f0: MISC BASE D54F8D74482F lea r30, ptr [r8+r9*2+0x2f] +XDIS 2d6f6: MISC BASE D54F8D744930 lea r30, ptr [r9+r9*2+0x30] +XDIS 2d6fc: MISC BASE D54F8D744A31 lea r30, ptr [r10+r9*2+0x31] +XDIS 2d702: MISC BASE D54F8D744B32 lea r30, ptr [r11+r9*2+0x32] +XDIS 2d708: MISC BASE D54F8D744C33 lea r30, ptr [r12+r9*2+0x33] +XDIS 2d70e: MISC BASE D54F8D744D34 lea r30, ptr [r13+r9*2+0x34] +XDIS 2d714: MISC BASE D54F8D744E35 lea r30, ptr [r14+r9*2+0x35] +XDIS 2d71a: MISC BASE D54F8D744F36 lea r30, ptr [r15+r9*2+0x36] +XDIS 2d720: MISC BASE D55E8D744837 lea r30, ptr [r16+r9*2+0x37] +XDIS 2d726: MISC BASE D55E8D744938 lea r30, ptr [r17+r9*2+0x38] +XDIS 2d72c: MISC BASE D55E8D744A39 lea r30, ptr [r18+r9*2+0x39] +XDIS 2d732: MISC BASE D55E8D744B3A lea r30, ptr [r19+r9*2+0x3a] +XDIS 2d738: MISC BASE D55E8D744C3B lea r30, ptr [r20+r9*2+0x3b] +XDIS 2d73e: MISC BASE D55E8D744D3C lea r30, ptr [r21+r9*2+0x3c] +XDIS 2d744: MISC BASE D55E8D744E3D lea r30, ptr [r22+r9*2+0x3d] +XDIS 2d74a: MISC BASE D55E8D744F3E lea r30, ptr [r23+r9*2+0x3e] +XDIS 2d750: MISC BASE D55F8D74483F lea r30, ptr [r24+r9*2+0x3f] +XDIS 2d756: MISC BASE D55F8D744940 lea r30, ptr [r25+r9*2+0x40] +XDIS 2d75c: MISC BASE D55F8D744A41 lea r30, ptr [r26+r9*2+0x41] +XDIS 2d762: MISC BASE D55F8D744B42 lea r30, ptr [r27+r9*2+0x42] +XDIS 2d768: MISC BASE D55F8D744C43 lea r30, ptr [r28+r9*2+0x43] +XDIS 2d76e: MISC BASE D55F8D744D44 lea r30, ptr [r29+r9*2+0x44] +XDIS 2d774: MISC BASE D55F8D744E45 lea r30, ptr [r30+r9*2+0x45] +XDIS 2d77a: MISC BASE D55F8D744F46 lea r30, ptr [r31+r9*2+0x46] +XDIS 2d780: MISC BASE D54E8D745028 lea r30, ptr [rax+r10*2+0x28] +XDIS 2d786: MISC BASE D54E8D745129 lea r30, ptr [rcx+r10*2+0x29] +XDIS 2d78c: MISC BASE D54E8D74522A lea r30, ptr [rdx+r10*2+0x2a] +XDIS 2d792: MISC BASE D54E8D74532B lea r30, ptr [rbx+r10*2+0x2b] +XDIS 2d798: MISC BASE D54E8D74542C lea r30, ptr [rsp+r10*2+0x2c] +XDIS 2d79e: MISC BASE D54E8D74552D lea r30, ptr [rbp+r10*2+0x2d] +XDIS 2d7a4: MISC BASE D54E8D74562E lea r30, ptr [rsi+r10*2+0x2e] +XDIS 2d7aa: MISC BASE D54E8D74572F lea r30, ptr [rdi+r10*2+0x2f] +XDIS 2d7b0: MISC BASE D54F8D745030 lea r30, ptr [r8+r10*2+0x30] +XDIS 2d7b6: MISC BASE D54F8D745131 lea r30, ptr [r9+r10*2+0x31] +XDIS 2d7bc: MISC BASE D54F8D745232 lea r30, ptr [r10+r10*2+0x32] +XDIS 2d7c2: MISC BASE D54F8D745333 lea r30, ptr [r11+r10*2+0x33] +XDIS 2d7c8: MISC BASE D54F8D745434 lea r30, ptr [r12+r10*2+0x34] +XDIS 2d7ce: MISC BASE D54F8D745535 lea r30, ptr [r13+r10*2+0x35] +XDIS 2d7d4: MISC BASE D54F8D745636 lea r30, ptr [r14+r10*2+0x36] +XDIS 2d7da: MISC BASE D54F8D745737 lea r30, ptr [r15+r10*2+0x37] +XDIS 2d7e0: MISC BASE D55E8D745038 lea r30, ptr [r16+r10*2+0x38] +XDIS 2d7e6: MISC BASE D55E8D745139 lea r30, ptr [r17+r10*2+0x39] +XDIS 2d7ec: MISC BASE D55E8D74523A lea r30, ptr [r18+r10*2+0x3a] +XDIS 2d7f2: MISC BASE D55E8D74533B lea r30, ptr [r19+r10*2+0x3b] +XDIS 2d7f8: MISC BASE D55E8D74543C lea r30, ptr [r20+r10*2+0x3c] +XDIS 2d7fe: MISC BASE D55E8D74553D lea r30, ptr [r21+r10*2+0x3d] +XDIS 2d804: MISC BASE D55E8D74563E lea r30, ptr [r22+r10*2+0x3e] +XDIS 2d80a: MISC BASE D55E8D74573F lea r30, ptr [r23+r10*2+0x3f] +XDIS 2d810: MISC BASE D55F8D745040 lea r30, ptr [r24+r10*2+0x40] +XDIS 2d816: MISC BASE D55F8D745141 lea r30, ptr [r25+r10*2+0x41] +XDIS 2d81c: MISC BASE D55F8D745242 lea r30, ptr [r26+r10*2+0x42] +XDIS 2d822: MISC BASE D55F8D745343 lea r30, ptr [r27+r10*2+0x43] +XDIS 2d828: MISC BASE D55F8D745444 lea r30, ptr [r28+r10*2+0x44] +XDIS 2d82e: MISC BASE D55F8D745545 lea r30, ptr [r29+r10*2+0x45] +XDIS 2d834: MISC BASE D55F8D745646 lea r30, ptr [r30+r10*2+0x46] +XDIS 2d83a: MISC BASE D55F8D745747 lea r30, ptr [r31+r10*2+0x47] +XDIS 2d840: MISC BASE D54E8D745829 lea r30, ptr [rax+r11*2+0x29] +XDIS 2d846: MISC BASE D54E8D74592A lea r30, ptr [rcx+r11*2+0x2a] +XDIS 2d84c: MISC BASE D54E8D745A2B lea r30, ptr [rdx+r11*2+0x2b] +XDIS 2d852: MISC BASE D54E8D745B2C lea r30, ptr [rbx+r11*2+0x2c] +XDIS 2d858: MISC BASE D54E8D745C2D lea r30, ptr [rsp+r11*2+0x2d] +XDIS 2d85e: MISC BASE D54E8D745D2E lea r30, ptr [rbp+r11*2+0x2e] +XDIS 2d864: MISC BASE D54E8D745E2F lea r30, ptr [rsi+r11*2+0x2f] +XDIS 2d86a: MISC BASE D54E8D745F30 lea r30, ptr [rdi+r11*2+0x30] +XDIS 2d870: MISC BASE D54F8D745831 lea r30, ptr [r8+r11*2+0x31] +XDIS 2d876: MISC BASE D54F8D745932 lea r30, ptr [r9+r11*2+0x32] +XDIS 2d87c: MISC BASE D54F8D745A33 lea r30, ptr [r10+r11*2+0x33] +XDIS 2d882: MISC BASE D54F8D745B34 lea r30, ptr [r11+r11*2+0x34] +XDIS 2d888: MISC BASE D54F8D745C35 lea r30, ptr [r12+r11*2+0x35] +XDIS 2d88e: MISC BASE D54F8D745D36 lea r30, ptr [r13+r11*2+0x36] +XDIS 2d894: MISC BASE D54F8D745E37 lea r30, ptr [r14+r11*2+0x37] +XDIS 2d89a: MISC BASE D54F8D745F38 lea r30, ptr [r15+r11*2+0x38] +XDIS 2d8a0: MISC BASE D55E8D745839 lea r30, ptr [r16+r11*2+0x39] +XDIS 2d8a6: MISC BASE D55E8D74593A lea r30, ptr [r17+r11*2+0x3a] +XDIS 2d8ac: MISC BASE D55E8D745A3B lea r30, ptr [r18+r11*2+0x3b] +XDIS 2d8b2: MISC BASE D55E8D745B3C lea r30, ptr [r19+r11*2+0x3c] +XDIS 2d8b8: MISC BASE D55E8D745C3D lea r30, ptr [r20+r11*2+0x3d] +XDIS 2d8be: MISC BASE D55E8D745D3E lea r30, ptr [r21+r11*2+0x3e] +XDIS 2d8c4: MISC BASE D55E8D745E3F lea r30, ptr [r22+r11*2+0x3f] +XDIS 2d8ca: MISC BASE D55E8D745F40 lea r30, ptr [r23+r11*2+0x40] +XDIS 2d8d0: MISC BASE D55F8D745841 lea r30, ptr [r24+r11*2+0x41] +XDIS 2d8d6: MISC BASE D55F8D745942 lea r30, ptr [r25+r11*2+0x42] +XDIS 2d8dc: MISC BASE D55F8D745A43 lea r30, ptr [r26+r11*2+0x43] +XDIS 2d8e2: MISC BASE D55F8D745B44 lea r30, ptr [r27+r11*2+0x44] +XDIS 2d8e8: MISC BASE D55F8D745C45 lea r30, ptr [r28+r11*2+0x45] +XDIS 2d8ee: MISC BASE D55F8D745D46 lea r30, ptr [r29+r11*2+0x46] +XDIS 2d8f4: MISC BASE D55F8D745E47 lea r30, ptr [r30+r11*2+0x47] +XDIS 2d8fa: MISC BASE D55F8D745F48 lea r30, ptr [r31+r11*2+0x48] +XDIS 2d900: MISC BASE D54E8D74602A lea r30, ptr [rax+r12*2+0x2a] +XDIS 2d906: MISC BASE D54E8D74612B lea r30, ptr [rcx+r12*2+0x2b] +XDIS 2d90c: MISC BASE D54E8D74622C lea r30, ptr [rdx+r12*2+0x2c] +XDIS 2d912: MISC BASE D54E8D74632D lea r30, ptr [rbx+r12*2+0x2d] +XDIS 2d918: MISC BASE D54E8D74642E lea r30, ptr [rsp+r12*2+0x2e] +XDIS 2d91e: MISC BASE D54E8D74652F lea r30, ptr [rbp+r12*2+0x2f] +XDIS 2d924: MISC BASE D54E8D746630 lea r30, ptr [rsi+r12*2+0x30] +XDIS 2d92a: MISC BASE D54E8D746731 lea r30, ptr [rdi+r12*2+0x31] +XDIS 2d930: MISC BASE D54F8D746032 lea r30, ptr [r8+r12*2+0x32] +XDIS 2d936: MISC BASE D54F8D746133 lea r30, ptr [r9+r12*2+0x33] +XDIS 2d93c: MISC BASE D54F8D746234 lea r30, ptr [r10+r12*2+0x34] +XDIS 2d942: MISC BASE D54F8D746335 lea r30, ptr [r11+r12*2+0x35] +XDIS 2d948: MISC BASE D54F8D746436 lea r30, ptr [r12+r12*2+0x36] +XDIS 2d94e: MISC BASE D54F8D746537 lea r30, ptr [r13+r12*2+0x37] +XDIS 2d954: MISC BASE D54F8D746638 lea r30, ptr [r14+r12*2+0x38] +XDIS 2d95a: MISC BASE D54F8D746739 lea r30, ptr [r15+r12*2+0x39] +XDIS 2d960: MISC BASE D55E8D74603A lea r30, ptr [r16+r12*2+0x3a] +XDIS 2d966: MISC BASE D55E8D74613B lea r30, ptr [r17+r12*2+0x3b] +XDIS 2d96c: MISC BASE D55E8D74623C lea r30, ptr [r18+r12*2+0x3c] +XDIS 2d972: MISC BASE D55E8D74633D lea r30, ptr [r19+r12*2+0x3d] +XDIS 2d978: MISC BASE D55E8D74643E lea r30, ptr [r20+r12*2+0x3e] +XDIS 2d97e: MISC BASE D55E8D74653F lea r30, ptr [r21+r12*2+0x3f] +XDIS 2d984: MISC BASE D55E8D746640 lea r30, ptr [r22+r12*2+0x40] +XDIS 2d98a: MISC BASE D55E8D746741 lea r30, ptr [r23+r12*2+0x41] +XDIS 2d990: MISC BASE D55F8D746042 lea r30, ptr [r24+r12*2+0x42] +XDIS 2d996: MISC BASE D55F8D746143 lea r30, ptr [r25+r12*2+0x43] +XDIS 2d99c: MISC BASE D55F8D746244 lea r30, ptr [r26+r12*2+0x44] +XDIS 2d9a2: MISC BASE D55F8D746345 lea r30, ptr [r27+r12*2+0x45] +XDIS 2d9a8: MISC BASE D55F8D746446 lea r30, ptr [r28+r12*2+0x46] +XDIS 2d9ae: MISC BASE D55F8D746547 lea r30, ptr [r29+r12*2+0x47] +XDIS 2d9b4: MISC BASE D55F8D746648 lea r30, ptr [r30+r12*2+0x48] +XDIS 2d9ba: MISC BASE D55F8D746749 lea r30, ptr [r31+r12*2+0x49] +XDIS 2d9c0: MISC BASE D54E8D74682B lea r30, ptr [rax+r13*2+0x2b] +XDIS 2d9c6: MISC BASE D54E8D74692C lea r30, ptr [rcx+r13*2+0x2c] +XDIS 2d9cc: MISC BASE D54E8D746A2D lea r30, ptr [rdx+r13*2+0x2d] +XDIS 2d9d2: MISC BASE D54E8D746B2E lea r30, ptr [rbx+r13*2+0x2e] +XDIS 2d9d8: MISC BASE D54E8D746C2F lea r30, ptr [rsp+r13*2+0x2f] +XDIS 2d9de: MISC BASE D54E8D746D30 lea r30, ptr [rbp+r13*2+0x30] +XDIS 2d9e4: MISC BASE D54E8D746E31 lea r30, ptr [rsi+r13*2+0x31] +XDIS 2d9ea: MISC BASE D54E8D746F32 lea r30, ptr [rdi+r13*2+0x32] +XDIS 2d9f0: MISC BASE D54F8D746833 lea r30, ptr [r8+r13*2+0x33] +XDIS 2d9f6: MISC BASE D54F8D746934 lea r30, ptr [r9+r13*2+0x34] +XDIS 2d9fc: MISC BASE D54F8D746A35 lea r30, ptr [r10+r13*2+0x35] +XDIS 2da02: MISC BASE D54F8D746B36 lea r30, ptr [r11+r13*2+0x36] +XDIS 2da08: MISC BASE D54F8D746C37 lea r30, ptr [r12+r13*2+0x37] +XDIS 2da0e: MISC BASE D54F8D746D38 lea r30, ptr [r13+r13*2+0x38] +XDIS 2da14: MISC BASE D54F8D746E39 lea r30, ptr [r14+r13*2+0x39] +XDIS 2da1a: MISC BASE D54F8D746F3A lea r30, ptr [r15+r13*2+0x3a] +XDIS 2da20: MISC BASE D55E8D74683B lea r30, ptr [r16+r13*2+0x3b] +XDIS 2da26: MISC BASE D55E8D74693C lea r30, ptr [r17+r13*2+0x3c] +XDIS 2da2c: MISC BASE D55E8D746A3D lea r30, ptr [r18+r13*2+0x3d] +XDIS 2da32: MISC BASE D55E8D746B3E lea r30, ptr [r19+r13*2+0x3e] +XDIS 2da38: MISC BASE D55E8D746C3F lea r30, ptr [r20+r13*2+0x3f] +XDIS 2da3e: MISC BASE D55E8D746D40 lea r30, ptr [r21+r13*2+0x40] +XDIS 2da44: MISC BASE D55E8D746E41 lea r30, ptr [r22+r13*2+0x41] +XDIS 2da4a: MISC BASE D55E8D746F42 lea r30, ptr [r23+r13*2+0x42] +XDIS 2da50: MISC BASE D55F8D746843 lea r30, ptr [r24+r13*2+0x43] +XDIS 2da56: MISC BASE D55F8D746944 lea r30, ptr [r25+r13*2+0x44] +XDIS 2da5c: MISC BASE D55F8D746A45 lea r30, ptr [r26+r13*2+0x45] +XDIS 2da62: MISC BASE D55F8D746B46 lea r30, ptr [r27+r13*2+0x46] +XDIS 2da68: MISC BASE D55F8D746C47 lea r30, ptr [r28+r13*2+0x47] +XDIS 2da6e: MISC BASE D55F8D746D48 lea r30, ptr [r29+r13*2+0x48] +XDIS 2da74: MISC BASE D55F8D746E49 lea r30, ptr [r30+r13*2+0x49] +XDIS 2da7a: MISC BASE D55F8D746F4A lea r30, ptr [r31+r13*2+0x4a] +XDIS 2da80: MISC BASE D54E8D74702C lea r30, ptr [rax+r14*2+0x2c] +XDIS 2da86: MISC BASE D54E8D74712D lea r30, ptr [rcx+r14*2+0x2d] +XDIS 2da8c: MISC BASE D54E8D74722E lea r30, ptr [rdx+r14*2+0x2e] +XDIS 2da92: MISC BASE D54E8D74732F lea r30, ptr [rbx+r14*2+0x2f] +XDIS 2da98: MISC BASE D54E8D747430 lea r30, ptr [rsp+r14*2+0x30] +XDIS 2da9e: MISC BASE D54E8D747531 lea r30, ptr [rbp+r14*2+0x31] +XDIS 2daa4: MISC BASE D54E8D747632 lea r30, ptr [rsi+r14*2+0x32] +XDIS 2daaa: MISC BASE D54E8D747733 lea r30, ptr [rdi+r14*2+0x33] +XDIS 2dab0: MISC BASE D54F8D747034 lea r30, ptr [r8+r14*2+0x34] +XDIS 2dab6: MISC BASE D54F8D747135 lea r30, ptr [r9+r14*2+0x35] +XDIS 2dabc: MISC BASE D54F8D747236 lea r30, ptr [r10+r14*2+0x36] +XDIS 2dac2: MISC BASE D54F8D747337 lea r30, ptr [r11+r14*2+0x37] +XDIS 2dac8: MISC BASE D54F8D747438 lea r30, ptr [r12+r14*2+0x38] +XDIS 2dace: MISC BASE D54F8D747539 lea r30, ptr [r13+r14*2+0x39] +XDIS 2dad4: MISC BASE D54F8D74763A lea r30, ptr [r14+r14*2+0x3a] +XDIS 2dada: MISC BASE D54F8D74773B lea r30, ptr [r15+r14*2+0x3b] +XDIS 2dae0: MISC BASE D55E8D74703C lea r30, ptr [r16+r14*2+0x3c] +XDIS 2dae6: MISC BASE D55E8D74713D lea r30, ptr [r17+r14*2+0x3d] +XDIS 2daec: MISC BASE D55E8D74723E lea r30, ptr [r18+r14*2+0x3e] +XDIS 2daf2: MISC BASE D55E8D74733F lea r30, ptr [r19+r14*2+0x3f] +XDIS 2daf8: MISC BASE D55E8D747440 lea r30, ptr [r20+r14*2+0x40] +XDIS 2dafe: MISC BASE D55E8D747541 lea r30, ptr [r21+r14*2+0x41] +XDIS 2db04: MISC BASE D55E8D747642 lea r30, ptr [r22+r14*2+0x42] +XDIS 2db0a: MISC BASE D55E8D747743 lea r30, ptr [r23+r14*2+0x43] +XDIS 2db10: MISC BASE D55F8D747044 lea r30, ptr [r24+r14*2+0x44] +XDIS 2db16: MISC BASE D55F8D747145 lea r30, ptr [r25+r14*2+0x45] +XDIS 2db1c: MISC BASE D55F8D747246 lea r30, ptr [r26+r14*2+0x46] +XDIS 2db22: MISC BASE D55F8D747347 lea r30, ptr [r27+r14*2+0x47] +XDIS 2db28: MISC BASE D55F8D747448 lea r30, ptr [r28+r14*2+0x48] +XDIS 2db2e: MISC BASE D55F8D747549 lea r30, ptr [r29+r14*2+0x49] +XDIS 2db34: MISC BASE D55F8D74764A lea r30, ptr [r30+r14*2+0x4a] +XDIS 2db3a: MISC BASE D55F8D74774B lea r30, ptr [r31+r14*2+0x4b] +XDIS 2db40: MISC BASE D54E8D74782D lea r30, ptr [rax+r15*2+0x2d] +XDIS 2db46: MISC BASE D54E8D74792E lea r30, ptr [rcx+r15*2+0x2e] +XDIS 2db4c: MISC BASE D54E8D747A2F lea r30, ptr [rdx+r15*2+0x2f] +XDIS 2db52: MISC BASE D54E8D747B30 lea r30, ptr [rbx+r15*2+0x30] +XDIS 2db58: MISC BASE D54E8D747C31 lea r30, ptr [rsp+r15*2+0x31] +XDIS 2db5e: MISC BASE D54E8D747D32 lea r30, ptr [rbp+r15*2+0x32] +XDIS 2db64: MISC BASE D54E8D747E33 lea r30, ptr [rsi+r15*2+0x33] +XDIS 2db6a: MISC BASE D54E8D747F34 lea r30, ptr [rdi+r15*2+0x34] +XDIS 2db70: MISC BASE D54F8D747835 lea r30, ptr [r8+r15*2+0x35] +XDIS 2db76: MISC BASE D54F8D747936 lea r30, ptr [r9+r15*2+0x36] +XDIS 2db7c: MISC BASE D54F8D747A37 lea r30, ptr [r10+r15*2+0x37] +XDIS 2db82: MISC BASE D54F8D747B38 lea r30, ptr [r11+r15*2+0x38] +XDIS 2db88: MISC BASE D54F8D747C39 lea r30, ptr [r12+r15*2+0x39] +XDIS 2db8e: MISC BASE D54F8D747D3A lea r30, ptr [r13+r15*2+0x3a] +XDIS 2db94: MISC BASE D54F8D747E3B lea r30, ptr [r14+r15*2+0x3b] +XDIS 2db9a: MISC BASE D54F8D747F3C lea r30, ptr [r15+r15*2+0x3c] +XDIS 2dba0: MISC BASE D55E8D74783D lea r30, ptr [r16+r15*2+0x3d] +XDIS 2dba6: MISC BASE D55E8D74793E lea r30, ptr [r17+r15*2+0x3e] +XDIS 2dbac: MISC BASE D55E8D747A3F lea r30, ptr [r18+r15*2+0x3f] +XDIS 2dbb2: MISC BASE D55E8D747B40 lea r30, ptr [r19+r15*2+0x40] +XDIS 2dbb8: MISC BASE D55E8D747C41 lea r30, ptr [r20+r15*2+0x41] +XDIS 2dbbe: MISC BASE D55E8D747D42 lea r30, ptr [r21+r15*2+0x42] +XDIS 2dbc4: MISC BASE D55E8D747E43 lea r30, ptr [r22+r15*2+0x43] +XDIS 2dbca: MISC BASE D55E8D747F44 lea r30, ptr [r23+r15*2+0x44] +XDIS 2dbd0: MISC BASE D55F8D747845 lea r30, ptr [r24+r15*2+0x45] +XDIS 2dbd6: MISC BASE D55F8D747946 lea r30, ptr [r25+r15*2+0x46] +XDIS 2dbdc: MISC BASE D55F8D747A47 lea r30, ptr [r26+r15*2+0x47] +XDIS 2dbe2: MISC BASE D55F8D747B48 lea r30, ptr [r27+r15*2+0x48] +XDIS 2dbe8: MISC BASE D55F8D747C49 lea r30, ptr [r28+r15*2+0x49] +XDIS 2dbee: MISC BASE D55F8D747D4A lea r30, ptr [r29+r15*2+0x4a] +XDIS 2dbf4: MISC BASE D55F8D747E4B lea r30, ptr [r30+r15*2+0x4b] +XDIS 2dbfa: MISC BASE D55F8D747F4C lea r30, ptr [r31+r15*2+0x4c] +XDIS 2dc00: MISC BASE D56C8D74402E lea r30, ptr [rax+r16*2+0x2e] +XDIS 2dc06: MISC BASE D56C8D74412F lea r30, ptr [rcx+r16*2+0x2f] +XDIS 2dc0c: MISC BASE D56C8D744230 lea r30, ptr [rdx+r16*2+0x30] +XDIS 2dc12: MISC BASE D56C8D744331 lea r30, ptr [rbx+r16*2+0x31] +XDIS 2dc18: MISC BASE D56C8D744432 lea r30, ptr [rsp+r16*2+0x32] +XDIS 2dc1e: MISC BASE D56C8D744533 lea r30, ptr [rbp+r16*2+0x33] +XDIS 2dc24: MISC BASE D56C8D744634 lea r30, ptr [rsi+r16*2+0x34] +XDIS 2dc2a: MISC BASE D56C8D744735 lea r30, ptr [rdi+r16*2+0x35] +XDIS 2dc30: MISC BASE D56D8D744036 lea r30, ptr [r8+r16*2+0x36] +XDIS 2dc36: MISC BASE D56D8D744137 lea r30, ptr [r9+r16*2+0x37] +XDIS 2dc3c: MISC BASE D56D8D744238 lea r30, ptr [r10+r16*2+0x38] +XDIS 2dc42: MISC BASE D56D8D744339 lea r30, ptr [r11+r16*2+0x39] +XDIS 2dc48: MISC BASE D56D8D74443A lea r30, ptr [r12+r16*2+0x3a] +XDIS 2dc4e: MISC BASE D56D8D74453B lea r30, ptr [r13+r16*2+0x3b] +XDIS 2dc54: MISC BASE D56D8D74463C lea r30, ptr [r14+r16*2+0x3c] +XDIS 2dc5a: MISC BASE D56D8D74473D lea r30, ptr [r15+r16*2+0x3d] +XDIS 2dc60: MISC BASE D57C8D74403E lea r30, ptr [r16+r16*2+0x3e] +XDIS 2dc66: MISC BASE D57C8D74413F lea r30, ptr [r17+r16*2+0x3f] +XDIS 2dc6c: MISC BASE D57C8D744240 lea r30, ptr [r18+r16*2+0x40] +XDIS 2dc72: MISC BASE D57C8D744341 lea r30, ptr [r19+r16*2+0x41] +XDIS 2dc78: MISC BASE D57C8D744442 lea r30, ptr [r20+r16*2+0x42] +XDIS 2dc7e: MISC BASE D57C8D744543 lea r30, ptr [r21+r16*2+0x43] +XDIS 2dc84: MISC BASE D57C8D744644 lea r30, ptr [r22+r16*2+0x44] +XDIS 2dc8a: MISC BASE D57C8D744745 lea r30, ptr [r23+r16*2+0x45] +XDIS 2dc90: MISC BASE D57D8D744046 lea r30, ptr [r24+r16*2+0x46] +XDIS 2dc96: MISC BASE D57D8D744147 lea r30, ptr [r25+r16*2+0x47] +XDIS 2dc9c: MISC BASE D57D8D744248 lea r30, ptr [r26+r16*2+0x48] +XDIS 2dca2: MISC BASE D57D8D744349 lea r30, ptr [r27+r16*2+0x49] +XDIS 2dca8: MISC BASE D57D8D74444A lea r30, ptr [r28+r16*2+0x4a] +XDIS 2dcae: MISC BASE D57D8D74454B lea r30, ptr [r29+r16*2+0x4b] +XDIS 2dcb4: MISC BASE D57D8D74464C lea r30, ptr [r30+r16*2+0x4c] +XDIS 2dcba: MISC BASE D57D8D74474D lea r30, ptr [r31+r16*2+0x4d] +XDIS 2dcc0: MISC BASE D56C8D74482F lea r30, ptr [rax+r17*2+0x2f] +XDIS 2dcc6: MISC BASE D56C8D744930 lea r30, ptr [rcx+r17*2+0x30] +XDIS 2dccc: MISC BASE D56C8D744A31 lea r30, ptr [rdx+r17*2+0x31] +XDIS 2dcd2: MISC BASE D56C8D744B32 lea r30, ptr [rbx+r17*2+0x32] +XDIS 2dcd8: MISC BASE D56C8D744C33 lea r30, ptr [rsp+r17*2+0x33] +XDIS 2dcde: MISC BASE D56C8D744D34 lea r30, ptr [rbp+r17*2+0x34] +XDIS 2dce4: MISC BASE D56C8D744E35 lea r30, ptr [rsi+r17*2+0x35] +XDIS 2dcea: MISC BASE D56C8D744F36 lea r30, ptr [rdi+r17*2+0x36] +XDIS 2dcf0: MISC BASE D56D8D744837 lea r30, ptr [r8+r17*2+0x37] +XDIS 2dcf6: MISC BASE D56D8D744938 lea r30, ptr [r9+r17*2+0x38] +XDIS 2dcfc: MISC BASE D56D8D744A39 lea r30, ptr [r10+r17*2+0x39] +XDIS 2dd02: MISC BASE D56D8D744B3A lea r30, ptr [r11+r17*2+0x3a] +XDIS 2dd08: MISC BASE D56D8D744C3B lea r30, ptr [r12+r17*2+0x3b] +XDIS 2dd0e: MISC BASE D56D8D744D3C lea r30, ptr [r13+r17*2+0x3c] +XDIS 2dd14: MISC BASE D56D8D744E3D lea r30, ptr [r14+r17*2+0x3d] +XDIS 2dd1a: MISC BASE D56D8D744F3E lea r30, ptr [r15+r17*2+0x3e] +XDIS 2dd20: MISC BASE D57C8D74483F lea r30, ptr [r16+r17*2+0x3f] +XDIS 2dd26: MISC BASE D57C8D744940 lea r30, ptr [r17+r17*2+0x40] +XDIS 2dd2c: MISC BASE D57C8D744A41 lea r30, ptr [r18+r17*2+0x41] +XDIS 2dd32: MISC BASE D57C8D744B42 lea r30, ptr [r19+r17*2+0x42] +XDIS 2dd38: MISC BASE D57C8D744C43 lea r30, ptr [r20+r17*2+0x43] +XDIS 2dd3e: MISC BASE D57C8D744D44 lea r30, ptr [r21+r17*2+0x44] +XDIS 2dd44: MISC BASE D57C8D744E45 lea r30, ptr [r22+r17*2+0x45] +XDIS 2dd4a: MISC BASE D57C8D744F46 lea r30, ptr [r23+r17*2+0x46] +XDIS 2dd50: MISC BASE D57D8D744847 lea r30, ptr [r24+r17*2+0x47] +XDIS 2dd56: MISC BASE D57D8D744948 lea r30, ptr [r25+r17*2+0x48] +XDIS 2dd5c: MISC BASE D57D8D744A49 lea r30, ptr [r26+r17*2+0x49] +XDIS 2dd62: MISC BASE D57D8D744B4A lea r30, ptr [r27+r17*2+0x4a] +XDIS 2dd68: MISC BASE D57D8D744C4B lea r30, ptr [r28+r17*2+0x4b] +XDIS 2dd6e: MISC BASE D57D8D744D4C lea r30, ptr [r29+r17*2+0x4c] +XDIS 2dd74: MISC BASE D57D8D744E4D lea r30, ptr [r30+r17*2+0x4d] +XDIS 2dd7a: MISC BASE D57D8D744F4E lea r30, ptr [r31+r17*2+0x4e] +XDIS 2dd80: MISC BASE D56C8D745030 lea r30, ptr [rax+r18*2+0x30] +XDIS 2dd86: MISC BASE D56C8D745131 lea r30, ptr [rcx+r18*2+0x31] +XDIS 2dd8c: MISC BASE D56C8D745232 lea r30, ptr [rdx+r18*2+0x32] +XDIS 2dd92: MISC BASE D56C8D745333 lea r30, ptr [rbx+r18*2+0x33] +XDIS 2dd98: MISC BASE D56C8D745434 lea r30, ptr [rsp+r18*2+0x34] +XDIS 2dd9e: MISC BASE D56C8D745535 lea r30, ptr [rbp+r18*2+0x35] +XDIS 2dda4: MISC BASE D56C8D745636 lea r30, ptr [rsi+r18*2+0x36] +XDIS 2ddaa: MISC BASE D56C8D745737 lea r30, ptr [rdi+r18*2+0x37] +XDIS 2ddb0: MISC BASE D56D8D745038 lea r30, ptr [r8+r18*2+0x38] +XDIS 2ddb6: MISC BASE D56D8D745139 lea r30, ptr [r9+r18*2+0x39] +XDIS 2ddbc: MISC BASE D56D8D74523A lea r30, ptr [r10+r18*2+0x3a] +XDIS 2ddc2: MISC BASE D56D8D74533B lea r30, ptr [r11+r18*2+0x3b] +XDIS 2ddc8: MISC BASE D56D8D74543C lea r30, ptr [r12+r18*2+0x3c] +XDIS 2ddce: MISC BASE D56D8D74553D lea r30, ptr [r13+r18*2+0x3d] +XDIS 2ddd4: MISC BASE D56D8D74563E lea r30, ptr [r14+r18*2+0x3e] +XDIS 2ddda: MISC BASE D56D8D74573F lea r30, ptr [r15+r18*2+0x3f] +XDIS 2dde0: MISC BASE D57C8D745040 lea r30, ptr [r16+r18*2+0x40] +XDIS 2dde6: MISC BASE D57C8D745141 lea r30, ptr [r17+r18*2+0x41] +XDIS 2ddec: MISC BASE D57C8D745242 lea r30, ptr [r18+r18*2+0x42] +XDIS 2ddf2: MISC BASE D57C8D745343 lea r30, ptr [r19+r18*2+0x43] +XDIS 2ddf8: MISC BASE D57C8D745444 lea r30, ptr [r20+r18*2+0x44] +XDIS 2ddfe: MISC BASE D57C8D745545 lea r30, ptr [r21+r18*2+0x45] +XDIS 2de04: MISC BASE D57C8D745646 lea r30, ptr [r22+r18*2+0x46] +XDIS 2de0a: MISC BASE D57C8D745747 lea r30, ptr [r23+r18*2+0x47] +XDIS 2de10: MISC BASE D57D8D745048 lea r30, ptr [r24+r18*2+0x48] +XDIS 2de16: MISC BASE D57D8D745149 lea r30, ptr [r25+r18*2+0x49] +XDIS 2de1c: MISC BASE D57D8D74524A lea r30, ptr [r26+r18*2+0x4a] +XDIS 2de22: MISC BASE D57D8D74534B lea r30, ptr [r27+r18*2+0x4b] +XDIS 2de28: MISC BASE D57D8D74544C lea r30, ptr [r28+r18*2+0x4c] +XDIS 2de2e: MISC BASE D57D8D74554D lea r30, ptr [r29+r18*2+0x4d] +XDIS 2de34: MISC BASE D57D8D74564E lea r30, ptr [r30+r18*2+0x4e] +XDIS 2de3a: MISC BASE D57D8D74574F lea r30, ptr [r31+r18*2+0x4f] +XDIS 2de40: MISC BASE D56C8D745831 lea r30, ptr [rax+r19*2+0x31] +XDIS 2de46: MISC BASE D56C8D745932 lea r30, ptr [rcx+r19*2+0x32] +XDIS 2de4c: MISC BASE D56C8D745A33 lea r30, ptr [rdx+r19*2+0x33] +XDIS 2de52: MISC BASE D56C8D745B34 lea r30, ptr [rbx+r19*2+0x34] +XDIS 2de58: MISC BASE D56C8D745C35 lea r30, ptr [rsp+r19*2+0x35] +XDIS 2de5e: MISC BASE D56C8D745D36 lea r30, ptr [rbp+r19*2+0x36] +XDIS 2de64: MISC BASE D56C8D745E37 lea r30, ptr [rsi+r19*2+0x37] +XDIS 2de6a: MISC BASE D56C8D745F38 lea r30, ptr [rdi+r19*2+0x38] +XDIS 2de70: MISC BASE D56D8D745839 lea r30, ptr [r8+r19*2+0x39] +XDIS 2de76: MISC BASE D56D8D74593A lea r30, ptr [r9+r19*2+0x3a] +XDIS 2de7c: MISC BASE D56D8D745A3B lea r30, ptr [r10+r19*2+0x3b] +XDIS 2de82: MISC BASE D56D8D745B3C lea r30, ptr [r11+r19*2+0x3c] +XDIS 2de88: MISC BASE D56D8D745C3D lea r30, ptr [r12+r19*2+0x3d] +XDIS 2de8e: MISC BASE D56D8D745D3E lea r30, ptr [r13+r19*2+0x3e] +XDIS 2de94: MISC BASE D56D8D745E3F lea r30, ptr [r14+r19*2+0x3f] +XDIS 2de9a: MISC BASE D56D8D745F40 lea r30, ptr [r15+r19*2+0x40] +XDIS 2dea0: MISC BASE D57C8D745841 lea r30, ptr [r16+r19*2+0x41] +XDIS 2dea6: MISC BASE D57C8D745942 lea r30, ptr [r17+r19*2+0x42] +XDIS 2deac: MISC BASE D57C8D745A43 lea r30, ptr [r18+r19*2+0x43] +XDIS 2deb2: MISC BASE D57C8D745B44 lea r30, ptr [r19+r19*2+0x44] +XDIS 2deb8: MISC BASE D57C8D745C45 lea r30, ptr [r20+r19*2+0x45] +XDIS 2debe: MISC BASE D57C8D745D46 lea r30, ptr [r21+r19*2+0x46] +XDIS 2dec4: MISC BASE D57C8D745E47 lea r30, ptr [r22+r19*2+0x47] +XDIS 2deca: MISC BASE D57C8D745F48 lea r30, ptr [r23+r19*2+0x48] +XDIS 2ded0: MISC BASE D57D8D745849 lea r30, ptr [r24+r19*2+0x49] +XDIS 2ded6: MISC BASE D57D8D74594A lea r30, ptr [r25+r19*2+0x4a] +XDIS 2dedc: MISC BASE D57D8D745A4B lea r30, ptr [r26+r19*2+0x4b] +XDIS 2dee2: MISC BASE D57D8D745B4C lea r30, ptr [r27+r19*2+0x4c] +XDIS 2dee8: MISC BASE D57D8D745C4D lea r30, ptr [r28+r19*2+0x4d] +XDIS 2deee: MISC BASE D57D8D745D4E lea r30, ptr [r29+r19*2+0x4e] +XDIS 2def4: MISC BASE D57D8D745E4F lea r30, ptr [r30+r19*2+0x4f] +XDIS 2defa: MISC BASE D57D8D745F50 lea r30, ptr [r31+r19*2+0x50] +XDIS 2df00: MISC BASE D56C8D746032 lea r30, ptr [rax+r20*2+0x32] +XDIS 2df06: MISC BASE D56C8D746133 lea r30, ptr [rcx+r20*2+0x33] +XDIS 2df0c: MISC BASE D56C8D746234 lea r30, ptr [rdx+r20*2+0x34] +XDIS 2df12: MISC BASE D56C8D746335 lea r30, ptr [rbx+r20*2+0x35] +XDIS 2df18: MISC BASE D56C8D746436 lea r30, ptr [rsp+r20*2+0x36] +XDIS 2df1e: MISC BASE D56C8D746537 lea r30, ptr [rbp+r20*2+0x37] +XDIS 2df24: MISC BASE D56C8D746638 lea r30, ptr [rsi+r20*2+0x38] +XDIS 2df2a: MISC BASE D56C8D746739 lea r30, ptr [rdi+r20*2+0x39] +XDIS 2df30: MISC BASE D56D8D74603A lea r30, ptr [r8+r20*2+0x3a] +XDIS 2df36: MISC BASE D56D8D74613B lea r30, ptr [r9+r20*2+0x3b] +XDIS 2df3c: MISC BASE D56D8D74623C lea r30, ptr [r10+r20*2+0x3c] +XDIS 2df42: MISC BASE D56D8D74633D lea r30, ptr [r11+r20*2+0x3d] +XDIS 2df48: MISC BASE D56D8D74643E lea r30, ptr [r12+r20*2+0x3e] +XDIS 2df4e: MISC BASE D56D8D74653F lea r30, ptr [r13+r20*2+0x3f] +XDIS 2df54: MISC BASE D56D8D746640 lea r30, ptr [r14+r20*2+0x40] +XDIS 2df5a: MISC BASE D56D8D746741 lea r30, ptr [r15+r20*2+0x41] +XDIS 2df60: MISC BASE D57C8D746042 lea r30, ptr [r16+r20*2+0x42] +XDIS 2df66: MISC BASE D57C8D746143 lea r30, ptr [r17+r20*2+0x43] +XDIS 2df6c: MISC BASE D57C8D746244 lea r30, ptr [r18+r20*2+0x44] +XDIS 2df72: MISC BASE D57C8D746345 lea r30, ptr [r19+r20*2+0x45] +XDIS 2df78: MISC BASE D57C8D746446 lea r30, ptr [r20+r20*2+0x46] +XDIS 2df7e: MISC BASE D57C8D746547 lea r30, ptr [r21+r20*2+0x47] +XDIS 2df84: MISC BASE D57C8D746648 lea r30, ptr [r22+r20*2+0x48] +XDIS 2df8a: MISC BASE D57C8D746749 lea r30, ptr [r23+r20*2+0x49] +XDIS 2df90: MISC BASE D57D8D74604A lea r30, ptr [r24+r20*2+0x4a] +XDIS 2df96: MISC BASE D57D8D74614B lea r30, ptr [r25+r20*2+0x4b] +XDIS 2df9c: MISC BASE D57D8D74624C lea r30, ptr [r26+r20*2+0x4c] +XDIS 2dfa2: MISC BASE D57D8D74634D lea r30, ptr [r27+r20*2+0x4d] +XDIS 2dfa8: MISC BASE D57D8D74644E lea r30, ptr [r28+r20*2+0x4e] +XDIS 2dfae: MISC BASE D57D8D74654F lea r30, ptr [r29+r20*2+0x4f] +XDIS 2dfb4: MISC BASE D57D8D746650 lea r30, ptr [r30+r20*2+0x50] +XDIS 2dfba: MISC BASE D57D8D746751 lea r30, ptr [r31+r20*2+0x51] +XDIS 2dfc0: MISC BASE D56C8D746833 lea r30, ptr [rax+r21*2+0x33] +XDIS 2dfc6: MISC BASE D56C8D746934 lea r30, ptr [rcx+r21*2+0x34] +XDIS 2dfcc: MISC BASE D56C8D746A35 lea r30, ptr [rdx+r21*2+0x35] +XDIS 2dfd2: MISC BASE D56C8D746B36 lea r30, ptr [rbx+r21*2+0x36] +XDIS 2dfd8: MISC BASE D56C8D746C37 lea r30, ptr [rsp+r21*2+0x37] +XDIS 2dfde: MISC BASE D56C8D746D38 lea r30, ptr [rbp+r21*2+0x38] +XDIS 2dfe4: MISC BASE D56C8D746E39 lea r30, ptr [rsi+r21*2+0x39] +XDIS 2dfea: MISC BASE D56C8D746F3A lea r30, ptr [rdi+r21*2+0x3a] +XDIS 2dff0: MISC BASE D56D8D74683B lea r30, ptr [r8+r21*2+0x3b] +XDIS 2dff6: MISC BASE D56D8D74693C lea r30, ptr [r9+r21*2+0x3c] +XDIS 2dffc: MISC BASE D56D8D746A3D lea r30, ptr [r10+r21*2+0x3d] +XDIS 2e002: MISC BASE D56D8D746B3E lea r30, ptr [r11+r21*2+0x3e] +XDIS 2e008: MISC BASE D56D8D746C3F lea r30, ptr [r12+r21*2+0x3f] +XDIS 2e00e: MISC BASE D56D8D746D40 lea r30, ptr [r13+r21*2+0x40] +XDIS 2e014: MISC BASE D56D8D746E41 lea r30, ptr [r14+r21*2+0x41] +XDIS 2e01a: MISC BASE D56D8D746F42 lea r30, ptr [r15+r21*2+0x42] +XDIS 2e020: MISC BASE D57C8D746843 lea r30, ptr [r16+r21*2+0x43] +XDIS 2e026: MISC BASE D57C8D746944 lea r30, ptr [r17+r21*2+0x44] +XDIS 2e02c: MISC BASE D57C8D746A45 lea r30, ptr [r18+r21*2+0x45] +XDIS 2e032: MISC BASE D57C8D746B46 lea r30, ptr [r19+r21*2+0x46] +XDIS 2e038: MISC BASE D57C8D746C47 lea r30, ptr [r20+r21*2+0x47] +XDIS 2e03e: MISC BASE D57C8D746D48 lea r30, ptr [r21+r21*2+0x48] +XDIS 2e044: MISC BASE D57C8D746E49 lea r30, ptr [r22+r21*2+0x49] +XDIS 2e04a: MISC BASE D57C8D746F4A lea r30, ptr [r23+r21*2+0x4a] +XDIS 2e050: MISC BASE D57D8D74684B lea r30, ptr [r24+r21*2+0x4b] +XDIS 2e056: MISC BASE D57D8D74694C lea r30, ptr [r25+r21*2+0x4c] +XDIS 2e05c: MISC BASE D57D8D746A4D lea r30, ptr [r26+r21*2+0x4d] +XDIS 2e062: MISC BASE D57D8D746B4E lea r30, ptr [r27+r21*2+0x4e] +XDIS 2e068: MISC BASE D57D8D746C4F lea r30, ptr [r28+r21*2+0x4f] +XDIS 2e06e: MISC BASE D57D8D746D50 lea r30, ptr [r29+r21*2+0x50] +XDIS 2e074: MISC BASE D57D8D746E51 lea r30, ptr [r30+r21*2+0x51] +XDIS 2e07a: MISC BASE D57D8D746F52 lea r30, ptr [r31+r21*2+0x52] +XDIS 2e080: MISC BASE D56C8D747034 lea r30, ptr [rax+r22*2+0x34] +XDIS 2e086: MISC BASE D56C8D747135 lea r30, ptr [rcx+r22*2+0x35] +XDIS 2e08c: MISC BASE D56C8D747236 lea r30, ptr [rdx+r22*2+0x36] +XDIS 2e092: MISC BASE D56C8D747337 lea r30, ptr [rbx+r22*2+0x37] +XDIS 2e098: MISC BASE D56C8D747438 lea r30, ptr [rsp+r22*2+0x38] +XDIS 2e09e: MISC BASE D56C8D747539 lea r30, ptr [rbp+r22*2+0x39] +XDIS 2e0a4: MISC BASE D56C8D74763A lea r30, ptr [rsi+r22*2+0x3a] +XDIS 2e0aa: MISC BASE D56C8D74773B lea r30, ptr [rdi+r22*2+0x3b] +XDIS 2e0b0: MISC BASE D56D8D74703C lea r30, ptr [r8+r22*2+0x3c] +XDIS 2e0b6: MISC BASE D56D8D74713D lea r30, ptr [r9+r22*2+0x3d] +XDIS 2e0bc: MISC BASE D56D8D74723E lea r30, ptr [r10+r22*2+0x3e] +XDIS 2e0c2: MISC BASE D56D8D74733F lea r30, ptr [r11+r22*2+0x3f] +XDIS 2e0c8: MISC BASE D56D8D747440 lea r30, ptr [r12+r22*2+0x40] +XDIS 2e0ce: MISC BASE D56D8D747541 lea r30, ptr [r13+r22*2+0x41] +XDIS 2e0d4: MISC BASE D56D8D747642 lea r30, ptr [r14+r22*2+0x42] +XDIS 2e0da: MISC BASE D56D8D747743 lea r30, ptr [r15+r22*2+0x43] +XDIS 2e0e0: MISC BASE D57C8D747044 lea r30, ptr [r16+r22*2+0x44] +XDIS 2e0e6: MISC BASE D57C8D747145 lea r30, ptr [r17+r22*2+0x45] +XDIS 2e0ec: MISC BASE D57C8D747246 lea r30, ptr [r18+r22*2+0x46] +XDIS 2e0f2: MISC BASE D57C8D747347 lea r30, ptr [r19+r22*2+0x47] +XDIS 2e0f8: MISC BASE D57C8D747448 lea r30, ptr [r20+r22*2+0x48] +XDIS 2e0fe: MISC BASE D57C8D747549 lea r30, ptr [r21+r22*2+0x49] +XDIS 2e104: MISC BASE D57C8D74764A lea r30, ptr [r22+r22*2+0x4a] +XDIS 2e10a: MISC BASE D57C8D74774B lea r30, ptr [r23+r22*2+0x4b] +XDIS 2e110: MISC BASE D57D8D74704C lea r30, ptr [r24+r22*2+0x4c] +XDIS 2e116: MISC BASE D57D8D74714D lea r30, ptr [r25+r22*2+0x4d] +XDIS 2e11c: MISC BASE D57D8D74724E lea r30, ptr [r26+r22*2+0x4e] +XDIS 2e122: MISC BASE D57D8D74734F lea r30, ptr [r27+r22*2+0x4f] +XDIS 2e128: MISC BASE D57D8D747450 lea r30, ptr [r28+r22*2+0x50] +XDIS 2e12e: MISC BASE D57D8D747551 lea r30, ptr [r29+r22*2+0x51] +XDIS 2e134: MISC BASE D57D8D747652 lea r30, ptr [r30+r22*2+0x52] +XDIS 2e13a: MISC BASE D57D8D747753 lea r30, ptr [r31+r22*2+0x53] +XDIS 2e140: MISC BASE D56C8D747835 lea r30, ptr [rax+r23*2+0x35] +XDIS 2e146: MISC BASE D56C8D747936 lea r30, ptr [rcx+r23*2+0x36] +XDIS 2e14c: MISC BASE D56C8D747A37 lea r30, ptr [rdx+r23*2+0x37] +XDIS 2e152: MISC BASE D56C8D747B38 lea r30, ptr [rbx+r23*2+0x38] +XDIS 2e158: MISC BASE D56C8D747C39 lea r30, ptr [rsp+r23*2+0x39] +XDIS 2e15e: MISC BASE D56C8D747D3A lea r30, ptr [rbp+r23*2+0x3a] +XDIS 2e164: MISC BASE D56C8D747E3B lea r30, ptr [rsi+r23*2+0x3b] +XDIS 2e16a: MISC BASE D56C8D747F3C lea r30, ptr [rdi+r23*2+0x3c] +XDIS 2e170: MISC BASE D56D8D74783D lea r30, ptr [r8+r23*2+0x3d] +XDIS 2e176: MISC BASE D56D8D74793E lea r30, ptr [r9+r23*2+0x3e] +XDIS 2e17c: MISC BASE D56D8D747A3F lea r30, ptr [r10+r23*2+0x3f] +XDIS 2e182: MISC BASE D56D8D747B40 lea r30, ptr [r11+r23*2+0x40] +XDIS 2e188: MISC BASE D56D8D747C41 lea r30, ptr [r12+r23*2+0x41] +XDIS 2e18e: MISC BASE D56D8D747D42 lea r30, ptr [r13+r23*2+0x42] +XDIS 2e194: MISC BASE D56D8D747E43 lea r30, ptr [r14+r23*2+0x43] +XDIS 2e19a: MISC BASE D56D8D747F44 lea r30, ptr [r15+r23*2+0x44] +XDIS 2e1a0: MISC BASE D57C8D747845 lea r30, ptr [r16+r23*2+0x45] +XDIS 2e1a6: MISC BASE D57C8D747946 lea r30, ptr [r17+r23*2+0x46] +XDIS 2e1ac: MISC BASE D57C8D747A47 lea r30, ptr [r18+r23*2+0x47] +XDIS 2e1b2: MISC BASE D57C8D747B48 lea r30, ptr [r19+r23*2+0x48] +XDIS 2e1b8: MISC BASE D57C8D747C49 lea r30, ptr [r20+r23*2+0x49] +XDIS 2e1be: MISC BASE D57C8D747D4A lea r30, ptr [r21+r23*2+0x4a] +XDIS 2e1c4: MISC BASE D57C8D747E4B lea r30, ptr [r22+r23*2+0x4b] +XDIS 2e1ca: MISC BASE D57C8D747F4C lea r30, ptr [r23+r23*2+0x4c] +XDIS 2e1d0: MISC BASE D57D8D74784D lea r30, ptr [r24+r23*2+0x4d] +XDIS 2e1d6: MISC BASE D57D8D74794E lea r30, ptr [r25+r23*2+0x4e] +XDIS 2e1dc: MISC BASE D57D8D747A4F lea r30, ptr [r26+r23*2+0x4f] +XDIS 2e1e2: MISC BASE D57D8D747B50 lea r30, ptr [r27+r23*2+0x50] +XDIS 2e1e8: MISC BASE D57D8D747C51 lea r30, ptr [r28+r23*2+0x51] +XDIS 2e1ee: MISC BASE D57D8D747D52 lea r30, ptr [r29+r23*2+0x52] +XDIS 2e1f4: MISC BASE D57D8D747E53 lea r30, ptr [r30+r23*2+0x53] +XDIS 2e1fa: MISC BASE D57D8D747F54 lea r30, ptr [r31+r23*2+0x54] +XDIS 2e200: MISC BASE D56E8D744036 lea r30, ptr [rax+r24*2+0x36] +XDIS 2e206: MISC BASE D56E8D744137 lea r30, ptr [rcx+r24*2+0x37] +XDIS 2e20c: MISC BASE D56E8D744238 lea r30, ptr [rdx+r24*2+0x38] +XDIS 2e212: MISC BASE D56E8D744339 lea r30, ptr [rbx+r24*2+0x39] +XDIS 2e218: MISC BASE D56E8D74443A lea r30, ptr [rsp+r24*2+0x3a] +XDIS 2e21e: MISC BASE D56E8D74453B lea r30, ptr [rbp+r24*2+0x3b] +XDIS 2e224: MISC BASE D56E8D74463C lea r30, ptr [rsi+r24*2+0x3c] +XDIS 2e22a: MISC BASE D56E8D74473D lea r30, ptr [rdi+r24*2+0x3d] +XDIS 2e230: MISC BASE D56F8D74403E lea r30, ptr [r8+r24*2+0x3e] +XDIS 2e236: MISC BASE D56F8D74413F lea r30, ptr [r9+r24*2+0x3f] +XDIS 2e23c: MISC BASE D56F8D744240 lea r30, ptr [r10+r24*2+0x40] +XDIS 2e242: MISC BASE D56F8D744341 lea r30, ptr [r11+r24*2+0x41] +XDIS 2e248: MISC BASE D56F8D744442 lea r30, ptr [r12+r24*2+0x42] +XDIS 2e24e: MISC BASE D56F8D744543 lea r30, ptr [r13+r24*2+0x43] +XDIS 2e254: MISC BASE D56F8D744644 lea r30, ptr [r14+r24*2+0x44] +XDIS 2e25a: MISC BASE D56F8D744745 lea r30, ptr [r15+r24*2+0x45] +XDIS 2e260: MISC BASE D57E8D744046 lea r30, ptr [r16+r24*2+0x46] +XDIS 2e266: MISC BASE D57E8D744147 lea r30, ptr [r17+r24*2+0x47] +XDIS 2e26c: MISC BASE D57E8D744248 lea r30, ptr [r18+r24*2+0x48] +XDIS 2e272: MISC BASE D57E8D744349 lea r30, ptr [r19+r24*2+0x49] +XDIS 2e278: MISC BASE D57E8D74444A lea r30, ptr [r20+r24*2+0x4a] +XDIS 2e27e: MISC BASE D57E8D74454B lea r30, ptr [r21+r24*2+0x4b] +XDIS 2e284: MISC BASE D57E8D74464C lea r30, ptr [r22+r24*2+0x4c] +XDIS 2e28a: MISC BASE D57E8D74474D lea r30, ptr [r23+r24*2+0x4d] +XDIS 2e290: MISC BASE D57F8D74404E lea r30, ptr [r24+r24*2+0x4e] +XDIS 2e296: MISC BASE D57F8D74414F lea r30, ptr [r25+r24*2+0x4f] +XDIS 2e29c: MISC BASE D57F8D744250 lea r30, ptr [r26+r24*2+0x50] +XDIS 2e2a2: MISC BASE D57F8D744351 lea r30, ptr [r27+r24*2+0x51] +XDIS 2e2a8: MISC BASE D57F8D744452 lea r30, ptr [r28+r24*2+0x52] +XDIS 2e2ae: MISC BASE D57F8D744553 lea r30, ptr [r29+r24*2+0x53] +XDIS 2e2b4: MISC BASE D57F8D744654 lea r30, ptr [r30+r24*2+0x54] +XDIS 2e2ba: MISC BASE D57F8D744755 lea r30, ptr [r31+r24*2+0x55] +XDIS 2e2c0: MISC BASE D56E8D744837 lea r30, ptr [rax+r25*2+0x37] +XDIS 2e2c6: MISC BASE D56E8D744938 lea r30, ptr [rcx+r25*2+0x38] +XDIS 2e2cc: MISC BASE D56E8D744A39 lea r30, ptr [rdx+r25*2+0x39] +XDIS 2e2d2: MISC BASE D56E8D744B3A lea r30, ptr [rbx+r25*2+0x3a] +XDIS 2e2d8: MISC BASE D56E8D744C3B lea r30, ptr [rsp+r25*2+0x3b] +XDIS 2e2de: MISC BASE D56E8D744D3C lea r30, ptr [rbp+r25*2+0x3c] +XDIS 2e2e4: MISC BASE D56E8D744E3D lea r30, ptr [rsi+r25*2+0x3d] +XDIS 2e2ea: MISC BASE D56E8D744F3E lea r30, ptr [rdi+r25*2+0x3e] +XDIS 2e2f0: MISC BASE D56F8D74483F lea r30, ptr [r8+r25*2+0x3f] +XDIS 2e2f6: MISC BASE D56F8D744940 lea r30, ptr [r9+r25*2+0x40] +XDIS 2e2fc: MISC BASE D56F8D744A41 lea r30, ptr [r10+r25*2+0x41] +XDIS 2e302: MISC BASE D56F8D744B42 lea r30, ptr [r11+r25*2+0x42] +XDIS 2e308: MISC BASE D56F8D744C43 lea r30, ptr [r12+r25*2+0x43] +XDIS 2e30e: MISC BASE D56F8D744D44 lea r30, ptr [r13+r25*2+0x44] +XDIS 2e314: MISC BASE D56F8D744E45 lea r30, ptr [r14+r25*2+0x45] +XDIS 2e31a: MISC BASE D56F8D744F46 lea r30, ptr [r15+r25*2+0x46] +XDIS 2e320: MISC BASE D57E8D744847 lea r30, ptr [r16+r25*2+0x47] +XDIS 2e326: MISC BASE D57E8D744948 lea r30, ptr [r17+r25*2+0x48] +XDIS 2e32c: MISC BASE D57E8D744A49 lea r30, ptr [r18+r25*2+0x49] +XDIS 2e332: MISC BASE D57E8D744B4A lea r30, ptr [r19+r25*2+0x4a] +XDIS 2e338: MISC BASE D57E8D744C4B lea r30, ptr [r20+r25*2+0x4b] +XDIS 2e33e: MISC BASE D57E8D744D4C lea r30, ptr [r21+r25*2+0x4c] +XDIS 2e344: MISC BASE D57E8D744E4D lea r30, ptr [r22+r25*2+0x4d] +XDIS 2e34a: MISC BASE D57E8D744F4E lea r30, ptr [r23+r25*2+0x4e] +XDIS 2e350: MISC BASE D57F8D74484F lea r30, ptr [r24+r25*2+0x4f] +XDIS 2e356: MISC BASE D57F8D744950 lea r30, ptr [r25+r25*2+0x50] +XDIS 2e35c: MISC BASE D57F8D744A51 lea r30, ptr [r26+r25*2+0x51] +XDIS 2e362: MISC BASE D57F8D744B52 lea r30, ptr [r27+r25*2+0x52] +XDIS 2e368: MISC BASE D57F8D744C53 lea r30, ptr [r28+r25*2+0x53] +XDIS 2e36e: MISC BASE D57F8D744D54 lea r30, ptr [r29+r25*2+0x54] +XDIS 2e374: MISC BASE D57F8D744E55 lea r30, ptr [r30+r25*2+0x55] +XDIS 2e37a: MISC BASE D57F8D744F56 lea r30, ptr [r31+r25*2+0x56] +XDIS 2e380: MISC BASE D56E8D745038 lea r30, ptr [rax+r26*2+0x38] +XDIS 2e386: MISC BASE D56E8D745139 lea r30, ptr [rcx+r26*2+0x39] +XDIS 2e38c: MISC BASE D56E8D74523A lea r30, ptr [rdx+r26*2+0x3a] +XDIS 2e392: MISC BASE D56E8D74533B lea r30, ptr [rbx+r26*2+0x3b] +XDIS 2e398: MISC BASE D56E8D74543C lea r30, ptr [rsp+r26*2+0x3c] +XDIS 2e39e: MISC BASE D56E8D74553D lea r30, ptr [rbp+r26*2+0x3d] +XDIS 2e3a4: MISC BASE D56E8D74563E lea r30, ptr [rsi+r26*2+0x3e] +XDIS 2e3aa: MISC BASE D56E8D74573F lea r30, ptr [rdi+r26*2+0x3f] +XDIS 2e3b0: MISC BASE D56F8D745040 lea r30, ptr [r8+r26*2+0x40] +XDIS 2e3b6: MISC BASE D56F8D745141 lea r30, ptr [r9+r26*2+0x41] +XDIS 2e3bc: MISC BASE D56F8D745242 lea r30, ptr [r10+r26*2+0x42] +XDIS 2e3c2: MISC BASE D56F8D745343 lea r30, ptr [r11+r26*2+0x43] +XDIS 2e3c8: MISC BASE D56F8D745444 lea r30, ptr [r12+r26*2+0x44] +XDIS 2e3ce: MISC BASE D56F8D745545 lea r30, ptr [r13+r26*2+0x45] +XDIS 2e3d4: MISC BASE D56F8D745646 lea r30, ptr [r14+r26*2+0x46] +XDIS 2e3da: MISC BASE D56F8D745747 lea r30, ptr [r15+r26*2+0x47] +XDIS 2e3e0: MISC BASE D57E8D745048 lea r30, ptr [r16+r26*2+0x48] +XDIS 2e3e6: MISC BASE D57E8D745149 lea r30, ptr [r17+r26*2+0x49] +XDIS 2e3ec: MISC BASE D57E8D74524A lea r30, ptr [r18+r26*2+0x4a] +XDIS 2e3f2: MISC BASE D57E8D74534B lea r30, ptr [r19+r26*2+0x4b] +XDIS 2e3f8: MISC BASE D57E8D74544C lea r30, ptr [r20+r26*2+0x4c] +XDIS 2e3fe: MISC BASE D57E8D74554D lea r30, ptr [r21+r26*2+0x4d] +XDIS 2e404: MISC BASE D57E8D74564E lea r30, ptr [r22+r26*2+0x4e] +XDIS 2e40a: MISC BASE D57E8D74574F lea r30, ptr [r23+r26*2+0x4f] +XDIS 2e410: MISC BASE D57F8D745050 lea r30, ptr [r24+r26*2+0x50] +XDIS 2e416: MISC BASE D57F8D745151 lea r30, ptr [r25+r26*2+0x51] +XDIS 2e41c: MISC BASE D57F8D745252 lea r30, ptr [r26+r26*2+0x52] +XDIS 2e422: MISC BASE D57F8D745353 lea r30, ptr [r27+r26*2+0x53] +XDIS 2e428: MISC BASE D57F8D745454 lea r30, ptr [r28+r26*2+0x54] +XDIS 2e42e: MISC BASE D57F8D745555 lea r30, ptr [r29+r26*2+0x55] +XDIS 2e434: MISC BASE D57F8D745656 lea r30, ptr [r30+r26*2+0x56] +XDIS 2e43a: MISC BASE D57F8D745757 lea r30, ptr [r31+r26*2+0x57] +XDIS 2e440: MISC BASE D56E8D745839 lea r30, ptr [rax+r27*2+0x39] +XDIS 2e446: MISC BASE D56E8D74593A lea r30, ptr [rcx+r27*2+0x3a] +XDIS 2e44c: MISC BASE D56E8D745A3B lea r30, ptr [rdx+r27*2+0x3b] +XDIS 2e452: MISC BASE D56E8D745B3C lea r30, ptr [rbx+r27*2+0x3c] +XDIS 2e458: MISC BASE D56E8D745C3D lea r30, ptr [rsp+r27*2+0x3d] +XDIS 2e45e: MISC BASE D56E8D745D3E lea r30, ptr [rbp+r27*2+0x3e] +XDIS 2e464: MISC BASE D56E8D745E3F lea r30, ptr [rsi+r27*2+0x3f] +XDIS 2e46a: MISC BASE D56E8D745F40 lea r30, ptr [rdi+r27*2+0x40] +XDIS 2e470: MISC BASE D56F8D745841 lea r30, ptr [r8+r27*2+0x41] +XDIS 2e476: MISC BASE D56F8D745942 lea r30, ptr [r9+r27*2+0x42] +XDIS 2e47c: MISC BASE D56F8D745A43 lea r30, ptr [r10+r27*2+0x43] +XDIS 2e482: MISC BASE D56F8D745B44 lea r30, ptr [r11+r27*2+0x44] +XDIS 2e488: MISC BASE D56F8D745C45 lea r30, ptr [r12+r27*2+0x45] +XDIS 2e48e: MISC BASE D56F8D745D46 lea r30, ptr [r13+r27*2+0x46] +XDIS 2e494: MISC BASE D56F8D745E47 lea r30, ptr [r14+r27*2+0x47] +XDIS 2e49a: MISC BASE D56F8D745F48 lea r30, ptr [r15+r27*2+0x48] +XDIS 2e4a0: MISC BASE D57E8D745849 lea r30, ptr [r16+r27*2+0x49] +XDIS 2e4a6: MISC BASE D57E8D74594A lea r30, ptr [r17+r27*2+0x4a] +XDIS 2e4ac: MISC BASE D57E8D745A4B lea r30, ptr [r18+r27*2+0x4b] +XDIS 2e4b2: MISC BASE D57E8D745B4C lea r30, ptr [r19+r27*2+0x4c] +XDIS 2e4b8: MISC BASE D57E8D745C4D lea r30, ptr [r20+r27*2+0x4d] +XDIS 2e4be: MISC BASE D57E8D745D4E lea r30, ptr [r21+r27*2+0x4e] +XDIS 2e4c4: MISC BASE D57E8D745E4F lea r30, ptr [r22+r27*2+0x4f] +XDIS 2e4ca: MISC BASE D57E8D745F50 lea r30, ptr [r23+r27*2+0x50] +XDIS 2e4d0: MISC BASE D57F8D745851 lea r30, ptr [r24+r27*2+0x51] +XDIS 2e4d6: MISC BASE D57F8D745952 lea r30, ptr [r25+r27*2+0x52] +XDIS 2e4dc: MISC BASE D57F8D745A53 lea r30, ptr [r26+r27*2+0x53] +XDIS 2e4e2: MISC BASE D57F8D745B54 lea r30, ptr [r27+r27*2+0x54] +XDIS 2e4e8: MISC BASE D57F8D745C55 lea r30, ptr [r28+r27*2+0x55] +XDIS 2e4ee: MISC BASE D57F8D745D56 lea r30, ptr [r29+r27*2+0x56] +XDIS 2e4f4: MISC BASE D57F8D745E57 lea r30, ptr [r30+r27*2+0x57] +XDIS 2e4fa: MISC BASE D57F8D745F58 lea r30, ptr [r31+r27*2+0x58] +XDIS 2e500: MISC BASE D56E8D74603A lea r30, ptr [rax+r28*2+0x3a] +XDIS 2e506: MISC BASE D56E8D74613B lea r30, ptr [rcx+r28*2+0x3b] +XDIS 2e50c: MISC BASE D56E8D74623C lea r30, ptr [rdx+r28*2+0x3c] +XDIS 2e512: MISC BASE D56E8D74633D lea r30, ptr [rbx+r28*2+0x3d] +XDIS 2e518: MISC BASE D56E8D74643E lea r30, ptr [rsp+r28*2+0x3e] +XDIS 2e51e: MISC BASE D56E8D74653F lea r30, ptr [rbp+r28*2+0x3f] +XDIS 2e524: MISC BASE D56E8D746640 lea r30, ptr [rsi+r28*2+0x40] +XDIS 2e52a: MISC BASE D56E8D746741 lea r30, ptr [rdi+r28*2+0x41] +XDIS 2e530: MISC BASE D56F8D746042 lea r30, ptr [r8+r28*2+0x42] +XDIS 2e536: MISC BASE D56F8D746143 lea r30, ptr [r9+r28*2+0x43] +XDIS 2e53c: MISC BASE D56F8D746244 lea r30, ptr [r10+r28*2+0x44] +XDIS 2e542: MISC BASE D56F8D746345 lea r30, ptr [r11+r28*2+0x45] +XDIS 2e548: MISC BASE D56F8D746446 lea r30, ptr [r12+r28*2+0x46] +XDIS 2e54e: MISC BASE D56F8D746547 lea r30, ptr [r13+r28*2+0x47] +XDIS 2e554: MISC BASE D56F8D746648 lea r30, ptr [r14+r28*2+0x48] +XDIS 2e55a: MISC BASE D56F8D746749 lea r30, ptr [r15+r28*2+0x49] +XDIS 2e560: MISC BASE D57E8D74604A lea r30, ptr [r16+r28*2+0x4a] +XDIS 2e566: MISC BASE D57E8D74614B lea r30, ptr [r17+r28*2+0x4b] +XDIS 2e56c: MISC BASE D57E8D74624C lea r30, ptr [r18+r28*2+0x4c] +XDIS 2e572: MISC BASE D57E8D74634D lea r30, ptr [r19+r28*2+0x4d] +XDIS 2e578: MISC BASE D57E8D74644E lea r30, ptr [r20+r28*2+0x4e] +XDIS 2e57e: MISC BASE D57E8D74654F lea r30, ptr [r21+r28*2+0x4f] +XDIS 2e584: MISC BASE D57E8D746650 lea r30, ptr [r22+r28*2+0x50] +XDIS 2e58a: MISC BASE D57E8D746751 lea r30, ptr [r23+r28*2+0x51] +XDIS 2e590: MISC BASE D57F8D746052 lea r30, ptr [r24+r28*2+0x52] +XDIS 2e596: MISC BASE D57F8D746153 lea r30, ptr [r25+r28*2+0x53] +XDIS 2e59c: MISC BASE D57F8D746254 lea r30, ptr [r26+r28*2+0x54] +XDIS 2e5a2: MISC BASE D57F8D746355 lea r30, ptr [r27+r28*2+0x55] +XDIS 2e5a8: MISC BASE D57F8D746456 lea r30, ptr [r28+r28*2+0x56] +XDIS 2e5ae: MISC BASE D57F8D746557 lea r30, ptr [r29+r28*2+0x57] +XDIS 2e5b4: MISC BASE D57F8D746658 lea r30, ptr [r30+r28*2+0x58] +XDIS 2e5ba: MISC BASE D57F8D746759 lea r30, ptr [r31+r28*2+0x59] +XDIS 2e5c0: MISC BASE D56E8D74683B lea r30, ptr [rax+r29*2+0x3b] +XDIS 2e5c6: MISC BASE D56E8D74693C lea r30, ptr [rcx+r29*2+0x3c] +XDIS 2e5cc: MISC BASE D56E8D746A3D lea r30, ptr [rdx+r29*2+0x3d] +XDIS 2e5d2: MISC BASE D56E8D746B3E lea r30, ptr [rbx+r29*2+0x3e] +XDIS 2e5d8: MISC BASE D56E8D746C3F lea r30, ptr [rsp+r29*2+0x3f] +XDIS 2e5de: MISC BASE D56E8D746D40 lea r30, ptr [rbp+r29*2+0x40] +XDIS 2e5e4: MISC BASE D56E8D746E41 lea r30, ptr [rsi+r29*2+0x41] +XDIS 2e5ea: MISC BASE D56E8D746F42 lea r30, ptr [rdi+r29*2+0x42] +XDIS 2e5f0: MISC BASE D56F8D746843 lea r30, ptr [r8+r29*2+0x43] +XDIS 2e5f6: MISC BASE D56F8D746944 lea r30, ptr [r9+r29*2+0x44] +XDIS 2e5fc: MISC BASE D56F8D746A45 lea r30, ptr [r10+r29*2+0x45] +XDIS 2e602: MISC BASE D56F8D746B46 lea r30, ptr [r11+r29*2+0x46] +XDIS 2e608: MISC BASE D56F8D746C47 lea r30, ptr [r12+r29*2+0x47] +XDIS 2e60e: MISC BASE D56F8D746D48 lea r30, ptr [r13+r29*2+0x48] +XDIS 2e614: MISC BASE D56F8D746E49 lea r30, ptr [r14+r29*2+0x49] +XDIS 2e61a: MISC BASE D56F8D746F4A lea r30, ptr [r15+r29*2+0x4a] +XDIS 2e620: MISC BASE D57E8D74684B lea r30, ptr [r16+r29*2+0x4b] +XDIS 2e626: MISC BASE D57E8D74694C lea r30, ptr [r17+r29*2+0x4c] +XDIS 2e62c: MISC BASE D57E8D746A4D lea r30, ptr [r18+r29*2+0x4d] +XDIS 2e632: MISC BASE D57E8D746B4E lea r30, ptr [r19+r29*2+0x4e] +XDIS 2e638: MISC BASE D57E8D746C4F lea r30, ptr [r20+r29*2+0x4f] +XDIS 2e63e: MISC BASE D57E8D746D50 lea r30, ptr [r21+r29*2+0x50] +XDIS 2e644: MISC BASE D57E8D746E51 lea r30, ptr [r22+r29*2+0x51] +XDIS 2e64a: MISC BASE D57E8D746F52 lea r30, ptr [r23+r29*2+0x52] +XDIS 2e650: MISC BASE D57F8D746853 lea r30, ptr [r24+r29*2+0x53] +XDIS 2e656: MISC BASE D57F8D746954 lea r30, ptr [r25+r29*2+0x54] +XDIS 2e65c: MISC BASE D57F8D746A55 lea r30, ptr [r26+r29*2+0x55] +XDIS 2e662: MISC BASE D57F8D746B56 lea r30, ptr [r27+r29*2+0x56] +XDIS 2e668: MISC BASE D57F8D746C57 lea r30, ptr [r28+r29*2+0x57] +XDIS 2e66e: MISC BASE D57F8D746D58 lea r30, ptr [r29+r29*2+0x58] +XDIS 2e674: MISC BASE D57F8D746E59 lea r30, ptr [r30+r29*2+0x59] +XDIS 2e67a: MISC BASE D57F8D746F5A lea r30, ptr [r31+r29*2+0x5a] +XDIS 2e680: MISC BASE D56E8D74703C lea r30, ptr [rax+r30*2+0x3c] +XDIS 2e686: MISC BASE D56E8D74713D lea r30, ptr [rcx+r30*2+0x3d] +XDIS 2e68c: MISC BASE D56E8D74723E lea r30, ptr [rdx+r30*2+0x3e] +XDIS 2e692: MISC BASE D56E8D74733F lea r30, ptr [rbx+r30*2+0x3f] +XDIS 2e698: MISC BASE D56E8D747440 lea r30, ptr [rsp+r30*2+0x40] +XDIS 2e69e: MISC BASE D56E8D747541 lea r30, ptr [rbp+r30*2+0x41] +XDIS 2e6a4: MISC BASE D56E8D747642 lea r30, ptr [rsi+r30*2+0x42] +XDIS 2e6aa: MISC BASE D56E8D747743 lea r30, ptr [rdi+r30*2+0x43] +XDIS 2e6b0: MISC BASE D56F8D747044 lea r30, ptr [r8+r30*2+0x44] +XDIS 2e6b6: MISC BASE D56F8D747145 lea r30, ptr [r9+r30*2+0x45] +XDIS 2e6bc: MISC BASE D56F8D747246 lea r30, ptr [r10+r30*2+0x46] +XDIS 2e6c2: MISC BASE D56F8D747347 lea r30, ptr [r11+r30*2+0x47] +XDIS 2e6c8: MISC BASE D56F8D747448 lea r30, ptr [r12+r30*2+0x48] +XDIS 2e6ce: MISC BASE D56F8D747549 lea r30, ptr [r13+r30*2+0x49] +XDIS 2e6d4: MISC BASE D56F8D74764A lea r30, ptr [r14+r30*2+0x4a] +XDIS 2e6da: MISC BASE D56F8D74774B lea r30, ptr [r15+r30*2+0x4b] +XDIS 2e6e0: MISC BASE D57E8D74704C lea r30, ptr [r16+r30*2+0x4c] +XDIS 2e6e6: MISC BASE D57E8D74714D lea r30, ptr [r17+r30*2+0x4d] +XDIS 2e6ec: MISC BASE D57E8D74724E lea r30, ptr [r18+r30*2+0x4e] +XDIS 2e6f2: MISC BASE D57E8D74734F lea r30, ptr [r19+r30*2+0x4f] +XDIS 2e6f8: MISC BASE D57E8D747450 lea r30, ptr [r20+r30*2+0x50] +XDIS 2e6fe: MISC BASE D57E8D747551 lea r30, ptr [r21+r30*2+0x51] +XDIS 2e704: MISC BASE D57E8D747652 lea r30, ptr [r22+r30*2+0x52] +XDIS 2e70a: MISC BASE D57E8D747753 lea r30, ptr [r23+r30*2+0x53] +XDIS 2e710: MISC BASE D57F8D747054 lea r30, ptr [r24+r30*2+0x54] +XDIS 2e716: MISC BASE D57F8D747155 lea r30, ptr [r25+r30*2+0x55] +XDIS 2e71c: MISC BASE D57F8D747256 lea r30, ptr [r26+r30*2+0x56] +XDIS 2e722: MISC BASE D57F8D747357 lea r30, ptr [r27+r30*2+0x57] +XDIS 2e728: MISC BASE D57F8D747458 lea r30, ptr [r28+r30*2+0x58] +XDIS 2e72e: MISC BASE D57F8D747559 lea r30, ptr [r29+r30*2+0x59] +XDIS 2e734: MISC BASE D57F8D74765A lea r30, ptr [r30+r30*2+0x5a] +XDIS 2e73a: MISC BASE D57F8D74775B lea r30, ptr [r31+r30*2+0x5b] +XDIS 2e740: MISC BASE D56E8D74783D lea r30, ptr [rax+r31*2+0x3d] +XDIS 2e746: MISC BASE D56E8D74793E lea r30, ptr [rcx+r31*2+0x3e] +XDIS 2e74c: MISC BASE D56E8D747A3F lea r30, ptr [rdx+r31*2+0x3f] +XDIS 2e752: MISC BASE D56E8D747B40 lea r30, ptr [rbx+r31*2+0x40] +XDIS 2e758: MISC BASE D56E8D747C41 lea r30, ptr [rsp+r31*2+0x41] +XDIS 2e75e: MISC BASE D56E8D747D42 lea r30, ptr [rbp+r31*2+0x42] +XDIS 2e764: MISC BASE D56E8D747E43 lea r30, ptr [rsi+r31*2+0x43] +XDIS 2e76a: MISC BASE D56E8D747F44 lea r30, ptr [rdi+r31*2+0x44] +XDIS 2e770: MISC BASE D56F8D747845 lea r30, ptr [r8+r31*2+0x45] +XDIS 2e776: MISC BASE D56F8D747946 lea r30, ptr [r9+r31*2+0x46] +XDIS 2e77c: MISC BASE D56F8D747A47 lea r30, ptr [r10+r31*2+0x47] +XDIS 2e782: MISC BASE D56F8D747B48 lea r30, ptr [r11+r31*2+0x48] +XDIS 2e788: MISC BASE D56F8D747C49 lea r30, ptr [r12+r31*2+0x49] +XDIS 2e78e: MISC BASE D56F8D747D4A lea r30, ptr [r13+r31*2+0x4a] +XDIS 2e794: MISC BASE D56F8D747E4B lea r30, ptr [r14+r31*2+0x4b] +XDIS 2e79a: MISC BASE D56F8D747F4C lea r30, ptr [r15+r31*2+0x4c] +XDIS 2e7a0: MISC BASE D57E8D74784D lea r30, ptr [r16+r31*2+0x4d] +XDIS 2e7a6: MISC BASE D57E8D74794E lea r30, ptr [r17+r31*2+0x4e] +XDIS 2e7ac: MISC BASE D57E8D747A4F lea r30, ptr [r18+r31*2+0x4f] +XDIS 2e7b2: MISC BASE D57E8D747B50 lea r30, ptr [r19+r31*2+0x50] +XDIS 2e7b8: MISC BASE D57E8D747C51 lea r30, ptr [r20+r31*2+0x51] +XDIS 2e7be: MISC BASE D57E8D747D52 lea r30, ptr [r21+r31*2+0x52] +XDIS 2e7c4: MISC BASE D57E8D747E53 lea r30, ptr [r22+r31*2+0x53] +XDIS 2e7ca: MISC BASE D57E8D747F54 lea r30, ptr [r23+r31*2+0x54] +XDIS 2e7d0: MISC BASE D57F8D747855 lea r30, ptr [r24+r31*2+0x55] +XDIS 2e7d6: MISC BASE D57F8D747956 lea r30, ptr [r25+r31*2+0x56] +XDIS 2e7dc: MISC BASE D57F8D747A57 lea r30, ptr [r26+r31*2+0x57] +XDIS 2e7e2: MISC BASE D57F8D747B58 lea r30, ptr [r27+r31*2+0x58] +XDIS 2e7e8: MISC BASE D57F8D747C59 lea r30, ptr [r28+r31*2+0x59] +XDIS 2e7ee: MISC BASE D57F8D747D5A lea r30, ptr [r29+r31*2+0x5a] +XDIS 2e7f4: MISC BASE D57F8D747E5B lea r30, ptr [r30+r31*2+0x5b] +XDIS 2e7fa: MISC BASE D57F8D747F5C lea r30, ptr [r31+r31*2+0x5c] +XDIS 2e800: MISC BASE D54C8D7C401F lea r31, ptr [rax+rax*2+0x1f] +XDIS 2e806: MISC BASE D54C8D7C4120 lea r31, ptr [rcx+rax*2+0x20] +XDIS 2e80c: MISC BASE D54C8D7C4221 lea r31, ptr [rdx+rax*2+0x21] +XDIS 2e812: MISC BASE D54C8D7C4322 lea r31, ptr [rbx+rax*2+0x22] +XDIS 2e818: MISC BASE D54C8D7C4423 lea r31, ptr [rsp+rax*2+0x23] +XDIS 2e81e: MISC BASE D54C8D7C4524 lea r31, ptr [rbp+rax*2+0x24] +XDIS 2e824: MISC BASE D54C8D7C4625 lea r31, ptr [rsi+rax*2+0x25] +XDIS 2e82a: MISC BASE D54C8D7C4726 lea r31, ptr [rdi+rax*2+0x26] +XDIS 2e830: MISC BASE D54D8D7C4027 lea r31, ptr [r8+rax*2+0x27] +XDIS 2e836: MISC BASE D54D8D7C4128 lea r31, ptr [r9+rax*2+0x28] +XDIS 2e83c: MISC BASE D54D8D7C4229 lea r31, ptr [r10+rax*2+0x29] +XDIS 2e842: MISC BASE D54D8D7C432A lea r31, ptr [r11+rax*2+0x2a] +XDIS 2e848: MISC BASE D54D8D7C442B lea r31, ptr [r12+rax*2+0x2b] +XDIS 2e84e: MISC BASE D54D8D7C452C lea r31, ptr [r13+rax*2+0x2c] +XDIS 2e854: MISC BASE D54D8D7C462D lea r31, ptr [r14+rax*2+0x2d] +XDIS 2e85a: MISC BASE D54D8D7C472E lea r31, ptr [r15+rax*2+0x2e] +XDIS 2e860: MISC BASE D55C8D7C402F lea r31, ptr [r16+rax*2+0x2f] +XDIS 2e866: MISC BASE D55C8D7C4130 lea r31, ptr [r17+rax*2+0x30] +XDIS 2e86c: MISC BASE D55C8D7C4231 lea r31, ptr [r18+rax*2+0x31] +XDIS 2e872: MISC BASE D55C8D7C4332 lea r31, ptr [r19+rax*2+0x32] +XDIS 2e878: MISC BASE D55C8D7C4433 lea r31, ptr [r20+rax*2+0x33] +XDIS 2e87e: MISC BASE D55C8D7C4534 lea r31, ptr [r21+rax*2+0x34] +XDIS 2e884: MISC BASE D55C8D7C4635 lea r31, ptr [r22+rax*2+0x35] +XDIS 2e88a: MISC BASE D55C8D7C4736 lea r31, ptr [r23+rax*2+0x36] +XDIS 2e890: MISC BASE D55D8D7C4037 lea r31, ptr [r24+rax*2+0x37] +XDIS 2e896: MISC BASE D55D8D7C4138 lea r31, ptr [r25+rax*2+0x38] +XDIS 2e89c: MISC BASE D55D8D7C4239 lea r31, ptr [r26+rax*2+0x39] +XDIS 2e8a2: MISC BASE D55D8D7C433A lea r31, ptr [r27+rax*2+0x3a] +XDIS 2e8a8: MISC BASE D55D8D7C443B lea r31, ptr [r28+rax*2+0x3b] +XDIS 2e8ae: MISC BASE D55D8D7C453C lea r31, ptr [r29+rax*2+0x3c] +XDIS 2e8b4: MISC BASE D55D8D7C463D lea r31, ptr [r30+rax*2+0x3d] +XDIS 2e8ba: MISC BASE D55D8D7C473E lea r31, ptr [r31+rax*2+0x3e] +XDIS 2e8c0: MISC BASE D54C8D7C4820 lea r31, ptr [rax+rcx*2+0x20] +XDIS 2e8c6: MISC BASE D54C8D7C4921 lea r31, ptr [rcx+rcx*2+0x21] +XDIS 2e8cc: MISC BASE D54C8D7C4A22 lea r31, ptr [rdx+rcx*2+0x22] +XDIS 2e8d2: MISC BASE D54C8D7C4B23 lea r31, ptr [rbx+rcx*2+0x23] +XDIS 2e8d8: MISC BASE D54C8D7C4C24 lea r31, ptr [rsp+rcx*2+0x24] +XDIS 2e8de: MISC BASE D54C8D7C4D25 lea r31, ptr [rbp+rcx*2+0x25] +XDIS 2e8e4: MISC BASE D54C8D7C4E26 lea r31, ptr [rsi+rcx*2+0x26] +XDIS 2e8ea: MISC BASE D54C8D7C4F27 lea r31, ptr [rdi+rcx*2+0x27] +XDIS 2e8f0: MISC BASE D54D8D7C4828 lea r31, ptr [r8+rcx*2+0x28] +XDIS 2e8f6: MISC BASE D54D8D7C4929 lea r31, ptr [r9+rcx*2+0x29] +XDIS 2e8fc: MISC BASE D54D8D7C4A2A lea r31, ptr [r10+rcx*2+0x2a] +XDIS 2e902: MISC BASE D54D8D7C4B2B lea r31, ptr [r11+rcx*2+0x2b] +XDIS 2e908: MISC BASE D54D8D7C4C2C lea r31, ptr [r12+rcx*2+0x2c] +XDIS 2e90e: MISC BASE D54D8D7C4D2D lea r31, ptr [r13+rcx*2+0x2d] +XDIS 2e914: MISC BASE D54D8D7C4E2E lea r31, ptr [r14+rcx*2+0x2e] +XDIS 2e91a: MISC BASE D54D8D7C4F2F lea r31, ptr [r15+rcx*2+0x2f] +XDIS 2e920: MISC BASE D55C8D7C4830 lea r31, ptr [r16+rcx*2+0x30] +XDIS 2e926: MISC BASE D55C8D7C4931 lea r31, ptr [r17+rcx*2+0x31] +XDIS 2e92c: MISC BASE D55C8D7C4A32 lea r31, ptr [r18+rcx*2+0x32] +XDIS 2e932: MISC BASE D55C8D7C4B33 lea r31, ptr [r19+rcx*2+0x33] +XDIS 2e938: MISC BASE D55C8D7C4C34 lea r31, ptr [r20+rcx*2+0x34] +XDIS 2e93e: MISC BASE D55C8D7C4D35 lea r31, ptr [r21+rcx*2+0x35] +XDIS 2e944: MISC BASE D55C8D7C4E36 lea r31, ptr [r22+rcx*2+0x36] +XDIS 2e94a: MISC BASE D55C8D7C4F37 lea r31, ptr [r23+rcx*2+0x37] +XDIS 2e950: MISC BASE D55D8D7C4838 lea r31, ptr [r24+rcx*2+0x38] +XDIS 2e956: MISC BASE D55D8D7C4939 lea r31, ptr [r25+rcx*2+0x39] +XDIS 2e95c: MISC BASE D55D8D7C4A3A lea r31, ptr [r26+rcx*2+0x3a] +XDIS 2e962: MISC BASE D55D8D7C4B3B lea r31, ptr [r27+rcx*2+0x3b] +XDIS 2e968: MISC BASE D55D8D7C4C3C lea r31, ptr [r28+rcx*2+0x3c] +XDIS 2e96e: MISC BASE D55D8D7C4D3D lea r31, ptr [r29+rcx*2+0x3d] +XDIS 2e974: MISC BASE D55D8D7C4E3E lea r31, ptr [r30+rcx*2+0x3e] +XDIS 2e97a: MISC BASE D55D8D7C4F3F lea r31, ptr [r31+rcx*2+0x3f] +XDIS 2e980: MISC BASE D54C8D7C5021 lea r31, ptr [rax+rdx*2+0x21] +XDIS 2e986: MISC BASE D54C8D7C5122 lea r31, ptr [rcx+rdx*2+0x22] +XDIS 2e98c: MISC BASE D54C8D7C5223 lea r31, ptr [rdx+rdx*2+0x23] +XDIS 2e992: MISC BASE D54C8D7C5324 lea r31, ptr [rbx+rdx*2+0x24] +XDIS 2e998: MISC BASE D54C8D7C5425 lea r31, ptr [rsp+rdx*2+0x25] +XDIS 2e99e: MISC BASE D54C8D7C5526 lea r31, ptr [rbp+rdx*2+0x26] +XDIS 2e9a4: MISC BASE D54C8D7C5627 lea r31, ptr [rsi+rdx*2+0x27] +XDIS 2e9aa: MISC BASE D54C8D7C5728 lea r31, ptr [rdi+rdx*2+0x28] +XDIS 2e9b0: MISC BASE D54D8D7C5029 lea r31, ptr [r8+rdx*2+0x29] +XDIS 2e9b6: MISC BASE D54D8D7C512A lea r31, ptr [r9+rdx*2+0x2a] +XDIS 2e9bc: MISC BASE D54D8D7C522B lea r31, ptr [r10+rdx*2+0x2b] +XDIS 2e9c2: MISC BASE D54D8D7C532C lea r31, ptr [r11+rdx*2+0x2c] +XDIS 2e9c8: MISC BASE D54D8D7C542D lea r31, ptr [r12+rdx*2+0x2d] +XDIS 2e9ce: MISC BASE D54D8D7C552E lea r31, ptr [r13+rdx*2+0x2e] +XDIS 2e9d4: MISC BASE D54D8D7C562F lea r31, ptr [r14+rdx*2+0x2f] +XDIS 2e9da: MISC BASE D54D8D7C5730 lea r31, ptr [r15+rdx*2+0x30] +XDIS 2e9e0: MISC BASE D55C8D7C5031 lea r31, ptr [r16+rdx*2+0x31] +XDIS 2e9e6: MISC BASE D55C8D7C5132 lea r31, ptr [r17+rdx*2+0x32] +XDIS 2e9ec: MISC BASE D55C8D7C5233 lea r31, ptr [r18+rdx*2+0x33] +XDIS 2e9f2: MISC BASE D55C8D7C5334 lea r31, ptr [r19+rdx*2+0x34] +XDIS 2e9f8: MISC BASE D55C8D7C5435 lea r31, ptr [r20+rdx*2+0x35] +XDIS 2e9fe: MISC BASE D55C8D7C5536 lea r31, ptr [r21+rdx*2+0x36] +XDIS 2ea04: MISC BASE D55C8D7C5637 lea r31, ptr [r22+rdx*2+0x37] +XDIS 2ea0a: MISC BASE D55C8D7C5738 lea r31, ptr [r23+rdx*2+0x38] +XDIS 2ea10: MISC BASE D55D8D7C5039 lea r31, ptr [r24+rdx*2+0x39] +XDIS 2ea16: MISC BASE D55D8D7C513A lea r31, ptr [r25+rdx*2+0x3a] +XDIS 2ea1c: MISC BASE D55D8D7C523B lea r31, ptr [r26+rdx*2+0x3b] +XDIS 2ea22: MISC BASE D55D8D7C533C lea r31, ptr [r27+rdx*2+0x3c] +XDIS 2ea28: MISC BASE D55D8D7C543D lea r31, ptr [r28+rdx*2+0x3d] +XDIS 2ea2e: MISC BASE D55D8D7C553E lea r31, ptr [r29+rdx*2+0x3e] +XDIS 2ea34: MISC BASE D55D8D7C563F lea r31, ptr [r30+rdx*2+0x3f] +XDIS 2ea3a: MISC BASE D55D8D7C5740 lea r31, ptr [r31+rdx*2+0x40] +XDIS 2ea40: MISC BASE D54C8D7C5822 lea r31, ptr [rax+rbx*2+0x22] +XDIS 2ea46: MISC BASE D54C8D7C5923 lea r31, ptr [rcx+rbx*2+0x23] +XDIS 2ea4c: MISC BASE D54C8D7C5A24 lea r31, ptr [rdx+rbx*2+0x24] +XDIS 2ea52: MISC BASE D54C8D7C5B25 lea r31, ptr [rbx+rbx*2+0x25] +XDIS 2ea58: MISC BASE D54C8D7C5C26 lea r31, ptr [rsp+rbx*2+0x26] +XDIS 2ea5e: MISC BASE D54C8D7C5D27 lea r31, ptr [rbp+rbx*2+0x27] +XDIS 2ea64: MISC BASE D54C8D7C5E28 lea r31, ptr [rsi+rbx*2+0x28] +XDIS 2ea6a: MISC BASE D54C8D7C5F29 lea r31, ptr [rdi+rbx*2+0x29] +XDIS 2ea70: MISC BASE D54D8D7C582A lea r31, ptr [r8+rbx*2+0x2a] +XDIS 2ea76: MISC BASE D54D8D7C592B lea r31, ptr [r9+rbx*2+0x2b] +XDIS 2ea7c: MISC BASE D54D8D7C5A2C lea r31, ptr [r10+rbx*2+0x2c] +XDIS 2ea82: MISC BASE D54D8D7C5B2D lea r31, ptr [r11+rbx*2+0x2d] +XDIS 2ea88: MISC BASE D54D8D7C5C2E lea r31, ptr [r12+rbx*2+0x2e] +XDIS 2ea8e: MISC BASE D54D8D7C5D2F lea r31, ptr [r13+rbx*2+0x2f] +XDIS 2ea94: MISC BASE D54D8D7C5E30 lea r31, ptr [r14+rbx*2+0x30] +XDIS 2ea9a: MISC BASE D54D8D7C5F31 lea r31, ptr [r15+rbx*2+0x31] +XDIS 2eaa0: MISC BASE D55C8D7C5832 lea r31, ptr [r16+rbx*2+0x32] +XDIS 2eaa6: MISC BASE D55C8D7C5933 lea r31, ptr [r17+rbx*2+0x33] +XDIS 2eaac: MISC BASE D55C8D7C5A34 lea r31, ptr [r18+rbx*2+0x34] +XDIS 2eab2: MISC BASE D55C8D7C5B35 lea r31, ptr [r19+rbx*2+0x35] +XDIS 2eab8: MISC BASE D55C8D7C5C36 lea r31, ptr [r20+rbx*2+0x36] +XDIS 2eabe: MISC BASE D55C8D7C5D37 lea r31, ptr [r21+rbx*2+0x37] +XDIS 2eac4: MISC BASE D55C8D7C5E38 lea r31, ptr [r22+rbx*2+0x38] +XDIS 2eaca: MISC BASE D55C8D7C5F39 lea r31, ptr [r23+rbx*2+0x39] +XDIS 2ead0: MISC BASE D55D8D7C583A lea r31, ptr [r24+rbx*2+0x3a] +XDIS 2ead6: MISC BASE D55D8D7C593B lea r31, ptr [r25+rbx*2+0x3b] +XDIS 2eadc: MISC BASE D55D8D7C5A3C lea r31, ptr [r26+rbx*2+0x3c] +XDIS 2eae2: MISC BASE D55D8D7C5B3D lea r31, ptr [r27+rbx*2+0x3d] +XDIS 2eae8: MISC BASE D55D8D7C5C3E lea r31, ptr [r28+rbx*2+0x3e] +XDIS 2eaee: MISC BASE D55D8D7C5D3F lea r31, ptr [r29+rbx*2+0x3f] +XDIS 2eaf4: MISC BASE D55D8D7C5E40 lea r31, ptr [r30+rbx*2+0x40] +XDIS 2eafa: MISC BASE D55D8D7C5F41 lea r31, ptr [r31+rbx*2+0x41] +XDIS 2eb00: MISC BASE D54C8D7C6023 lea r31, ptr [rax+0x23] +XDIS 2eb06: MISC BASE D54C8D7C6124 lea r31, ptr [rcx+0x24] +XDIS 2eb0c: MISC BASE D54C8D7C6225 lea r31, ptr [rdx+0x25] +XDIS 2eb12: MISC BASE D54C8D7C6326 lea r31, ptr [rbx+0x26] +XDIS 2eb18: MISC BASE D54C8D7C6427 lea r31, ptr [rsp+0x27] +XDIS 2eb1e: MISC BASE D54C8D7C6528 lea r31, ptr [rbp+0x28] +XDIS 2eb24: MISC BASE D54C8D7C6629 lea r31, ptr [rsi+0x29] +XDIS 2eb2a: MISC BASE D54C8D7C672A lea r31, ptr [rdi+0x2a] +XDIS 2eb30: MISC BASE D54D8D7C602B lea r31, ptr [r8+0x2b] +XDIS 2eb36: MISC BASE D54D8D7C612C lea r31, ptr [r9+0x2c] +XDIS 2eb3c: MISC BASE D54D8D7C622D lea r31, ptr [r10+0x2d] +XDIS 2eb42: MISC BASE D54D8D7C632E lea r31, ptr [r11+0x2e] +XDIS 2eb48: MISC BASE D54D8D7C642F lea r31, ptr [r12+0x2f] +XDIS 2eb4e: MISC BASE D54D8D7C6530 lea r31, ptr [r13+0x30] +XDIS 2eb54: MISC BASE D54D8D7C6631 lea r31, ptr [r14+0x31] +XDIS 2eb5a: MISC BASE D54D8D7C6732 lea r31, ptr [r15+0x32] +XDIS 2eb60: MISC BASE D55C8D7C6033 lea r31, ptr [r16+0x33] +XDIS 2eb66: MISC BASE D55C8D7C6134 lea r31, ptr [r17+0x34] +XDIS 2eb6c: MISC BASE D55C8D7C6235 lea r31, ptr [r18+0x35] +XDIS 2eb72: MISC BASE D55C8D7C6336 lea r31, ptr [r19+0x36] +XDIS 2eb78: MISC BASE D55C8D7C6437 lea r31, ptr [r20+0x37] +XDIS 2eb7e: MISC BASE D55C8D7C6538 lea r31, ptr [r21+0x38] +XDIS 2eb84: MISC BASE D55C8D7C6639 lea r31, ptr [r22+0x39] +XDIS 2eb8a: MISC BASE D55C8D7C673A lea r31, ptr [r23+0x3a] +XDIS 2eb90: MISC BASE D55D8D7C603B lea r31, ptr [r24+0x3b] +XDIS 2eb96: MISC BASE D55D8D7C613C lea r31, ptr [r25+0x3c] +XDIS 2eb9c: MISC BASE D55D8D7C623D lea r31, ptr [r26+0x3d] +XDIS 2eba2: MISC BASE D55D8D7C633E lea r31, ptr [r27+0x3e] +XDIS 2eba8: MISC BASE D55D8D7C643F lea r31, ptr [r28+0x3f] +XDIS 2ebae: MISC BASE D55D8D7C6540 lea r31, ptr [r29+0x40] +XDIS 2ebb4: MISC BASE D55D8D7C6641 lea r31, ptr [r30+0x41] +XDIS 2ebba: MISC BASE D55D8D7C6742 lea r31, ptr [r31+0x42] +XDIS 2ebc0: MISC BASE D54C8D7C6824 lea r31, ptr [rax+rbp*2+0x24] +XDIS 2ebc6: MISC BASE D54C8D7C6925 lea r31, ptr [rcx+rbp*2+0x25] +XDIS 2ebcc: MISC BASE D54C8D7C6A26 lea r31, ptr [rdx+rbp*2+0x26] +XDIS 2ebd2: MISC BASE D54C8D7C6B27 lea r31, ptr [rbx+rbp*2+0x27] +XDIS 2ebd8: MISC BASE D54C8D7C6C28 lea r31, ptr [rsp+rbp*2+0x28] +XDIS 2ebde: MISC BASE D54C8D7C6D29 lea r31, ptr [rbp+rbp*2+0x29] +XDIS 2ebe4: MISC BASE D54C8D7C6E2A lea r31, ptr [rsi+rbp*2+0x2a] +XDIS 2ebea: MISC BASE D54C8D7C6F2B lea r31, ptr [rdi+rbp*2+0x2b] +XDIS 2ebf0: MISC BASE D54D8D7C682C lea r31, ptr [r8+rbp*2+0x2c] +XDIS 2ebf6: MISC BASE D54D8D7C692D lea r31, ptr [r9+rbp*2+0x2d] +XDIS 2ebfc: MISC BASE D54D8D7C6A2E lea r31, ptr [r10+rbp*2+0x2e] +XDIS 2ec02: MISC BASE D54D8D7C6B2F lea r31, ptr [r11+rbp*2+0x2f] +XDIS 2ec08: MISC BASE D54D8D7C6C30 lea r31, ptr [r12+rbp*2+0x30] +XDIS 2ec0e: MISC BASE D54D8D7C6D31 lea r31, ptr [r13+rbp*2+0x31] +XDIS 2ec14: MISC BASE D54D8D7C6E32 lea r31, ptr [r14+rbp*2+0x32] +XDIS 2ec1a: MISC BASE D54D8D7C6F33 lea r31, ptr [r15+rbp*2+0x33] +XDIS 2ec20: MISC BASE D55C8D7C6834 lea r31, ptr [r16+rbp*2+0x34] +XDIS 2ec26: MISC BASE D55C8D7C6935 lea r31, ptr [r17+rbp*2+0x35] +XDIS 2ec2c: MISC BASE D55C8D7C6A36 lea r31, ptr [r18+rbp*2+0x36] +XDIS 2ec32: MISC BASE D55C8D7C6B37 lea r31, ptr [r19+rbp*2+0x37] +XDIS 2ec38: MISC BASE D55C8D7C6C38 lea r31, ptr [r20+rbp*2+0x38] +XDIS 2ec3e: MISC BASE D55C8D7C6D39 lea r31, ptr [r21+rbp*2+0x39] +XDIS 2ec44: MISC BASE D55C8D7C6E3A lea r31, ptr [r22+rbp*2+0x3a] +XDIS 2ec4a: MISC BASE D55C8D7C6F3B lea r31, ptr [r23+rbp*2+0x3b] +XDIS 2ec50: MISC BASE D55D8D7C683C lea r31, ptr [r24+rbp*2+0x3c] +XDIS 2ec56: MISC BASE D55D8D7C693D lea r31, ptr [r25+rbp*2+0x3d] +XDIS 2ec5c: MISC BASE D55D8D7C6A3E lea r31, ptr [r26+rbp*2+0x3e] +XDIS 2ec62: MISC BASE D55D8D7C6B3F lea r31, ptr [r27+rbp*2+0x3f] +XDIS 2ec68: MISC BASE D55D8D7C6C40 lea r31, ptr [r28+rbp*2+0x40] +XDIS 2ec6e: MISC BASE D55D8D7C6D41 lea r31, ptr [r29+rbp*2+0x41] +XDIS 2ec74: MISC BASE D55D8D7C6E42 lea r31, ptr [r30+rbp*2+0x42] +XDIS 2ec7a: MISC BASE D55D8D7C6F43 lea r31, ptr [r31+rbp*2+0x43] +XDIS 2ec80: MISC BASE D54C8D7C7025 lea r31, ptr [rax+rsi*2+0x25] +XDIS 2ec86: MISC BASE D54C8D7C7126 lea r31, ptr [rcx+rsi*2+0x26] +XDIS 2ec8c: MISC BASE D54C8D7C7227 lea r31, ptr [rdx+rsi*2+0x27] +XDIS 2ec92: MISC BASE D54C8D7C7328 lea r31, ptr [rbx+rsi*2+0x28] +XDIS 2ec98: MISC BASE D54C8D7C7429 lea r31, ptr [rsp+rsi*2+0x29] +XDIS 2ec9e: MISC BASE D54C8D7C752A lea r31, ptr [rbp+rsi*2+0x2a] +XDIS 2eca4: MISC BASE D54C8D7C762B lea r31, ptr [rsi+rsi*2+0x2b] +XDIS 2ecaa: MISC BASE D54C8D7C772C lea r31, ptr [rdi+rsi*2+0x2c] +XDIS 2ecb0: MISC BASE D54D8D7C702D lea r31, ptr [r8+rsi*2+0x2d] +XDIS 2ecb6: MISC BASE D54D8D7C712E lea r31, ptr [r9+rsi*2+0x2e] +XDIS 2ecbc: MISC BASE D54D8D7C722F lea r31, ptr [r10+rsi*2+0x2f] +XDIS 2ecc2: MISC BASE D54D8D7C7330 lea r31, ptr [r11+rsi*2+0x30] +XDIS 2ecc8: MISC BASE D54D8D7C7431 lea r31, ptr [r12+rsi*2+0x31] +XDIS 2ecce: MISC BASE D54D8D7C7532 lea r31, ptr [r13+rsi*2+0x32] +XDIS 2ecd4: MISC BASE D54D8D7C7633 lea r31, ptr [r14+rsi*2+0x33] +XDIS 2ecda: MISC BASE D54D8D7C7734 lea r31, ptr [r15+rsi*2+0x34] +XDIS 2ece0: MISC BASE D55C8D7C7035 lea r31, ptr [r16+rsi*2+0x35] +XDIS 2ece6: MISC BASE D55C8D7C7136 lea r31, ptr [r17+rsi*2+0x36] +XDIS 2ecec: MISC BASE D55C8D7C7237 lea r31, ptr [r18+rsi*2+0x37] +XDIS 2ecf2: MISC BASE D55C8D7C7338 lea r31, ptr [r19+rsi*2+0x38] +XDIS 2ecf8: MISC BASE D55C8D7C7439 lea r31, ptr [r20+rsi*2+0x39] +XDIS 2ecfe: MISC BASE D55C8D7C753A lea r31, ptr [r21+rsi*2+0x3a] +XDIS 2ed04: MISC BASE D55C8D7C763B lea r31, ptr [r22+rsi*2+0x3b] +XDIS 2ed0a: MISC BASE D55C8D7C773C lea r31, ptr [r23+rsi*2+0x3c] +XDIS 2ed10: MISC BASE D55D8D7C703D lea r31, ptr [r24+rsi*2+0x3d] +XDIS 2ed16: MISC BASE D55D8D7C713E lea r31, ptr [r25+rsi*2+0x3e] +XDIS 2ed1c: MISC BASE D55D8D7C723F lea r31, ptr [r26+rsi*2+0x3f] +XDIS 2ed22: MISC BASE D55D8D7C7340 lea r31, ptr [r27+rsi*2+0x40] +XDIS 2ed28: MISC BASE D55D8D7C7441 lea r31, ptr [r28+rsi*2+0x41] +XDIS 2ed2e: MISC BASE D55D8D7C7542 lea r31, ptr [r29+rsi*2+0x42] +XDIS 2ed34: MISC BASE D55D8D7C7643 lea r31, ptr [r30+rsi*2+0x43] +XDIS 2ed3a: MISC BASE D55D8D7C7744 lea r31, ptr [r31+rsi*2+0x44] +XDIS 2ed40: MISC BASE D54C8D7C7826 lea r31, ptr [rax+rdi*2+0x26] +XDIS 2ed46: MISC BASE D54C8D7C7927 lea r31, ptr [rcx+rdi*2+0x27] +XDIS 2ed4c: MISC BASE D54C8D7C7A28 lea r31, ptr [rdx+rdi*2+0x28] +XDIS 2ed52: MISC BASE D54C8D7C7B29 lea r31, ptr [rbx+rdi*2+0x29] +XDIS 2ed58: MISC BASE D54C8D7C7C2A lea r31, ptr [rsp+rdi*2+0x2a] +XDIS 2ed5e: MISC BASE D54C8D7C7D2B lea r31, ptr [rbp+rdi*2+0x2b] +XDIS 2ed64: MISC BASE D54C8D7C7E2C lea r31, ptr [rsi+rdi*2+0x2c] +XDIS 2ed6a: MISC BASE D54C8D7C7F2D lea r31, ptr [rdi+rdi*2+0x2d] +XDIS 2ed70: MISC BASE D54D8D7C782E lea r31, ptr [r8+rdi*2+0x2e] +XDIS 2ed76: MISC BASE D54D8D7C792F lea r31, ptr [r9+rdi*2+0x2f] +XDIS 2ed7c: MISC BASE D54D8D7C7A30 lea r31, ptr [r10+rdi*2+0x30] +XDIS 2ed82: MISC BASE D54D8D7C7B31 lea r31, ptr [r11+rdi*2+0x31] +XDIS 2ed88: MISC BASE D54D8D7C7C32 lea r31, ptr [r12+rdi*2+0x32] +XDIS 2ed8e: MISC BASE D54D8D7C7D33 lea r31, ptr [r13+rdi*2+0x33] +XDIS 2ed94: MISC BASE D54D8D7C7E34 lea r31, ptr [r14+rdi*2+0x34] +XDIS 2ed9a: MISC BASE D54D8D7C7F35 lea r31, ptr [r15+rdi*2+0x35] +XDIS 2eda0: MISC BASE D55C8D7C7836 lea r31, ptr [r16+rdi*2+0x36] +XDIS 2eda6: MISC BASE D55C8D7C7937 lea r31, ptr [r17+rdi*2+0x37] +XDIS 2edac: MISC BASE D55C8D7C7A38 lea r31, ptr [r18+rdi*2+0x38] +XDIS 2edb2: MISC BASE D55C8D7C7B39 lea r31, ptr [r19+rdi*2+0x39] +XDIS 2edb8: MISC BASE D55C8D7C7C3A lea r31, ptr [r20+rdi*2+0x3a] +XDIS 2edbe: MISC BASE D55C8D7C7D3B lea r31, ptr [r21+rdi*2+0x3b] +XDIS 2edc4: MISC BASE D55C8D7C7E3C lea r31, ptr [r22+rdi*2+0x3c] +XDIS 2edca: MISC BASE D55C8D7C7F3D lea r31, ptr [r23+rdi*2+0x3d] +XDIS 2edd0: MISC BASE D55D8D7C783E lea r31, ptr [r24+rdi*2+0x3e] +XDIS 2edd6: MISC BASE D55D8D7C793F lea r31, ptr [r25+rdi*2+0x3f] +XDIS 2eddc: MISC BASE D55D8D7C7A40 lea r31, ptr [r26+rdi*2+0x40] +XDIS 2ede2: MISC BASE D55D8D7C7B41 lea r31, ptr [r27+rdi*2+0x41] +XDIS 2ede8: MISC BASE D55D8D7C7C42 lea r31, ptr [r28+rdi*2+0x42] +XDIS 2edee: MISC BASE D55D8D7C7D43 lea r31, ptr [r29+rdi*2+0x43] +XDIS 2edf4: MISC BASE D55D8D7C7E44 lea r31, ptr [r30+rdi*2+0x44] +XDIS 2edfa: MISC BASE D55D8D7C7F45 lea r31, ptr [r31+rdi*2+0x45] +XDIS 2ee00: MISC BASE D54E8D7C4027 lea r31, ptr [rax+r8*2+0x27] +XDIS 2ee06: MISC BASE D54E8D7C4128 lea r31, ptr [rcx+r8*2+0x28] +XDIS 2ee0c: MISC BASE D54E8D7C4229 lea r31, ptr [rdx+r8*2+0x29] +XDIS 2ee12: MISC BASE D54E8D7C432A lea r31, ptr [rbx+r8*2+0x2a] +XDIS 2ee18: MISC BASE D54E8D7C442B lea r31, ptr [rsp+r8*2+0x2b] +XDIS 2ee1e: MISC BASE D54E8D7C452C lea r31, ptr [rbp+r8*2+0x2c] +XDIS 2ee24: MISC BASE D54E8D7C462D lea r31, ptr [rsi+r8*2+0x2d] +XDIS 2ee2a: MISC BASE D54E8D7C472E lea r31, ptr [rdi+r8*2+0x2e] +XDIS 2ee30: MISC BASE D54F8D7C402F lea r31, ptr [r8+r8*2+0x2f] +XDIS 2ee36: MISC BASE D54F8D7C4130 lea r31, ptr [r9+r8*2+0x30] +XDIS 2ee3c: MISC BASE D54F8D7C4231 lea r31, ptr [r10+r8*2+0x31] +XDIS 2ee42: MISC BASE D54F8D7C4332 lea r31, ptr [r11+r8*2+0x32] +XDIS 2ee48: MISC BASE D54F8D7C4433 lea r31, ptr [r12+r8*2+0x33] +XDIS 2ee4e: MISC BASE D54F8D7C4534 lea r31, ptr [r13+r8*2+0x34] +XDIS 2ee54: MISC BASE D54F8D7C4635 lea r31, ptr [r14+r8*2+0x35] +XDIS 2ee5a: MISC BASE D54F8D7C4736 lea r31, ptr [r15+r8*2+0x36] +XDIS 2ee60: MISC BASE D55E8D7C4037 lea r31, ptr [r16+r8*2+0x37] +XDIS 2ee66: MISC BASE D55E8D7C4138 lea r31, ptr [r17+r8*2+0x38] +XDIS 2ee6c: MISC BASE D55E8D7C4239 lea r31, ptr [r18+r8*2+0x39] +XDIS 2ee72: MISC BASE D55E8D7C433A lea r31, ptr [r19+r8*2+0x3a] +XDIS 2ee78: MISC BASE D55E8D7C443B lea r31, ptr [r20+r8*2+0x3b] +XDIS 2ee7e: MISC BASE D55E8D7C453C lea r31, ptr [r21+r8*2+0x3c] +XDIS 2ee84: MISC BASE D55E8D7C463D lea r31, ptr [r22+r8*2+0x3d] +XDIS 2ee8a: MISC BASE D55E8D7C473E lea r31, ptr [r23+r8*2+0x3e] +XDIS 2ee90: MISC BASE D55F8D7C403F lea r31, ptr [r24+r8*2+0x3f] +XDIS 2ee96: MISC BASE D55F8D7C4140 lea r31, ptr [r25+r8*2+0x40] +XDIS 2ee9c: MISC BASE D55F8D7C4241 lea r31, ptr [r26+r8*2+0x41] +XDIS 2eea2: MISC BASE D55F8D7C4342 lea r31, ptr [r27+r8*2+0x42] +XDIS 2eea8: MISC BASE D55F8D7C4443 lea r31, ptr [r28+r8*2+0x43] +XDIS 2eeae: MISC BASE D55F8D7C4544 lea r31, ptr [r29+r8*2+0x44] +XDIS 2eeb4: MISC BASE D55F8D7C4645 lea r31, ptr [r30+r8*2+0x45] +XDIS 2eeba: MISC BASE D55F8D7C4746 lea r31, ptr [r31+r8*2+0x46] +XDIS 2eec0: MISC BASE D54E8D7C4828 lea r31, ptr [rax+r9*2+0x28] +XDIS 2eec6: MISC BASE D54E8D7C4929 lea r31, ptr [rcx+r9*2+0x29] +XDIS 2eecc: MISC BASE D54E8D7C4A2A lea r31, ptr [rdx+r9*2+0x2a] +XDIS 2eed2: MISC BASE D54E8D7C4B2B lea r31, ptr [rbx+r9*2+0x2b] +XDIS 2eed8: MISC BASE D54E8D7C4C2C lea r31, ptr [rsp+r9*2+0x2c] +XDIS 2eede: MISC BASE D54E8D7C4D2D lea r31, ptr [rbp+r9*2+0x2d] +XDIS 2eee4: MISC BASE D54E8D7C4E2E lea r31, ptr [rsi+r9*2+0x2e] +XDIS 2eeea: MISC BASE D54E8D7C4F2F lea r31, ptr [rdi+r9*2+0x2f] +XDIS 2eef0: MISC BASE D54F8D7C4830 lea r31, ptr [r8+r9*2+0x30] +XDIS 2eef6: MISC BASE D54F8D7C4931 lea r31, ptr [r9+r9*2+0x31] +XDIS 2eefc: MISC BASE D54F8D7C4A32 lea r31, ptr [r10+r9*2+0x32] +XDIS 2ef02: MISC BASE D54F8D7C4B33 lea r31, ptr [r11+r9*2+0x33] +XDIS 2ef08: MISC BASE D54F8D7C4C34 lea r31, ptr [r12+r9*2+0x34] +XDIS 2ef0e: MISC BASE D54F8D7C4D35 lea r31, ptr [r13+r9*2+0x35] +XDIS 2ef14: MISC BASE D54F8D7C4E36 lea r31, ptr [r14+r9*2+0x36] +XDIS 2ef1a: MISC BASE D54F8D7C4F37 lea r31, ptr [r15+r9*2+0x37] +XDIS 2ef20: MISC BASE D55E8D7C4838 lea r31, ptr [r16+r9*2+0x38] +XDIS 2ef26: MISC BASE D55E8D7C4939 lea r31, ptr [r17+r9*2+0x39] +XDIS 2ef2c: MISC BASE D55E8D7C4A3A lea r31, ptr [r18+r9*2+0x3a] +XDIS 2ef32: MISC BASE D55E8D7C4B3B lea r31, ptr [r19+r9*2+0x3b] +XDIS 2ef38: MISC BASE D55E8D7C4C3C lea r31, ptr [r20+r9*2+0x3c] +XDIS 2ef3e: MISC BASE D55E8D7C4D3D lea r31, ptr [r21+r9*2+0x3d] +XDIS 2ef44: MISC BASE D55E8D7C4E3E lea r31, ptr [r22+r9*2+0x3e] +XDIS 2ef4a: MISC BASE D55E8D7C4F3F lea r31, ptr [r23+r9*2+0x3f] +XDIS 2ef50: MISC BASE D55F8D7C4840 lea r31, ptr [r24+r9*2+0x40] +XDIS 2ef56: MISC BASE D55F8D7C4941 lea r31, ptr [r25+r9*2+0x41] +XDIS 2ef5c: MISC BASE D55F8D7C4A42 lea r31, ptr [r26+r9*2+0x42] +XDIS 2ef62: MISC BASE D55F8D7C4B43 lea r31, ptr [r27+r9*2+0x43] +XDIS 2ef68: MISC BASE D55F8D7C4C44 lea r31, ptr [r28+r9*2+0x44] +XDIS 2ef6e: MISC BASE D55F8D7C4D45 lea r31, ptr [r29+r9*2+0x45] +XDIS 2ef74: MISC BASE D55F8D7C4E46 lea r31, ptr [r30+r9*2+0x46] +XDIS 2ef7a: MISC BASE D55F8D7C4F47 lea r31, ptr [r31+r9*2+0x47] +XDIS 2ef80: MISC BASE D54E8D7C5029 lea r31, ptr [rax+r10*2+0x29] +XDIS 2ef86: MISC BASE D54E8D7C512A lea r31, ptr [rcx+r10*2+0x2a] +XDIS 2ef8c: MISC BASE D54E8D7C522B lea r31, ptr [rdx+r10*2+0x2b] +XDIS 2ef92: MISC BASE D54E8D7C532C lea r31, ptr [rbx+r10*2+0x2c] +XDIS 2ef98: MISC BASE D54E8D7C542D lea r31, ptr [rsp+r10*2+0x2d] +XDIS 2ef9e: MISC BASE D54E8D7C552E lea r31, ptr [rbp+r10*2+0x2e] +XDIS 2efa4: MISC BASE D54E8D7C562F lea r31, ptr [rsi+r10*2+0x2f] +XDIS 2efaa: MISC BASE D54E8D7C5730 lea r31, ptr [rdi+r10*2+0x30] +XDIS 2efb0: MISC BASE D54F8D7C5031 lea r31, ptr [r8+r10*2+0x31] +XDIS 2efb6: MISC BASE D54F8D7C5132 lea r31, ptr [r9+r10*2+0x32] +XDIS 2efbc: MISC BASE D54F8D7C5233 lea r31, ptr [r10+r10*2+0x33] +XDIS 2efc2: MISC BASE D54F8D7C5334 lea r31, ptr [r11+r10*2+0x34] +XDIS 2efc8: MISC BASE D54F8D7C5435 lea r31, ptr [r12+r10*2+0x35] +XDIS 2efce: MISC BASE D54F8D7C5536 lea r31, ptr [r13+r10*2+0x36] +XDIS 2efd4: MISC BASE D54F8D7C5637 lea r31, ptr [r14+r10*2+0x37] +XDIS 2efda: MISC BASE D54F8D7C5738 lea r31, ptr [r15+r10*2+0x38] +XDIS 2efe0: MISC BASE D55E8D7C5039 lea r31, ptr [r16+r10*2+0x39] +XDIS 2efe6: MISC BASE D55E8D7C513A lea r31, ptr [r17+r10*2+0x3a] +XDIS 2efec: MISC BASE D55E8D7C523B lea r31, ptr [r18+r10*2+0x3b] +XDIS 2eff2: MISC BASE D55E8D7C533C lea r31, ptr [r19+r10*2+0x3c] +XDIS 2eff8: MISC BASE D55E8D7C543D lea r31, ptr [r20+r10*2+0x3d] +XDIS 2effe: MISC BASE D55E8D7C553E lea r31, ptr [r21+r10*2+0x3e] +XDIS 2f004: MISC BASE D55E8D7C563F lea r31, ptr [r22+r10*2+0x3f] +XDIS 2f00a: MISC BASE D55E8D7C5740 lea r31, ptr [r23+r10*2+0x40] +XDIS 2f010: MISC BASE D55F8D7C5041 lea r31, ptr [r24+r10*2+0x41] +XDIS 2f016: MISC BASE D55F8D7C5142 lea r31, ptr [r25+r10*2+0x42] +XDIS 2f01c: MISC BASE D55F8D7C5243 lea r31, ptr [r26+r10*2+0x43] +XDIS 2f022: MISC BASE D55F8D7C5344 lea r31, ptr [r27+r10*2+0x44] +XDIS 2f028: MISC BASE D55F8D7C5445 lea r31, ptr [r28+r10*2+0x45] +XDIS 2f02e: MISC BASE D55F8D7C5546 lea r31, ptr [r29+r10*2+0x46] +XDIS 2f034: MISC BASE D55F8D7C5647 lea r31, ptr [r30+r10*2+0x47] +XDIS 2f03a: MISC BASE D55F8D7C5748 lea r31, ptr [r31+r10*2+0x48] +XDIS 2f040: MISC BASE D54E8D7C582A lea r31, ptr [rax+r11*2+0x2a] +XDIS 2f046: MISC BASE D54E8D7C592B lea r31, ptr [rcx+r11*2+0x2b] +XDIS 2f04c: MISC BASE D54E8D7C5A2C lea r31, ptr [rdx+r11*2+0x2c] +XDIS 2f052: MISC BASE D54E8D7C5B2D lea r31, ptr [rbx+r11*2+0x2d] +XDIS 2f058: MISC BASE D54E8D7C5C2E lea r31, ptr [rsp+r11*2+0x2e] +XDIS 2f05e: MISC BASE D54E8D7C5D2F lea r31, ptr [rbp+r11*2+0x2f] +XDIS 2f064: MISC BASE D54E8D7C5E30 lea r31, ptr [rsi+r11*2+0x30] +XDIS 2f06a: MISC BASE D54E8D7C5F31 lea r31, ptr [rdi+r11*2+0x31] +XDIS 2f070: MISC BASE D54F8D7C5832 lea r31, ptr [r8+r11*2+0x32] +XDIS 2f076: MISC BASE D54F8D7C5933 lea r31, ptr [r9+r11*2+0x33] +XDIS 2f07c: MISC BASE D54F8D7C5A34 lea r31, ptr [r10+r11*2+0x34] +XDIS 2f082: MISC BASE D54F8D7C5B35 lea r31, ptr [r11+r11*2+0x35] +XDIS 2f088: MISC BASE D54F8D7C5C36 lea r31, ptr [r12+r11*2+0x36] +XDIS 2f08e: MISC BASE D54F8D7C5D37 lea r31, ptr [r13+r11*2+0x37] +XDIS 2f094: MISC BASE D54F8D7C5E38 lea r31, ptr [r14+r11*2+0x38] +XDIS 2f09a: MISC BASE D54F8D7C5F39 lea r31, ptr [r15+r11*2+0x39] +XDIS 2f0a0: MISC BASE D55E8D7C583A lea r31, ptr [r16+r11*2+0x3a] +XDIS 2f0a6: MISC BASE D55E8D7C593B lea r31, ptr [r17+r11*2+0x3b] +XDIS 2f0ac: MISC BASE D55E8D7C5A3C lea r31, ptr [r18+r11*2+0x3c] +XDIS 2f0b2: MISC BASE D55E8D7C5B3D lea r31, ptr [r19+r11*2+0x3d] +XDIS 2f0b8: MISC BASE D55E8D7C5C3E lea r31, ptr [r20+r11*2+0x3e] +XDIS 2f0be: MISC BASE D55E8D7C5D3F lea r31, ptr [r21+r11*2+0x3f] +XDIS 2f0c4: MISC BASE D55E8D7C5E40 lea r31, ptr [r22+r11*2+0x40] +XDIS 2f0ca: MISC BASE D55E8D7C5F41 lea r31, ptr [r23+r11*2+0x41] +XDIS 2f0d0: MISC BASE D55F8D7C5842 lea r31, ptr [r24+r11*2+0x42] +XDIS 2f0d6: MISC BASE D55F8D7C5943 lea r31, ptr [r25+r11*2+0x43] +XDIS 2f0dc: MISC BASE D55F8D7C5A44 lea r31, ptr [r26+r11*2+0x44] +XDIS 2f0e2: MISC BASE D55F8D7C5B45 lea r31, ptr [r27+r11*2+0x45] +XDIS 2f0e8: MISC BASE D55F8D7C5C46 lea r31, ptr [r28+r11*2+0x46] +XDIS 2f0ee: MISC BASE D55F8D7C5D47 lea r31, ptr [r29+r11*2+0x47] +XDIS 2f0f4: MISC BASE D55F8D7C5E48 lea r31, ptr [r30+r11*2+0x48] +XDIS 2f0fa: MISC BASE D55F8D7C5F49 lea r31, ptr [r31+r11*2+0x49] +XDIS 2f100: MISC BASE D54E8D7C602B lea r31, ptr [rax+r12*2+0x2b] +XDIS 2f106: MISC BASE D54E8D7C612C lea r31, ptr [rcx+r12*2+0x2c] +XDIS 2f10c: MISC BASE D54E8D7C622D lea r31, ptr [rdx+r12*2+0x2d] +XDIS 2f112: MISC BASE D54E8D7C632E lea r31, ptr [rbx+r12*2+0x2e] +XDIS 2f118: MISC BASE D54E8D7C642F lea r31, ptr [rsp+r12*2+0x2f] +XDIS 2f11e: MISC BASE D54E8D7C6530 lea r31, ptr [rbp+r12*2+0x30] +XDIS 2f124: MISC BASE D54E8D7C6631 lea r31, ptr [rsi+r12*2+0x31] +XDIS 2f12a: MISC BASE D54E8D7C6732 lea r31, ptr [rdi+r12*2+0x32] +XDIS 2f130: MISC BASE D54F8D7C6033 lea r31, ptr [r8+r12*2+0x33] +XDIS 2f136: MISC BASE D54F8D7C6134 lea r31, ptr [r9+r12*2+0x34] +XDIS 2f13c: MISC BASE D54F8D7C6235 lea r31, ptr [r10+r12*2+0x35] +XDIS 2f142: MISC BASE D54F8D7C6336 lea r31, ptr [r11+r12*2+0x36] +XDIS 2f148: MISC BASE D54F8D7C6437 lea r31, ptr [r12+r12*2+0x37] +XDIS 2f14e: MISC BASE D54F8D7C6538 lea r31, ptr [r13+r12*2+0x38] +XDIS 2f154: MISC BASE D54F8D7C6639 lea r31, ptr [r14+r12*2+0x39] +XDIS 2f15a: MISC BASE D54F8D7C673A lea r31, ptr [r15+r12*2+0x3a] +XDIS 2f160: MISC BASE D55E8D7C603B lea r31, ptr [r16+r12*2+0x3b] +XDIS 2f166: MISC BASE D55E8D7C613C lea r31, ptr [r17+r12*2+0x3c] +XDIS 2f16c: MISC BASE D55E8D7C623D lea r31, ptr [r18+r12*2+0x3d] +XDIS 2f172: MISC BASE D55E8D7C633E lea r31, ptr [r19+r12*2+0x3e] +XDIS 2f178: MISC BASE D55E8D7C643F lea r31, ptr [r20+r12*2+0x3f] +XDIS 2f17e: MISC BASE D55E8D7C6540 lea r31, ptr [r21+r12*2+0x40] +XDIS 2f184: MISC BASE D55E8D7C6641 lea r31, ptr [r22+r12*2+0x41] +XDIS 2f18a: MISC BASE D55E8D7C6742 lea r31, ptr [r23+r12*2+0x42] +XDIS 2f190: MISC BASE D55F8D7C6043 lea r31, ptr [r24+r12*2+0x43] +XDIS 2f196: MISC BASE D55F8D7C6144 lea r31, ptr [r25+r12*2+0x44] +XDIS 2f19c: MISC BASE D55F8D7C6245 lea r31, ptr [r26+r12*2+0x45] +XDIS 2f1a2: MISC BASE D55F8D7C6346 lea r31, ptr [r27+r12*2+0x46] +XDIS 2f1a8: MISC BASE D55F8D7C6447 lea r31, ptr [r28+r12*2+0x47] +XDIS 2f1ae: MISC BASE D55F8D7C6548 lea r31, ptr [r29+r12*2+0x48] +XDIS 2f1b4: MISC BASE D55F8D7C6649 lea r31, ptr [r30+r12*2+0x49] +XDIS 2f1ba: MISC BASE D55F8D7C674A lea r31, ptr [r31+r12*2+0x4a] +XDIS 2f1c0: MISC BASE D54E8D7C682C lea r31, ptr [rax+r13*2+0x2c] +XDIS 2f1c6: MISC BASE D54E8D7C692D lea r31, ptr [rcx+r13*2+0x2d] +XDIS 2f1cc: MISC BASE D54E8D7C6A2E lea r31, ptr [rdx+r13*2+0x2e] +XDIS 2f1d2: MISC BASE D54E8D7C6B2F lea r31, ptr [rbx+r13*2+0x2f] +XDIS 2f1d8: MISC BASE D54E8D7C6C30 lea r31, ptr [rsp+r13*2+0x30] +XDIS 2f1de: MISC BASE D54E8D7C6D31 lea r31, ptr [rbp+r13*2+0x31] +XDIS 2f1e4: MISC BASE D54E8D7C6E32 lea r31, ptr [rsi+r13*2+0x32] +XDIS 2f1ea: MISC BASE D54E8D7C6F33 lea r31, ptr [rdi+r13*2+0x33] +XDIS 2f1f0: MISC BASE D54F8D7C6834 lea r31, ptr [r8+r13*2+0x34] +XDIS 2f1f6: MISC BASE D54F8D7C6935 lea r31, ptr [r9+r13*2+0x35] +XDIS 2f1fc: MISC BASE D54F8D7C6A36 lea r31, ptr [r10+r13*2+0x36] +XDIS 2f202: MISC BASE D54F8D7C6B37 lea r31, ptr [r11+r13*2+0x37] +XDIS 2f208: MISC BASE D54F8D7C6C38 lea r31, ptr [r12+r13*2+0x38] +XDIS 2f20e: MISC BASE D54F8D7C6D39 lea r31, ptr [r13+r13*2+0x39] +XDIS 2f214: MISC BASE D54F8D7C6E3A lea r31, ptr [r14+r13*2+0x3a] +XDIS 2f21a: MISC BASE D54F8D7C6F3B lea r31, ptr [r15+r13*2+0x3b] +XDIS 2f220: MISC BASE D55E8D7C683C lea r31, ptr [r16+r13*2+0x3c] +XDIS 2f226: MISC BASE D55E8D7C693D lea r31, ptr [r17+r13*2+0x3d] +XDIS 2f22c: MISC BASE D55E8D7C6A3E lea r31, ptr [r18+r13*2+0x3e] +XDIS 2f232: MISC BASE D55E8D7C6B3F lea r31, ptr [r19+r13*2+0x3f] +XDIS 2f238: MISC BASE D55E8D7C6C40 lea r31, ptr [r20+r13*2+0x40] +XDIS 2f23e: MISC BASE D55E8D7C6D41 lea r31, ptr [r21+r13*2+0x41] +XDIS 2f244: MISC BASE D55E8D7C6E42 lea r31, ptr [r22+r13*2+0x42] +XDIS 2f24a: MISC BASE D55E8D7C6F43 lea r31, ptr [r23+r13*2+0x43] +XDIS 2f250: MISC BASE D55F8D7C6844 lea r31, ptr [r24+r13*2+0x44] +XDIS 2f256: MISC BASE D55F8D7C6945 lea r31, ptr [r25+r13*2+0x45] +XDIS 2f25c: MISC BASE D55F8D7C6A46 lea r31, ptr [r26+r13*2+0x46] +XDIS 2f262: MISC BASE D55F8D7C6B47 lea r31, ptr [r27+r13*2+0x47] +XDIS 2f268: MISC BASE D55F8D7C6C48 lea r31, ptr [r28+r13*2+0x48] +XDIS 2f26e: MISC BASE D55F8D7C6D49 lea r31, ptr [r29+r13*2+0x49] +XDIS 2f274: MISC BASE D55F8D7C6E4A lea r31, ptr [r30+r13*2+0x4a] +XDIS 2f27a: MISC BASE D55F8D7C6F4B lea r31, ptr [r31+r13*2+0x4b] +XDIS 2f280: MISC BASE D54E8D7C702D lea r31, ptr [rax+r14*2+0x2d] +XDIS 2f286: MISC BASE D54E8D7C712E lea r31, ptr [rcx+r14*2+0x2e] +XDIS 2f28c: MISC BASE D54E8D7C722F lea r31, ptr [rdx+r14*2+0x2f] +XDIS 2f292: MISC BASE D54E8D7C7330 lea r31, ptr [rbx+r14*2+0x30] +XDIS 2f298: MISC BASE D54E8D7C7431 lea r31, ptr [rsp+r14*2+0x31] +XDIS 2f29e: MISC BASE D54E8D7C7532 lea r31, ptr [rbp+r14*2+0x32] +XDIS 2f2a4: MISC BASE D54E8D7C7633 lea r31, ptr [rsi+r14*2+0x33] +XDIS 2f2aa: MISC BASE D54E8D7C7734 lea r31, ptr [rdi+r14*2+0x34] +XDIS 2f2b0: MISC BASE D54F8D7C7035 lea r31, ptr [r8+r14*2+0x35] +XDIS 2f2b6: MISC BASE D54F8D7C7136 lea r31, ptr [r9+r14*2+0x36] +XDIS 2f2bc: MISC BASE D54F8D7C7237 lea r31, ptr [r10+r14*2+0x37] +XDIS 2f2c2: MISC BASE D54F8D7C7338 lea r31, ptr [r11+r14*2+0x38] +XDIS 2f2c8: MISC BASE D54F8D7C7439 lea r31, ptr [r12+r14*2+0x39] +XDIS 2f2ce: MISC BASE D54F8D7C753A lea r31, ptr [r13+r14*2+0x3a] +XDIS 2f2d4: MISC BASE D54F8D7C763B lea r31, ptr [r14+r14*2+0x3b] +XDIS 2f2da: MISC BASE D54F8D7C773C lea r31, ptr [r15+r14*2+0x3c] +XDIS 2f2e0: MISC BASE D55E8D7C703D lea r31, ptr [r16+r14*2+0x3d] +XDIS 2f2e6: MISC BASE D55E8D7C713E lea r31, ptr [r17+r14*2+0x3e] +XDIS 2f2ec: MISC BASE D55E8D7C723F lea r31, ptr [r18+r14*2+0x3f] +XDIS 2f2f2: MISC BASE D55E8D7C7340 lea r31, ptr [r19+r14*2+0x40] +XDIS 2f2f8: MISC BASE D55E8D7C7441 lea r31, ptr [r20+r14*2+0x41] +XDIS 2f2fe: MISC BASE D55E8D7C7542 lea r31, ptr [r21+r14*2+0x42] +XDIS 2f304: MISC BASE D55E8D7C7643 lea r31, ptr [r22+r14*2+0x43] +XDIS 2f30a: MISC BASE D55E8D7C7744 lea r31, ptr [r23+r14*2+0x44] +XDIS 2f310: MISC BASE D55F8D7C7045 lea r31, ptr [r24+r14*2+0x45] +XDIS 2f316: MISC BASE D55F8D7C7146 lea r31, ptr [r25+r14*2+0x46] +XDIS 2f31c: MISC BASE D55F8D7C7247 lea r31, ptr [r26+r14*2+0x47] +XDIS 2f322: MISC BASE D55F8D7C7348 lea r31, ptr [r27+r14*2+0x48] +XDIS 2f328: MISC BASE D55F8D7C7449 lea r31, ptr [r28+r14*2+0x49] +XDIS 2f32e: MISC BASE D55F8D7C754A lea r31, ptr [r29+r14*2+0x4a] +XDIS 2f334: MISC BASE D55F8D7C764B lea r31, ptr [r30+r14*2+0x4b] +XDIS 2f33a: MISC BASE D55F8D7C774C lea r31, ptr [r31+r14*2+0x4c] +XDIS 2f340: MISC BASE D54E8D7C782E lea r31, ptr [rax+r15*2+0x2e] +XDIS 2f346: MISC BASE D54E8D7C792F lea r31, ptr [rcx+r15*2+0x2f] +XDIS 2f34c: MISC BASE D54E8D7C7A30 lea r31, ptr [rdx+r15*2+0x30] +XDIS 2f352: MISC BASE D54E8D7C7B31 lea r31, ptr [rbx+r15*2+0x31] +XDIS 2f358: MISC BASE D54E8D7C7C32 lea r31, ptr [rsp+r15*2+0x32] +XDIS 2f35e: MISC BASE D54E8D7C7D33 lea r31, ptr [rbp+r15*2+0x33] +XDIS 2f364: MISC BASE D54E8D7C7E34 lea r31, ptr [rsi+r15*2+0x34] +XDIS 2f36a: MISC BASE D54E8D7C7F35 lea r31, ptr [rdi+r15*2+0x35] +XDIS 2f370: MISC BASE D54F8D7C7836 lea r31, ptr [r8+r15*2+0x36] +XDIS 2f376: MISC BASE D54F8D7C7937 lea r31, ptr [r9+r15*2+0x37] +XDIS 2f37c: MISC BASE D54F8D7C7A38 lea r31, ptr [r10+r15*2+0x38] +XDIS 2f382: MISC BASE D54F8D7C7B39 lea r31, ptr [r11+r15*2+0x39] +XDIS 2f388: MISC BASE D54F8D7C7C3A lea r31, ptr [r12+r15*2+0x3a] +XDIS 2f38e: MISC BASE D54F8D7C7D3B lea r31, ptr [r13+r15*2+0x3b] +XDIS 2f394: MISC BASE D54F8D7C7E3C lea r31, ptr [r14+r15*2+0x3c] +XDIS 2f39a: MISC BASE D54F8D7C7F3D lea r31, ptr [r15+r15*2+0x3d] +XDIS 2f3a0: MISC BASE D55E8D7C783E lea r31, ptr [r16+r15*2+0x3e] +XDIS 2f3a6: MISC BASE D55E8D7C793F lea r31, ptr [r17+r15*2+0x3f] +XDIS 2f3ac: MISC BASE D55E8D7C7A40 lea r31, ptr [r18+r15*2+0x40] +XDIS 2f3b2: MISC BASE D55E8D7C7B41 lea r31, ptr [r19+r15*2+0x41] +XDIS 2f3b8: MISC BASE D55E8D7C7C42 lea r31, ptr [r20+r15*2+0x42] +XDIS 2f3be: MISC BASE D55E8D7C7D43 lea r31, ptr [r21+r15*2+0x43] +XDIS 2f3c4: MISC BASE D55E8D7C7E44 lea r31, ptr [r22+r15*2+0x44] +XDIS 2f3ca: MISC BASE D55E8D7C7F45 lea r31, ptr [r23+r15*2+0x45] +XDIS 2f3d0: MISC BASE D55F8D7C7846 lea r31, ptr [r24+r15*2+0x46] +XDIS 2f3d6: MISC BASE D55F8D7C7947 lea r31, ptr [r25+r15*2+0x47] +XDIS 2f3dc: MISC BASE D55F8D7C7A48 lea r31, ptr [r26+r15*2+0x48] +XDIS 2f3e2: MISC BASE D55F8D7C7B49 lea r31, ptr [r27+r15*2+0x49] +XDIS 2f3e8: MISC BASE D55F8D7C7C4A lea r31, ptr [r28+r15*2+0x4a] +XDIS 2f3ee: MISC BASE D55F8D7C7D4B lea r31, ptr [r29+r15*2+0x4b] +XDIS 2f3f4: MISC BASE D55F8D7C7E4C lea r31, ptr [r30+r15*2+0x4c] +XDIS 2f3fa: MISC BASE D55F8D7C7F4D lea r31, ptr [r31+r15*2+0x4d] +XDIS 2f400: MISC BASE D56C8D7C402F lea r31, ptr [rax+r16*2+0x2f] +XDIS 2f406: MISC BASE D56C8D7C4130 lea r31, ptr [rcx+r16*2+0x30] +XDIS 2f40c: MISC BASE D56C8D7C4231 lea r31, ptr [rdx+r16*2+0x31] +XDIS 2f412: MISC BASE D56C8D7C4332 lea r31, ptr [rbx+r16*2+0x32] +XDIS 2f418: MISC BASE D56C8D7C4433 lea r31, ptr [rsp+r16*2+0x33] +XDIS 2f41e: MISC BASE D56C8D7C4534 lea r31, ptr [rbp+r16*2+0x34] +XDIS 2f424: MISC BASE D56C8D7C4635 lea r31, ptr [rsi+r16*2+0x35] +XDIS 2f42a: MISC BASE D56C8D7C4736 lea r31, ptr [rdi+r16*2+0x36] +XDIS 2f430: MISC BASE D56D8D7C4037 lea r31, ptr [r8+r16*2+0x37] +XDIS 2f436: MISC BASE D56D8D7C4138 lea r31, ptr [r9+r16*2+0x38] +XDIS 2f43c: MISC BASE D56D8D7C4239 lea r31, ptr [r10+r16*2+0x39] +XDIS 2f442: MISC BASE D56D8D7C433A lea r31, ptr [r11+r16*2+0x3a] +XDIS 2f448: MISC BASE D56D8D7C443B lea r31, ptr [r12+r16*2+0x3b] +XDIS 2f44e: MISC BASE D56D8D7C453C lea r31, ptr [r13+r16*2+0x3c] +XDIS 2f454: MISC BASE D56D8D7C463D lea r31, ptr [r14+r16*2+0x3d] +XDIS 2f45a: MISC BASE D56D8D7C473E lea r31, ptr [r15+r16*2+0x3e] +XDIS 2f460: MISC BASE D57C8D7C403F lea r31, ptr [r16+r16*2+0x3f] +XDIS 2f466: MISC BASE D57C8D7C4140 lea r31, ptr [r17+r16*2+0x40] +XDIS 2f46c: MISC BASE D57C8D7C4241 lea r31, ptr [r18+r16*2+0x41] +XDIS 2f472: MISC BASE D57C8D7C4342 lea r31, ptr [r19+r16*2+0x42] +XDIS 2f478: MISC BASE D57C8D7C4443 lea r31, ptr [r20+r16*2+0x43] +XDIS 2f47e: MISC BASE D57C8D7C4544 lea r31, ptr [r21+r16*2+0x44] +XDIS 2f484: MISC BASE D57C8D7C4645 lea r31, ptr [r22+r16*2+0x45] +XDIS 2f48a: MISC BASE D57C8D7C4746 lea r31, ptr [r23+r16*2+0x46] +XDIS 2f490: MISC BASE D57D8D7C4047 lea r31, ptr [r24+r16*2+0x47] +XDIS 2f496: MISC BASE D57D8D7C4148 lea r31, ptr [r25+r16*2+0x48] +XDIS 2f49c: MISC BASE D57D8D7C4249 lea r31, ptr [r26+r16*2+0x49] +XDIS 2f4a2: MISC BASE D57D8D7C434A lea r31, ptr [r27+r16*2+0x4a] +XDIS 2f4a8: MISC BASE D57D8D7C444B lea r31, ptr [r28+r16*2+0x4b] +XDIS 2f4ae: MISC BASE D57D8D7C454C lea r31, ptr [r29+r16*2+0x4c] +XDIS 2f4b4: MISC BASE D57D8D7C464D lea r31, ptr [r30+r16*2+0x4d] +XDIS 2f4ba: MISC BASE D57D8D7C474E lea r31, ptr [r31+r16*2+0x4e] +XDIS 2f4c0: MISC BASE D56C8D7C4830 lea r31, ptr [rax+r17*2+0x30] +XDIS 2f4c6: MISC BASE D56C8D7C4931 lea r31, ptr [rcx+r17*2+0x31] +XDIS 2f4cc: MISC BASE D56C8D7C4A32 lea r31, ptr [rdx+r17*2+0x32] +XDIS 2f4d2: MISC BASE D56C8D7C4B33 lea r31, ptr [rbx+r17*2+0x33] +XDIS 2f4d8: MISC BASE D56C8D7C4C34 lea r31, ptr [rsp+r17*2+0x34] +XDIS 2f4de: MISC BASE D56C8D7C4D35 lea r31, ptr [rbp+r17*2+0x35] +XDIS 2f4e4: MISC BASE D56C8D7C4E36 lea r31, ptr [rsi+r17*2+0x36] +XDIS 2f4ea: MISC BASE D56C8D7C4F37 lea r31, ptr [rdi+r17*2+0x37] +XDIS 2f4f0: MISC BASE D56D8D7C4838 lea r31, ptr [r8+r17*2+0x38] +XDIS 2f4f6: MISC BASE D56D8D7C4939 lea r31, ptr [r9+r17*2+0x39] +XDIS 2f4fc: MISC BASE D56D8D7C4A3A lea r31, ptr [r10+r17*2+0x3a] +XDIS 2f502: MISC BASE D56D8D7C4B3B lea r31, ptr [r11+r17*2+0x3b] +XDIS 2f508: MISC BASE D56D8D7C4C3C lea r31, ptr [r12+r17*2+0x3c] +XDIS 2f50e: MISC BASE D56D8D7C4D3D lea r31, ptr [r13+r17*2+0x3d] +XDIS 2f514: MISC BASE D56D8D7C4E3E lea r31, ptr [r14+r17*2+0x3e] +XDIS 2f51a: MISC BASE D56D8D7C4F3F lea r31, ptr [r15+r17*2+0x3f] +XDIS 2f520: MISC BASE D57C8D7C4840 lea r31, ptr [r16+r17*2+0x40] +XDIS 2f526: MISC BASE D57C8D7C4941 lea r31, ptr [r17+r17*2+0x41] +XDIS 2f52c: MISC BASE D57C8D7C4A42 lea r31, ptr [r18+r17*2+0x42] +XDIS 2f532: MISC BASE D57C8D7C4B43 lea r31, ptr [r19+r17*2+0x43] +XDIS 2f538: MISC BASE D57C8D7C4C44 lea r31, ptr [r20+r17*2+0x44] +XDIS 2f53e: MISC BASE D57C8D7C4D45 lea r31, ptr [r21+r17*2+0x45] +XDIS 2f544: MISC BASE D57C8D7C4E46 lea r31, ptr [r22+r17*2+0x46] +XDIS 2f54a: MISC BASE D57C8D7C4F47 lea r31, ptr [r23+r17*2+0x47] +XDIS 2f550: MISC BASE D57D8D7C4848 lea r31, ptr [r24+r17*2+0x48] +XDIS 2f556: MISC BASE D57D8D7C4949 lea r31, ptr [r25+r17*2+0x49] +XDIS 2f55c: MISC BASE D57D8D7C4A4A lea r31, ptr [r26+r17*2+0x4a] +XDIS 2f562: MISC BASE D57D8D7C4B4B lea r31, ptr [r27+r17*2+0x4b] +XDIS 2f568: MISC BASE D57D8D7C4C4C lea r31, ptr [r28+r17*2+0x4c] +XDIS 2f56e: MISC BASE D57D8D7C4D4D lea r31, ptr [r29+r17*2+0x4d] +XDIS 2f574: MISC BASE D57D8D7C4E4E lea r31, ptr [r30+r17*2+0x4e] +XDIS 2f57a: MISC BASE D57D8D7C4F4F lea r31, ptr [r31+r17*2+0x4f] +XDIS 2f580: MISC BASE D56C8D7C5031 lea r31, ptr [rax+r18*2+0x31] +XDIS 2f586: MISC BASE D56C8D7C5132 lea r31, ptr [rcx+r18*2+0x32] +XDIS 2f58c: MISC BASE D56C8D7C5233 lea r31, ptr [rdx+r18*2+0x33] +XDIS 2f592: MISC BASE D56C8D7C5334 lea r31, ptr [rbx+r18*2+0x34] +XDIS 2f598: MISC BASE D56C8D7C5435 lea r31, ptr [rsp+r18*2+0x35] +XDIS 2f59e: MISC BASE D56C8D7C5536 lea r31, ptr [rbp+r18*2+0x36] +XDIS 2f5a4: MISC BASE D56C8D7C5637 lea r31, ptr [rsi+r18*2+0x37] +XDIS 2f5aa: MISC BASE D56C8D7C5738 lea r31, ptr [rdi+r18*2+0x38] +XDIS 2f5b0: MISC BASE D56D8D7C5039 lea r31, ptr [r8+r18*2+0x39] +XDIS 2f5b6: MISC BASE D56D8D7C513A lea r31, ptr [r9+r18*2+0x3a] +XDIS 2f5bc: MISC BASE D56D8D7C523B lea r31, ptr [r10+r18*2+0x3b] +XDIS 2f5c2: MISC BASE D56D8D7C533C lea r31, ptr [r11+r18*2+0x3c] +XDIS 2f5c8: MISC BASE D56D8D7C543D lea r31, ptr [r12+r18*2+0x3d] +XDIS 2f5ce: MISC BASE D56D8D7C553E lea r31, ptr [r13+r18*2+0x3e] +XDIS 2f5d4: MISC BASE D56D8D7C563F lea r31, ptr [r14+r18*2+0x3f] +XDIS 2f5da: MISC BASE D56D8D7C5740 lea r31, ptr [r15+r18*2+0x40] +XDIS 2f5e0: MISC BASE D57C8D7C5041 lea r31, ptr [r16+r18*2+0x41] +XDIS 2f5e6: MISC BASE D57C8D7C5142 lea r31, ptr [r17+r18*2+0x42] +XDIS 2f5ec: MISC BASE D57C8D7C5243 lea r31, ptr [r18+r18*2+0x43] +XDIS 2f5f2: MISC BASE D57C8D7C5344 lea r31, ptr [r19+r18*2+0x44] +XDIS 2f5f8: MISC BASE D57C8D7C5445 lea r31, ptr [r20+r18*2+0x45] +XDIS 2f5fe: MISC BASE D57C8D7C5546 lea r31, ptr [r21+r18*2+0x46] +XDIS 2f604: MISC BASE D57C8D7C5647 lea r31, ptr [r22+r18*2+0x47] +XDIS 2f60a: MISC BASE D57C8D7C5748 lea r31, ptr [r23+r18*2+0x48] +XDIS 2f610: MISC BASE D57D8D7C5049 lea r31, ptr [r24+r18*2+0x49] +XDIS 2f616: MISC BASE D57D8D7C514A lea r31, ptr [r25+r18*2+0x4a] +XDIS 2f61c: MISC BASE D57D8D7C524B lea r31, ptr [r26+r18*2+0x4b] +XDIS 2f622: MISC BASE D57D8D7C534C lea r31, ptr [r27+r18*2+0x4c] +XDIS 2f628: MISC BASE D57D8D7C544D lea r31, ptr [r28+r18*2+0x4d] +XDIS 2f62e: MISC BASE D57D8D7C554E lea r31, ptr [r29+r18*2+0x4e] +XDIS 2f634: MISC BASE D57D8D7C564F lea r31, ptr [r30+r18*2+0x4f] +XDIS 2f63a: MISC BASE D57D8D7C5750 lea r31, ptr [r31+r18*2+0x50] +XDIS 2f640: MISC BASE D56C8D7C5832 lea r31, ptr [rax+r19*2+0x32] +XDIS 2f646: MISC BASE D56C8D7C5933 lea r31, ptr [rcx+r19*2+0x33] +XDIS 2f64c: MISC BASE D56C8D7C5A34 lea r31, ptr [rdx+r19*2+0x34] +XDIS 2f652: MISC BASE D56C8D7C5B35 lea r31, ptr [rbx+r19*2+0x35] +XDIS 2f658: MISC BASE D56C8D7C5C36 lea r31, ptr [rsp+r19*2+0x36] +XDIS 2f65e: MISC BASE D56C8D7C5D37 lea r31, ptr [rbp+r19*2+0x37] +XDIS 2f664: MISC BASE D56C8D7C5E38 lea r31, ptr [rsi+r19*2+0x38] +XDIS 2f66a: MISC BASE D56C8D7C5F39 lea r31, ptr [rdi+r19*2+0x39] +XDIS 2f670: MISC BASE D56D8D7C583A lea r31, ptr [r8+r19*2+0x3a] +XDIS 2f676: MISC BASE D56D8D7C593B lea r31, ptr [r9+r19*2+0x3b] +XDIS 2f67c: MISC BASE D56D8D7C5A3C lea r31, ptr [r10+r19*2+0x3c] +XDIS 2f682: MISC BASE D56D8D7C5B3D lea r31, ptr [r11+r19*2+0x3d] +XDIS 2f688: MISC BASE D56D8D7C5C3E lea r31, ptr [r12+r19*2+0x3e] +XDIS 2f68e: MISC BASE D56D8D7C5D3F lea r31, ptr [r13+r19*2+0x3f] +XDIS 2f694: MISC BASE D56D8D7C5E40 lea r31, ptr [r14+r19*2+0x40] +XDIS 2f69a: MISC BASE D56D8D7C5F41 lea r31, ptr [r15+r19*2+0x41] +XDIS 2f6a0: MISC BASE D57C8D7C5842 lea r31, ptr [r16+r19*2+0x42] +XDIS 2f6a6: MISC BASE D57C8D7C5943 lea r31, ptr [r17+r19*2+0x43] +XDIS 2f6ac: MISC BASE D57C8D7C5A44 lea r31, ptr [r18+r19*2+0x44] +XDIS 2f6b2: MISC BASE D57C8D7C5B45 lea r31, ptr [r19+r19*2+0x45] +XDIS 2f6b8: MISC BASE D57C8D7C5C46 lea r31, ptr [r20+r19*2+0x46] +XDIS 2f6be: MISC BASE D57C8D7C5D47 lea r31, ptr [r21+r19*2+0x47] +XDIS 2f6c4: MISC BASE D57C8D7C5E48 lea r31, ptr [r22+r19*2+0x48] +XDIS 2f6ca: MISC BASE D57C8D7C5F49 lea r31, ptr [r23+r19*2+0x49] +XDIS 2f6d0: MISC BASE D57D8D7C584A lea r31, ptr [r24+r19*2+0x4a] +XDIS 2f6d6: MISC BASE D57D8D7C594B lea r31, ptr [r25+r19*2+0x4b] +XDIS 2f6dc: MISC BASE D57D8D7C5A4C lea r31, ptr [r26+r19*2+0x4c] +XDIS 2f6e2: MISC BASE D57D8D7C5B4D lea r31, ptr [r27+r19*2+0x4d] +XDIS 2f6e8: MISC BASE D57D8D7C5C4E lea r31, ptr [r28+r19*2+0x4e] +XDIS 2f6ee: MISC BASE D57D8D7C5D4F lea r31, ptr [r29+r19*2+0x4f] +XDIS 2f6f4: MISC BASE D57D8D7C5E50 lea r31, ptr [r30+r19*2+0x50] +XDIS 2f6fa: MISC BASE D57D8D7C5F51 lea r31, ptr [r31+r19*2+0x51] +XDIS 2f700: MISC BASE D56C8D7C6033 lea r31, ptr [rax+r20*2+0x33] +XDIS 2f706: MISC BASE D56C8D7C6134 lea r31, ptr [rcx+r20*2+0x34] +XDIS 2f70c: MISC BASE D56C8D7C6235 lea r31, ptr [rdx+r20*2+0x35] +XDIS 2f712: MISC BASE D56C8D7C6336 lea r31, ptr [rbx+r20*2+0x36] +XDIS 2f718: MISC BASE D56C8D7C6437 lea r31, ptr [rsp+r20*2+0x37] +XDIS 2f71e: MISC BASE D56C8D7C6538 lea r31, ptr [rbp+r20*2+0x38] +XDIS 2f724: MISC BASE D56C8D7C6639 lea r31, ptr [rsi+r20*2+0x39] +XDIS 2f72a: MISC BASE D56C8D7C673A lea r31, ptr [rdi+r20*2+0x3a] +XDIS 2f730: MISC BASE D56D8D7C603B lea r31, ptr [r8+r20*2+0x3b] +XDIS 2f736: MISC BASE D56D8D7C613C lea r31, ptr [r9+r20*2+0x3c] +XDIS 2f73c: MISC BASE D56D8D7C623D lea r31, ptr [r10+r20*2+0x3d] +XDIS 2f742: MISC BASE D56D8D7C633E lea r31, ptr [r11+r20*2+0x3e] +XDIS 2f748: MISC BASE D56D8D7C643F lea r31, ptr [r12+r20*2+0x3f] +XDIS 2f74e: MISC BASE D56D8D7C6540 lea r31, ptr [r13+r20*2+0x40] +XDIS 2f754: MISC BASE D56D8D7C6641 lea r31, ptr [r14+r20*2+0x41] +XDIS 2f75a: MISC BASE D56D8D7C6742 lea r31, ptr [r15+r20*2+0x42] +XDIS 2f760: MISC BASE D57C8D7C6043 lea r31, ptr [r16+r20*2+0x43] +XDIS 2f766: MISC BASE D57C8D7C6144 lea r31, ptr [r17+r20*2+0x44] +XDIS 2f76c: MISC BASE D57C8D7C6245 lea r31, ptr [r18+r20*2+0x45] +XDIS 2f772: MISC BASE D57C8D7C6346 lea r31, ptr [r19+r20*2+0x46] +XDIS 2f778: MISC BASE D57C8D7C6447 lea r31, ptr [r20+r20*2+0x47] +XDIS 2f77e: MISC BASE D57C8D7C6548 lea r31, ptr [r21+r20*2+0x48] +XDIS 2f784: MISC BASE D57C8D7C6649 lea r31, ptr [r22+r20*2+0x49] +XDIS 2f78a: MISC BASE D57C8D7C674A lea r31, ptr [r23+r20*2+0x4a] +XDIS 2f790: MISC BASE D57D8D7C604B lea r31, ptr [r24+r20*2+0x4b] +XDIS 2f796: MISC BASE D57D8D7C614C lea r31, ptr [r25+r20*2+0x4c] +XDIS 2f79c: MISC BASE D57D8D7C624D lea r31, ptr [r26+r20*2+0x4d] +XDIS 2f7a2: MISC BASE D57D8D7C634E lea r31, ptr [r27+r20*2+0x4e] +XDIS 2f7a8: MISC BASE D57D8D7C644F lea r31, ptr [r28+r20*2+0x4f] +XDIS 2f7ae: MISC BASE D57D8D7C6550 lea r31, ptr [r29+r20*2+0x50] +XDIS 2f7b4: MISC BASE D57D8D7C6651 lea r31, ptr [r30+r20*2+0x51] +XDIS 2f7ba: MISC BASE D57D8D7C6752 lea r31, ptr [r31+r20*2+0x52] +XDIS 2f7c0: MISC BASE D56C8D7C6834 lea r31, ptr [rax+r21*2+0x34] +XDIS 2f7c6: MISC BASE D56C8D7C6935 lea r31, ptr [rcx+r21*2+0x35] +XDIS 2f7cc: MISC BASE D56C8D7C6A36 lea r31, ptr [rdx+r21*2+0x36] +XDIS 2f7d2: MISC BASE D56C8D7C6B37 lea r31, ptr [rbx+r21*2+0x37] +XDIS 2f7d8: MISC BASE D56C8D7C6C38 lea r31, ptr [rsp+r21*2+0x38] +XDIS 2f7de: MISC BASE D56C8D7C6D39 lea r31, ptr [rbp+r21*2+0x39] +XDIS 2f7e4: MISC BASE D56C8D7C6E3A lea r31, ptr [rsi+r21*2+0x3a] +XDIS 2f7ea: MISC BASE D56C8D7C6F3B lea r31, ptr [rdi+r21*2+0x3b] +XDIS 2f7f0: MISC BASE D56D8D7C683C lea r31, ptr [r8+r21*2+0x3c] +XDIS 2f7f6: MISC BASE D56D8D7C693D lea r31, ptr [r9+r21*2+0x3d] +XDIS 2f7fc: MISC BASE D56D8D7C6A3E lea r31, ptr [r10+r21*2+0x3e] +XDIS 2f802: MISC BASE D56D8D7C6B3F lea r31, ptr [r11+r21*2+0x3f] +XDIS 2f808: MISC BASE D56D8D7C6C40 lea r31, ptr [r12+r21*2+0x40] +XDIS 2f80e: MISC BASE D56D8D7C6D41 lea r31, ptr [r13+r21*2+0x41] +XDIS 2f814: MISC BASE D56D8D7C6E42 lea r31, ptr [r14+r21*2+0x42] +XDIS 2f81a: MISC BASE D56D8D7C6F43 lea r31, ptr [r15+r21*2+0x43] +XDIS 2f820: MISC BASE D57C8D7C6844 lea r31, ptr [r16+r21*2+0x44] +XDIS 2f826: MISC BASE D57C8D7C6945 lea r31, ptr [r17+r21*2+0x45] +XDIS 2f82c: MISC BASE D57C8D7C6A46 lea r31, ptr [r18+r21*2+0x46] +XDIS 2f832: MISC BASE D57C8D7C6B47 lea r31, ptr [r19+r21*2+0x47] +XDIS 2f838: MISC BASE D57C8D7C6C48 lea r31, ptr [r20+r21*2+0x48] +XDIS 2f83e: MISC BASE D57C8D7C6D49 lea r31, ptr [r21+r21*2+0x49] +XDIS 2f844: MISC BASE D57C8D7C6E4A lea r31, ptr [r22+r21*2+0x4a] +XDIS 2f84a: MISC BASE D57C8D7C6F4B lea r31, ptr [r23+r21*2+0x4b] +XDIS 2f850: MISC BASE D57D8D7C684C lea r31, ptr [r24+r21*2+0x4c] +XDIS 2f856: MISC BASE D57D8D7C694D lea r31, ptr [r25+r21*2+0x4d] +XDIS 2f85c: MISC BASE D57D8D7C6A4E lea r31, ptr [r26+r21*2+0x4e] +XDIS 2f862: MISC BASE D57D8D7C6B4F lea r31, ptr [r27+r21*2+0x4f] +XDIS 2f868: MISC BASE D57D8D7C6C50 lea r31, ptr [r28+r21*2+0x50] +XDIS 2f86e: MISC BASE D57D8D7C6D51 lea r31, ptr [r29+r21*2+0x51] +XDIS 2f874: MISC BASE D57D8D7C6E52 lea r31, ptr [r30+r21*2+0x52] +XDIS 2f87a: MISC BASE D57D8D7C6F53 lea r31, ptr [r31+r21*2+0x53] +XDIS 2f880: MISC BASE D56C8D7C7035 lea r31, ptr [rax+r22*2+0x35] +XDIS 2f886: MISC BASE D56C8D7C7136 lea r31, ptr [rcx+r22*2+0x36] +XDIS 2f88c: MISC BASE D56C8D7C7237 lea r31, ptr [rdx+r22*2+0x37] +XDIS 2f892: MISC BASE D56C8D7C7338 lea r31, ptr [rbx+r22*2+0x38] +XDIS 2f898: MISC BASE D56C8D7C7439 lea r31, ptr [rsp+r22*2+0x39] +XDIS 2f89e: MISC BASE D56C8D7C753A lea r31, ptr [rbp+r22*2+0x3a] +XDIS 2f8a4: MISC BASE D56C8D7C763B lea r31, ptr [rsi+r22*2+0x3b] +XDIS 2f8aa: MISC BASE D56C8D7C773C lea r31, ptr [rdi+r22*2+0x3c] +XDIS 2f8b0: MISC BASE D56D8D7C703D lea r31, ptr [r8+r22*2+0x3d] +XDIS 2f8b6: MISC BASE D56D8D7C713E lea r31, ptr [r9+r22*2+0x3e] +XDIS 2f8bc: MISC BASE D56D8D7C723F lea r31, ptr [r10+r22*2+0x3f] +XDIS 2f8c2: MISC BASE D56D8D7C7340 lea r31, ptr [r11+r22*2+0x40] +XDIS 2f8c8: MISC BASE D56D8D7C7441 lea r31, ptr [r12+r22*2+0x41] +XDIS 2f8ce: MISC BASE D56D8D7C7542 lea r31, ptr [r13+r22*2+0x42] +XDIS 2f8d4: MISC BASE D56D8D7C7643 lea r31, ptr [r14+r22*2+0x43] +XDIS 2f8da: MISC BASE D56D8D7C7744 lea r31, ptr [r15+r22*2+0x44] +XDIS 2f8e0: MISC BASE D57C8D7C7045 lea r31, ptr [r16+r22*2+0x45] +XDIS 2f8e6: MISC BASE D57C8D7C7146 lea r31, ptr [r17+r22*2+0x46] +XDIS 2f8ec: MISC BASE D57C8D7C7247 lea r31, ptr [r18+r22*2+0x47] +XDIS 2f8f2: MISC BASE D57C8D7C7348 lea r31, ptr [r19+r22*2+0x48] +XDIS 2f8f8: MISC BASE D57C8D7C7449 lea r31, ptr [r20+r22*2+0x49] +XDIS 2f8fe: MISC BASE D57C8D7C754A lea r31, ptr [r21+r22*2+0x4a] +XDIS 2f904: MISC BASE D57C8D7C764B lea r31, ptr [r22+r22*2+0x4b] +XDIS 2f90a: MISC BASE D57C8D7C774C lea r31, ptr [r23+r22*2+0x4c] +XDIS 2f910: MISC BASE D57D8D7C704D lea r31, ptr [r24+r22*2+0x4d] +XDIS 2f916: MISC BASE D57D8D7C714E lea r31, ptr [r25+r22*2+0x4e] +XDIS 2f91c: MISC BASE D57D8D7C724F lea r31, ptr [r26+r22*2+0x4f] +XDIS 2f922: MISC BASE D57D8D7C7350 lea r31, ptr [r27+r22*2+0x50] +XDIS 2f928: MISC BASE D57D8D7C7451 lea r31, ptr [r28+r22*2+0x51] +XDIS 2f92e: MISC BASE D57D8D7C7552 lea r31, ptr [r29+r22*2+0x52] +XDIS 2f934: MISC BASE D57D8D7C7653 lea r31, ptr [r30+r22*2+0x53] +XDIS 2f93a: MISC BASE D57D8D7C7754 lea r31, ptr [r31+r22*2+0x54] +XDIS 2f940: MISC BASE D56C8D7C7836 lea r31, ptr [rax+r23*2+0x36] +XDIS 2f946: MISC BASE D56C8D7C7937 lea r31, ptr [rcx+r23*2+0x37] +XDIS 2f94c: MISC BASE D56C8D7C7A38 lea r31, ptr [rdx+r23*2+0x38] +XDIS 2f952: MISC BASE D56C8D7C7B39 lea r31, ptr [rbx+r23*2+0x39] +XDIS 2f958: MISC BASE D56C8D7C7C3A lea r31, ptr [rsp+r23*2+0x3a] +XDIS 2f95e: MISC BASE D56C8D7C7D3B lea r31, ptr [rbp+r23*2+0x3b] +XDIS 2f964: MISC BASE D56C8D7C7E3C lea r31, ptr [rsi+r23*2+0x3c] +XDIS 2f96a: MISC BASE D56C8D7C7F3D lea r31, ptr [rdi+r23*2+0x3d] +XDIS 2f970: MISC BASE D56D8D7C783E lea r31, ptr [r8+r23*2+0x3e] +XDIS 2f976: MISC BASE D56D8D7C793F lea r31, ptr [r9+r23*2+0x3f] +XDIS 2f97c: MISC BASE D56D8D7C7A40 lea r31, ptr [r10+r23*2+0x40] +XDIS 2f982: MISC BASE D56D8D7C7B41 lea r31, ptr [r11+r23*2+0x41] +XDIS 2f988: MISC BASE D56D8D7C7C42 lea r31, ptr [r12+r23*2+0x42] +XDIS 2f98e: MISC BASE D56D8D7C7D43 lea r31, ptr [r13+r23*2+0x43] +XDIS 2f994: MISC BASE D56D8D7C7E44 lea r31, ptr [r14+r23*2+0x44] +XDIS 2f99a: MISC BASE D56D8D7C7F45 lea r31, ptr [r15+r23*2+0x45] +XDIS 2f9a0: MISC BASE D57C8D7C7846 lea r31, ptr [r16+r23*2+0x46] +XDIS 2f9a6: MISC BASE D57C8D7C7947 lea r31, ptr [r17+r23*2+0x47] +XDIS 2f9ac: MISC BASE D57C8D7C7A48 lea r31, ptr [r18+r23*2+0x48] +XDIS 2f9b2: MISC BASE D57C8D7C7B49 lea r31, ptr [r19+r23*2+0x49] +XDIS 2f9b8: MISC BASE D57C8D7C7C4A lea r31, ptr [r20+r23*2+0x4a] +XDIS 2f9be: MISC BASE D57C8D7C7D4B lea r31, ptr [r21+r23*2+0x4b] +XDIS 2f9c4: MISC BASE D57C8D7C7E4C lea r31, ptr [r22+r23*2+0x4c] +XDIS 2f9ca: MISC BASE D57C8D7C7F4D lea r31, ptr [r23+r23*2+0x4d] +XDIS 2f9d0: MISC BASE D57D8D7C784E lea r31, ptr [r24+r23*2+0x4e] +XDIS 2f9d6: MISC BASE D57D8D7C794F lea r31, ptr [r25+r23*2+0x4f] +XDIS 2f9dc: MISC BASE D57D8D7C7A50 lea r31, ptr [r26+r23*2+0x50] +XDIS 2f9e2: MISC BASE D57D8D7C7B51 lea r31, ptr [r27+r23*2+0x51] +XDIS 2f9e8: MISC BASE D57D8D7C7C52 lea r31, ptr [r28+r23*2+0x52] +XDIS 2f9ee: MISC BASE D57D8D7C7D53 lea r31, ptr [r29+r23*2+0x53] +XDIS 2f9f4: MISC BASE D57D8D7C7E54 lea r31, ptr [r30+r23*2+0x54] +XDIS 2f9fa: MISC BASE D57D8D7C7F55 lea r31, ptr [r31+r23*2+0x55] +XDIS 2fa00: MISC BASE D56E8D7C4037 lea r31, ptr [rax+r24*2+0x37] +XDIS 2fa06: MISC BASE D56E8D7C4138 lea r31, ptr [rcx+r24*2+0x38] +XDIS 2fa0c: MISC BASE D56E8D7C4239 lea r31, ptr [rdx+r24*2+0x39] +XDIS 2fa12: MISC BASE D56E8D7C433A lea r31, ptr [rbx+r24*2+0x3a] +XDIS 2fa18: MISC BASE D56E8D7C443B lea r31, ptr [rsp+r24*2+0x3b] +XDIS 2fa1e: MISC BASE D56E8D7C453C lea r31, ptr [rbp+r24*2+0x3c] +XDIS 2fa24: MISC BASE D56E8D7C463D lea r31, ptr [rsi+r24*2+0x3d] +XDIS 2fa2a: MISC BASE D56E8D7C473E lea r31, ptr [rdi+r24*2+0x3e] +XDIS 2fa30: MISC BASE D56F8D7C403F lea r31, ptr [r8+r24*2+0x3f] +XDIS 2fa36: MISC BASE D56F8D7C4140 lea r31, ptr [r9+r24*2+0x40] +XDIS 2fa3c: MISC BASE D56F8D7C4241 lea r31, ptr [r10+r24*2+0x41] +XDIS 2fa42: MISC BASE D56F8D7C4342 lea r31, ptr [r11+r24*2+0x42] +XDIS 2fa48: MISC BASE D56F8D7C4443 lea r31, ptr [r12+r24*2+0x43] +XDIS 2fa4e: MISC BASE D56F8D7C4544 lea r31, ptr [r13+r24*2+0x44] +XDIS 2fa54: MISC BASE D56F8D7C4645 lea r31, ptr [r14+r24*2+0x45] +XDIS 2fa5a: MISC BASE D56F8D7C4746 lea r31, ptr [r15+r24*2+0x46] +XDIS 2fa60: MISC BASE D57E8D7C4047 lea r31, ptr [r16+r24*2+0x47] +XDIS 2fa66: MISC BASE D57E8D7C4148 lea r31, ptr [r17+r24*2+0x48] +XDIS 2fa6c: MISC BASE D57E8D7C4249 lea r31, ptr [r18+r24*2+0x49] +XDIS 2fa72: MISC BASE D57E8D7C434A lea r31, ptr [r19+r24*2+0x4a] +XDIS 2fa78: MISC BASE D57E8D7C444B lea r31, ptr [r20+r24*2+0x4b] +XDIS 2fa7e: MISC BASE D57E8D7C454C lea r31, ptr [r21+r24*2+0x4c] +XDIS 2fa84: MISC BASE D57E8D7C464D lea r31, ptr [r22+r24*2+0x4d] +XDIS 2fa8a: MISC BASE D57E8D7C474E lea r31, ptr [r23+r24*2+0x4e] +XDIS 2fa90: MISC BASE D57F8D7C404F lea r31, ptr [r24+r24*2+0x4f] +XDIS 2fa96: MISC BASE D57F8D7C4150 lea r31, ptr [r25+r24*2+0x50] +XDIS 2fa9c: MISC BASE D57F8D7C4251 lea r31, ptr [r26+r24*2+0x51] +XDIS 2faa2: MISC BASE D57F8D7C4352 lea r31, ptr [r27+r24*2+0x52] +XDIS 2faa8: MISC BASE D57F8D7C4453 lea r31, ptr [r28+r24*2+0x53] +XDIS 2faae: MISC BASE D57F8D7C4554 lea r31, ptr [r29+r24*2+0x54] +XDIS 2fab4: MISC BASE D57F8D7C4655 lea r31, ptr [r30+r24*2+0x55] +XDIS 2faba: MISC BASE D57F8D7C4756 lea r31, ptr [r31+r24*2+0x56] +XDIS 2fac0: MISC BASE D56E8D7C4838 lea r31, ptr [rax+r25*2+0x38] +XDIS 2fac6: MISC BASE D56E8D7C4939 lea r31, ptr [rcx+r25*2+0x39] +XDIS 2facc: MISC BASE D56E8D7C4A3A lea r31, ptr [rdx+r25*2+0x3a] +XDIS 2fad2: MISC BASE D56E8D7C4B3B lea r31, ptr [rbx+r25*2+0x3b] +XDIS 2fad8: MISC BASE D56E8D7C4C3C lea r31, ptr [rsp+r25*2+0x3c] +XDIS 2fade: MISC BASE D56E8D7C4D3D lea r31, ptr [rbp+r25*2+0x3d] +XDIS 2fae4: MISC BASE D56E8D7C4E3E lea r31, ptr [rsi+r25*2+0x3e] +XDIS 2faea: MISC BASE D56E8D7C4F3F lea r31, ptr [rdi+r25*2+0x3f] +XDIS 2faf0: MISC BASE D56F8D7C4840 lea r31, ptr [r8+r25*2+0x40] +XDIS 2faf6: MISC BASE D56F8D7C4941 lea r31, ptr [r9+r25*2+0x41] +XDIS 2fafc: MISC BASE D56F8D7C4A42 lea r31, ptr [r10+r25*2+0x42] +XDIS 2fb02: MISC BASE D56F8D7C4B43 lea r31, ptr [r11+r25*2+0x43] +XDIS 2fb08: MISC BASE D56F8D7C4C44 lea r31, ptr [r12+r25*2+0x44] +XDIS 2fb0e: MISC BASE D56F8D7C4D45 lea r31, ptr [r13+r25*2+0x45] +XDIS 2fb14: MISC BASE D56F8D7C4E46 lea r31, ptr [r14+r25*2+0x46] +XDIS 2fb1a: MISC BASE D56F8D7C4F47 lea r31, ptr [r15+r25*2+0x47] +XDIS 2fb20: MISC BASE D57E8D7C4848 lea r31, ptr [r16+r25*2+0x48] +XDIS 2fb26: MISC BASE D57E8D7C4949 lea r31, ptr [r17+r25*2+0x49] +XDIS 2fb2c: MISC BASE D57E8D7C4A4A lea r31, ptr [r18+r25*2+0x4a] +XDIS 2fb32: MISC BASE D57E8D7C4B4B lea r31, ptr [r19+r25*2+0x4b] +XDIS 2fb38: MISC BASE D57E8D7C4C4C lea r31, ptr [r20+r25*2+0x4c] +XDIS 2fb3e: MISC BASE D57E8D7C4D4D lea r31, ptr [r21+r25*2+0x4d] +XDIS 2fb44: MISC BASE D57E8D7C4E4E lea r31, ptr [r22+r25*2+0x4e] +XDIS 2fb4a: MISC BASE D57E8D7C4F4F lea r31, ptr [r23+r25*2+0x4f] +XDIS 2fb50: MISC BASE D57F8D7C4850 lea r31, ptr [r24+r25*2+0x50] +XDIS 2fb56: MISC BASE D57F8D7C4951 lea r31, ptr [r25+r25*2+0x51] +XDIS 2fb5c: MISC BASE D57F8D7C4A52 lea r31, ptr [r26+r25*2+0x52] +XDIS 2fb62: MISC BASE D57F8D7C4B53 lea r31, ptr [r27+r25*2+0x53] +XDIS 2fb68: MISC BASE D57F8D7C4C54 lea r31, ptr [r28+r25*2+0x54] +XDIS 2fb6e: MISC BASE D57F8D7C4D55 lea r31, ptr [r29+r25*2+0x55] +XDIS 2fb74: MISC BASE D57F8D7C4E56 lea r31, ptr [r30+r25*2+0x56] +XDIS 2fb7a: MISC BASE D57F8D7C4F57 lea r31, ptr [r31+r25*2+0x57] +XDIS 2fb80: MISC BASE D56E8D7C5039 lea r31, ptr [rax+r26*2+0x39] +XDIS 2fb86: MISC BASE D56E8D7C513A lea r31, ptr [rcx+r26*2+0x3a] +XDIS 2fb8c: MISC BASE D56E8D7C523B lea r31, ptr [rdx+r26*2+0x3b] +XDIS 2fb92: MISC BASE D56E8D7C533C lea r31, ptr [rbx+r26*2+0x3c] +XDIS 2fb98: MISC BASE D56E8D7C543D lea r31, ptr [rsp+r26*2+0x3d] +XDIS 2fb9e: MISC BASE D56E8D7C553E lea r31, ptr [rbp+r26*2+0x3e] +XDIS 2fba4: MISC BASE D56E8D7C563F lea r31, ptr [rsi+r26*2+0x3f] +XDIS 2fbaa: MISC BASE D56E8D7C5740 lea r31, ptr [rdi+r26*2+0x40] +XDIS 2fbb0: MISC BASE D56F8D7C5041 lea r31, ptr [r8+r26*2+0x41] +XDIS 2fbb6: MISC BASE D56F8D7C5142 lea r31, ptr [r9+r26*2+0x42] +XDIS 2fbbc: MISC BASE D56F8D7C5243 lea r31, ptr [r10+r26*2+0x43] +XDIS 2fbc2: MISC BASE D56F8D7C5344 lea r31, ptr [r11+r26*2+0x44] +XDIS 2fbc8: MISC BASE D56F8D7C5445 lea r31, ptr [r12+r26*2+0x45] +XDIS 2fbce: MISC BASE D56F8D7C5546 lea r31, ptr [r13+r26*2+0x46] +XDIS 2fbd4: MISC BASE D56F8D7C5647 lea r31, ptr [r14+r26*2+0x47] +XDIS 2fbda: MISC BASE D56F8D7C5748 lea r31, ptr [r15+r26*2+0x48] +XDIS 2fbe0: MISC BASE D57E8D7C5049 lea r31, ptr [r16+r26*2+0x49] +XDIS 2fbe6: MISC BASE D57E8D7C514A lea r31, ptr [r17+r26*2+0x4a] +XDIS 2fbec: MISC BASE D57E8D7C524B lea r31, ptr [r18+r26*2+0x4b] +XDIS 2fbf2: MISC BASE D57E8D7C534C lea r31, ptr [r19+r26*2+0x4c] +XDIS 2fbf8: MISC BASE D57E8D7C544D lea r31, ptr [r20+r26*2+0x4d] +XDIS 2fbfe: MISC BASE D57E8D7C554E lea r31, ptr [r21+r26*2+0x4e] +XDIS 2fc04: MISC BASE D57E8D7C564F lea r31, ptr [r22+r26*2+0x4f] +XDIS 2fc0a: MISC BASE D57E8D7C5750 lea r31, ptr [r23+r26*2+0x50] +XDIS 2fc10: MISC BASE D57F8D7C5051 lea r31, ptr [r24+r26*2+0x51] +XDIS 2fc16: MISC BASE D57F8D7C5152 lea r31, ptr [r25+r26*2+0x52] +XDIS 2fc1c: MISC BASE D57F8D7C5253 lea r31, ptr [r26+r26*2+0x53] +XDIS 2fc22: MISC BASE D57F8D7C5354 lea r31, ptr [r27+r26*2+0x54] +XDIS 2fc28: MISC BASE D57F8D7C5455 lea r31, ptr [r28+r26*2+0x55] +XDIS 2fc2e: MISC BASE D57F8D7C5556 lea r31, ptr [r29+r26*2+0x56] +XDIS 2fc34: MISC BASE D57F8D7C5657 lea r31, ptr [r30+r26*2+0x57] +XDIS 2fc3a: MISC BASE D57F8D7C5758 lea r31, ptr [r31+r26*2+0x58] +XDIS 2fc40: MISC BASE D56E8D7C583A lea r31, ptr [rax+r27*2+0x3a] +XDIS 2fc46: MISC BASE D56E8D7C593B lea r31, ptr [rcx+r27*2+0x3b] +XDIS 2fc4c: MISC BASE D56E8D7C5A3C lea r31, ptr [rdx+r27*2+0x3c] +XDIS 2fc52: MISC BASE D56E8D7C5B3D lea r31, ptr [rbx+r27*2+0x3d] +XDIS 2fc58: MISC BASE D56E8D7C5C3E lea r31, ptr [rsp+r27*2+0x3e] +XDIS 2fc5e: MISC BASE D56E8D7C5D3F lea r31, ptr [rbp+r27*2+0x3f] +XDIS 2fc64: MISC BASE D56E8D7C5E40 lea r31, ptr [rsi+r27*2+0x40] +XDIS 2fc6a: MISC BASE D56E8D7C5F41 lea r31, ptr [rdi+r27*2+0x41] +XDIS 2fc70: MISC BASE D56F8D7C5842 lea r31, ptr [r8+r27*2+0x42] +XDIS 2fc76: MISC BASE D56F8D7C5943 lea r31, ptr [r9+r27*2+0x43] +XDIS 2fc7c: MISC BASE D56F8D7C5A44 lea r31, ptr [r10+r27*2+0x44] +XDIS 2fc82: MISC BASE D56F8D7C5B45 lea r31, ptr [r11+r27*2+0x45] +XDIS 2fc88: MISC BASE D56F8D7C5C46 lea r31, ptr [r12+r27*2+0x46] +XDIS 2fc8e: MISC BASE D56F8D7C5D47 lea r31, ptr [r13+r27*2+0x47] +XDIS 2fc94: MISC BASE D56F8D7C5E48 lea r31, ptr [r14+r27*2+0x48] +XDIS 2fc9a: MISC BASE D56F8D7C5F49 lea r31, ptr [r15+r27*2+0x49] +XDIS 2fca0: MISC BASE D57E8D7C584A lea r31, ptr [r16+r27*2+0x4a] +XDIS 2fca6: MISC BASE D57E8D7C594B lea r31, ptr [r17+r27*2+0x4b] +XDIS 2fcac: MISC BASE D57E8D7C5A4C lea r31, ptr [r18+r27*2+0x4c] +XDIS 2fcb2: MISC BASE D57E8D7C5B4D lea r31, ptr [r19+r27*2+0x4d] +XDIS 2fcb8: MISC BASE D57E8D7C5C4E lea r31, ptr [r20+r27*2+0x4e] +XDIS 2fcbe: MISC BASE D57E8D7C5D4F lea r31, ptr [r21+r27*2+0x4f] +XDIS 2fcc4: MISC BASE D57E8D7C5E50 lea r31, ptr [r22+r27*2+0x50] +XDIS 2fcca: MISC BASE D57E8D7C5F51 lea r31, ptr [r23+r27*2+0x51] +XDIS 2fcd0: MISC BASE D57F8D7C5852 lea r31, ptr [r24+r27*2+0x52] +XDIS 2fcd6: MISC BASE D57F8D7C5953 lea r31, ptr [r25+r27*2+0x53] +XDIS 2fcdc: MISC BASE D57F8D7C5A54 lea r31, ptr [r26+r27*2+0x54] +XDIS 2fce2: MISC BASE D57F8D7C5B55 lea r31, ptr [r27+r27*2+0x55] +XDIS 2fce8: MISC BASE D57F8D7C5C56 lea r31, ptr [r28+r27*2+0x56] +XDIS 2fcee: MISC BASE D57F8D7C5D57 lea r31, ptr [r29+r27*2+0x57] +XDIS 2fcf4: MISC BASE D57F8D7C5E58 lea r31, ptr [r30+r27*2+0x58] +XDIS 2fcfa: MISC BASE D57F8D7C5F59 lea r31, ptr [r31+r27*2+0x59] +XDIS 2fd00: MISC BASE D56E8D7C603B lea r31, ptr [rax+r28*2+0x3b] +XDIS 2fd06: MISC BASE D56E8D7C613C lea r31, ptr [rcx+r28*2+0x3c] +XDIS 2fd0c: MISC BASE D56E8D7C623D lea r31, ptr [rdx+r28*2+0x3d] +XDIS 2fd12: MISC BASE D56E8D7C633E lea r31, ptr [rbx+r28*2+0x3e] +XDIS 2fd18: MISC BASE D56E8D7C643F lea r31, ptr [rsp+r28*2+0x3f] +XDIS 2fd1e: MISC BASE D56E8D7C6540 lea r31, ptr [rbp+r28*2+0x40] +XDIS 2fd24: MISC BASE D56E8D7C6641 lea r31, ptr [rsi+r28*2+0x41] +XDIS 2fd2a: MISC BASE D56E8D7C6742 lea r31, ptr [rdi+r28*2+0x42] +XDIS 2fd30: MISC BASE D56F8D7C6043 lea r31, ptr [r8+r28*2+0x43] +XDIS 2fd36: MISC BASE D56F8D7C6144 lea r31, ptr [r9+r28*2+0x44] +XDIS 2fd3c: MISC BASE D56F8D7C6245 lea r31, ptr [r10+r28*2+0x45] +XDIS 2fd42: MISC BASE D56F8D7C6346 lea r31, ptr [r11+r28*2+0x46] +XDIS 2fd48: MISC BASE D56F8D7C6447 lea r31, ptr [r12+r28*2+0x47] +XDIS 2fd4e: MISC BASE D56F8D7C6548 lea r31, ptr [r13+r28*2+0x48] +XDIS 2fd54: MISC BASE D56F8D7C6649 lea r31, ptr [r14+r28*2+0x49] +XDIS 2fd5a: MISC BASE D56F8D7C674A lea r31, ptr [r15+r28*2+0x4a] +XDIS 2fd60: MISC BASE D57E8D7C604B lea r31, ptr [r16+r28*2+0x4b] +XDIS 2fd66: MISC BASE D57E8D7C614C lea r31, ptr [r17+r28*2+0x4c] +XDIS 2fd6c: MISC BASE D57E8D7C624D lea r31, ptr [r18+r28*2+0x4d] +XDIS 2fd72: MISC BASE D57E8D7C634E lea r31, ptr [r19+r28*2+0x4e] +XDIS 2fd78: MISC BASE D57E8D7C644F lea r31, ptr [r20+r28*2+0x4f] +XDIS 2fd7e: MISC BASE D57E8D7C6550 lea r31, ptr [r21+r28*2+0x50] +XDIS 2fd84: MISC BASE D57E8D7C6651 lea r31, ptr [r22+r28*2+0x51] +XDIS 2fd8a: MISC BASE D57E8D7C6752 lea r31, ptr [r23+r28*2+0x52] +XDIS 2fd90: MISC BASE D57F8D7C6053 lea r31, ptr [r24+r28*2+0x53] +XDIS 2fd96: MISC BASE D57F8D7C6154 lea r31, ptr [r25+r28*2+0x54] +XDIS 2fd9c: MISC BASE D57F8D7C6255 lea r31, ptr [r26+r28*2+0x55] +XDIS 2fda2: MISC BASE D57F8D7C6356 lea r31, ptr [r27+r28*2+0x56] +XDIS 2fda8: MISC BASE D57F8D7C6457 lea r31, ptr [r28+r28*2+0x57] +XDIS 2fdae: MISC BASE D57F8D7C6558 lea r31, ptr [r29+r28*2+0x58] +XDIS 2fdb4: MISC BASE D57F8D7C6659 lea r31, ptr [r30+r28*2+0x59] +XDIS 2fdba: MISC BASE D57F8D7C675A lea r31, ptr [r31+r28*2+0x5a] +XDIS 2fdc0: MISC BASE D56E8D7C683C lea r31, ptr [rax+r29*2+0x3c] +XDIS 2fdc6: MISC BASE D56E8D7C693D lea r31, ptr [rcx+r29*2+0x3d] +XDIS 2fdcc: MISC BASE D56E8D7C6A3E lea r31, ptr [rdx+r29*2+0x3e] +XDIS 2fdd2: MISC BASE D56E8D7C6B3F lea r31, ptr [rbx+r29*2+0x3f] +XDIS 2fdd8: MISC BASE D56E8D7C6C40 lea r31, ptr [rsp+r29*2+0x40] +XDIS 2fdde: MISC BASE D56E8D7C6D41 lea r31, ptr [rbp+r29*2+0x41] +XDIS 2fde4: MISC BASE D56E8D7C6E42 lea r31, ptr [rsi+r29*2+0x42] +XDIS 2fdea: MISC BASE D56E8D7C6F43 lea r31, ptr [rdi+r29*2+0x43] +XDIS 2fdf0: MISC BASE D56F8D7C6844 lea r31, ptr [r8+r29*2+0x44] +XDIS 2fdf6: MISC BASE D56F8D7C6945 lea r31, ptr [r9+r29*2+0x45] +XDIS 2fdfc: MISC BASE D56F8D7C6A46 lea r31, ptr [r10+r29*2+0x46] +XDIS 2fe02: MISC BASE D56F8D7C6B47 lea r31, ptr [r11+r29*2+0x47] +XDIS 2fe08: MISC BASE D56F8D7C6C48 lea r31, ptr [r12+r29*2+0x48] +XDIS 2fe0e: MISC BASE D56F8D7C6D49 lea r31, ptr [r13+r29*2+0x49] +XDIS 2fe14: MISC BASE D56F8D7C6E4A lea r31, ptr [r14+r29*2+0x4a] +XDIS 2fe1a: MISC BASE D56F8D7C6F4B lea r31, ptr [r15+r29*2+0x4b] +XDIS 2fe20: MISC BASE D57E8D7C684C lea r31, ptr [r16+r29*2+0x4c] +XDIS 2fe26: MISC BASE D57E8D7C694D lea r31, ptr [r17+r29*2+0x4d] +XDIS 2fe2c: MISC BASE D57E8D7C6A4E lea r31, ptr [r18+r29*2+0x4e] +XDIS 2fe32: MISC BASE D57E8D7C6B4F lea r31, ptr [r19+r29*2+0x4f] +XDIS 2fe38: MISC BASE D57E8D7C6C50 lea r31, ptr [r20+r29*2+0x50] +XDIS 2fe3e: MISC BASE D57E8D7C6D51 lea r31, ptr [r21+r29*2+0x51] +XDIS 2fe44: MISC BASE D57E8D7C6E52 lea r31, ptr [r22+r29*2+0x52] +XDIS 2fe4a: MISC BASE D57E8D7C6F53 lea r31, ptr [r23+r29*2+0x53] +XDIS 2fe50: MISC BASE D57F8D7C6854 lea r31, ptr [r24+r29*2+0x54] +XDIS 2fe56: MISC BASE D57F8D7C6955 lea r31, ptr [r25+r29*2+0x55] +XDIS 2fe5c: MISC BASE D57F8D7C6A56 lea r31, ptr [r26+r29*2+0x56] +XDIS 2fe62: MISC BASE D57F8D7C6B57 lea r31, ptr [r27+r29*2+0x57] +XDIS 2fe68: MISC BASE D57F8D7C6C58 lea r31, ptr [r28+r29*2+0x58] +XDIS 2fe6e: MISC BASE D57F8D7C6D59 lea r31, ptr [r29+r29*2+0x59] +XDIS 2fe74: MISC BASE D57F8D7C6E5A lea r31, ptr [r30+r29*2+0x5a] +XDIS 2fe7a: MISC BASE D57F8D7C6F5B lea r31, ptr [r31+r29*2+0x5b] +XDIS 2fe80: MISC BASE D56E8D7C703D lea r31, ptr [rax+r30*2+0x3d] +XDIS 2fe86: MISC BASE D56E8D7C713E lea r31, ptr [rcx+r30*2+0x3e] +XDIS 2fe8c: MISC BASE D56E8D7C723F lea r31, ptr [rdx+r30*2+0x3f] +XDIS 2fe92: MISC BASE D56E8D7C7340 lea r31, ptr [rbx+r30*2+0x40] +XDIS 2fe98: MISC BASE D56E8D7C7441 lea r31, ptr [rsp+r30*2+0x41] +XDIS 2fe9e: MISC BASE D56E8D7C7542 lea r31, ptr [rbp+r30*2+0x42] +XDIS 2fea4: MISC BASE D56E8D7C7643 lea r31, ptr [rsi+r30*2+0x43] +XDIS 2feaa: MISC BASE D56E8D7C7744 lea r31, ptr [rdi+r30*2+0x44] +XDIS 2feb0: MISC BASE D56F8D7C7045 lea r31, ptr [r8+r30*2+0x45] +XDIS 2feb6: MISC BASE D56F8D7C7146 lea r31, ptr [r9+r30*2+0x46] +XDIS 2febc: MISC BASE D56F8D7C7247 lea r31, ptr [r10+r30*2+0x47] +XDIS 2fec2: MISC BASE D56F8D7C7348 lea r31, ptr [r11+r30*2+0x48] +XDIS 2fec8: MISC BASE D56F8D7C7449 lea r31, ptr [r12+r30*2+0x49] +XDIS 2fece: MISC BASE D56F8D7C754A lea r31, ptr [r13+r30*2+0x4a] +XDIS 2fed4: MISC BASE D56F8D7C764B lea r31, ptr [r14+r30*2+0x4b] +XDIS 2feda: MISC BASE D56F8D7C774C lea r31, ptr [r15+r30*2+0x4c] +XDIS 2fee0: MISC BASE D57E8D7C704D lea r31, ptr [r16+r30*2+0x4d] +XDIS 2fee6: MISC BASE D57E8D7C714E lea r31, ptr [r17+r30*2+0x4e] +XDIS 2feec: MISC BASE D57E8D7C724F lea r31, ptr [r18+r30*2+0x4f] +XDIS 2fef2: MISC BASE D57E8D7C7350 lea r31, ptr [r19+r30*2+0x50] +XDIS 2fef8: MISC BASE D57E8D7C7451 lea r31, ptr [r20+r30*2+0x51] +XDIS 2fefe: MISC BASE D57E8D7C7552 lea r31, ptr [r21+r30*2+0x52] +XDIS 2ff04: MISC BASE D57E8D7C7653 lea r31, ptr [r22+r30*2+0x53] +XDIS 2ff0a: MISC BASE D57E8D7C7754 lea r31, ptr [r23+r30*2+0x54] +XDIS 2ff10: MISC BASE D57F8D7C7055 lea r31, ptr [r24+r30*2+0x55] +XDIS 2ff16: MISC BASE D57F8D7C7156 lea r31, ptr [r25+r30*2+0x56] +XDIS 2ff1c: MISC BASE D57F8D7C7257 lea r31, ptr [r26+r30*2+0x57] +XDIS 2ff22: MISC BASE D57F8D7C7358 lea r31, ptr [r27+r30*2+0x58] +XDIS 2ff28: MISC BASE D57F8D7C7459 lea r31, ptr [r28+r30*2+0x59] +XDIS 2ff2e: MISC BASE D57F8D7C755A lea r31, ptr [r29+r30*2+0x5a] +XDIS 2ff34: MISC BASE D57F8D7C765B lea r31, ptr [r30+r30*2+0x5b] +XDIS 2ff3a: MISC BASE D57F8D7C775C lea r31, ptr [r31+r30*2+0x5c] +XDIS 2ff40: MISC BASE D56E8D7C783E lea r31, ptr [rax+r31*2+0x3e] +XDIS 2ff46: MISC BASE D56E8D7C793F lea r31, ptr [rcx+r31*2+0x3f] +XDIS 2ff4c: MISC BASE D56E8D7C7A40 lea r31, ptr [rdx+r31*2+0x40] +XDIS 2ff52: MISC BASE D56E8D7C7B41 lea r31, ptr [rbx+r31*2+0x41] +XDIS 2ff58: MISC BASE D56E8D7C7C42 lea r31, ptr [rsp+r31*2+0x42] +XDIS 2ff5e: MISC BASE D56E8D7C7D43 lea r31, ptr [rbp+r31*2+0x43] +XDIS 2ff64: MISC BASE D56E8D7C7E44 lea r31, ptr [rsi+r31*2+0x44] +XDIS 2ff6a: MISC BASE D56E8D7C7F45 lea r31, ptr [rdi+r31*2+0x45] +XDIS 2ff70: MISC BASE D56F8D7C7846 lea r31, ptr [r8+r31*2+0x46] +XDIS 2ff76: MISC BASE D56F8D7C7947 lea r31, ptr [r9+r31*2+0x47] +XDIS 2ff7c: MISC BASE D56F8D7C7A48 lea r31, ptr [r10+r31*2+0x48] +XDIS 2ff82: MISC BASE D56F8D7C7B49 lea r31, ptr [r11+r31*2+0x49] +XDIS 2ff88: MISC BASE D56F8D7C7C4A lea r31, ptr [r12+r31*2+0x4a] +XDIS 2ff8e: MISC BASE D56F8D7C7D4B lea r31, ptr [r13+r31*2+0x4b] +XDIS 2ff94: MISC BASE D56F8D7C7E4C lea r31, ptr [r14+r31*2+0x4c] +XDIS 2ff9a: MISC BASE D56F8D7C7F4D lea r31, ptr [r15+r31*2+0x4d] +XDIS 2ffa0: MISC BASE D57E8D7C784E lea r31, ptr [r16+r31*2+0x4e] +XDIS 2ffa6: MISC BASE D57E8D7C794F lea r31, ptr [r17+r31*2+0x4f] +XDIS 2ffac: MISC BASE D57E8D7C7A50 lea r31, ptr [r18+r31*2+0x50] +XDIS 2ffb2: MISC BASE D57E8D7C7B51 lea r31, ptr [r19+r31*2+0x51] +XDIS 2ffb8: MISC BASE D57E8D7C7C52 lea r31, ptr [r20+r31*2+0x52] +XDIS 2ffbe: MISC BASE D57E8D7C7D53 lea r31, ptr [r21+r31*2+0x53] +XDIS 2ffc4: MISC BASE D57E8D7C7E54 lea r31, ptr [r22+r31*2+0x54] +XDIS 2ffca: MISC BASE D57E8D7C7F55 lea r31, ptr [r23+r31*2+0x55] +XDIS 2ffd0: MISC BASE D57F8D7C7856 lea r31, ptr [r24+r31*2+0x56] +XDIS 2ffd6: MISC BASE D57F8D7C7957 lea r31, ptr [r25+r31*2+0x57] +XDIS 2ffdc: MISC BASE D57F8D7C7A58 lea r31, ptr [r26+r31*2+0x58] +XDIS 2ffe2: MISC BASE D57F8D7C7B59 lea r31, ptr [r27+r31*2+0x59] +XDIS 2ffe8: MISC BASE D57F8D7C7C5A lea r31, ptr [r28+r31*2+0x5a] +XDIS 2ffee: MISC BASE D57F8D7C7D5B lea r31, ptr [r29+r31*2+0x5b] +XDIS 2fff4: MISC BASE D57F8D7C7E5C lea r31, ptr [r30+r31*2+0x5c] +XDIS 2fffa: MISC BASE D57F8D7C7F5D lea r31, ptr [r31+r31*2+0x5d] +# end of text section. +# Errors: 0 +#XED3 DECODE STATS +#Total DECODE cycles: 87423304 +#Total instructions DECODE: 32718 +#Total tail DECODE cycles: 87796586 +#Total tail instructions DECODE: 32768 +#Total cycles/instruction DECODE: 2672.02 +#Total tail cycles/instruction DECODE: 2679.34 diff --git a/tests/tests-apx/test-00002/cmd b/tests/tests-apx/test-00002/cmd new file mode 100644 index 00000000..ae7bb6f6 --- /dev/null +++ b/tests/tests-apx/test-00002/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 66d580124C8300 diff --git a/tests/tests-apx/test-00002/codes b/tests/tests-apx/test-00002/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00002/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00002/retcode.reference b/tests/tests-apx/test-00002/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00002/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00002/stderr.reference b/tests/tests-apx/test-00002/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00002/stdout.reference b/tests/tests-apx/test-00002/stdout.reference new file mode 100644 index 00000000..9e06b64a --- /dev/null +++ b/tests/tests-apx/test-00002/stdout.reference @@ -0,0 +1,8 @@ +66D580124C8300 +ICLASS: MOVLPD +CATEGORY: DATAXFER +EXTENSION: SSE2 +IFORM: MOVLPD_XMMsd_MEMq +ISA_SET: SSE2 +ATTRIBUTES: +SHORT: movlpd xmm1, qword ptr [rbx+rax*4] diff --git a/tests/tests-apx/test-00003/cmd b/tests/tests-apx/test-00003/cmd new file mode 100644 index 00000000..8943ea8e --- /dev/null +++ b/tests/tests-apx/test-00003/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 66d5b3124C8301 diff --git a/tests/tests-apx/test-00003/codes b/tests/tests-apx/test-00003/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00003/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00003/retcode.reference b/tests/tests-apx/test-00003/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00003/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00003/stderr.reference b/tests/tests-apx/test-00003/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00003/stdout.reference b/tests/tests-apx/test-00003/stdout.reference new file mode 100644 index 00000000..b6e78abc --- /dev/null +++ b/tests/tests-apx/test-00003/stdout.reference @@ -0,0 +1,8 @@ +66D5B3124C8301 +ICLASS: MOVLPD +CATEGORY: DATAXFER +EXTENSION: SSE2 +IFORM: MOVLPD_XMMsd_MEMq +ISA_SET: SSE2 +ATTRIBUTES: +SHORT: movlpd xmm1, qword ptr [r27+r24*4+0x1] diff --git a/tests/tests-apx/test-00004/cmd b/tests/tests-apx/test-00004/cmd new file mode 100644 index 00000000..62f267ef --- /dev/null +++ b/tests/tests-apx/test-00004/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d50080C401 diff --git a/tests/tests-apx/test-00004/codes b/tests/tests-apx/test-00004/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00004/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00004/retcode.reference b/tests/tests-apx/test-00004/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00004/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00004/stderr.reference b/tests/tests-apx/test-00004/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00004/stdout.reference b/tests/tests-apx/test-00004/stdout.reference new file mode 100644 index 00000000..04516b2d --- /dev/null +++ b/tests/tests-apx/test-00004/stdout.reference @@ -0,0 +1,8 @@ +D50080C401 +ICLASS: ADD +CATEGORY: BINARY +EXTENSION: BASE +IFORM: ADD_GPR8_IMMb_80r0 +ISA_SET: I86 +ATTRIBUTES: BYTEOP +SHORT: add spl, 0x1 diff --git a/tests/tests-apx/test-00005/cmd b/tests/tests-apx/test-00005/cmd new file mode 100644 index 00000000..3cb313e5 --- /dev/null +++ b/tests/tests-apx/test-00005/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 66d5C0124C8300 diff --git a/tests/tests-apx/test-00005/codes b/tests/tests-apx/test-00005/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00005/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00005/retcode.reference b/tests/tests-apx/test-00005/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00005/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00005/stderr.reference b/tests/tests-apx/test-00005/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00005/stdout.reference b/tests/tests-apx/test-00005/stdout.reference new file mode 100644 index 00000000..9fa061c5 --- /dev/null +++ b/tests/tests-apx/test-00005/stdout.reference @@ -0,0 +1,8 @@ +66D5C0124C8300 +ICLASS: MOVLPD +CATEGORY: DATAXFER +EXTENSION: SSE2 +IFORM: MOVLPD_XMMsd_MEMq +ISA_SET: SSE2 +ATTRIBUTES: +SHORT: movlpd xmm1, qword ptr [rbx+rax*4] diff --git a/tests/tests-apx/test-00006/cmd b/tests/tests-apx/test-00006/cmd new file mode 100644 index 00000000..2019a7ec --- /dev/null +++ b/tests/tests-apx/test-00006/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 440f2203 diff --git a/tests/tests-apx/test-00006/codes b/tests/tests-apx/test-00006/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00006/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00006/retcode.reference b/tests/tests-apx/test-00006/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00006/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00006/stderr.reference b/tests/tests-apx/test-00006/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00006/stdout.reference b/tests/tests-apx/test-00006/stdout.reference new file mode 100644 index 00000000..27a3a1b2 --- /dev/null +++ b/tests/tests-apx/test-00006/stdout.reference @@ -0,0 +1,8 @@ +440F2203 +ICLASS: MOV_CR +CATEGORY: DATAXFER +EXTENSION: BASE +IFORM: MOV_CR_CR_GPR64 +ISA_SET: I86 +ATTRIBUTES: NOTSX RING0 +SHORT: mov cr8, rbx diff --git a/tests/tests-apx/test-00007/cmd b/tests/tests-apx/test-00007/cmd new file mode 100644 index 00000000..b28e53a7 --- /dev/null +++ b/tests/tests-apx/test-00007/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d5842203 diff --git a/tests/tests-apx/test-00007/codes b/tests/tests-apx/test-00007/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00007/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00007/retcode.reference b/tests/tests-apx/test-00007/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00007/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00007/stderr.reference b/tests/tests-apx/test-00007/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00007/stdout.reference b/tests/tests-apx/test-00007/stdout.reference new file mode 100644 index 00000000..84de6eb9 --- /dev/null +++ b/tests/tests-apx/test-00007/stdout.reference @@ -0,0 +1,8 @@ +D5842203 +ICLASS: MOV_CR +CATEGORY: DATAXFER +EXTENSION: BASE +IFORM: MOV_CR_CR_GPR64 +ISA_SET: I86 +ATTRIBUTES: NOTSX RING0 +SHORT: mov cr8, rbx diff --git a/tests/tests-apx/test-00008/cmd b/tests/tests-apx/test-00008/cmd new file mode 100644 index 00000000..cfc5ff63 --- /dev/null +++ b/tests/tests-apx/test-00008/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d5c42203 diff --git a/tests/tests-apx/test-00008/codes b/tests/tests-apx/test-00008/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00008/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00008/retcode.reference b/tests/tests-apx/test-00008/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00008/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00008/stderr.reference b/tests/tests-apx/test-00008/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00008/stdout.reference b/tests/tests-apx/test-00008/stdout.reference new file mode 100644 index 00000000..9d78aaf9 --- /dev/null +++ b/tests/tests-apx/test-00008/stdout.reference @@ -0,0 +1,2 @@ +D5C42203 +ERROR: BAD_REGISTER Could not decode at offset: 0x0 len: 4 PC: 0x0: [D5C42203] diff --git a/tests/tests-apx/test-00009/cmd b/tests/tests-apx/test-00009/cmd new file mode 100644 index 00000000..12606c07 --- /dev/null +++ b/tests/tests-apx/test-00009/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d f36467d598aef7 diff --git a/tests/tests-apx/test-00009/codes b/tests/tests-apx/test-00009/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00009/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00009/retcode.reference b/tests/tests-apx/test-00009/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00009/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00009/stderr.reference b/tests/tests-apx/test-00009/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00009/stdout.reference b/tests/tests-apx/test-00009/stdout.reference new file mode 100644 index 00000000..bc40c582 --- /dev/null +++ b/tests/tests-apx/test-00009/stdout.reference @@ -0,0 +1,8 @@ +F36467D598AEF7 +ICLASS: UMONITOR +CATEGORY: WAITPKG +EXTENSION: WAITPKG +IFORM: UMONITOR_GPRa +ISA_SET: WAITPKG +ATTRIBUTES: NOTSX +SHORT: addr32 umonitor r23d diff --git a/tests/tests-apx/test-00010/cmd b/tests/tests-apx/test-00010/cmd new file mode 100644 index 00000000..b0f92511 --- /dev/null +++ b/tests/tests-apx/test-00010/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 66d5cdc5db08 diff --git a/tests/tests-apx/test-00010/codes b/tests/tests-apx/test-00010/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00010/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00010/retcode.reference b/tests/tests-apx/test-00010/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00010/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00010/stderr.reference b/tests/tests-apx/test-00010/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00010/stdout.reference b/tests/tests-apx/test-00010/stdout.reference new file mode 100644 index 00000000..254d7002 --- /dev/null +++ b/tests/tests-apx/test-00010/stdout.reference @@ -0,0 +1,8 @@ +66D5CDC5DB08 +ICLASS: PEXTRW +CATEGORY: SSE +EXTENSION: SSE2 +IFORM: PEXTRW_GPR32_XMMdq_IMMb +ISA_SET: SSE2 +ATTRIBUTES: +SHORT: pextrw r27d, xmm11, 0x8 diff --git a/tests/tests-apx/test-00011/cmd b/tests/tests-apx/test-00011/cmd new file mode 100644 index 00000000..9fa0284e --- /dev/null +++ b/tests/tests-apx/test-00011/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d598c4fe77 diff --git a/tests/tests-apx/test-00011/codes b/tests/tests-apx/test-00011/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00011/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00011/retcode.reference b/tests/tests-apx/test-00011/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00011/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00011/stderr.reference b/tests/tests-apx/test-00011/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00011/stdout.reference b/tests/tests-apx/test-00011/stdout.reference new file mode 100644 index 00000000..220e04c9 --- /dev/null +++ b/tests/tests-apx/test-00011/stdout.reference @@ -0,0 +1,8 @@ +D598C4FE77 +ICLASS: PINSRW +CATEGORY: MMX +EXTENSION: MMX +IFORM: PINSRW_MMXq_GPR32_IMMb +ISA_SET: PENTIUMMMX +ATTRIBUTES: NOTSX +SHORT: pinsrw mm7, r22d, 0x77 diff --git a/tests/tests-apx/test-00012/cmd b/tests/tests-apx/test-00012/cmd new file mode 100644 index 00000000..d107f635 --- /dev/null +++ b/tests/tests-apx/test-00012/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d5986212 diff --git a/tests/tests-apx/test-00012/codes b/tests/tests-apx/test-00012/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00012/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00012/retcode.reference b/tests/tests-apx/test-00012/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00012/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00012/stderr.reference b/tests/tests-apx/test-00012/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00012/stdout.reference b/tests/tests-apx/test-00012/stdout.reference new file mode 100644 index 00000000..18b09f92 --- /dev/null +++ b/tests/tests-apx/test-00012/stdout.reference @@ -0,0 +1,8 @@ +D5986212 +ICLASS: PUNPCKLDQ +CATEGORY: MMX +EXTENSION: MMX +IFORM: PUNPCKLDQ_MMXq_MEMd +ISA_SET: PENTIUMMMX +ATTRIBUTES: NOTSX +SHORT: punpckldq mm2, dword ptr [r18] diff --git a/tests/tests-apx/test-00013/cmd b/tests/tests-apx/test-00013/cmd new file mode 100644 index 00000000..af6db421 --- /dev/null +++ b/tests/tests-apx/test-00013/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d51890 diff --git a/tests/tests-apx/test-00013/codes b/tests/tests-apx/test-00013/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00013/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00013/retcode.reference b/tests/tests-apx/test-00013/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00013/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00013/stderr.reference b/tests/tests-apx/test-00013/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00013/stdout.reference b/tests/tests-apx/test-00013/stdout.reference new file mode 100644 index 00000000..f4568f90 --- /dev/null +++ b/tests/tests-apx/test-00013/stdout.reference @@ -0,0 +1,8 @@ +D51890 +ICLASS: XCHG +CATEGORY: DATAXFER +EXTENSION: BASE +IFORM: XCHG_GPRv_OrAX +ISA_SET: I86 +ATTRIBUTES: SCALABLE +SHORT: xchg r16, rax diff --git a/tests/tests-apx/test-00014/cmd b/tests/tests-apx/test-00014/cmd new file mode 100644 index 00000000..a87ffeda --- /dev/null +++ b/tests/tests-apx/test-00014/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d50190 diff --git a/tests/tests-apx/test-00014/codes b/tests/tests-apx/test-00014/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00014/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00014/retcode.reference b/tests/tests-apx/test-00014/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00014/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00014/stderr.reference b/tests/tests-apx/test-00014/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00014/stdout.reference b/tests/tests-apx/test-00014/stdout.reference new file mode 100644 index 00000000..91f111fb --- /dev/null +++ b/tests/tests-apx/test-00014/stdout.reference @@ -0,0 +1,8 @@ +D50190 +ICLASS: XCHG +CATEGORY: DATAXFER +EXTENSION: BASE +IFORM: XCHG_GPRv_OrAX +ISA_SET: I86 +ATTRIBUTES: SCALABLE +SHORT: xchg r8d, eax diff --git a/tests/tests-apx/test-00015/cmd b/tests/tests-apx/test-00015/cmd new file mode 100644 index 00000000..59bb6c63 --- /dev/null +++ b/tests/tests-apx/test-00015/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d50890 diff --git a/tests/tests-apx/test-00015/codes b/tests/tests-apx/test-00015/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00015/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00015/retcode.reference b/tests/tests-apx/test-00015/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00015/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00015/stderr.reference b/tests/tests-apx/test-00015/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00015/stdout.reference b/tests/tests-apx/test-00015/stdout.reference new file mode 100644 index 00000000..237944c2 --- /dev/null +++ b/tests/tests-apx/test-00015/stdout.reference @@ -0,0 +1,8 @@ +D50890 +ICLASS: NOP +CATEGORY: NOP +EXTENSION: BASE +IFORM: NOP_90 +ISA_SET: I86 +ATTRIBUTES: NOP +SHORT: nop diff --git a/tests/tests-apx/test-00016/cmd b/tests/tests-apx/test-00016/cmd new file mode 100644 index 00000000..c6b66358 --- /dev/null +++ b/tests/tests-apx/test-00016/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 0fae2411 diff --git a/tests/tests-apx/test-00016/codes b/tests/tests-apx/test-00016/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00016/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00016/retcode.reference b/tests/tests-apx/test-00016/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00016/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00016/stderr.reference b/tests/tests-apx/test-00016/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00016/stdout.reference b/tests/tests-apx/test-00016/stdout.reference new file mode 100644 index 00000000..4fcbf6fa --- /dev/null +++ b/tests/tests-apx/test-00016/stdout.reference @@ -0,0 +1,8 @@ +0FAE2411 +ICLASS: XSAVE +CATEGORY: XSAVE +EXTENSION: XSAVE +IFORM: XSAVE_MEMmxsave +ISA_SET: XSAVE +ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT SPECIAL_AGEN_REQUIRED X87_MMX_STATE_R XMM_STATE_R +SHORT: xsave ptr [rcx+rdx*1] diff --git a/tests/tests-apx/test-00017/cmd b/tests/tests-apx/test-00017/cmd new file mode 100644 index 00000000..37bdc895 --- /dev/null +++ b/tests/tests-apx/test-00017/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 4b0fae2411 diff --git a/tests/tests-apx/test-00017/codes b/tests/tests-apx/test-00017/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00017/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00017/retcode.reference b/tests/tests-apx/test-00017/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00017/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00017/stderr.reference b/tests/tests-apx/test-00017/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00017/stdout.reference b/tests/tests-apx/test-00017/stdout.reference new file mode 100644 index 00000000..b7427290 --- /dev/null +++ b/tests/tests-apx/test-00017/stdout.reference @@ -0,0 +1,8 @@ +4B0FAE2411 +ICLASS: XSAVE64 +CATEGORY: XSAVE +EXTENSION: XSAVE +IFORM: XSAVE64_MEMmxsave +ISA_SET: XSAVE +ATTRIBUTES: NOTSX REQUIRES_ALIGNMENT SPECIAL_AGEN_REQUIRED X87_MMX_STATE_R XMM_STATE_R +SHORT: xsave64 ptr [r9+r10*1] diff --git a/tests/tests-apx/test-00018/cmd b/tests/tests-apx/test-00018/cmd new file mode 100644 index 00000000..bff9c775 --- /dev/null +++ b/tests/tests-apx/test-00018/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d588ae2411 diff --git a/tests/tests-apx/test-00018/codes b/tests/tests-apx/test-00018/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00018/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00018/retcode.reference b/tests/tests-apx/test-00018/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00018/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00018/stderr.reference b/tests/tests-apx/test-00018/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00018/stdout.reference b/tests/tests-apx/test-00018/stdout.reference new file mode 100644 index 00000000..534e8286 --- /dev/null +++ b/tests/tests-apx/test-00018/stdout.reference @@ -0,0 +1,2 @@ +D588AE2411 +ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 5 PC: 0x0: [D588AE2411] diff --git a/tests/tests-apx/test-00019/cmd b/tests/tests-apx/test-00019/cmd new file mode 100644 index 00000000..0bd3ea34 --- /dev/null +++ b/tests/tests-apx/test-00019/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d d5 00 a4 diff --git a/tests/tests-apx/test-00019/codes b/tests/tests-apx/test-00019/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00019/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00019/retcode.reference b/tests/tests-apx/test-00019/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00019/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00019/stderr.reference b/tests/tests-apx/test-00019/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00019/stdout.reference b/tests/tests-apx/test-00019/stdout.reference new file mode 100644 index 00000000..d35b08ce --- /dev/null +++ b/tests/tests-apx/test-00019/stdout.reference @@ -0,0 +1,2 @@ +D500A4 +ERROR: BAD_REX2_PREFIX Could not decode at offset: 0x0 len: 3 PC: 0x0: [D500A4] diff --git a/tests/tests-apx/test-00020/cmd b/tests/tests-apx/test-00020/cmd new file mode 100644 index 00000000..b338c62f --- /dev/null +++ b/tests/tests-apx/test-00020/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -set NO_APX 1 -d d5 84 67 0f diff --git a/tests/tests-apx/test-00020/codes b/tests/tests-apx/test-00020/codes new file mode 100644 index 00000000..205f2c13 --- /dev/null +++ b/tests/tests-apx/test-00020/codes @@ -0,0 +1 @@ +DEC diff --git a/tests/tests-apx/test-00020/retcode.reference b/tests/tests-apx/test-00020/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00020/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00020/stderr.reference b/tests/tests-apx/test-00020/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00020/stdout.reference b/tests/tests-apx/test-00020/stdout.reference new file mode 100644 index 00000000..3d5887b6 --- /dev/null +++ b/tests/tests-apx/test-00020/stdout.reference @@ -0,0 +1,2 @@ +D584670F +ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 2 PC: 0x0: [D584] diff --git a/tests/tests-apx/test-00021/cmd b/tests/tests-apx/test-00021/cmd new file mode 100644 index 00000000..f92cdcc5 --- /dev/null +++ b/tests/tests-apx/test-00021/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62B1E10A580C38 diff --git a/tests/tests-apx/test-00021/codes b/tests/tests-apx/test-00021/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00021/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00021/retcode.reference b/tests/tests-apx/test-00021/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00021/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00021/stderr.reference b/tests/tests-apx/test-00021/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00021/stdout.reference b/tests/tests-apx/test-00021/stdout.reference new file mode 100644 index 00000000..82a0beb1 --- /dev/null +++ b/tests/tests-apx/test-00021/stdout.reference @@ -0,0 +1,8 @@ +62B1E10A580C38 +ICLASS: VADDPD +CATEGORY: AVX512 +EXTENSION: AVX512EVEX +IFORM: VADDPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 +ISA_SET: AVX512F_128 +ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR +SHORT: vaddpd xmm1{k2}, xmm3, xmmword ptr [rax+r31*1] diff --git a/tests/tests-apx/test-00022/cmd b/tests/tests-apx/test-00022/cmd new file mode 100644 index 00000000..13779680 --- /dev/null +++ b/tests/tests-apx/test-00022/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62D9742854041f diff --git a/tests/tests-apx/test-00022/codes b/tests/tests-apx/test-00022/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00022/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00022/retcode.reference b/tests/tests-apx/test-00022/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00022/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00022/stderr.reference b/tests/tests-apx/test-00022/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00022/stdout.reference b/tests/tests-apx/test-00022/stdout.reference new file mode 100644 index 00000000..266828d1 --- /dev/null +++ b/tests/tests-apx/test-00022/stdout.reference @@ -0,0 +1,8 @@ +62D9742854041F +ICLASS: VANDPS +CATEGORY: LOGICAL_FP +EXTENSION: AVX512EVEX +IFORM: VANDPS_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 +ISA_SET: AVX512DQ_256 +ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION +SHORT: vandps ymm0, ymm1, ymmword ptr [r31+rbx*1] diff --git a/tests/tests-apx/test-00023/cmd b/tests/tests-apx/test-00023/cmd new file mode 100644 index 00000000..a1c7029a --- /dev/null +++ b/tests/tests-apx/test-00023/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62DB7D0814C706 diff --git a/tests/tests-apx/test-00023/codes b/tests/tests-apx/test-00023/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00023/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00023/retcode.reference b/tests/tests-apx/test-00023/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00023/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00023/stderr.reference b/tests/tests-apx/test-00023/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00023/stdout.reference b/tests/tests-apx/test-00023/stdout.reference new file mode 100644 index 00000000..b5b5624f --- /dev/null +++ b/tests/tests-apx/test-00023/stdout.reference @@ -0,0 +1,8 @@ +62DB7D0814C706 +ICLASS: VPEXTRB +CATEGORY: AVX512 +EXTENSION: AVX512EVEX +IFORM: VPEXTRB_GPR32u8_XMMu8_IMM8_AVX512 +ISA_SET: AVX512BW_128N +ATTRIBUTES: +SHORT: vpextrb r31d, xmm0, 0x6 diff --git a/tests/tests-apx/test-00024/cmd b/tests/tests-apx/test-00024/cmd new file mode 100644 index 00000000..04e2539c --- /dev/null +++ b/tests/tests-apx/test-00024/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62B9E10A580C38 diff --git a/tests/tests-apx/test-00024/codes b/tests/tests-apx/test-00024/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00024/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00024/retcode.reference b/tests/tests-apx/test-00024/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00024/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00024/stderr.reference b/tests/tests-apx/test-00024/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00024/stdout.reference b/tests/tests-apx/test-00024/stdout.reference new file mode 100644 index 00000000..82680aa6 --- /dev/null +++ b/tests/tests-apx/test-00024/stdout.reference @@ -0,0 +1,8 @@ +62B9E10A580C38 +ICLASS: VADDPD +CATEGORY: AVX512 +EXTENSION: AVX512EVEX +IFORM: VADDPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 +ISA_SET: AVX512F_128 +ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR +SHORT: vaddpd xmm1{k2}, xmm3, xmmword ptr [r16+r31*1] diff --git a/tests/tests-apx/test-00025/cmd b/tests/tests-apx/test-00025/cmd new file mode 100644 index 00000000..4e2e7519 --- /dev/null +++ b/tests/tests-apx/test-00025/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 6265FE082DC0 diff --git a/tests/tests-apx/test-00025/codes b/tests/tests-apx/test-00025/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00025/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00025/retcode.reference b/tests/tests-apx/test-00025/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00025/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00025/stderr.reference b/tests/tests-apx/test-00025/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00025/stdout.reference b/tests/tests-apx/test-00025/stdout.reference new file mode 100644 index 00000000..38c48148 --- /dev/null +++ b/tests/tests-apx/test-00025/stdout.reference @@ -0,0 +1,8 @@ +6265FE082DC0 +ICLASS: VCVTSH2SI +CATEGORY: CONVERT +EXTENSION: AVX512EVEX +IFORM: VCVTSH2SI_GPR64i64_XMMf16_AVX512 +ISA_SET: AVX512_FP16_SCALAR +ATTRIBUTES: MXCSR SIMD_SCALAR +SHORT: vcvtsh2si r24, xmm0 diff --git a/tests/tests-apx/test-00026/cmd b/tests/tests-apx/test-00026/cmd new file mode 100644 index 00000000..e3378cc0 --- /dev/null +++ b/tests/tests-apx/test-00026/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62fa7d49a02c00 diff --git a/tests/tests-apx/test-00026/codes b/tests/tests-apx/test-00026/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00026/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00026/retcode.reference b/tests/tests-apx/test-00026/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00026/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00026/stderr.reference b/tests/tests-apx/test-00026/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00026/stdout.reference b/tests/tests-apx/test-00026/stdout.reference new file mode 100644 index 00000000..dbb1866e --- /dev/null +++ b/tests/tests-apx/test-00026/stdout.reference @@ -0,0 +1,8 @@ +62FA7D49A02C00 +ICLASS: VPSCATTERDD +CATEGORY: SCATTER +EXTENSION: AVX512EVEX +IFORM: VPSCATTERDD_MEMu32_MASKmskw_ZMMu32_AVX512_VL512 +ISA_SET: AVX512F_512 +ATTRIBUTES: DISP8_GSCAT DWORD_INDICES MASKOP_EVEX MEMORY_FAULT_SUPPRESSION SCATTER SPECIAL_AGEN_REQUIRED +SHORT: vpscatterdd dword ptr [r16+zmm0*1], k1, zmm5 diff --git a/tests/tests-apx/test-00027/cmd b/tests/tests-apx/test-00027/cmd new file mode 100644 index 00000000..2bb3424f --- /dev/null +++ b/tests/tests-apx/test-00027/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -set NO_APX 1 -d 6265FE082DC0 diff --git a/tests/tests-apx/test-00027/codes b/tests/tests-apx/test-00027/codes new file mode 100644 index 00000000..205f2c13 --- /dev/null +++ b/tests/tests-apx/test-00027/codes @@ -0,0 +1 @@ +DEC diff --git a/tests/tests-apx/test-00027/retcode.reference b/tests/tests-apx/test-00027/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00027/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00027/stderr.reference b/tests/tests-apx/test-00027/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00027/stdout.reference b/tests/tests-apx/test-00027/stdout.reference new file mode 100644 index 00000000..860954cd --- /dev/null +++ b/tests/tests-apx/test-00027/stdout.reference @@ -0,0 +1,2 @@ +6265FE082DC0 +ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 6 PC: 0x0: [6265FE082DC0] diff --git a/tests/tests-apx/test-00028/cmd b/tests/tests-apx/test-00028/cmd new file mode 100644 index 00000000..00316f55 --- /dev/null +++ b/tests/tests-apx/test-00028/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -set NO_APX 1 -d 62 61 fa 48 7a f7 diff --git a/tests/tests-apx/test-00028/codes b/tests/tests-apx/test-00028/codes new file mode 100644 index 00000000..205f2c13 --- /dev/null +++ b/tests/tests-apx/test-00028/codes @@ -0,0 +1 @@ +DEC diff --git a/tests/tests-apx/test-00028/retcode.reference b/tests/tests-apx/test-00028/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00028/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00028/stderr.reference b/tests/tests-apx/test-00028/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00028/stdout.reference b/tests/tests-apx/test-00028/stdout.reference new file mode 100644 index 00000000..c6bc48da --- /dev/null +++ b/tests/tests-apx/test-00028/stdout.reference @@ -0,0 +1,2 @@ +6261FA487AF7 +ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 6 PC: 0x0: [6261FA487AF7] diff --git a/tests/tests-apx/test-00029/cmd b/tests/tests-apx/test-00029/cmd new file mode 100644 index 00000000..74c3d026 --- /dev/null +++ b/tests/tests-apx/test-00029/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -isa-set -ih TESTDIR/../gen-enc-layer-apx-f.txt diff --git a/tests/tests-apx/test-00029/codes b/tests/tests-apx/test-00029/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00029/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00029/retcode.reference b/tests/tests-apx/test-00029/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00029/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00029/stderr.reference b/tests/tests-apx/test-00029/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00029/stdout.reference b/tests/tests-apx/test-00029/stdout.reference new file mode 100644 index 00000000..86936b7a --- /dev/null +++ b/tests/tests-apx/test-00029/stdout.reference @@ -0,0 +1,4140 @@ +XDIS 0: BINARY APXEVEX APX_F 62547C0810C8 adc r8b, r9b +XDIS 6: BINARY APXEVEX APX_F 62547C081008 adc byte ptr [r8], r9b +XDIS c: BINARY APXEVEX APX_F 62D43D1883D102 adc r8w, r9w, 0x2 +XDIS 13: BINARY APXEVEX APX_F 62D4BD1883D102 adc r8, r9, 0x2 +XDIS 1a: BINARY APXEVEX APX_F 62D43D18831102 adc r8w, word ptr [r9], 0x2 +XDIS 21: BINARY APXEVEX APX_F 62D4BD18831102 adc r8, qword ptr [r9], 0x2 +XDIS 28: BINARY APXEVEX APX_F 62543C1810D1 adc r8b, r9b, r10b +XDIS 2e: BINARY APXEVEX APX_F 62543C181011 adc r8b, byte ptr [r9], r10b +XDIS 34: BINARY APXEVEX APX_F 62547C0811C8 adc r8d, r9d +XDIS 3a: BINARY APXEVEX APX_F 6254FC0811C8 adc r8, r9 +XDIS 40: BINARY APXEVEX APX_F 62547C081108 adc dword ptr [r8], r9d +XDIS 46: BINARY APXEVEX APX_F 6254FC081108 adc qword ptr [r8], r9 +XDIS 4c: BINARY APXEVEX APX_F 62547D0811C8 adc r8w, r9w +XDIS 52: BINARY APXEVEX APX_F 6254FD0811C8 adc r8, r9 +XDIS 58: BINARY APXEVEX APX_F 62547D081108 adc word ptr [r8], r9w +XDIS 5e: BINARY APXEVEX APX_F 6254FD081108 adc qword ptr [r8], r9 +XDIS 64: BINARY APXEVEX APX_F 62543C1811D1 adc r8d, r9d, r10d +XDIS 6a: BINARY APXEVEX APX_F 6254BC1811D1 adc r8, r9, r10 +XDIS 70: BINARY APXEVEX APX_F 62543C181111 adc r8d, dword ptr [r9], r10d +XDIS 76: BINARY APXEVEX APX_F 6254BC181111 adc r8, qword ptr [r9], r10 +XDIS 7c: BINARY APXEVEX APX_F 62543D1811D1 adc r8w, r9w, r10w +XDIS 82: BINARY APXEVEX APX_F 6254BD1811D1 adc r8, r9, r10 +XDIS 88: BINARY APXEVEX APX_F 62543D181111 adc r8w, word ptr [r9], r10w +XDIS 8e: BINARY APXEVEX APX_F 6254BD181111 adc r8, qword ptr [r9], r10 +XDIS 94: BINARY APXEVEX APX_F 62547C0812C8 adc r9b, r8b +XDIS 9a: BINARY APXEVEX APX_F 62547C081201 adc r8b, byte ptr [r9] +XDIS a0: BINARY APXEVEX APX_F 62543C1812D1 adc r8b, r10b, r9b +XDIS a6: BINARY APXEVEX APX_F 62543C18120A adc r8b, r9b, byte ptr [r10] +XDIS ac: BINARY APXEVEX APX_F 62547C0813C8 adc r9d, r8d +XDIS b2: BINARY APXEVEX APX_F 6254FC0813C8 adc r9, r8 +XDIS b8: BINARY APXEVEX APX_F 62547C081301 adc r8d, dword ptr [r9] +XDIS be: BINARY APXEVEX APX_F 6254FC081301 adc r8, qword ptr [r9] +XDIS c4: BINARY APXEVEX APX_F 62547D0813C8 adc r9w, r8w +XDIS ca: BINARY APXEVEX APX_F 6254FD0813C8 adc r9, r8 +XDIS d0: BINARY APXEVEX APX_F 62547D081301 adc r8w, word ptr [r9] +XDIS d6: BINARY APXEVEX APX_F 6254FD081301 adc r8, qword ptr [r9] +XDIS dc: BINARY APXEVEX APX_F 62D43C1880D102 adc r8b, r9b, 0x2 +XDIS e3: BINARY APXEVEX APX_F 62D43C18801102 adc r8b, byte ptr [r9], 0x2 +XDIS ea: BINARY APXEVEX APX_F 62543C1813D1 adc r8d, r10d, r9d +XDIS f0: BINARY APXEVEX APX_F 6254BC1813D1 adc r8, r10, r9 +XDIS f6: BINARY APXEVEX APX_F 62543C18130A adc r8d, r9d, dword ptr [r10] +XDIS fc: BINARY APXEVEX APX_F 6254BC18130A adc r8, r9, qword ptr [r10] +XDIS 102: BINARY APXEVEX APX_F 62543D1813D1 adc r8w, r10w, r9w +XDIS 108: BINARY APXEVEX APX_F 6254BD1813D1 adc r8, r10, r9 +XDIS 10e: BINARY APXEVEX APX_F 62543D18130A adc r8w, r9w, word ptr [r10] +XDIS 114: BINARY APXEVEX APX_F 6254BD18130A adc r8, r9, qword ptr [r10] +XDIS 11a: BINARY APXEVEX APX_F 62D47C0880D002 adc r8b, 0x2 +XDIS 121: BINARY APXEVEX APX_F 62D47C08801002 adc byte ptr [r8], 0x2 +XDIS 128: BINARY APXEVEX APX_F 62D47C0881D002000000 adc r8d, 0x2 +XDIS 132: BINARY APXEVEX APX_F 62D4FC0881D002000000 adc r8, 0x2 +XDIS 13c: BINARY APXEVEX APX_F 62D47C08811002000000 adc dword ptr [r8], 0x2 +XDIS 146: BINARY APXEVEX APX_F 62D4FC08811002000000 adc qword ptr [r8], 0x2 +XDIS 150: BINARY APXEVEX APX_F 62D47D0881D00200 adc r8w, 0x2 +XDIS 158: BINARY APXEVEX APX_F 62D4FD0881D002000000 adc r8, 0x2 +XDIS 162: BINARY APXEVEX APX_F 62D47D0881100200 adc word ptr [r8], 0x2 +XDIS 16a: BINARY APXEVEX APX_F 62D4FD08811002000000 adc qword ptr [r8], 0x2 +XDIS 174: BINARY APXEVEX APX_F 62D43C1881D102000000 adc r8d, r9d, 0x2 +XDIS 17e: BINARY APXEVEX APX_F 62D4BC1881D102000000 adc r8, r9, 0x2 +XDIS 188: BINARY APXEVEX APX_F 62D43C18811102000000 adc r8d, dword ptr [r9], 0x2 +XDIS 192: BINARY APXEVEX APX_F 62D4BC18811102000000 adc r8, qword ptr [r9], 0x2 +XDIS 19c: BINARY APXEVEX APX_F 62D43D1881D10200 adc r8w, r9w, 0x2 +XDIS 1a4: BINARY APXEVEX APX_F 62D4BD1881D102000000 adc r8, r9, 0x2 +XDIS 1ae: BINARY APXEVEX APX_F 62D43D1881110200 adc r8w, word ptr [r9], 0x2 +XDIS 1b6: BINARY APXEVEX APX_F 62D4BD18811102000000 adc r8, qword ptr [r9], 0x2 +XDIS 1c0: BINARY APXEVEX APX_F 62D47C0883D002 adc r8d, 0x2 +XDIS 1c7: BINARY APXEVEX APX_F 62D4FC0883D002 adc r8, 0x2 +XDIS 1ce: BINARY APXEVEX APX_F 62D47C08831002 adc dword ptr [r8], 0x2 +XDIS 1d5: BINARY APXEVEX APX_F 62D4FC08831002 adc qword ptr [r8], 0x2 +XDIS 1dc: BINARY APXEVEX APX_F 62D47D0883D002 adc r8w, 0x2 +XDIS 1e3: BINARY APXEVEX APX_F 62D4FD0883D002 adc r8, 0x2 +XDIS 1ea: BINARY APXEVEX APX_F 62D47D08831002 adc word ptr [r8], 0x2 +XDIS 1f1: BINARY APXEVEX APX_F 62D4FD08831002 adc qword ptr [r8], 0x2 +XDIS 1f8: BINARY APXEVEX APX_F 62D43C1883D102 adc r8d, r9d, 0x2 +XDIS 1ff: BINARY APXEVEX APX_F 62D4BC1883D102 adc r8, r9, 0x2 +XDIS 206: BINARY APXEVEX APX_F 62D43C18831102 adc r8d, dword ptr [r9], 0x2 +XDIS 20d: BINARY APXEVEX APX_F 62D4BC18831102 adc r8, qword ptr [r9], 0x2 +XDIS 214: APX APXEVEX APX_F 62547D0866C1 adcx r8d, r9d +XDIS 21a: APX APXEVEX APX_F 62547D086601 adcx r8d, dword ptr [r9] +XDIS 220: APX APXEVEX APX_F 6254FD0866C1 adcx r8, r9 +XDIS 226: APX APXEVEX APX_F 6254FD086601 adcx r8, qword ptr [r9] +XDIS 22c: APX APXEVEX APX_F 62543D1866CA adcx r8d, r9d, r10d +XDIS 232: APX APXEVEX APX_F 62543D18660A adcx r8d, r9d, dword ptr [r10] +XDIS 238: APX APXEVEX APX_F 6254BD1866CA adcx r8, r9, r10 +XDIS 23e: APX APXEVEX APX_F 6254BD18660A adcx r8, r9, qword ptr [r10] +XDIS 244: BINARY APXEVEX APX_F 62547C0800C8 add r8b, r9b +XDIS 24a: BINARY APXEVEX APX_F 62547C080008 add byte ptr [r8], r9b +XDIS 250: BINARY APXEVEX APX_F 62547C0C00C8 add r8b, r9b +XDIS 256: BINARY APXEVEX APX_F 62547C0C0008 add byte ptr [r8], r9b +XDIS 25c: BINARY APXEVEX APX_F 62D43D1883C102 add r8w, r9w, 0x2 +XDIS 263: BINARY APXEVEX APX_F 62D4BD1883C102 add r8, r9, 0x2 +XDIS 26a: BINARY APXEVEX APX_F 62D43D18830102 add r8w, word ptr [r9], 0x2 +XDIS 271: BINARY APXEVEX APX_F 62D4BD18830102 add r8, qword ptr [r9], 0x2 +XDIS 278: BINARY APXEVEX APX_F 62D43D1C83C102 add r8w, r9w, 0x2 +XDIS 27f: BINARY APXEVEX APX_F 62D4BD1C83C102 add r8, r9, 0x2 +XDIS 286: BINARY APXEVEX APX_F 62D43D1C830102 add r8w, word ptr [r9], 0x2 +XDIS 28d: BINARY APXEVEX APX_F 62D4BD1C830102 add r8, qword ptr [r9], 0x2 +XDIS 294: BINARY APXEVEX APX_F 62543C1800D1 add r8b, r9b, r10b +XDIS 29a: BINARY APXEVEX APX_F 62543C180011 add r8b, byte ptr [r9], r10b +XDIS 2a0: BINARY APXEVEX APX_F 62543C1C00D1 add r8b, r9b, r10b +XDIS 2a6: BINARY APXEVEX APX_F 62543C1C0011 add r8b, byte ptr [r9], r10b +XDIS 2ac: BINARY APXEVEX APX_F 62547C0801C8 add r8d, r9d +XDIS 2b2: BINARY APXEVEX APX_F 6254FC0801C8 add r8, r9 +XDIS 2b8: BINARY APXEVEX APX_F 62547C080108 add dword ptr [r8], r9d +XDIS 2be: BINARY APXEVEX APX_F 6254FC080108 add qword ptr [r8], r9 +XDIS 2c4: BINARY APXEVEX APX_F 62547C0C01C8 add r8d, r9d +XDIS 2ca: BINARY APXEVEX APX_F 6254FC0C01C8 add r8, r9 +XDIS 2d0: BINARY APXEVEX APX_F 62547C0C0108 add dword ptr [r8], r9d +XDIS 2d6: BINARY APXEVEX APX_F 6254FC0C0108 add qword ptr [r8], r9 +XDIS 2dc: BINARY APXEVEX APX_F 62547D0801C8 add r8w, r9w +XDIS 2e2: BINARY APXEVEX APX_F 6254FD0801C8 add r8, r9 +XDIS 2e8: BINARY APXEVEX APX_F 62547D080108 add word ptr [r8], r9w +XDIS 2ee: BINARY APXEVEX APX_F 6254FD080108 add qword ptr [r8], r9 +XDIS 2f4: BINARY APXEVEX APX_F 62547D0C01C8 add r8w, r9w +XDIS 2fa: BINARY APXEVEX APX_F 6254FD0C01C8 add r8, r9 +XDIS 300: BINARY APXEVEX APX_F 62547D0C0108 add word ptr [r8], r9w +XDIS 306: BINARY APXEVEX APX_F 6254FD0C0108 add qword ptr [r8], r9 +XDIS 30c: BINARY APXEVEX APX_F 62543C1801D1 add r8d, r9d, r10d +XDIS 312: BINARY APXEVEX APX_F 6254BC1801D1 add r8, r9, r10 +XDIS 318: BINARY APXEVEX APX_F 62543C180111 add r8d, dword ptr [r9], r10d +XDIS 31e: BINARY APXEVEX APX_F 6254BC180111 add r8, qword ptr [r9], r10 +XDIS 324: BINARY APXEVEX APX_F 62543C1C01D1 add r8d, r9d, r10d +XDIS 32a: BINARY APXEVEX APX_F 6254BC1C01D1 add r8, r9, r10 +XDIS 330: BINARY APXEVEX APX_F 62543C1C0111 add r8d, dword ptr [r9], r10d +XDIS 336: BINARY APXEVEX APX_F 6254BC1C0111 add r8, qword ptr [r9], r10 +XDIS 33c: BINARY APXEVEX APX_F 62543D1801D1 add r8w, r9w, r10w +XDIS 342: BINARY APXEVEX APX_F 6254BD1801D1 add r8, r9, r10 +XDIS 348: BINARY APXEVEX APX_F 62543D180111 add r8w, word ptr [r9], r10w +XDIS 34e: BINARY APXEVEX APX_F 6254BD180111 add r8, qword ptr [r9], r10 +XDIS 354: BINARY APXEVEX APX_F 62543D1C01D1 add r8w, r9w, r10w +XDIS 35a: BINARY APXEVEX APX_F 6254BD1C01D1 add r8, r9, r10 +XDIS 360: BINARY APXEVEX APX_F 62543D1C0111 add r8w, word ptr [r9], r10w +XDIS 366: BINARY APXEVEX APX_F 6254BD1C0111 add r8, qword ptr [r9], r10 +XDIS 36c: BINARY APXEVEX APX_F 62547C0802C8 add r9b, r8b +XDIS 372: BINARY APXEVEX APX_F 62547C080201 add r8b, byte ptr [r9] +XDIS 378: BINARY APXEVEX APX_F 62547C0C02C8 add r9b, r8b +XDIS 37e: BINARY APXEVEX APX_F 62547C0C0201 add r8b, byte ptr [r9] +XDIS 384: BINARY APXEVEX APX_F 62543C1802D1 add r8b, r10b, r9b +XDIS 38a: BINARY APXEVEX APX_F 62543C18020A add r8b, r9b, byte ptr [r10] +XDIS 390: BINARY APXEVEX APX_F 62543C1C02D1 add r8b, r10b, r9b +XDIS 396: BINARY APXEVEX APX_F 62543C1C020A add r8b, r9b, byte ptr [r10] +XDIS 39c: BINARY APXEVEX APX_F 62547C0803C8 add r9d, r8d +XDIS 3a2: BINARY APXEVEX APX_F 6254FC0803C8 add r9, r8 +XDIS 3a8: BINARY APXEVEX APX_F 62547C080301 add r8d, dword ptr [r9] +XDIS 3ae: BINARY APXEVEX APX_F 6254FC080301 add r8, qword ptr [r9] +XDIS 3b4: BINARY APXEVEX APX_F 62547C0C03C8 add r9d, r8d +XDIS 3ba: BINARY APXEVEX APX_F 6254FC0C03C8 add r9, r8 +XDIS 3c0: BINARY APXEVEX APX_F 62547C0C0301 add r8d, dword ptr [r9] +XDIS 3c6: BINARY APXEVEX APX_F 6254FC0C0301 add r8, qword ptr [r9] +XDIS 3cc: BINARY APXEVEX APX_F 62547D0803C8 add r9w, r8w +XDIS 3d2: BINARY APXEVEX APX_F 6254FD0803C8 add r9, r8 +XDIS 3d8: BINARY APXEVEX APX_F 62547D080301 add r8w, word ptr [r9] +XDIS 3de: BINARY APXEVEX APX_F 6254FD080301 add r8, qword ptr [r9] +XDIS 3e4: BINARY APXEVEX APX_F 62547D0C03C8 add r9w, r8w +XDIS 3ea: BINARY APXEVEX APX_F 6254FD0C03C8 add r9, r8 +XDIS 3f0: BINARY APXEVEX APX_F 62547D0C0301 add r8w, word ptr [r9] +XDIS 3f6: BINARY APXEVEX APX_F 6254FD0C0301 add r8, qword ptr [r9] +XDIS 3fc: BINARY APXEVEX APX_F 62D43C1880C102 add r8b, r9b, 0x2 +XDIS 403: BINARY APXEVEX APX_F 62D43C18800102 add r8b, byte ptr [r9], 0x2 +XDIS 40a: BINARY APXEVEX APX_F 62D43C1C80C102 add r8b, r9b, 0x2 +XDIS 411: BINARY APXEVEX APX_F 62D43C1C800102 add r8b, byte ptr [r9], 0x2 +XDIS 418: BINARY APXEVEX APX_F 62543C1803D1 add r8d, r10d, r9d +XDIS 41e: BINARY APXEVEX APX_F 6254BC1803D1 add r8, r10, r9 +XDIS 424: BINARY APXEVEX APX_F 62543C18030A add r8d, r9d, dword ptr [r10] +XDIS 42a: BINARY APXEVEX APX_F 6254BC18030A add r8, r9, qword ptr [r10] +XDIS 430: BINARY APXEVEX APX_F 62543C1C03D1 add r8d, r10d, r9d +XDIS 436: BINARY APXEVEX APX_F 6254BC1C03D1 add r8, r10, r9 +XDIS 43c: BINARY APXEVEX APX_F 62543C1C030A add r8d, r9d, dword ptr [r10] +XDIS 442: BINARY APXEVEX APX_F 6254BC1C030A add r8, r9, qword ptr [r10] +XDIS 448: BINARY APXEVEX APX_F 62543D1803D1 add r8w, r10w, r9w +XDIS 44e: BINARY APXEVEX APX_F 6254BD1803D1 add r8, r10, r9 +XDIS 454: BINARY APXEVEX APX_F 62543D18030A add r8w, r9w, word ptr [r10] +XDIS 45a: BINARY APXEVEX APX_F 6254BD18030A add r8, r9, qword ptr [r10] +XDIS 460: BINARY APXEVEX APX_F 62543D1C03D1 add r8w, r10w, r9w +XDIS 466: BINARY APXEVEX APX_F 6254BD1C03D1 add r8, r10, r9 +XDIS 46c: BINARY APXEVEX APX_F 62543D1C030A add r8w, r9w, word ptr [r10] +XDIS 472: BINARY APXEVEX APX_F 6254BD1C030A add r8, r9, qword ptr [r10] +XDIS 478: BINARY APXEVEX APX_F 62D47C0880C002 add r8b, 0x2 +XDIS 47f: BINARY APXEVEX APX_F 62D47C08800002 add byte ptr [r8], 0x2 +XDIS 486: BINARY APXEVEX APX_F 62D47C0C80C002 add r8b, 0x2 +XDIS 48d: BINARY APXEVEX APX_F 62D47C0C800002 add byte ptr [r8], 0x2 +XDIS 494: BINARY APXEVEX APX_F 62D47C0881C002000000 add r8d, 0x2 +XDIS 49e: BINARY APXEVEX APX_F 62D4FC0881C002000000 add r8, 0x2 +XDIS 4a8: BINARY APXEVEX APX_F 62D47C08810002000000 add dword ptr [r8], 0x2 +XDIS 4b2: BINARY APXEVEX APX_F 62D4FC08810002000000 add qword ptr [r8], 0x2 +XDIS 4bc: BINARY APXEVEX APX_F 62D47C0C81C002000000 add r8d, 0x2 +XDIS 4c6: BINARY APXEVEX APX_F 62D4FC0C81C002000000 add r8, 0x2 +XDIS 4d0: BINARY APXEVEX APX_F 62D47C0C810002000000 add dword ptr [r8], 0x2 +XDIS 4da: BINARY APXEVEX APX_F 62D4FC0C810002000000 add qword ptr [r8], 0x2 +XDIS 4e4: BINARY APXEVEX APX_F 62D47D0881C00200 add r8w, 0x2 +XDIS 4ec: BINARY APXEVEX APX_F 62D4FD0881C002000000 add r8, 0x2 +XDIS 4f6: BINARY APXEVEX APX_F 62D47D0881000200 add word ptr [r8], 0x2 +XDIS 4fe: BINARY APXEVEX APX_F 62D4FD08810002000000 add qword ptr [r8], 0x2 +XDIS 508: BINARY APXEVEX APX_F 62D47D0C81C00200 add r8w, 0x2 +XDIS 510: BINARY APXEVEX APX_F 62D4FD0C81C002000000 add r8, 0x2 +XDIS 51a: BINARY APXEVEX APX_F 62D47D0C81000200 add word ptr [r8], 0x2 +XDIS 522: BINARY APXEVEX APX_F 62D4FD0C810002000000 add qword ptr [r8], 0x2 +XDIS 52c: BINARY APXEVEX APX_F 62D43C1881C102000000 add r8d, r9d, 0x2 +XDIS 536: BINARY APXEVEX APX_F 62D4BC1881C102000000 add r8, r9, 0x2 +XDIS 540: BINARY APXEVEX APX_F 62D43C18810102000000 add r8d, dword ptr [r9], 0x2 +XDIS 54a: BINARY APXEVEX APX_F 62D4BC18810102000000 add r8, qword ptr [r9], 0x2 +XDIS 554: BINARY APXEVEX APX_F 62D43C1C81C102000000 add r8d, r9d, 0x2 +XDIS 55e: BINARY APXEVEX APX_F 62D4BC1C81C102000000 add r8, r9, 0x2 +XDIS 568: BINARY APXEVEX APX_F 62D43C1C810102000000 add r8d, dword ptr [r9], 0x2 +XDIS 572: BINARY APXEVEX APX_F 62D4BC1C810102000000 add r8, qword ptr [r9], 0x2 +XDIS 57c: BINARY APXEVEX APX_F 62D43D1881C10200 add r8w, r9w, 0x2 +XDIS 584: BINARY APXEVEX APX_F 62D4BD1881C102000000 add r8, r9, 0x2 +XDIS 58e: BINARY APXEVEX APX_F 62D43D1881010200 add r8w, word ptr [r9], 0x2 +XDIS 596: BINARY APXEVEX APX_F 62D4BD18810102000000 add r8, qword ptr [r9], 0x2 +XDIS 5a0: BINARY APXEVEX APX_F 62D43D1C81C10200 add r8w, r9w, 0x2 +XDIS 5a8: BINARY APXEVEX APX_F 62D4BD1C81C102000000 add r8, r9, 0x2 +XDIS 5b2: BINARY APXEVEX APX_F 62D43D1C81010200 add r8w, word ptr [r9], 0x2 +XDIS 5ba: BINARY APXEVEX APX_F 62D4BD1C810102000000 add r8, qword ptr [r9], 0x2 +XDIS 5c4: BINARY APXEVEX APX_F 62D47C0883C002 add r8d, 0x2 +XDIS 5cb: BINARY APXEVEX APX_F 62D4FC0883C002 add r8, 0x2 +XDIS 5d2: BINARY APXEVEX APX_F 62D47C08830002 add dword ptr [r8], 0x2 +XDIS 5d9: BINARY APXEVEX APX_F 62D4FC08830002 add qword ptr [r8], 0x2 +XDIS 5e0: BINARY APXEVEX APX_F 62D47C0C83C002 add r8d, 0x2 +XDIS 5e7: BINARY APXEVEX APX_F 62D4FC0C83C002 add r8, 0x2 +XDIS 5ee: BINARY APXEVEX APX_F 62D47C0C830002 add dword ptr [r8], 0x2 +XDIS 5f5: BINARY APXEVEX APX_F 62D4FC0C830002 add qword ptr [r8], 0x2 +XDIS 5fc: BINARY APXEVEX APX_F 62D47D0883C002 add r8w, 0x2 +XDIS 603: BINARY APXEVEX APX_F 62D4FD0883C002 add r8, 0x2 +XDIS 60a: BINARY APXEVEX APX_F 62D47D08830002 add word ptr [r8], 0x2 +XDIS 611: BINARY APXEVEX APX_F 62D4FD08830002 add qword ptr [r8], 0x2 +XDIS 618: BINARY APXEVEX APX_F 62D47D0C83C002 add r8w, 0x2 +XDIS 61f: BINARY APXEVEX APX_F 62D4FD0C83C002 add r8, 0x2 +XDIS 626: BINARY APXEVEX APX_F 62D47D0C830002 add word ptr [r8], 0x2 +XDIS 62d: BINARY APXEVEX APX_F 62D4FD0C830002 add qword ptr [r8], 0x2 +XDIS 634: BINARY APXEVEX APX_F 62D43C1883C102 add r8d, r9d, 0x2 +XDIS 63b: BINARY APXEVEX APX_F 62D4BC1883C102 add r8, r9, 0x2 +XDIS 642: BINARY APXEVEX APX_F 62D43C18830102 add r8d, dword ptr [r9], 0x2 +XDIS 649: BINARY APXEVEX APX_F 62D4BC18830102 add r8, qword ptr [r9], 0x2 +XDIS 650: BINARY APXEVEX APX_F 62D43C1C83C102 add r8d, r9d, 0x2 +XDIS 657: BINARY APXEVEX APX_F 62D4BC1C83C102 add r8, r9, 0x2 +XDIS 65e: BINARY APXEVEX APX_F 62D43C1C830102 add r8d, dword ptr [r9], 0x2 +XDIS 665: BINARY APXEVEX APX_F 62D4BC1C830102 add r8, qword ptr [r9], 0x2 +XDIS 66c: APX APXEVEX APX_F 62547E0866C1 adox r8d, r9d +XDIS 672: APX APXEVEX APX_F 62547E086601 adox r8d, dword ptr [r9] +XDIS 678: APX APXEVEX APX_F 6254FE0866C1 adox r8, r9 +XDIS 67e: APX APXEVEX APX_F 6254FE086601 adox r8, qword ptr [r9] +XDIS 684: APX APXEVEX APX_F 62543E1866CA adox r8d, r9d, r10d +XDIS 68a: APX APXEVEX APX_F 62543E18660A adox r8d, r9d, dword ptr [r10] +XDIS 690: APX APXEVEX APX_F 6254BE1866CA adox r8, r9, r10 +XDIS 696: APX APXEVEX APX_F 6254BE18660A adox r8, r9, qword ptr [r10] +XDIS 69c: KEYLOCKER APXEVEX APX_F 62547E08DD01 aesdec128kl xmm8, ptr [r9] +XDIS 6a2: KEYLOCKER APXEVEX APX_F 62547E08DF01 aesdec256kl xmm8, zmmword ptr [r9] +XDIS 6a8: KEYLOCKER_WIDE APXEVEX APX_F 62D47E08D808 aesdecwide128kl ptr [r8] +XDIS 6ae: KEYLOCKER_WIDE APXEVEX APX_F 62D47E08D818 aesdecwide256kl zmmword ptr [r8] +XDIS 6b4: KEYLOCKER APXEVEX APX_F 62547E08DC01 aesenc128kl xmm8, ptr [r9] +XDIS 6ba: KEYLOCKER APXEVEX APX_F 62547E08DE01 aesenc256kl xmm8, zmmword ptr [r9] +XDIS 6c0: KEYLOCKER_WIDE APXEVEX APX_F 62D47E08D800 aesencwide128kl ptr [r8] +XDIS 6c6: KEYLOCKER_WIDE APXEVEX APX_F 62D47E08D810 aesencwide256kl zmmword ptr [r8] +XDIS 6cc: LOGICAL APXEVEX APX_F 62547C0820C8 and r8b, r9b +XDIS 6d2: LOGICAL APXEVEX APX_F 62547C082008 and byte ptr [r8], r9b +XDIS 6d8: LOGICAL APXEVEX APX_F 62547C0C20C8 and r8b, r9b +XDIS 6de: LOGICAL APXEVEX APX_F 62547C0C2008 and byte ptr [r8], r9b +XDIS 6e4: LOGICAL APXEVEX APX_F 62D43D1883E102 and r8w, r9w, 0x2 +XDIS 6eb: LOGICAL APXEVEX APX_F 62D4BD1883E102 and r8, r9, 0x2 +XDIS 6f2: LOGICAL APXEVEX APX_F 62D43D18832102 and r8w, word ptr [r9], 0x2 +XDIS 6f9: LOGICAL APXEVEX APX_F 62D4BD18832102 and r8, qword ptr [r9], 0x2 +XDIS 700: LOGICAL APXEVEX APX_F 62D43D1C83E102 and r8w, r9w, 0x2 +XDIS 707: LOGICAL APXEVEX APX_F 62D4BD1C83E102 and r8, r9, 0x2 +XDIS 70e: LOGICAL APXEVEX APX_F 62D43D1C832102 and r8w, word ptr [r9], 0x2 +XDIS 715: LOGICAL APXEVEX APX_F 62D4BD1C832102 and r8, qword ptr [r9], 0x2 +XDIS 71c: LOGICAL APXEVEX APX_F 62543C1820D1 and r8b, r9b, r10b +XDIS 722: LOGICAL APXEVEX APX_F 62543C182011 and r8b, byte ptr [r9], r10b +XDIS 728: LOGICAL APXEVEX APX_F 62543C1C20D1 and r8b, r9b, r10b +XDIS 72e: LOGICAL APXEVEX APX_F 62543C1C2011 and r8b, byte ptr [r9], r10b +XDIS 734: LOGICAL APXEVEX APX_F 62547C0821C8 and r8d, r9d +XDIS 73a: LOGICAL APXEVEX APX_F 6254FC0821C8 and r8, r9 +XDIS 740: LOGICAL APXEVEX APX_F 62547C082108 and dword ptr [r8], r9d +XDIS 746: LOGICAL APXEVEX APX_F 6254FC082108 and qword ptr [r8], r9 +XDIS 74c: LOGICAL APXEVEX APX_F 62547C0C21C8 and r8d, r9d +XDIS 752: LOGICAL APXEVEX APX_F 6254FC0C21C8 and r8, r9 +XDIS 758: LOGICAL APXEVEX APX_F 62547C0C2108 and dword ptr [r8], r9d +XDIS 75e: LOGICAL APXEVEX APX_F 6254FC0C2108 and qword ptr [r8], r9 +XDIS 764: LOGICAL APXEVEX APX_F 62547D0821C8 and r8w, r9w +XDIS 76a: LOGICAL APXEVEX APX_F 6254FD0821C8 and r8, r9 +XDIS 770: LOGICAL APXEVEX APX_F 62547D082108 and word ptr [r8], r9w +XDIS 776: LOGICAL APXEVEX APX_F 6254FD082108 and qword ptr [r8], r9 +XDIS 77c: LOGICAL APXEVEX APX_F 62547D0C21C8 and r8w, r9w +XDIS 782: LOGICAL APXEVEX APX_F 6254FD0C21C8 and r8, r9 +XDIS 788: LOGICAL APXEVEX APX_F 62547D0C2108 and word ptr [r8], r9w +XDIS 78e: LOGICAL APXEVEX APX_F 6254FD0C2108 and qword ptr [r8], r9 +XDIS 794: LOGICAL APXEVEX APX_F 62543C1821D1 and r8d, r9d, r10d +XDIS 79a: LOGICAL APXEVEX APX_F 6254BC1821D1 and r8, r9, r10 +XDIS 7a0: LOGICAL APXEVEX APX_F 62543C182111 and r8d, dword ptr [r9], r10d +XDIS 7a6: LOGICAL APXEVEX APX_F 6254BC182111 and r8, qword ptr [r9], r10 +XDIS 7ac: LOGICAL APXEVEX APX_F 62543C1C21D1 and r8d, r9d, r10d +XDIS 7b2: LOGICAL APXEVEX APX_F 6254BC1C21D1 and r8, r9, r10 +XDIS 7b8: LOGICAL APXEVEX APX_F 62543C1C2111 and r8d, dword ptr [r9], r10d +XDIS 7be: LOGICAL APXEVEX APX_F 6254BC1C2111 and r8, qword ptr [r9], r10 +XDIS 7c4: LOGICAL APXEVEX APX_F 62543D1821D1 and r8w, r9w, r10w +XDIS 7ca: LOGICAL APXEVEX APX_F 6254BD1821D1 and r8, r9, r10 +XDIS 7d0: LOGICAL APXEVEX APX_F 62543D182111 and r8w, word ptr [r9], r10w +XDIS 7d6: LOGICAL APXEVEX APX_F 6254BD182111 and r8, qword ptr [r9], r10 +XDIS 7dc: LOGICAL APXEVEX APX_F 62543D1C21D1 and r8w, r9w, r10w +XDIS 7e2: LOGICAL APXEVEX APX_F 6254BD1C21D1 and r8, r9, r10 +XDIS 7e8: LOGICAL APXEVEX APX_F 62543D1C2111 and r8w, word ptr [r9], r10w +XDIS 7ee: LOGICAL APXEVEX APX_F 6254BD1C2111 and r8, qword ptr [r9], r10 +XDIS 7f4: LOGICAL APXEVEX APX_F 62547C0822C8 and r9b, r8b +XDIS 7fa: LOGICAL APXEVEX APX_F 62547C082201 and r8b, byte ptr [r9] +XDIS 800: LOGICAL APXEVEX APX_F 62547C0C22C8 and r9b, r8b +XDIS 806: LOGICAL APXEVEX APX_F 62547C0C2201 and r8b, byte ptr [r9] +XDIS 80c: LOGICAL APXEVEX APX_F 62543C1822D1 and r8b, r10b, r9b +XDIS 812: LOGICAL APXEVEX APX_F 62543C18220A and r8b, r9b, byte ptr [r10] +XDIS 818: LOGICAL APXEVEX APX_F 62543C1C22D1 and r8b, r10b, r9b +XDIS 81e: LOGICAL APXEVEX APX_F 62543C1C220A and r8b, r9b, byte ptr [r10] +XDIS 824: LOGICAL APXEVEX APX_F 62547C0823C8 and r9d, r8d +XDIS 82a: LOGICAL APXEVEX APX_F 6254FC0823C8 and r9, r8 +XDIS 830: LOGICAL APXEVEX APX_F 62547C082301 and r8d, dword ptr [r9] +XDIS 836: LOGICAL APXEVEX APX_F 6254FC082301 and r8, qword ptr [r9] +XDIS 83c: LOGICAL APXEVEX APX_F 62547C0C23C8 and r9d, r8d +XDIS 842: LOGICAL APXEVEX APX_F 6254FC0C23C8 and r9, r8 +XDIS 848: LOGICAL APXEVEX APX_F 62547C0C2301 and r8d, dword ptr [r9] +XDIS 84e: LOGICAL APXEVEX APX_F 6254FC0C2301 and r8, qword ptr [r9] +XDIS 854: LOGICAL APXEVEX APX_F 62547D0823C8 and r9w, r8w +XDIS 85a: LOGICAL APXEVEX APX_F 6254FD0823C8 and r9, r8 +XDIS 860: LOGICAL APXEVEX APX_F 62547D082301 and r8w, word ptr [r9] +XDIS 866: LOGICAL APXEVEX APX_F 6254FD082301 and r8, qword ptr [r9] +XDIS 86c: LOGICAL APXEVEX APX_F 62547D0C23C8 and r9w, r8w +XDIS 872: LOGICAL APXEVEX APX_F 6254FD0C23C8 and r9, r8 +XDIS 878: LOGICAL APXEVEX APX_F 62547D0C2301 and r8w, word ptr [r9] +XDIS 87e: LOGICAL APXEVEX APX_F 6254FD0C2301 and r8, qword ptr [r9] +XDIS 884: LOGICAL APXEVEX APX_F 62D43C1880E102 and r8b, r9b, 0x2 +XDIS 88b: LOGICAL APXEVEX APX_F 62D43C18802102 and r8b, byte ptr [r9], 0x2 +XDIS 892: LOGICAL APXEVEX APX_F 62D43C1C80E102 and r8b, r9b, 0x2 +XDIS 899: LOGICAL APXEVEX APX_F 62D43C1C802102 and r8b, byte ptr [r9], 0x2 +XDIS 8a0: LOGICAL APXEVEX APX_F 62543C1823D1 and r8d, r10d, r9d +XDIS 8a6: LOGICAL APXEVEX APX_F 6254BC1823D1 and r8, r10, r9 +XDIS 8ac: LOGICAL APXEVEX APX_F 62543C18230A and r8d, r9d, dword ptr [r10] +XDIS 8b2: LOGICAL APXEVEX APX_F 6254BC18230A and r8, r9, qword ptr [r10] +XDIS 8b8: LOGICAL APXEVEX APX_F 62543C1C23D1 and r8d, r10d, r9d +XDIS 8be: LOGICAL APXEVEX APX_F 6254BC1C23D1 and r8, r10, r9 +XDIS 8c4: LOGICAL APXEVEX APX_F 62543C1C230A and r8d, r9d, dword ptr [r10] +XDIS 8ca: LOGICAL APXEVEX APX_F 6254BC1C230A and r8, r9, qword ptr [r10] +XDIS 8d0: LOGICAL APXEVEX APX_F 62543D1823D1 and r8w, r10w, r9w +XDIS 8d6: LOGICAL APXEVEX APX_F 6254BD1823D1 and r8, r10, r9 +XDIS 8dc: LOGICAL APXEVEX APX_F 62543D18230A and r8w, r9w, word ptr [r10] +XDIS 8e2: LOGICAL APXEVEX APX_F 6254BD18230A and r8, r9, qword ptr [r10] +XDIS 8e8: LOGICAL APXEVEX APX_F 62543D1C23D1 and r8w, r10w, r9w +XDIS 8ee: LOGICAL APXEVEX APX_F 6254BD1C23D1 and r8, r10, r9 +XDIS 8f4: LOGICAL APXEVEX APX_F 62543D1C230A and r8w, r9w, word ptr [r10] +XDIS 8fa: LOGICAL APXEVEX APX_F 6254BD1C230A and r8, r9, qword ptr [r10] +XDIS 900: LOGICAL APXEVEX APX_F 62D47C0880E002 and r8b, 0x2 +XDIS 907: LOGICAL APXEVEX APX_F 62D47C08802002 and byte ptr [r8], 0x2 +XDIS 90e: LOGICAL APXEVEX APX_F 62D47C0C80E002 and r8b, 0x2 +XDIS 915: LOGICAL APXEVEX APX_F 62D47C0C802002 and byte ptr [r8], 0x2 +XDIS 91c: LOGICAL APXEVEX APX_F 62D47C0881E002000000 and r8d, 0x2 +XDIS 926: LOGICAL APXEVEX APX_F 62D4FC0881E002000000 and r8, 0x2 +XDIS 930: LOGICAL APXEVEX APX_F 62D47C08812002000000 and dword ptr [r8], 0x2 +XDIS 93a: LOGICAL APXEVEX APX_F 62D4FC08812002000000 and qword ptr [r8], 0x2 +XDIS 944: LOGICAL APXEVEX APX_F 62D47C0C81E002000000 and r8d, 0x2 +XDIS 94e: LOGICAL APXEVEX APX_F 62D4FC0C81E002000000 and r8, 0x2 +XDIS 958: LOGICAL APXEVEX APX_F 62D47C0C812002000000 and dword ptr [r8], 0x2 +XDIS 962: LOGICAL APXEVEX APX_F 62D4FC0C812002000000 and qword ptr [r8], 0x2 +XDIS 96c: LOGICAL APXEVEX APX_F 62D47D0881E00200 and r8w, 0x2 +XDIS 974: LOGICAL APXEVEX APX_F 62D4FD0881E002000000 and r8, 0x2 +XDIS 97e: LOGICAL APXEVEX APX_F 62D47D0881200200 and word ptr [r8], 0x2 +XDIS 986: LOGICAL APXEVEX APX_F 62D4FD08812002000000 and qword ptr [r8], 0x2 +XDIS 990: LOGICAL APXEVEX APX_F 62D47D0C81E00200 and r8w, 0x2 +XDIS 998: LOGICAL APXEVEX APX_F 62D4FD0C81E002000000 and r8, 0x2 +XDIS 9a2: LOGICAL APXEVEX APX_F 62D47D0C81200200 and word ptr [r8], 0x2 +XDIS 9aa: LOGICAL APXEVEX APX_F 62D4FD0C812002000000 and qword ptr [r8], 0x2 +XDIS 9b4: LOGICAL APXEVEX APX_F 62D43C1881E102000000 and r8d, r9d, 0x2 +XDIS 9be: LOGICAL APXEVEX APX_F 62D4BC1881E102000000 and r8, r9, 0x2 +XDIS 9c8: LOGICAL APXEVEX APX_F 62D43C18812102000000 and r8d, dword ptr [r9], 0x2 +XDIS 9d2: LOGICAL APXEVEX APX_F 62D4BC18812102000000 and r8, qword ptr [r9], 0x2 +XDIS 9dc: LOGICAL APXEVEX APX_F 62D43C1C81E102000000 and r8d, r9d, 0x2 +XDIS 9e6: LOGICAL APXEVEX APX_F 62D4BC1C81E102000000 and r8, r9, 0x2 +XDIS 9f0: LOGICAL APXEVEX APX_F 62D43C1C812102000000 and r8d, dword ptr [r9], 0x2 +XDIS 9fa: LOGICAL APXEVEX APX_F 62D4BC1C812102000000 and r8, qword ptr [r9], 0x2 +XDIS a04: LOGICAL APXEVEX APX_F 62D43D1881E10200 and r8w, r9w, 0x2 +XDIS a0c: LOGICAL APXEVEX APX_F 62D4BD1881E102000000 and r8, r9, 0x2 +XDIS a16: LOGICAL APXEVEX APX_F 62D43D1881210200 and r8w, word ptr [r9], 0x2 +XDIS a1e: LOGICAL APXEVEX APX_F 62D4BD18812102000000 and r8, qword ptr [r9], 0x2 +XDIS a28: LOGICAL APXEVEX APX_F 62D43D1C81E10200 and r8w, r9w, 0x2 +XDIS a30: LOGICAL APXEVEX APX_F 62D4BD1C81E102000000 and r8, r9, 0x2 +XDIS a3a: LOGICAL APXEVEX APX_F 62D43D1C81210200 and r8w, word ptr [r9], 0x2 +XDIS a42: LOGICAL APXEVEX APX_F 62D4BD1C812102000000 and r8, qword ptr [r9], 0x2 +XDIS a4c: LOGICAL APXEVEX APX_F 62D47C0883E002 and r8d, 0x2 +XDIS a53: LOGICAL APXEVEX APX_F 62D4FC0883E002 and r8, 0x2 +XDIS a5a: LOGICAL APXEVEX APX_F 62D47C08832002 and dword ptr [r8], 0x2 +XDIS a61: LOGICAL APXEVEX APX_F 62D4FC08832002 and qword ptr [r8], 0x2 +XDIS a68: LOGICAL APXEVEX APX_F 62D47C0C83E002 and r8d, 0x2 +XDIS a6f: LOGICAL APXEVEX APX_F 62D4FC0C83E002 and r8, 0x2 +XDIS a76: LOGICAL APXEVEX APX_F 62D47C0C832002 and dword ptr [r8], 0x2 +XDIS a7d: LOGICAL APXEVEX APX_F 62D4FC0C832002 and qword ptr [r8], 0x2 +XDIS a84: LOGICAL APXEVEX APX_F 62D47D0883E002 and r8w, 0x2 +XDIS a8b: LOGICAL APXEVEX APX_F 62D4FD0883E002 and r8, 0x2 +XDIS a92: LOGICAL APXEVEX APX_F 62D47D08832002 and word ptr [r8], 0x2 +XDIS a99: LOGICAL APXEVEX APX_F 62D4FD08832002 and qword ptr [r8], 0x2 +XDIS aa0: LOGICAL APXEVEX APX_F 62D47D0C83E002 and r8w, 0x2 +XDIS aa7: LOGICAL APXEVEX APX_F 62D4FD0C83E002 and r8, 0x2 +XDIS aae: LOGICAL APXEVEX APX_F 62D47D0C832002 and word ptr [r8], 0x2 +XDIS ab5: LOGICAL APXEVEX APX_F 62D4FD0C832002 and qword ptr [r8], 0x2 +XDIS abc: LOGICAL APXEVEX APX_F 62D43C1883E102 and r8d, r9d, 0x2 +XDIS ac3: LOGICAL APXEVEX APX_F 62D4BC1883E102 and r8, r9, 0x2 +XDIS aca: LOGICAL APXEVEX APX_F 62D43C18832102 and r8d, dword ptr [r9], 0x2 +XDIS ad1: LOGICAL APXEVEX APX_F 62D4BC18832102 and r8, qword ptr [r9], 0x2 +XDIS ad8: LOGICAL APXEVEX APX_F 62D43C1C83E102 and r8d, r9d, 0x2 +XDIS adf: LOGICAL APXEVEX APX_F 62D4BC1C83E102 and r8, r9, 0x2 +XDIS ae6: LOGICAL APXEVEX APX_F 62D43C1C832102 and r8d, dword ptr [r9], 0x2 +XDIS aed: LOGICAL APXEVEX APX_F 62D4BC1C832102 and r8, qword ptr [r9], 0x2 +XDIS af4: BMI1 APXEVEX APX_F 62523408F2C2 andn r8d, r9d, r10d +XDIS afa: BMI1 APXEVEX APX_F 62523408F202 andn r8d, r9d, dword ptr [r10] +XDIS b00: BMI1 APXEVEX APX_F 6252340CF2C2 andn r8d, r9d, r10d +XDIS b06: BMI1 APXEVEX APX_F 6252340CF202 andn r8d, r9d, dword ptr [r10] +XDIS b0c: BMI1 APXEVEX APX_F 6252B408F2C2 andn r8, r9, r10 +XDIS b12: BMI1 APXEVEX APX_F 6252B408F202 andn r8, r9, qword ptr [r10] +XDIS b18: BMI1 APXEVEX APX_F 6252B40CF2C2 andn r8, r9, r10 +XDIS b1e: BMI1 APXEVEX APX_F 6252B40CF202 andn r8, r9, qword ptr [r10] +XDIS b24: BMI1 APXEVEX APX_F 62522C08F7C1 bextr r8d, r9d, r10d +XDIS b2a: BMI1 APXEVEX APX_F 62522C08F701 bextr r8d, dword ptr [r9], r10d +XDIS b30: BMI1 APXEVEX APX_F 62522C0CF7C1 bextr r8d, r9d, r10d +XDIS b36: BMI1 APXEVEX APX_F 62522C0CF701 bextr r8d, dword ptr [r9], r10d +XDIS b3c: BMI1 APXEVEX APX_F 6252AC08F7C1 bextr r8, r9, r10 +XDIS b42: BMI1 APXEVEX APX_F 6252AC08F701 bextr r8, qword ptr [r9], r10 +XDIS b48: BMI1 APXEVEX APX_F 6252AC0CF7C1 bextr r8, r9, r10 +XDIS b4e: BMI1 APXEVEX APX_F 6252AC0CF701 bextr r8, qword ptr [r9], r10 +XDIS b54: BMI1 APXEVEX APX_F 62D23C08F3D9 blsi r8d, r9d +XDIS b5a: BMI1 APXEVEX APX_F 62D23C08F319 blsi r8d, dword ptr [r9] +XDIS b60: BMI1 APXEVEX APX_F 62D23C0CF3D9 blsi r8d, r9d +XDIS b66: BMI1 APXEVEX APX_F 62D23C0CF319 blsi r8d, dword ptr [r9] +XDIS b6c: BMI1 APXEVEX APX_F 62D2BC08F3D9 blsi r8, r9 +XDIS b72: BMI1 APXEVEX APX_F 62D2BC08F319 blsi r8, qword ptr [r9] +XDIS b78: BMI1 APXEVEX APX_F 62D2BC0CF3D9 blsi r8, r9 +XDIS b7e: BMI1 APXEVEX APX_F 62D2BC0CF319 blsi r8, qword ptr [r9] +XDIS b84: BMI1 APXEVEX APX_F 62D23C08F3D1 blsmsk r8d, r9d +XDIS b8a: BMI1 APXEVEX APX_F 62D23C08F311 blsmsk r8d, dword ptr [r9] +XDIS b90: BMI1 APXEVEX APX_F 62D23C0CF3D1 blsmsk r8d, r9d +XDIS b96: BMI1 APXEVEX APX_F 62D23C0CF311 blsmsk r8d, dword ptr [r9] +XDIS b9c: BMI1 APXEVEX APX_F 62D2BC08F3D1 blsmsk r8, r9 +XDIS ba2: BMI1 APXEVEX APX_F 62D2BC08F311 blsmsk r8, qword ptr [r9] +XDIS ba8: BMI1 APXEVEX APX_F 62D2BC0CF3D1 blsmsk r8, r9 +XDIS bae: BMI1 APXEVEX APX_F 62D2BC0CF311 blsmsk r8, qword ptr [r9] +XDIS bb4: BMI1 APXEVEX APX_F 62D23C08F3C9 blsr r8d, r9d +XDIS bba: BMI1 APXEVEX APX_F 62D23C08F309 blsr r8d, dword ptr [r9] +XDIS bc0: BMI1 APXEVEX APX_F 62D23C0CF3C9 blsr r8d, r9d +XDIS bc6: BMI1 APXEVEX APX_F 62D23C0CF309 blsr r8d, dword ptr [r9] +XDIS bcc: BMI1 APXEVEX APX_F 62D2BC08F3C9 blsr r8, r9 +XDIS bd2: BMI1 APXEVEX APX_F 62D2BC08F309 blsr r8, qword ptr [r9] +XDIS bd8: BMI1 APXEVEX APX_F 62D2BC0CF3C9 blsr r8, r9 +XDIS bde: BMI1 APXEVEX APX_F 62D2BC0CF309 blsr r8, qword ptr [r9] +XDIS be4: BMI2 APXEVEX APX_F 62522C08F5C1 bzhi r8d, r9d, r10d +XDIS bea: BMI2 APXEVEX APX_F 62522C08F501 bzhi r8d, dword ptr [r9], r10d +XDIS bf0: BMI2 APXEVEX APX_F 62522C0CF5C1 bzhi r8d, r9d, r10d +XDIS bf6: BMI2 APXEVEX APX_F 62522C0CF501 bzhi r8d, dword ptr [r9], r10d +XDIS bfc: BMI2 APXEVEX APX_F 6252AC08F5C1 bzhi r8, r9, r10 +XDIS c02: BMI2 APXEVEX APX_F 6252AC08F501 bzhi r8, qword ptr [r9], r10 +XDIS c08: BMI2 APXEVEX APX_F 6252AC0CF5C1 bzhi r8, r9, r10 +XDIS c0e: BMI2 APXEVEX APX_F 6252AC0CF501 bzhi r8, qword ptr [r9], r10 +XDIS c14: APX APXEVEX APX_F 6254740238C8 ccmpb r8b, r9b, dfv14 +XDIS c1a: APX APXEVEX APX_F 625474023808 ccmpb byte ptr [r8], r9b, dfv14 +XDIS c20: APX APXEVEX APX_F 62D4740283F802 ccmpb r8d, 0x2, dfv14 +XDIS c27: APX APXEVEX APX_F 62D4F40283F802 ccmpb r8, 0x2, dfv14 +XDIS c2e: APX APXEVEX APX_F 62D47402833802 ccmpb dword ptr [r8], 0x2, dfv14 +XDIS c35: APX APXEVEX APX_F 62D4F402833802 ccmpb qword ptr [r8], 0x2, dfv14 +XDIS c3c: APX APXEVEX APX_F 62D4750283F802 ccmpb r8w, 0x2, dfv14 +XDIS c43: APX APXEVEX APX_F 62D4F50283F802 ccmpb r8, 0x2, dfv14 +XDIS c4a: APX APXEVEX APX_F 62D47502833802 ccmpb word ptr [r8], 0x2, dfv14 +XDIS c51: APX APXEVEX APX_F 62D4F502833802 ccmpb qword ptr [r8], 0x2, dfv14 +XDIS c58: APX APXEVEX APX_F 6254740239C8 ccmpb r8d, r9d, dfv14 +XDIS c5e: APX APXEVEX APX_F 6254F40239C8 ccmpb r8, r9, dfv14 +XDIS c64: APX APXEVEX APX_F 625474023908 ccmpb dword ptr [r8], r9d, dfv14 +XDIS c6a: APX APXEVEX APX_F 6254F4023908 ccmpb qword ptr [r8], r9, dfv14 +XDIS c70: APX APXEVEX APX_F 6254750239C8 ccmpb r8w, r9w, dfv14 +XDIS c76: APX APXEVEX APX_F 6254F50239C8 ccmpb r8, r9, dfv14 +XDIS c7c: APX APXEVEX APX_F 625475023908 ccmpb word ptr [r8], r9w, dfv14 +XDIS c82: APX APXEVEX APX_F 6254F5023908 ccmpb qword ptr [r8], r9, dfv14 +XDIS c88: APX APXEVEX APX_F 625474023AC8 ccmpb r9b, r8b, dfv14 +XDIS c8e: APX APXEVEX APX_F 625474023A01 ccmpb r8b, byte ptr [r9], dfv14 +XDIS c94: APX APXEVEX APX_F 625474023BC8 ccmpb r9d, r8d, dfv14 +XDIS c9a: APX APXEVEX APX_F 6254F4023BC8 ccmpb r9, r8, dfv14 +XDIS ca0: APX APXEVEX APX_F 625474023B01 ccmpb r8d, dword ptr [r9], dfv14 +XDIS ca6: APX APXEVEX APX_F 6254F4023B01 ccmpb r8, qword ptr [r9], dfv14 +XDIS cac: APX APXEVEX APX_F 625475023BC8 ccmpb r9w, r8w, dfv14 +XDIS cb2: APX APXEVEX APX_F 6254F5023BC8 ccmpb r9, r8, dfv14 +XDIS cb8: APX APXEVEX APX_F 625475023B01 ccmpb r8w, word ptr [r9], dfv14 +XDIS cbe: APX APXEVEX APX_F 6254F5023B01 ccmpb r8, qword ptr [r9], dfv14 +XDIS cc4: APX APXEVEX APX_F 62D4740280F802 ccmpb r8b, 0x2, dfv14 +XDIS ccb: APX APXEVEX APX_F 62D47402803802 ccmpb byte ptr [r8], 0x2, dfv14 +XDIS cd2: APX APXEVEX APX_F 62D4740281F802000000 ccmpb r8d, 0x2, dfv14 +XDIS cdc: APX APXEVEX APX_F 62D4F40281F802000000 ccmpb r8, 0x2, dfv14 +XDIS ce6: APX APXEVEX APX_F 62D47402813802000000 ccmpb dword ptr [r8], 0x2, dfv14 +XDIS cf0: APX APXEVEX APX_F 62D4F402813802000000 ccmpb qword ptr [r8], 0x2, dfv14 +XDIS cfa: APX APXEVEX APX_F 62D4750281F80200 ccmpb r8w, 0x2, dfv14 +XDIS d02: APX APXEVEX APX_F 62D4F50281F802000000 ccmpb r8, 0x2, dfv14 +XDIS d0c: APX APXEVEX APX_F 62D4750281380200 ccmpb word ptr [r8], 0x2, dfv14 +XDIS d14: APX APXEVEX APX_F 62D4F502813802000000 ccmpb qword ptr [r8], 0x2, dfv14 +XDIS d1e: APX APXEVEX APX_F 6254740638C8 ccmpbe r8b, r9b, dfv14 +XDIS d24: APX APXEVEX APX_F 625474063808 ccmpbe byte ptr [r8], r9b, dfv14 +XDIS d2a: APX APXEVEX APX_F 62D4740683F802 ccmpbe r8d, 0x2, dfv14 +XDIS d31: APX APXEVEX APX_F 62D4F40683F802 ccmpbe r8, 0x2, dfv14 +XDIS d38: APX APXEVEX APX_F 62D47406833802 ccmpbe dword ptr [r8], 0x2, dfv14 +XDIS d3f: APX APXEVEX APX_F 62D4F406833802 ccmpbe qword ptr [r8], 0x2, dfv14 +XDIS d46: APX APXEVEX APX_F 62D4750683F802 ccmpbe r8w, 0x2, dfv14 +XDIS d4d: APX APXEVEX APX_F 62D4F50683F802 ccmpbe r8, 0x2, dfv14 +XDIS d54: APX APXEVEX APX_F 62D47506833802 ccmpbe word ptr [r8], 0x2, dfv14 +XDIS d5b: APX APXEVEX APX_F 62D4F506833802 ccmpbe qword ptr [r8], 0x2, dfv14 +XDIS d62: APX APXEVEX APX_F 6254740639C8 ccmpbe r8d, r9d, dfv14 +XDIS d68: APX APXEVEX APX_F 6254F40639C8 ccmpbe r8, r9, dfv14 +XDIS d6e: APX APXEVEX APX_F 625474063908 ccmpbe dword ptr [r8], r9d, dfv14 +XDIS d74: APX APXEVEX APX_F 6254F4063908 ccmpbe qword ptr [r8], r9, dfv14 +XDIS d7a: APX APXEVEX APX_F 6254750639C8 ccmpbe r8w, r9w, dfv14 +XDIS d80: APX APXEVEX APX_F 6254F50639C8 ccmpbe r8, r9, dfv14 +XDIS d86: APX APXEVEX APX_F 625475063908 ccmpbe word ptr [r8], r9w, dfv14 +XDIS d8c: APX APXEVEX APX_F 6254F5063908 ccmpbe qword ptr [r8], r9, dfv14 +XDIS d92: APX APXEVEX APX_F 625474063AC8 ccmpbe r9b, r8b, dfv14 +XDIS d98: APX APXEVEX APX_F 625474063A01 ccmpbe r8b, byte ptr [r9], dfv14 +XDIS d9e: APX APXEVEX APX_F 625474063BC8 ccmpbe r9d, r8d, dfv14 +XDIS da4: APX APXEVEX APX_F 6254F4063BC8 ccmpbe r9, r8, dfv14 +XDIS daa: APX APXEVEX APX_F 625474063B01 ccmpbe r8d, dword ptr [r9], dfv14 +XDIS db0: APX APXEVEX APX_F 6254F4063B01 ccmpbe r8, qword ptr [r9], dfv14 +XDIS db6: APX APXEVEX APX_F 625475063BC8 ccmpbe r9w, r8w, dfv14 +XDIS dbc: APX APXEVEX APX_F 6254F5063BC8 ccmpbe r9, r8, dfv14 +XDIS dc2: APX APXEVEX APX_F 625475063B01 ccmpbe r8w, word ptr [r9], dfv14 +XDIS dc8: APX APXEVEX APX_F 6254F5063B01 ccmpbe r8, qword ptr [r9], dfv14 +XDIS dce: APX APXEVEX APX_F 62D4740680F802 ccmpbe r8b, 0x2, dfv14 +XDIS dd5: APX APXEVEX APX_F 62D47406803802 ccmpbe byte ptr [r8], 0x2, dfv14 +XDIS ddc: APX APXEVEX APX_F 62D4740681F802000000 ccmpbe r8d, 0x2, dfv14 +XDIS de6: APX APXEVEX APX_F 62D4F40681F802000000 ccmpbe r8, 0x2, dfv14 +XDIS df0: APX APXEVEX APX_F 62D47406813802000000 ccmpbe dword ptr [r8], 0x2, dfv14 +XDIS dfa: APX APXEVEX APX_F 62D4F406813802000000 ccmpbe qword ptr [r8], 0x2, dfv14 +XDIS e04: APX APXEVEX APX_F 62D4750681F80200 ccmpbe r8w, 0x2, dfv14 +XDIS e0c: APX APXEVEX APX_F 62D4F50681F802000000 ccmpbe r8, 0x2, dfv14 +XDIS e16: APX APXEVEX APX_F 62D4750681380200 ccmpbe word ptr [r8], 0x2, dfv14 +XDIS e1e: APX APXEVEX APX_F 62D4F506813802000000 ccmpbe qword ptr [r8], 0x2, dfv14 +XDIS e28: APX APXEVEX APX_F 6254740B38C8 ccmpf r8b, r9b, dfv14 +XDIS e2e: APX APXEVEX APX_F 6254740B3808 ccmpf byte ptr [r8], r9b, dfv14 +XDIS e34: APX APXEVEX APX_F 62D4740B83F802 ccmpf r8d, 0x2, dfv14 +XDIS e3b: APX APXEVEX APX_F 62D4F40B83F802 ccmpf r8, 0x2, dfv14 +XDIS e42: APX APXEVEX APX_F 62D4740B833802 ccmpf dword ptr [r8], 0x2, dfv14 +XDIS e49: APX APXEVEX APX_F 62D4F40B833802 ccmpf qword ptr [r8], 0x2, dfv14 +XDIS e50: APX APXEVEX APX_F 62D4750B83F802 ccmpf r8w, 0x2, dfv14 +XDIS e57: APX APXEVEX APX_F 62D4F50B83F802 ccmpf r8, 0x2, dfv14 +XDIS e5e: APX APXEVEX APX_F 62D4750B833802 ccmpf word ptr [r8], 0x2, dfv14 +XDIS e65: APX APXEVEX APX_F 62D4F50B833802 ccmpf qword ptr [r8], 0x2, dfv14 +XDIS e6c: APX APXEVEX APX_F 6254740B39C8 ccmpf r8d, r9d, dfv14 +XDIS e72: APX APXEVEX APX_F 6254F40B39C8 ccmpf r8, r9, dfv14 +XDIS e78: APX APXEVEX APX_F 6254740B3908 ccmpf dword ptr [r8], r9d, dfv14 +XDIS e7e: APX APXEVEX APX_F 6254F40B3908 ccmpf qword ptr [r8], r9, dfv14 +XDIS e84: APX APXEVEX APX_F 6254750B39C8 ccmpf r8w, r9w, dfv14 +XDIS e8a: APX APXEVEX APX_F 6254F50B39C8 ccmpf r8, r9, dfv14 +XDIS e90: APX APXEVEX APX_F 6254750B3908 ccmpf word ptr [r8], r9w, dfv14 +XDIS e96: APX APXEVEX APX_F 6254F50B3908 ccmpf qword ptr [r8], r9, dfv14 +XDIS e9c: APX APXEVEX APX_F 6254740B3AC8 ccmpf r9b, r8b, dfv14 +XDIS ea2: APX APXEVEX APX_F 6254740B3A01 ccmpf r8b, byte ptr [r9], dfv14 +XDIS ea8: APX APXEVEX APX_F 6254740B3BC8 ccmpf r9d, r8d, dfv14 +XDIS eae: APX APXEVEX APX_F 6254F40B3BC8 ccmpf r9, r8, dfv14 +XDIS eb4: APX APXEVEX APX_F 6254740B3B01 ccmpf r8d, dword ptr [r9], dfv14 +XDIS eba: APX APXEVEX APX_F 6254F40B3B01 ccmpf r8, qword ptr [r9], dfv14 +XDIS ec0: APX APXEVEX APX_F 6254750B3BC8 ccmpf r9w, r8w, dfv14 +XDIS ec6: APX APXEVEX APX_F 6254F50B3BC8 ccmpf r9, r8, dfv14 +XDIS ecc: APX APXEVEX APX_F 6254750B3B01 ccmpf r8w, word ptr [r9], dfv14 +XDIS ed2: APX APXEVEX APX_F 6254F50B3B01 ccmpf r8, qword ptr [r9], dfv14 +XDIS ed8: APX APXEVEX APX_F 62D4740B80F802 ccmpf r8b, 0x2, dfv14 +XDIS edf: APX APXEVEX APX_F 62D4740B803802 ccmpf byte ptr [r8], 0x2, dfv14 +XDIS ee6: APX APXEVEX APX_F 62D4740B81F802000000 ccmpf r8d, 0x2, dfv14 +XDIS ef0: APX APXEVEX APX_F 62D4F40B81F802000000 ccmpf r8, 0x2, dfv14 +XDIS efa: APX APXEVEX APX_F 62D4740B813802000000 ccmpf dword ptr [r8], 0x2, dfv14 +XDIS f04: APX APXEVEX APX_F 62D4F40B813802000000 ccmpf qword ptr [r8], 0x2, dfv14 +XDIS f0e: APX APXEVEX APX_F 62D4750B81F80200 ccmpf r8w, 0x2, dfv14 +XDIS f16: APX APXEVEX APX_F 62D4F50B81F802000000 ccmpf r8, 0x2, dfv14 +XDIS f20: APX APXEVEX APX_F 62D4750B81380200 ccmpf word ptr [r8], 0x2, dfv14 +XDIS f28: APX APXEVEX APX_F 62D4F50B813802000000 ccmpf qword ptr [r8], 0x2, dfv14 +XDIS f32: APX APXEVEX APX_F 6254740C38C8 ccmpl r8b, r9b, dfv14 +XDIS f38: APX APXEVEX APX_F 6254740C3808 ccmpl byte ptr [r8], r9b, dfv14 +XDIS f3e: APX APXEVEX APX_F 62D4740C83F802 ccmpl r8d, 0x2, dfv14 +XDIS f45: APX APXEVEX APX_F 62D4F40C83F802 ccmpl r8, 0x2, dfv14 +XDIS f4c: APX APXEVEX APX_F 62D4740C833802 ccmpl dword ptr [r8], 0x2, dfv14 +XDIS f53: APX APXEVEX APX_F 62D4F40C833802 ccmpl qword ptr [r8], 0x2, dfv14 +XDIS f5a: APX APXEVEX APX_F 62D4750C83F802 ccmpl r8w, 0x2, dfv14 +XDIS f61: APX APXEVEX APX_F 62D4F50C83F802 ccmpl r8, 0x2, dfv14 +XDIS f68: APX APXEVEX APX_F 62D4750C833802 ccmpl word ptr [r8], 0x2, dfv14 +XDIS f6f: APX APXEVEX APX_F 62D4F50C833802 ccmpl qword ptr [r8], 0x2, dfv14 +XDIS f76: APX APXEVEX APX_F 6254740C39C8 ccmpl r8d, r9d, dfv14 +XDIS f7c: APX APXEVEX APX_F 6254F40C39C8 ccmpl r8, r9, dfv14 +XDIS f82: APX APXEVEX APX_F 6254740C3908 ccmpl dword ptr [r8], r9d, dfv14 +XDIS f88: APX APXEVEX APX_F 6254F40C3908 ccmpl qword ptr [r8], r9, dfv14 +XDIS f8e: APX APXEVEX APX_F 6254750C39C8 ccmpl r8w, r9w, dfv14 +XDIS f94: APX APXEVEX APX_F 6254F50C39C8 ccmpl r8, r9, dfv14 +XDIS f9a: APX APXEVEX APX_F 6254750C3908 ccmpl word ptr [r8], r9w, dfv14 +XDIS fa0: APX APXEVEX APX_F 6254F50C3908 ccmpl qword ptr [r8], r9, dfv14 +XDIS fa6: APX APXEVEX APX_F 6254740C3AC8 ccmpl r9b, r8b, dfv14 +XDIS fac: APX APXEVEX APX_F 6254740C3A01 ccmpl r8b, byte ptr [r9], dfv14 +XDIS fb2: APX APXEVEX APX_F 6254740C3BC8 ccmpl r9d, r8d, dfv14 +XDIS fb8: APX APXEVEX APX_F 6254F40C3BC8 ccmpl r9, r8, dfv14 +XDIS fbe: APX APXEVEX APX_F 6254740C3B01 ccmpl r8d, dword ptr [r9], dfv14 +XDIS fc4: APX APXEVEX APX_F 6254F40C3B01 ccmpl r8, qword ptr [r9], dfv14 +XDIS fca: APX APXEVEX APX_F 6254750C3BC8 ccmpl r9w, r8w, dfv14 +XDIS fd0: APX APXEVEX APX_F 6254F50C3BC8 ccmpl r9, r8, dfv14 +XDIS fd6: APX APXEVEX APX_F 6254750C3B01 ccmpl r8w, word ptr [r9], dfv14 +XDIS fdc: APX APXEVEX APX_F 6254F50C3B01 ccmpl r8, qword ptr [r9], dfv14 +XDIS fe2: APX APXEVEX APX_F 62D4740C80F802 ccmpl r8b, 0x2, dfv14 +XDIS fe9: APX APXEVEX APX_F 62D4740C803802 ccmpl byte ptr [r8], 0x2, dfv14 +XDIS ff0: APX APXEVEX APX_F 62D4740C81F802000000 ccmpl r8d, 0x2, dfv14 +XDIS ffa: APX APXEVEX APX_F 62D4F40C81F802000000 ccmpl r8, 0x2, dfv14 +XDIS 1004: APX APXEVEX APX_F 62D4740C813802000000 ccmpl dword ptr [r8], 0x2, dfv14 +XDIS 100e: APX APXEVEX APX_F 62D4F40C813802000000 ccmpl qword ptr [r8], 0x2, dfv14 +XDIS 1018: APX APXEVEX APX_F 62D4750C81F80200 ccmpl r8w, 0x2, dfv14 +XDIS 1020: APX APXEVEX APX_F 62D4F50C81F802000000 ccmpl r8, 0x2, dfv14 +XDIS 102a: APX APXEVEX APX_F 62D4750C81380200 ccmpl word ptr [r8], 0x2, dfv14 +XDIS 1032: APX APXEVEX APX_F 62D4F50C813802000000 ccmpl qword ptr [r8], 0x2, dfv14 +XDIS 103c: APX APXEVEX APX_F 6254740E38C8 ccmple r8b, r9b, dfv14 +XDIS 1042: APX APXEVEX APX_F 6254740E3808 ccmple byte ptr [r8], r9b, dfv14 +XDIS 1048: APX APXEVEX APX_F 62D4740E83F802 ccmple r8d, 0x2, dfv14 +XDIS 104f: APX APXEVEX APX_F 62D4F40E83F802 ccmple r8, 0x2, dfv14 +XDIS 1056: APX APXEVEX APX_F 62D4740E833802 ccmple dword ptr [r8], 0x2, dfv14 +XDIS 105d: APX APXEVEX APX_F 62D4F40E833802 ccmple qword ptr [r8], 0x2, dfv14 +XDIS 1064: APX APXEVEX APX_F 62D4750E83F802 ccmple r8w, 0x2, dfv14 +XDIS 106b: APX APXEVEX APX_F 62D4F50E83F802 ccmple r8, 0x2, dfv14 +XDIS 1072: APX APXEVEX APX_F 62D4750E833802 ccmple word ptr [r8], 0x2, dfv14 +XDIS 1079: APX APXEVEX APX_F 62D4F50E833802 ccmple qword ptr [r8], 0x2, dfv14 +XDIS 1080: APX APXEVEX APX_F 6254740E39C8 ccmple r8d, r9d, dfv14 +XDIS 1086: APX APXEVEX APX_F 6254F40E39C8 ccmple r8, r9, dfv14 +XDIS 108c: APX APXEVEX APX_F 6254740E3908 ccmple dword ptr [r8], r9d, dfv14 +XDIS 1092: APX APXEVEX APX_F 6254F40E3908 ccmple qword ptr [r8], r9, dfv14 +XDIS 1098: APX APXEVEX APX_F 6254750E39C8 ccmple r8w, r9w, dfv14 +XDIS 109e: APX APXEVEX APX_F 6254F50E39C8 ccmple r8, r9, dfv14 +XDIS 10a4: APX APXEVEX APX_F 6254750E3908 ccmple word ptr [r8], r9w, dfv14 +XDIS 10aa: APX APXEVEX APX_F 6254F50E3908 ccmple qword ptr [r8], r9, dfv14 +XDIS 10b0: APX APXEVEX APX_F 6254740E3AC8 ccmple r9b, r8b, dfv14 +XDIS 10b6: APX APXEVEX APX_F 6254740E3A01 ccmple r8b, byte ptr [r9], dfv14 +XDIS 10bc: APX APXEVEX APX_F 6254740E3BC8 ccmple r9d, r8d, dfv14 +XDIS 10c2: APX APXEVEX APX_F 6254F40E3BC8 ccmple r9, r8, dfv14 +XDIS 10c8: APX APXEVEX APX_F 6254740E3B01 ccmple r8d, dword ptr [r9], dfv14 +XDIS 10ce: APX APXEVEX APX_F 6254F40E3B01 ccmple r8, qword ptr [r9], dfv14 +XDIS 10d4: APX APXEVEX APX_F 6254750E3BC8 ccmple r9w, r8w, dfv14 +XDIS 10da: APX APXEVEX APX_F 6254F50E3BC8 ccmple r9, r8, dfv14 +XDIS 10e0: APX APXEVEX APX_F 6254750E3B01 ccmple r8w, word ptr [r9], dfv14 +XDIS 10e6: APX APXEVEX APX_F 6254F50E3B01 ccmple r8, qword ptr [r9], dfv14 +XDIS 10ec: APX APXEVEX APX_F 62D4740E80F802 ccmple r8b, 0x2, dfv14 +XDIS 10f3: APX APXEVEX APX_F 62D4740E803802 ccmple byte ptr [r8], 0x2, dfv14 +XDIS 10fa: APX APXEVEX APX_F 62D4740E81F802000000 ccmple r8d, 0x2, dfv14 +XDIS 1104: APX APXEVEX APX_F 62D4F40E81F802000000 ccmple r8, 0x2, dfv14 +XDIS 110e: APX APXEVEX APX_F 62D4740E813802000000 ccmple dword ptr [r8], 0x2, dfv14 +XDIS 1118: APX APXEVEX APX_F 62D4F40E813802000000 ccmple qword ptr [r8], 0x2, dfv14 +XDIS 1122: APX APXEVEX APX_F 62D4750E81F80200 ccmple r8w, 0x2, dfv14 +XDIS 112a: APX APXEVEX APX_F 62D4F50E81F802000000 ccmple r8, 0x2, dfv14 +XDIS 1134: APX APXEVEX APX_F 62D4750E81380200 ccmple word ptr [r8], 0x2, dfv14 +XDIS 113c: APX APXEVEX APX_F 62D4F50E813802000000 ccmple qword ptr [r8], 0x2, dfv14 +XDIS 1146: APX APXEVEX APX_F 6254740338C8 ccmpnb r8b, r9b, dfv14 +XDIS 114c: APX APXEVEX APX_F 625474033808 ccmpnb byte ptr [r8], r9b, dfv14 +XDIS 1152: APX APXEVEX APX_F 62D4740383F802 ccmpnb r8d, 0x2, dfv14 +XDIS 1159: APX APXEVEX APX_F 62D4F40383F802 ccmpnb r8, 0x2, dfv14 +XDIS 1160: APX APXEVEX APX_F 62D47403833802 ccmpnb dword ptr [r8], 0x2, dfv14 +XDIS 1167: APX APXEVEX APX_F 62D4F403833802 ccmpnb qword ptr [r8], 0x2, dfv14 +XDIS 116e: APX APXEVEX APX_F 62D4750383F802 ccmpnb r8w, 0x2, dfv14 +XDIS 1175: APX APXEVEX APX_F 62D4F50383F802 ccmpnb r8, 0x2, dfv14 +XDIS 117c: APX APXEVEX APX_F 62D47503833802 ccmpnb word ptr [r8], 0x2, dfv14 +XDIS 1183: APX APXEVEX APX_F 62D4F503833802 ccmpnb qword ptr [r8], 0x2, dfv14 +XDIS 118a: APX APXEVEX APX_F 6254740339C8 ccmpnb r8d, r9d, dfv14 +XDIS 1190: APX APXEVEX APX_F 6254F40339C8 ccmpnb r8, r9, dfv14 +XDIS 1196: APX APXEVEX APX_F 625474033908 ccmpnb dword ptr [r8], r9d, dfv14 +XDIS 119c: APX APXEVEX APX_F 6254F4033908 ccmpnb qword ptr [r8], r9, dfv14 +XDIS 11a2: APX APXEVEX APX_F 6254750339C8 ccmpnb r8w, r9w, dfv14 +XDIS 11a8: APX APXEVEX APX_F 6254F50339C8 ccmpnb r8, r9, dfv14 +XDIS 11ae: APX APXEVEX APX_F 625475033908 ccmpnb word ptr [r8], r9w, dfv14 +XDIS 11b4: APX APXEVEX APX_F 6254F5033908 ccmpnb qword ptr [r8], r9, dfv14 +XDIS 11ba: APX APXEVEX APX_F 625474033AC8 ccmpnb r9b, r8b, dfv14 +XDIS 11c0: APX APXEVEX APX_F 625474033A01 ccmpnb r8b, byte ptr [r9], dfv14 +XDIS 11c6: APX APXEVEX APX_F 625474033BC8 ccmpnb r9d, r8d, dfv14 +XDIS 11cc: APX APXEVEX APX_F 6254F4033BC8 ccmpnb r9, r8, dfv14 +XDIS 11d2: APX APXEVEX APX_F 625474033B01 ccmpnb r8d, dword ptr [r9], dfv14 +XDIS 11d8: APX APXEVEX APX_F 6254F4033B01 ccmpnb r8, qword ptr [r9], dfv14 +XDIS 11de: APX APXEVEX APX_F 625475033BC8 ccmpnb r9w, r8w, dfv14 +XDIS 11e4: APX APXEVEX APX_F 6254F5033BC8 ccmpnb r9, r8, dfv14 +XDIS 11ea: APX APXEVEX APX_F 625475033B01 ccmpnb r8w, word ptr [r9], dfv14 +XDIS 11f0: APX APXEVEX APX_F 6254F5033B01 ccmpnb r8, qword ptr [r9], dfv14 +XDIS 11f6: APX APXEVEX APX_F 62D4740380F802 ccmpnb r8b, 0x2, dfv14 +XDIS 11fd: APX APXEVEX APX_F 62D47403803802 ccmpnb byte ptr [r8], 0x2, dfv14 +XDIS 1204: APX APXEVEX APX_F 62D4740381F802000000 ccmpnb r8d, 0x2, dfv14 +XDIS 120e: APX APXEVEX APX_F 62D4F40381F802000000 ccmpnb r8, 0x2, dfv14 +XDIS 1218: APX APXEVEX APX_F 62D47403813802000000 ccmpnb dword ptr [r8], 0x2, dfv14 +XDIS 1222: APX APXEVEX APX_F 62D4F403813802000000 ccmpnb qword ptr [r8], 0x2, dfv14 +XDIS 122c: APX APXEVEX APX_F 62D4750381F80200 ccmpnb r8w, 0x2, dfv14 +XDIS 1234: APX APXEVEX APX_F 62D4F50381F802000000 ccmpnb r8, 0x2, dfv14 +XDIS 123e: APX APXEVEX APX_F 62D4750381380200 ccmpnb word ptr [r8], 0x2, dfv14 +XDIS 1246: APX APXEVEX APX_F 62D4F503813802000000 ccmpnb qword ptr [r8], 0x2, dfv14 +XDIS 1250: APX APXEVEX APX_F 6254740738C8 ccmpnbe r8b, r9b, dfv14 +XDIS 1256: APX APXEVEX APX_F 625474073808 ccmpnbe byte ptr [r8], r9b, dfv14 +XDIS 125c: APX APXEVEX APX_F 62D4740783F802 ccmpnbe r8d, 0x2, dfv14 +XDIS 1263: APX APXEVEX APX_F 62D4F40783F802 ccmpnbe r8, 0x2, dfv14 +XDIS 126a: APX APXEVEX APX_F 62D47407833802 ccmpnbe dword ptr [r8], 0x2, dfv14 +XDIS 1271: APX APXEVEX APX_F 62D4F407833802 ccmpnbe qword ptr [r8], 0x2, dfv14 +XDIS 1278: APX APXEVEX APX_F 62D4750783F802 ccmpnbe r8w, 0x2, dfv14 +XDIS 127f: APX APXEVEX APX_F 62D4F50783F802 ccmpnbe r8, 0x2, dfv14 +XDIS 1286: APX APXEVEX APX_F 62D47507833802 ccmpnbe word ptr [r8], 0x2, dfv14 +XDIS 128d: APX APXEVEX APX_F 62D4F507833802 ccmpnbe qword ptr [r8], 0x2, dfv14 +XDIS 1294: APX APXEVEX APX_F 6254740739C8 ccmpnbe r8d, r9d, dfv14 +XDIS 129a: APX APXEVEX APX_F 6254F40739C8 ccmpnbe r8, r9, dfv14 +XDIS 12a0: APX APXEVEX APX_F 625474073908 ccmpnbe dword ptr [r8], r9d, dfv14 +XDIS 12a6: APX APXEVEX APX_F 6254F4073908 ccmpnbe qword ptr [r8], r9, dfv14 +XDIS 12ac: APX APXEVEX APX_F 6254750739C8 ccmpnbe r8w, r9w, dfv14 +XDIS 12b2: APX APXEVEX APX_F 6254F50739C8 ccmpnbe r8, r9, dfv14 +XDIS 12b8: APX APXEVEX APX_F 625475073908 ccmpnbe word ptr [r8], r9w, dfv14 +XDIS 12be: APX APXEVEX APX_F 6254F5073908 ccmpnbe qword ptr [r8], r9, dfv14 +XDIS 12c4: APX APXEVEX APX_F 625474073AC8 ccmpnbe r9b, r8b, dfv14 +XDIS 12ca: APX APXEVEX APX_F 625474073A01 ccmpnbe r8b, byte ptr [r9], dfv14 +XDIS 12d0: APX APXEVEX APX_F 625474073BC8 ccmpnbe r9d, r8d, dfv14 +XDIS 12d6: APX APXEVEX APX_F 6254F4073BC8 ccmpnbe r9, r8, dfv14 +XDIS 12dc: APX APXEVEX APX_F 625474073B01 ccmpnbe r8d, dword ptr [r9], dfv14 +XDIS 12e2: APX APXEVEX APX_F 6254F4073B01 ccmpnbe r8, qword ptr [r9], dfv14 +XDIS 12e8: APX APXEVEX APX_F 625475073BC8 ccmpnbe r9w, r8w, dfv14 +XDIS 12ee: APX APXEVEX APX_F 6254F5073BC8 ccmpnbe r9, r8, dfv14 +XDIS 12f4: APX APXEVEX APX_F 625475073B01 ccmpnbe r8w, word ptr [r9], dfv14 +XDIS 12fa: APX APXEVEX APX_F 6254F5073B01 ccmpnbe r8, qword ptr [r9], dfv14 +XDIS 1300: APX APXEVEX APX_F 62D4740780F802 ccmpnbe r8b, 0x2, dfv14 +XDIS 1307: APX APXEVEX APX_F 62D47407803802 ccmpnbe byte ptr [r8], 0x2, dfv14 +XDIS 130e: APX APXEVEX APX_F 62D4740781F802000000 ccmpnbe r8d, 0x2, dfv14 +XDIS 1318: APX APXEVEX APX_F 62D4F40781F802000000 ccmpnbe r8, 0x2, dfv14 +XDIS 1322: APX APXEVEX APX_F 62D47407813802000000 ccmpnbe dword ptr [r8], 0x2, dfv14 +XDIS 132c: APX APXEVEX APX_F 62D4F407813802000000 ccmpnbe qword ptr [r8], 0x2, dfv14 +XDIS 1336: APX APXEVEX APX_F 62D4750781F80200 ccmpnbe r8w, 0x2, dfv14 +XDIS 133e: APX APXEVEX APX_F 62D4F50781F802000000 ccmpnbe r8, 0x2, dfv14 +XDIS 1348: APX APXEVEX APX_F 62D4750781380200 ccmpnbe word ptr [r8], 0x2, dfv14 +XDIS 1350: APX APXEVEX APX_F 62D4F507813802000000 ccmpnbe qword ptr [r8], 0x2, dfv14 +XDIS 135a: APX APXEVEX APX_F 6254740D38C8 ccmpnl r8b, r9b, dfv14 +XDIS 1360: APX APXEVEX APX_F 6254740D3808 ccmpnl byte ptr [r8], r9b, dfv14 +XDIS 1366: APX APXEVEX APX_F 62D4740D83F802 ccmpnl r8d, 0x2, dfv14 +XDIS 136d: APX APXEVEX APX_F 62D4F40D83F802 ccmpnl r8, 0x2, dfv14 +XDIS 1374: APX APXEVEX APX_F 62D4740D833802 ccmpnl dword ptr [r8], 0x2, dfv14 +XDIS 137b: APX APXEVEX APX_F 62D4F40D833802 ccmpnl qword ptr [r8], 0x2, dfv14 +XDIS 1382: APX APXEVEX APX_F 62D4750D83F802 ccmpnl r8w, 0x2, dfv14 +XDIS 1389: APX APXEVEX APX_F 62D4F50D83F802 ccmpnl r8, 0x2, dfv14 +XDIS 1390: APX APXEVEX APX_F 62D4750D833802 ccmpnl word ptr [r8], 0x2, dfv14 +XDIS 1397: APX APXEVEX APX_F 62D4F50D833802 ccmpnl qword ptr [r8], 0x2, dfv14 +XDIS 139e: APX APXEVEX APX_F 6254740D39C8 ccmpnl r8d, r9d, dfv14 +XDIS 13a4: APX APXEVEX APX_F 6254F40D39C8 ccmpnl r8, r9, dfv14 +XDIS 13aa: APX APXEVEX APX_F 6254740D3908 ccmpnl dword ptr [r8], r9d, dfv14 +XDIS 13b0: APX APXEVEX APX_F 6254F40D3908 ccmpnl qword ptr [r8], r9, dfv14 +XDIS 13b6: APX APXEVEX APX_F 6254750D39C8 ccmpnl r8w, r9w, dfv14 +XDIS 13bc: APX APXEVEX APX_F 6254F50D39C8 ccmpnl r8, r9, dfv14 +XDIS 13c2: APX APXEVEX APX_F 6254750D3908 ccmpnl word ptr [r8], r9w, dfv14 +XDIS 13c8: APX APXEVEX APX_F 6254F50D3908 ccmpnl qword ptr [r8], r9, dfv14 +XDIS 13ce: APX APXEVEX APX_F 6254740D3AC8 ccmpnl r9b, r8b, dfv14 +XDIS 13d4: APX APXEVEX APX_F 6254740D3A01 ccmpnl r8b, byte ptr [r9], dfv14 +XDIS 13da: APX APXEVEX APX_F 6254740D3BC8 ccmpnl r9d, r8d, dfv14 +XDIS 13e0: APX APXEVEX APX_F 6254F40D3BC8 ccmpnl r9, r8, dfv14 +XDIS 13e6: APX APXEVEX APX_F 6254740D3B01 ccmpnl r8d, dword ptr [r9], dfv14 +XDIS 13ec: APX APXEVEX APX_F 6254F40D3B01 ccmpnl r8, qword ptr [r9], dfv14 +XDIS 13f2: APX APXEVEX APX_F 6254750D3BC8 ccmpnl r9w, r8w, dfv14 +XDIS 13f8: APX APXEVEX APX_F 6254F50D3BC8 ccmpnl r9, r8, dfv14 +XDIS 13fe: APX APXEVEX APX_F 6254750D3B01 ccmpnl r8w, word ptr [r9], dfv14 +XDIS 1404: APX APXEVEX APX_F 6254F50D3B01 ccmpnl r8, qword ptr [r9], dfv14 +XDIS 140a: APX APXEVEX APX_F 62D4740D80F802 ccmpnl r8b, 0x2, dfv14 +XDIS 1411: APX APXEVEX APX_F 62D4740D803802 ccmpnl byte ptr [r8], 0x2, dfv14 +XDIS 1418: APX APXEVEX APX_F 62D4740D81F802000000 ccmpnl r8d, 0x2, dfv14 +XDIS 1422: APX APXEVEX APX_F 62D4F40D81F802000000 ccmpnl r8, 0x2, dfv14 +XDIS 142c: APX APXEVEX APX_F 62D4740D813802000000 ccmpnl dword ptr [r8], 0x2, dfv14 +XDIS 1436: APX APXEVEX APX_F 62D4F40D813802000000 ccmpnl qword ptr [r8], 0x2, dfv14 +XDIS 1440: APX APXEVEX APX_F 62D4750D81F80200 ccmpnl r8w, 0x2, dfv14 +XDIS 1448: APX APXEVEX APX_F 62D4F50D81F802000000 ccmpnl r8, 0x2, dfv14 +XDIS 1452: APX APXEVEX APX_F 62D4750D81380200 ccmpnl word ptr [r8], 0x2, dfv14 +XDIS 145a: APX APXEVEX APX_F 62D4F50D813802000000 ccmpnl qword ptr [r8], 0x2, dfv14 +XDIS 1464: APX APXEVEX APX_F 6254740F38C8 ccmpnle r8b, r9b, dfv14 +XDIS 146a: APX APXEVEX APX_F 6254740F3808 ccmpnle byte ptr [r8], r9b, dfv14 +XDIS 1470: APX APXEVEX APX_F 62D4740F83F802 ccmpnle r8d, 0x2, dfv14 +XDIS 1477: APX APXEVEX APX_F 62D4F40F83F802 ccmpnle r8, 0x2, dfv14 +XDIS 147e: APX APXEVEX APX_F 62D4740F833802 ccmpnle dword ptr [r8], 0x2, dfv14 +XDIS 1485: APX APXEVEX APX_F 62D4F40F833802 ccmpnle qword ptr [r8], 0x2, dfv14 +XDIS 148c: APX APXEVEX APX_F 62D4750F83F802 ccmpnle r8w, 0x2, dfv14 +XDIS 1493: APX APXEVEX APX_F 62D4F50F83F802 ccmpnle r8, 0x2, dfv14 +XDIS 149a: APX APXEVEX APX_F 62D4750F833802 ccmpnle word ptr [r8], 0x2, dfv14 +XDIS 14a1: APX APXEVEX APX_F 62D4F50F833802 ccmpnle qword ptr [r8], 0x2, dfv14 +XDIS 14a8: APX APXEVEX APX_F 6254740F39C8 ccmpnle r8d, r9d, dfv14 +XDIS 14ae: APX APXEVEX APX_F 6254F40F39C8 ccmpnle r8, r9, dfv14 +XDIS 14b4: APX APXEVEX APX_F 6254740F3908 ccmpnle dword ptr [r8], r9d, dfv14 +XDIS 14ba: APX APXEVEX APX_F 6254F40F3908 ccmpnle qword ptr [r8], r9, dfv14 +XDIS 14c0: APX APXEVEX APX_F 6254750F39C8 ccmpnle r8w, r9w, dfv14 +XDIS 14c6: APX APXEVEX APX_F 6254F50F39C8 ccmpnle r8, r9, dfv14 +XDIS 14cc: APX APXEVEX APX_F 6254750F3908 ccmpnle word ptr [r8], r9w, dfv14 +XDIS 14d2: APX APXEVEX APX_F 6254F50F3908 ccmpnle qword ptr [r8], r9, dfv14 +XDIS 14d8: APX APXEVEX APX_F 6254740F3AC8 ccmpnle r9b, r8b, dfv14 +XDIS 14de: APX APXEVEX APX_F 6254740F3A01 ccmpnle r8b, byte ptr [r9], dfv14 +XDIS 14e4: APX APXEVEX APX_F 6254740F3BC8 ccmpnle r9d, r8d, dfv14 +XDIS 14ea: APX APXEVEX APX_F 6254F40F3BC8 ccmpnle r9, r8, dfv14 +XDIS 14f0: APX APXEVEX APX_F 6254740F3B01 ccmpnle r8d, dword ptr [r9], dfv14 +XDIS 14f6: APX APXEVEX APX_F 6254F40F3B01 ccmpnle r8, qword ptr [r9], dfv14 +XDIS 14fc: APX APXEVEX APX_F 6254750F3BC8 ccmpnle r9w, r8w, dfv14 +XDIS 1502: APX APXEVEX APX_F 6254F50F3BC8 ccmpnle r9, r8, dfv14 +XDIS 1508: APX APXEVEX APX_F 6254750F3B01 ccmpnle r8w, word ptr [r9], dfv14 +XDIS 150e: APX APXEVEX APX_F 6254F50F3B01 ccmpnle r8, qword ptr [r9], dfv14 +XDIS 1514: APX APXEVEX APX_F 62D4740F80F802 ccmpnle r8b, 0x2, dfv14 +XDIS 151b: APX APXEVEX APX_F 62D4740F803802 ccmpnle byte ptr [r8], 0x2, dfv14 +XDIS 1522: APX APXEVEX APX_F 62D4740F81F802000000 ccmpnle r8d, 0x2, dfv14 +XDIS 152c: APX APXEVEX APX_F 62D4F40F81F802000000 ccmpnle r8, 0x2, dfv14 +XDIS 1536: APX APXEVEX APX_F 62D4740F813802000000 ccmpnle dword ptr [r8], 0x2, dfv14 +XDIS 1540: APX APXEVEX APX_F 62D4F40F813802000000 ccmpnle qword ptr [r8], 0x2, dfv14 +XDIS 154a: APX APXEVEX APX_F 62D4750F81F80200 ccmpnle r8w, 0x2, dfv14 +XDIS 1552: APX APXEVEX APX_F 62D4F50F81F802000000 ccmpnle r8, 0x2, dfv14 +XDIS 155c: APX APXEVEX APX_F 62D4750F81380200 ccmpnle word ptr [r8], 0x2, dfv14 +XDIS 1564: APX APXEVEX APX_F 62D4F50F813802000000 ccmpnle qword ptr [r8], 0x2, dfv14 +XDIS 156e: APX APXEVEX APX_F 6254740138C8 ccmpno r8b, r9b, dfv14 +XDIS 1574: APX APXEVEX APX_F 625474013808 ccmpno byte ptr [r8], r9b, dfv14 +XDIS 157a: APX APXEVEX APX_F 62D4740183F802 ccmpno r8d, 0x2, dfv14 +XDIS 1581: APX APXEVEX APX_F 62D4F40183F802 ccmpno r8, 0x2, dfv14 +XDIS 1588: APX APXEVEX APX_F 62D47401833802 ccmpno dword ptr [r8], 0x2, dfv14 +XDIS 158f: APX APXEVEX APX_F 62D4F401833802 ccmpno qword ptr [r8], 0x2, dfv14 +XDIS 1596: APX APXEVEX APX_F 62D4750183F802 ccmpno r8w, 0x2, dfv14 +XDIS 159d: APX APXEVEX APX_F 62D4F50183F802 ccmpno r8, 0x2, dfv14 +XDIS 15a4: APX APXEVEX APX_F 62D47501833802 ccmpno word ptr [r8], 0x2, dfv14 +XDIS 15ab: APX APXEVEX APX_F 62D4F501833802 ccmpno qword ptr [r8], 0x2, dfv14 +XDIS 15b2: APX APXEVEX APX_F 6254740139C8 ccmpno r8d, r9d, dfv14 +XDIS 15b8: APX APXEVEX APX_F 6254F40139C8 ccmpno r8, r9, dfv14 +XDIS 15be: APX APXEVEX APX_F 625474013908 ccmpno dword ptr [r8], r9d, dfv14 +XDIS 15c4: APX APXEVEX APX_F 6254F4013908 ccmpno qword ptr [r8], r9, dfv14 +XDIS 15ca: APX APXEVEX APX_F 6254750139C8 ccmpno r8w, r9w, dfv14 +XDIS 15d0: APX APXEVEX APX_F 6254F50139C8 ccmpno r8, r9, dfv14 +XDIS 15d6: APX APXEVEX APX_F 625475013908 ccmpno word ptr [r8], r9w, dfv14 +XDIS 15dc: APX APXEVEX APX_F 6254F5013908 ccmpno qword ptr [r8], r9, dfv14 +XDIS 15e2: APX APXEVEX APX_F 625474013AC8 ccmpno r9b, r8b, dfv14 +XDIS 15e8: APX APXEVEX APX_F 625474013A01 ccmpno r8b, byte ptr [r9], dfv14 +XDIS 15ee: APX APXEVEX APX_F 625474013BC8 ccmpno r9d, r8d, dfv14 +XDIS 15f4: APX APXEVEX APX_F 6254F4013BC8 ccmpno r9, r8, dfv14 +XDIS 15fa: APX APXEVEX APX_F 625474013B01 ccmpno r8d, dword ptr [r9], dfv14 +XDIS 1600: APX APXEVEX APX_F 6254F4013B01 ccmpno r8, qword ptr [r9], dfv14 +XDIS 1606: APX APXEVEX APX_F 625475013BC8 ccmpno r9w, r8w, dfv14 +XDIS 160c: APX APXEVEX APX_F 6254F5013BC8 ccmpno r9, r8, dfv14 +XDIS 1612: APX APXEVEX APX_F 625475013B01 ccmpno r8w, word ptr [r9], dfv14 +XDIS 1618: APX APXEVEX APX_F 6254F5013B01 ccmpno r8, qword ptr [r9], dfv14 +XDIS 161e: APX APXEVEX APX_F 62D4740180F802 ccmpno r8b, 0x2, dfv14 +XDIS 1625: APX APXEVEX APX_F 62D47401803802 ccmpno byte ptr [r8], 0x2, dfv14 +XDIS 162c: APX APXEVEX APX_F 62D4740181F802000000 ccmpno r8d, 0x2, dfv14 +XDIS 1636: APX APXEVEX APX_F 62D4F40181F802000000 ccmpno r8, 0x2, dfv14 +XDIS 1640: APX APXEVEX APX_F 62D47401813802000000 ccmpno dword ptr [r8], 0x2, dfv14 +XDIS 164a: APX APXEVEX APX_F 62D4F401813802000000 ccmpno qword ptr [r8], 0x2, dfv14 +XDIS 1654: APX APXEVEX APX_F 62D4750181F80200 ccmpno r8w, 0x2, dfv14 +XDIS 165c: APX APXEVEX APX_F 62D4F50181F802000000 ccmpno r8, 0x2, dfv14 +XDIS 1666: APX APXEVEX APX_F 62D4750181380200 ccmpno word ptr [r8], 0x2, dfv14 +XDIS 166e: APX APXEVEX APX_F 62D4F501813802000000 ccmpno qword ptr [r8], 0x2, dfv14 +XDIS 1678: APX APXEVEX APX_F 6254740938C8 ccmpns r8b, r9b, dfv14 +XDIS 167e: APX APXEVEX APX_F 625474093808 ccmpns byte ptr [r8], r9b, dfv14 +XDIS 1684: APX APXEVEX APX_F 62D4740983F802 ccmpns r8d, 0x2, dfv14 +XDIS 168b: APX APXEVEX APX_F 62D4F40983F802 ccmpns r8, 0x2, dfv14 +XDIS 1692: APX APXEVEX APX_F 62D47409833802 ccmpns dword ptr [r8], 0x2, dfv14 +XDIS 1699: APX APXEVEX APX_F 62D4F409833802 ccmpns qword ptr [r8], 0x2, dfv14 +XDIS 16a0: APX APXEVEX APX_F 62D4750983F802 ccmpns r8w, 0x2, dfv14 +XDIS 16a7: APX APXEVEX APX_F 62D4F50983F802 ccmpns r8, 0x2, dfv14 +XDIS 16ae: APX APXEVEX APX_F 62D47509833802 ccmpns word ptr [r8], 0x2, dfv14 +XDIS 16b5: APX APXEVEX APX_F 62D4F509833802 ccmpns qword ptr [r8], 0x2, dfv14 +XDIS 16bc: APX APXEVEX APX_F 6254740939C8 ccmpns r8d, r9d, dfv14 +XDIS 16c2: APX APXEVEX APX_F 6254F40939C8 ccmpns r8, r9, dfv14 +XDIS 16c8: APX APXEVEX APX_F 625474093908 ccmpns dword ptr [r8], r9d, dfv14 +XDIS 16ce: APX APXEVEX APX_F 6254F4093908 ccmpns qword ptr [r8], r9, dfv14 +XDIS 16d4: APX APXEVEX APX_F 6254750939C8 ccmpns r8w, r9w, dfv14 +XDIS 16da: APX APXEVEX APX_F 6254F50939C8 ccmpns r8, r9, dfv14 +XDIS 16e0: APX APXEVEX APX_F 625475093908 ccmpns word ptr [r8], r9w, dfv14 +XDIS 16e6: APX APXEVEX APX_F 6254F5093908 ccmpns qword ptr [r8], r9, dfv14 +XDIS 16ec: APX APXEVEX APX_F 625474093AC8 ccmpns r9b, r8b, dfv14 +XDIS 16f2: APX APXEVEX APX_F 625474093A01 ccmpns r8b, byte ptr [r9], dfv14 +XDIS 16f8: APX APXEVEX APX_F 625474093BC8 ccmpns r9d, r8d, dfv14 +XDIS 16fe: APX APXEVEX APX_F 6254F4093BC8 ccmpns r9, r8, dfv14 +XDIS 1704: APX APXEVEX APX_F 625474093B01 ccmpns r8d, dword ptr [r9], dfv14 +XDIS 170a: APX APXEVEX APX_F 6254F4093B01 ccmpns r8, qword ptr [r9], dfv14 +XDIS 1710: APX APXEVEX APX_F 625475093BC8 ccmpns r9w, r8w, dfv14 +XDIS 1716: APX APXEVEX APX_F 6254F5093BC8 ccmpns r9, r8, dfv14 +XDIS 171c: APX APXEVEX APX_F 625475093B01 ccmpns r8w, word ptr [r9], dfv14 +XDIS 1722: APX APXEVEX APX_F 6254F5093B01 ccmpns r8, qword ptr [r9], dfv14 +XDIS 1728: APX APXEVEX APX_F 62D4740980F802 ccmpns r8b, 0x2, dfv14 +XDIS 172f: APX APXEVEX APX_F 62D47409803802 ccmpns byte ptr [r8], 0x2, dfv14 +XDIS 1736: APX APXEVEX APX_F 62D4740981F802000000 ccmpns r8d, 0x2, dfv14 +XDIS 1740: APX APXEVEX APX_F 62D4F40981F802000000 ccmpns r8, 0x2, dfv14 +XDIS 174a: APX APXEVEX APX_F 62D47409813802000000 ccmpns dword ptr [r8], 0x2, dfv14 +XDIS 1754: APX APXEVEX APX_F 62D4F409813802000000 ccmpns qword ptr [r8], 0x2, dfv14 +XDIS 175e: APX APXEVEX APX_F 62D4750981F80200 ccmpns r8w, 0x2, dfv14 +XDIS 1766: APX APXEVEX APX_F 62D4F50981F802000000 ccmpns r8, 0x2, dfv14 +XDIS 1770: APX APXEVEX APX_F 62D4750981380200 ccmpns word ptr [r8], 0x2, dfv14 +XDIS 1778: APX APXEVEX APX_F 62D4F509813802000000 ccmpns qword ptr [r8], 0x2, dfv14 +XDIS 1782: APX APXEVEX APX_F 6254740538C8 ccmpnz r8b, r9b, dfv14 +XDIS 1788: APX APXEVEX APX_F 625474053808 ccmpnz byte ptr [r8], r9b, dfv14 +XDIS 178e: APX APXEVEX APX_F 62D4740583F802 ccmpnz r8d, 0x2, dfv14 +XDIS 1795: APX APXEVEX APX_F 62D4F40583F802 ccmpnz r8, 0x2, dfv14 +XDIS 179c: APX APXEVEX APX_F 62D47405833802 ccmpnz dword ptr [r8], 0x2, dfv14 +XDIS 17a3: APX APXEVEX APX_F 62D4F405833802 ccmpnz qword ptr [r8], 0x2, dfv14 +XDIS 17aa: APX APXEVEX APX_F 62D4750583F802 ccmpnz r8w, 0x2, dfv14 +XDIS 17b1: APX APXEVEX APX_F 62D4F50583F802 ccmpnz r8, 0x2, dfv14 +XDIS 17b8: APX APXEVEX APX_F 62D47505833802 ccmpnz word ptr [r8], 0x2, dfv14 +XDIS 17bf: APX APXEVEX APX_F 62D4F505833802 ccmpnz qword ptr [r8], 0x2, dfv14 +XDIS 17c6: APX APXEVEX APX_F 6254740539C8 ccmpnz r8d, r9d, dfv14 +XDIS 17cc: APX APXEVEX APX_F 6254F40539C8 ccmpnz r8, r9, dfv14 +XDIS 17d2: APX APXEVEX APX_F 625474053908 ccmpnz dword ptr [r8], r9d, dfv14 +XDIS 17d8: APX APXEVEX APX_F 6254F4053908 ccmpnz qword ptr [r8], r9, dfv14 +XDIS 17de: APX APXEVEX APX_F 6254750539C8 ccmpnz r8w, r9w, dfv14 +XDIS 17e4: APX APXEVEX APX_F 6254F50539C8 ccmpnz r8, r9, dfv14 +XDIS 17ea: APX APXEVEX APX_F 625475053908 ccmpnz word ptr [r8], r9w, dfv14 +XDIS 17f0: APX APXEVEX APX_F 6254F5053908 ccmpnz qword ptr [r8], r9, dfv14 +XDIS 17f6: APX APXEVEX APX_F 625474053AC8 ccmpnz r9b, r8b, dfv14 +XDIS 17fc: APX APXEVEX APX_F 625474053A01 ccmpnz r8b, byte ptr [r9], dfv14 +XDIS 1802: APX APXEVEX APX_F 625474053BC8 ccmpnz r9d, r8d, dfv14 +XDIS 1808: APX APXEVEX APX_F 6254F4053BC8 ccmpnz r9, r8, dfv14 +XDIS 180e: APX APXEVEX APX_F 625474053B01 ccmpnz r8d, dword ptr [r9], dfv14 +XDIS 1814: APX APXEVEX APX_F 6254F4053B01 ccmpnz r8, qword ptr [r9], dfv14 +XDIS 181a: APX APXEVEX APX_F 625475053BC8 ccmpnz r9w, r8w, dfv14 +XDIS 1820: APX APXEVEX APX_F 6254F5053BC8 ccmpnz r9, r8, dfv14 +XDIS 1826: APX APXEVEX APX_F 625475053B01 ccmpnz r8w, word ptr [r9], dfv14 +XDIS 182c: APX APXEVEX APX_F 6254F5053B01 ccmpnz r8, qword ptr [r9], dfv14 +XDIS 1832: APX APXEVEX APX_F 62D4740580F802 ccmpnz r8b, 0x2, dfv14 +XDIS 1839: APX APXEVEX APX_F 62D47405803802 ccmpnz byte ptr [r8], 0x2, dfv14 +XDIS 1840: APX APXEVEX APX_F 62D4740581F802000000 ccmpnz r8d, 0x2, dfv14 +XDIS 184a: APX APXEVEX APX_F 62D4F40581F802000000 ccmpnz r8, 0x2, dfv14 +XDIS 1854: APX APXEVEX APX_F 62D47405813802000000 ccmpnz dword ptr [r8], 0x2, dfv14 +XDIS 185e: APX APXEVEX APX_F 62D4F405813802000000 ccmpnz qword ptr [r8], 0x2, dfv14 +XDIS 1868: APX APXEVEX APX_F 62D4750581F80200 ccmpnz r8w, 0x2, dfv14 +XDIS 1870: APX APXEVEX APX_F 62D4F50581F802000000 ccmpnz r8, 0x2, dfv14 +XDIS 187a: APX APXEVEX APX_F 62D4750581380200 ccmpnz word ptr [r8], 0x2, dfv14 +XDIS 1882: APX APXEVEX APX_F 62D4F505813802000000 ccmpnz qword ptr [r8], 0x2, dfv14 +XDIS 188c: APX APXEVEX APX_F 6254740038C8 ccmpo r8b, r9b, dfv14 +XDIS 1892: APX APXEVEX APX_F 625474003808 ccmpo byte ptr [r8], r9b, dfv14 +XDIS 1898: APX APXEVEX APX_F 62D4740083F802 ccmpo r8d, 0x2, dfv14 +XDIS 189f: APX APXEVEX APX_F 62D4F40083F802 ccmpo r8, 0x2, dfv14 +XDIS 18a6: APX APXEVEX APX_F 62D47400833802 ccmpo dword ptr [r8], 0x2, dfv14 +XDIS 18ad: APX APXEVEX APX_F 62D4F400833802 ccmpo qword ptr [r8], 0x2, dfv14 +XDIS 18b4: APX APXEVEX APX_F 62D4750083F802 ccmpo r8w, 0x2, dfv14 +XDIS 18bb: APX APXEVEX APX_F 62D4F50083F802 ccmpo r8, 0x2, dfv14 +XDIS 18c2: APX APXEVEX APX_F 62D47500833802 ccmpo word ptr [r8], 0x2, dfv14 +XDIS 18c9: APX APXEVEX APX_F 62D4F500833802 ccmpo qword ptr [r8], 0x2, dfv14 +XDIS 18d0: APX APXEVEX APX_F 6254740039C8 ccmpo r8d, r9d, dfv14 +XDIS 18d6: APX APXEVEX APX_F 6254F40039C8 ccmpo r8, r9, dfv14 +XDIS 18dc: APX APXEVEX APX_F 625474003908 ccmpo dword ptr [r8], r9d, dfv14 +XDIS 18e2: APX APXEVEX APX_F 6254F4003908 ccmpo qword ptr [r8], r9, dfv14 +XDIS 18e8: APX APXEVEX APX_F 6254750039C8 ccmpo r8w, r9w, dfv14 +XDIS 18ee: APX APXEVEX APX_F 6254F50039C8 ccmpo r8, r9, dfv14 +XDIS 18f4: APX APXEVEX APX_F 625475003908 ccmpo word ptr [r8], r9w, dfv14 +XDIS 18fa: APX APXEVEX APX_F 6254F5003908 ccmpo qword ptr [r8], r9, dfv14 +XDIS 1900: APX APXEVEX APX_F 625474003AC8 ccmpo r9b, r8b, dfv14 +XDIS 1906: APX APXEVEX APX_F 625474003A01 ccmpo r8b, byte ptr [r9], dfv14 +XDIS 190c: APX APXEVEX APX_F 625474003BC8 ccmpo r9d, r8d, dfv14 +XDIS 1912: APX APXEVEX APX_F 6254F4003BC8 ccmpo r9, r8, dfv14 +XDIS 1918: APX APXEVEX APX_F 625474003B01 ccmpo r8d, dword ptr [r9], dfv14 +XDIS 191e: APX APXEVEX APX_F 6254F4003B01 ccmpo r8, qword ptr [r9], dfv14 +XDIS 1924: APX APXEVEX APX_F 625475003BC8 ccmpo r9w, r8w, dfv14 +XDIS 192a: APX APXEVEX APX_F 6254F5003BC8 ccmpo r9, r8, dfv14 +XDIS 1930: APX APXEVEX APX_F 625475003B01 ccmpo r8w, word ptr [r9], dfv14 +XDIS 1936: APX APXEVEX APX_F 6254F5003B01 ccmpo r8, qword ptr [r9], dfv14 +XDIS 193c: APX APXEVEX APX_F 62D4740080F802 ccmpo r8b, 0x2, dfv14 +XDIS 1943: APX APXEVEX APX_F 62D47400803802 ccmpo byte ptr [r8], 0x2, dfv14 +XDIS 194a: APX APXEVEX APX_F 62D4740081F802000000 ccmpo r8d, 0x2, dfv14 +XDIS 1954: APX APXEVEX APX_F 62D4F40081F802000000 ccmpo r8, 0x2, dfv14 +XDIS 195e: APX APXEVEX APX_F 62D47400813802000000 ccmpo dword ptr [r8], 0x2, dfv14 +XDIS 1968: APX APXEVEX APX_F 62D4F400813802000000 ccmpo qword ptr [r8], 0x2, dfv14 +XDIS 1972: APX APXEVEX APX_F 62D4750081F80200 ccmpo r8w, 0x2, dfv14 +XDIS 197a: APX APXEVEX APX_F 62D4F50081F802000000 ccmpo r8, 0x2, dfv14 +XDIS 1984: APX APXEVEX APX_F 62D4750081380200 ccmpo word ptr [r8], 0x2, dfv14 +XDIS 198c: APX APXEVEX APX_F 62D4F500813802000000 ccmpo qword ptr [r8], 0x2, dfv14 +XDIS 1996: APX APXEVEX APX_F 6254740838C8 ccmps r8b, r9b, dfv14 +XDIS 199c: APX APXEVEX APX_F 625474083808 ccmps byte ptr [r8], r9b, dfv14 +XDIS 19a2: APX APXEVEX APX_F 62D4740883F802 ccmps r8d, 0x2, dfv14 +XDIS 19a9: APX APXEVEX APX_F 62D4F40883F802 ccmps r8, 0x2, dfv14 +XDIS 19b0: APX APXEVEX APX_F 62D47408833802 ccmps dword ptr [r8], 0x2, dfv14 +XDIS 19b7: APX APXEVEX APX_F 62D4F408833802 ccmps qword ptr [r8], 0x2, dfv14 +XDIS 19be: APX APXEVEX APX_F 62D4750883F802 ccmps r8w, 0x2, dfv14 +XDIS 19c5: APX APXEVEX APX_F 62D4F50883F802 ccmps r8, 0x2, dfv14 +XDIS 19cc: APX APXEVEX APX_F 62D47508833802 ccmps word ptr [r8], 0x2, dfv14 +XDIS 19d3: APX APXEVEX APX_F 62D4F508833802 ccmps qword ptr [r8], 0x2, dfv14 +XDIS 19da: APX APXEVEX APX_F 6254740839C8 ccmps r8d, r9d, dfv14 +XDIS 19e0: APX APXEVEX APX_F 6254F40839C8 ccmps r8, r9, dfv14 +XDIS 19e6: APX APXEVEX APX_F 625474083908 ccmps dword ptr [r8], r9d, dfv14 +XDIS 19ec: APX APXEVEX APX_F 6254F4083908 ccmps qword ptr [r8], r9, dfv14 +XDIS 19f2: APX APXEVEX APX_F 6254750839C8 ccmps r8w, r9w, dfv14 +XDIS 19f8: APX APXEVEX APX_F 6254F50839C8 ccmps r8, r9, dfv14 +XDIS 19fe: APX APXEVEX APX_F 625475083908 ccmps word ptr [r8], r9w, dfv14 +XDIS 1a04: APX APXEVEX APX_F 6254F5083908 ccmps qword ptr [r8], r9, dfv14 +XDIS 1a0a: APX APXEVEX APX_F 625474083AC8 ccmps r9b, r8b, dfv14 +XDIS 1a10: APX APXEVEX APX_F 625474083A01 ccmps r8b, byte ptr [r9], dfv14 +XDIS 1a16: APX APXEVEX APX_F 625474083BC8 ccmps r9d, r8d, dfv14 +XDIS 1a1c: APX APXEVEX APX_F 6254F4083BC8 ccmps r9, r8, dfv14 +XDIS 1a22: APX APXEVEX APX_F 625474083B01 ccmps r8d, dword ptr [r9], dfv14 +XDIS 1a28: APX APXEVEX APX_F 6254F4083B01 ccmps r8, qword ptr [r9], dfv14 +XDIS 1a2e: APX APXEVEX APX_F 625475083BC8 ccmps r9w, r8w, dfv14 +XDIS 1a34: APX APXEVEX APX_F 6254F5083BC8 ccmps r9, r8, dfv14 +XDIS 1a3a: APX APXEVEX APX_F 625475083B01 ccmps r8w, word ptr [r9], dfv14 +XDIS 1a40: APX APXEVEX APX_F 6254F5083B01 ccmps r8, qword ptr [r9], dfv14 +XDIS 1a46: APX APXEVEX APX_F 62D4740880F802 ccmps r8b, 0x2, dfv14 +XDIS 1a4d: APX APXEVEX APX_F 62D47408803802 ccmps byte ptr [r8], 0x2, dfv14 +XDIS 1a54: APX APXEVEX APX_F 62D4740881F802000000 ccmps r8d, 0x2, dfv14 +XDIS 1a5e: APX APXEVEX APX_F 62D4F40881F802000000 ccmps r8, 0x2, dfv14 +XDIS 1a68: APX APXEVEX APX_F 62D47408813802000000 ccmps dword ptr [r8], 0x2, dfv14 +XDIS 1a72: APX APXEVEX APX_F 62D4F408813802000000 ccmps qword ptr [r8], 0x2, dfv14 +XDIS 1a7c: APX APXEVEX APX_F 62D4750881F80200 ccmps r8w, 0x2, dfv14 +XDIS 1a84: APX APXEVEX APX_F 62D4F50881F802000000 ccmps r8, 0x2, dfv14 +XDIS 1a8e: APX APXEVEX APX_F 62D4750881380200 ccmps word ptr [r8], 0x2, dfv14 +XDIS 1a96: APX APXEVEX APX_F 62D4F508813802000000 ccmps qword ptr [r8], 0x2, dfv14 +XDIS 1aa0: APX APXEVEX APX_F 6254740A38C8 ccmpt r8b, r9b, dfv14 +XDIS 1aa6: APX APXEVEX APX_F 6254740A3808 ccmpt byte ptr [r8], r9b, dfv14 +XDIS 1aac: APX APXEVEX APX_F 62D4740A83F802 ccmpt r8d, 0x2, dfv14 +XDIS 1ab3: APX APXEVEX APX_F 62D4F40A83F802 ccmpt r8, 0x2, dfv14 +XDIS 1aba: APX APXEVEX APX_F 62D4740A833802 ccmpt dword ptr [r8], 0x2, dfv14 +XDIS 1ac1: APX APXEVEX APX_F 62D4F40A833802 ccmpt qword ptr [r8], 0x2, dfv14 +XDIS 1ac8: APX APXEVEX APX_F 62D4750A83F802 ccmpt r8w, 0x2, dfv14 +XDIS 1acf: APX APXEVEX APX_F 62D4F50A83F802 ccmpt r8, 0x2, dfv14 +XDIS 1ad6: APX APXEVEX APX_F 62D4750A833802 ccmpt word ptr [r8], 0x2, dfv14 +XDIS 1add: APX APXEVEX APX_F 62D4F50A833802 ccmpt qword ptr [r8], 0x2, dfv14 +XDIS 1ae4: APX APXEVEX APX_F 6254740A39C8 ccmpt r8d, r9d, dfv14 +XDIS 1aea: APX APXEVEX APX_F 6254F40A39C8 ccmpt r8, r9, dfv14 +XDIS 1af0: APX APXEVEX APX_F 6254740A3908 ccmpt dword ptr [r8], r9d, dfv14 +XDIS 1af6: APX APXEVEX APX_F 6254F40A3908 ccmpt qword ptr [r8], r9, dfv14 +XDIS 1afc: APX APXEVEX APX_F 6254750A39C8 ccmpt r8w, r9w, dfv14 +XDIS 1b02: APX APXEVEX APX_F 6254F50A39C8 ccmpt r8, r9, dfv14 +XDIS 1b08: APX APXEVEX APX_F 6254750A3908 ccmpt word ptr [r8], r9w, dfv14 +XDIS 1b0e: APX APXEVEX APX_F 6254F50A3908 ccmpt qword ptr [r8], r9, dfv14 +XDIS 1b14: APX APXEVEX APX_F 6254740A3AC8 ccmpt r9b, r8b, dfv14 +XDIS 1b1a: APX APXEVEX APX_F 6254740A3A01 ccmpt r8b, byte ptr [r9], dfv14 +XDIS 1b20: APX APXEVEX APX_F 6254740A3BC8 ccmpt r9d, r8d, dfv14 +XDIS 1b26: APX APXEVEX APX_F 6254F40A3BC8 ccmpt r9, r8, dfv14 +XDIS 1b2c: APX APXEVEX APX_F 6254740A3B01 ccmpt r8d, dword ptr [r9], dfv14 +XDIS 1b32: APX APXEVEX APX_F 6254F40A3B01 ccmpt r8, qword ptr [r9], dfv14 +XDIS 1b38: APX APXEVEX APX_F 6254750A3BC8 ccmpt r9w, r8w, dfv14 +XDIS 1b3e: APX APXEVEX APX_F 6254F50A3BC8 ccmpt r9, r8, dfv14 +XDIS 1b44: APX APXEVEX APX_F 6254750A3B01 ccmpt r8w, word ptr [r9], dfv14 +XDIS 1b4a: APX APXEVEX APX_F 6254F50A3B01 ccmpt r8, qword ptr [r9], dfv14 +XDIS 1b50: APX APXEVEX APX_F 62D4740A80F802 ccmpt r8b, 0x2, dfv14 +XDIS 1b57: APX APXEVEX APX_F 62D4740A803802 ccmpt byte ptr [r8], 0x2, dfv14 +XDIS 1b5e: APX APXEVEX APX_F 62D4740A81F802000000 ccmpt r8d, 0x2, dfv14 +XDIS 1b68: APX APXEVEX APX_F 62D4F40A81F802000000 ccmpt r8, 0x2, dfv14 +XDIS 1b72: APX APXEVEX APX_F 62D4740A813802000000 ccmpt dword ptr [r8], 0x2, dfv14 +XDIS 1b7c: APX APXEVEX APX_F 62D4F40A813802000000 ccmpt qword ptr [r8], 0x2, dfv14 +XDIS 1b86: APX APXEVEX APX_F 62D4750A81F80200 ccmpt r8w, 0x2, dfv14 +XDIS 1b8e: APX APXEVEX APX_F 62D4F50A81F802000000 ccmpt r8, 0x2, dfv14 +XDIS 1b98: APX APXEVEX APX_F 62D4750A81380200 ccmpt word ptr [r8], 0x2, dfv14 +XDIS 1ba0: APX APXEVEX APX_F 62D4F50A813802000000 ccmpt qword ptr [r8], 0x2, dfv14 +XDIS 1baa: APX APXEVEX APX_F 6254740438C8 ccmpz r8b, r9b, dfv14 +XDIS 1bb0: APX APXEVEX APX_F 625474043808 ccmpz byte ptr [r8], r9b, dfv14 +XDIS 1bb6: APX APXEVEX APX_F 62D4740483F802 ccmpz r8d, 0x2, dfv14 +XDIS 1bbd: APX APXEVEX APX_F 62D4F40483F802 ccmpz r8, 0x2, dfv14 +XDIS 1bc4: APX APXEVEX APX_F 62D47404833802 ccmpz dword ptr [r8], 0x2, dfv14 +XDIS 1bcb: APX APXEVEX APX_F 62D4F404833802 ccmpz qword ptr [r8], 0x2, dfv14 +XDIS 1bd2: APX APXEVEX APX_F 62D4750483F802 ccmpz r8w, 0x2, dfv14 +XDIS 1bd9: APX APXEVEX APX_F 62D4F50483F802 ccmpz r8, 0x2, dfv14 +XDIS 1be0: APX APXEVEX APX_F 62D47504833802 ccmpz word ptr [r8], 0x2, dfv14 +XDIS 1be7: APX APXEVEX APX_F 62D4F504833802 ccmpz qword ptr [r8], 0x2, dfv14 +XDIS 1bee: APX APXEVEX APX_F 6254740439C8 ccmpz r8d, r9d, dfv14 +XDIS 1bf4: APX APXEVEX APX_F 6254F40439C8 ccmpz r8, r9, dfv14 +XDIS 1bfa: APX APXEVEX APX_F 625474043908 ccmpz dword ptr [r8], r9d, dfv14 +XDIS 1c00: APX APXEVEX APX_F 6254F4043908 ccmpz qword ptr [r8], r9, dfv14 +XDIS 1c06: APX APXEVEX APX_F 6254750439C8 ccmpz r8w, r9w, dfv14 +XDIS 1c0c: APX APXEVEX APX_F 6254F50439C8 ccmpz r8, r9, dfv14 +XDIS 1c12: APX APXEVEX APX_F 625475043908 ccmpz word ptr [r8], r9w, dfv14 +XDIS 1c18: APX APXEVEX APX_F 6254F5043908 ccmpz qword ptr [r8], r9, dfv14 +XDIS 1c1e: APX APXEVEX APX_F 625474043AC8 ccmpz r9b, r8b, dfv14 +XDIS 1c24: APX APXEVEX APX_F 625474043A01 ccmpz r8b, byte ptr [r9], dfv14 +XDIS 1c2a: APX APXEVEX APX_F 625474043BC8 ccmpz r9d, r8d, dfv14 +XDIS 1c30: APX APXEVEX APX_F 6254F4043BC8 ccmpz r9, r8, dfv14 +XDIS 1c36: APX APXEVEX APX_F 625474043B01 ccmpz r8d, dword ptr [r9], dfv14 +XDIS 1c3c: APX APXEVEX APX_F 6254F4043B01 ccmpz r8, qword ptr [r9], dfv14 +XDIS 1c42: APX APXEVEX APX_F 625475043BC8 ccmpz r9w, r8w, dfv14 +XDIS 1c48: APX APXEVEX APX_F 6254F5043BC8 ccmpz r9, r8, dfv14 +XDIS 1c4e: APX APXEVEX APX_F 625475043B01 ccmpz r8w, word ptr [r9], dfv14 +XDIS 1c54: APX APXEVEX APX_F 6254F5043B01 ccmpz r8, qword ptr [r9], dfv14 +XDIS 1c5a: APX APXEVEX APX_F 62D4740480F802 ccmpz r8b, 0x2, dfv14 +XDIS 1c61: APX APXEVEX APX_F 62D47404803802 ccmpz byte ptr [r8], 0x2, dfv14 +XDIS 1c68: APX APXEVEX APX_F 62D4740481F802000000 ccmpz r8d, 0x2, dfv14 +XDIS 1c72: APX APXEVEX APX_F 62D4F40481F802000000 ccmpz r8, 0x2, dfv14 +XDIS 1c7c: APX APXEVEX APX_F 62D47404813802000000 ccmpz dword ptr [r8], 0x2, dfv14 +XDIS 1c86: APX APXEVEX APX_F 62D4F404813802000000 ccmpz qword ptr [r8], 0x2, dfv14 +XDIS 1c90: APX APXEVEX APX_F 62D4750481F80200 ccmpz r8w, 0x2, dfv14 +XDIS 1c98: APX APXEVEX APX_F 62D4F50481F802000000 ccmpz r8, 0x2, dfv14 +XDIS 1ca2: APX APXEVEX APX_F 62D4750481380200 ccmpz word ptr [r8], 0x2, dfv14 +XDIS 1caa: APX APXEVEX APX_F 62D4F504813802000000 ccmpz qword ptr [r8], 0x2, dfv14 +XDIS 1cb4: APX APXEVEX APX_F 62547C0842C1 cfcmovb r8d, r9d +XDIS 1cba: APX APXEVEX APX_F 6254FC0842C1 cfcmovb r8, r9 +XDIS 1cc0: APX APXEVEX APX_F 62547C084201 cfcmovb r8d, dword ptr [r9] +XDIS 1cc6: APX APXEVEX APX_F 6254FC084201 cfcmovb r8, qword ptr [r9] +XDIS 1ccc: APX APXEVEX APX_F 62547D0842C1 cfcmovb r8w, r9w +XDIS 1cd2: APX APXEVEX APX_F 6254FD0842C1 cfcmovb r8, r9 +XDIS 1cd8: APX APXEVEX APX_F 62547D084201 cfcmovb r8w, word ptr [r9] +XDIS 1cde: APX APXEVEX APX_F 6254FD084201 cfcmovb r8, qword ptr [r9] +XDIS 1ce4: APX APXEVEX APX_F 62547C0C42C8 cfcmovb r8d, r9d +XDIS 1cea: APX APXEVEX APX_F 6254FC0C42C8 cfcmovb r8, r9 +XDIS 1cf0: APX APXEVEX APX_F 62547D0C42C8 cfcmovb r8w, r9w +XDIS 1cf6: APX APXEVEX APX_F 6254FD0C42C8 cfcmovb r8, r9 +XDIS 1cfc: APX APXEVEX APX_F 62547C0C4208 cfcmovb dword ptr [r8], r9d +XDIS 1d02: APX APXEVEX APX_F 6254FC0C4208 cfcmovb qword ptr [r8], r9 +XDIS 1d08: APX APXEVEX APX_F 62547D0C4208 cfcmovb word ptr [r8], r9w +XDIS 1d0e: APX APXEVEX APX_F 6254FD0C4208 cfcmovb qword ptr [r8], r9 +XDIS 1d14: APX APXEVEX APX_F 62543C1C42CA cfcmovb r8d, r9d, r10d +XDIS 1d1a: APX APXEVEX APX_F 6254BC1C42CA cfcmovb r8, r9, r10 +XDIS 1d20: APX APXEVEX APX_F 62543C1C420A cfcmovb r8d, r9d, dword ptr [r10] +XDIS 1d26: APX APXEVEX APX_F 6254BC1C420A cfcmovb r8, r9, qword ptr [r10] +XDIS 1d2c: APX APXEVEX APX_F 62543D1C42CA cfcmovb r8w, r9w, r10w +XDIS 1d32: APX APXEVEX APX_F 6254BD1C42CA cfcmovb r8, r9, r10 +XDIS 1d38: APX APXEVEX APX_F 62543D1C420A cfcmovb r8w, r9w, word ptr [r10] +XDIS 1d3e: APX APXEVEX APX_F 6254BD1C420A cfcmovb r8, r9, qword ptr [r10] +XDIS 1d44: APX APXEVEX APX_F 62547C0846C1 cfcmovbe r8d, r9d +XDIS 1d4a: APX APXEVEX APX_F 6254FC0846C1 cfcmovbe r8, r9 +XDIS 1d50: APX APXEVEX APX_F 62547C084601 cfcmovbe r8d, dword ptr [r9] +XDIS 1d56: APX APXEVEX APX_F 6254FC084601 cfcmovbe r8, qword ptr [r9] +XDIS 1d5c: APX APXEVEX APX_F 62547D0846C1 cfcmovbe r8w, r9w +XDIS 1d62: APX APXEVEX APX_F 6254FD0846C1 cfcmovbe r8, r9 +XDIS 1d68: APX APXEVEX APX_F 62547D084601 cfcmovbe r8w, word ptr [r9] +XDIS 1d6e: APX APXEVEX APX_F 6254FD084601 cfcmovbe r8, qword ptr [r9] +XDIS 1d74: APX APXEVEX APX_F 62547C0C46C8 cfcmovbe r8d, r9d +XDIS 1d7a: APX APXEVEX APX_F 6254FC0C46C8 cfcmovbe r8, r9 +XDIS 1d80: APX APXEVEX APX_F 62547D0C46C8 cfcmovbe r8w, r9w +XDIS 1d86: APX APXEVEX APX_F 6254FD0C46C8 cfcmovbe r8, r9 +XDIS 1d8c: APX APXEVEX APX_F 62547C0C4608 cfcmovbe dword ptr [r8], r9d +XDIS 1d92: APX APXEVEX APX_F 6254FC0C4608 cfcmovbe qword ptr [r8], r9 +XDIS 1d98: APX APXEVEX APX_F 62547D0C4608 cfcmovbe word ptr [r8], r9w +XDIS 1d9e: APX APXEVEX APX_F 6254FD0C4608 cfcmovbe qword ptr [r8], r9 +XDIS 1da4: APX APXEVEX APX_F 62543C1C46CA cfcmovbe r8d, r9d, r10d +XDIS 1daa: APX APXEVEX APX_F 6254BC1C46CA cfcmovbe r8, r9, r10 +XDIS 1db0: APX APXEVEX APX_F 62543C1C460A cfcmovbe r8d, r9d, dword ptr [r10] +XDIS 1db6: APX APXEVEX APX_F 6254BC1C460A cfcmovbe r8, r9, qword ptr [r10] +XDIS 1dbc: APX APXEVEX APX_F 62543D1C46CA cfcmovbe r8w, r9w, r10w +XDIS 1dc2: APX APXEVEX APX_F 6254BD1C46CA cfcmovbe r8, r9, r10 +XDIS 1dc8: APX APXEVEX APX_F 62543D1C460A cfcmovbe r8w, r9w, word ptr [r10] +XDIS 1dce: APX APXEVEX APX_F 6254BD1C460A cfcmovbe r8, r9, qword ptr [r10] +XDIS 1dd4: APX APXEVEX APX_F 62547C084CC1 cfcmovl r8d, r9d +XDIS 1dda: APX APXEVEX APX_F 6254FC084CC1 cfcmovl r8, r9 +XDIS 1de0: APX APXEVEX APX_F 62547C084C01 cfcmovl r8d, dword ptr [r9] +XDIS 1de6: APX APXEVEX APX_F 6254FC084C01 cfcmovl r8, qword ptr [r9] +XDIS 1dec: APX APXEVEX APX_F 62547D084CC1 cfcmovl r8w, r9w +XDIS 1df2: APX APXEVEX APX_F 6254FD084CC1 cfcmovl r8, r9 +XDIS 1df8: APX APXEVEX APX_F 62547D084C01 cfcmovl r8w, word ptr [r9] +XDIS 1dfe: APX APXEVEX APX_F 6254FD084C01 cfcmovl r8, qword ptr [r9] +XDIS 1e04: APX APXEVEX APX_F 62547C0C4CC8 cfcmovl r8d, r9d +XDIS 1e0a: APX APXEVEX APX_F 6254FC0C4CC8 cfcmovl r8, r9 +XDIS 1e10: APX APXEVEX APX_F 62547D0C4CC8 cfcmovl r8w, r9w +XDIS 1e16: APX APXEVEX APX_F 6254FD0C4CC8 cfcmovl r8, r9 +XDIS 1e1c: APX APXEVEX APX_F 62547C0C4C08 cfcmovl dword ptr [r8], r9d +XDIS 1e22: APX APXEVEX APX_F 6254FC0C4C08 cfcmovl qword ptr [r8], r9 +XDIS 1e28: APX APXEVEX APX_F 62547D0C4C08 cfcmovl word ptr [r8], r9w +XDIS 1e2e: APX APXEVEX APX_F 6254FD0C4C08 cfcmovl qword ptr [r8], r9 +XDIS 1e34: APX APXEVEX APX_F 62543C1C4CCA cfcmovl r8d, r9d, r10d +XDIS 1e3a: APX APXEVEX APX_F 6254BC1C4CCA cfcmovl r8, r9, r10 +XDIS 1e40: APX APXEVEX APX_F 62543C1C4C0A cfcmovl r8d, r9d, dword ptr [r10] +XDIS 1e46: APX APXEVEX APX_F 6254BC1C4C0A cfcmovl r8, r9, qword ptr [r10] +XDIS 1e4c: APX APXEVEX APX_F 62543D1C4CCA cfcmovl r8w, r9w, r10w +XDIS 1e52: APX APXEVEX APX_F 6254BD1C4CCA cfcmovl r8, r9, r10 +XDIS 1e58: APX APXEVEX APX_F 62543D1C4C0A cfcmovl r8w, r9w, word ptr [r10] +XDIS 1e5e: APX APXEVEX APX_F 6254BD1C4C0A cfcmovl r8, r9, qword ptr [r10] +XDIS 1e64: APX APXEVEX APX_F 62547C084EC1 cfcmovle r8d, r9d +XDIS 1e6a: APX APXEVEX APX_F 6254FC084EC1 cfcmovle r8, r9 +XDIS 1e70: APX APXEVEX APX_F 62547C084E01 cfcmovle r8d, dword ptr [r9] +XDIS 1e76: APX APXEVEX APX_F 6254FC084E01 cfcmovle r8, qword ptr [r9] +XDIS 1e7c: APX APXEVEX APX_F 62547D084EC1 cfcmovle r8w, r9w +XDIS 1e82: APX APXEVEX APX_F 6254FD084EC1 cfcmovle r8, r9 +XDIS 1e88: APX APXEVEX APX_F 62547D084E01 cfcmovle r8w, word ptr [r9] +XDIS 1e8e: APX APXEVEX APX_F 6254FD084E01 cfcmovle r8, qword ptr [r9] +XDIS 1e94: APX APXEVEX APX_F 62547C0C4EC8 cfcmovle r8d, r9d +XDIS 1e9a: APX APXEVEX APX_F 6254FC0C4EC8 cfcmovle r8, r9 +XDIS 1ea0: APX APXEVEX APX_F 62547D0C4EC8 cfcmovle r8w, r9w +XDIS 1ea6: APX APXEVEX APX_F 6254FD0C4EC8 cfcmovle r8, r9 +XDIS 1eac: APX APXEVEX APX_F 62547C0C4E08 cfcmovle dword ptr [r8], r9d +XDIS 1eb2: APX APXEVEX APX_F 6254FC0C4E08 cfcmovle qword ptr [r8], r9 +XDIS 1eb8: APX APXEVEX APX_F 62547D0C4E08 cfcmovle word ptr [r8], r9w +XDIS 1ebe: APX APXEVEX APX_F 6254FD0C4E08 cfcmovle qword ptr [r8], r9 +XDIS 1ec4: APX APXEVEX APX_F 62543C1C4ECA cfcmovle r8d, r9d, r10d +XDIS 1eca: APX APXEVEX APX_F 6254BC1C4ECA cfcmovle r8, r9, r10 +XDIS 1ed0: APX APXEVEX APX_F 62543C1C4E0A cfcmovle r8d, r9d, dword ptr [r10] +XDIS 1ed6: APX APXEVEX APX_F 6254BC1C4E0A cfcmovle r8, r9, qword ptr [r10] +XDIS 1edc: APX APXEVEX APX_F 62543D1C4ECA cfcmovle r8w, r9w, r10w +XDIS 1ee2: APX APXEVEX APX_F 6254BD1C4ECA cfcmovle r8, r9, r10 +XDIS 1ee8: APX APXEVEX APX_F 62543D1C4E0A cfcmovle r8w, r9w, word ptr [r10] +XDIS 1eee: APX APXEVEX APX_F 6254BD1C4E0A cfcmovle r8, r9, qword ptr [r10] +XDIS 1ef4: APX APXEVEX APX_F 62547C0843C1 cfcmovnb r8d, r9d +XDIS 1efa: APX APXEVEX APX_F 6254FC0843C1 cfcmovnb r8, r9 +XDIS 1f00: APX APXEVEX APX_F 62547C084301 cfcmovnb r8d, dword ptr [r9] +XDIS 1f06: APX APXEVEX APX_F 6254FC084301 cfcmovnb r8, qword ptr [r9] +XDIS 1f0c: APX APXEVEX APX_F 62547D0843C1 cfcmovnb r8w, r9w +XDIS 1f12: APX APXEVEX APX_F 6254FD0843C1 cfcmovnb r8, r9 +XDIS 1f18: APX APXEVEX APX_F 62547D084301 cfcmovnb r8w, word ptr [r9] +XDIS 1f1e: APX APXEVEX APX_F 6254FD084301 cfcmovnb r8, qword ptr [r9] +XDIS 1f24: APX APXEVEX APX_F 62547C0C43C8 cfcmovnb r8d, r9d +XDIS 1f2a: APX APXEVEX APX_F 6254FC0C43C8 cfcmovnb r8, r9 +XDIS 1f30: APX APXEVEX APX_F 62547D0C43C8 cfcmovnb r8w, r9w +XDIS 1f36: APX APXEVEX APX_F 6254FD0C43C8 cfcmovnb r8, r9 +XDIS 1f3c: APX APXEVEX APX_F 62547C0C4308 cfcmovnb dword ptr [r8], r9d +XDIS 1f42: APX APXEVEX APX_F 6254FC0C4308 cfcmovnb qword ptr [r8], r9 +XDIS 1f48: APX APXEVEX APX_F 62547D0C4308 cfcmovnb word ptr [r8], r9w +XDIS 1f4e: APX APXEVEX APX_F 6254FD0C4308 cfcmovnb qword ptr [r8], r9 +XDIS 1f54: APX APXEVEX APX_F 62543C1C43CA cfcmovnb r8d, r9d, r10d +XDIS 1f5a: APX APXEVEX APX_F 6254BC1C43CA cfcmovnb r8, r9, r10 +XDIS 1f60: APX APXEVEX APX_F 62543C1C430A cfcmovnb r8d, r9d, dword ptr [r10] +XDIS 1f66: APX APXEVEX APX_F 6254BC1C430A cfcmovnb r8, r9, qword ptr [r10] +XDIS 1f6c: APX APXEVEX APX_F 62543D1C43CA cfcmovnb r8w, r9w, r10w +XDIS 1f72: APX APXEVEX APX_F 6254BD1C43CA cfcmovnb r8, r9, r10 +XDIS 1f78: APX APXEVEX APX_F 62543D1C430A cfcmovnb r8w, r9w, word ptr [r10] +XDIS 1f7e: APX APXEVEX APX_F 6254BD1C430A cfcmovnb r8, r9, qword ptr [r10] +XDIS 1f84: APX APXEVEX APX_F 62547C0847C1 cfcmovnbe r8d, r9d +XDIS 1f8a: APX APXEVEX APX_F 6254FC0847C1 cfcmovnbe r8, r9 +XDIS 1f90: APX APXEVEX APX_F 62547C084701 cfcmovnbe r8d, dword ptr [r9] +XDIS 1f96: APX APXEVEX APX_F 6254FC084701 cfcmovnbe r8, qword ptr [r9] +XDIS 1f9c: APX APXEVEX APX_F 62547D0847C1 cfcmovnbe r8w, r9w +XDIS 1fa2: APX APXEVEX APX_F 6254FD0847C1 cfcmovnbe r8, r9 +XDIS 1fa8: APX APXEVEX APX_F 62547D084701 cfcmovnbe r8w, word ptr [r9] +XDIS 1fae: APX APXEVEX APX_F 6254FD084701 cfcmovnbe r8, qword ptr [r9] +XDIS 1fb4: APX APXEVEX APX_F 62547C0C47C8 cfcmovnbe r8d, r9d +XDIS 1fba: APX APXEVEX APX_F 6254FC0C47C8 cfcmovnbe r8, r9 +XDIS 1fc0: APX APXEVEX APX_F 62547D0C47C8 cfcmovnbe r8w, r9w +XDIS 1fc6: APX APXEVEX APX_F 6254FD0C47C8 cfcmovnbe r8, r9 +XDIS 1fcc: APX APXEVEX APX_F 62547C0C4708 cfcmovnbe dword ptr [r8], r9d +XDIS 1fd2: APX APXEVEX APX_F 6254FC0C4708 cfcmovnbe qword ptr [r8], r9 +XDIS 1fd8: APX APXEVEX APX_F 62547D0C4708 cfcmovnbe word ptr [r8], r9w +XDIS 1fde: APX APXEVEX APX_F 6254FD0C4708 cfcmovnbe qword ptr [r8], r9 +XDIS 1fe4: APX APXEVEX APX_F 62543C1C47CA cfcmovnbe r8d, r9d, r10d +XDIS 1fea: APX APXEVEX APX_F 6254BC1C47CA cfcmovnbe r8, r9, r10 +XDIS 1ff0: APX APXEVEX APX_F 62543C1C470A cfcmovnbe r8d, r9d, dword ptr [r10] +XDIS 1ff6: APX APXEVEX APX_F 6254BC1C470A cfcmovnbe r8, r9, qword ptr [r10] +XDIS 1ffc: APX APXEVEX APX_F 62543D1C47CA cfcmovnbe r8w, r9w, r10w +XDIS 2002: APX APXEVEX APX_F 6254BD1C47CA cfcmovnbe r8, r9, r10 +XDIS 2008: APX APXEVEX APX_F 62543D1C470A cfcmovnbe r8w, r9w, word ptr [r10] +XDIS 200e: APX APXEVEX APX_F 6254BD1C470A cfcmovnbe r8, r9, qword ptr [r10] +XDIS 2014: APX APXEVEX APX_F 62547C084DC1 cfcmovnl r8d, r9d +XDIS 201a: APX APXEVEX APX_F 6254FC084DC1 cfcmovnl r8, r9 +XDIS 2020: APX APXEVEX APX_F 62547C084D01 cfcmovnl r8d, dword ptr [r9] +XDIS 2026: APX APXEVEX APX_F 6254FC084D01 cfcmovnl r8, qword ptr [r9] +XDIS 202c: APX APXEVEX APX_F 62547D084DC1 cfcmovnl r8w, r9w +XDIS 2032: APX APXEVEX APX_F 6254FD084DC1 cfcmovnl r8, r9 +XDIS 2038: APX APXEVEX APX_F 62547D084D01 cfcmovnl r8w, word ptr [r9] +XDIS 203e: APX APXEVEX APX_F 6254FD084D01 cfcmovnl r8, qword ptr [r9] +XDIS 2044: APX APXEVEX APX_F 62547C0C4DC8 cfcmovnl r8d, r9d +XDIS 204a: APX APXEVEX APX_F 6254FC0C4DC8 cfcmovnl r8, r9 +XDIS 2050: APX APXEVEX APX_F 62547D0C4DC8 cfcmovnl r8w, r9w +XDIS 2056: APX APXEVEX APX_F 6254FD0C4DC8 cfcmovnl r8, r9 +XDIS 205c: APX APXEVEX APX_F 62547C0C4D08 cfcmovnl dword ptr [r8], r9d +XDIS 2062: APX APXEVEX APX_F 6254FC0C4D08 cfcmovnl qword ptr [r8], r9 +XDIS 2068: APX APXEVEX APX_F 62547D0C4D08 cfcmovnl word ptr [r8], r9w +XDIS 206e: APX APXEVEX APX_F 6254FD0C4D08 cfcmovnl qword ptr [r8], r9 +XDIS 2074: APX APXEVEX APX_F 62543C1C4DCA cfcmovnl r8d, r9d, r10d +XDIS 207a: APX APXEVEX APX_F 6254BC1C4DCA cfcmovnl r8, r9, r10 +XDIS 2080: APX APXEVEX APX_F 62543C1C4D0A cfcmovnl r8d, r9d, dword ptr [r10] +XDIS 2086: APX APXEVEX APX_F 6254BC1C4D0A cfcmovnl r8, r9, qword ptr [r10] +XDIS 208c: APX APXEVEX APX_F 62543D1C4DCA cfcmovnl r8w, r9w, r10w +XDIS 2092: APX APXEVEX APX_F 6254BD1C4DCA cfcmovnl r8, r9, r10 +XDIS 2098: APX APXEVEX APX_F 62543D1C4D0A cfcmovnl r8w, r9w, word ptr [r10] +XDIS 209e: APX APXEVEX APX_F 6254BD1C4D0A cfcmovnl r8, r9, qword ptr [r10] +XDIS 20a4: APX APXEVEX APX_F 62547C084FC1 cfcmovnle r8d, r9d +XDIS 20aa: APX APXEVEX APX_F 6254FC084FC1 cfcmovnle r8, r9 +XDIS 20b0: APX APXEVEX APX_F 62547C084F01 cfcmovnle r8d, dword ptr [r9] +XDIS 20b6: APX APXEVEX APX_F 6254FC084F01 cfcmovnle r8, qword ptr [r9] +XDIS 20bc: APX APXEVEX APX_F 62547D084FC1 cfcmovnle r8w, r9w +XDIS 20c2: APX APXEVEX APX_F 6254FD084FC1 cfcmovnle r8, r9 +XDIS 20c8: APX APXEVEX APX_F 62547D084F01 cfcmovnle r8w, word ptr [r9] +XDIS 20ce: APX APXEVEX APX_F 6254FD084F01 cfcmovnle r8, qword ptr [r9] +XDIS 20d4: APX APXEVEX APX_F 62547C0C4FC8 cfcmovnle r8d, r9d +XDIS 20da: APX APXEVEX APX_F 6254FC0C4FC8 cfcmovnle r8, r9 +XDIS 20e0: APX APXEVEX APX_F 62547D0C4FC8 cfcmovnle r8w, r9w +XDIS 20e6: APX APXEVEX APX_F 6254FD0C4FC8 cfcmovnle r8, r9 +XDIS 20ec: APX APXEVEX APX_F 62547C0C4F08 cfcmovnle dword ptr [r8], r9d +XDIS 20f2: APX APXEVEX APX_F 6254FC0C4F08 cfcmovnle qword ptr [r8], r9 +XDIS 20f8: APX APXEVEX APX_F 62547D0C4F08 cfcmovnle word ptr [r8], r9w +XDIS 20fe: APX APXEVEX APX_F 6254FD0C4F08 cfcmovnle qword ptr [r8], r9 +XDIS 2104: APX APXEVEX APX_F 62543C1C4FCA cfcmovnle r8d, r9d, r10d +XDIS 210a: APX APXEVEX APX_F 6254BC1C4FCA cfcmovnle r8, r9, r10 +XDIS 2110: APX APXEVEX APX_F 62543C1C4F0A cfcmovnle r8d, r9d, dword ptr [r10] +XDIS 2116: APX APXEVEX APX_F 6254BC1C4F0A cfcmovnle r8, r9, qword ptr [r10] +XDIS 211c: APX APXEVEX APX_F 62543D1C4FCA cfcmovnle r8w, r9w, r10w +XDIS 2122: APX APXEVEX APX_F 6254BD1C4FCA cfcmovnle r8, r9, r10 +XDIS 2128: APX APXEVEX APX_F 62543D1C4F0A cfcmovnle r8w, r9w, word ptr [r10] +XDIS 212e: APX APXEVEX APX_F 6254BD1C4F0A cfcmovnle r8, r9, qword ptr [r10] +XDIS 2134: APX APXEVEX APX_F 62547C0841C1 cfcmovno r8d, r9d +XDIS 213a: APX APXEVEX APX_F 6254FC0841C1 cfcmovno r8, r9 +XDIS 2140: APX APXEVEX APX_F 62547C084101 cfcmovno r8d, dword ptr [r9] +XDIS 2146: APX APXEVEX APX_F 6254FC084101 cfcmovno r8, qword ptr [r9] +XDIS 214c: APX APXEVEX APX_F 62547D0841C1 cfcmovno r8w, r9w +XDIS 2152: APX APXEVEX APX_F 6254FD0841C1 cfcmovno r8, r9 +XDIS 2158: APX APXEVEX APX_F 62547D084101 cfcmovno r8w, word ptr [r9] +XDIS 215e: APX APXEVEX APX_F 6254FD084101 cfcmovno r8, qword ptr [r9] +XDIS 2164: APX APXEVEX APX_F 62547C0C41C8 cfcmovno r8d, r9d +XDIS 216a: APX APXEVEX APX_F 6254FC0C41C8 cfcmovno r8, r9 +XDIS 2170: APX APXEVEX APX_F 62547D0C41C8 cfcmovno r8w, r9w +XDIS 2176: APX APXEVEX APX_F 6254FD0C41C8 cfcmovno r8, r9 +XDIS 217c: APX APXEVEX APX_F 62547C0C4108 cfcmovno dword ptr [r8], r9d +XDIS 2182: APX APXEVEX APX_F 6254FC0C4108 cfcmovno qword ptr [r8], r9 +XDIS 2188: APX APXEVEX APX_F 62547D0C4108 cfcmovno word ptr [r8], r9w +XDIS 218e: APX APXEVEX APX_F 6254FD0C4108 cfcmovno qword ptr [r8], r9 +XDIS 2194: APX APXEVEX APX_F 62543C1C41CA cfcmovno r8d, r9d, r10d +XDIS 219a: APX APXEVEX APX_F 6254BC1C41CA cfcmovno r8, r9, r10 +XDIS 21a0: APX APXEVEX APX_F 62543C1C410A cfcmovno r8d, r9d, dword ptr [r10] +XDIS 21a6: APX APXEVEX APX_F 6254BC1C410A cfcmovno r8, r9, qword ptr [r10] +XDIS 21ac: APX APXEVEX APX_F 62543D1C41CA cfcmovno r8w, r9w, r10w +XDIS 21b2: APX APXEVEX APX_F 6254BD1C41CA cfcmovno r8, r9, r10 +XDIS 21b8: APX APXEVEX APX_F 62543D1C410A cfcmovno r8w, r9w, word ptr [r10] +XDIS 21be: APX APXEVEX APX_F 6254BD1C410A cfcmovno r8, r9, qword ptr [r10] +XDIS 21c4: APX APXEVEX APX_F 62547C084BC1 cfcmovnp r8d, r9d +XDIS 21ca: APX APXEVEX APX_F 6254FC084BC1 cfcmovnp r8, r9 +XDIS 21d0: APX APXEVEX APX_F 62547C084B01 cfcmovnp r8d, dword ptr [r9] +XDIS 21d6: APX APXEVEX APX_F 6254FC084B01 cfcmovnp r8, qword ptr [r9] +XDIS 21dc: APX APXEVEX APX_F 62547D084BC1 cfcmovnp r8w, r9w +XDIS 21e2: APX APXEVEX APX_F 6254FD084BC1 cfcmovnp r8, r9 +XDIS 21e8: APX APXEVEX APX_F 62547D084B01 cfcmovnp r8w, word ptr [r9] +XDIS 21ee: APX APXEVEX APX_F 6254FD084B01 cfcmovnp r8, qword ptr [r9] +XDIS 21f4: APX APXEVEX APX_F 62547C0C4BC8 cfcmovnp r8d, r9d +XDIS 21fa: APX APXEVEX APX_F 6254FC0C4BC8 cfcmovnp r8, r9 +XDIS 2200: APX APXEVEX APX_F 62547D0C4BC8 cfcmovnp r8w, r9w +XDIS 2206: APX APXEVEX APX_F 6254FD0C4BC8 cfcmovnp r8, r9 +XDIS 220c: APX APXEVEX APX_F 62547C0C4B08 cfcmovnp dword ptr [r8], r9d +XDIS 2212: APX APXEVEX APX_F 6254FC0C4B08 cfcmovnp qword ptr [r8], r9 +XDIS 2218: APX APXEVEX APX_F 62547D0C4B08 cfcmovnp word ptr [r8], r9w +XDIS 221e: APX APXEVEX APX_F 6254FD0C4B08 cfcmovnp qword ptr [r8], r9 +XDIS 2224: APX APXEVEX APX_F 62543C1C4BCA cfcmovnp r8d, r9d, r10d +XDIS 222a: APX APXEVEX APX_F 6254BC1C4BCA cfcmovnp r8, r9, r10 +XDIS 2230: APX APXEVEX APX_F 62543C1C4B0A cfcmovnp r8d, r9d, dword ptr [r10] +XDIS 2236: APX APXEVEX APX_F 6254BC1C4B0A cfcmovnp r8, r9, qword ptr [r10] +XDIS 223c: APX APXEVEX APX_F 62543D1C4BCA cfcmovnp r8w, r9w, r10w +XDIS 2242: APX APXEVEX APX_F 6254BD1C4BCA cfcmovnp r8, r9, r10 +XDIS 2248: APX APXEVEX APX_F 62543D1C4B0A cfcmovnp r8w, r9w, word ptr [r10] +XDIS 224e: APX APXEVEX APX_F 6254BD1C4B0A cfcmovnp r8, r9, qword ptr [r10] +XDIS 2254: APX APXEVEX APX_F 62547C0849C1 cfcmovns r8d, r9d +XDIS 225a: APX APXEVEX APX_F 6254FC0849C1 cfcmovns r8, r9 +XDIS 2260: APX APXEVEX APX_F 62547C084901 cfcmovns r8d, dword ptr [r9] +XDIS 2266: APX APXEVEX APX_F 6254FC084901 cfcmovns r8, qword ptr [r9] +XDIS 226c: APX APXEVEX APX_F 62547D0849C1 cfcmovns r8w, r9w +XDIS 2272: APX APXEVEX APX_F 6254FD0849C1 cfcmovns r8, r9 +XDIS 2278: APX APXEVEX APX_F 62547D084901 cfcmovns r8w, word ptr [r9] +XDIS 227e: APX APXEVEX APX_F 6254FD084901 cfcmovns r8, qword ptr [r9] +XDIS 2284: APX APXEVEX APX_F 62547C0C49C8 cfcmovns r8d, r9d +XDIS 228a: APX APXEVEX APX_F 6254FC0C49C8 cfcmovns r8, r9 +XDIS 2290: APX APXEVEX APX_F 62547D0C49C8 cfcmovns r8w, r9w +XDIS 2296: APX APXEVEX APX_F 6254FD0C49C8 cfcmovns r8, r9 +XDIS 229c: APX APXEVEX APX_F 62547C0C4908 cfcmovns dword ptr [r8], r9d +XDIS 22a2: APX APXEVEX APX_F 6254FC0C4908 cfcmovns qword ptr [r8], r9 +XDIS 22a8: APX APXEVEX APX_F 62547D0C4908 cfcmovns word ptr [r8], r9w +XDIS 22ae: APX APXEVEX APX_F 6254FD0C4908 cfcmovns qword ptr [r8], r9 +XDIS 22b4: APX APXEVEX APX_F 62543C1C49CA cfcmovns r8d, r9d, r10d +XDIS 22ba: APX APXEVEX APX_F 6254BC1C49CA cfcmovns r8, r9, r10 +XDIS 22c0: APX APXEVEX APX_F 62543C1C490A cfcmovns r8d, r9d, dword ptr [r10] +XDIS 22c6: APX APXEVEX APX_F 6254BC1C490A cfcmovns r8, r9, qword ptr [r10] +XDIS 22cc: APX APXEVEX APX_F 62543D1C49CA cfcmovns r8w, r9w, r10w +XDIS 22d2: APX APXEVEX APX_F 6254BD1C49CA cfcmovns r8, r9, r10 +XDIS 22d8: APX APXEVEX APX_F 62543D1C490A cfcmovns r8w, r9w, word ptr [r10] +XDIS 22de: APX APXEVEX APX_F 6254BD1C490A cfcmovns r8, r9, qword ptr [r10] +XDIS 22e4: APX APXEVEX APX_F 62547C0845C1 cfcmovnz r8d, r9d +XDIS 22ea: APX APXEVEX APX_F 6254FC0845C1 cfcmovnz r8, r9 +XDIS 22f0: APX APXEVEX APX_F 62547C084501 cfcmovnz r8d, dword ptr [r9] +XDIS 22f6: APX APXEVEX APX_F 6254FC084501 cfcmovnz r8, qword ptr [r9] +XDIS 22fc: APX APXEVEX APX_F 62547D0845C1 cfcmovnz r8w, r9w +XDIS 2302: APX APXEVEX APX_F 6254FD0845C1 cfcmovnz r8, r9 +XDIS 2308: APX APXEVEX APX_F 62547D084501 cfcmovnz r8w, word ptr [r9] +XDIS 230e: APX APXEVEX APX_F 6254FD084501 cfcmovnz r8, qword ptr [r9] +XDIS 2314: APX APXEVEX APX_F 62547C0C45C8 cfcmovnz r8d, r9d +XDIS 231a: APX APXEVEX APX_F 6254FC0C45C8 cfcmovnz r8, r9 +XDIS 2320: APX APXEVEX APX_F 62547D0C45C8 cfcmovnz r8w, r9w +XDIS 2326: APX APXEVEX APX_F 6254FD0C45C8 cfcmovnz r8, r9 +XDIS 232c: APX APXEVEX APX_F 62547C0C4508 cfcmovnz dword ptr [r8], r9d +XDIS 2332: APX APXEVEX APX_F 6254FC0C4508 cfcmovnz qword ptr [r8], r9 +XDIS 2338: APX APXEVEX APX_F 62547D0C4508 cfcmovnz word ptr [r8], r9w +XDIS 233e: APX APXEVEX APX_F 6254FD0C4508 cfcmovnz qword ptr [r8], r9 +XDIS 2344: APX APXEVEX APX_F 62543C1C45CA cfcmovnz r8d, r9d, r10d +XDIS 234a: APX APXEVEX APX_F 6254BC1C45CA cfcmovnz r8, r9, r10 +XDIS 2350: APX APXEVEX APX_F 62543C1C450A cfcmovnz r8d, r9d, dword ptr [r10] +XDIS 2356: APX APXEVEX APX_F 6254BC1C450A cfcmovnz r8, r9, qword ptr [r10] +XDIS 235c: APX APXEVEX APX_F 62543D1C45CA cfcmovnz r8w, r9w, r10w +XDIS 2362: APX APXEVEX APX_F 6254BD1C45CA cfcmovnz r8, r9, r10 +XDIS 2368: APX APXEVEX APX_F 62543D1C450A cfcmovnz r8w, r9w, word ptr [r10] +XDIS 236e: APX APXEVEX APX_F 6254BD1C450A cfcmovnz r8, r9, qword ptr [r10] +XDIS 2374: APX APXEVEX APX_F 62547C0840C1 cfcmovo r8d, r9d +XDIS 237a: APX APXEVEX APX_F 6254FC0840C1 cfcmovo r8, r9 +XDIS 2380: APX APXEVEX APX_F 62547C084001 cfcmovo r8d, dword ptr [r9] +XDIS 2386: APX APXEVEX APX_F 6254FC084001 cfcmovo r8, qword ptr [r9] +XDIS 238c: APX APXEVEX APX_F 62547D0840C1 cfcmovo r8w, r9w +XDIS 2392: APX APXEVEX APX_F 6254FD0840C1 cfcmovo r8, r9 +XDIS 2398: APX APXEVEX APX_F 62547D084001 cfcmovo r8w, word ptr [r9] +XDIS 239e: APX APXEVEX APX_F 6254FD084001 cfcmovo r8, qword ptr [r9] +XDIS 23a4: APX APXEVEX APX_F 62547C0C40C8 cfcmovo r8d, r9d +XDIS 23aa: APX APXEVEX APX_F 6254FC0C40C8 cfcmovo r8, r9 +XDIS 23b0: APX APXEVEX APX_F 62547D0C40C8 cfcmovo r8w, r9w +XDIS 23b6: APX APXEVEX APX_F 6254FD0C40C8 cfcmovo r8, r9 +XDIS 23bc: APX APXEVEX APX_F 62547C0C4008 cfcmovo dword ptr [r8], r9d +XDIS 23c2: APX APXEVEX APX_F 6254FC0C4008 cfcmovo qword ptr [r8], r9 +XDIS 23c8: APX APXEVEX APX_F 62547D0C4008 cfcmovo word ptr [r8], r9w +XDIS 23ce: APX APXEVEX APX_F 6254FD0C4008 cfcmovo qword ptr [r8], r9 +XDIS 23d4: APX APXEVEX APX_F 62543C1C40CA cfcmovo r8d, r9d, r10d +XDIS 23da: APX APXEVEX APX_F 6254BC1C40CA cfcmovo r8, r9, r10 +XDIS 23e0: APX APXEVEX APX_F 62543C1C400A cfcmovo r8d, r9d, dword ptr [r10] +XDIS 23e6: APX APXEVEX APX_F 6254BC1C400A cfcmovo r8, r9, qword ptr [r10] +XDIS 23ec: APX APXEVEX APX_F 62543D1C40CA cfcmovo r8w, r9w, r10w +XDIS 23f2: APX APXEVEX APX_F 6254BD1C40CA cfcmovo r8, r9, r10 +XDIS 23f8: APX APXEVEX APX_F 62543D1C400A cfcmovo r8w, r9w, word ptr [r10] +XDIS 23fe: APX APXEVEX APX_F 6254BD1C400A cfcmovo r8, r9, qword ptr [r10] +XDIS 2404: APX APXEVEX APX_F 62547C084AC1 cfcmovp r8d, r9d +XDIS 240a: APX APXEVEX APX_F 6254FC084AC1 cfcmovp r8, r9 +XDIS 2410: APX APXEVEX APX_F 62547C084A01 cfcmovp r8d, dword ptr [r9] +XDIS 2416: APX APXEVEX APX_F 6254FC084A01 cfcmovp r8, qword ptr [r9] +XDIS 241c: APX APXEVEX APX_F 62547D084AC1 cfcmovp r8w, r9w +XDIS 2422: APX APXEVEX APX_F 6254FD084AC1 cfcmovp r8, r9 +XDIS 2428: APX APXEVEX APX_F 62547D084A01 cfcmovp r8w, word ptr [r9] +XDIS 242e: APX APXEVEX APX_F 6254FD084A01 cfcmovp r8, qword ptr [r9] +XDIS 2434: APX APXEVEX APX_F 62547C0C4AC8 cfcmovp r8d, r9d +XDIS 243a: APX APXEVEX APX_F 6254FC0C4AC8 cfcmovp r8, r9 +XDIS 2440: APX APXEVEX APX_F 62547D0C4AC8 cfcmovp r8w, r9w +XDIS 2446: APX APXEVEX APX_F 6254FD0C4AC8 cfcmovp r8, r9 +XDIS 244c: APX APXEVEX APX_F 62547C0C4A08 cfcmovp dword ptr [r8], r9d +XDIS 2452: APX APXEVEX APX_F 6254FC0C4A08 cfcmovp qword ptr [r8], r9 +XDIS 2458: APX APXEVEX APX_F 62547D0C4A08 cfcmovp word ptr [r8], r9w +XDIS 245e: APX APXEVEX APX_F 6254FD0C4A08 cfcmovp qword ptr [r8], r9 +XDIS 2464: APX APXEVEX APX_F 62543C1C4ACA cfcmovp r8d, r9d, r10d +XDIS 246a: APX APXEVEX APX_F 6254BC1C4ACA cfcmovp r8, r9, r10 +XDIS 2470: APX APXEVEX APX_F 62543C1C4A0A cfcmovp r8d, r9d, dword ptr [r10] +XDIS 2476: APX APXEVEX APX_F 6254BC1C4A0A cfcmovp r8, r9, qword ptr [r10] +XDIS 247c: APX APXEVEX APX_F 62543D1C4ACA cfcmovp r8w, r9w, r10w +XDIS 2482: APX APXEVEX APX_F 6254BD1C4ACA cfcmovp r8, r9, r10 +XDIS 2488: APX APXEVEX APX_F 62543D1C4A0A cfcmovp r8w, r9w, word ptr [r10] +XDIS 248e: APX APXEVEX APX_F 6254BD1C4A0A cfcmovp r8, r9, qword ptr [r10] +XDIS 2494: APX APXEVEX APX_F 62547C0848C1 cfcmovs r8d, r9d +XDIS 249a: APX APXEVEX APX_F 6254FC0848C1 cfcmovs r8, r9 +XDIS 24a0: APX APXEVEX APX_F 62547C084801 cfcmovs r8d, dword ptr [r9] +XDIS 24a6: APX APXEVEX APX_F 6254FC084801 cfcmovs r8, qword ptr [r9] +XDIS 24ac: APX APXEVEX APX_F 62547D0848C1 cfcmovs r8w, r9w +XDIS 24b2: APX APXEVEX APX_F 6254FD0848C1 cfcmovs r8, r9 +XDIS 24b8: APX APXEVEX APX_F 62547D084801 cfcmovs r8w, word ptr [r9] +XDIS 24be: APX APXEVEX APX_F 6254FD084801 cfcmovs r8, qword ptr [r9] +XDIS 24c4: APX APXEVEX APX_F 62547C0C48C8 cfcmovs r8d, r9d +XDIS 24ca: APX APXEVEX APX_F 6254FC0C48C8 cfcmovs r8, r9 +XDIS 24d0: APX APXEVEX APX_F 62547D0C48C8 cfcmovs r8w, r9w +XDIS 24d6: APX APXEVEX APX_F 6254FD0C48C8 cfcmovs r8, r9 +XDIS 24dc: APX APXEVEX APX_F 62547C0C4808 cfcmovs dword ptr [r8], r9d +XDIS 24e2: APX APXEVEX APX_F 6254FC0C4808 cfcmovs qword ptr [r8], r9 +XDIS 24e8: APX APXEVEX APX_F 62547D0C4808 cfcmovs word ptr [r8], r9w +XDIS 24ee: APX APXEVEX APX_F 6254FD0C4808 cfcmovs qword ptr [r8], r9 +XDIS 24f4: APX APXEVEX APX_F 62543C1C48CA cfcmovs r8d, r9d, r10d +XDIS 24fa: APX APXEVEX APX_F 6254BC1C48CA cfcmovs r8, r9, r10 +XDIS 2500: APX APXEVEX APX_F 62543C1C480A cfcmovs r8d, r9d, dword ptr [r10] +XDIS 2506: APX APXEVEX APX_F 6254BC1C480A cfcmovs r8, r9, qword ptr [r10] +XDIS 250c: APX APXEVEX APX_F 62543D1C48CA cfcmovs r8w, r9w, r10w +XDIS 2512: APX APXEVEX APX_F 6254BD1C48CA cfcmovs r8, r9, r10 +XDIS 2518: APX APXEVEX APX_F 62543D1C480A cfcmovs r8w, r9w, word ptr [r10] +XDIS 251e: APX APXEVEX APX_F 6254BD1C480A cfcmovs r8, r9, qword ptr [r10] +XDIS 2524: APX APXEVEX APX_F 62547C0844C1 cfcmovz r8d, r9d +XDIS 252a: APX APXEVEX APX_F 6254FC0844C1 cfcmovz r8, r9 +XDIS 2530: APX APXEVEX APX_F 62547C084401 cfcmovz r8d, dword ptr [r9] +XDIS 2536: APX APXEVEX APX_F 6254FC084401 cfcmovz r8, qword ptr [r9] +XDIS 253c: APX APXEVEX APX_F 62547D0844C1 cfcmovz r8w, r9w +XDIS 2542: APX APXEVEX APX_F 6254FD0844C1 cfcmovz r8, r9 +XDIS 2548: APX APXEVEX APX_F 62547D084401 cfcmovz r8w, word ptr [r9] +XDIS 254e: APX APXEVEX APX_F 6254FD084401 cfcmovz r8, qword ptr [r9] +XDIS 2554: APX APXEVEX APX_F 62547C0C44C8 cfcmovz r8d, r9d +XDIS 255a: APX APXEVEX APX_F 6254FC0C44C8 cfcmovz r8, r9 +XDIS 2560: APX APXEVEX APX_F 62547D0C44C8 cfcmovz r8w, r9w +XDIS 2566: APX APXEVEX APX_F 6254FD0C44C8 cfcmovz r8, r9 +XDIS 256c: APX APXEVEX APX_F 62547C0C4408 cfcmovz dword ptr [r8], r9d +XDIS 2572: APX APXEVEX APX_F 6254FC0C4408 cfcmovz qword ptr [r8], r9 +XDIS 2578: APX APXEVEX APX_F 62547D0C4408 cfcmovz word ptr [r8], r9w +XDIS 257e: APX APXEVEX APX_F 6254FD0C4408 cfcmovz qword ptr [r8], r9 +XDIS 2584: APX APXEVEX APX_F 62543C1C44CA cfcmovz r8d, r9d, r10d +XDIS 258a: APX APXEVEX APX_F 6254BC1C44CA cfcmovz r8, r9, r10 +XDIS 2590: APX APXEVEX APX_F 62543C1C440A cfcmovz r8d, r9d, dword ptr [r10] +XDIS 2596: APX APXEVEX APX_F 6254BC1C440A cfcmovz r8, r9, qword ptr [r10] +XDIS 259c: APX APXEVEX APX_F 62543D1C44CA cfcmovz r8w, r9w, r10w +XDIS 25a2: APX APXEVEX APX_F 6254BD1C44CA cfcmovz r8, r9, r10 +XDIS 25a8: APX APXEVEX APX_F 62543D1C440A cfcmovz r8w, r9w, word ptr [r10] +XDIS 25ae: APX APXEVEX APX_F 6254BD1C440A cfcmovz r8, r9, qword ptr [r10] +XDIS 25b4: APX APXEVEX APX_F 62543C1842CA cmovb r8d, r9d, r10d +XDIS 25ba: APX APXEVEX APX_F 6254BC1842CA cmovb r8, r9, r10 +XDIS 25c0: APX APXEVEX APX_F 62543C18420A cmovb r8d, r9d, dword ptr [r10] +XDIS 25c6: APX APXEVEX APX_F 6254BC18420A cmovb r8, r9, qword ptr [r10] +XDIS 25cc: APX APXEVEX APX_F 62543D1842CA cmovb r8w, r9w, r10w +XDIS 25d2: APX APXEVEX APX_F 6254BD1842CA cmovb r8, r9, r10 +XDIS 25d8: APX APXEVEX APX_F 62543D18420A cmovb r8w, r9w, word ptr [r10] +XDIS 25de: APX APXEVEX APX_F 6254BD18420A cmovb r8, r9, qword ptr [r10] +XDIS 25e4: APX APXEVEX APX_F 62543C1846CA cmovbe r8d, r9d, r10d +XDIS 25ea: APX APXEVEX APX_F 6254BC1846CA cmovbe r8, r9, r10 +XDIS 25f0: APX APXEVEX APX_F 62543C18460A cmovbe r8d, r9d, dword ptr [r10] +XDIS 25f6: APX APXEVEX APX_F 6254BC18460A cmovbe r8, r9, qword ptr [r10] +XDIS 25fc: APX APXEVEX APX_F 62543D1846CA cmovbe r8w, r9w, r10w +XDIS 2602: APX APXEVEX APX_F 6254BD1846CA cmovbe r8, r9, r10 +XDIS 2608: APX APXEVEX APX_F 62543D18460A cmovbe r8w, r9w, word ptr [r10] +XDIS 260e: APX APXEVEX APX_F 6254BD18460A cmovbe r8, r9, qword ptr [r10] +XDIS 2614: APX APXEVEX APX_F 62543C184CCA cmovl r8d, r9d, r10d +XDIS 261a: APX APXEVEX APX_F 6254BC184CCA cmovl r8, r9, r10 +XDIS 2620: APX APXEVEX APX_F 62543C184C0A cmovl r8d, r9d, dword ptr [r10] +XDIS 2626: APX APXEVEX APX_F 6254BC184C0A cmovl r8, r9, qword ptr [r10] +XDIS 262c: APX APXEVEX APX_F 62543D184CCA cmovl r8w, r9w, r10w +XDIS 2632: APX APXEVEX APX_F 6254BD184CCA cmovl r8, r9, r10 +XDIS 2638: APX APXEVEX APX_F 62543D184C0A cmovl r8w, r9w, word ptr [r10] +XDIS 263e: APX APXEVEX APX_F 6254BD184C0A cmovl r8, r9, qword ptr [r10] +XDIS 2644: APX APXEVEX APX_F 62543C184ECA cmovle r8d, r9d, r10d +XDIS 264a: APX APXEVEX APX_F 6254BC184ECA cmovle r8, r9, r10 +XDIS 2650: APX APXEVEX APX_F 62543C184E0A cmovle r8d, r9d, dword ptr [r10] +XDIS 2656: APX APXEVEX APX_F 6254BC184E0A cmovle r8, r9, qword ptr [r10] +XDIS 265c: APX APXEVEX APX_F 62543D184ECA cmovle r8w, r9w, r10w +XDIS 2662: APX APXEVEX APX_F 6254BD184ECA cmovle r8, r9, r10 +XDIS 2668: APX APXEVEX APX_F 62543D184E0A cmovle r8w, r9w, word ptr [r10] +XDIS 266e: APX APXEVEX APX_F 6254BD184E0A cmovle r8, r9, qword ptr [r10] +XDIS 2674: APX APXEVEX APX_F 62543C1843CA cmovnb r8d, r9d, r10d +XDIS 267a: APX APXEVEX APX_F 6254BC1843CA cmovnb r8, r9, r10 +XDIS 2680: APX APXEVEX APX_F 62543C18430A cmovnb r8d, r9d, dword ptr [r10] +XDIS 2686: APX APXEVEX APX_F 6254BC18430A cmovnb r8, r9, qword ptr [r10] +XDIS 268c: APX APXEVEX APX_F 62543D1843CA cmovnb r8w, r9w, r10w +XDIS 2692: APX APXEVEX APX_F 6254BD1843CA cmovnb r8, r9, r10 +XDIS 2698: APX APXEVEX APX_F 62543D18430A cmovnb r8w, r9w, word ptr [r10] +XDIS 269e: APX APXEVEX APX_F 6254BD18430A cmovnb r8, r9, qword ptr [r10] +XDIS 26a4: APX APXEVEX APX_F 62543C1847CA cmovnbe r8d, r9d, r10d +XDIS 26aa: APX APXEVEX APX_F 6254BC1847CA cmovnbe r8, r9, r10 +XDIS 26b0: APX APXEVEX APX_F 62543C18470A cmovnbe r8d, r9d, dword ptr [r10] +XDIS 26b6: APX APXEVEX APX_F 6254BC18470A cmovnbe r8, r9, qword ptr [r10] +XDIS 26bc: APX APXEVEX APX_F 62543D1847CA cmovnbe r8w, r9w, r10w +XDIS 26c2: APX APXEVEX APX_F 6254BD1847CA cmovnbe r8, r9, r10 +XDIS 26c8: APX APXEVEX APX_F 62543D18470A cmovnbe r8w, r9w, word ptr [r10] +XDIS 26ce: APX APXEVEX APX_F 6254BD18470A cmovnbe r8, r9, qword ptr [r10] +XDIS 26d4: APX APXEVEX APX_F 62543C184DCA cmovnl r8d, r9d, r10d +XDIS 26da: APX APXEVEX APX_F 6254BC184DCA cmovnl r8, r9, r10 +XDIS 26e0: APX APXEVEX APX_F 62543C184D0A cmovnl r8d, r9d, dword ptr [r10] +XDIS 26e6: APX APXEVEX APX_F 6254BC184D0A cmovnl r8, r9, qword ptr [r10] +XDIS 26ec: APX APXEVEX APX_F 62543D184DCA cmovnl r8w, r9w, r10w +XDIS 26f2: APX APXEVEX APX_F 6254BD184DCA cmovnl r8, r9, r10 +XDIS 26f8: APX APXEVEX APX_F 62543D184D0A cmovnl r8w, r9w, word ptr [r10] +XDIS 26fe: APX APXEVEX APX_F 6254BD184D0A cmovnl r8, r9, qword ptr [r10] +XDIS 2704: APX APXEVEX APX_F 62543C184FCA cmovnle r8d, r9d, r10d +XDIS 270a: APX APXEVEX APX_F 6254BC184FCA cmovnle r8, r9, r10 +XDIS 2710: APX APXEVEX APX_F 62543C184F0A cmovnle r8d, r9d, dword ptr [r10] +XDIS 2716: APX APXEVEX APX_F 6254BC184F0A cmovnle r8, r9, qword ptr [r10] +XDIS 271c: APX APXEVEX APX_F 62543D184FCA cmovnle r8w, r9w, r10w +XDIS 2722: APX APXEVEX APX_F 6254BD184FCA cmovnle r8, r9, r10 +XDIS 2728: APX APXEVEX APX_F 62543D184F0A cmovnle r8w, r9w, word ptr [r10] +XDIS 272e: APX APXEVEX APX_F 6254BD184F0A cmovnle r8, r9, qword ptr [r10] +XDIS 2734: APX APXEVEX APX_F 62543C1841CA cmovno r8d, r9d, r10d +XDIS 273a: APX APXEVEX APX_F 6254BC1841CA cmovno r8, r9, r10 +XDIS 2740: APX APXEVEX APX_F 62543C18410A cmovno r8d, r9d, dword ptr [r10] +XDIS 2746: APX APXEVEX APX_F 6254BC18410A cmovno r8, r9, qword ptr [r10] +XDIS 274c: APX APXEVEX APX_F 62543D1841CA cmovno r8w, r9w, r10w +XDIS 2752: APX APXEVEX APX_F 6254BD1841CA cmovno r8, r9, r10 +XDIS 2758: APX APXEVEX APX_F 62543D18410A cmovno r8w, r9w, word ptr [r10] +XDIS 275e: APX APXEVEX APX_F 6254BD18410A cmovno r8, r9, qword ptr [r10] +XDIS 2764: APX APXEVEX APX_F 62543C184BCA cmovnp r8d, r9d, r10d +XDIS 276a: APX APXEVEX APX_F 6254BC184BCA cmovnp r8, r9, r10 +XDIS 2770: APX APXEVEX APX_F 62543C184B0A cmovnp r8d, r9d, dword ptr [r10] +XDIS 2776: APX APXEVEX APX_F 6254BC184B0A cmovnp r8, r9, qword ptr [r10] +XDIS 277c: APX APXEVEX APX_F 62543D184BCA cmovnp r8w, r9w, r10w +XDIS 2782: APX APXEVEX APX_F 6254BD184BCA cmovnp r8, r9, r10 +XDIS 2788: APX APXEVEX APX_F 62543D184B0A cmovnp r8w, r9w, word ptr [r10] +XDIS 278e: APX APXEVEX APX_F 6254BD184B0A cmovnp r8, r9, qword ptr [r10] +XDIS 2794: APX APXEVEX APX_F 62543C1849CA cmovns r8d, r9d, r10d +XDIS 279a: APX APXEVEX APX_F 6254BC1849CA cmovns r8, r9, r10 +XDIS 27a0: APX APXEVEX APX_F 62543C18490A cmovns r8d, r9d, dword ptr [r10] +XDIS 27a6: APX APXEVEX APX_F 6254BC18490A cmovns r8, r9, qword ptr [r10] +XDIS 27ac: APX APXEVEX APX_F 62543D1849CA cmovns r8w, r9w, r10w +XDIS 27b2: APX APXEVEX APX_F 6254BD1849CA cmovns r8, r9, r10 +XDIS 27b8: APX APXEVEX APX_F 62543D18490A cmovns r8w, r9w, word ptr [r10] +XDIS 27be: APX APXEVEX APX_F 6254BD18490A cmovns r8, r9, qword ptr [r10] +XDIS 27c4: APX APXEVEX APX_F 62543C1845CA cmovnz r8d, r9d, r10d +XDIS 27ca: APX APXEVEX APX_F 6254BC1845CA cmovnz r8, r9, r10 +XDIS 27d0: APX APXEVEX APX_F 62543C18450A cmovnz r8d, r9d, dword ptr [r10] +XDIS 27d6: APX APXEVEX APX_F 6254BC18450A cmovnz r8, r9, qword ptr [r10] +XDIS 27dc: APX APXEVEX APX_F 62543D1845CA cmovnz r8w, r9w, r10w +XDIS 27e2: APX APXEVEX APX_F 6254BD1845CA cmovnz r8, r9, r10 +XDIS 27e8: APX APXEVEX APX_F 62543D18450A cmovnz r8w, r9w, word ptr [r10] +XDIS 27ee: APX APXEVEX APX_F 6254BD18450A cmovnz r8, r9, qword ptr [r10] +XDIS 27f4: APX APXEVEX APX_F 62543C1840CA cmovo r8d, r9d, r10d +XDIS 27fa: APX APXEVEX APX_F 6254BC1840CA cmovo r8, r9, r10 +XDIS 2800: APX APXEVEX APX_F 62543C18400A cmovo r8d, r9d, dword ptr [r10] +XDIS 2806: APX APXEVEX APX_F 6254BC18400A cmovo r8, r9, qword ptr [r10] +XDIS 280c: APX APXEVEX APX_F 62543D1840CA cmovo r8w, r9w, r10w +XDIS 2812: APX APXEVEX APX_F 6254BD1840CA cmovo r8, r9, r10 +XDIS 2818: APX APXEVEX APX_F 62543D18400A cmovo r8w, r9w, word ptr [r10] +XDIS 281e: APX APXEVEX APX_F 6254BD18400A cmovo r8, r9, qword ptr [r10] +XDIS 2824: APX APXEVEX APX_F 62543C184ACA cmovp r8d, r9d, r10d +XDIS 282a: APX APXEVEX APX_F 6254BC184ACA cmovp r8, r9, r10 +XDIS 2830: APX APXEVEX APX_F 62543C184A0A cmovp r8d, r9d, dword ptr [r10] +XDIS 2836: APX APXEVEX APX_F 6254BC184A0A cmovp r8, r9, qword ptr [r10] +XDIS 283c: APX APXEVEX APX_F 62543D184ACA cmovp r8w, r9w, r10w +XDIS 2842: APX APXEVEX APX_F 6254BD184ACA cmovp r8, r9, r10 +XDIS 2848: APX APXEVEX APX_F 62543D184A0A cmovp r8w, r9w, word ptr [r10] +XDIS 284e: APX APXEVEX APX_F 6254BD184A0A cmovp r8, r9, qword ptr [r10] +XDIS 2854: APX APXEVEX APX_F 62543C1848CA cmovs r8d, r9d, r10d +XDIS 285a: APX APXEVEX APX_F 6254BC1848CA cmovs r8, r9, r10 +XDIS 2860: APX APXEVEX APX_F 62543C18480A cmovs r8d, r9d, dword ptr [r10] +XDIS 2866: APX APXEVEX APX_F 6254BC18480A cmovs r8, r9, qword ptr [r10] +XDIS 286c: APX APXEVEX APX_F 62543D1848CA cmovs r8w, r9w, r10w +XDIS 2872: APX APXEVEX APX_F 6254BD1848CA cmovs r8, r9, r10 +XDIS 2878: APX APXEVEX APX_F 62543D18480A cmovs r8w, r9w, word ptr [r10] +XDIS 287e: APX APXEVEX APX_F 6254BD18480A cmovs r8, r9, qword ptr [r10] +XDIS 2884: APX APXEVEX APX_F 62543C1844CA cmovz r8d, r9d, r10d +XDIS 288a: APX APXEVEX APX_F 6254BC1844CA cmovz r8, r9, r10 +XDIS 2890: APX APXEVEX APX_F 62543C18440A cmovz r8d, r9d, dword ptr [r10] +XDIS 2896: APX APXEVEX APX_F 6254BC18440A cmovz r8, r9, qword ptr [r10] +XDIS 289c: APX APXEVEX APX_F 62543D1844CA cmovz r8w, r9w, r10w +XDIS 28a2: APX APXEVEX APX_F 6254BD1844CA cmovz r8, r9, r10 +XDIS 28a8: APX APXEVEX APX_F 62543D18440A cmovz r8w, r9w, word ptr [r10] +XDIS 28ae: APX APXEVEX APX_F 6254BD18440A cmovz r8, r9, qword ptr [r10] +XDIS 28b4: APX APXEVEX APX_F 62522D08E608 cmpbexadd dword ptr [r8], r9d, r10d +XDIS 28ba: APX APXEVEX APX_F 6252AD08E608 cmpbexadd qword ptr [r8], r9, r10 +XDIS 28c0: APX APXEVEX APX_F 62522D08E208 cmpbxadd dword ptr [r8], r9d, r10d +XDIS 28c6: APX APXEVEX APX_F 6252AD08E208 cmpbxadd qword ptr [r8], r9, r10 +XDIS 28cc: APX APXEVEX APX_F 62522D08EE08 cmplexadd dword ptr [r8], r9d, r10d +XDIS 28d2: APX APXEVEX APX_F 6252AD08EE08 cmplexadd qword ptr [r8], r9, r10 +XDIS 28d8: APX APXEVEX APX_F 62522D08EC08 cmplxadd dword ptr [r8], r9d, r10d +XDIS 28de: APX APXEVEX APX_F 6252AD08EC08 cmplxadd qword ptr [r8], r9, r10 +XDIS 28e4: APX APXEVEX APX_F 62522D08E708 cmpnbexadd dword ptr [r8], r9d, r10d +XDIS 28ea: APX APXEVEX APX_F 6252AD08E708 cmpnbexadd qword ptr [r8], r9, r10 +XDIS 28f0: APX APXEVEX APX_F 62522D08E308 cmpnbxadd dword ptr [r8], r9d, r10d +XDIS 28f6: APX APXEVEX APX_F 6252AD08E308 cmpnbxadd qword ptr [r8], r9, r10 +XDIS 28fc: APX APXEVEX APX_F 62522D08EF08 cmpnlexadd dword ptr [r8], r9d, r10d +XDIS 2902: APX APXEVEX APX_F 6252AD08EF08 cmpnlexadd qword ptr [r8], r9, r10 +XDIS 2908: APX APXEVEX APX_F 62522D08ED08 cmpnlxadd dword ptr [r8], r9d, r10d +XDIS 290e: APX APXEVEX APX_F 6252AD08ED08 cmpnlxadd qword ptr [r8], r9, r10 +XDIS 2914: APX APXEVEX APX_F 62522D08E108 cmpnoxadd dword ptr [r8], r9d, r10d +XDIS 291a: APX APXEVEX APX_F 6252AD08E108 cmpnoxadd qword ptr [r8], r9, r10 +XDIS 2920: APX APXEVEX APX_F 62522D08EB08 cmpnpxadd dword ptr [r8], r9d, r10d +XDIS 2926: APX APXEVEX APX_F 6252AD08EB08 cmpnpxadd qword ptr [r8], r9, r10 +XDIS 292c: APX APXEVEX APX_F 62522D08E908 cmpnsxadd dword ptr [r8], r9d, r10d +XDIS 2932: APX APXEVEX APX_F 6252AD08E908 cmpnsxadd qword ptr [r8], r9, r10 +XDIS 2938: APX APXEVEX APX_F 62522D08E508 cmpnzxadd dword ptr [r8], r9d, r10d +XDIS 293e: APX APXEVEX APX_F 6252AD08E508 cmpnzxadd qword ptr [r8], r9, r10 +XDIS 2944: APX APXEVEX APX_F 62522D08E008 cmpoxadd dword ptr [r8], r9d, r10d +XDIS 294a: APX APXEVEX APX_F 6252AD08E008 cmpoxadd qword ptr [r8], r9, r10 +XDIS 2950: APX APXEVEX APX_F 62522D08EA08 cmppxadd dword ptr [r8], r9d, r10d +XDIS 2956: APX APXEVEX APX_F 6252AD08EA08 cmppxadd qword ptr [r8], r9, r10 +XDIS 295c: APX APXEVEX APX_F 62522D08E808 cmpsxadd dword ptr [r8], r9d, r10d +XDIS 2962: APX APXEVEX APX_F 6252AD08E808 cmpsxadd qword ptr [r8], r9, r10 +XDIS 2968: APX APXEVEX APX_F 62522D08E408 cmpzxadd dword ptr [r8], r9d, r10d +XDIS 296e: APX APXEVEX APX_F 6252AD08E408 cmpzxadd qword ptr [r8], r9, r10 +XDIS 2974: APX APXEVEX APX_F 62547C08F0C1 crc32 r8d, r9b +XDIS 297a: APX APXEVEX APX_F 6254FC08F0C1 crc32 r8, r9b +XDIS 2980: APX APXEVEX APX_F 62547C08F001 crc32 r8d, byte ptr [r9] +XDIS 2986: APX APXEVEX APX_F 6254FC08F001 crc32 r8, byte ptr [r9] +XDIS 298c: APX APXEVEX APX_F 62547C08F1C1 crc32 r8d, r9d +XDIS 2992: APX APXEVEX APX_F 6254FC08F1C1 crc32 r8, r9 +XDIS 2998: APX APXEVEX APX_F 62547C08F101 crc32 r8d, dword ptr [r9] +XDIS 299e: APX APXEVEX APX_F 6254FC08F101 crc32 r8, qword ptr [r9] +XDIS 29a4: APX APXEVEX APX_F 62547D08F1C1 crc32 r8d, r9w +XDIS 29aa: APX APXEVEX APX_F 6254FD08F1C1 crc32 r8, r9 +XDIS 29b0: APX APXEVEX APX_F 62547D08F101 crc32 r8d, word ptr [r9] +XDIS 29b6: APX APXEVEX APX_F 6254FD08F101 crc32 r8, qword ptr [r9] +XDIS 29bc: APX APXEVEX APX_F 6254740284C8 ctestb r8b, r9b, dfv14 +XDIS 29c2: APX APXEVEX APX_F 625474028408 ctestb byte ptr [r8], r9b, dfv14 +XDIS 29c8: APX APXEVEX APX_F 6254740285C8 ctestb r8d, r9d, dfv14 +XDIS 29ce: APX APXEVEX APX_F 6254F40285C8 ctestb r8, r9, dfv14 +XDIS 29d4: APX APXEVEX APX_F 625474028508 ctestb dword ptr [r8], r9d, dfv14 +XDIS 29da: APX APXEVEX APX_F 6254F4028508 ctestb qword ptr [r8], r9, dfv14 +XDIS 29e0: APX APXEVEX APX_F 6254750285C8 ctestb r8w, r9w, dfv14 +XDIS 29e6: APX APXEVEX APX_F 6254F50285C8 ctestb r8, r9, dfv14 +XDIS 29ec: APX APXEVEX APX_F 625475028508 ctestb word ptr [r8], r9w, dfv14 +XDIS 29f2: APX APXEVEX APX_F 6254F5028508 ctestb qword ptr [r8], r9, dfv14 +XDIS 29f8: APX APXEVEX APX_F 62D47402F6C002 ctestb r8b, 0x2, dfv14 +XDIS 29ff: APX APXEVEX APX_F 62D47402F60002 ctestb byte ptr [r8], 0x2, dfv14 +XDIS 2a06: APX APXEVEX APX_F 62D47402F6C802 ctestb r8b, 0x2, dfv14 +XDIS 2a0d: APX APXEVEX APX_F 62D47402F60802 ctestb byte ptr [r8], 0x2, dfv14 +XDIS 2a14: APX APXEVEX APX_F 62D47402F7C002000000 ctestb r8d, 0x2, dfv14 +XDIS 2a1e: APX APXEVEX APX_F 62D4F402F7C002000000 ctestb r8, 0x2, dfv14 +XDIS 2a28: APX APXEVEX APX_F 62D47402F70002000000 ctestb dword ptr [r8], 0x2, dfv14 +XDIS 2a32: APX APXEVEX APX_F 62D4F402F70002000000 ctestb qword ptr [r8], 0x2, dfv14 +XDIS 2a3c: APX APXEVEX APX_F 62D47502F7C00200 ctestb r8w, 0x2, dfv14 +XDIS 2a44: APX APXEVEX APX_F 62D4F502F7C002000000 ctestb r8, 0x2, dfv14 +XDIS 2a4e: APX APXEVEX APX_F 62D47502F7000200 ctestb word ptr [r8], 0x2, dfv14 +XDIS 2a56: APX APXEVEX APX_F 62D4F502F70002000000 ctestb qword ptr [r8], 0x2, dfv14 +XDIS 2a60: APX APXEVEX APX_F 62D47402F7C802000000 ctestb r8d, 0x2, dfv14 +XDIS 2a6a: APX APXEVEX APX_F 62D4F402F7C802000000 ctestb r8, 0x2, dfv14 +XDIS 2a74: APX APXEVEX APX_F 62D47402F70802000000 ctestb dword ptr [r8], 0x2, dfv14 +XDIS 2a7e: APX APXEVEX APX_F 62D4F402F70802000000 ctestb qword ptr [r8], 0x2, dfv14 +XDIS 2a88: APX APXEVEX APX_F 62D47502F7C80200 ctestb r8w, 0x2, dfv14 +XDIS 2a90: APX APXEVEX APX_F 62D4F502F7C802000000 ctestb r8, 0x2, dfv14 +XDIS 2a9a: APX APXEVEX APX_F 62D47502F7080200 ctestb word ptr [r8], 0x2, dfv14 +XDIS 2aa2: APX APXEVEX APX_F 62D4F502F70802000000 ctestb qword ptr [r8], 0x2, dfv14 +XDIS 2aac: APX APXEVEX APX_F 6254740684C8 ctestbe r8b, r9b, dfv14 +XDIS 2ab2: APX APXEVEX APX_F 625474068408 ctestbe byte ptr [r8], r9b, dfv14 +XDIS 2ab8: APX APXEVEX APX_F 6254740685C8 ctestbe r8d, r9d, dfv14 +XDIS 2abe: APX APXEVEX APX_F 6254F40685C8 ctestbe r8, r9, dfv14 +XDIS 2ac4: APX APXEVEX APX_F 625474068508 ctestbe dword ptr [r8], r9d, dfv14 +XDIS 2aca: APX APXEVEX APX_F 6254F4068508 ctestbe qword ptr [r8], r9, dfv14 +XDIS 2ad0: APX APXEVEX APX_F 6254750685C8 ctestbe r8w, r9w, dfv14 +XDIS 2ad6: APX APXEVEX APX_F 6254F50685C8 ctestbe r8, r9, dfv14 +XDIS 2adc: APX APXEVEX APX_F 625475068508 ctestbe word ptr [r8], r9w, dfv14 +XDIS 2ae2: APX APXEVEX APX_F 6254F5068508 ctestbe qword ptr [r8], r9, dfv14 +XDIS 2ae8: APX APXEVEX APX_F 62D47406F6C002 ctestbe r8b, 0x2, dfv14 +XDIS 2aef: APX APXEVEX APX_F 62D47406F60002 ctestbe byte ptr [r8], 0x2, dfv14 +XDIS 2af6: APX APXEVEX APX_F 62D47406F6C802 ctestbe r8b, 0x2, dfv14 +XDIS 2afd: APX APXEVEX APX_F 62D47406F60802 ctestbe byte ptr [r8], 0x2, dfv14 +XDIS 2b04: APX APXEVEX APX_F 62D47406F7C002000000 ctestbe r8d, 0x2, dfv14 +XDIS 2b0e: APX APXEVEX APX_F 62D4F406F7C002000000 ctestbe r8, 0x2, dfv14 +XDIS 2b18: APX APXEVEX APX_F 62D47406F70002000000 ctestbe dword ptr [r8], 0x2, dfv14 +XDIS 2b22: APX APXEVEX APX_F 62D4F406F70002000000 ctestbe qword ptr [r8], 0x2, dfv14 +XDIS 2b2c: APX APXEVEX APX_F 62D47506F7C00200 ctestbe r8w, 0x2, dfv14 +XDIS 2b34: APX APXEVEX APX_F 62D4F506F7C002000000 ctestbe r8, 0x2, dfv14 +XDIS 2b3e: APX APXEVEX APX_F 62D47506F7000200 ctestbe word ptr [r8], 0x2, dfv14 +XDIS 2b46: APX APXEVEX APX_F 62D4F506F70002000000 ctestbe qword ptr [r8], 0x2, dfv14 +XDIS 2b50: APX APXEVEX APX_F 62D47406F7C802000000 ctestbe r8d, 0x2, dfv14 +XDIS 2b5a: APX APXEVEX APX_F 62D4F406F7C802000000 ctestbe r8, 0x2, dfv14 +XDIS 2b64: APX APXEVEX APX_F 62D47406F70802000000 ctestbe dword ptr [r8], 0x2, dfv14 +XDIS 2b6e: APX APXEVEX APX_F 62D4F406F70802000000 ctestbe qword ptr [r8], 0x2, dfv14 +XDIS 2b78: APX APXEVEX APX_F 62D47506F7C80200 ctestbe r8w, 0x2, dfv14 +XDIS 2b80: APX APXEVEX APX_F 62D4F506F7C802000000 ctestbe r8, 0x2, dfv14 +XDIS 2b8a: APX APXEVEX APX_F 62D47506F7080200 ctestbe word ptr [r8], 0x2, dfv14 +XDIS 2b92: APX APXEVEX APX_F 62D4F506F70802000000 ctestbe qword ptr [r8], 0x2, dfv14 +XDIS 2b9c: APX APXEVEX APX_F 6254740B84C8 ctestf r8b, r9b, dfv14 +XDIS 2ba2: APX APXEVEX APX_F 6254740B8408 ctestf byte ptr [r8], r9b, dfv14 +XDIS 2ba8: APX APXEVEX APX_F 6254740B85C8 ctestf r8d, r9d, dfv14 +XDIS 2bae: APX APXEVEX APX_F 6254F40B85C8 ctestf r8, r9, dfv14 +XDIS 2bb4: APX APXEVEX APX_F 6254740B8508 ctestf dword ptr [r8], r9d, dfv14 +XDIS 2bba: APX APXEVEX APX_F 6254F40B8508 ctestf qword ptr [r8], r9, dfv14 +XDIS 2bc0: APX APXEVEX APX_F 6254750B85C8 ctestf r8w, r9w, dfv14 +XDIS 2bc6: APX APXEVEX APX_F 6254F50B85C8 ctestf r8, r9, dfv14 +XDIS 2bcc: APX APXEVEX APX_F 6254750B8508 ctestf word ptr [r8], r9w, dfv14 +XDIS 2bd2: APX APXEVEX APX_F 6254F50B8508 ctestf qword ptr [r8], r9, dfv14 +XDIS 2bd8: APX APXEVEX APX_F 62D4740BF6C002 ctestf r8b, 0x2, dfv14 +XDIS 2bdf: APX APXEVEX APX_F 62D4740BF60002 ctestf byte ptr [r8], 0x2, dfv14 +XDIS 2be6: APX APXEVEX APX_F 62D4740BF6C802 ctestf r8b, 0x2, dfv14 +XDIS 2bed: APX APXEVEX APX_F 62D4740BF60802 ctestf byte ptr [r8], 0x2, dfv14 +XDIS 2bf4: APX APXEVEX APX_F 62D4740BF7C002000000 ctestf r8d, 0x2, dfv14 +XDIS 2bfe: APX APXEVEX APX_F 62D4F40BF7C002000000 ctestf r8, 0x2, dfv14 +XDIS 2c08: APX APXEVEX APX_F 62D4740BF70002000000 ctestf dword ptr [r8], 0x2, dfv14 +XDIS 2c12: APX APXEVEX APX_F 62D4F40BF70002000000 ctestf qword ptr [r8], 0x2, dfv14 +XDIS 2c1c: APX APXEVEX APX_F 62D4750BF7C00200 ctestf r8w, 0x2, dfv14 +XDIS 2c24: APX APXEVEX APX_F 62D4F50BF7C002000000 ctestf r8, 0x2, dfv14 +XDIS 2c2e: APX APXEVEX APX_F 62D4750BF7000200 ctestf word ptr [r8], 0x2, dfv14 +XDIS 2c36: APX APXEVEX APX_F 62D4F50BF70002000000 ctestf qword ptr [r8], 0x2, dfv14 +XDIS 2c40: APX APXEVEX APX_F 62D4740BF7C802000000 ctestf r8d, 0x2, dfv14 +XDIS 2c4a: APX APXEVEX APX_F 62D4F40BF7C802000000 ctestf r8, 0x2, dfv14 +XDIS 2c54: APX APXEVEX APX_F 62D4740BF70802000000 ctestf dword ptr [r8], 0x2, dfv14 +XDIS 2c5e: APX APXEVEX APX_F 62D4F40BF70802000000 ctestf qword ptr [r8], 0x2, dfv14 +XDIS 2c68: APX APXEVEX APX_F 62D4750BF7C80200 ctestf r8w, 0x2, dfv14 +XDIS 2c70: APX APXEVEX APX_F 62D4F50BF7C802000000 ctestf r8, 0x2, dfv14 +XDIS 2c7a: APX APXEVEX APX_F 62D4750BF7080200 ctestf word ptr [r8], 0x2, dfv14 +XDIS 2c82: APX APXEVEX APX_F 62D4F50BF70802000000 ctestf qword ptr [r8], 0x2, dfv14 +XDIS 2c8c: APX APXEVEX APX_F 6254740C84C8 ctestl r8b, r9b, dfv14 +XDIS 2c92: APX APXEVEX APX_F 6254740C8408 ctestl byte ptr [r8], r9b, dfv14 +XDIS 2c98: APX APXEVEX APX_F 6254740C85C8 ctestl r8d, r9d, dfv14 +XDIS 2c9e: APX APXEVEX APX_F 6254F40C85C8 ctestl r8, r9, dfv14 +XDIS 2ca4: APX APXEVEX APX_F 6254740C8508 ctestl dword ptr [r8], r9d, dfv14 +XDIS 2caa: APX APXEVEX APX_F 6254F40C8508 ctestl qword ptr [r8], r9, dfv14 +XDIS 2cb0: APX APXEVEX APX_F 6254750C85C8 ctestl r8w, r9w, dfv14 +XDIS 2cb6: APX APXEVEX APX_F 6254F50C85C8 ctestl r8, r9, dfv14 +XDIS 2cbc: APX APXEVEX APX_F 6254750C8508 ctestl word ptr [r8], r9w, dfv14 +XDIS 2cc2: APX APXEVEX APX_F 6254F50C8508 ctestl qword ptr [r8], r9, dfv14 +XDIS 2cc8: APX APXEVEX APX_F 62D4740CF6C002 ctestl r8b, 0x2, dfv14 +XDIS 2ccf: APX APXEVEX APX_F 62D4740CF60002 ctestl byte ptr [r8], 0x2, dfv14 +XDIS 2cd6: APX APXEVEX APX_F 62D4740CF6C802 ctestl r8b, 0x2, dfv14 +XDIS 2cdd: APX APXEVEX APX_F 62D4740CF60802 ctestl byte ptr [r8], 0x2, dfv14 +XDIS 2ce4: APX APXEVEX APX_F 62D4740CF7C002000000 ctestl r8d, 0x2, dfv14 +XDIS 2cee: APX APXEVEX APX_F 62D4F40CF7C002000000 ctestl r8, 0x2, dfv14 +XDIS 2cf8: APX APXEVEX APX_F 62D4740CF70002000000 ctestl dword ptr [r8], 0x2, dfv14 +XDIS 2d02: APX APXEVEX APX_F 62D4F40CF70002000000 ctestl qword ptr [r8], 0x2, dfv14 +XDIS 2d0c: APX APXEVEX APX_F 62D4750CF7C00200 ctestl r8w, 0x2, dfv14 +XDIS 2d14: APX APXEVEX APX_F 62D4F50CF7C002000000 ctestl r8, 0x2, dfv14 +XDIS 2d1e: APX APXEVEX APX_F 62D4750CF7000200 ctestl word ptr [r8], 0x2, dfv14 +XDIS 2d26: APX APXEVEX APX_F 62D4F50CF70002000000 ctestl qword ptr [r8], 0x2, dfv14 +XDIS 2d30: APX APXEVEX APX_F 62D4740CF7C802000000 ctestl r8d, 0x2, dfv14 +XDIS 2d3a: APX APXEVEX APX_F 62D4F40CF7C802000000 ctestl r8, 0x2, dfv14 +XDIS 2d44: APX APXEVEX APX_F 62D4740CF70802000000 ctestl dword ptr [r8], 0x2, dfv14 +XDIS 2d4e: APX APXEVEX APX_F 62D4F40CF70802000000 ctestl qword ptr [r8], 0x2, dfv14 +XDIS 2d58: APX APXEVEX APX_F 62D4750CF7C80200 ctestl r8w, 0x2, dfv14 +XDIS 2d60: APX APXEVEX APX_F 62D4F50CF7C802000000 ctestl r8, 0x2, dfv14 +XDIS 2d6a: APX APXEVEX APX_F 62D4750CF7080200 ctestl word ptr [r8], 0x2, dfv14 +XDIS 2d72: APX APXEVEX APX_F 62D4F50CF70802000000 ctestl qword ptr [r8], 0x2, dfv14 +XDIS 2d7c: APX APXEVEX APX_F 6254740E84C8 ctestle r8b, r9b, dfv14 +XDIS 2d82: APX APXEVEX APX_F 6254740E8408 ctestle byte ptr [r8], r9b, dfv14 +XDIS 2d88: APX APXEVEX APX_F 6254740E85C8 ctestle r8d, r9d, dfv14 +XDIS 2d8e: APX APXEVEX APX_F 6254F40E85C8 ctestle r8, r9, dfv14 +XDIS 2d94: APX APXEVEX APX_F 6254740E8508 ctestle dword ptr [r8], r9d, dfv14 +XDIS 2d9a: APX APXEVEX APX_F 6254F40E8508 ctestle qword ptr [r8], r9, dfv14 +XDIS 2da0: APX APXEVEX APX_F 6254750E85C8 ctestle r8w, r9w, dfv14 +XDIS 2da6: APX APXEVEX APX_F 6254F50E85C8 ctestle r8, r9, dfv14 +XDIS 2dac: APX APXEVEX APX_F 6254750E8508 ctestle word ptr [r8], r9w, dfv14 +XDIS 2db2: APX APXEVEX APX_F 6254F50E8508 ctestle qword ptr [r8], r9, dfv14 +XDIS 2db8: APX APXEVEX APX_F 62D4740EF6C002 ctestle r8b, 0x2, dfv14 +XDIS 2dbf: APX APXEVEX APX_F 62D4740EF60002 ctestle byte ptr [r8], 0x2, dfv14 +XDIS 2dc6: APX APXEVEX APX_F 62D4740EF6C802 ctestle r8b, 0x2, dfv14 +XDIS 2dcd: APX APXEVEX APX_F 62D4740EF60802 ctestle byte ptr [r8], 0x2, dfv14 +XDIS 2dd4: APX APXEVEX APX_F 62D4740EF7C002000000 ctestle r8d, 0x2, dfv14 +XDIS 2dde: APX APXEVEX APX_F 62D4F40EF7C002000000 ctestle r8, 0x2, dfv14 +XDIS 2de8: APX APXEVEX APX_F 62D4740EF70002000000 ctestle dword ptr [r8], 0x2, dfv14 +XDIS 2df2: APX APXEVEX APX_F 62D4F40EF70002000000 ctestle qword ptr [r8], 0x2, dfv14 +XDIS 2dfc: APX APXEVEX APX_F 62D4750EF7C00200 ctestle r8w, 0x2, dfv14 +XDIS 2e04: APX APXEVEX APX_F 62D4F50EF7C002000000 ctestle r8, 0x2, dfv14 +XDIS 2e0e: APX APXEVEX APX_F 62D4750EF7000200 ctestle word ptr [r8], 0x2, dfv14 +XDIS 2e16: APX APXEVEX APX_F 62D4F50EF70002000000 ctestle qword ptr [r8], 0x2, dfv14 +XDIS 2e20: APX APXEVEX APX_F 62D4740EF7C802000000 ctestle r8d, 0x2, dfv14 +XDIS 2e2a: APX APXEVEX APX_F 62D4F40EF7C802000000 ctestle r8, 0x2, dfv14 +XDIS 2e34: APX APXEVEX APX_F 62D4740EF70802000000 ctestle dword ptr [r8], 0x2, dfv14 +XDIS 2e3e: APX APXEVEX APX_F 62D4F40EF70802000000 ctestle qword ptr [r8], 0x2, dfv14 +XDIS 2e48: APX APXEVEX APX_F 62D4750EF7C80200 ctestle r8w, 0x2, dfv14 +XDIS 2e50: APX APXEVEX APX_F 62D4F50EF7C802000000 ctestle r8, 0x2, dfv14 +XDIS 2e5a: APX APXEVEX APX_F 62D4750EF7080200 ctestle word ptr [r8], 0x2, dfv14 +XDIS 2e62: APX APXEVEX APX_F 62D4F50EF70802000000 ctestle qword ptr [r8], 0x2, dfv14 +XDIS 2e6c: APX APXEVEX APX_F 6254740384C8 ctestnb r8b, r9b, dfv14 +XDIS 2e72: APX APXEVEX APX_F 625474038408 ctestnb byte ptr [r8], r9b, dfv14 +XDIS 2e78: APX APXEVEX APX_F 6254740385C8 ctestnb r8d, r9d, dfv14 +XDIS 2e7e: APX APXEVEX APX_F 6254F40385C8 ctestnb r8, r9, dfv14 +XDIS 2e84: APX APXEVEX APX_F 625474038508 ctestnb dword ptr [r8], r9d, dfv14 +XDIS 2e8a: APX APXEVEX APX_F 6254F4038508 ctestnb qword ptr [r8], r9, dfv14 +XDIS 2e90: APX APXEVEX APX_F 6254750385C8 ctestnb r8w, r9w, dfv14 +XDIS 2e96: APX APXEVEX APX_F 6254F50385C8 ctestnb r8, r9, dfv14 +XDIS 2e9c: APX APXEVEX APX_F 625475038508 ctestnb word ptr [r8], r9w, dfv14 +XDIS 2ea2: APX APXEVEX APX_F 6254F5038508 ctestnb qword ptr [r8], r9, dfv14 +XDIS 2ea8: APX APXEVEX APX_F 62D47403F6C002 ctestnb r8b, 0x2, dfv14 +XDIS 2eaf: APX APXEVEX APX_F 62D47403F60002 ctestnb byte ptr [r8], 0x2, dfv14 +XDIS 2eb6: APX APXEVEX APX_F 62D47403F6C802 ctestnb r8b, 0x2, dfv14 +XDIS 2ebd: APX APXEVEX APX_F 62D47403F60802 ctestnb byte ptr [r8], 0x2, dfv14 +XDIS 2ec4: APX APXEVEX APX_F 62D47403F7C002000000 ctestnb r8d, 0x2, dfv14 +XDIS 2ece: APX APXEVEX APX_F 62D4F403F7C002000000 ctestnb r8, 0x2, dfv14 +XDIS 2ed8: APX APXEVEX APX_F 62D47403F70002000000 ctestnb dword ptr [r8], 0x2, dfv14 +XDIS 2ee2: APX APXEVEX APX_F 62D4F403F70002000000 ctestnb qword ptr [r8], 0x2, dfv14 +XDIS 2eec: APX APXEVEX APX_F 62D47503F7C00200 ctestnb r8w, 0x2, dfv14 +XDIS 2ef4: APX APXEVEX APX_F 62D4F503F7C002000000 ctestnb r8, 0x2, dfv14 +XDIS 2efe: APX APXEVEX APX_F 62D47503F7000200 ctestnb word ptr [r8], 0x2, dfv14 +XDIS 2f06: APX APXEVEX APX_F 62D4F503F70002000000 ctestnb qword ptr [r8], 0x2, dfv14 +XDIS 2f10: APX APXEVEX APX_F 62D47403F7C802000000 ctestnb r8d, 0x2, dfv14 +XDIS 2f1a: APX APXEVEX APX_F 62D4F403F7C802000000 ctestnb r8, 0x2, dfv14 +XDIS 2f24: APX APXEVEX APX_F 62D47403F70802000000 ctestnb dword ptr [r8], 0x2, dfv14 +XDIS 2f2e: APX APXEVEX APX_F 62D4F403F70802000000 ctestnb qword ptr [r8], 0x2, dfv14 +XDIS 2f38: APX APXEVEX APX_F 62D47503F7C80200 ctestnb r8w, 0x2, dfv14 +XDIS 2f40: APX APXEVEX APX_F 62D4F503F7C802000000 ctestnb r8, 0x2, dfv14 +XDIS 2f4a: APX APXEVEX APX_F 62D47503F7080200 ctestnb word ptr [r8], 0x2, dfv14 +XDIS 2f52: APX APXEVEX APX_F 62D4F503F70802000000 ctestnb qword ptr [r8], 0x2, dfv14 +XDIS 2f5c: APX APXEVEX APX_F 6254740784C8 ctestnbe r8b, r9b, dfv14 +XDIS 2f62: APX APXEVEX APX_F 625474078408 ctestnbe byte ptr [r8], r9b, dfv14 +XDIS 2f68: APX APXEVEX APX_F 6254740785C8 ctestnbe r8d, r9d, dfv14 +XDIS 2f6e: APX APXEVEX APX_F 6254F40785C8 ctestnbe r8, r9, dfv14 +XDIS 2f74: APX APXEVEX APX_F 625474078508 ctestnbe dword ptr [r8], r9d, dfv14 +XDIS 2f7a: APX APXEVEX APX_F 6254F4078508 ctestnbe qword ptr [r8], r9, dfv14 +XDIS 2f80: APX APXEVEX APX_F 6254750785C8 ctestnbe r8w, r9w, dfv14 +XDIS 2f86: APX APXEVEX APX_F 6254F50785C8 ctestnbe r8, r9, dfv14 +XDIS 2f8c: APX APXEVEX APX_F 625475078508 ctestnbe word ptr [r8], r9w, dfv14 +XDIS 2f92: APX APXEVEX APX_F 6254F5078508 ctestnbe qword ptr [r8], r9, dfv14 +XDIS 2f98: APX APXEVEX APX_F 62D47407F6C002 ctestnbe r8b, 0x2, dfv14 +XDIS 2f9f: APX APXEVEX APX_F 62D47407F60002 ctestnbe byte ptr [r8], 0x2, dfv14 +XDIS 2fa6: APX APXEVEX APX_F 62D47407F6C802 ctestnbe r8b, 0x2, dfv14 +XDIS 2fad: APX APXEVEX APX_F 62D47407F60802 ctestnbe byte ptr [r8], 0x2, dfv14 +XDIS 2fb4: APX APXEVEX APX_F 62D47407F7C002000000 ctestnbe r8d, 0x2, dfv14 +XDIS 2fbe: APX APXEVEX APX_F 62D4F407F7C002000000 ctestnbe r8, 0x2, dfv14 +XDIS 2fc8: APX APXEVEX APX_F 62D47407F70002000000 ctestnbe dword ptr [r8], 0x2, dfv14 +XDIS 2fd2: APX APXEVEX APX_F 62D4F407F70002000000 ctestnbe qword ptr [r8], 0x2, dfv14 +XDIS 2fdc: APX APXEVEX APX_F 62D47507F7C00200 ctestnbe r8w, 0x2, dfv14 +XDIS 2fe4: APX APXEVEX APX_F 62D4F507F7C002000000 ctestnbe r8, 0x2, dfv14 +XDIS 2fee: APX APXEVEX APX_F 62D47507F7000200 ctestnbe word ptr [r8], 0x2, dfv14 +XDIS 2ff6: APX APXEVEX APX_F 62D4F507F70002000000 ctestnbe qword ptr [r8], 0x2, dfv14 +XDIS 3000: APX APXEVEX APX_F 62D47407F7C802000000 ctestnbe r8d, 0x2, dfv14 +XDIS 300a: APX APXEVEX APX_F 62D4F407F7C802000000 ctestnbe r8, 0x2, dfv14 +XDIS 3014: APX APXEVEX APX_F 62D47407F70802000000 ctestnbe dword ptr [r8], 0x2, dfv14 +XDIS 301e: APX APXEVEX APX_F 62D4F407F70802000000 ctestnbe qword ptr [r8], 0x2, dfv14 +XDIS 3028: APX APXEVEX APX_F 62D47507F7C80200 ctestnbe r8w, 0x2, dfv14 +XDIS 3030: APX APXEVEX APX_F 62D4F507F7C802000000 ctestnbe r8, 0x2, dfv14 +XDIS 303a: APX APXEVEX APX_F 62D47507F7080200 ctestnbe word ptr [r8], 0x2, dfv14 +XDIS 3042: APX APXEVEX APX_F 62D4F507F70802000000 ctestnbe qword ptr [r8], 0x2, dfv14 +XDIS 304c: APX APXEVEX APX_F 6254740D84C8 ctestnl r8b, r9b, dfv14 +XDIS 3052: APX APXEVEX APX_F 6254740D8408 ctestnl byte ptr [r8], r9b, dfv14 +XDIS 3058: APX APXEVEX APX_F 6254740D85C8 ctestnl r8d, r9d, dfv14 +XDIS 305e: APX APXEVEX APX_F 6254F40D85C8 ctestnl r8, r9, dfv14 +XDIS 3064: APX APXEVEX APX_F 6254740D8508 ctestnl dword ptr [r8], r9d, dfv14 +XDIS 306a: APX APXEVEX APX_F 6254F40D8508 ctestnl qword ptr [r8], r9, dfv14 +XDIS 3070: APX APXEVEX APX_F 6254750D85C8 ctestnl r8w, r9w, dfv14 +XDIS 3076: APX APXEVEX APX_F 6254F50D85C8 ctestnl r8, r9, dfv14 +XDIS 307c: APX APXEVEX APX_F 6254750D8508 ctestnl word ptr [r8], r9w, dfv14 +XDIS 3082: APX APXEVEX APX_F 6254F50D8508 ctestnl qword ptr [r8], r9, dfv14 +XDIS 3088: APX APXEVEX APX_F 62D4740DF6C002 ctestnl r8b, 0x2, dfv14 +XDIS 308f: APX APXEVEX APX_F 62D4740DF60002 ctestnl byte ptr [r8], 0x2, dfv14 +XDIS 3096: APX APXEVEX APX_F 62D4740DF6C802 ctestnl r8b, 0x2, dfv14 +XDIS 309d: APX APXEVEX APX_F 62D4740DF60802 ctestnl byte ptr [r8], 0x2, dfv14 +XDIS 30a4: APX APXEVEX APX_F 62D4740DF7C002000000 ctestnl r8d, 0x2, dfv14 +XDIS 30ae: APX APXEVEX APX_F 62D4F40DF7C002000000 ctestnl r8, 0x2, dfv14 +XDIS 30b8: APX APXEVEX APX_F 62D4740DF70002000000 ctestnl dword ptr [r8], 0x2, dfv14 +XDIS 30c2: APX APXEVEX APX_F 62D4F40DF70002000000 ctestnl qword ptr [r8], 0x2, dfv14 +XDIS 30cc: APX APXEVEX APX_F 62D4750DF7C00200 ctestnl r8w, 0x2, dfv14 +XDIS 30d4: APX APXEVEX APX_F 62D4F50DF7C002000000 ctestnl r8, 0x2, dfv14 +XDIS 30de: APX APXEVEX APX_F 62D4750DF7000200 ctestnl word ptr [r8], 0x2, dfv14 +XDIS 30e6: APX APXEVEX APX_F 62D4F50DF70002000000 ctestnl qword ptr [r8], 0x2, dfv14 +XDIS 30f0: APX APXEVEX APX_F 62D4740DF7C802000000 ctestnl r8d, 0x2, dfv14 +XDIS 30fa: APX APXEVEX APX_F 62D4F40DF7C802000000 ctestnl r8, 0x2, dfv14 +XDIS 3104: APX APXEVEX APX_F 62D4740DF70802000000 ctestnl dword ptr [r8], 0x2, dfv14 +XDIS 310e: APX APXEVEX APX_F 62D4F40DF70802000000 ctestnl qword ptr [r8], 0x2, dfv14 +XDIS 3118: APX APXEVEX APX_F 62D4750DF7C80200 ctestnl r8w, 0x2, dfv14 +XDIS 3120: APX APXEVEX APX_F 62D4F50DF7C802000000 ctestnl r8, 0x2, dfv14 +XDIS 312a: APX APXEVEX APX_F 62D4750DF7080200 ctestnl word ptr [r8], 0x2, dfv14 +XDIS 3132: APX APXEVEX APX_F 62D4F50DF70802000000 ctestnl qword ptr [r8], 0x2, dfv14 +XDIS 313c: APX APXEVEX APX_F 6254740F84C8 ctestnle r8b, r9b, dfv14 +XDIS 3142: APX APXEVEX APX_F 6254740F8408 ctestnle byte ptr [r8], r9b, dfv14 +XDIS 3148: APX APXEVEX APX_F 6254740F85C8 ctestnle r8d, r9d, dfv14 +XDIS 314e: APX APXEVEX APX_F 6254F40F85C8 ctestnle r8, r9, dfv14 +XDIS 3154: APX APXEVEX APX_F 6254740F8508 ctestnle dword ptr [r8], r9d, dfv14 +XDIS 315a: APX APXEVEX APX_F 6254F40F8508 ctestnle qword ptr [r8], r9, dfv14 +XDIS 3160: APX APXEVEX APX_F 6254750F85C8 ctestnle r8w, r9w, dfv14 +XDIS 3166: APX APXEVEX APX_F 6254F50F85C8 ctestnle r8, r9, dfv14 +XDIS 316c: APX APXEVEX APX_F 6254750F8508 ctestnle word ptr [r8], r9w, dfv14 +XDIS 3172: APX APXEVEX APX_F 6254F50F8508 ctestnle qword ptr [r8], r9, dfv14 +XDIS 3178: APX APXEVEX APX_F 62D4740FF6C002 ctestnle r8b, 0x2, dfv14 +XDIS 317f: APX APXEVEX APX_F 62D4740FF60002 ctestnle byte ptr [r8], 0x2, dfv14 +XDIS 3186: APX APXEVEX APX_F 62D4740FF6C802 ctestnle r8b, 0x2, dfv14 +XDIS 318d: APX APXEVEX APX_F 62D4740FF60802 ctestnle byte ptr [r8], 0x2, dfv14 +XDIS 3194: APX APXEVEX APX_F 62D4740FF7C002000000 ctestnle r8d, 0x2, dfv14 +XDIS 319e: APX APXEVEX APX_F 62D4F40FF7C002000000 ctestnle r8, 0x2, dfv14 +XDIS 31a8: APX APXEVEX APX_F 62D4740FF70002000000 ctestnle dword ptr [r8], 0x2, dfv14 +XDIS 31b2: APX APXEVEX APX_F 62D4F40FF70002000000 ctestnle qword ptr [r8], 0x2, dfv14 +XDIS 31bc: APX APXEVEX APX_F 62D4750FF7C00200 ctestnle r8w, 0x2, dfv14 +XDIS 31c4: APX APXEVEX APX_F 62D4F50FF7C002000000 ctestnle r8, 0x2, dfv14 +XDIS 31ce: APX APXEVEX APX_F 62D4750FF7000200 ctestnle word ptr [r8], 0x2, dfv14 +XDIS 31d6: APX APXEVEX APX_F 62D4F50FF70002000000 ctestnle qword ptr [r8], 0x2, dfv14 +XDIS 31e0: APX APXEVEX APX_F 62D4740FF7C802000000 ctestnle r8d, 0x2, dfv14 +XDIS 31ea: APX APXEVEX APX_F 62D4F40FF7C802000000 ctestnle r8, 0x2, dfv14 +XDIS 31f4: APX APXEVEX APX_F 62D4740FF70802000000 ctestnle dword ptr [r8], 0x2, dfv14 +XDIS 31fe: APX APXEVEX APX_F 62D4F40FF70802000000 ctestnle qword ptr [r8], 0x2, dfv14 +XDIS 3208: APX APXEVEX APX_F 62D4750FF7C80200 ctestnle r8w, 0x2, dfv14 +XDIS 3210: APX APXEVEX APX_F 62D4F50FF7C802000000 ctestnle r8, 0x2, dfv14 +XDIS 321a: APX APXEVEX APX_F 62D4750FF7080200 ctestnle word ptr [r8], 0x2, dfv14 +XDIS 3222: APX APXEVEX APX_F 62D4F50FF70802000000 ctestnle qword ptr [r8], 0x2, dfv14 +XDIS 322c: APX APXEVEX APX_F 6254740184C8 ctestno r8b, r9b, dfv14 +XDIS 3232: APX APXEVEX APX_F 625474018408 ctestno byte ptr [r8], r9b, dfv14 +XDIS 3238: APX APXEVEX APX_F 6254740185C8 ctestno r8d, r9d, dfv14 +XDIS 323e: APX APXEVEX APX_F 6254F40185C8 ctestno r8, r9, dfv14 +XDIS 3244: APX APXEVEX APX_F 625474018508 ctestno dword ptr [r8], r9d, dfv14 +XDIS 324a: APX APXEVEX APX_F 6254F4018508 ctestno qword ptr [r8], r9, dfv14 +XDIS 3250: APX APXEVEX APX_F 6254750185C8 ctestno r8w, r9w, dfv14 +XDIS 3256: APX APXEVEX APX_F 6254F50185C8 ctestno r8, r9, dfv14 +XDIS 325c: APX APXEVEX APX_F 625475018508 ctestno word ptr [r8], r9w, dfv14 +XDIS 3262: APX APXEVEX APX_F 6254F5018508 ctestno qword ptr [r8], r9, dfv14 +XDIS 3268: APX APXEVEX APX_F 62D47401F6C002 ctestno r8b, 0x2, dfv14 +XDIS 326f: APX APXEVEX APX_F 62D47401F60002 ctestno byte ptr [r8], 0x2, dfv14 +XDIS 3276: APX APXEVEX APX_F 62D47401F6C802 ctestno r8b, 0x2, dfv14 +XDIS 327d: APX APXEVEX APX_F 62D47401F60802 ctestno byte ptr [r8], 0x2, dfv14 +XDIS 3284: APX APXEVEX APX_F 62D47401F7C002000000 ctestno r8d, 0x2, dfv14 +XDIS 328e: APX APXEVEX APX_F 62D4F401F7C002000000 ctestno r8, 0x2, dfv14 +XDIS 3298: APX APXEVEX APX_F 62D47401F70002000000 ctestno dword ptr [r8], 0x2, dfv14 +XDIS 32a2: APX APXEVEX APX_F 62D4F401F70002000000 ctestno qword ptr [r8], 0x2, dfv14 +XDIS 32ac: APX APXEVEX APX_F 62D47501F7C00200 ctestno r8w, 0x2, dfv14 +XDIS 32b4: APX APXEVEX APX_F 62D4F501F7C002000000 ctestno r8, 0x2, dfv14 +XDIS 32be: APX APXEVEX APX_F 62D47501F7000200 ctestno word ptr [r8], 0x2, dfv14 +XDIS 32c6: APX APXEVEX APX_F 62D4F501F70002000000 ctestno qword ptr [r8], 0x2, dfv14 +XDIS 32d0: APX APXEVEX APX_F 62D47401F7C802000000 ctestno r8d, 0x2, dfv14 +XDIS 32da: APX APXEVEX APX_F 62D4F401F7C802000000 ctestno r8, 0x2, dfv14 +XDIS 32e4: APX APXEVEX APX_F 62D47401F70802000000 ctestno dword ptr [r8], 0x2, dfv14 +XDIS 32ee: APX APXEVEX APX_F 62D4F401F70802000000 ctestno qword ptr [r8], 0x2, dfv14 +XDIS 32f8: APX APXEVEX APX_F 62D47501F7C80200 ctestno r8w, 0x2, dfv14 +XDIS 3300: APX APXEVEX APX_F 62D4F501F7C802000000 ctestno r8, 0x2, dfv14 +XDIS 330a: APX APXEVEX APX_F 62D47501F7080200 ctestno word ptr [r8], 0x2, dfv14 +XDIS 3312: APX APXEVEX APX_F 62D4F501F70802000000 ctestno qword ptr [r8], 0x2, dfv14 +XDIS 331c: APX APXEVEX APX_F 6254740984C8 ctestns r8b, r9b, dfv14 +XDIS 3322: APX APXEVEX APX_F 625474098408 ctestns byte ptr [r8], r9b, dfv14 +XDIS 3328: APX APXEVEX APX_F 6254740985C8 ctestns r8d, r9d, dfv14 +XDIS 332e: APX APXEVEX APX_F 6254F40985C8 ctestns r8, r9, dfv14 +XDIS 3334: APX APXEVEX APX_F 625474098508 ctestns dword ptr [r8], r9d, dfv14 +XDIS 333a: APX APXEVEX APX_F 6254F4098508 ctestns qword ptr [r8], r9, dfv14 +XDIS 3340: APX APXEVEX APX_F 6254750985C8 ctestns r8w, r9w, dfv14 +XDIS 3346: APX APXEVEX APX_F 6254F50985C8 ctestns r8, r9, dfv14 +XDIS 334c: APX APXEVEX APX_F 625475098508 ctestns word ptr [r8], r9w, dfv14 +XDIS 3352: APX APXEVEX APX_F 6254F5098508 ctestns qword ptr [r8], r9, dfv14 +XDIS 3358: APX APXEVEX APX_F 62D47409F6C002 ctestns r8b, 0x2, dfv14 +XDIS 335f: APX APXEVEX APX_F 62D47409F60002 ctestns byte ptr [r8], 0x2, dfv14 +XDIS 3366: APX APXEVEX APX_F 62D47409F6C802 ctestns r8b, 0x2, dfv14 +XDIS 336d: APX APXEVEX APX_F 62D47409F60802 ctestns byte ptr [r8], 0x2, dfv14 +XDIS 3374: APX APXEVEX APX_F 62D47409F7C002000000 ctestns r8d, 0x2, dfv14 +XDIS 337e: APX APXEVEX APX_F 62D4F409F7C002000000 ctestns r8, 0x2, dfv14 +XDIS 3388: APX APXEVEX APX_F 62D47409F70002000000 ctestns dword ptr [r8], 0x2, dfv14 +XDIS 3392: APX APXEVEX APX_F 62D4F409F70002000000 ctestns qword ptr [r8], 0x2, dfv14 +XDIS 339c: APX APXEVEX APX_F 62D47509F7C00200 ctestns r8w, 0x2, dfv14 +XDIS 33a4: APX APXEVEX APX_F 62D4F509F7C002000000 ctestns r8, 0x2, dfv14 +XDIS 33ae: APX APXEVEX APX_F 62D47509F7000200 ctestns word ptr [r8], 0x2, dfv14 +XDIS 33b6: APX APXEVEX APX_F 62D4F509F70002000000 ctestns qword ptr [r8], 0x2, dfv14 +XDIS 33c0: APX APXEVEX APX_F 62D47409F7C802000000 ctestns r8d, 0x2, dfv14 +XDIS 33ca: APX APXEVEX APX_F 62D4F409F7C802000000 ctestns r8, 0x2, dfv14 +XDIS 33d4: APX APXEVEX APX_F 62D47409F70802000000 ctestns dword ptr [r8], 0x2, dfv14 +XDIS 33de: APX APXEVEX APX_F 62D4F409F70802000000 ctestns qword ptr [r8], 0x2, dfv14 +XDIS 33e8: APX APXEVEX APX_F 62D47509F7C80200 ctestns r8w, 0x2, dfv14 +XDIS 33f0: APX APXEVEX APX_F 62D4F509F7C802000000 ctestns r8, 0x2, dfv14 +XDIS 33fa: APX APXEVEX APX_F 62D47509F7080200 ctestns word ptr [r8], 0x2, dfv14 +XDIS 3402: APX APXEVEX APX_F 62D4F509F70802000000 ctestns qword ptr [r8], 0x2, dfv14 +XDIS 340c: APX APXEVEX APX_F 6254740584C8 ctestnz r8b, r9b, dfv14 +XDIS 3412: APX APXEVEX APX_F 625474058408 ctestnz byte ptr [r8], r9b, dfv14 +XDIS 3418: APX APXEVEX APX_F 6254740585C8 ctestnz r8d, r9d, dfv14 +XDIS 341e: APX APXEVEX APX_F 6254F40585C8 ctestnz r8, r9, dfv14 +XDIS 3424: APX APXEVEX APX_F 625474058508 ctestnz dword ptr [r8], r9d, dfv14 +XDIS 342a: APX APXEVEX APX_F 6254F4058508 ctestnz qword ptr [r8], r9, dfv14 +XDIS 3430: APX APXEVEX APX_F 6254750585C8 ctestnz r8w, r9w, dfv14 +XDIS 3436: APX APXEVEX APX_F 6254F50585C8 ctestnz r8, r9, dfv14 +XDIS 343c: APX APXEVEX APX_F 625475058508 ctestnz word ptr [r8], r9w, dfv14 +XDIS 3442: APX APXEVEX APX_F 6254F5058508 ctestnz qword ptr [r8], r9, dfv14 +XDIS 3448: APX APXEVEX APX_F 62D47405F6C002 ctestnz r8b, 0x2, dfv14 +XDIS 344f: APX APXEVEX APX_F 62D47405F60002 ctestnz byte ptr [r8], 0x2, dfv14 +XDIS 3456: APX APXEVEX APX_F 62D47405F6C802 ctestnz r8b, 0x2, dfv14 +XDIS 345d: APX APXEVEX APX_F 62D47405F60802 ctestnz byte ptr [r8], 0x2, dfv14 +XDIS 3464: APX APXEVEX APX_F 62D47405F7C002000000 ctestnz r8d, 0x2, dfv14 +XDIS 346e: APX APXEVEX APX_F 62D4F405F7C002000000 ctestnz r8, 0x2, dfv14 +XDIS 3478: APX APXEVEX APX_F 62D47405F70002000000 ctestnz dword ptr [r8], 0x2, dfv14 +XDIS 3482: APX APXEVEX APX_F 62D4F405F70002000000 ctestnz qword ptr [r8], 0x2, dfv14 +XDIS 348c: APX APXEVEX APX_F 62D47505F7C00200 ctestnz r8w, 0x2, dfv14 +XDIS 3494: APX APXEVEX APX_F 62D4F505F7C002000000 ctestnz r8, 0x2, dfv14 +XDIS 349e: APX APXEVEX APX_F 62D47505F7000200 ctestnz word ptr [r8], 0x2, dfv14 +XDIS 34a6: APX APXEVEX APX_F 62D4F505F70002000000 ctestnz qword ptr [r8], 0x2, dfv14 +XDIS 34b0: APX APXEVEX APX_F 62D47405F7C802000000 ctestnz r8d, 0x2, dfv14 +XDIS 34ba: APX APXEVEX APX_F 62D4F405F7C802000000 ctestnz r8, 0x2, dfv14 +XDIS 34c4: APX APXEVEX APX_F 62D47405F70802000000 ctestnz dword ptr [r8], 0x2, dfv14 +XDIS 34ce: APX APXEVEX APX_F 62D4F405F70802000000 ctestnz qword ptr [r8], 0x2, dfv14 +XDIS 34d8: APX APXEVEX APX_F 62D47505F7C80200 ctestnz r8w, 0x2, dfv14 +XDIS 34e0: APX APXEVEX APX_F 62D4F505F7C802000000 ctestnz r8, 0x2, dfv14 +XDIS 34ea: APX APXEVEX APX_F 62D47505F7080200 ctestnz word ptr [r8], 0x2, dfv14 +XDIS 34f2: APX APXEVEX APX_F 62D4F505F70802000000 ctestnz qword ptr [r8], 0x2, dfv14 +XDIS 34fc: APX APXEVEX APX_F 6254740084C8 ctesto r8b, r9b, dfv14 +XDIS 3502: APX APXEVEX APX_F 625474008408 ctesto byte ptr [r8], r9b, dfv14 +XDIS 3508: APX APXEVEX APX_F 6254740085C8 ctesto r8d, r9d, dfv14 +XDIS 350e: APX APXEVEX APX_F 6254F40085C8 ctesto r8, r9, dfv14 +XDIS 3514: APX APXEVEX APX_F 625474008508 ctesto dword ptr [r8], r9d, dfv14 +XDIS 351a: APX APXEVEX APX_F 6254F4008508 ctesto qword ptr [r8], r9, dfv14 +XDIS 3520: APX APXEVEX APX_F 6254750085C8 ctesto r8w, r9w, dfv14 +XDIS 3526: APX APXEVEX APX_F 6254F50085C8 ctesto r8, r9, dfv14 +XDIS 352c: APX APXEVEX APX_F 625475008508 ctesto word ptr [r8], r9w, dfv14 +XDIS 3532: APX APXEVEX APX_F 6254F5008508 ctesto qword ptr [r8], r9, dfv14 +XDIS 3538: APX APXEVEX APX_F 62D47400F6C002 ctesto r8b, 0x2, dfv14 +XDIS 353f: APX APXEVEX APX_F 62D47400F60002 ctesto byte ptr [r8], 0x2, dfv14 +XDIS 3546: APX APXEVEX APX_F 62D47400F6C802 ctesto r8b, 0x2, dfv14 +XDIS 354d: APX APXEVEX APX_F 62D47400F60802 ctesto byte ptr [r8], 0x2, dfv14 +XDIS 3554: APX APXEVEX APX_F 62D47400F7C002000000 ctesto r8d, 0x2, dfv14 +XDIS 355e: APX APXEVEX APX_F 62D4F400F7C002000000 ctesto r8, 0x2, dfv14 +XDIS 3568: APX APXEVEX APX_F 62D47400F70002000000 ctesto dword ptr [r8], 0x2, dfv14 +XDIS 3572: APX APXEVEX APX_F 62D4F400F70002000000 ctesto qword ptr [r8], 0x2, dfv14 +XDIS 357c: APX APXEVEX APX_F 62D47500F7C00200 ctesto r8w, 0x2, dfv14 +XDIS 3584: APX APXEVEX APX_F 62D4F500F7C002000000 ctesto r8, 0x2, dfv14 +XDIS 358e: APX APXEVEX APX_F 62D47500F7000200 ctesto word ptr [r8], 0x2, dfv14 +XDIS 3596: APX APXEVEX APX_F 62D4F500F70002000000 ctesto qword ptr [r8], 0x2, dfv14 +XDIS 35a0: APX APXEVEX APX_F 62D47400F7C802000000 ctesto r8d, 0x2, dfv14 +XDIS 35aa: APX APXEVEX APX_F 62D4F400F7C802000000 ctesto r8, 0x2, dfv14 +XDIS 35b4: APX APXEVEX APX_F 62D47400F70802000000 ctesto dword ptr [r8], 0x2, dfv14 +XDIS 35be: APX APXEVEX APX_F 62D4F400F70802000000 ctesto qword ptr [r8], 0x2, dfv14 +XDIS 35c8: APX APXEVEX APX_F 62D47500F7C80200 ctesto r8w, 0x2, dfv14 +XDIS 35d0: APX APXEVEX APX_F 62D4F500F7C802000000 ctesto r8, 0x2, dfv14 +XDIS 35da: APX APXEVEX APX_F 62D47500F7080200 ctesto word ptr [r8], 0x2, dfv14 +XDIS 35e2: APX APXEVEX APX_F 62D4F500F70802000000 ctesto qword ptr [r8], 0x2, dfv14 +XDIS 35ec: APX APXEVEX APX_F 6254740884C8 ctests r8b, r9b, dfv14 +XDIS 35f2: APX APXEVEX APX_F 625474088408 ctests byte ptr [r8], r9b, dfv14 +XDIS 35f8: APX APXEVEX APX_F 6254740885C8 ctests r8d, r9d, dfv14 +XDIS 35fe: APX APXEVEX APX_F 6254F40885C8 ctests r8, r9, dfv14 +XDIS 3604: APX APXEVEX APX_F 625474088508 ctests dword ptr [r8], r9d, dfv14 +XDIS 360a: APX APXEVEX APX_F 6254F4088508 ctests qword ptr [r8], r9, dfv14 +XDIS 3610: APX APXEVEX APX_F 6254750885C8 ctests r8w, r9w, dfv14 +XDIS 3616: APX APXEVEX APX_F 6254F50885C8 ctests r8, r9, dfv14 +XDIS 361c: APX APXEVEX APX_F 625475088508 ctests word ptr [r8], r9w, dfv14 +XDIS 3622: APX APXEVEX APX_F 6254F5088508 ctests qword ptr [r8], r9, dfv14 +XDIS 3628: APX APXEVEX APX_F 62D47408F6C002 ctests r8b, 0x2, dfv14 +XDIS 362f: APX APXEVEX APX_F 62D47408F60002 ctests byte ptr [r8], 0x2, dfv14 +XDIS 3636: APX APXEVEX APX_F 62D47408F6C802 ctests r8b, 0x2, dfv14 +XDIS 363d: APX APXEVEX APX_F 62D47408F60802 ctests byte ptr [r8], 0x2, dfv14 +XDIS 3644: APX APXEVEX APX_F 62D47408F7C002000000 ctests r8d, 0x2, dfv14 +XDIS 364e: APX APXEVEX APX_F 62D4F408F7C002000000 ctests r8, 0x2, dfv14 +XDIS 3658: APX APXEVEX APX_F 62D47408F70002000000 ctests dword ptr [r8], 0x2, dfv14 +XDIS 3662: APX APXEVEX APX_F 62D4F408F70002000000 ctests qword ptr [r8], 0x2, dfv14 +XDIS 366c: APX APXEVEX APX_F 62D47508F7C00200 ctests r8w, 0x2, dfv14 +XDIS 3674: APX APXEVEX APX_F 62D4F508F7C002000000 ctests r8, 0x2, dfv14 +XDIS 367e: APX APXEVEX APX_F 62D47508F7000200 ctests word ptr [r8], 0x2, dfv14 +XDIS 3686: APX APXEVEX APX_F 62D4F508F70002000000 ctests qword ptr [r8], 0x2, dfv14 +XDIS 3690: APX APXEVEX APX_F 62D47408F7C802000000 ctests r8d, 0x2, dfv14 +XDIS 369a: APX APXEVEX APX_F 62D4F408F7C802000000 ctests r8, 0x2, dfv14 +XDIS 36a4: APX APXEVEX APX_F 62D47408F70802000000 ctests dword ptr [r8], 0x2, dfv14 +XDIS 36ae: APX APXEVEX APX_F 62D4F408F70802000000 ctests qword ptr [r8], 0x2, dfv14 +XDIS 36b8: APX APXEVEX APX_F 62D47508F7C80200 ctests r8w, 0x2, dfv14 +XDIS 36c0: APX APXEVEX APX_F 62D4F508F7C802000000 ctests r8, 0x2, dfv14 +XDIS 36ca: APX APXEVEX APX_F 62D47508F7080200 ctests word ptr [r8], 0x2, dfv14 +XDIS 36d2: APX APXEVEX APX_F 62D4F508F70802000000 ctests qword ptr [r8], 0x2, dfv14 +XDIS 36dc: APX APXEVEX APX_F 6254740A84C8 ctestt r8b, r9b, dfv14 +XDIS 36e2: APX APXEVEX APX_F 6254740A8408 ctestt byte ptr [r8], r9b, dfv14 +XDIS 36e8: APX APXEVEX APX_F 6254740A85C8 ctestt r8d, r9d, dfv14 +XDIS 36ee: APX APXEVEX APX_F 6254F40A85C8 ctestt r8, r9, dfv14 +XDIS 36f4: APX APXEVEX APX_F 6254740A8508 ctestt dword ptr [r8], r9d, dfv14 +XDIS 36fa: APX APXEVEX APX_F 6254F40A8508 ctestt qword ptr [r8], r9, dfv14 +XDIS 3700: APX APXEVEX APX_F 6254750A85C8 ctestt r8w, r9w, dfv14 +XDIS 3706: APX APXEVEX APX_F 6254F50A85C8 ctestt r8, r9, dfv14 +XDIS 370c: APX APXEVEX APX_F 6254750A8508 ctestt word ptr [r8], r9w, dfv14 +XDIS 3712: APX APXEVEX APX_F 6254F50A8508 ctestt qword ptr [r8], r9, dfv14 +XDIS 3718: APX APXEVEX APX_F 62D4740AF6C002 ctestt r8b, 0x2, dfv14 +XDIS 371f: APX APXEVEX APX_F 62D4740AF60002 ctestt byte ptr [r8], 0x2, dfv14 +XDIS 3726: APX APXEVEX APX_F 62D4740AF6C802 ctestt r8b, 0x2, dfv14 +XDIS 372d: APX APXEVEX APX_F 62D4740AF60802 ctestt byte ptr [r8], 0x2, dfv14 +XDIS 3734: APX APXEVEX APX_F 62D4740AF7C002000000 ctestt r8d, 0x2, dfv14 +XDIS 373e: APX APXEVEX APX_F 62D4F40AF7C002000000 ctestt r8, 0x2, dfv14 +XDIS 3748: APX APXEVEX APX_F 62D4740AF70002000000 ctestt dword ptr [r8], 0x2, dfv14 +XDIS 3752: APX APXEVEX APX_F 62D4F40AF70002000000 ctestt qword ptr [r8], 0x2, dfv14 +XDIS 375c: APX APXEVEX APX_F 62D4750AF7C00200 ctestt r8w, 0x2, dfv14 +XDIS 3764: APX APXEVEX APX_F 62D4F50AF7C002000000 ctestt r8, 0x2, dfv14 +XDIS 376e: APX APXEVEX APX_F 62D4750AF7000200 ctestt word ptr [r8], 0x2, dfv14 +XDIS 3776: APX APXEVEX APX_F 62D4F50AF70002000000 ctestt qword ptr [r8], 0x2, dfv14 +XDIS 3780: APX APXEVEX APX_F 62D4740AF7C802000000 ctestt r8d, 0x2, dfv14 +XDIS 378a: APX APXEVEX APX_F 62D4F40AF7C802000000 ctestt r8, 0x2, dfv14 +XDIS 3794: APX APXEVEX APX_F 62D4740AF70802000000 ctestt dword ptr [r8], 0x2, dfv14 +XDIS 379e: APX APXEVEX APX_F 62D4F40AF70802000000 ctestt qword ptr [r8], 0x2, dfv14 +XDIS 37a8: APX APXEVEX APX_F 62D4750AF7C80200 ctestt r8w, 0x2, dfv14 +XDIS 37b0: APX APXEVEX APX_F 62D4F50AF7C802000000 ctestt r8, 0x2, dfv14 +XDIS 37ba: APX APXEVEX APX_F 62D4750AF7080200 ctestt word ptr [r8], 0x2, dfv14 +XDIS 37c2: APX APXEVEX APX_F 62D4F50AF70802000000 ctestt qword ptr [r8], 0x2, dfv14 +XDIS 37cc: APX APXEVEX APX_F 6254740484C8 ctestz r8b, r9b, dfv14 +XDIS 37d2: APX APXEVEX APX_F 625474048408 ctestz byte ptr [r8], r9b, dfv14 +XDIS 37d8: APX APXEVEX APX_F 6254740485C8 ctestz r8d, r9d, dfv14 +XDIS 37de: APX APXEVEX APX_F 6254F40485C8 ctestz r8, r9, dfv14 +XDIS 37e4: APX APXEVEX APX_F 625474048508 ctestz dword ptr [r8], r9d, dfv14 +XDIS 37ea: APX APXEVEX APX_F 6254F4048508 ctestz qword ptr [r8], r9, dfv14 +XDIS 37f0: APX APXEVEX APX_F 6254750485C8 ctestz r8w, r9w, dfv14 +XDIS 37f6: APX APXEVEX APX_F 6254F50485C8 ctestz r8, r9, dfv14 +XDIS 37fc: APX APXEVEX APX_F 625475048508 ctestz word ptr [r8], r9w, dfv14 +XDIS 3802: APX APXEVEX APX_F 6254F5048508 ctestz qword ptr [r8], r9, dfv14 +XDIS 3808: APX APXEVEX APX_F 62D47404F6C002 ctestz r8b, 0x2, dfv14 +XDIS 380f: APX APXEVEX APX_F 62D47404F60002 ctestz byte ptr [r8], 0x2, dfv14 +XDIS 3816: APX APXEVEX APX_F 62D47404F6C802 ctestz r8b, 0x2, dfv14 +XDIS 381d: APX APXEVEX APX_F 62D47404F60802 ctestz byte ptr [r8], 0x2, dfv14 +XDIS 3824: APX APXEVEX APX_F 62D47404F7C002000000 ctestz r8d, 0x2, dfv14 +XDIS 382e: APX APXEVEX APX_F 62D4F404F7C002000000 ctestz r8, 0x2, dfv14 +XDIS 3838: APX APXEVEX APX_F 62D47404F70002000000 ctestz dword ptr [r8], 0x2, dfv14 +XDIS 3842: APX APXEVEX APX_F 62D4F404F70002000000 ctestz qword ptr [r8], 0x2, dfv14 +XDIS 384c: APX APXEVEX APX_F 62D47504F7C00200 ctestz r8w, 0x2, dfv14 +XDIS 3854: APX APXEVEX APX_F 62D4F504F7C002000000 ctestz r8, 0x2, dfv14 +XDIS 385e: APX APXEVEX APX_F 62D47504F7000200 ctestz word ptr [r8], 0x2, dfv14 +XDIS 3866: APX APXEVEX APX_F 62D4F504F70002000000 ctestz qword ptr [r8], 0x2, dfv14 +XDIS 3870: APX APXEVEX APX_F 62D47404F7C802000000 ctestz r8d, 0x2, dfv14 +XDIS 387a: APX APXEVEX APX_F 62D4F404F7C802000000 ctestz r8, 0x2, dfv14 +XDIS 3884: APX APXEVEX APX_F 62D47404F70802000000 ctestz dword ptr [r8], 0x2, dfv14 +XDIS 388e: APX APXEVEX APX_F 62D4F404F70802000000 ctestz qword ptr [r8], 0x2, dfv14 +XDIS 3898: APX APXEVEX APX_F 62D47504F7C80200 ctestz r8w, 0x2, dfv14 +XDIS 38a0: APX APXEVEX APX_F 62D4F504F7C802000000 ctestz r8, 0x2, dfv14 +XDIS 38aa: APX APXEVEX APX_F 62D47504F7080200 ctestz word ptr [r8], 0x2, dfv14 +XDIS 38b2: APX APXEVEX APX_F 62D4F504F70802000000 ctestz qword ptr [r8], 0x2, dfv14 +XDIS 38bc: BINARY APXEVEX APX_F 62D47C08FEC8 dec r8b +XDIS 38c2: BINARY APXEVEX APX_F 62D47C08FE08 dec byte ptr [r8] +XDIS 38c8: BINARY APXEVEX APX_F 62D47C0CFEC8 dec r8b +XDIS 38ce: BINARY APXEVEX APX_F 62D47C0CFE08 dec byte ptr [r8] +XDIS 38d4: BINARY APXEVEX APX_F 62D43C18FEC9 dec r8b, r9b +XDIS 38da: BINARY APXEVEX APX_F 62D43C18FE09 dec r8b, byte ptr [r9] +XDIS 38e0: BINARY APXEVEX APX_F 62D43C1CFEC9 dec r8b, r9b +XDIS 38e6: BINARY APXEVEX APX_F 62D43C1CFE09 dec r8b, byte ptr [r9] +XDIS 38ec: BINARY APXEVEX APX_F 62D47C08FFC8 dec r8d +XDIS 38f2: BINARY APXEVEX APX_F 62D4FC08FFC8 dec r8 +XDIS 38f8: BINARY APXEVEX APX_F 62D47C08FF08 dec dword ptr [r8] +XDIS 38fe: BINARY APXEVEX APX_F 62D4FC08FF08 dec qword ptr [r8] +XDIS 3904: BINARY APXEVEX APX_F 62D47C0CFFC8 dec r8d +XDIS 390a: BINARY APXEVEX APX_F 62D4FC0CFFC8 dec r8 +XDIS 3910: BINARY APXEVEX APX_F 62D47C0CFF08 dec dword ptr [r8] +XDIS 3916: BINARY APXEVEX APX_F 62D4FC0CFF08 dec qword ptr [r8] +XDIS 391c: BINARY APXEVEX APX_F 62D47D08FFC8 dec r8w +XDIS 3922: BINARY APXEVEX APX_F 62D4FD08FFC8 dec r8 +XDIS 3928: BINARY APXEVEX APX_F 62D47D08FF08 dec word ptr [r8] +XDIS 392e: BINARY APXEVEX APX_F 62D4FD08FF08 dec qword ptr [r8] +XDIS 3934: BINARY APXEVEX APX_F 62D47D0CFFC8 dec r8w +XDIS 393a: BINARY APXEVEX APX_F 62D4FD0CFFC8 dec r8 +XDIS 3940: BINARY APXEVEX APX_F 62D47D0CFF08 dec word ptr [r8] +XDIS 3946: BINARY APXEVEX APX_F 62D4FD0CFF08 dec qword ptr [r8] +XDIS 394c: BINARY APXEVEX APX_F 62D43C18FFC9 dec r8d, r9d +XDIS 3952: BINARY APXEVEX APX_F 62D4BC18FFC9 dec r8, r9 +XDIS 3958: BINARY APXEVEX APX_F 62D43C18FF09 dec r8d, dword ptr [r9] +XDIS 395e: BINARY APXEVEX APX_F 62D4BC18FF09 dec r8, qword ptr [r9] +XDIS 3964: BINARY APXEVEX APX_F 62D43C1CFFC9 dec r8d, r9d +XDIS 396a: BINARY APXEVEX APX_F 62D4BC1CFFC9 dec r8, r9 +XDIS 3970: BINARY APXEVEX APX_F 62D43C1CFF09 dec r8d, dword ptr [r9] +XDIS 3976: BINARY APXEVEX APX_F 62D4BC1CFF09 dec r8, qword ptr [r9] +XDIS 397c: BINARY APXEVEX APX_F 62D43D18FFC9 dec r8w, r9w +XDIS 3982: BINARY APXEVEX APX_F 62D4BD18FFC9 dec r8, r9 +XDIS 3988: BINARY APXEVEX APX_F 62D43D18FF09 dec r8w, word ptr [r9] +XDIS 398e: BINARY APXEVEX APX_F 62D4BD18FF09 dec r8, qword ptr [r9] +XDIS 3994: BINARY APXEVEX APX_F 62D43D1CFFC9 dec r8w, r9w +XDIS 399a: BINARY APXEVEX APX_F 62D4BD1CFFC9 dec r8, r9 +XDIS 39a0: BINARY APXEVEX APX_F 62D43D1CFF09 dec r8w, word ptr [r9] +XDIS 39a6: BINARY APXEVEX APX_F 62D4BD1CFF09 dec r8, qword ptr [r9] +XDIS 39ac: BINARY APXEVEX APX_F 62D47C08F6F0 div r8b +XDIS 39b2: BINARY APXEVEX APX_F 62D47C08F630 div byte ptr [r8] +XDIS 39b8: BINARY APXEVEX APX_F 62D47C0CF6F0 div r8b +XDIS 39be: BINARY APXEVEX APX_F 62D47C0CF630 div byte ptr [r8] +XDIS 39c4: BINARY APXEVEX APX_F 62D47C08F7F0 div r8d +XDIS 39ca: BINARY APXEVEX APX_F 62D4FC08F7F0 div r8 +XDIS 39d0: BINARY APXEVEX APX_F 62D47C08F730 div dword ptr [r8] +XDIS 39d6: BINARY APXEVEX APX_F 62D4FC08F730 div qword ptr [r8] +XDIS 39dc: BINARY APXEVEX APX_F 62D47C0CF7F0 div r8d +XDIS 39e2: BINARY APXEVEX APX_F 62D4FC0CF7F0 div r8 +XDIS 39e8: BINARY APXEVEX APX_F 62D47C0CF730 div dword ptr [r8] +XDIS 39ee: BINARY APXEVEX APX_F 62D4FC0CF730 div qword ptr [r8] +XDIS 39f4: BINARY APXEVEX APX_F 62D47D08F7F0 div r8w +XDIS 39fa: BINARY APXEVEX APX_F 62D4FD08F7F0 div r8 +XDIS 3a00: BINARY APXEVEX APX_F 62D47D08F730 div word ptr [r8] +XDIS 3a06: BINARY APXEVEX APX_F 62D4FD08F730 div qword ptr [r8] +XDIS 3a0c: BINARY APXEVEX APX_F 62D47D0CF7F0 div r8w +XDIS 3a12: BINARY APXEVEX APX_F 62D4FD0CF7F0 div r8 +XDIS 3a18: BINARY APXEVEX APX_F 62D47D0CF730 div word ptr [r8] +XDIS 3a1e: BINARY APXEVEX APX_F 62D4FD0CF730 div qword ptr [r8] +XDIS 3a24: KEYLOCKER APXEVEX APX_F 62547E08DAC1 encodekey128 r8d, r9d +XDIS 3a2a: KEYLOCKER APXEVEX APX_F 62547E08DBC1 encodekey256 r8d, r9d +XDIS 3a30: APX APXEVEX APX_F 6762547F08F801 enqcmd r8d, zmmword ptr [r9d] +XDIS 3a37: APX APXEVEX APX_F 6254FF08F801 enqcmd r8, zmmword ptr [r9] +XDIS 3a3d: APX APXEVEX APX_F 6762547E08F801 enqcmds r8d, zmmword ptr [r9d] +XDIS 3a44: APX APXEVEX APX_F 6254FE08F801 enqcmds r8, zmmword ptr [r9] +XDIS 3a4a: BINARY APXEVEX APX_F 62D47C08F6F8 idiv r8b +XDIS 3a50: BINARY APXEVEX APX_F 62D47C08F638 idiv byte ptr [r8] +XDIS 3a56: BINARY APXEVEX APX_F 62D47C0CF6F8 idiv r8b +XDIS 3a5c: BINARY APXEVEX APX_F 62D47C0CF638 idiv byte ptr [r8] +XDIS 3a62: BINARY APXEVEX APX_F 62D47C08F7F8 idiv r8d +XDIS 3a68: BINARY APXEVEX APX_F 62D4FC08F7F8 idiv r8 +XDIS 3a6e: BINARY APXEVEX APX_F 62D47C08F738 idiv dword ptr [r8] +XDIS 3a74: BINARY APXEVEX APX_F 62D4FC08F738 idiv qword ptr [r8] +XDIS 3a7a: BINARY APXEVEX APX_F 62D47C0CF7F8 idiv r8d +XDIS 3a80: BINARY APXEVEX APX_F 62D4FC0CF7F8 idiv r8 +XDIS 3a86: BINARY APXEVEX APX_F 62D47C0CF738 idiv dword ptr [r8] +XDIS 3a8c: BINARY APXEVEX APX_F 62D4FC0CF738 idiv qword ptr [r8] +XDIS 3a92: BINARY APXEVEX APX_F 62D47D08F7F8 idiv r8w +XDIS 3a98: BINARY APXEVEX APX_F 62D4FD08F7F8 idiv r8 +XDIS 3a9e: BINARY APXEVEX APX_F 62D47D08F738 idiv word ptr [r8] +XDIS 3aa4: BINARY APXEVEX APX_F 62D4FD08F738 idiv qword ptr [r8] +XDIS 3aaa: BINARY APXEVEX APX_F 62D47D0CF7F8 idiv r8w +XDIS 3ab0: BINARY APXEVEX APX_F 62D4FD0CF7F8 idiv r8 +XDIS 3ab6: BINARY APXEVEX APX_F 62D47D0CF738 idiv word ptr [r8] +XDIS 3abc: BINARY APXEVEX APX_F 62D4FD0CF738 idiv qword ptr [r8] +XDIS 3ac2: BINARY APXEVEX APX_F 62547C0869C102000000 imul r8d, r9d, 0x2 +XDIS 3acc: BINARY APXEVEX APX_F 62547C1869C102000000 imul r8d, r9d, 0x2 +XDIS 3ad6: BINARY APXEVEX APX_F 6254FC0869C102000000 imul r8, r9, 0x2 +XDIS 3ae0: BINARY APXEVEX APX_F 6254FC1869C102000000 imul r8, r9, 0x2 +XDIS 3aea: BINARY APXEVEX APX_F 62547C08690102000000 imul r8d, dword ptr [r9], 0x2 +XDIS 3af4: BINARY APXEVEX APX_F 62547C18690102000000 imul r8d, dword ptr [r9], 0x2 +XDIS 3afe: BINARY APXEVEX APX_F 6254FC08690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3b08: BINARY APXEVEX APX_F 6254FC18690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3b12: BINARY APXEVEX APX_F 62547C0C69C102000000 imul r8d, r9d, 0x2 +XDIS 3b1c: BINARY APXEVEX APX_F 62547C1C69C102000000 imul r8d, r9d, 0x2 +XDIS 3b26: BINARY APXEVEX APX_F 6254FC0C69C102000000 imul r8, r9, 0x2 +XDIS 3b30: BINARY APXEVEX APX_F 6254FC1C69C102000000 imul r8, r9, 0x2 +XDIS 3b3a: BINARY APXEVEX APX_F 62547C0C690102000000 imul r8d, dword ptr [r9], 0x2 +XDIS 3b44: BINARY APXEVEX APX_F 62547C1C690102000000 imul r8d, dword ptr [r9], 0x2 +XDIS 3b4e: BINARY APXEVEX APX_F 6254FC0C690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3b58: BINARY APXEVEX APX_F 6254FC1C690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3b62: BINARY APXEVEX APX_F 62D47C08F7E8 imul r8d +XDIS 3b68: BINARY APXEVEX APX_F 62D4FC08F7E8 imul r8 +XDIS 3b6e: BINARY APXEVEX APX_F 62D47C08F728 imul dword ptr [r8] +XDIS 3b74: BINARY APXEVEX APX_F 62D4FC08F728 imul qword ptr [r8] +XDIS 3b7a: BINARY APXEVEX APX_F 62D47C0CF7E8 imul r8d +XDIS 3b80: BINARY APXEVEX APX_F 62D4FC0CF7E8 imul r8 +XDIS 3b86: BINARY APXEVEX APX_F 62D47C0CF728 imul dword ptr [r8] +XDIS 3b8c: BINARY APXEVEX APX_F 62D4FC0CF728 imul qword ptr [r8] +XDIS 3b92: BINARY APXEVEX APX_F 62D47D08F7E8 imul r8w +XDIS 3b98: BINARY APXEVEX APX_F 62D4FD08F7E8 imul r8 +XDIS 3b9e: BINARY APXEVEX APX_F 62D47D08F728 imul word ptr [r8] +XDIS 3ba4: BINARY APXEVEX APX_F 62D4FD08F728 imul qword ptr [r8] +XDIS 3baa: BINARY APXEVEX APX_F 62D47D0CF7E8 imul r8w +XDIS 3bb0: BINARY APXEVEX APX_F 62D4FD0CF7E8 imul r8 +XDIS 3bb6: BINARY APXEVEX APX_F 62D47D0CF728 imul word ptr [r8] +XDIS 3bbc: BINARY APXEVEX APX_F 62D4FD0CF728 imul qword ptr [r8] +XDIS 3bc2: BINARY APXEVEX APX_F 62547D0869C10200 imul r8w, r9w, 0x2 +XDIS 3bca: BINARY APXEVEX APX_F 62547D1869C10200 imul r8w, r9w, 0x2 +XDIS 3bd2: BINARY APXEVEX APX_F 6254FD0869C102000000 imul r8, r9, 0x2 +XDIS 3bdc: BINARY APXEVEX APX_F 6254FD1869C102000000 imul r8, r9, 0x2 +XDIS 3be6: BINARY APXEVEX APX_F 62547D0869010200 imul r8w, word ptr [r9], 0x2 +XDIS 3bee: BINARY APXEVEX APX_F 62547D1869010200 imul r8w, word ptr [r9], 0x2 +XDIS 3bf6: BINARY APXEVEX APX_F 6254FD08690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3c00: BINARY APXEVEX APX_F 6254FD18690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3c0a: BINARY APXEVEX APX_F 62547D0C69C10200 imul r8w, r9w, 0x2 +XDIS 3c12: BINARY APXEVEX APX_F 62547D1C69C10200 imul r8w, r9w, 0x2 +XDIS 3c1a: BINARY APXEVEX APX_F 6254FD0C69C102000000 imul r8, r9, 0x2 +XDIS 3c24: BINARY APXEVEX APX_F 6254FD1C69C102000000 imul r8, r9, 0x2 +XDIS 3c2e: BINARY APXEVEX APX_F 62547D0C69010200 imul r8w, word ptr [r9], 0x2 +XDIS 3c36: BINARY APXEVEX APX_F 62547D1C69010200 imul r8w, word ptr [r9], 0x2 +XDIS 3c3e: BINARY APXEVEX APX_F 6254FD0C690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3c48: BINARY APXEVEX APX_F 6254FD1C690102000000 imul r8, qword ptr [r9], 0x2 +XDIS 3c52: BINARY APXEVEX APX_F 62547C086BC102 imul r8d, r9d, 0x2 +XDIS 3c59: BINARY APXEVEX APX_F 62547C186BC102 imul r8d, r9d, 0x2 +XDIS 3c60: BINARY APXEVEX APX_F 6254FC086BC102 imul r8, r9, 0x2 +XDIS 3c67: BINARY APXEVEX APX_F 6254FC186BC102 imul r8, r9, 0x2 +XDIS 3c6e: BINARY APXEVEX APX_F 62547C086B0102 imul r8d, dword ptr [r9], 0x2 +XDIS 3c75: BINARY APXEVEX APX_F 62547C186B0102 imul r8d, dword ptr [r9], 0x2 +XDIS 3c7c: BINARY APXEVEX APX_F 6254FC086B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3c83: BINARY APXEVEX APX_F 6254FC186B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3c8a: BINARY APXEVEX APX_F 62547C0C6BC102 imul r8d, r9d, 0x2 +XDIS 3c91: BINARY APXEVEX APX_F 62547C1C6BC102 imul r8d, r9d, 0x2 +XDIS 3c98: BINARY APXEVEX APX_F 6254FC0C6BC102 imul r8, r9, 0x2 +XDIS 3c9f: BINARY APXEVEX APX_F 6254FC1C6BC102 imul r8, r9, 0x2 +XDIS 3ca6: BINARY APXEVEX APX_F 62547C0C6B0102 imul r8d, dword ptr [r9], 0x2 +XDIS 3cad: BINARY APXEVEX APX_F 62547C1C6B0102 imul r8d, dword ptr [r9], 0x2 +XDIS 3cb4: BINARY APXEVEX APX_F 6254FC0C6B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3cbb: BINARY APXEVEX APX_F 6254FC1C6B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3cc2: BINARY APXEVEX APX_F 62547D086BC102 imul r8w, r9w, 0x2 +XDIS 3cc9: BINARY APXEVEX APX_F 62547D186BC102 imul r8w, r9w, 0x2 +XDIS 3cd0: BINARY APXEVEX APX_F 6254FD086BC102 imul r8, r9, 0x2 +XDIS 3cd7: BINARY APXEVEX APX_F 6254FD186BC102 imul r8, r9, 0x2 +XDIS 3cde: BINARY APXEVEX APX_F 62547D086B0102 imul r8w, word ptr [r9], 0x2 +XDIS 3ce5: BINARY APXEVEX APX_F 62547D186B0102 imul r8w, word ptr [r9], 0x2 +XDIS 3cec: BINARY APXEVEX APX_F 6254FD086B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3cf3: BINARY APXEVEX APX_F 6254FD186B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3cfa: BINARY APXEVEX APX_F 62547D0C6BC102 imul r8w, r9w, 0x2 +XDIS 3d01: BINARY APXEVEX APX_F 62547D1C6BC102 imul r8w, r9w, 0x2 +XDIS 3d08: BINARY APXEVEX APX_F 6254FD0C6BC102 imul r8, r9, 0x2 +XDIS 3d0f: BINARY APXEVEX APX_F 6254FD1C6BC102 imul r8, r9, 0x2 +XDIS 3d16: BINARY APXEVEX APX_F 62547D0C6B0102 imul r8w, word ptr [r9], 0x2 +XDIS 3d1d: BINARY APXEVEX APX_F 62547D1C6B0102 imul r8w, word ptr [r9], 0x2 +XDIS 3d24: BINARY APXEVEX APX_F 6254FD0C6B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3d2b: BINARY APXEVEX APX_F 6254FD1C6B0102 imul r8, qword ptr [r9], 0x2 +XDIS 3d32: BINARY APXEVEX APX_F 62547C08AFC1 imul r8d, r9d +XDIS 3d38: BINARY APXEVEX APX_F 6254FC08AFC1 imul r8, r9 +XDIS 3d3e: BINARY APXEVEX APX_F 62547C08AF01 imul r8d, dword ptr [r9] +XDIS 3d44: BINARY APXEVEX APX_F 6254FC08AF01 imul r8, qword ptr [r9] +XDIS 3d4a: BINARY APXEVEX APX_F 62547C0CAFC1 imul r8d, r9d +XDIS 3d50: BINARY APXEVEX APX_F 6254FC0CAFC1 imul r8, r9 +XDIS 3d56: BINARY APXEVEX APX_F 62547C0CAF01 imul r8d, dword ptr [r9] +XDIS 3d5c: BINARY APXEVEX APX_F 6254FC0CAF01 imul r8, qword ptr [r9] +XDIS 3d62: BINARY APXEVEX APX_F 62547D08AFC1 imul r8w, r9w +XDIS 3d68: BINARY APXEVEX APX_F 6254FD08AFC1 imul r8, r9 +XDIS 3d6e: BINARY APXEVEX APX_F 62547D08AF01 imul r8w, word ptr [r9] +XDIS 3d74: BINARY APXEVEX APX_F 6254FD08AF01 imul r8, qword ptr [r9] +XDIS 3d7a: BINARY APXEVEX APX_F 62547D0CAFC1 imul r8w, r9w +XDIS 3d80: BINARY APXEVEX APX_F 6254FD0CAFC1 imul r8, r9 +XDIS 3d86: BINARY APXEVEX APX_F 62547D0CAF01 imul r8w, word ptr [r9] +XDIS 3d8c: BINARY APXEVEX APX_F 6254FD0CAF01 imul r8, qword ptr [r9] +XDIS 3d92: BINARY APXEVEX APX_F 62543C18AFCA imul r8d, r9d, r10d +XDIS 3d98: BINARY APXEVEX APX_F 6254BC18AFCA imul r8, r9, r10 +XDIS 3d9e: BINARY APXEVEX APX_F 62543C18AF0A imul r8d, r9d, dword ptr [r10] +XDIS 3da4: BINARY APXEVEX APX_F 6254BC18AF0A imul r8, r9, qword ptr [r10] +XDIS 3daa: BINARY APXEVEX APX_F 62543C1CAFCA imul r8d, r9d, r10d +XDIS 3db0: BINARY APXEVEX APX_F 6254BC1CAFCA imul r8, r9, r10 +XDIS 3db6: BINARY APXEVEX APX_F 62543C1CAF0A imul r8d, r9d, dword ptr [r10] +XDIS 3dbc: BINARY APXEVEX APX_F 6254BC1CAF0A imul r8, r9, qword ptr [r10] +XDIS 3dc2: BINARY APXEVEX APX_F 62543D18AFCA imul r8w, r9w, r10w +XDIS 3dc8: BINARY APXEVEX APX_F 6254BD18AFCA imul r8, r9, r10 +XDIS 3dce: BINARY APXEVEX APX_F 62543D18AF0A imul r8w, r9w, word ptr [r10] +XDIS 3dd4: BINARY APXEVEX APX_F 6254BD18AF0A imul r8, r9, qword ptr [r10] +XDIS 3dda: BINARY APXEVEX APX_F 62543D1CAFCA imul r8w, r9w, r10w +XDIS 3de0: BINARY APXEVEX APX_F 6254BD1CAFCA imul r8, r9, r10 +XDIS 3de6: BINARY APXEVEX APX_F 62543D1CAF0A imul r8w, r9w, word ptr [r10] +XDIS 3dec: BINARY APXEVEX APX_F 6254BD1CAF0A imul r8, r9, qword ptr [r10] +XDIS 3df2: BINARY APXEVEX APX_F 62D47C08F6E8 imul r8b +XDIS 3df8: BINARY APXEVEX APX_F 62D47C08F628 imul byte ptr [r8] +XDIS 3dfe: BINARY APXEVEX APX_F 62D47C0CF6E8 imul r8b +XDIS 3e04: BINARY APXEVEX APX_F 62D47C0CF628 imul byte ptr [r8] +XDIS 3e0a: BINARY APXEVEX APX_F 62D47C08FEC0 inc r8b +XDIS 3e10: BINARY APXEVEX APX_F 62D47C08FE00 inc byte ptr [r8] +XDIS 3e16: BINARY APXEVEX APX_F 62D47C0CFEC0 inc r8b +XDIS 3e1c: BINARY APXEVEX APX_F 62D47C0CFE00 inc byte ptr [r8] +XDIS 3e22: BINARY APXEVEX APX_F 62D43C18FEC1 inc r8b, r9b +XDIS 3e28: BINARY APXEVEX APX_F 62D43C18FE01 inc r8b, byte ptr [r9] +XDIS 3e2e: BINARY APXEVEX APX_F 62D43C1CFEC1 inc r8b, r9b +XDIS 3e34: BINARY APXEVEX APX_F 62D43C1CFE01 inc r8b, byte ptr [r9] +XDIS 3e3a: BINARY APXEVEX APX_F 62D47C08FFC0 inc r8d +XDIS 3e40: BINARY APXEVEX APX_F 62D4FC08FFC0 inc r8 +XDIS 3e46: BINARY APXEVEX APX_F 62D47C08FF00 inc dword ptr [r8] +XDIS 3e4c: BINARY APXEVEX APX_F 62D4FC08FF00 inc qword ptr [r8] +XDIS 3e52: BINARY APXEVEX APX_F 62D47C0CFFC0 inc r8d +XDIS 3e58: BINARY APXEVEX APX_F 62D4FC0CFFC0 inc r8 +XDIS 3e5e: BINARY APXEVEX APX_F 62D47C0CFF00 inc dword ptr [r8] +XDIS 3e64: BINARY APXEVEX APX_F 62D4FC0CFF00 inc qword ptr [r8] +XDIS 3e6a: BINARY APXEVEX APX_F 62D47D08FFC0 inc r8w +XDIS 3e70: BINARY APXEVEX APX_F 62D4FD08FFC0 inc r8 +XDIS 3e76: BINARY APXEVEX APX_F 62D47D08FF00 inc word ptr [r8] +XDIS 3e7c: BINARY APXEVEX APX_F 62D4FD08FF00 inc qword ptr [r8] +XDIS 3e82: BINARY APXEVEX APX_F 62D47D0CFFC0 inc r8w +XDIS 3e88: BINARY APXEVEX APX_F 62D4FD0CFFC0 inc r8 +XDIS 3e8e: BINARY APXEVEX APX_F 62D47D0CFF00 inc word ptr [r8] +XDIS 3e94: BINARY APXEVEX APX_F 62D4FD0CFF00 inc qword ptr [r8] +XDIS 3e9a: BINARY APXEVEX APX_F 62D43C18FFC1 inc r8d, r9d +XDIS 3ea0: BINARY APXEVEX APX_F 62D4BC18FFC1 inc r8, r9 +XDIS 3ea6: BINARY APXEVEX APX_F 62D43C18FF01 inc r8d, dword ptr [r9] +XDIS 3eac: BINARY APXEVEX APX_F 62D4BC18FF01 inc r8, qword ptr [r9] +XDIS 3eb2: BINARY APXEVEX APX_F 62D43C1CFFC1 inc r8d, r9d +XDIS 3eb8: BINARY APXEVEX APX_F 62D4BC1CFFC1 inc r8, r9 +XDIS 3ebe: BINARY APXEVEX APX_F 62D43C1CFF01 inc r8d, dword ptr [r9] +XDIS 3ec4: BINARY APXEVEX APX_F 62D4BC1CFF01 inc r8, qword ptr [r9] +XDIS 3eca: BINARY APXEVEX APX_F 62D43D18FFC1 inc r8w, r9w +XDIS 3ed0: BINARY APXEVEX APX_F 62D4BD18FFC1 inc r8, r9 +XDIS 3ed6: BINARY APXEVEX APX_F 62D43D18FF01 inc r8w, word ptr [r9] +XDIS 3edc: BINARY APXEVEX APX_F 62D4BD18FF01 inc r8, qword ptr [r9] +XDIS 3ee2: BINARY APXEVEX APX_F 62D43D1CFFC1 inc r8w, r9w +XDIS 3ee8: BINARY APXEVEX APX_F 62D4BD1CFFC1 inc r8, r9 +XDIS 3eee: BINARY APXEVEX APX_F 62D43D1CFF01 inc r8w, word ptr [r9] +XDIS 3ef4: BINARY APXEVEX APX_F 62D4BD1CFF01 inc r8, qword ptr [r9] +XDIS 3efa: VTX APXEVEX APX_F 6254FE08F001 invept r8, xmmword ptr [r9] +XDIS 3f00: MISC APXEVEX APX_F 6254FE08F201 invpcid r8, xmmword ptr [r9] +XDIS 3f06: VTX APXEVEX APX_F 6254FE08F101 invvpid r8, xmmword ptr [r9] +XDIS 3f0c: KMASK APXEVEX APX_F_KOPB 62F17D0890C9 kmovb k1, k1 +XDIS 3f12: KMASK APXEVEX APX_F_KOPB 62D17D089009 kmovb k1, byte ptr [r9] +XDIS 3f18: KMASK APXEVEX APX_F_KOPB 62D17D0892C9 kmovb k1, r9d +XDIS 3f1e: KMASK APXEVEX APX_F_KOPB 62717D0893C1 kmovb r8d, k1 +XDIS 3f24: KMASK APXEVEX APX_F_KOPB 62D17D089108 kmovb byte ptr [r8], k1 +XDIS 3f2a: KMASK APXEVEX APX_F_KOPD 62717F0893C1 kmovd r8d, k1 +XDIS 3f30: KMASK APXEVEX APX_F_KOPD 62D1FD089108 kmovd dword ptr [r8], k1 +XDIS 3f36: KMASK APXEVEX APX_F_KOPD 62F1FD0890C9 kmovd k1, k1 +XDIS 3f3c: KMASK APXEVEX APX_F_KOPD 62D1FD089009 kmovd k1, dword ptr [r9] +XDIS 3f42: KMASK APXEVEX APX_F_KOPD 62D17F0892C9 kmovd k1, r9d +XDIS 3f48: KMASK APXEVEX APX_F_KOPQ 62F1FC0890C9 kmovq k1, k1 +XDIS 3f4e: KMASK APXEVEX APX_F_KOPQ 62D1FC089009 kmovq k1, qword ptr [r9] +XDIS 3f54: KMASK APXEVEX APX_F_KOPQ 62D1FF0892C9 kmovq k1, r9 +XDIS 3f5a: KMASK APXEVEX APX_F_KOPQ 6271FF0893C1 kmovq r8, k1 +XDIS 3f60: KMASK APXEVEX APX_F_KOPQ 62D1FC089108 kmovq qword ptr [r8], k1 +XDIS 3f66: KMASK APXEVEX APX_F_KOPW 62F17C0890C9 kmovw k1, k1 +XDIS 3f6c: KMASK APXEVEX APX_F_KOPW 62D17C089009 kmovw k1, word ptr [r9] +XDIS 3f72: KMASK APXEVEX APX_F_KOPW 62D17C0892C9 kmovw k1, r9d +XDIS 3f78: KMASK APXEVEX APX_F_KOPW 62717C0893C1 kmovw r8d, k1 +XDIS 3f7e: KMASK APXEVEX APX_F_KOPW 62D17C089108 kmovw word ptr [r8], k1 +XDIS 3f84: LZCNT APXEVEX APX_F 62547C08F5C1 lzcnt r8d, r9d +XDIS 3f8a: LZCNT APXEVEX APX_F 6254FC08F5C1 lzcnt r8, r9 +XDIS 3f90: LZCNT APXEVEX APX_F 62547C08F501 lzcnt r8d, dword ptr [r9] +XDIS 3f96: LZCNT APXEVEX APX_F 6254FC08F501 lzcnt r8, qword ptr [r9] +XDIS 3f9c: LZCNT APXEVEX APX_F 62547C0CF5C1 lzcnt r8d, r9d +XDIS 3fa2: LZCNT APXEVEX APX_F 6254FC0CF5C1 lzcnt r8, r9 +XDIS 3fa8: LZCNT APXEVEX APX_F 62547C0CF501 lzcnt r8d, dword ptr [r9] +XDIS 3fae: LZCNT APXEVEX APX_F 6254FC0CF501 lzcnt r8, qword ptr [r9] +XDIS 3fb4: LZCNT APXEVEX APX_F 62547D08F5C1 lzcnt r8w, r9w +XDIS 3fba: LZCNT APXEVEX APX_F 6254FD08F5C1 lzcnt r8, r9 +XDIS 3fc0: LZCNT APXEVEX APX_F 62547D08F501 lzcnt r8w, word ptr [r9] +XDIS 3fc6: LZCNT APXEVEX APX_F 6254FD08F501 lzcnt r8, qword ptr [r9] +XDIS 3fcc: LZCNT APXEVEX APX_F 62547D0CF5C1 lzcnt r8w, r9w +XDIS 3fd2: LZCNT APXEVEX APX_F 6254FD0CF5C1 lzcnt r8, r9 +XDIS 3fd8: LZCNT APXEVEX APX_F 62547D0CF501 lzcnt r8w, word ptr [r9] +XDIS 3fde: LZCNT APXEVEX APX_F 6254FD0CF501 lzcnt r8, qword ptr [r9] +XDIS 3fe4: DATAXFER APXEVEX APX_F 62547C0860C8 movbe r9d, r8d +XDIS 3fea: DATAXFER APXEVEX APX_F 6254FC0860C8 movbe r9, r8 +XDIS 3ff0: DATAXFER APXEVEX APX_F 62547C086001 movbe r8d, dword ptr [r9] +XDIS 3ff6: DATAXFER APXEVEX APX_F 6254FC086001 movbe r8, qword ptr [r9] +XDIS 3ffc: DATAXFER APXEVEX APX_F 62547D0860C8 movbe r9w, r8w +XDIS 4002: DATAXFER APXEVEX APX_F 6254FD0860C8 movbe r9, r8 +XDIS 4008: DATAXFER APXEVEX APX_F 62547D086001 movbe r8w, word ptr [r9] +XDIS 400e: DATAXFER APXEVEX APX_F 6254FD086001 movbe r8, qword ptr [r9] +XDIS 4014: DATAXFER APXEVEX APX_F 62547C0861C8 movbe r8d, r9d +XDIS 401a: DATAXFER APXEVEX APX_F 6254FC0861C8 movbe r8, r9 +XDIS 4020: DATAXFER APXEVEX APX_F 62547C086108 movbe dword ptr [r8], r9d +XDIS 4026: DATAXFER APXEVEX APX_F 6254FC086108 movbe qword ptr [r8], r9 +XDIS 402c: DATAXFER APXEVEX APX_F 62547D0861C8 movbe r8w, r9w +XDIS 4032: DATAXFER APXEVEX APX_F 6254FD0861C8 movbe r8, r9 +XDIS 4038: DATAXFER APXEVEX APX_F 62547D086108 movbe word ptr [r8], r9w +XDIS 403e: DATAXFER APXEVEX APX_F 6254FD086108 movbe qword ptr [r8], r9 +XDIS 4044: MOVDIR APXEVEX APX_F 6762547D08F801 movdir64b r8d, zmmword ptr [r9d] +XDIS 404b: MOVDIR APXEVEX APX_F 6254FD08F801 movdir64b r8, zmmword ptr [r9] +XDIS 4051: MOVDIR APXEVEX APX_F 62547C08F908 movdiri dword ptr [r8], r9d +XDIS 4057: MOVDIR APXEVEX APX_F 6254FC08F908 movdiri qword ptr [r8], r9 +XDIS 405d: BINARY APXEVEX APX_F 62D47C08F6E0 mul r8b +XDIS 4063: BINARY APXEVEX APX_F 62D47C08F620 mul byte ptr [r8] +XDIS 4069: BINARY APXEVEX APX_F 62D47C0CF6E0 mul r8b +XDIS 406f: BINARY APXEVEX APX_F 62D47C0CF620 mul byte ptr [r8] +XDIS 4075: BINARY APXEVEX APX_F 62D47C08F7E0 mul r8d +XDIS 407b: BINARY APXEVEX APX_F 62D4FC08F7E0 mul r8 +XDIS 4081: BINARY APXEVEX APX_F 62D47C08F720 mul dword ptr [r8] +XDIS 4087: BINARY APXEVEX APX_F 62D4FC08F720 mul qword ptr [r8] +XDIS 408d: BINARY APXEVEX APX_F 62D47C0CF7E0 mul r8d +XDIS 4093: BINARY APXEVEX APX_F 62D4FC0CF7E0 mul r8 +XDIS 4099: BINARY APXEVEX APX_F 62D47C0CF720 mul dword ptr [r8] +XDIS 409f: BINARY APXEVEX APX_F 62D4FC0CF720 mul qword ptr [r8] +XDIS 40a5: BINARY APXEVEX APX_F 62D47D08F7E0 mul r8w +XDIS 40ab: BINARY APXEVEX APX_F 62D4FD08F7E0 mul r8 +XDIS 40b1: BINARY APXEVEX APX_F 62D47D08F720 mul word ptr [r8] +XDIS 40b7: BINARY APXEVEX APX_F 62D4FD08F720 mul qword ptr [r8] +XDIS 40bd: BINARY APXEVEX APX_F 62D47D0CF7E0 mul r8w +XDIS 40c3: BINARY APXEVEX APX_F 62D4FD0CF7E0 mul r8 +XDIS 40c9: BINARY APXEVEX APX_F 62D47D0CF720 mul word ptr [r8] +XDIS 40cf: BINARY APXEVEX APX_F 62D4FD0CF720 mul qword ptr [r8] +XDIS 40d5: BMI2 APXEVEX APX_F 62523708F6C2 mulx r8d, r9d, r10d +XDIS 40db: BMI2 APXEVEX APX_F 62523708F602 mulx r8d, r9d, dword ptr [r10] +XDIS 40e1: BMI2 APXEVEX APX_F 6252B708F6C2 mulx r8, r9, r10 +XDIS 40e7: BMI2 APXEVEX APX_F 6252B708F602 mulx r8, r9, qword ptr [r10] +XDIS 40ed: BINARY APXEVEX APX_F 62D47C08F6D8 neg r8b +XDIS 40f3: BINARY APXEVEX APX_F 62D47C08F618 neg byte ptr [r8] +XDIS 40f9: BINARY APXEVEX APX_F 62D47C0CF6D8 neg r8b +XDIS 40ff: BINARY APXEVEX APX_F 62D47C0CF618 neg byte ptr [r8] +XDIS 4105: BINARY APXEVEX APX_F 62D43C18F6D9 neg r8b, r9b +XDIS 410b: BINARY APXEVEX APX_F 62D43C18F619 neg r8b, byte ptr [r9] +XDIS 4111: BINARY APXEVEX APX_F 62D43C1CF6D9 neg r8b, r9b +XDIS 4117: BINARY APXEVEX APX_F 62D43C1CF619 neg r8b, byte ptr [r9] +XDIS 411d: BINARY APXEVEX APX_F 62D47C08F7D8 neg r8d +XDIS 4123: BINARY APXEVEX APX_F 62D4FC08F7D8 neg r8 +XDIS 4129: BINARY APXEVEX APX_F 62D47C08F718 neg dword ptr [r8] +XDIS 412f: BINARY APXEVEX APX_F 62D4FC08F718 neg qword ptr [r8] +XDIS 4135: BINARY APXEVEX APX_F 62D47C0CF7D8 neg r8d +XDIS 413b: BINARY APXEVEX APX_F 62D4FC0CF7D8 neg r8 +XDIS 4141: BINARY APXEVEX APX_F 62D47C0CF718 neg dword ptr [r8] +XDIS 4147: BINARY APXEVEX APX_F 62D4FC0CF718 neg qword ptr [r8] +XDIS 414d: BINARY APXEVEX APX_F 62D47D08F7D8 neg r8w +XDIS 4153: BINARY APXEVEX APX_F 62D4FD08F7D8 neg r8 +XDIS 4159: BINARY APXEVEX APX_F 62D47D08F718 neg word ptr [r8] +XDIS 415f: BINARY APXEVEX APX_F 62D4FD08F718 neg qword ptr [r8] +XDIS 4165: BINARY APXEVEX APX_F 62D47D0CF7D8 neg r8w +XDIS 416b: BINARY APXEVEX APX_F 62D4FD0CF7D8 neg r8 +XDIS 4171: BINARY APXEVEX APX_F 62D47D0CF718 neg word ptr [r8] +XDIS 4177: BINARY APXEVEX APX_F 62D4FD0CF718 neg qword ptr [r8] +XDIS 417d: BINARY APXEVEX APX_F 62D43C18F7D9 neg r8d, r9d +XDIS 4183: BINARY APXEVEX APX_F 62D4BC18F7D9 neg r8, r9 +XDIS 4189: BINARY APXEVEX APX_F 62D43C18F719 neg r8d, dword ptr [r9] +XDIS 418f: BINARY APXEVEX APX_F 62D4BC18F719 neg r8, qword ptr [r9] +XDIS 4195: BINARY APXEVEX APX_F 62D43C1CF7D9 neg r8d, r9d +XDIS 419b: BINARY APXEVEX APX_F 62D4BC1CF7D9 neg r8, r9 +XDIS 41a1: BINARY APXEVEX APX_F 62D43C1CF719 neg r8d, dword ptr [r9] +XDIS 41a7: BINARY APXEVEX APX_F 62D4BC1CF719 neg r8, qword ptr [r9] +XDIS 41ad: BINARY APXEVEX APX_F 62D43D18F7D9 neg r8w, r9w +XDIS 41b3: BINARY APXEVEX APX_F 62D4BD18F7D9 neg r8, r9 +XDIS 41b9: BINARY APXEVEX APX_F 62D43D18F719 neg r8w, word ptr [r9] +XDIS 41bf: BINARY APXEVEX APX_F 62D4BD18F719 neg r8, qword ptr [r9] +XDIS 41c5: BINARY APXEVEX APX_F 62D43D1CF7D9 neg r8w, r9w +XDIS 41cb: BINARY APXEVEX APX_F 62D4BD1CF7D9 neg r8, r9 +XDIS 41d1: BINARY APXEVEX APX_F 62D43D1CF719 neg r8w, word ptr [r9] +XDIS 41d7: BINARY APXEVEX APX_F 62D4BD1CF719 neg r8, qword ptr [r9] +XDIS 41dd: LOGICAL APXEVEX APX_F 62D47C08F6D0 not r8b +XDIS 41e3: LOGICAL APXEVEX APX_F 62D47C08F610 not byte ptr [r8] +XDIS 41e9: LOGICAL APXEVEX APX_F 62D43C18F6D1 not r8b, r9b +XDIS 41ef: LOGICAL APXEVEX APX_F 62D43C18F611 not r8b, byte ptr [r9] +XDIS 41f5: LOGICAL APXEVEX APX_F 62D47C08F7D0 not r8d +XDIS 41fb: LOGICAL APXEVEX APX_F 62D4FC08F7D0 not r8 +XDIS 4201: LOGICAL APXEVEX APX_F 62D47C08F710 not dword ptr [r8] +XDIS 4207: LOGICAL APXEVEX APX_F 62D4FC08F710 not qword ptr [r8] +XDIS 420d: LOGICAL APXEVEX APX_F 62D47D08F7D0 not r8w +XDIS 4213: LOGICAL APXEVEX APX_F 62D4FD08F7D0 not r8 +XDIS 4219: LOGICAL APXEVEX APX_F 62D47D08F710 not word ptr [r8] +XDIS 421f: LOGICAL APXEVEX APX_F 62D4FD08F710 not qword ptr [r8] +XDIS 4225: LOGICAL APXEVEX APX_F 62D43C18F7D1 not r8d, r9d +XDIS 422b: LOGICAL APXEVEX APX_F 62D4BC18F7D1 not r8, r9 +XDIS 4231: LOGICAL APXEVEX APX_F 62D43C18F711 not r8d, dword ptr [r9] +XDIS 4237: LOGICAL APXEVEX APX_F 62D4BC18F711 not r8, qword ptr [r9] +XDIS 423d: LOGICAL APXEVEX APX_F 62D43D18F7D1 not r8w, r9w +XDIS 4243: LOGICAL APXEVEX APX_F 62D4BD18F7D1 not r8, r9 +XDIS 4249: LOGICAL APXEVEX APX_F 62D43D18F711 not r8w, word ptr [r9] +XDIS 424f: LOGICAL APXEVEX APX_F 62D4BD18F711 not r8, qword ptr [r9] +XDIS 4255: LOGICAL APXEVEX APX_F 62547C0808C8 or r8b, r9b +XDIS 425b: LOGICAL APXEVEX APX_F 62547C080808 or byte ptr [r8], r9b +XDIS 4261: LOGICAL APXEVEX APX_F 62547C0C08C8 or r8b, r9b +XDIS 4267: LOGICAL APXEVEX APX_F 62547C0C0808 or byte ptr [r8], r9b +XDIS 426d: LOGICAL APXEVEX APX_F 62D43D1883C902 or r8w, r9w, 0x2 +XDIS 4274: LOGICAL APXEVEX APX_F 62D4BD1883C902 or r8, r9, 0x2 +XDIS 427b: LOGICAL APXEVEX APX_F 62D43D18830902 or r8w, word ptr [r9], 0x2 +XDIS 4282: LOGICAL APXEVEX APX_F 62D4BD18830902 or r8, qword ptr [r9], 0x2 +XDIS 4289: LOGICAL APXEVEX APX_F 62D43D1C83C902 or r8w, r9w, 0x2 +XDIS 4290: LOGICAL APXEVEX APX_F 62D4BD1C83C902 or r8, r9, 0x2 +XDIS 4297: LOGICAL APXEVEX APX_F 62D43D1C830902 or r8w, word ptr [r9], 0x2 +XDIS 429e: LOGICAL APXEVEX APX_F 62D4BD1C830902 or r8, qword ptr [r9], 0x2 +XDIS 42a5: LOGICAL APXEVEX APX_F 62543C1808D1 or r8b, r9b, r10b +XDIS 42ab: LOGICAL APXEVEX APX_F 62543C180811 or r8b, byte ptr [r9], r10b +XDIS 42b1: LOGICAL APXEVEX APX_F 62543C1C08D1 or r8b, r9b, r10b +XDIS 42b7: LOGICAL APXEVEX APX_F 62543C1C0811 or r8b, byte ptr [r9], r10b +XDIS 42bd: LOGICAL APXEVEX APX_F 62547C0809C8 or r8d, r9d +XDIS 42c3: LOGICAL APXEVEX APX_F 6254FC0809C8 or r8, r9 +XDIS 42c9: LOGICAL APXEVEX APX_F 62547C080908 or dword ptr [r8], r9d +XDIS 42cf: LOGICAL APXEVEX APX_F 6254FC080908 or qword ptr [r8], r9 +XDIS 42d5: LOGICAL APXEVEX APX_F 62547C0C09C8 or r8d, r9d +XDIS 42db: LOGICAL APXEVEX APX_F 6254FC0C09C8 or r8, r9 +XDIS 42e1: LOGICAL APXEVEX APX_F 62547C0C0908 or dword ptr [r8], r9d +XDIS 42e7: LOGICAL APXEVEX APX_F 6254FC0C0908 or qword ptr [r8], r9 +XDIS 42ed: LOGICAL APXEVEX APX_F 62547D0809C8 or r8w, r9w +XDIS 42f3: LOGICAL APXEVEX APX_F 6254FD0809C8 or r8, r9 +XDIS 42f9: LOGICAL APXEVEX APX_F 62547D080908 or word ptr [r8], r9w +XDIS 42ff: LOGICAL APXEVEX APX_F 6254FD080908 or qword ptr [r8], r9 +XDIS 4305: LOGICAL APXEVEX APX_F 62547D0C09C8 or r8w, r9w +XDIS 430b: LOGICAL APXEVEX APX_F 6254FD0C09C8 or r8, r9 +XDIS 4311: LOGICAL APXEVEX APX_F 62547D0C0908 or word ptr [r8], r9w +XDIS 4317: LOGICAL APXEVEX APX_F 6254FD0C0908 or qword ptr [r8], r9 +XDIS 431d: LOGICAL APXEVEX APX_F 62543C1809D1 or r8d, r9d, r10d +XDIS 4323: LOGICAL APXEVEX APX_F 6254BC1809D1 or r8, r9, r10 +XDIS 4329: LOGICAL APXEVEX APX_F 62543C180911 or r8d, dword ptr [r9], r10d +XDIS 432f: LOGICAL APXEVEX APX_F 6254BC180911 or r8, qword ptr [r9], r10 +XDIS 4335: LOGICAL APXEVEX APX_F 62543C1C09D1 or r8d, r9d, r10d +XDIS 433b: LOGICAL APXEVEX APX_F 6254BC1C09D1 or r8, r9, r10 +XDIS 4341: LOGICAL APXEVEX APX_F 62543C1C0911 or r8d, dword ptr [r9], r10d +XDIS 4347: LOGICAL APXEVEX APX_F 6254BC1C0911 or r8, qword ptr [r9], r10 +XDIS 434d: LOGICAL APXEVEX APX_F 62543D1809D1 or r8w, r9w, r10w +XDIS 4353: LOGICAL APXEVEX APX_F 6254BD1809D1 or r8, r9, r10 +XDIS 4359: LOGICAL APXEVEX APX_F 62543D180911 or r8w, word ptr [r9], r10w +XDIS 435f: LOGICAL APXEVEX APX_F 6254BD180911 or r8, qword ptr [r9], r10 +XDIS 4365: LOGICAL APXEVEX APX_F 62543D1C09D1 or r8w, r9w, r10w +XDIS 436b: LOGICAL APXEVEX APX_F 6254BD1C09D1 or r8, r9, r10 +XDIS 4371: LOGICAL APXEVEX APX_F 62543D1C0911 or r8w, word ptr [r9], r10w +XDIS 4377: LOGICAL APXEVEX APX_F 6254BD1C0911 or r8, qword ptr [r9], r10 +XDIS 437d: LOGICAL APXEVEX APX_F 62547C080AC8 or r9b, r8b +XDIS 4383: LOGICAL APXEVEX APX_F 62547C080A01 or r8b, byte ptr [r9] +XDIS 4389: LOGICAL APXEVEX APX_F 62547C0C0AC8 or r9b, r8b +XDIS 438f: LOGICAL APXEVEX APX_F 62547C0C0A01 or r8b, byte ptr [r9] +XDIS 4395: LOGICAL APXEVEX APX_F 62543C180AD1 or r8b, r10b, r9b +XDIS 439b: LOGICAL APXEVEX APX_F 62543C180A0A or r8b, r9b, byte ptr [r10] +XDIS 43a1: LOGICAL APXEVEX APX_F 62543C1C0AD1 or r8b, r10b, r9b +XDIS 43a7: LOGICAL APXEVEX APX_F 62543C1C0A0A or r8b, r9b, byte ptr [r10] +XDIS 43ad: LOGICAL APXEVEX APX_F 62547C080BC8 or r9d, r8d +XDIS 43b3: LOGICAL APXEVEX APX_F 6254FC080BC8 or r9, r8 +XDIS 43b9: LOGICAL APXEVEX APX_F 62547C080B01 or r8d, dword ptr [r9] +XDIS 43bf: LOGICAL APXEVEX APX_F 6254FC080B01 or r8, qword ptr [r9] +XDIS 43c5: LOGICAL APXEVEX APX_F 62547C0C0BC8 or r9d, r8d +XDIS 43cb: LOGICAL APXEVEX APX_F 6254FC0C0BC8 or r9, r8 +XDIS 43d1: LOGICAL APXEVEX APX_F 62547C0C0B01 or r8d, dword ptr [r9] +XDIS 43d7: LOGICAL APXEVEX APX_F 6254FC0C0B01 or r8, qword ptr [r9] +XDIS 43dd: LOGICAL APXEVEX APX_F 62547D080BC8 or r9w, r8w +XDIS 43e3: LOGICAL APXEVEX APX_F 6254FD080BC8 or r9, r8 +XDIS 43e9: LOGICAL APXEVEX APX_F 62547D080B01 or r8w, word ptr [r9] +XDIS 43ef: LOGICAL APXEVEX APX_F 6254FD080B01 or r8, qword ptr [r9] +XDIS 43f5: LOGICAL APXEVEX APX_F 62547D0C0BC8 or r9w, r8w +XDIS 43fb: LOGICAL APXEVEX APX_F 6254FD0C0BC8 or r9, r8 +XDIS 4401: LOGICAL APXEVEX APX_F 62547D0C0B01 or r8w, word ptr [r9] +XDIS 4407: LOGICAL APXEVEX APX_F 6254FD0C0B01 or r8, qword ptr [r9] +XDIS 440d: LOGICAL APXEVEX APX_F 62D43C1880C902 or r8b, r9b, 0x2 +XDIS 4414: LOGICAL APXEVEX APX_F 62D43C18800902 or r8b, byte ptr [r9], 0x2 +XDIS 441b: LOGICAL APXEVEX APX_F 62D43C1C80C902 or r8b, r9b, 0x2 +XDIS 4422: LOGICAL APXEVEX APX_F 62D43C1C800902 or r8b, byte ptr [r9], 0x2 +XDIS 4429: LOGICAL APXEVEX APX_F 62543C180BD1 or r8d, r10d, r9d +XDIS 442f: LOGICAL APXEVEX APX_F 6254BC180BD1 or r8, r10, r9 +XDIS 4435: LOGICAL APXEVEX APX_F 62543C180B0A or r8d, r9d, dword ptr [r10] +XDIS 443b: LOGICAL APXEVEX APX_F 6254BC180B0A or r8, r9, qword ptr [r10] +XDIS 4441: LOGICAL APXEVEX APX_F 62543C1C0BD1 or r8d, r10d, r9d +XDIS 4447: LOGICAL APXEVEX APX_F 6254BC1C0BD1 or r8, r10, r9 +XDIS 444d: LOGICAL APXEVEX APX_F 62543C1C0B0A or r8d, r9d, dword ptr [r10] +XDIS 4453: LOGICAL APXEVEX APX_F 6254BC1C0B0A or r8, r9, qword ptr [r10] +XDIS 4459: LOGICAL APXEVEX APX_F 62543D180BD1 or r8w, r10w, r9w +XDIS 445f: LOGICAL APXEVEX APX_F 6254BD180BD1 or r8, r10, r9 +XDIS 4465: LOGICAL APXEVEX APX_F 62543D180B0A or r8w, r9w, word ptr [r10] +XDIS 446b: LOGICAL APXEVEX APX_F 6254BD180B0A or r8, r9, qword ptr [r10] +XDIS 4471: LOGICAL APXEVEX APX_F 62543D1C0BD1 or r8w, r10w, r9w +XDIS 4477: LOGICAL APXEVEX APX_F 6254BD1C0BD1 or r8, r10, r9 +XDIS 447d: LOGICAL APXEVEX APX_F 62543D1C0B0A or r8w, r9w, word ptr [r10] +XDIS 4483: LOGICAL APXEVEX APX_F 6254BD1C0B0A or r8, r9, qword ptr [r10] +XDIS 4489: LOGICAL APXEVEX APX_F 62D47C0880C802 or r8b, 0x2 +XDIS 4490: LOGICAL APXEVEX APX_F 62D47C08800802 or byte ptr [r8], 0x2 +XDIS 4497: LOGICAL APXEVEX APX_F 62D47C0C80C802 or r8b, 0x2 +XDIS 449e: LOGICAL APXEVEX APX_F 62D47C0C800802 or byte ptr [r8], 0x2 +XDIS 44a5: LOGICAL APXEVEX APX_F 62D47C0881C802000000 or r8d, 0x2 +XDIS 44af: LOGICAL APXEVEX APX_F 62D4FC0881C802000000 or r8, 0x2 +XDIS 44b9: LOGICAL APXEVEX APX_F 62D47C08810802000000 or dword ptr [r8], 0x2 +XDIS 44c3: LOGICAL APXEVEX APX_F 62D4FC08810802000000 or qword ptr [r8], 0x2 +XDIS 44cd: LOGICAL APXEVEX APX_F 62D47C0C81C802000000 or r8d, 0x2 +XDIS 44d7: LOGICAL APXEVEX APX_F 62D4FC0C81C802000000 or r8, 0x2 +XDIS 44e1: LOGICAL APXEVEX APX_F 62D47C0C810802000000 or dword ptr [r8], 0x2 +XDIS 44eb: LOGICAL APXEVEX APX_F 62D4FC0C810802000000 or qword ptr [r8], 0x2 +XDIS 44f5: LOGICAL APXEVEX APX_F 62D47D0881C80200 or r8w, 0x2 +XDIS 44fd: LOGICAL APXEVEX APX_F 62D4FD0881C802000000 or r8, 0x2 +XDIS 4507: LOGICAL APXEVEX APX_F 62D47D0881080200 or word ptr [r8], 0x2 +XDIS 450f: LOGICAL APXEVEX APX_F 62D4FD08810802000000 or qword ptr [r8], 0x2 +XDIS 4519: LOGICAL APXEVEX APX_F 62D47D0C81C80200 or r8w, 0x2 +XDIS 4521: LOGICAL APXEVEX APX_F 62D4FD0C81C802000000 or r8, 0x2 +XDIS 452b: LOGICAL APXEVEX APX_F 62D47D0C81080200 or word ptr [r8], 0x2 +XDIS 4533: LOGICAL APXEVEX APX_F 62D4FD0C810802000000 or qword ptr [r8], 0x2 +XDIS 453d: LOGICAL APXEVEX APX_F 62D43C1881C902000000 or r8d, r9d, 0x2 +XDIS 4547: LOGICAL APXEVEX APX_F 62D4BC1881C902000000 or r8, r9, 0x2 +XDIS 4551: LOGICAL APXEVEX APX_F 62D43C18810902000000 or r8d, dword ptr [r9], 0x2 +XDIS 455b: LOGICAL APXEVEX APX_F 62D4BC18810902000000 or r8, qword ptr [r9], 0x2 +XDIS 4565: LOGICAL APXEVEX APX_F 62D43C1C81C902000000 or r8d, r9d, 0x2 +XDIS 456f: LOGICAL APXEVEX APX_F 62D4BC1C81C902000000 or r8, r9, 0x2 +XDIS 4579: LOGICAL APXEVEX APX_F 62D43C1C810902000000 or r8d, dword ptr [r9], 0x2 +XDIS 4583: LOGICAL APXEVEX APX_F 62D4BC1C810902000000 or r8, qword ptr [r9], 0x2 +XDIS 458d: LOGICAL APXEVEX APX_F 62D43D1881C90200 or r8w, r9w, 0x2 +XDIS 4595: LOGICAL APXEVEX APX_F 62D4BD1881C902000000 or r8, r9, 0x2 +XDIS 459f: LOGICAL APXEVEX APX_F 62D43D1881090200 or r8w, word ptr [r9], 0x2 +XDIS 45a7: LOGICAL APXEVEX APX_F 62D4BD18810902000000 or r8, qword ptr [r9], 0x2 +XDIS 45b1: LOGICAL APXEVEX APX_F 62D43D1C81C90200 or r8w, r9w, 0x2 +XDIS 45b9: LOGICAL APXEVEX APX_F 62D4BD1C81C902000000 or r8, r9, 0x2 +XDIS 45c3: LOGICAL APXEVEX APX_F 62D43D1C81090200 or r8w, word ptr [r9], 0x2 +XDIS 45cb: LOGICAL APXEVEX APX_F 62D4BD1C810902000000 or r8, qword ptr [r9], 0x2 +XDIS 45d5: LOGICAL APXEVEX APX_F 62D47C0883C802 or r8d, 0x2 +XDIS 45dc: LOGICAL APXEVEX APX_F 62D4FC0883C802 or r8, 0x2 +XDIS 45e3: LOGICAL APXEVEX APX_F 62D47C08830802 or dword ptr [r8], 0x2 +XDIS 45ea: LOGICAL APXEVEX APX_F 62D4FC08830802 or qword ptr [r8], 0x2 +XDIS 45f1: LOGICAL APXEVEX APX_F 62D47C0C83C802 or r8d, 0x2 +XDIS 45f8: LOGICAL APXEVEX APX_F 62D4FC0C83C802 or r8, 0x2 +XDIS 45ff: LOGICAL APXEVEX APX_F 62D47C0C830802 or dword ptr [r8], 0x2 +XDIS 4606: LOGICAL APXEVEX APX_F 62D4FC0C830802 or qword ptr [r8], 0x2 +XDIS 460d: LOGICAL APXEVEX APX_F 62D47D0883C802 or r8w, 0x2 +XDIS 4614: LOGICAL APXEVEX APX_F 62D4FD0883C802 or r8, 0x2 +XDIS 461b: LOGICAL APXEVEX APX_F 62D47D08830802 or word ptr [r8], 0x2 +XDIS 4622: LOGICAL APXEVEX APX_F 62D4FD08830802 or qword ptr [r8], 0x2 +XDIS 4629: LOGICAL APXEVEX APX_F 62D47D0C83C802 or r8w, 0x2 +XDIS 4630: LOGICAL APXEVEX APX_F 62D4FD0C83C802 or r8, 0x2 +XDIS 4637: LOGICAL APXEVEX APX_F 62D47D0C830802 or word ptr [r8], 0x2 +XDIS 463e: LOGICAL APXEVEX APX_F 62D4FD0C830802 or qword ptr [r8], 0x2 +XDIS 4645: LOGICAL APXEVEX APX_F 62D43C1883C902 or r8d, r9d, 0x2 +XDIS 464c: LOGICAL APXEVEX APX_F 62D4BC1883C902 or r8, r9, 0x2 +XDIS 4653: LOGICAL APXEVEX APX_F 62D43C18830902 or r8d, dword ptr [r9], 0x2 +XDIS 465a: LOGICAL APXEVEX APX_F 62D4BC18830902 or r8, qword ptr [r9], 0x2 +XDIS 4661: LOGICAL APXEVEX APX_F 62D43C1C83C902 or r8d, r9d, 0x2 +XDIS 4668: LOGICAL APXEVEX APX_F 62D4BC1C83C902 or r8, r9, 0x2 +XDIS 466f: LOGICAL APXEVEX APX_F 62D43C1C830902 or r8d, dword ptr [r9], 0x2 +XDIS 4676: LOGICAL APXEVEX APX_F 62D4BC1C830902 or r8, qword ptr [r9], 0x2 +XDIS 467d: BMI2 APXEVEX APX_F 62523708F5C2 pdep r8d, r9d, r10d +XDIS 4683: BMI2 APXEVEX APX_F 62523708F502 pdep r8d, r9d, dword ptr [r10] +XDIS 4689: BMI2 APXEVEX APX_F 6252B708F5C2 pdep r8, r9, r10 +XDIS 468f: BMI2 APXEVEX APX_F 6252B708F502 pdep r8, r9, qword ptr [r10] +XDIS 4695: BMI2 APXEVEX APX_F 62523608F5C2 pext r8d, r9d, r10d +XDIS 469b: BMI2 APXEVEX APX_F 62523608F502 pext r8d, r9d, dword ptr [r10] +XDIS 46a1: BMI2 APXEVEX APX_F 6252B608F5C2 pext r8, r9, r10 +XDIS 46a7: BMI2 APXEVEX APX_F 6252B608F502 pext r8, r9, qword ptr [r10] +XDIS 46ad: POP APXEVEX APX_F 62D43C188FC1 pop2 r8, r9 +XDIS 46b3: POP APXEVEX APX_F 62D4BC188FC1 pop2p r8, r9 +XDIS 46b9: APX APXEVEX APX_F 62547C0888C1 popcnt r8d, r9d +XDIS 46bf: APX APXEVEX APX_F 6254FC0888C1 popcnt r8, r9 +XDIS 46c5: APX APXEVEX APX_F 62547C088801 popcnt r8d, dword ptr [r9] +XDIS 46cb: APX APXEVEX APX_F 6254FC088801 popcnt r8, qword ptr [r9] +XDIS 46d1: APX APXEVEX APX_F 62547C0C88C1 popcnt r8d, r9d +XDIS 46d7: APX APXEVEX APX_F 6254FC0C88C1 popcnt r8, r9 +XDIS 46dd: APX APXEVEX APX_F 62547C0C8801 popcnt r8d, dword ptr [r9] +XDIS 46e3: APX APXEVEX APX_F 6254FC0C8801 popcnt r8, qword ptr [r9] +XDIS 46e9: APX APXEVEX APX_F 62547D0888C1 popcnt r8w, r9w +XDIS 46ef: APX APXEVEX APX_F 6254FD0888C1 popcnt r8, r9 +XDIS 46f5: APX APXEVEX APX_F 62547D088801 popcnt r8w, word ptr [r9] +XDIS 46fb: APX APXEVEX APX_F 6254FD088801 popcnt r8, qword ptr [r9] +XDIS 4701: APX APXEVEX APX_F 62547D0C88C1 popcnt r8w, r9w +XDIS 4707: APX APXEVEX APX_F 6254FD0C88C1 popcnt r8, r9 +XDIS 470d: APX APXEVEX APX_F 62547D0C8801 popcnt r8w, word ptr [r9] +XDIS 4713: APX APXEVEX APX_F 6254FD0C8801 popcnt r8, qword ptr [r9] +XDIS 4719: PUSH APXEVEX APX_F 62D43C18FFF1 push2 r8, r9 +XDIS 471f: PUSH APXEVEX APX_F 62D4BC18FFF1 push2p r8, r9 +XDIS 4725: ROTATE APXEVEX APX_F 62D47C08C0D002 rcl r8b, 0x2 +XDIS 472c: ROTATE APXEVEX APX_F 62D47C08C01002 rcl byte ptr [r8], 0x2 +XDIS 4733: ROTATE APXEVEX APX_F 62D43C18C1D102 rcl r8d, r9d, 0x2 +XDIS 473a: ROTATE APXEVEX APX_F 62D4BC18C1D102 rcl r8, r9, 0x2 +XDIS 4741: ROTATE APXEVEX APX_F 62D43C18C11102 rcl r8d, dword ptr [r9], 0x2 +XDIS 4748: ROTATE APXEVEX APX_F 62D4BC18C11102 rcl r8, qword ptr [r9], 0x2 +XDIS 474f: ROTATE APXEVEX APX_F 62D43D18C1D102 rcl r8w, r9w, 0x2 +XDIS 4756: ROTATE APXEVEX APX_F 62D4BD18C1D102 rcl r8, r9, 0x2 +XDIS 475d: ROTATE APXEVEX APX_F 62D43D18C11102 rcl r8w, word ptr [r9], 0x2 +XDIS 4764: ROTATE APXEVEX APX_F 62D4BD18C11102 rcl r8, qword ptr [r9], 0x2 +XDIS 476b: ROTATE APXEVEX APX_F 62D47C08D0D0 rcl r8b, 0x1 +XDIS 4771: ROTATE APXEVEX APX_F 62D47C08D010 rcl byte ptr [r8], 0x1 +XDIS 4777: ROTATE APXEVEX APX_F 62D43C18D0D1 rcl r8b, r9b, 0x1 +XDIS 477d: ROTATE APXEVEX APX_F 62D43C18D011 rcl r8b, byte ptr [r9], 0x1 +XDIS 4783: ROTATE APXEVEX APX_F 62D47C08D1D0 rcl r8d, 0x1 +XDIS 4789: ROTATE APXEVEX APX_F 62D4FC08D1D0 rcl r8, 0x1 +XDIS 478f: ROTATE APXEVEX APX_F 62D47C08D110 rcl dword ptr [r8], 0x1 +XDIS 4795: ROTATE APXEVEX APX_F 62D4FC08D110 rcl qword ptr [r8], 0x1 +XDIS 479b: ROTATE APXEVEX APX_F 62D47D08D1D0 rcl r8w, 0x1 +XDIS 47a1: ROTATE APXEVEX APX_F 62D4FD08D1D0 rcl r8, 0x1 +XDIS 47a7: ROTATE APXEVEX APX_F 62D47D08D110 rcl word ptr [r8], 0x1 +XDIS 47ad: ROTATE APXEVEX APX_F 62D4FD08D110 rcl qword ptr [r8], 0x1 +XDIS 47b3: ROTATE APXEVEX APX_F 62D43C18D1D1 rcl r8d, r9d, 0x1 +XDIS 47b9: ROTATE APXEVEX APX_F 62D4BC18D1D1 rcl r8, r9, 0x1 +XDIS 47bf: ROTATE APXEVEX APX_F 62D43C18D111 rcl r8d, dword ptr [r9], 0x1 +XDIS 47c5: ROTATE APXEVEX APX_F 62D4BC18D111 rcl r8, qword ptr [r9], 0x1 +XDIS 47cb: ROTATE APXEVEX APX_F 62D43D18D1D1 rcl r8w, r9w, 0x1 +XDIS 47d1: ROTATE APXEVEX APX_F 62D4BD18D1D1 rcl r8, r9, 0x1 +XDIS 47d7: ROTATE APXEVEX APX_F 62D43D18D111 rcl r8w, word ptr [r9], 0x1 +XDIS 47dd: ROTATE APXEVEX APX_F 62D4BD18D111 rcl r8, qword ptr [r9], 0x1 +XDIS 47e3: ROTATE APXEVEX APX_F 62D47C08D2D0 rcl r8b, cl +XDIS 47e9: ROTATE APXEVEX APX_F 62D47C08D210 rcl byte ptr [r8], cl +XDIS 47ef: ROTATE APXEVEX APX_F 62D43C18D2D1 rcl r8b, r9b, cl +XDIS 47f5: ROTATE APXEVEX APX_F 62D43C18D211 rcl r8b, byte ptr [r9], cl +XDIS 47fb: ROTATE APXEVEX APX_F 62D47C08D3D0 rcl r8d, cl +XDIS 4801: ROTATE APXEVEX APX_F 62D4FC08D3D0 rcl r8, cl +XDIS 4807: ROTATE APXEVEX APX_F 62D47C08D310 rcl dword ptr [r8], cl +XDIS 480d: ROTATE APXEVEX APX_F 62D4FC08D310 rcl qword ptr [r8], cl +XDIS 4813: ROTATE APXEVEX APX_F 62D47D08D3D0 rcl r8w, cl +XDIS 4819: ROTATE APXEVEX APX_F 62D4FD08D3D0 rcl r8, cl +XDIS 481f: ROTATE APXEVEX APX_F 62D47D08D310 rcl word ptr [r8], cl +XDIS 4825: ROTATE APXEVEX APX_F 62D4FD08D310 rcl qword ptr [r8], cl +XDIS 482b: ROTATE APXEVEX APX_F 62D43C18D3D1 rcl r8d, r9d, cl +XDIS 4831: ROTATE APXEVEX APX_F 62D4BC18D3D1 rcl r8, r9, cl +XDIS 4837: ROTATE APXEVEX APX_F 62D43C18D311 rcl r8d, dword ptr [r9], cl +XDIS 483d: ROTATE APXEVEX APX_F 62D4BC18D311 rcl r8, qword ptr [r9], cl +XDIS 4843: ROTATE APXEVEX APX_F 62D43D18D3D1 rcl r8w, r9w, cl +XDIS 4849: ROTATE APXEVEX APX_F 62D4BD18D3D1 rcl r8, r9, cl +XDIS 484f: ROTATE APXEVEX APX_F 62D43D18D311 rcl r8w, word ptr [r9], cl +XDIS 4855: ROTATE APXEVEX APX_F 62D4BD18D311 rcl r8, qword ptr [r9], cl +XDIS 485b: ROTATE APXEVEX APX_F 62D43C18C0D102 rcl r8b, r9b, 0x2 +XDIS 4862: ROTATE APXEVEX APX_F 62D43C18C01102 rcl r8b, byte ptr [r9], 0x2 +XDIS 4869: ROTATE APXEVEX APX_F 62D47C08C1D002 rcl r8d, 0x2 +XDIS 4870: ROTATE APXEVEX APX_F 62D4FC08C1D002 rcl r8, 0x2 +XDIS 4877: ROTATE APXEVEX APX_F 62D47C08C11002 rcl dword ptr [r8], 0x2 +XDIS 487e: ROTATE APXEVEX APX_F 62D4FC08C11002 rcl qword ptr [r8], 0x2 +XDIS 4885: ROTATE APXEVEX APX_F 62D47D08C1D002 rcl r8w, 0x2 +XDIS 488c: ROTATE APXEVEX APX_F 62D4FD08C1D002 rcl r8, 0x2 +XDIS 4893: ROTATE APXEVEX APX_F 62D47D08C11002 rcl word ptr [r8], 0x2 +XDIS 489a: ROTATE APXEVEX APX_F 62D4FD08C11002 rcl qword ptr [r8], 0x2 +XDIS 48a1: ROTATE APXEVEX APX_F 62D47C08C0D802 rcr r8b, 0x2 +XDIS 48a8: ROTATE APXEVEX APX_F 62D47C08C01802 rcr byte ptr [r8], 0x2 +XDIS 48af: ROTATE APXEVEX APX_F 62D43C18C1D902 rcr r8d, r9d, 0x2 +XDIS 48b6: ROTATE APXEVEX APX_F 62D4BC18C1D902 rcr r8, r9, 0x2 +XDIS 48bd: ROTATE APXEVEX APX_F 62D43C18C11902 rcr r8d, dword ptr [r9], 0x2 +XDIS 48c4: ROTATE APXEVEX APX_F 62D4BC18C11902 rcr r8, qword ptr [r9], 0x2 +XDIS 48cb: ROTATE APXEVEX APX_F 62D43D18C1D902 rcr r8w, r9w, 0x2 +XDIS 48d2: ROTATE APXEVEX APX_F 62D4BD18C1D902 rcr r8, r9, 0x2 +XDIS 48d9: ROTATE APXEVEX APX_F 62D43D18C11902 rcr r8w, word ptr [r9], 0x2 +XDIS 48e0: ROTATE APXEVEX APX_F 62D4BD18C11902 rcr r8, qword ptr [r9], 0x2 +XDIS 48e7: ROTATE APXEVEX APX_F 62D47C08D0D8 rcr r8b, 0x1 +XDIS 48ed: ROTATE APXEVEX APX_F 62D47C08D018 rcr byte ptr [r8], 0x1 +XDIS 48f3: ROTATE APXEVEX APX_F 62D43C18D0D9 rcr r8b, r9b, 0x1 +XDIS 48f9: ROTATE APXEVEX APX_F 62D43C18D019 rcr r8b, byte ptr [r9], 0x1 +XDIS 48ff: ROTATE APXEVEX APX_F 62D47C08D1D8 rcr r8d, 0x1 +XDIS 4905: ROTATE APXEVEX APX_F 62D4FC08D1D8 rcr r8, 0x1 +XDIS 490b: ROTATE APXEVEX APX_F 62D47C08D118 rcr dword ptr [r8], 0x1 +XDIS 4911: ROTATE APXEVEX APX_F 62D4FC08D118 rcr qword ptr [r8], 0x1 +XDIS 4917: ROTATE APXEVEX APX_F 62D47D08D1D8 rcr r8w, 0x1 +XDIS 491d: ROTATE APXEVEX APX_F 62D4FD08D1D8 rcr r8, 0x1 +XDIS 4923: ROTATE APXEVEX APX_F 62D47D08D118 rcr word ptr [r8], 0x1 +XDIS 4929: ROTATE APXEVEX APX_F 62D4FD08D118 rcr qword ptr [r8], 0x1 +XDIS 492f: ROTATE APXEVEX APX_F 62D43C18D1D9 rcr r8d, r9d, 0x1 +XDIS 4935: ROTATE APXEVEX APX_F 62D4BC18D1D9 rcr r8, r9, 0x1 +XDIS 493b: ROTATE APXEVEX APX_F 62D43C18D119 rcr r8d, dword ptr [r9], 0x1 +XDIS 4941: ROTATE APXEVEX APX_F 62D4BC18D119 rcr r8, qword ptr [r9], 0x1 +XDIS 4947: ROTATE APXEVEX APX_F 62D43D18D1D9 rcr r8w, r9w, 0x1 +XDIS 494d: ROTATE APXEVEX APX_F 62D4BD18D1D9 rcr r8, r9, 0x1 +XDIS 4953: ROTATE APXEVEX APX_F 62D43D18D119 rcr r8w, word ptr [r9], 0x1 +XDIS 4959: ROTATE APXEVEX APX_F 62D4BD18D119 rcr r8, qword ptr [r9], 0x1 +XDIS 495f: ROTATE APXEVEX APX_F 62D47C08D2D8 rcr r8b, cl +XDIS 4965: ROTATE APXEVEX APX_F 62D47C08D218 rcr byte ptr [r8], cl +XDIS 496b: ROTATE APXEVEX APX_F 62D43C18D2D9 rcr r8b, r9b, cl +XDIS 4971: ROTATE APXEVEX APX_F 62D43C18D219 rcr r8b, byte ptr [r9], cl +XDIS 4977: ROTATE APXEVEX APX_F 62D47C08D3D8 rcr r8d, cl +XDIS 497d: ROTATE APXEVEX APX_F 62D4FC08D3D8 rcr r8, cl +XDIS 4983: ROTATE APXEVEX APX_F 62D47C08D318 rcr dword ptr [r8], cl +XDIS 4989: ROTATE APXEVEX APX_F 62D4FC08D318 rcr qword ptr [r8], cl +XDIS 498f: ROTATE APXEVEX APX_F 62D47D08D3D8 rcr r8w, cl +XDIS 4995: ROTATE APXEVEX APX_F 62D4FD08D3D8 rcr r8, cl +XDIS 499b: ROTATE APXEVEX APX_F 62D47D08D318 rcr word ptr [r8], cl +XDIS 49a1: ROTATE APXEVEX APX_F 62D4FD08D318 rcr qword ptr [r8], cl +XDIS 49a7: ROTATE APXEVEX APX_F 62D43C18D3D9 rcr r8d, r9d, cl +XDIS 49ad: ROTATE APXEVEX APX_F 62D4BC18D3D9 rcr r8, r9, cl +XDIS 49b3: ROTATE APXEVEX APX_F 62D43C18D319 rcr r8d, dword ptr [r9], cl +XDIS 49b9: ROTATE APXEVEX APX_F 62D4BC18D319 rcr r8, qword ptr [r9], cl +XDIS 49bf: ROTATE APXEVEX APX_F 62D43D18D3D9 rcr r8w, r9w, cl +XDIS 49c5: ROTATE APXEVEX APX_F 62D4BD18D3D9 rcr r8, r9, cl +XDIS 49cb: ROTATE APXEVEX APX_F 62D43D18D319 rcr r8w, word ptr [r9], cl +XDIS 49d1: ROTATE APXEVEX APX_F 62D4BD18D319 rcr r8, qword ptr [r9], cl +XDIS 49d7: ROTATE APXEVEX APX_F 62D43C18C0D902 rcr r8b, r9b, 0x2 +XDIS 49de: ROTATE APXEVEX APX_F 62D43C18C01902 rcr r8b, byte ptr [r9], 0x2 +XDIS 49e5: ROTATE APXEVEX APX_F 62D47C08C1D802 rcr r8d, 0x2 +XDIS 49ec: ROTATE APXEVEX APX_F 62D4FC08C1D802 rcr r8, 0x2 +XDIS 49f3: ROTATE APXEVEX APX_F 62D47C08C11802 rcr dword ptr [r8], 0x2 +XDIS 49fa: ROTATE APXEVEX APX_F 62D4FC08C11802 rcr qword ptr [r8], 0x2 +XDIS 4a01: ROTATE APXEVEX APX_F 62D47D08C1D802 rcr r8w, 0x2 +XDIS 4a08: ROTATE APXEVEX APX_F 62D4FD08C1D802 rcr r8, 0x2 +XDIS 4a0f: ROTATE APXEVEX APX_F 62D47D08C11802 rcr word ptr [r8], 0x2 +XDIS 4a16: ROTATE APXEVEX APX_F 62D4FD08C11802 rcr qword ptr [r8], 0x2 +XDIS 4a1d: ROTATE APXEVEX APX_F 62D47C08C0C002 rol r8b, 0x2 +XDIS 4a24: ROTATE APXEVEX APX_F 62D47C08C00002 rol byte ptr [r8], 0x2 +XDIS 4a2b: ROTATE APXEVEX APX_F 62D47C0CC0C002 rol r8b, 0x2 +XDIS 4a32: ROTATE APXEVEX APX_F 62D47C0CC00002 rol byte ptr [r8], 0x2 +XDIS 4a39: ROTATE APXEVEX APX_F 62D43C18C1C102 rol r8d, r9d, 0x2 +XDIS 4a40: ROTATE APXEVEX APX_F 62D4BC18C1C102 rol r8, r9, 0x2 +XDIS 4a47: ROTATE APXEVEX APX_F 62D43C18C10102 rol r8d, dword ptr [r9], 0x2 +XDIS 4a4e: ROTATE APXEVEX APX_F 62D4BC18C10102 rol r8, qword ptr [r9], 0x2 +XDIS 4a55: ROTATE APXEVEX APX_F 62D43C1CC1C102 rol r8d, r9d, 0x2 +XDIS 4a5c: ROTATE APXEVEX APX_F 62D4BC1CC1C102 rol r8, r9, 0x2 +XDIS 4a63: ROTATE APXEVEX APX_F 62D43C1CC10102 rol r8d, dword ptr [r9], 0x2 +XDIS 4a6a: ROTATE APXEVEX APX_F 62D4BC1CC10102 rol r8, qword ptr [r9], 0x2 +XDIS 4a71: ROTATE APXEVEX APX_F 62D43D18C1C102 rol r8w, r9w, 0x2 +XDIS 4a78: ROTATE APXEVEX APX_F 62D4BD18C1C102 rol r8, r9, 0x2 +XDIS 4a7f: ROTATE APXEVEX APX_F 62D43D18C10102 rol r8w, word ptr [r9], 0x2 +XDIS 4a86: ROTATE APXEVEX APX_F 62D4BD18C10102 rol r8, qword ptr [r9], 0x2 +XDIS 4a8d: ROTATE APXEVEX APX_F 62D43D1CC1C102 rol r8w, r9w, 0x2 +XDIS 4a94: ROTATE APXEVEX APX_F 62D4BD1CC1C102 rol r8, r9, 0x2 +XDIS 4a9b: ROTATE APXEVEX APX_F 62D43D1CC10102 rol r8w, word ptr [r9], 0x2 +XDIS 4aa2: ROTATE APXEVEX APX_F 62D4BD1CC10102 rol r8, qword ptr [r9], 0x2 +XDIS 4aa9: ROTATE APXEVEX APX_F 62D47C08D0C0 rol r8b, 0x1 +XDIS 4aaf: ROTATE APXEVEX APX_F 62D47C08D000 rol byte ptr [r8], 0x1 +XDIS 4ab5: ROTATE APXEVEX APX_F 62D47C0CD0C0 rol r8b, 0x1 +XDIS 4abb: ROTATE APXEVEX APX_F 62D47C0CD000 rol byte ptr [r8], 0x1 +XDIS 4ac1: ROTATE APXEVEX APX_F 62D43C18D0C1 rol r8b, r9b, 0x1 +XDIS 4ac7: ROTATE APXEVEX APX_F 62D43C18D001 rol r8b, byte ptr [r9], 0x1 +XDIS 4acd: ROTATE APXEVEX APX_F 62D43C1CD0C1 rol r8b, r9b, 0x1 +XDIS 4ad3: ROTATE APXEVEX APX_F 62D43C1CD001 rol r8b, byte ptr [r9], 0x1 +XDIS 4ad9: ROTATE APXEVEX APX_F 62D47C08D1C0 rol r8d, 0x1 +XDIS 4adf: ROTATE APXEVEX APX_F 62D4FC08D1C0 rol r8, 0x1 +XDIS 4ae5: ROTATE APXEVEX APX_F 62D47C08D100 rol dword ptr [r8], 0x1 +XDIS 4aeb: ROTATE APXEVEX APX_F 62D4FC08D100 rol qword ptr [r8], 0x1 +XDIS 4af1: ROTATE APXEVEX APX_F 62D47C0CD1C0 rol r8d, 0x1 +XDIS 4af7: ROTATE APXEVEX APX_F 62D4FC0CD1C0 rol r8, 0x1 +XDIS 4afd: ROTATE APXEVEX APX_F 62D47C0CD100 rol dword ptr [r8], 0x1 +XDIS 4b03: ROTATE APXEVEX APX_F 62D4FC0CD100 rol qword ptr [r8], 0x1 +XDIS 4b09: ROTATE APXEVEX APX_F 62D47D08D1C0 rol r8w, 0x1 +XDIS 4b0f: ROTATE APXEVEX APX_F 62D4FD08D1C0 rol r8, 0x1 +XDIS 4b15: ROTATE APXEVEX APX_F 62D47D08D100 rol word ptr [r8], 0x1 +XDIS 4b1b: ROTATE APXEVEX APX_F 62D4FD08D100 rol qword ptr [r8], 0x1 +XDIS 4b21: ROTATE APXEVEX APX_F 62D47D0CD1C0 rol r8w, 0x1 +XDIS 4b27: ROTATE APXEVEX APX_F 62D4FD0CD1C0 rol r8, 0x1 +XDIS 4b2d: ROTATE APXEVEX APX_F 62D47D0CD100 rol word ptr [r8], 0x1 +XDIS 4b33: ROTATE APXEVEX APX_F 62D4FD0CD100 rol qword ptr [r8], 0x1 +XDIS 4b39: ROTATE APXEVEX APX_F 62D43C18D1C1 rol r8d, r9d, 0x1 +XDIS 4b3f: ROTATE APXEVEX APX_F 62D4BC18D1C1 rol r8, r9, 0x1 +XDIS 4b45: ROTATE APXEVEX APX_F 62D43C18D101 rol r8d, dword ptr [r9], 0x1 +XDIS 4b4b: ROTATE APXEVEX APX_F 62D4BC18D101 rol r8, qword ptr [r9], 0x1 +XDIS 4b51: ROTATE APXEVEX APX_F 62D43C1CD1C1 rol r8d, r9d, 0x1 +XDIS 4b57: ROTATE APXEVEX APX_F 62D4BC1CD1C1 rol r8, r9, 0x1 +XDIS 4b5d: ROTATE APXEVEX APX_F 62D43C1CD101 rol r8d, dword ptr [r9], 0x1 +XDIS 4b63: ROTATE APXEVEX APX_F 62D4BC1CD101 rol r8, qword ptr [r9], 0x1 +XDIS 4b69: ROTATE APXEVEX APX_F 62D43D18D1C1 rol r8w, r9w, 0x1 +XDIS 4b6f: ROTATE APXEVEX APX_F 62D4BD18D1C1 rol r8, r9, 0x1 +XDIS 4b75: ROTATE APXEVEX APX_F 62D43D18D101 rol r8w, word ptr [r9], 0x1 +XDIS 4b7b: ROTATE APXEVEX APX_F 62D4BD18D101 rol r8, qword ptr [r9], 0x1 +XDIS 4b81: ROTATE APXEVEX APX_F 62D43D1CD1C1 rol r8w, r9w, 0x1 +XDIS 4b87: ROTATE APXEVEX APX_F 62D4BD1CD1C1 rol r8, r9, 0x1 +XDIS 4b8d: ROTATE APXEVEX APX_F 62D43D1CD101 rol r8w, word ptr [r9], 0x1 +XDIS 4b93: ROTATE APXEVEX APX_F 62D4BD1CD101 rol r8, qword ptr [r9], 0x1 +XDIS 4b99: ROTATE APXEVEX APX_F 62D47C08D2C0 rol r8b, cl +XDIS 4b9f: ROTATE APXEVEX APX_F 62D47C08D200 rol byte ptr [r8], cl +XDIS 4ba5: ROTATE APXEVEX APX_F 62D47C0CD2C0 rol r8b, cl +XDIS 4bab: ROTATE APXEVEX APX_F 62D47C0CD200 rol byte ptr [r8], cl +XDIS 4bb1: ROTATE APXEVEX APX_F 62D43C18D2C1 rol r8b, r9b, cl +XDIS 4bb7: ROTATE APXEVEX APX_F 62D43C18D201 rol r8b, byte ptr [r9], cl +XDIS 4bbd: ROTATE APXEVEX APX_F 62D43C1CD2C1 rol r8b, r9b, cl +XDIS 4bc3: ROTATE APXEVEX APX_F 62D43C1CD201 rol r8b, byte ptr [r9], cl +XDIS 4bc9: ROTATE APXEVEX APX_F 62D47C08D3C0 rol r8d, cl +XDIS 4bcf: ROTATE APXEVEX APX_F 62D4FC08D3C0 rol r8, cl +XDIS 4bd5: ROTATE APXEVEX APX_F 62D47C08D300 rol dword ptr [r8], cl +XDIS 4bdb: ROTATE APXEVEX APX_F 62D4FC08D300 rol qword ptr [r8], cl +XDIS 4be1: ROTATE APXEVEX APX_F 62D47C0CD3C0 rol r8d, cl +XDIS 4be7: ROTATE APXEVEX APX_F 62D4FC0CD3C0 rol r8, cl +XDIS 4bed: ROTATE APXEVEX APX_F 62D47C0CD300 rol dword ptr [r8], cl +XDIS 4bf3: ROTATE APXEVEX APX_F 62D4FC0CD300 rol qword ptr [r8], cl +XDIS 4bf9: ROTATE APXEVEX APX_F 62D47D08D3C0 rol r8w, cl +XDIS 4bff: ROTATE APXEVEX APX_F 62D4FD08D3C0 rol r8, cl +XDIS 4c05: ROTATE APXEVEX APX_F 62D47D08D300 rol word ptr [r8], cl +XDIS 4c0b: ROTATE APXEVEX APX_F 62D4FD08D300 rol qword ptr [r8], cl +XDIS 4c11: ROTATE APXEVEX APX_F 62D47D0CD3C0 rol r8w, cl +XDIS 4c17: ROTATE APXEVEX APX_F 62D4FD0CD3C0 rol r8, cl +XDIS 4c1d: ROTATE APXEVEX APX_F 62D47D0CD300 rol word ptr [r8], cl +XDIS 4c23: ROTATE APXEVEX APX_F 62D4FD0CD300 rol qword ptr [r8], cl +XDIS 4c29: ROTATE APXEVEX APX_F 62D43C18D3C1 rol r8d, r9d, cl +XDIS 4c2f: ROTATE APXEVEX APX_F 62D4BC18D3C1 rol r8, r9, cl +XDIS 4c35: ROTATE APXEVEX APX_F 62D43C18D301 rol r8d, dword ptr [r9], cl +XDIS 4c3b: ROTATE APXEVEX APX_F 62D4BC18D301 rol r8, qword ptr [r9], cl +XDIS 4c41: ROTATE APXEVEX APX_F 62D43C1CD3C1 rol r8d, r9d, cl +XDIS 4c47: ROTATE APXEVEX APX_F 62D4BC1CD3C1 rol r8, r9, cl +XDIS 4c4d: ROTATE APXEVEX APX_F 62D43C1CD301 rol r8d, dword ptr [r9], cl +XDIS 4c53: ROTATE APXEVEX APX_F 62D4BC1CD301 rol r8, qword ptr [r9], cl +XDIS 4c59: ROTATE APXEVEX APX_F 62D43D18D3C1 rol r8w, r9w, cl +XDIS 4c5f: ROTATE APXEVEX APX_F 62D4BD18D3C1 rol r8, r9, cl +XDIS 4c65: ROTATE APXEVEX APX_F 62D43D18D301 rol r8w, word ptr [r9], cl +XDIS 4c6b: ROTATE APXEVEX APX_F 62D4BD18D301 rol r8, qword ptr [r9], cl +XDIS 4c71: ROTATE APXEVEX APX_F 62D43D1CD3C1 rol r8w, r9w, cl +XDIS 4c77: ROTATE APXEVEX APX_F 62D4BD1CD3C1 rol r8, r9, cl +XDIS 4c7d: ROTATE APXEVEX APX_F 62D43D1CD301 rol r8w, word ptr [r9], cl +XDIS 4c83: ROTATE APXEVEX APX_F 62D4BD1CD301 rol r8, qword ptr [r9], cl +XDIS 4c89: ROTATE APXEVEX APX_F 62D43C18C0C102 rol r8b, r9b, 0x2 +XDIS 4c90: ROTATE APXEVEX APX_F 62D43C18C00102 rol r8b, byte ptr [r9], 0x2 +XDIS 4c97: ROTATE APXEVEX APX_F 62D43C1CC0C102 rol r8b, r9b, 0x2 +XDIS 4c9e: ROTATE APXEVEX APX_F 62D43C1CC00102 rol r8b, byte ptr [r9], 0x2 +XDIS 4ca5: ROTATE APXEVEX APX_F 62D47C08C1C002 rol r8d, 0x2 +XDIS 4cac: ROTATE APXEVEX APX_F 62D4FC08C1C002 rol r8, 0x2 +XDIS 4cb3: ROTATE APXEVEX APX_F 62D47C08C10002 rol dword ptr [r8], 0x2 +XDIS 4cba: ROTATE APXEVEX APX_F 62D4FC08C10002 rol qword ptr [r8], 0x2 +XDIS 4cc1: ROTATE APXEVEX APX_F 62D47C0CC1C002 rol r8d, 0x2 +XDIS 4cc8: ROTATE APXEVEX APX_F 62D4FC0CC1C002 rol r8, 0x2 +XDIS 4ccf: ROTATE APXEVEX APX_F 62D47C0CC10002 rol dword ptr [r8], 0x2 +XDIS 4cd6: ROTATE APXEVEX APX_F 62D4FC0CC10002 rol qword ptr [r8], 0x2 +XDIS 4cdd: ROTATE APXEVEX APX_F 62D47D08C1C002 rol r8w, 0x2 +XDIS 4ce4: ROTATE APXEVEX APX_F 62D4FD08C1C002 rol r8, 0x2 +XDIS 4ceb: ROTATE APXEVEX APX_F 62D47D08C10002 rol word ptr [r8], 0x2 +XDIS 4cf2: ROTATE APXEVEX APX_F 62D4FD08C10002 rol qword ptr [r8], 0x2 +XDIS 4cf9: ROTATE APXEVEX APX_F 62D47D0CC1C002 rol r8w, 0x2 +XDIS 4d00: ROTATE APXEVEX APX_F 62D4FD0CC1C002 rol r8, 0x2 +XDIS 4d07: ROTATE APXEVEX APX_F 62D47D0CC10002 rol word ptr [r8], 0x2 +XDIS 4d0e: ROTATE APXEVEX APX_F 62D4FD0CC10002 rol qword ptr [r8], 0x2 +XDIS 4d15: ROTATE APXEVEX APX_F 62D47C08C0C802 ror r8b, 0x2 +XDIS 4d1c: ROTATE APXEVEX APX_F 62D47C08C00802 ror byte ptr [r8], 0x2 +XDIS 4d23: ROTATE APXEVEX APX_F 62D47C0CC0C802 ror r8b, 0x2 +XDIS 4d2a: ROTATE APXEVEX APX_F 62D47C0CC00802 ror byte ptr [r8], 0x2 +XDIS 4d31: ROTATE APXEVEX APX_F 62D43C18C1C902 ror r8d, r9d, 0x2 +XDIS 4d38: ROTATE APXEVEX APX_F 62D4BC18C1C902 ror r8, r9, 0x2 +XDIS 4d3f: ROTATE APXEVEX APX_F 62D43C18C10902 ror r8d, dword ptr [r9], 0x2 +XDIS 4d46: ROTATE APXEVEX APX_F 62D4BC18C10902 ror r8, qword ptr [r9], 0x2 +XDIS 4d4d: ROTATE APXEVEX APX_F 62D43C1CC1C902 ror r8d, r9d, 0x2 +XDIS 4d54: ROTATE APXEVEX APX_F 62D4BC1CC1C902 ror r8, r9, 0x2 +XDIS 4d5b: ROTATE APXEVEX APX_F 62D43C1CC10902 ror r8d, dword ptr [r9], 0x2 +XDIS 4d62: ROTATE APXEVEX APX_F 62D4BC1CC10902 ror r8, qword ptr [r9], 0x2 +XDIS 4d69: ROTATE APXEVEX APX_F 62D43D18C1C902 ror r8w, r9w, 0x2 +XDIS 4d70: ROTATE APXEVEX APX_F 62D4BD18C1C902 ror r8, r9, 0x2 +XDIS 4d77: ROTATE APXEVEX APX_F 62D43D18C10902 ror r8w, word ptr [r9], 0x2 +XDIS 4d7e: ROTATE APXEVEX APX_F 62D4BD18C10902 ror r8, qword ptr [r9], 0x2 +XDIS 4d85: ROTATE APXEVEX APX_F 62D43D1CC1C902 ror r8w, r9w, 0x2 +XDIS 4d8c: ROTATE APXEVEX APX_F 62D4BD1CC1C902 ror r8, r9, 0x2 +XDIS 4d93: ROTATE APXEVEX APX_F 62D43D1CC10902 ror r8w, word ptr [r9], 0x2 +XDIS 4d9a: ROTATE APXEVEX APX_F 62D4BD1CC10902 ror r8, qword ptr [r9], 0x2 +XDIS 4da1: ROTATE APXEVEX APX_F 62D47C08D0C8 ror r8b, 0x1 +XDIS 4da7: ROTATE APXEVEX APX_F 62D47C08D008 ror byte ptr [r8], 0x1 +XDIS 4dad: ROTATE APXEVEX APX_F 62D47C0CD0C8 ror r8b, 0x1 +XDIS 4db3: ROTATE APXEVEX APX_F 62D47C0CD008 ror byte ptr [r8], 0x1 +XDIS 4db9: ROTATE APXEVEX APX_F 62D43C18D0C9 ror r8b, r9b, 0x1 +XDIS 4dbf: ROTATE APXEVEX APX_F 62D43C18D009 ror r8b, byte ptr [r9], 0x1 +XDIS 4dc5: ROTATE APXEVEX APX_F 62D43C1CD0C9 ror r8b, r9b, 0x1 +XDIS 4dcb: ROTATE APXEVEX APX_F 62D43C1CD009 ror r8b, byte ptr [r9], 0x1 +XDIS 4dd1: ROTATE APXEVEX APX_F 62D47C08D1C8 ror r8d, 0x1 +XDIS 4dd7: ROTATE APXEVEX APX_F 62D4FC08D1C8 ror r8, 0x1 +XDIS 4ddd: ROTATE APXEVEX APX_F 62D47C08D108 ror dword ptr [r8], 0x1 +XDIS 4de3: ROTATE APXEVEX APX_F 62D4FC08D108 ror qword ptr [r8], 0x1 +XDIS 4de9: ROTATE APXEVEX APX_F 62D47C0CD1C8 ror r8d, 0x1 +XDIS 4def: ROTATE APXEVEX APX_F 62D4FC0CD1C8 ror r8, 0x1 +XDIS 4df5: ROTATE APXEVEX APX_F 62D47C0CD108 ror dword ptr [r8], 0x1 +XDIS 4dfb: ROTATE APXEVEX APX_F 62D4FC0CD108 ror qword ptr [r8], 0x1 +XDIS 4e01: ROTATE APXEVEX APX_F 62D47D08D1C8 ror r8w, 0x1 +XDIS 4e07: ROTATE APXEVEX APX_F 62D4FD08D1C8 ror r8, 0x1 +XDIS 4e0d: ROTATE APXEVEX APX_F 62D47D08D108 ror word ptr [r8], 0x1 +XDIS 4e13: ROTATE APXEVEX APX_F 62D4FD08D108 ror qword ptr [r8], 0x1 +XDIS 4e19: ROTATE APXEVEX APX_F 62D47D0CD1C8 ror r8w, 0x1 +XDIS 4e1f: ROTATE APXEVEX APX_F 62D4FD0CD1C8 ror r8, 0x1 +XDIS 4e25: ROTATE APXEVEX APX_F 62D47D0CD108 ror word ptr [r8], 0x1 +XDIS 4e2b: ROTATE APXEVEX APX_F 62D4FD0CD108 ror qword ptr [r8], 0x1 +XDIS 4e31: ROTATE APXEVEX APX_F 62D43C18D1C9 ror r8d, r9d, 0x1 +XDIS 4e37: ROTATE APXEVEX APX_F 62D4BC18D1C9 ror r8, r9, 0x1 +XDIS 4e3d: ROTATE APXEVEX APX_F 62D43C18D109 ror r8d, dword ptr [r9], 0x1 +XDIS 4e43: ROTATE APXEVEX APX_F 62D4BC18D109 ror r8, qword ptr [r9], 0x1 +XDIS 4e49: ROTATE APXEVEX APX_F 62D43C1CD1C9 ror r8d, r9d, 0x1 +XDIS 4e4f: ROTATE APXEVEX APX_F 62D4BC1CD1C9 ror r8, r9, 0x1 +XDIS 4e55: ROTATE APXEVEX APX_F 62D43C1CD109 ror r8d, dword ptr [r9], 0x1 +XDIS 4e5b: ROTATE APXEVEX APX_F 62D4BC1CD109 ror r8, qword ptr [r9], 0x1 +XDIS 4e61: ROTATE APXEVEX APX_F 62D43D18D1C9 ror r8w, r9w, 0x1 +XDIS 4e67: ROTATE APXEVEX APX_F 62D4BD18D1C9 ror r8, r9, 0x1 +XDIS 4e6d: ROTATE APXEVEX APX_F 62D43D18D109 ror r8w, word ptr [r9], 0x1 +XDIS 4e73: ROTATE APXEVEX APX_F 62D4BD18D109 ror r8, qword ptr [r9], 0x1 +XDIS 4e79: ROTATE APXEVEX APX_F 62D43D1CD1C9 ror r8w, r9w, 0x1 +XDIS 4e7f: ROTATE APXEVEX APX_F 62D4BD1CD1C9 ror r8, r9, 0x1 +XDIS 4e85: ROTATE APXEVEX APX_F 62D43D1CD109 ror r8w, word ptr [r9], 0x1 +XDIS 4e8b: ROTATE APXEVEX APX_F 62D4BD1CD109 ror r8, qword ptr [r9], 0x1 +XDIS 4e91: ROTATE APXEVEX APX_F 62D47C08D2C8 ror r8b, cl +XDIS 4e97: ROTATE APXEVEX APX_F 62D47C08D208 ror byte ptr [r8], cl +XDIS 4e9d: ROTATE APXEVEX APX_F 62D47C0CD2C8 ror r8b, cl +XDIS 4ea3: ROTATE APXEVEX APX_F 62D47C0CD208 ror byte ptr [r8], cl +XDIS 4ea9: ROTATE APXEVEX APX_F 62D43C18D2C9 ror r8b, r9b, cl +XDIS 4eaf: ROTATE APXEVEX APX_F 62D43C18D209 ror r8b, byte ptr [r9], cl +XDIS 4eb5: ROTATE APXEVEX APX_F 62D43C1CD2C9 ror r8b, r9b, cl +XDIS 4ebb: ROTATE APXEVEX APX_F 62D43C1CD209 ror r8b, byte ptr [r9], cl +XDIS 4ec1: ROTATE APXEVEX APX_F 62D47C08D3C8 ror r8d, cl +XDIS 4ec7: ROTATE APXEVEX APX_F 62D4FC08D3C8 ror r8, cl +XDIS 4ecd: ROTATE APXEVEX APX_F 62D47C08D308 ror dword ptr [r8], cl +XDIS 4ed3: ROTATE APXEVEX APX_F 62D4FC08D308 ror qword ptr [r8], cl +XDIS 4ed9: ROTATE APXEVEX APX_F 62D47C0CD3C8 ror r8d, cl +XDIS 4edf: ROTATE APXEVEX APX_F 62D4FC0CD3C8 ror r8, cl +XDIS 4ee5: ROTATE APXEVEX APX_F 62D47C0CD308 ror dword ptr [r8], cl +XDIS 4eeb: ROTATE APXEVEX APX_F 62D4FC0CD308 ror qword ptr [r8], cl +XDIS 4ef1: ROTATE APXEVEX APX_F 62D47D08D3C8 ror r8w, cl +XDIS 4ef7: ROTATE APXEVEX APX_F 62D4FD08D3C8 ror r8, cl +XDIS 4efd: ROTATE APXEVEX APX_F 62D47D08D308 ror word ptr [r8], cl +XDIS 4f03: ROTATE APXEVEX APX_F 62D4FD08D308 ror qword ptr [r8], cl +XDIS 4f09: ROTATE APXEVEX APX_F 62D47D0CD3C8 ror r8w, cl +XDIS 4f0f: ROTATE APXEVEX APX_F 62D4FD0CD3C8 ror r8, cl +XDIS 4f15: ROTATE APXEVEX APX_F 62D47D0CD308 ror word ptr [r8], cl +XDIS 4f1b: ROTATE APXEVEX APX_F 62D4FD0CD308 ror qword ptr [r8], cl +XDIS 4f21: ROTATE APXEVEX APX_F 62D43C18D3C9 ror r8d, r9d, cl +XDIS 4f27: ROTATE APXEVEX APX_F 62D4BC18D3C9 ror r8, r9, cl +XDIS 4f2d: ROTATE APXEVEX APX_F 62D43C18D309 ror r8d, dword ptr [r9], cl +XDIS 4f33: ROTATE APXEVEX APX_F 62D4BC18D309 ror r8, qword ptr [r9], cl +XDIS 4f39: ROTATE APXEVEX APX_F 62D43C1CD3C9 ror r8d, r9d, cl +XDIS 4f3f: ROTATE APXEVEX APX_F 62D4BC1CD3C9 ror r8, r9, cl +XDIS 4f45: ROTATE APXEVEX APX_F 62D43C1CD309 ror r8d, dword ptr [r9], cl +XDIS 4f4b: ROTATE APXEVEX APX_F 62D4BC1CD309 ror r8, qword ptr [r9], cl +XDIS 4f51: ROTATE APXEVEX APX_F 62D43D18D3C9 ror r8w, r9w, cl +XDIS 4f57: ROTATE APXEVEX APX_F 62D4BD18D3C9 ror r8, r9, cl +XDIS 4f5d: ROTATE APXEVEX APX_F 62D43D18D309 ror r8w, word ptr [r9], cl +XDIS 4f63: ROTATE APXEVEX APX_F 62D4BD18D309 ror r8, qword ptr [r9], cl +XDIS 4f69: ROTATE APXEVEX APX_F 62D43D1CD3C9 ror r8w, r9w, cl +XDIS 4f6f: ROTATE APXEVEX APX_F 62D4BD1CD3C9 ror r8, r9, cl +XDIS 4f75: ROTATE APXEVEX APX_F 62D43D1CD309 ror r8w, word ptr [r9], cl +XDIS 4f7b: ROTATE APXEVEX APX_F 62D4BD1CD309 ror r8, qword ptr [r9], cl +XDIS 4f81: ROTATE APXEVEX APX_F 62D43C18C0C902 ror r8b, r9b, 0x2 +XDIS 4f88: ROTATE APXEVEX APX_F 62D43C18C00902 ror r8b, byte ptr [r9], 0x2 +XDIS 4f8f: ROTATE APXEVEX APX_F 62D43C1CC0C902 ror r8b, r9b, 0x2 +XDIS 4f96: ROTATE APXEVEX APX_F 62D43C1CC00902 ror r8b, byte ptr [r9], 0x2 +XDIS 4f9d: ROTATE APXEVEX APX_F 62D47C08C1C802 ror r8d, 0x2 +XDIS 4fa4: ROTATE APXEVEX APX_F 62D4FC08C1C802 ror r8, 0x2 +XDIS 4fab: ROTATE APXEVEX APX_F 62D47C08C10802 ror dword ptr [r8], 0x2 +XDIS 4fb2: ROTATE APXEVEX APX_F 62D4FC08C10802 ror qword ptr [r8], 0x2 +XDIS 4fb9: ROTATE APXEVEX APX_F 62D47C0CC1C802 ror r8d, 0x2 +XDIS 4fc0: ROTATE APXEVEX APX_F 62D4FC0CC1C802 ror r8, 0x2 +XDIS 4fc7: ROTATE APXEVEX APX_F 62D47C0CC10802 ror dword ptr [r8], 0x2 +XDIS 4fce: ROTATE APXEVEX APX_F 62D4FC0CC10802 ror qword ptr [r8], 0x2 +XDIS 4fd5: ROTATE APXEVEX APX_F 62D47D08C1C802 ror r8w, 0x2 +XDIS 4fdc: ROTATE APXEVEX APX_F 62D4FD08C1C802 ror r8, 0x2 +XDIS 4fe3: ROTATE APXEVEX APX_F 62D47D08C10802 ror word ptr [r8], 0x2 +XDIS 4fea: ROTATE APXEVEX APX_F 62D4FD08C10802 ror qword ptr [r8], 0x2 +XDIS 4ff1: ROTATE APXEVEX APX_F 62D47D0CC1C802 ror r8w, 0x2 +XDIS 4ff8: ROTATE APXEVEX APX_F 62D4FD0CC1C802 ror r8, 0x2 +XDIS 4fff: ROTATE APXEVEX APX_F 62D47D0CC10802 ror word ptr [r8], 0x2 +XDIS 5006: ROTATE APXEVEX APX_F 62D4FD0CC10802 ror qword ptr [r8], 0x2 +XDIS 500d: BMI2 APXEVEX APX_F 62537F08F0C102 rorx r8d, r9d, 0x2 +XDIS 5014: BMI2 APXEVEX APX_F 62537F08F00102 rorx r8d, dword ptr [r9], 0x2 +XDIS 501b: BMI2 APXEVEX APX_F 6253FF08F0C102 rorx r8, r9, 0x2 +XDIS 5022: BMI2 APXEVEX APX_F 6253FF08F00102 rorx r8, qword ptr [r9], 0x2 +XDIS 5029: SHIFT APXEVEX APX_F 62D47C08C0F802 sar r8b, 0x2 +XDIS 5030: SHIFT APXEVEX APX_F 62D47C08C03802 sar byte ptr [r8], 0x2 +XDIS 5037: SHIFT APXEVEX APX_F 62D47C0CC0F802 sar r8b, 0x2 +XDIS 503e: SHIFT APXEVEX APX_F 62D47C0CC03802 sar byte ptr [r8], 0x2 +XDIS 5045: SHIFT APXEVEX APX_F 62D43C18C1F902 sar r8d, r9d, 0x2 +XDIS 504c: SHIFT APXEVEX APX_F 62D4BC18C1F902 sar r8, r9, 0x2 +XDIS 5053: SHIFT APXEVEX APX_F 62D43C18C13902 sar r8d, dword ptr [r9], 0x2 +XDIS 505a: SHIFT APXEVEX APX_F 62D4BC18C13902 sar r8, qword ptr [r9], 0x2 +XDIS 5061: SHIFT APXEVEX APX_F 62D43C1CC1F902 sar r8d, r9d, 0x2 +XDIS 5068: SHIFT APXEVEX APX_F 62D4BC1CC1F902 sar r8, r9, 0x2 +XDIS 506f: SHIFT APXEVEX APX_F 62D43C1CC13902 sar r8d, dword ptr [r9], 0x2 +XDIS 5076: SHIFT APXEVEX APX_F 62D4BC1CC13902 sar r8, qword ptr [r9], 0x2 +XDIS 507d: SHIFT APXEVEX APX_F 62D43D18C1F902 sar r8w, r9w, 0x2 +XDIS 5084: SHIFT APXEVEX APX_F 62D4BD18C1F902 sar r8, r9, 0x2 +XDIS 508b: SHIFT APXEVEX APX_F 62D43D18C13902 sar r8w, word ptr [r9], 0x2 +XDIS 5092: SHIFT APXEVEX APX_F 62D4BD18C13902 sar r8, qword ptr [r9], 0x2 +XDIS 5099: SHIFT APXEVEX APX_F 62D43D1CC1F902 sar r8w, r9w, 0x2 +XDIS 50a0: SHIFT APXEVEX APX_F 62D4BD1CC1F902 sar r8, r9, 0x2 +XDIS 50a7: SHIFT APXEVEX APX_F 62D43D1CC13902 sar r8w, word ptr [r9], 0x2 +XDIS 50ae: SHIFT APXEVEX APX_F 62D4BD1CC13902 sar r8, qword ptr [r9], 0x2 +XDIS 50b5: SHIFT APXEVEX APX_F 62D47C08D0F8 sar r8b, 0x1 +XDIS 50bb: SHIFT APXEVEX APX_F 62D47C08D038 sar byte ptr [r8], 0x1 +XDIS 50c1: SHIFT APXEVEX APX_F 62D47C0CD0F8 sar r8b, 0x1 +XDIS 50c7: SHIFT APXEVEX APX_F 62D47C0CD038 sar byte ptr [r8], 0x1 +XDIS 50cd: SHIFT APXEVEX APX_F 62D43C18D0F9 sar r8b, r9b, 0x1 +XDIS 50d3: SHIFT APXEVEX APX_F 62D43C18D039 sar r8b, byte ptr [r9], 0x1 +XDIS 50d9: SHIFT APXEVEX APX_F 62D43C1CD0F9 sar r8b, r9b, 0x1 +XDIS 50df: SHIFT APXEVEX APX_F 62D43C1CD039 sar r8b, byte ptr [r9], 0x1 +XDIS 50e5: SHIFT APXEVEX APX_F 62D47C08D1F8 sar r8d, 0x1 +XDIS 50eb: SHIFT APXEVEX APX_F 62D4FC08D1F8 sar r8, 0x1 +XDIS 50f1: SHIFT APXEVEX APX_F 62D47C08D138 sar dword ptr [r8], 0x1 +XDIS 50f7: SHIFT APXEVEX APX_F 62D4FC08D138 sar qword ptr [r8], 0x1 +XDIS 50fd: SHIFT APXEVEX APX_F 62D47C0CD1F8 sar r8d, 0x1 +XDIS 5103: SHIFT APXEVEX APX_F 62D4FC0CD1F8 sar r8, 0x1 +XDIS 5109: SHIFT APXEVEX APX_F 62D47C0CD138 sar dword ptr [r8], 0x1 +XDIS 510f: SHIFT APXEVEX APX_F 62D4FC0CD138 sar qword ptr [r8], 0x1 +XDIS 5115: SHIFT APXEVEX APX_F 62D47D08D1F8 sar r8w, 0x1 +XDIS 511b: SHIFT APXEVEX APX_F 62D4FD08D1F8 sar r8, 0x1 +XDIS 5121: SHIFT APXEVEX APX_F 62D47D08D138 sar word ptr [r8], 0x1 +XDIS 5127: SHIFT APXEVEX APX_F 62D4FD08D138 sar qword ptr [r8], 0x1 +XDIS 512d: SHIFT APXEVEX APX_F 62D47D0CD1F8 sar r8w, 0x1 +XDIS 5133: SHIFT APXEVEX APX_F 62D4FD0CD1F8 sar r8, 0x1 +XDIS 5139: SHIFT APXEVEX APX_F 62D47D0CD138 sar word ptr [r8], 0x1 +XDIS 513f: SHIFT APXEVEX APX_F 62D4FD0CD138 sar qword ptr [r8], 0x1 +XDIS 5145: SHIFT APXEVEX APX_F 62D43C18D1F9 sar r8d, r9d, 0x1 +XDIS 514b: SHIFT APXEVEX APX_F 62D4BC18D1F9 sar r8, r9, 0x1 +XDIS 5151: SHIFT APXEVEX APX_F 62D43C18D139 sar r8d, dword ptr [r9], 0x1 +XDIS 5157: SHIFT APXEVEX APX_F 62D4BC18D139 sar r8, qword ptr [r9], 0x1 +XDIS 515d: SHIFT APXEVEX APX_F 62D43C1CD1F9 sar r8d, r9d, 0x1 +XDIS 5163: SHIFT APXEVEX APX_F 62D4BC1CD1F9 sar r8, r9, 0x1 +XDIS 5169: SHIFT APXEVEX APX_F 62D43C1CD139 sar r8d, dword ptr [r9], 0x1 +XDIS 516f: SHIFT APXEVEX APX_F 62D4BC1CD139 sar r8, qword ptr [r9], 0x1 +XDIS 5175: SHIFT APXEVEX APX_F 62D43D18D1F9 sar r8w, r9w, 0x1 +XDIS 517b: SHIFT APXEVEX APX_F 62D4BD18D1F9 sar r8, r9, 0x1 +XDIS 5181: SHIFT APXEVEX APX_F 62D43D18D139 sar r8w, word ptr [r9], 0x1 +XDIS 5187: SHIFT APXEVEX APX_F 62D4BD18D139 sar r8, qword ptr [r9], 0x1 +XDIS 518d: SHIFT APXEVEX APX_F 62D43D1CD1F9 sar r8w, r9w, 0x1 +XDIS 5193: SHIFT APXEVEX APX_F 62D4BD1CD1F9 sar r8, r9, 0x1 +XDIS 5199: SHIFT APXEVEX APX_F 62D43D1CD139 sar r8w, word ptr [r9], 0x1 +XDIS 519f: SHIFT APXEVEX APX_F 62D4BD1CD139 sar r8, qword ptr [r9], 0x1 +XDIS 51a5: SHIFT APXEVEX APX_F 62D47C08D2F8 sar r8b, cl +XDIS 51ab: SHIFT APXEVEX APX_F 62D47C08D238 sar byte ptr [r8], cl +XDIS 51b1: SHIFT APXEVEX APX_F 62D47C0CD2F8 sar r8b, cl +XDIS 51b7: SHIFT APXEVEX APX_F 62D47C0CD238 sar byte ptr [r8], cl +XDIS 51bd: SHIFT APXEVEX APX_F 62D43C18D2F9 sar r8b, r9b, cl +XDIS 51c3: SHIFT APXEVEX APX_F 62D43C18D239 sar r8b, byte ptr [r9], cl +XDIS 51c9: SHIFT APXEVEX APX_F 62D43C1CD2F9 sar r8b, r9b, cl +XDIS 51cf: SHIFT APXEVEX APX_F 62D43C1CD239 sar r8b, byte ptr [r9], cl +XDIS 51d5: SHIFT APXEVEX APX_F 62D47C08D3F8 sar r8d, cl +XDIS 51db: SHIFT APXEVEX APX_F 62D4FC08D3F8 sar r8, cl +XDIS 51e1: SHIFT APXEVEX APX_F 62D47C08D338 sar dword ptr [r8], cl +XDIS 51e7: SHIFT APXEVEX APX_F 62D4FC08D338 sar qword ptr [r8], cl +XDIS 51ed: SHIFT APXEVEX APX_F 62D47C0CD3F8 sar r8d, cl +XDIS 51f3: SHIFT APXEVEX APX_F 62D4FC0CD3F8 sar r8, cl +XDIS 51f9: SHIFT APXEVEX APX_F 62D47C0CD338 sar dword ptr [r8], cl +XDIS 51ff: SHIFT APXEVEX APX_F 62D4FC0CD338 sar qword ptr [r8], cl +XDIS 5205: SHIFT APXEVEX APX_F 62D47D08D3F8 sar r8w, cl +XDIS 520b: SHIFT APXEVEX APX_F 62D4FD08D3F8 sar r8, cl +XDIS 5211: SHIFT APXEVEX APX_F 62D47D08D338 sar word ptr [r8], cl +XDIS 5217: SHIFT APXEVEX APX_F 62D4FD08D338 sar qword ptr [r8], cl +XDIS 521d: SHIFT APXEVEX APX_F 62D47D0CD3F8 sar r8w, cl +XDIS 5223: SHIFT APXEVEX APX_F 62D4FD0CD3F8 sar r8, cl +XDIS 5229: SHIFT APXEVEX APX_F 62D47D0CD338 sar word ptr [r8], cl +XDIS 522f: SHIFT APXEVEX APX_F 62D4FD0CD338 sar qword ptr [r8], cl +XDIS 5235: SHIFT APXEVEX APX_F 62D43C18D3F9 sar r8d, r9d, cl +XDIS 523b: SHIFT APXEVEX APX_F 62D4BC18D3F9 sar r8, r9, cl +XDIS 5241: SHIFT APXEVEX APX_F 62D43C18D339 sar r8d, dword ptr [r9], cl +XDIS 5247: SHIFT APXEVEX APX_F 62D4BC18D339 sar r8, qword ptr [r9], cl +XDIS 524d: SHIFT APXEVEX APX_F 62D43C1CD3F9 sar r8d, r9d, cl +XDIS 5253: SHIFT APXEVEX APX_F 62D4BC1CD3F9 sar r8, r9, cl +XDIS 5259: SHIFT APXEVEX APX_F 62D43C1CD339 sar r8d, dword ptr [r9], cl +XDIS 525f: SHIFT APXEVEX APX_F 62D4BC1CD339 sar r8, qword ptr [r9], cl +XDIS 5265: SHIFT APXEVEX APX_F 62D43D18D3F9 sar r8w, r9w, cl +XDIS 526b: SHIFT APXEVEX APX_F 62D4BD18D3F9 sar r8, r9, cl +XDIS 5271: SHIFT APXEVEX APX_F 62D43D18D339 sar r8w, word ptr [r9], cl +XDIS 5277: SHIFT APXEVEX APX_F 62D4BD18D339 sar r8, qword ptr [r9], cl +XDIS 527d: SHIFT APXEVEX APX_F 62D43D1CD3F9 sar r8w, r9w, cl +XDIS 5283: SHIFT APXEVEX APX_F 62D4BD1CD3F9 sar r8, r9, cl +XDIS 5289: SHIFT APXEVEX APX_F 62D43D1CD339 sar r8w, word ptr [r9], cl +XDIS 528f: SHIFT APXEVEX APX_F 62D4BD1CD339 sar r8, qword ptr [r9], cl +XDIS 5295: SHIFT APXEVEX APX_F 62D43C18C0F902 sar r8b, r9b, 0x2 +XDIS 529c: SHIFT APXEVEX APX_F 62D43C18C03902 sar r8b, byte ptr [r9], 0x2 +XDIS 52a3: SHIFT APXEVEX APX_F 62D43C1CC0F902 sar r8b, r9b, 0x2 +XDIS 52aa: SHIFT APXEVEX APX_F 62D43C1CC03902 sar r8b, byte ptr [r9], 0x2 +XDIS 52b1: SHIFT APXEVEX APX_F 62D47C08C1F802 sar r8d, 0x2 +XDIS 52b8: SHIFT APXEVEX APX_F 62D4FC08C1F802 sar r8, 0x2 +XDIS 52bf: SHIFT APXEVEX APX_F 62D47C08C13802 sar dword ptr [r8], 0x2 +XDIS 52c6: SHIFT APXEVEX APX_F 62D4FC08C13802 sar qword ptr [r8], 0x2 +XDIS 52cd: SHIFT APXEVEX APX_F 62D47C0CC1F802 sar r8d, 0x2 +XDIS 52d4: SHIFT APXEVEX APX_F 62D4FC0CC1F802 sar r8, 0x2 +XDIS 52db: SHIFT APXEVEX APX_F 62D47C0CC13802 sar dword ptr [r8], 0x2 +XDIS 52e2: SHIFT APXEVEX APX_F 62D4FC0CC13802 sar qword ptr [r8], 0x2 +XDIS 52e9: SHIFT APXEVEX APX_F 62D47D08C1F802 sar r8w, 0x2 +XDIS 52f0: SHIFT APXEVEX APX_F 62D4FD08C1F802 sar r8, 0x2 +XDIS 52f7: SHIFT APXEVEX APX_F 62D47D08C13802 sar word ptr [r8], 0x2 +XDIS 52fe: SHIFT APXEVEX APX_F 62D4FD08C13802 sar qword ptr [r8], 0x2 +XDIS 5305: SHIFT APXEVEX APX_F 62D47D0CC1F802 sar r8w, 0x2 +XDIS 530c: SHIFT APXEVEX APX_F 62D4FD0CC1F802 sar r8, 0x2 +XDIS 5313: SHIFT APXEVEX APX_F 62D47D0CC13802 sar word ptr [r8], 0x2 +XDIS 531a: SHIFT APXEVEX APX_F 62D4FD0CC13802 sar qword ptr [r8], 0x2 +XDIS 5321: BMI2 APXEVEX APX_F 62522E08F7C1 sarx r8d, r9d, r10d +XDIS 5327: BMI2 APXEVEX APX_F 62522E08F701 sarx r8d, dword ptr [r9], r10d +XDIS 532d: BMI2 APXEVEX APX_F 6252AE08F7C1 sarx r8, r9, r10 +XDIS 5333: BMI2 APXEVEX APX_F 6252AE08F701 sarx r8, qword ptr [r9], r10 +XDIS 5339: BINARY APXEVEX APX_F 62547C0818C8 sbb r8b, r9b +XDIS 533f: BINARY APXEVEX APX_F 62547C081808 sbb byte ptr [r8], r9b +XDIS 5345: BINARY APXEVEX APX_F 62D43D1883D902 sbb r8w, r9w, 0x2 +XDIS 534c: BINARY APXEVEX APX_F 62D4BD1883D902 sbb r8, r9, 0x2 +XDIS 5353: BINARY APXEVEX APX_F 62D43D18831902 sbb r8w, word ptr [r9], 0x2 +XDIS 535a: BINARY APXEVEX APX_F 62D4BD18831902 sbb r8, qword ptr [r9], 0x2 +XDIS 5361: BINARY APXEVEX APX_F 62543C1818D1 sbb r8b, r9b, r10b +XDIS 5367: BINARY APXEVEX APX_F 62543C181811 sbb r8b, byte ptr [r9], r10b +XDIS 536d: BINARY APXEVEX APX_F 62547C0819C8 sbb r8d, r9d +XDIS 5373: BINARY APXEVEX APX_F 6254FC0819C8 sbb r8, r9 +XDIS 5379: BINARY APXEVEX APX_F 62547C081908 sbb dword ptr [r8], r9d +XDIS 537f: BINARY APXEVEX APX_F 6254FC081908 sbb qword ptr [r8], r9 +XDIS 5385: BINARY APXEVEX APX_F 62547D0819C8 sbb r8w, r9w +XDIS 538b: BINARY APXEVEX APX_F 6254FD0819C8 sbb r8, r9 +XDIS 5391: BINARY APXEVEX APX_F 62547D081908 sbb word ptr [r8], r9w +XDIS 5397: BINARY APXEVEX APX_F 6254FD081908 sbb qword ptr [r8], r9 +XDIS 539d: BINARY APXEVEX APX_F 62543C1819D1 sbb r8d, r9d, r10d +XDIS 53a3: BINARY APXEVEX APX_F 6254BC1819D1 sbb r8, r9, r10 +XDIS 53a9: BINARY APXEVEX APX_F 62543C181911 sbb r8d, dword ptr [r9], r10d +XDIS 53af: BINARY APXEVEX APX_F 6254BC181911 sbb r8, qword ptr [r9], r10 +XDIS 53b5: BINARY APXEVEX APX_F 62543D1819D1 sbb r8w, r9w, r10w +XDIS 53bb: BINARY APXEVEX APX_F 6254BD1819D1 sbb r8, r9, r10 +XDIS 53c1: BINARY APXEVEX APX_F 62543D181911 sbb r8w, word ptr [r9], r10w +XDIS 53c7: BINARY APXEVEX APX_F 6254BD181911 sbb r8, qword ptr [r9], r10 +XDIS 53cd: BINARY APXEVEX APX_F 62547C081AC8 sbb r9b, r8b +XDIS 53d3: BINARY APXEVEX APX_F 62547C081A01 sbb r8b, byte ptr [r9] +XDIS 53d9: BINARY APXEVEX APX_F 62543C181AD1 sbb r8b, r10b, r9b +XDIS 53df: BINARY APXEVEX APX_F 62543C181A0A sbb r8b, r9b, byte ptr [r10] +XDIS 53e5: BINARY APXEVEX APX_F 62547C081BC8 sbb r9d, r8d +XDIS 53eb: BINARY APXEVEX APX_F 6254FC081BC8 sbb r9, r8 +XDIS 53f1: BINARY APXEVEX APX_F 62547C081B01 sbb r8d, dword ptr [r9] +XDIS 53f7: BINARY APXEVEX APX_F 6254FC081B01 sbb r8, qword ptr [r9] +XDIS 53fd: BINARY APXEVEX APX_F 62547D081BC8 sbb r9w, r8w +XDIS 5403: BINARY APXEVEX APX_F 6254FD081BC8 sbb r9, r8 +XDIS 5409: BINARY APXEVEX APX_F 62547D081B01 sbb r8w, word ptr [r9] +XDIS 540f: BINARY APXEVEX APX_F 6254FD081B01 sbb r8, qword ptr [r9] +XDIS 5415: BINARY APXEVEX APX_F 62D43C1880D902 sbb r8b, r9b, 0x2 +XDIS 541c: BINARY APXEVEX APX_F 62D43C18801902 sbb r8b, byte ptr [r9], 0x2 +XDIS 5423: BINARY APXEVEX APX_F 62543C181BD1 sbb r8d, r10d, r9d +XDIS 5429: BINARY APXEVEX APX_F 6254BC181BD1 sbb r8, r10, r9 +XDIS 542f: BINARY APXEVEX APX_F 62543C181B0A sbb r8d, r9d, dword ptr [r10] +XDIS 5435: BINARY APXEVEX APX_F 6254BC181B0A sbb r8, r9, qword ptr [r10] +XDIS 543b: BINARY APXEVEX APX_F 62543D181BD1 sbb r8w, r10w, r9w +XDIS 5441: BINARY APXEVEX APX_F 6254BD181BD1 sbb r8, r10, r9 +XDIS 5447: BINARY APXEVEX APX_F 62543D181B0A sbb r8w, r9w, word ptr [r10] +XDIS 544d: BINARY APXEVEX APX_F 6254BD181B0A sbb r8, r9, qword ptr [r10] +XDIS 5453: BINARY APXEVEX APX_F 62D47C0880D802 sbb r8b, 0x2 +XDIS 545a: BINARY APXEVEX APX_F 62D47C08801802 sbb byte ptr [r8], 0x2 +XDIS 5461: BINARY APXEVEX APX_F 62D47C0881D802000000 sbb r8d, 0x2 +XDIS 546b: BINARY APXEVEX APX_F 62D4FC0881D802000000 sbb r8, 0x2 +XDIS 5475: BINARY APXEVEX APX_F 62D47C08811802000000 sbb dword ptr [r8], 0x2 +XDIS 547f: BINARY APXEVEX APX_F 62D4FC08811802000000 sbb qword ptr [r8], 0x2 +XDIS 5489: BINARY APXEVEX APX_F 62D47D0881D80200 sbb r8w, 0x2 +XDIS 5491: BINARY APXEVEX APX_F 62D4FD0881D802000000 sbb r8, 0x2 +XDIS 549b: BINARY APXEVEX APX_F 62D47D0881180200 sbb word ptr [r8], 0x2 +XDIS 54a3: BINARY APXEVEX APX_F 62D4FD08811802000000 sbb qword ptr [r8], 0x2 +XDIS 54ad: BINARY APXEVEX APX_F 62D43C1881D902000000 sbb r8d, r9d, 0x2 +XDIS 54b7: BINARY APXEVEX APX_F 62D4BC1881D902000000 sbb r8, r9, 0x2 +XDIS 54c1: BINARY APXEVEX APX_F 62D43C18811902000000 sbb r8d, dword ptr [r9], 0x2 +XDIS 54cb: BINARY APXEVEX APX_F 62D4BC18811902000000 sbb r8, qword ptr [r9], 0x2 +XDIS 54d5: BINARY APXEVEX APX_F 62D43D1881D90200 sbb r8w, r9w, 0x2 +XDIS 54dd: BINARY APXEVEX APX_F 62D4BD1881D902000000 sbb r8, r9, 0x2 +XDIS 54e7: BINARY APXEVEX APX_F 62D43D1881190200 sbb r8w, word ptr [r9], 0x2 +XDIS 54ef: BINARY APXEVEX APX_F 62D4BD18811902000000 sbb r8, qword ptr [r9], 0x2 +XDIS 54f9: BINARY APXEVEX APX_F 62D47C0883D802 sbb r8d, 0x2 +XDIS 5500: BINARY APXEVEX APX_F 62D4FC0883D802 sbb r8, 0x2 +XDIS 5507: BINARY APXEVEX APX_F 62D47C08831802 sbb dword ptr [r8], 0x2 +XDIS 550e: BINARY APXEVEX APX_F 62D4FC08831802 sbb qword ptr [r8], 0x2 +XDIS 5515: BINARY APXEVEX APX_F 62D47D0883D802 sbb r8w, 0x2 +XDIS 551c: BINARY APXEVEX APX_F 62D4FD0883D802 sbb r8, 0x2 +XDIS 5523: BINARY APXEVEX APX_F 62D47D08831802 sbb word ptr [r8], 0x2 +XDIS 552a: BINARY APXEVEX APX_F 62D4FD08831802 sbb qword ptr [r8], 0x2 +XDIS 5531: BINARY APXEVEX APX_F 62D43C1883D902 sbb r8d, r9d, 0x2 +XDIS 5538: BINARY APXEVEX APX_F 62D4BC1883D902 sbb r8, r9, 0x2 +XDIS 553f: BINARY APXEVEX APX_F 62D43C18831902 sbb r8d, dword ptr [r9], 0x2 +XDIS 5546: BINARY APXEVEX APX_F 62D4BC18831902 sbb r8, qword ptr [r9], 0x2 +XDIS 554d: SETCC APXEVEX APX_F 62D47F0842C0 setb r8b +XDIS 5553: SETCC APXEVEX APX_F 62D47F1842C0 setb r8b +XDIS 5559: SETCC APXEVEX APX_F 62D47F084200 setb byte ptr [r8] +XDIS 555f: SETCC APXEVEX APX_F 62D47F184200 setb byte ptr [r8] +XDIS 5565: SETCC APXEVEX APX_F 62D47F0846C0 setbe r8b +XDIS 556b: SETCC APXEVEX APX_F 62D47F1846C0 setbe r8b +XDIS 5571: SETCC APXEVEX APX_F 62D47F084600 setbe byte ptr [r8] +XDIS 5577: SETCC APXEVEX APX_F 62D47F184600 setbe byte ptr [r8] +XDIS 557d: SETCC APXEVEX APX_F 62D47F084CC0 setl r8b +XDIS 5583: SETCC APXEVEX APX_F 62D47F184CC0 setl r8b +XDIS 5589: SETCC APXEVEX APX_F 62D47F084C00 setl byte ptr [r8] +XDIS 558f: SETCC APXEVEX APX_F 62D47F184C00 setl byte ptr [r8] +XDIS 5595: SETCC APXEVEX APX_F 62D47F084EC0 setle r8b +XDIS 559b: SETCC APXEVEX APX_F 62D47F184EC0 setle r8b +XDIS 55a1: SETCC APXEVEX APX_F 62D47F084E00 setle byte ptr [r8] +XDIS 55a7: SETCC APXEVEX APX_F 62D47F184E00 setle byte ptr [r8] +XDIS 55ad: SETCC APXEVEX APX_F 62D47F0843C0 setnb r8b +XDIS 55b3: SETCC APXEVEX APX_F 62D47F1843C0 setnb r8b +XDIS 55b9: SETCC APXEVEX APX_F 62D47F084300 setnb byte ptr [r8] +XDIS 55bf: SETCC APXEVEX APX_F 62D47F184300 setnb byte ptr [r8] +XDIS 55c5: SETCC APXEVEX APX_F 62D47F0847C0 setnbe r8b +XDIS 55cb: SETCC APXEVEX APX_F 62D47F1847C0 setnbe r8b +XDIS 55d1: SETCC APXEVEX APX_F 62D47F084700 setnbe byte ptr [r8] +XDIS 55d7: SETCC APXEVEX APX_F 62D47F184700 setnbe byte ptr [r8] +XDIS 55dd: SETCC APXEVEX APX_F 62D47F084DC0 setnl r8b +XDIS 55e3: SETCC APXEVEX APX_F 62D47F184DC0 setnl r8b +XDIS 55e9: SETCC APXEVEX APX_F 62D47F084D00 setnl byte ptr [r8] +XDIS 55ef: SETCC APXEVEX APX_F 62D47F184D00 setnl byte ptr [r8] +XDIS 55f5: SETCC APXEVEX APX_F 62D47F084FC0 setnle r8b +XDIS 55fb: SETCC APXEVEX APX_F 62D47F184FC0 setnle r8b +XDIS 5601: SETCC APXEVEX APX_F 62D47F084F00 setnle byte ptr [r8] +XDIS 5607: SETCC APXEVEX APX_F 62D47F184F00 setnle byte ptr [r8] +XDIS 560d: SETCC APXEVEX APX_F 62D47F0841C0 setno r8b +XDIS 5613: SETCC APXEVEX APX_F 62D47F1841C0 setno r8b +XDIS 5619: SETCC APXEVEX APX_F 62D47F084100 setno byte ptr [r8] +XDIS 561f: SETCC APXEVEX APX_F 62D47F184100 setno byte ptr [r8] +XDIS 5625: SETCC APXEVEX APX_F 62D47F084BC0 setnp r8b +XDIS 562b: SETCC APXEVEX APX_F 62D47F184BC0 setnp r8b +XDIS 5631: SETCC APXEVEX APX_F 62D47F084B00 setnp byte ptr [r8] +XDIS 5637: SETCC APXEVEX APX_F 62D47F184B00 setnp byte ptr [r8] +XDIS 563d: SETCC APXEVEX APX_F 62D47F0849C0 setns r8b +XDIS 5643: SETCC APXEVEX APX_F 62D47F1849C0 setns r8b +XDIS 5649: SETCC APXEVEX APX_F 62D47F084900 setns byte ptr [r8] +XDIS 564f: SETCC APXEVEX APX_F 62D47F184900 setns byte ptr [r8] +XDIS 5655: SETCC APXEVEX APX_F 62D47F0845C0 setnz r8b +XDIS 565b: SETCC APXEVEX APX_F 62D47F1845C0 setnz r8b +XDIS 5661: SETCC APXEVEX APX_F 62D47F084500 setnz byte ptr [r8] +XDIS 5667: SETCC APXEVEX APX_F 62D47F184500 setnz byte ptr [r8] +XDIS 566d: SETCC APXEVEX APX_F 62D47F0840C0 seto r8b +XDIS 5673: SETCC APXEVEX APX_F 62D47F1840C0 seto r8b +XDIS 5679: SETCC APXEVEX APX_F 62D47F084000 seto byte ptr [r8] +XDIS 567f: SETCC APXEVEX APX_F 62D47F184000 seto byte ptr [r8] +XDIS 5685: SETCC APXEVEX APX_F 62D47F084AC0 setp r8b +XDIS 568b: SETCC APXEVEX APX_F 62D47F184AC0 setp r8b +XDIS 5691: SETCC APXEVEX APX_F 62D47F084A00 setp byte ptr [r8] +XDIS 5697: SETCC APXEVEX APX_F 62D47F184A00 setp byte ptr [r8] +XDIS 569d: SETCC APXEVEX APX_F 62D47F0848C0 sets r8b +XDIS 56a3: SETCC APXEVEX APX_F 62D47F1848C0 sets r8b +XDIS 56a9: SETCC APXEVEX APX_F 62D47F084800 sets byte ptr [r8] +XDIS 56af: SETCC APXEVEX APX_F 62D47F184800 sets byte ptr [r8] +XDIS 56b5: SETCC APXEVEX APX_F 62D47F0844C0 setz r8b +XDIS 56bb: SETCC APXEVEX APX_F 62D47F1844C0 setz r8b +XDIS 56c1: SETCC APXEVEX APX_F 62D47F084400 setz byte ptr [r8] +XDIS 56c7: SETCC APXEVEX APX_F 62D47F184400 setz byte ptr [r8] +XDIS 56cd: SHA APXEVEX APX_F 62547C08D9C1 sha1msg1 xmm8, xmm9 +XDIS 56d3: SHA APXEVEX APX_F 62547C08D901 sha1msg1 xmm8, xmmword ptr [r9] +XDIS 56d9: SHA APXEVEX APX_F 62547C08DAC1 sha1msg2 xmm8, xmm9 +XDIS 56df: SHA APXEVEX APX_F 62547C08DA01 sha1msg2 xmm8, xmmword ptr [r9] +XDIS 56e5: SHA APXEVEX APX_F 62547C08D8C1 sha1nexte xmm8, xmm9 +XDIS 56eb: SHA APXEVEX APX_F 62547C08D801 sha1nexte xmm8, xmmword ptr [r9] +XDIS 56f1: SHA APXEVEX APX_F 62547C08D4C102 sha1rnds4 xmm8, xmm9, 0x2 +XDIS 56f8: SHA APXEVEX APX_F 62547C08D40102 sha1rnds4 xmm8, xmmword ptr [r9], 0x2 +XDIS 56ff: SHA APXEVEX APX_F 62547C08DCC1 sha256msg1 xmm8, xmm9 +XDIS 5705: SHA APXEVEX APX_F 62547C08DC01 sha256msg1 xmm8, xmmword ptr [r9] +XDIS 570b: SHA APXEVEX APX_F 62547C08DDC1 sha256msg2 xmm8, xmm9 +XDIS 5711: SHA APXEVEX APX_F 62547C08DD01 sha256msg2 xmm8, xmmword ptr [r9] +XDIS 5717: SHA APXEVEX APX_F 62547C08DBC1 sha256rnds2 xmm8, xmm9 +XDIS 571d: SHA APXEVEX APX_F 62547C08DB01 sha256rnds2 xmm8, xmmword ptr [r9] +XDIS 5723: SHIFT APXEVEX APX_F 62D47C08C0E002 shl r8b, 0x2 +XDIS 572a: SHIFT APXEVEX APX_F 62D47C08C02002 shl byte ptr [r8], 0x2 +XDIS 5731: SHIFT APXEVEX APX_F 62D47C0CC0E002 shl r8b, 0x2 +XDIS 5738: SHIFT APXEVEX APX_F 62D47C0CC02002 shl byte ptr [r8], 0x2 +XDIS 573f: SHIFT APXEVEX APX_F 62D43D18D1E1 shl r8w, r9w, 0x1 +XDIS 5745: SHIFT APXEVEX APX_F 62D4BD18D1E1 shl r8, r9, 0x1 +XDIS 574b: SHIFT APXEVEX APX_F 62D43D18D121 shl r8w, word ptr [r9], 0x1 +XDIS 5751: SHIFT APXEVEX APX_F 62D4BD18D121 shl r8, qword ptr [r9], 0x1 +XDIS 5757: SHIFT APXEVEX APX_F 62D43D1CD1E1 shl r8w, r9w, 0x1 +XDIS 575d: SHIFT APXEVEX APX_F 62D4BD1CD1E1 shl r8, r9, 0x1 +XDIS 5763: SHIFT APXEVEX APX_F 62D43D1CD121 shl r8w, word ptr [r9], 0x1 +XDIS 5769: SHIFT APXEVEX APX_F 62D4BD1CD121 shl r8, qword ptr [r9], 0x1 +XDIS 576f: SHIFT APXEVEX APX_F 62D43C18D1F1 shl r8d, r9d, 0x1 +XDIS 5775: SHIFT APXEVEX APX_F 62D4BC18D1F1 shl r8, r9, 0x1 +XDIS 577b: SHIFT APXEVEX APX_F 62D43C18D131 shl r8d, dword ptr [r9], 0x1 +XDIS 5781: SHIFT APXEVEX APX_F 62D4BC18D131 shl r8, qword ptr [r9], 0x1 +XDIS 5787: SHIFT APXEVEX APX_F 62D43C1CD1F1 shl r8d, r9d, 0x1 +XDIS 578d: SHIFT APXEVEX APX_F 62D4BC1CD1F1 shl r8, r9, 0x1 +XDIS 5793: SHIFT APXEVEX APX_F 62D43C1CD131 shl r8d, dword ptr [r9], 0x1 +XDIS 5799: SHIFT APXEVEX APX_F 62D4BC1CD131 shl r8, qword ptr [r9], 0x1 +XDIS 579f: SHIFT APXEVEX APX_F 62D43D18D1F1 shl r8w, r9w, 0x1 +XDIS 57a5: SHIFT APXEVEX APX_F 62D4BD18D1F1 shl r8, r9, 0x1 +XDIS 57ab: SHIFT APXEVEX APX_F 62D43D18D131 shl r8w, word ptr [r9], 0x1 +XDIS 57b1: SHIFT APXEVEX APX_F 62D4BD18D131 shl r8, qword ptr [r9], 0x1 +XDIS 57b7: SHIFT APXEVEX APX_F 62D43D1CD1F1 shl r8w, r9w, 0x1 +XDIS 57bd: SHIFT APXEVEX APX_F 62D4BD1CD1F1 shl r8, r9, 0x1 +XDIS 57c3: SHIFT APXEVEX APX_F 62D43D1CD131 shl r8w, word ptr [r9], 0x1 +XDIS 57c9: SHIFT APXEVEX APX_F 62D4BD1CD131 shl r8, qword ptr [r9], 0x1 +XDIS 57cf: SHIFT APXEVEX APX_F 62D47C08D2E0 shl r8b, cl +XDIS 57d5: SHIFT APXEVEX APX_F 62D47C08D220 shl byte ptr [r8], cl +XDIS 57db: SHIFT APXEVEX APX_F 62D47C0CD2E0 shl r8b, cl +XDIS 57e1: SHIFT APXEVEX APX_F 62D47C0CD220 shl byte ptr [r8], cl +XDIS 57e7: SHIFT APXEVEX APX_F 62D47C08D2F0 shl r8b, cl +XDIS 57ed: SHIFT APXEVEX APX_F 62D47C08D230 shl byte ptr [r8], cl +XDIS 57f3: SHIFT APXEVEX APX_F 62D47C0CD2F0 shl r8b, cl +XDIS 57f9: SHIFT APXEVEX APX_F 62D47C0CD230 shl byte ptr [r8], cl +XDIS 57ff: SHIFT APXEVEX APX_F 62D43C18D2E1 shl r8b, r9b, cl +XDIS 5805: SHIFT APXEVEX APX_F 62D43C18D221 shl r8b, byte ptr [r9], cl +XDIS 580b: SHIFT APXEVEX APX_F 62D43C1CD2E1 shl r8b, r9b, cl +XDIS 5811: SHIFT APXEVEX APX_F 62D43C1CD221 shl r8b, byte ptr [r9], cl +XDIS 5817: SHIFT APXEVEX APX_F 62D47C08C0F002 shl r8b, 0x2 +XDIS 581e: SHIFT APXEVEX APX_F 62D47C08C03002 shl byte ptr [r8], 0x2 +XDIS 5825: SHIFT APXEVEX APX_F 62D47C0CC0F002 shl r8b, 0x2 +XDIS 582c: SHIFT APXEVEX APX_F 62D47C0CC03002 shl byte ptr [r8], 0x2 +XDIS 5833: SHIFT APXEVEX APX_F 62D43C18D2F1 shl r8b, r9b, cl +XDIS 5839: SHIFT APXEVEX APX_F 62D43C18D231 shl r8b, byte ptr [r9], cl +XDIS 583f: SHIFT APXEVEX APX_F 62D43C1CD2F1 shl r8b, r9b, cl +XDIS 5845: SHIFT APXEVEX APX_F 62D43C1CD231 shl r8b, byte ptr [r9], cl +XDIS 584b: SHIFT APXEVEX APX_F 62D47C08D3E0 shl r8d, cl +XDIS 5851: SHIFT APXEVEX APX_F 62D4FC08D3E0 shl r8, cl +XDIS 5857: SHIFT APXEVEX APX_F 62D47C08D320 shl dword ptr [r8], cl +XDIS 585d: SHIFT APXEVEX APX_F 62D4FC08D320 shl qword ptr [r8], cl +XDIS 5863: SHIFT APXEVEX APX_F 62D47C0CD3E0 shl r8d, cl +XDIS 5869: SHIFT APXEVEX APX_F 62D4FC0CD3E0 shl r8, cl +XDIS 586f: SHIFT APXEVEX APX_F 62D47C0CD320 shl dword ptr [r8], cl +XDIS 5875: SHIFT APXEVEX APX_F 62D4FC0CD320 shl qword ptr [r8], cl +XDIS 587b: SHIFT APXEVEX APX_F 62D47D08D3E0 shl r8w, cl +XDIS 5881: SHIFT APXEVEX APX_F 62D4FD08D3E0 shl r8, cl +XDIS 5887: SHIFT APXEVEX APX_F 62D47D08D320 shl word ptr [r8], cl +XDIS 588d: SHIFT APXEVEX APX_F 62D4FD08D320 shl qword ptr [r8], cl +XDIS 5893: SHIFT APXEVEX APX_F 62D47D0CD3E0 shl r8w, cl +XDIS 5899: SHIFT APXEVEX APX_F 62D4FD0CD3E0 shl r8, cl +XDIS 589f: SHIFT APXEVEX APX_F 62D47D0CD320 shl word ptr [r8], cl +XDIS 58a5: SHIFT APXEVEX APX_F 62D4FD0CD320 shl qword ptr [r8], cl +XDIS 58ab: SHIFT APXEVEX APX_F 62D47C08D0F0 shl r8b, 0x1 +XDIS 58b1: SHIFT APXEVEX APX_F 62D47C08D030 shl byte ptr [r8], 0x1 +XDIS 58b7: SHIFT APXEVEX APX_F 62D47C0CD0F0 shl r8b, 0x1 +XDIS 58bd: SHIFT APXEVEX APX_F 62D47C0CD030 shl byte ptr [r8], 0x1 +XDIS 58c3: SHIFT APXEVEX APX_F 62D47C08D3F0 shl r8d, cl +XDIS 58c9: SHIFT APXEVEX APX_F 62D4FC08D3F0 shl r8, cl +XDIS 58cf: SHIFT APXEVEX APX_F 62D47C08D330 shl dword ptr [r8], cl +XDIS 58d5: SHIFT APXEVEX APX_F 62D4FC08D330 shl qword ptr [r8], cl +XDIS 58db: SHIFT APXEVEX APX_F 62D47C0CD3F0 shl r8d, cl +XDIS 58e1: SHIFT APXEVEX APX_F 62D4FC0CD3F0 shl r8, cl +XDIS 58e7: SHIFT APXEVEX APX_F 62D47C0CD330 shl dword ptr [r8], cl +XDIS 58ed: SHIFT APXEVEX APX_F 62D4FC0CD330 shl qword ptr [r8], cl +XDIS 58f3: SHIFT APXEVEX APX_F 62D47D08D3F0 shl r8w, cl +XDIS 58f9: SHIFT APXEVEX APX_F 62D4FD08D3F0 shl r8, cl +XDIS 58ff: SHIFT APXEVEX APX_F 62D47D08D330 shl word ptr [r8], cl +XDIS 5905: SHIFT APXEVEX APX_F 62D4FD08D330 shl qword ptr [r8], cl +XDIS 590b: SHIFT APXEVEX APX_F 62D47D0CD3F0 shl r8w, cl +XDIS 5911: SHIFT APXEVEX APX_F 62D4FD0CD3F0 shl r8, cl +XDIS 5917: SHIFT APXEVEX APX_F 62D47D0CD330 shl word ptr [r8], cl +XDIS 591d: SHIFT APXEVEX APX_F 62D4FD0CD330 shl qword ptr [r8], cl +XDIS 5923: SHIFT APXEVEX APX_F 62D43C18D3E1 shl r8d, r9d, cl +XDIS 5929: SHIFT APXEVEX APX_F 62D4BC18D3E1 shl r8, r9, cl +XDIS 592f: SHIFT APXEVEX APX_F 62D43C18D321 shl r8d, dword ptr [r9], cl +XDIS 5935: SHIFT APXEVEX APX_F 62D4BC18D321 shl r8, qword ptr [r9], cl +XDIS 593b: SHIFT APXEVEX APX_F 62D43C1CD3E1 shl r8d, r9d, cl +XDIS 5941: SHIFT APXEVEX APX_F 62D4BC1CD3E1 shl r8, r9, cl +XDIS 5947: SHIFT APXEVEX APX_F 62D43C1CD321 shl r8d, dword ptr [r9], cl +XDIS 594d: SHIFT APXEVEX APX_F 62D4BC1CD321 shl r8, qword ptr [r9], cl +XDIS 5953: SHIFT APXEVEX APX_F 62D43D18D3E1 shl r8w, r9w, cl +XDIS 5959: SHIFT APXEVEX APX_F 62D4BD18D3E1 shl r8, r9, cl +XDIS 595f: SHIFT APXEVEX APX_F 62D43D18D321 shl r8w, word ptr [r9], cl +XDIS 5965: SHIFT APXEVEX APX_F 62D4BD18D321 shl r8, qword ptr [r9], cl +XDIS 596b: SHIFT APXEVEX APX_F 62D43D1CD3E1 shl r8w, r9w, cl +XDIS 5971: SHIFT APXEVEX APX_F 62D4BD1CD3E1 shl r8, r9, cl +XDIS 5977: SHIFT APXEVEX APX_F 62D43D1CD321 shl r8w, word ptr [r9], cl +XDIS 597d: SHIFT APXEVEX APX_F 62D4BD1CD321 shl r8, qword ptr [r9], cl +XDIS 5983: SHIFT APXEVEX APX_F 62D43C18D3F1 shl r8d, r9d, cl +XDIS 5989: SHIFT APXEVEX APX_F 62D4BC18D3F1 shl r8, r9, cl +XDIS 598f: SHIFT APXEVEX APX_F 62D43C18D331 shl r8d, dword ptr [r9], cl +XDIS 5995: SHIFT APXEVEX APX_F 62D4BC18D331 shl r8, qword ptr [r9], cl +XDIS 599b: SHIFT APXEVEX APX_F 62D43C1CD3F1 shl r8d, r9d, cl +XDIS 59a1: SHIFT APXEVEX APX_F 62D4BC1CD3F1 shl r8, r9, cl +XDIS 59a7: SHIFT APXEVEX APX_F 62D43C1CD331 shl r8d, dword ptr [r9], cl +XDIS 59ad: SHIFT APXEVEX APX_F 62D4BC1CD331 shl r8, qword ptr [r9], cl +XDIS 59b3: SHIFT APXEVEX APX_F 62D43D18D3F1 shl r8w, r9w, cl +XDIS 59b9: SHIFT APXEVEX APX_F 62D4BD18D3F1 shl r8, r9, cl +XDIS 59bf: SHIFT APXEVEX APX_F 62D43D18D331 shl r8w, word ptr [r9], cl +XDIS 59c5: SHIFT APXEVEX APX_F 62D4BD18D331 shl r8, qword ptr [r9], cl +XDIS 59cb: SHIFT APXEVEX APX_F 62D43D1CD3F1 shl r8w, r9w, cl +XDIS 59d1: SHIFT APXEVEX APX_F 62D4BD1CD3F1 shl r8, r9, cl +XDIS 59d7: SHIFT APXEVEX APX_F 62D43D1CD331 shl r8w, word ptr [r9], cl +XDIS 59dd: SHIFT APXEVEX APX_F 62D4BD1CD331 shl r8, qword ptr [r9], cl +XDIS 59e3: SHIFT APXEVEX APX_F 62D43C18C0E102 shl r8b, r9b, 0x2 +XDIS 59ea: SHIFT APXEVEX APX_F 62D43C18C02102 shl r8b, byte ptr [r9], 0x2 +XDIS 59f1: SHIFT APXEVEX APX_F 62D43C1CC0E102 shl r8b, r9b, 0x2 +XDIS 59f8: SHIFT APXEVEX APX_F 62D43C1CC02102 shl r8b, byte ptr [r9], 0x2 +XDIS 59ff: SHIFT APXEVEX APX_F 62D43C18C0F102 shl r8b, r9b, 0x2 +XDIS 5a06: SHIFT APXEVEX APX_F 62D43C18C03102 shl r8b, byte ptr [r9], 0x2 +XDIS 5a0d: SHIFT APXEVEX APX_F 62D43C1CC0F102 shl r8b, r9b, 0x2 +XDIS 5a14: SHIFT APXEVEX APX_F 62D43C1CC03102 shl r8b, byte ptr [r9], 0x2 +XDIS 5a1b: SHIFT APXEVEX APX_F 62D47C08C1E002 shl r8d, 0x2 +XDIS 5a22: SHIFT APXEVEX APX_F 62D4FC08C1E002 shl r8, 0x2 +XDIS 5a29: SHIFT APXEVEX APX_F 62D47C08C12002 shl dword ptr [r8], 0x2 +XDIS 5a30: SHIFT APXEVEX APX_F 62D4FC08C12002 shl qword ptr [r8], 0x2 +XDIS 5a37: SHIFT APXEVEX APX_F 62D47C0CC1E002 shl r8d, 0x2 +XDIS 5a3e: SHIFT APXEVEX APX_F 62D4FC0CC1E002 shl r8, 0x2 +XDIS 5a45: SHIFT APXEVEX APX_F 62D47C0CC12002 shl dword ptr [r8], 0x2 +XDIS 5a4c: SHIFT APXEVEX APX_F 62D4FC0CC12002 shl qword ptr [r8], 0x2 +XDIS 5a53: SHIFT APXEVEX APX_F 62D47D08C1E002 shl r8w, 0x2 +XDIS 5a5a: SHIFT APXEVEX APX_F 62D4FD08C1E002 shl r8, 0x2 +XDIS 5a61: SHIFT APXEVEX APX_F 62D47D08C12002 shl word ptr [r8], 0x2 +XDIS 5a68: SHIFT APXEVEX APX_F 62D4FD08C12002 shl qword ptr [r8], 0x2 +XDIS 5a6f: SHIFT APXEVEX APX_F 62D47D0CC1E002 shl r8w, 0x2 +XDIS 5a76: SHIFT APXEVEX APX_F 62D4FD0CC1E002 shl r8, 0x2 +XDIS 5a7d: SHIFT APXEVEX APX_F 62D47D0CC12002 shl word ptr [r8], 0x2 +XDIS 5a84: SHIFT APXEVEX APX_F 62D4FD0CC12002 shl qword ptr [r8], 0x2 +XDIS 5a8b: SHIFT APXEVEX APX_F 62D43C18D0E1 shl r8b, r9b, 0x1 +XDIS 5a91: SHIFT APXEVEX APX_F 62D43C18D021 shl r8b, byte ptr [r9], 0x1 +XDIS 5a97: SHIFT APXEVEX APX_F 62D43C1CD0E1 shl r8b, r9b, 0x1 +XDIS 5a9d: SHIFT APXEVEX APX_F 62D43C1CD021 shl r8b, byte ptr [r9], 0x1 +XDIS 5aa3: SHIFT APXEVEX APX_F 62D47C08C1F002 shl r8d, 0x2 +XDIS 5aaa: SHIFT APXEVEX APX_F 62D4FC08C1F002 shl r8, 0x2 +XDIS 5ab1: SHIFT APXEVEX APX_F 62D47C08C13002 shl dword ptr [r8], 0x2 +XDIS 5ab8: SHIFT APXEVEX APX_F 62D4FC08C13002 shl qword ptr [r8], 0x2 +XDIS 5abf: SHIFT APXEVEX APX_F 62D47C0CC1F002 shl r8d, 0x2 +XDIS 5ac6: SHIFT APXEVEX APX_F 62D4FC0CC1F002 shl r8, 0x2 +XDIS 5acd: SHIFT APXEVEX APX_F 62D47C0CC13002 shl dword ptr [r8], 0x2 +XDIS 5ad4: SHIFT APXEVEX APX_F 62D4FC0CC13002 shl qword ptr [r8], 0x2 +XDIS 5adb: SHIFT APXEVEX APX_F 62D47D08C1F002 shl r8w, 0x2 +XDIS 5ae2: SHIFT APXEVEX APX_F 62D4FD08C1F002 shl r8, 0x2 +XDIS 5ae9: SHIFT APXEVEX APX_F 62D47D08C13002 shl word ptr [r8], 0x2 +XDIS 5af0: SHIFT APXEVEX APX_F 62D4FD08C13002 shl qword ptr [r8], 0x2 +XDIS 5af7: SHIFT APXEVEX APX_F 62D47D0CC1F002 shl r8w, 0x2 +XDIS 5afe: SHIFT APXEVEX APX_F 62D4FD0CC1F002 shl r8, 0x2 +XDIS 5b05: SHIFT APXEVEX APX_F 62D47D0CC13002 shl word ptr [r8], 0x2 +XDIS 5b0c: SHIFT APXEVEX APX_F 62D4FD0CC13002 shl qword ptr [r8], 0x2 +XDIS 5b13: SHIFT APXEVEX APX_F 62D43C18C1E102 shl r8d, r9d, 0x2 +XDIS 5b1a: SHIFT APXEVEX APX_F 62D4BC18C1E102 shl r8, r9, 0x2 +XDIS 5b21: SHIFT APXEVEX APX_F 62D43C18C12102 shl r8d, dword ptr [r9], 0x2 +XDIS 5b28: SHIFT APXEVEX APX_F 62D4BC18C12102 shl r8, qword ptr [r9], 0x2 +XDIS 5b2f: SHIFT APXEVEX APX_F 62D43C1CC1E102 shl r8d, r9d, 0x2 +XDIS 5b36: SHIFT APXEVEX APX_F 62D4BC1CC1E102 shl r8, r9, 0x2 +XDIS 5b3d: SHIFT APXEVEX APX_F 62D43C1CC12102 shl r8d, dword ptr [r9], 0x2 +XDIS 5b44: SHIFT APXEVEX APX_F 62D4BC1CC12102 shl r8, qword ptr [r9], 0x2 +XDIS 5b4b: SHIFT APXEVEX APX_F 62D43D18C1E102 shl r8w, r9w, 0x2 +XDIS 5b52: SHIFT APXEVEX APX_F 62D4BD18C1E102 shl r8, r9, 0x2 +XDIS 5b59: SHIFT APXEVEX APX_F 62D43D18C12102 shl r8w, word ptr [r9], 0x2 +XDIS 5b60: SHIFT APXEVEX APX_F 62D4BD18C12102 shl r8, qword ptr [r9], 0x2 +XDIS 5b67: SHIFT APXEVEX APX_F 62D43D1CC1E102 shl r8w, r9w, 0x2 +XDIS 5b6e: SHIFT APXEVEX APX_F 62D4BD1CC1E102 shl r8, r9, 0x2 +XDIS 5b75: SHIFT APXEVEX APX_F 62D43D1CC12102 shl r8w, word ptr [r9], 0x2 +XDIS 5b7c: SHIFT APXEVEX APX_F 62D4BD1CC12102 shl r8, qword ptr [r9], 0x2 +XDIS 5b83: SHIFT APXEVEX APX_F 62D43C18C1F102 shl r8d, r9d, 0x2 +XDIS 5b8a: SHIFT APXEVEX APX_F 62D4BC18C1F102 shl r8, r9, 0x2 +XDIS 5b91: SHIFT APXEVEX APX_F 62D43C18C13102 shl r8d, dword ptr [r9], 0x2 +XDIS 5b98: SHIFT APXEVEX APX_F 62D4BC18C13102 shl r8, qword ptr [r9], 0x2 +XDIS 5b9f: SHIFT APXEVEX APX_F 62D43C1CC1F102 shl r8d, r9d, 0x2 +XDIS 5ba6: SHIFT APXEVEX APX_F 62D4BC1CC1F102 shl r8, r9, 0x2 +XDIS 5bad: SHIFT APXEVEX APX_F 62D43C1CC13102 shl r8d, dword ptr [r9], 0x2 +XDIS 5bb4: SHIFT APXEVEX APX_F 62D4BC1CC13102 shl r8, qword ptr [r9], 0x2 +XDIS 5bbb: SHIFT APXEVEX APX_F 62D43D18C1F102 shl r8w, r9w, 0x2 +XDIS 5bc2: SHIFT APXEVEX APX_F 62D4BD18C1F102 shl r8, r9, 0x2 +XDIS 5bc9: SHIFT APXEVEX APX_F 62D43D18C13102 shl r8w, word ptr [r9], 0x2 +XDIS 5bd0: SHIFT APXEVEX APX_F 62D4BD18C13102 shl r8, qword ptr [r9], 0x2 +XDIS 5bd7: SHIFT APXEVEX APX_F 62D43D1CC1F102 shl r8w, r9w, 0x2 +XDIS 5bde: SHIFT APXEVEX APX_F 62D4BD1CC1F102 shl r8, r9, 0x2 +XDIS 5be5: SHIFT APXEVEX APX_F 62D43D1CC13102 shl r8w, word ptr [r9], 0x2 +XDIS 5bec: SHIFT APXEVEX APX_F 62D4BD1CC13102 shl r8, qword ptr [r9], 0x2 +XDIS 5bf3: SHIFT APXEVEX APX_F 62D47C08D0E0 shl r8b, 0x1 +XDIS 5bf9: SHIFT APXEVEX APX_F 62D47C08D020 shl byte ptr [r8], 0x1 +XDIS 5bff: SHIFT APXEVEX APX_F 62D47C0CD0E0 shl r8b, 0x1 +XDIS 5c05: SHIFT APXEVEX APX_F 62D47C0CD020 shl byte ptr [r8], 0x1 +XDIS 5c0b: SHIFT APXEVEX APX_F 62D43C18D0F1 shl r8b, r9b, 0x1 +XDIS 5c11: SHIFT APXEVEX APX_F 62D43C18D031 shl r8b, byte ptr [r9], 0x1 +XDIS 5c17: SHIFT APXEVEX APX_F 62D43C1CD0F1 shl r8b, r9b, 0x1 +XDIS 5c1d: SHIFT APXEVEX APX_F 62D43C1CD031 shl r8b, byte ptr [r9], 0x1 +XDIS 5c23: SHIFT APXEVEX APX_F 62D47C08D1E0 shl r8d, 0x1 +XDIS 5c29: SHIFT APXEVEX APX_F 62D4FC08D1E0 shl r8, 0x1 +XDIS 5c2f: SHIFT APXEVEX APX_F 62D47C08D120 shl dword ptr [r8], 0x1 +XDIS 5c35: SHIFT APXEVEX APX_F 62D4FC08D120 shl qword ptr [r8], 0x1 +XDIS 5c3b: SHIFT APXEVEX APX_F 62D47C0CD1E0 shl r8d, 0x1 +XDIS 5c41: SHIFT APXEVEX APX_F 62D4FC0CD1E0 shl r8, 0x1 +XDIS 5c47: SHIFT APXEVEX APX_F 62D47C0CD120 shl dword ptr [r8], 0x1 +XDIS 5c4d: SHIFT APXEVEX APX_F 62D4FC0CD120 shl qword ptr [r8], 0x1 +XDIS 5c53: SHIFT APXEVEX APX_F 62D47D08D1E0 shl r8w, 0x1 +XDIS 5c59: SHIFT APXEVEX APX_F 62D4FD08D1E0 shl r8, 0x1 +XDIS 5c5f: SHIFT APXEVEX APX_F 62D47D08D120 shl word ptr [r8], 0x1 +XDIS 5c65: SHIFT APXEVEX APX_F 62D4FD08D120 shl qword ptr [r8], 0x1 +XDIS 5c6b: SHIFT APXEVEX APX_F 62D47D0CD1E0 shl r8w, 0x1 +XDIS 5c71: SHIFT APXEVEX APX_F 62D4FD0CD1E0 shl r8, 0x1 +XDIS 5c77: SHIFT APXEVEX APX_F 62D47D0CD120 shl word ptr [r8], 0x1 +XDIS 5c7d: SHIFT APXEVEX APX_F 62D4FD0CD120 shl qword ptr [r8], 0x1 +XDIS 5c83: SHIFT APXEVEX APX_F 62D47C08D1F0 shl r8d, 0x1 +XDIS 5c89: SHIFT APXEVEX APX_F 62D4FC08D1F0 shl r8, 0x1 +XDIS 5c8f: SHIFT APXEVEX APX_F 62D47C08D130 shl dword ptr [r8], 0x1 +XDIS 5c95: SHIFT APXEVEX APX_F 62D4FC08D130 shl qword ptr [r8], 0x1 +XDIS 5c9b: SHIFT APXEVEX APX_F 62D47C0CD1F0 shl r8d, 0x1 +XDIS 5ca1: SHIFT APXEVEX APX_F 62D4FC0CD1F0 shl r8, 0x1 +XDIS 5ca7: SHIFT APXEVEX APX_F 62D47C0CD130 shl dword ptr [r8], 0x1 +XDIS 5cad: SHIFT APXEVEX APX_F 62D4FC0CD130 shl qword ptr [r8], 0x1 +XDIS 5cb3: SHIFT APXEVEX APX_F 62D47D08D1F0 shl r8w, 0x1 +XDIS 5cb9: SHIFT APXEVEX APX_F 62D4FD08D1F0 shl r8, 0x1 +XDIS 5cbf: SHIFT APXEVEX APX_F 62D47D08D130 shl word ptr [r8], 0x1 +XDIS 5cc5: SHIFT APXEVEX APX_F 62D4FD08D130 shl qword ptr [r8], 0x1 +XDIS 5ccb: SHIFT APXEVEX APX_F 62D47D0CD1F0 shl r8w, 0x1 +XDIS 5cd1: SHIFT APXEVEX APX_F 62D4FD0CD1F0 shl r8, 0x1 +XDIS 5cd7: SHIFT APXEVEX APX_F 62D47D0CD130 shl word ptr [r8], 0x1 +XDIS 5cdd: SHIFT APXEVEX APX_F 62D4FD0CD130 shl qword ptr [r8], 0x1 +XDIS 5ce3: SHIFT APXEVEX APX_F 62D43C18D1E1 shl r8d, r9d, 0x1 +XDIS 5ce9: SHIFT APXEVEX APX_F 62D4BC18D1E1 shl r8, r9, 0x1 +XDIS 5cef: SHIFT APXEVEX APX_F 62D43C18D121 shl r8d, dword ptr [r9], 0x1 +XDIS 5cf5: SHIFT APXEVEX APX_F 62D4BC18D121 shl r8, qword ptr [r9], 0x1 +XDIS 5cfb: SHIFT APXEVEX APX_F 62D43C1CD1E1 shl r8d, r9d, 0x1 +XDIS 5d01: SHIFT APXEVEX APX_F 62D4BC1CD1E1 shl r8, r9, 0x1 +XDIS 5d07: SHIFT APXEVEX APX_F 62D43C1CD121 shl r8d, dword ptr [r9], 0x1 +XDIS 5d0d: SHIFT APXEVEX APX_F 62D4BC1CD121 shl r8, qword ptr [r9], 0x1 +XDIS 5d13: SHIFT APXEVEX APX_F 62547C0824C802 shld r8d, r9d, 0x2 +XDIS 5d1a: SHIFT APXEVEX APX_F 6254FC0824C802 shld r8, r9, 0x2 +XDIS 5d21: SHIFT APXEVEX APX_F 62547C08240802 shld dword ptr [r8], r9d, 0x2 +XDIS 5d28: SHIFT APXEVEX APX_F 6254FC08240802 shld qword ptr [r8], r9, 0x2 +XDIS 5d2f: SHIFT APXEVEX APX_F 62547C0C24C802 shld r8d, r9d, 0x2 +XDIS 5d36: SHIFT APXEVEX APX_F 6254FC0C24C802 shld r8, r9, 0x2 +XDIS 5d3d: SHIFT APXEVEX APX_F 62547C0C240802 shld dword ptr [r8], r9d, 0x2 +XDIS 5d44: SHIFT APXEVEX APX_F 6254FC0C240802 shld qword ptr [r8], r9, 0x2 +XDIS 5d4b: SHIFT APXEVEX APX_F 62547D0824C802 shld r8w, r9w, 0x2 +XDIS 5d52: SHIFT APXEVEX APX_F 6254FD0824C802 shld r8, r9, 0x2 +XDIS 5d59: SHIFT APXEVEX APX_F 62547D08240802 shld word ptr [r8], r9w, 0x2 +XDIS 5d60: SHIFT APXEVEX APX_F 6254FD08240802 shld qword ptr [r8], r9, 0x2 +XDIS 5d67: SHIFT APXEVEX APX_F 62547D0C24C802 shld r8w, r9w, 0x2 +XDIS 5d6e: SHIFT APXEVEX APX_F 6254FD0C24C802 shld r8, r9, 0x2 +XDIS 5d75: SHIFT APXEVEX APX_F 62547D0C240802 shld word ptr [r8], r9w, 0x2 +XDIS 5d7c: SHIFT APXEVEX APX_F 6254FD0C240802 shld qword ptr [r8], r9, 0x2 +XDIS 5d83: SHIFT APXEVEX APX_F 62543C1824D102 shld r8d, r9d, r10d, 0x2 +XDIS 5d8a: SHIFT APXEVEX APX_F 6254BC1824D102 shld r8, r9, r10, 0x2 +XDIS 5d91: SHIFT APXEVEX APX_F 62543C18241102 shld r8d, dword ptr [r9], r10d, 0x2 +XDIS 5d98: SHIFT APXEVEX APX_F 6254BC18241102 shld r8, qword ptr [r9], r10, 0x2 +XDIS 5d9f: SHIFT APXEVEX APX_F 62543C1C24D102 shld r8d, r9d, r10d, 0x2 +XDIS 5da6: SHIFT APXEVEX APX_F 6254BC1C24D102 shld r8, r9, r10, 0x2 +XDIS 5dad: SHIFT APXEVEX APX_F 62543C1C241102 shld r8d, dword ptr [r9], r10d, 0x2 +XDIS 5db4: SHIFT APXEVEX APX_F 6254BC1C241102 shld r8, qword ptr [r9], r10, 0x2 +XDIS 5dbb: SHIFT APXEVEX APX_F 62543D1824D102 shld r8w, r9w, r10w, 0x2 +XDIS 5dc2: SHIFT APXEVEX APX_F 6254BD1824D102 shld r8, r9, r10, 0x2 +XDIS 5dc9: SHIFT APXEVEX APX_F 62543D18241102 shld r8w, word ptr [r9], r10w, 0x2 +XDIS 5dd0: SHIFT APXEVEX APX_F 6254BD18241102 shld r8, qword ptr [r9], r10, 0x2 +XDIS 5dd7: SHIFT APXEVEX APX_F 62543D1C24D102 shld r8w, r9w, r10w, 0x2 +XDIS 5dde: SHIFT APXEVEX APX_F 6254BD1C24D102 shld r8, r9, r10, 0x2 +XDIS 5de5: SHIFT APXEVEX APX_F 62543D1C241102 shld r8w, word ptr [r9], r10w, 0x2 +XDIS 5dec: SHIFT APXEVEX APX_F 6254BD1C241102 shld r8, qword ptr [r9], r10, 0x2 +XDIS 5df3: SHIFT APXEVEX APX_F 62547C08A5C8 shld r8d, r9d, cl +XDIS 5df9: SHIFT APXEVEX APX_F 6254FC08A5C8 shld r8, r9, cl +XDIS 5dff: SHIFT APXEVEX APX_F 62547C08A508 shld dword ptr [r8], r9d, cl +XDIS 5e05: SHIFT APXEVEX APX_F 6254FC08A508 shld qword ptr [r8], r9, cl +XDIS 5e0b: SHIFT APXEVEX APX_F 62547C0CA5C8 shld r8d, r9d, cl +XDIS 5e11: SHIFT APXEVEX APX_F 6254FC0CA5C8 shld r8, r9, cl +XDIS 5e17: SHIFT APXEVEX APX_F 62547C0CA508 shld dword ptr [r8], r9d, cl +XDIS 5e1d: SHIFT APXEVEX APX_F 6254FC0CA508 shld qword ptr [r8], r9, cl +XDIS 5e23: SHIFT APXEVEX APX_F 62547D08A5C8 shld r8w, r9w, cl +XDIS 5e29: SHIFT APXEVEX APX_F 6254FD08A5C8 shld r8, r9, cl +XDIS 5e2f: SHIFT APXEVEX APX_F 62547D08A508 shld word ptr [r8], r9w, cl +XDIS 5e35: SHIFT APXEVEX APX_F 6254FD08A508 shld qword ptr [r8], r9, cl +XDIS 5e3b: SHIFT APXEVEX APX_F 62547D0CA5C8 shld r8w, r9w, cl +XDIS 5e41: SHIFT APXEVEX APX_F 6254FD0CA5C8 shld r8, r9, cl +XDIS 5e47: SHIFT APXEVEX APX_F 62547D0CA508 shld word ptr [r8], r9w, cl +XDIS 5e4d: SHIFT APXEVEX APX_F 6254FD0CA508 shld qword ptr [r8], r9, cl +XDIS 5e53: SHIFT APXEVEX APX_F 62543C18A5D1 shld r8d, r9d, r10d, cl +XDIS 5e59: SHIFT APXEVEX APX_F 6254BC18A5D1 shld r8, r9, r10, cl +XDIS 5e5f: SHIFT APXEVEX APX_F 62543C18A511 shld r8d, dword ptr [r9], r10d, cl +XDIS 5e65: SHIFT APXEVEX APX_F 6254BC18A511 shld r8, qword ptr [r9], r10, cl +XDIS 5e6b: SHIFT APXEVEX APX_F 62543C1CA5D1 shld r8d, r9d, r10d, cl +XDIS 5e71: SHIFT APXEVEX APX_F 6254BC1CA5D1 shld r8, r9, r10, cl +XDIS 5e77: SHIFT APXEVEX APX_F 62543C1CA511 shld r8d, dword ptr [r9], r10d, cl +XDIS 5e7d: SHIFT APXEVEX APX_F 6254BC1CA511 shld r8, qword ptr [r9], r10, cl +XDIS 5e83: SHIFT APXEVEX APX_F 62543D18A5D1 shld r8w, r9w, r10w, cl +XDIS 5e89: SHIFT APXEVEX APX_F 6254BD18A5D1 shld r8, r9, r10, cl +XDIS 5e8f: SHIFT APXEVEX APX_F 62543D18A511 shld r8w, word ptr [r9], r10w, cl +XDIS 5e95: SHIFT APXEVEX APX_F 6254BD18A511 shld r8, qword ptr [r9], r10, cl +XDIS 5e9b: SHIFT APXEVEX APX_F 62543D1CA5D1 shld r8w, r9w, r10w, cl +XDIS 5ea1: SHIFT APXEVEX APX_F 6254BD1CA5D1 shld r8, r9, r10, cl +XDIS 5ea7: SHIFT APXEVEX APX_F 62543D1CA511 shld r8w, word ptr [r9], r10w, cl +XDIS 5ead: SHIFT APXEVEX APX_F 6254BD1CA511 shld r8, qword ptr [r9], r10, cl +XDIS 5eb3: BMI2 APXEVEX APX_F 62522D08F7C1 shlx r8d, r9d, r10d +XDIS 5eb9: BMI2 APXEVEX APX_F 62522D08F701 shlx r8d, dword ptr [r9], r10d +XDIS 5ebf: BMI2 APXEVEX APX_F 6252AD08F7C1 shlx r8, r9, r10 +XDIS 5ec5: BMI2 APXEVEX APX_F 6252AD08F701 shlx r8, qword ptr [r9], r10 +XDIS 5ecb: SHIFT APXEVEX APX_F 62D47C08C0E802 shr r8b, 0x2 +XDIS 5ed2: SHIFT APXEVEX APX_F 62D47C08C02802 shr byte ptr [r8], 0x2 +XDIS 5ed9: SHIFT APXEVEX APX_F 62D47C0CC0E802 shr r8b, 0x2 +XDIS 5ee0: SHIFT APXEVEX APX_F 62D47C0CC02802 shr byte ptr [r8], 0x2 +XDIS 5ee7: SHIFT APXEVEX APX_F 62D43C18C1E902 shr r8d, r9d, 0x2 +XDIS 5eee: SHIFT APXEVEX APX_F 62D4BC18C1E902 shr r8, r9, 0x2 +XDIS 5ef5: SHIFT APXEVEX APX_F 62D43C18C12902 shr r8d, dword ptr [r9], 0x2 +XDIS 5efc: SHIFT APXEVEX APX_F 62D4BC18C12902 shr r8, qword ptr [r9], 0x2 +XDIS 5f03: SHIFT APXEVEX APX_F 62D43C1CC1E902 shr r8d, r9d, 0x2 +XDIS 5f0a: SHIFT APXEVEX APX_F 62D4BC1CC1E902 shr r8, r9, 0x2 +XDIS 5f11: SHIFT APXEVEX APX_F 62D43C1CC12902 shr r8d, dword ptr [r9], 0x2 +XDIS 5f18: SHIFT APXEVEX APX_F 62D4BC1CC12902 shr r8, qword ptr [r9], 0x2 +XDIS 5f1f: SHIFT APXEVEX APX_F 62D43D18C1E902 shr r8w, r9w, 0x2 +XDIS 5f26: SHIFT APXEVEX APX_F 62D4BD18C1E902 shr r8, r9, 0x2 +XDIS 5f2d: SHIFT APXEVEX APX_F 62D43D18C12902 shr r8w, word ptr [r9], 0x2 +XDIS 5f34: SHIFT APXEVEX APX_F 62D4BD18C12902 shr r8, qword ptr [r9], 0x2 +XDIS 5f3b: SHIFT APXEVEX APX_F 62D43D1CC1E902 shr r8w, r9w, 0x2 +XDIS 5f42: SHIFT APXEVEX APX_F 62D4BD1CC1E902 shr r8, r9, 0x2 +XDIS 5f49: SHIFT APXEVEX APX_F 62D43D1CC12902 shr r8w, word ptr [r9], 0x2 +XDIS 5f50: SHIFT APXEVEX APX_F 62D4BD1CC12902 shr r8, qword ptr [r9], 0x2 +XDIS 5f57: SHIFT APXEVEX APX_F 62D47C08D0E8 shr r8b, 0x1 +XDIS 5f5d: SHIFT APXEVEX APX_F 62D47C08D028 shr byte ptr [r8], 0x1 +XDIS 5f63: SHIFT APXEVEX APX_F 62D47C0CD0E8 shr r8b, 0x1 +XDIS 5f69: SHIFT APXEVEX APX_F 62D47C0CD028 shr byte ptr [r8], 0x1 +XDIS 5f6f: SHIFT APXEVEX APX_F 62D43C18D0E9 shr r8b, r9b, 0x1 +XDIS 5f75: SHIFT APXEVEX APX_F 62D43C18D029 shr r8b, byte ptr [r9], 0x1 +XDIS 5f7b: SHIFT APXEVEX APX_F 62D43C1CD0E9 shr r8b, r9b, 0x1 +XDIS 5f81: SHIFT APXEVEX APX_F 62D43C1CD029 shr r8b, byte ptr [r9], 0x1 +XDIS 5f87: SHIFT APXEVEX APX_F 62D47C08D1E8 shr r8d, 0x1 +XDIS 5f8d: SHIFT APXEVEX APX_F 62D4FC08D1E8 shr r8, 0x1 +XDIS 5f93: SHIFT APXEVEX APX_F 62D47C08D128 shr dword ptr [r8], 0x1 +XDIS 5f99: SHIFT APXEVEX APX_F 62D4FC08D128 shr qword ptr [r8], 0x1 +XDIS 5f9f: SHIFT APXEVEX APX_F 62D47C0CD1E8 shr r8d, 0x1 +XDIS 5fa5: SHIFT APXEVEX APX_F 62D4FC0CD1E8 shr r8, 0x1 +XDIS 5fab: SHIFT APXEVEX APX_F 62D47C0CD128 shr dword ptr [r8], 0x1 +XDIS 5fb1: SHIFT APXEVEX APX_F 62D4FC0CD128 shr qword ptr [r8], 0x1 +XDIS 5fb7: SHIFT APXEVEX APX_F 62D47D08D1E8 shr r8w, 0x1 +XDIS 5fbd: SHIFT APXEVEX APX_F 62D4FD08D1E8 shr r8, 0x1 +XDIS 5fc3: SHIFT APXEVEX APX_F 62D47D08D128 shr word ptr [r8], 0x1 +XDIS 5fc9: SHIFT APXEVEX APX_F 62D4FD08D128 shr qword ptr [r8], 0x1 +XDIS 5fcf: SHIFT APXEVEX APX_F 62D47D0CD1E8 shr r8w, 0x1 +XDIS 5fd5: SHIFT APXEVEX APX_F 62D4FD0CD1E8 shr r8, 0x1 +XDIS 5fdb: SHIFT APXEVEX APX_F 62D47D0CD128 shr word ptr [r8], 0x1 +XDIS 5fe1: SHIFT APXEVEX APX_F 62D4FD0CD128 shr qword ptr [r8], 0x1 +XDIS 5fe7: SHIFT APXEVEX APX_F 62D43C18D1E9 shr r8d, r9d, 0x1 +XDIS 5fed: SHIFT APXEVEX APX_F 62D4BC18D1E9 shr r8, r9, 0x1 +XDIS 5ff3: SHIFT APXEVEX APX_F 62D43C18D129 shr r8d, dword ptr [r9], 0x1 +XDIS 5ff9: SHIFT APXEVEX APX_F 62D4BC18D129 shr r8, qword ptr [r9], 0x1 +XDIS 5fff: SHIFT APXEVEX APX_F 62D43C1CD1E9 shr r8d, r9d, 0x1 +XDIS 6005: SHIFT APXEVEX APX_F 62D4BC1CD1E9 shr r8, r9, 0x1 +XDIS 600b: SHIFT APXEVEX APX_F 62D43C1CD129 shr r8d, dword ptr [r9], 0x1 +XDIS 6011: SHIFT APXEVEX APX_F 62D4BC1CD129 shr r8, qword ptr [r9], 0x1 +XDIS 6017: SHIFT APXEVEX APX_F 62D43D18D1E9 shr r8w, r9w, 0x1 +XDIS 601d: SHIFT APXEVEX APX_F 62D4BD18D1E9 shr r8, r9, 0x1 +XDIS 6023: SHIFT APXEVEX APX_F 62D43D18D129 shr r8w, word ptr [r9], 0x1 +XDIS 6029: SHIFT APXEVEX APX_F 62D4BD18D129 shr r8, qword ptr [r9], 0x1 +XDIS 602f: SHIFT APXEVEX APX_F 62D43D1CD1E9 shr r8w, r9w, 0x1 +XDIS 6035: SHIFT APXEVEX APX_F 62D4BD1CD1E9 shr r8, r9, 0x1 +XDIS 603b: SHIFT APXEVEX APX_F 62D43D1CD129 shr r8w, word ptr [r9], 0x1 +XDIS 6041: SHIFT APXEVEX APX_F 62D4BD1CD129 shr r8, qword ptr [r9], 0x1 +XDIS 6047: SHIFT APXEVEX APX_F 62D47C08D2E8 shr r8b, cl +XDIS 604d: SHIFT APXEVEX APX_F 62D47C08D228 shr byte ptr [r8], cl +XDIS 6053: SHIFT APXEVEX APX_F 62D47C0CD2E8 shr r8b, cl +XDIS 6059: SHIFT APXEVEX APX_F 62D47C0CD228 shr byte ptr [r8], cl +XDIS 605f: SHIFT APXEVEX APX_F 62D43C18D2E9 shr r8b, r9b, cl +XDIS 6065: SHIFT APXEVEX APX_F 62D43C18D229 shr r8b, byte ptr [r9], cl +XDIS 606b: SHIFT APXEVEX APX_F 62D43C1CD2E9 shr r8b, r9b, cl +XDIS 6071: SHIFT APXEVEX APX_F 62D43C1CD229 shr r8b, byte ptr [r9], cl +XDIS 6077: SHIFT APXEVEX APX_F 62D47C08D3E8 shr r8d, cl +XDIS 607d: SHIFT APXEVEX APX_F 62D4FC08D3E8 shr r8, cl +XDIS 6083: SHIFT APXEVEX APX_F 62D47C08D328 shr dword ptr [r8], cl +XDIS 6089: SHIFT APXEVEX APX_F 62D4FC08D328 shr qword ptr [r8], cl +XDIS 608f: SHIFT APXEVEX APX_F 62D47C0CD3E8 shr r8d, cl +XDIS 6095: SHIFT APXEVEX APX_F 62D4FC0CD3E8 shr r8, cl +XDIS 609b: SHIFT APXEVEX APX_F 62D47C0CD328 shr dword ptr [r8], cl +XDIS 60a1: SHIFT APXEVEX APX_F 62D4FC0CD328 shr qword ptr [r8], cl +XDIS 60a7: SHIFT APXEVEX APX_F 62D47D08D3E8 shr r8w, cl +XDIS 60ad: SHIFT APXEVEX APX_F 62D4FD08D3E8 shr r8, cl +XDIS 60b3: SHIFT APXEVEX APX_F 62D47D08D328 shr word ptr [r8], cl +XDIS 60b9: SHIFT APXEVEX APX_F 62D4FD08D328 shr qword ptr [r8], cl +XDIS 60bf: SHIFT APXEVEX APX_F 62D47D0CD3E8 shr r8w, cl +XDIS 60c5: SHIFT APXEVEX APX_F 62D4FD0CD3E8 shr r8, cl +XDIS 60cb: SHIFT APXEVEX APX_F 62D47D0CD328 shr word ptr [r8], cl +XDIS 60d1: SHIFT APXEVEX APX_F 62D4FD0CD328 shr qword ptr [r8], cl +XDIS 60d7: SHIFT APXEVEX APX_F 62D43C18D3E9 shr r8d, r9d, cl +XDIS 60dd: SHIFT APXEVEX APX_F 62D4BC18D3E9 shr r8, r9, cl +XDIS 60e3: SHIFT APXEVEX APX_F 62D43C18D329 shr r8d, dword ptr [r9], cl +XDIS 60e9: SHIFT APXEVEX APX_F 62D4BC18D329 shr r8, qword ptr [r9], cl +XDIS 60ef: SHIFT APXEVEX APX_F 62D43C1CD3E9 shr r8d, r9d, cl +XDIS 60f5: SHIFT APXEVEX APX_F 62D4BC1CD3E9 shr r8, r9, cl +XDIS 60fb: SHIFT APXEVEX APX_F 62D43C1CD329 shr r8d, dword ptr [r9], cl +XDIS 6101: SHIFT APXEVEX APX_F 62D4BC1CD329 shr r8, qword ptr [r9], cl +XDIS 6107: SHIFT APXEVEX APX_F 62D43D18D3E9 shr r8w, r9w, cl +XDIS 610d: SHIFT APXEVEX APX_F 62D4BD18D3E9 shr r8, r9, cl +XDIS 6113: SHIFT APXEVEX APX_F 62D43D18D329 shr r8w, word ptr [r9], cl +XDIS 6119: SHIFT APXEVEX APX_F 62D4BD18D329 shr r8, qword ptr [r9], cl +XDIS 611f: SHIFT APXEVEX APX_F 62D43D1CD3E9 shr r8w, r9w, cl +XDIS 6125: SHIFT APXEVEX APX_F 62D4BD1CD3E9 shr r8, r9, cl +XDIS 612b: SHIFT APXEVEX APX_F 62D43D1CD329 shr r8w, word ptr [r9], cl +XDIS 6131: SHIFT APXEVEX APX_F 62D4BD1CD329 shr r8, qword ptr [r9], cl +XDIS 6137: SHIFT APXEVEX APX_F 62D43C18C0E902 shr r8b, r9b, 0x2 +XDIS 613e: SHIFT APXEVEX APX_F 62D43C18C02902 shr r8b, byte ptr [r9], 0x2 +XDIS 6145: SHIFT APXEVEX APX_F 62D43C1CC0E902 shr r8b, r9b, 0x2 +XDIS 614c: SHIFT APXEVEX APX_F 62D43C1CC02902 shr r8b, byte ptr [r9], 0x2 +XDIS 6153: SHIFT APXEVEX APX_F 62D47C08C1E802 shr r8d, 0x2 +XDIS 615a: SHIFT APXEVEX APX_F 62D4FC08C1E802 shr r8, 0x2 +XDIS 6161: SHIFT APXEVEX APX_F 62D47C08C12802 shr dword ptr [r8], 0x2 +XDIS 6168: SHIFT APXEVEX APX_F 62D4FC08C12802 shr qword ptr [r8], 0x2 +XDIS 616f: SHIFT APXEVEX APX_F 62D47C0CC1E802 shr r8d, 0x2 +XDIS 6176: SHIFT APXEVEX APX_F 62D4FC0CC1E802 shr r8, 0x2 +XDIS 617d: SHIFT APXEVEX APX_F 62D47C0CC12802 shr dword ptr [r8], 0x2 +XDIS 6184: SHIFT APXEVEX APX_F 62D4FC0CC12802 shr qword ptr [r8], 0x2 +XDIS 618b: SHIFT APXEVEX APX_F 62D47D08C1E802 shr r8w, 0x2 +XDIS 6192: SHIFT APXEVEX APX_F 62D4FD08C1E802 shr r8, 0x2 +XDIS 6199: SHIFT APXEVEX APX_F 62D47D08C12802 shr word ptr [r8], 0x2 +XDIS 61a0: SHIFT APXEVEX APX_F 62D4FD08C12802 shr qword ptr [r8], 0x2 +XDIS 61a7: SHIFT APXEVEX APX_F 62D47D0CC1E802 shr r8w, 0x2 +XDIS 61ae: SHIFT APXEVEX APX_F 62D4FD0CC1E802 shr r8, 0x2 +XDIS 61b5: SHIFT APXEVEX APX_F 62D47D0CC12802 shr word ptr [r8], 0x2 +XDIS 61bc: SHIFT APXEVEX APX_F 62D4FD0CC12802 shr qword ptr [r8], 0x2 +XDIS 61c3: SHIFT APXEVEX APX_F 62547C082CC802 shrd r8d, r9d, 0x2 +XDIS 61ca: SHIFT APXEVEX APX_F 6254FC082CC802 shrd r8, r9, 0x2 +XDIS 61d1: SHIFT APXEVEX APX_F 62547C082C0802 shrd dword ptr [r8], r9d, 0x2 +XDIS 61d8: SHIFT APXEVEX APX_F 6254FC082C0802 shrd qword ptr [r8], r9, 0x2 +XDIS 61df: SHIFT APXEVEX APX_F 62547C0C2CC802 shrd r8d, r9d, 0x2 +XDIS 61e6: SHIFT APXEVEX APX_F 6254FC0C2CC802 shrd r8, r9, 0x2 +XDIS 61ed: SHIFT APXEVEX APX_F 62547C0C2C0802 shrd dword ptr [r8], r9d, 0x2 +XDIS 61f4: SHIFT APXEVEX APX_F 6254FC0C2C0802 shrd qword ptr [r8], r9, 0x2 +XDIS 61fb: SHIFT APXEVEX APX_F 62547D082CC802 shrd r8w, r9w, 0x2 +XDIS 6202: SHIFT APXEVEX APX_F 6254FD082CC802 shrd r8, r9, 0x2 +XDIS 6209: SHIFT APXEVEX APX_F 62547D082C0802 shrd word ptr [r8], r9w, 0x2 +XDIS 6210: SHIFT APXEVEX APX_F 6254FD082C0802 shrd qword ptr [r8], r9, 0x2 +XDIS 6217: SHIFT APXEVEX APX_F 62547D0C2CC802 shrd r8w, r9w, 0x2 +XDIS 621e: SHIFT APXEVEX APX_F 6254FD0C2CC802 shrd r8, r9, 0x2 +XDIS 6225: SHIFT APXEVEX APX_F 62547D0C2C0802 shrd word ptr [r8], r9w, 0x2 +XDIS 622c: SHIFT APXEVEX APX_F 6254FD0C2C0802 shrd qword ptr [r8], r9, 0x2 +XDIS 6233: SHIFT APXEVEX APX_F 62543C182CD102 shrd r8d, r9d, r10d, 0x2 +XDIS 623a: SHIFT APXEVEX APX_F 6254BC182CD102 shrd r8, r9, r10, 0x2 +XDIS 6241: SHIFT APXEVEX APX_F 62543C182C1102 shrd r8d, dword ptr [r9], r10d, 0x2 +XDIS 6248: SHIFT APXEVEX APX_F 6254BC182C1102 shrd r8, qword ptr [r9], r10, 0x2 +XDIS 624f: SHIFT APXEVEX APX_F 62543C1C2CD102 shrd r8d, r9d, r10d, 0x2 +XDIS 6256: SHIFT APXEVEX APX_F 6254BC1C2CD102 shrd r8, r9, r10, 0x2 +XDIS 625d: SHIFT APXEVEX APX_F 62543C1C2C1102 shrd r8d, dword ptr [r9], r10d, 0x2 +XDIS 6264: SHIFT APXEVEX APX_F 6254BC1C2C1102 shrd r8, qword ptr [r9], r10, 0x2 +XDIS 626b: SHIFT APXEVEX APX_F 62543D182CD102 shrd r8w, r9w, r10w, 0x2 +XDIS 6272: SHIFT APXEVEX APX_F 6254BD182CD102 shrd r8, r9, r10, 0x2 +XDIS 6279: SHIFT APXEVEX APX_F 62543D182C1102 shrd r8w, word ptr [r9], r10w, 0x2 +XDIS 6280: SHIFT APXEVEX APX_F 6254BD182C1102 shrd r8, qword ptr [r9], r10, 0x2 +XDIS 6287: SHIFT APXEVEX APX_F 62543D1C2CD102 shrd r8w, r9w, r10w, 0x2 +XDIS 628e: SHIFT APXEVEX APX_F 6254BD1C2CD102 shrd r8, r9, r10, 0x2 +XDIS 6295: SHIFT APXEVEX APX_F 62543D1C2C1102 shrd r8w, word ptr [r9], r10w, 0x2 +XDIS 629c: SHIFT APXEVEX APX_F 6254BD1C2C1102 shrd r8, qword ptr [r9], r10, 0x2 +XDIS 62a3: SHIFT APXEVEX APX_F 62547C08ADC8 shrd r8d, r9d, cl +XDIS 62a9: SHIFT APXEVEX APX_F 6254FC08ADC8 shrd r8, r9, cl +XDIS 62af: SHIFT APXEVEX APX_F 62547C08AD08 shrd dword ptr [r8], r9d, cl +XDIS 62b5: SHIFT APXEVEX APX_F 6254FC08AD08 shrd qword ptr [r8], r9, cl +XDIS 62bb: SHIFT APXEVEX APX_F 62547C0CADC8 shrd r8d, r9d, cl +XDIS 62c1: SHIFT APXEVEX APX_F 6254FC0CADC8 shrd r8, r9, cl +XDIS 62c7: SHIFT APXEVEX APX_F 62547C0CAD08 shrd dword ptr [r8], r9d, cl +XDIS 62cd: SHIFT APXEVEX APX_F 6254FC0CAD08 shrd qword ptr [r8], r9, cl +XDIS 62d3: SHIFT APXEVEX APX_F 62547D08ADC8 shrd r8w, r9w, cl +XDIS 62d9: SHIFT APXEVEX APX_F 6254FD08ADC8 shrd r8, r9, cl +XDIS 62df: SHIFT APXEVEX APX_F 62547D08AD08 shrd word ptr [r8], r9w, cl +XDIS 62e5: SHIFT APXEVEX APX_F 6254FD08AD08 shrd qword ptr [r8], r9, cl +XDIS 62eb: SHIFT APXEVEX APX_F 62547D0CADC8 shrd r8w, r9w, cl +XDIS 62f1: SHIFT APXEVEX APX_F 6254FD0CADC8 shrd r8, r9, cl +XDIS 62f7: SHIFT APXEVEX APX_F 62547D0CAD08 shrd word ptr [r8], r9w, cl +XDIS 62fd: SHIFT APXEVEX APX_F 6254FD0CAD08 shrd qword ptr [r8], r9, cl +XDIS 6303: SHIFT APXEVEX APX_F 62543C18ADD1 shrd r8d, r9d, r10d, cl +XDIS 6309: SHIFT APXEVEX APX_F 6254BC18ADD1 shrd r8, r9, r10, cl +XDIS 630f: SHIFT APXEVEX APX_F 62543C18AD11 shrd r8d, dword ptr [r9], r10d, cl +XDIS 6315: SHIFT APXEVEX APX_F 6254BC18AD11 shrd r8, qword ptr [r9], r10, cl +XDIS 631b: SHIFT APXEVEX APX_F 62543C1CADD1 shrd r8d, r9d, r10d, cl +XDIS 6321: SHIFT APXEVEX APX_F 6254BC1CADD1 shrd r8, r9, r10, cl +XDIS 6327: SHIFT APXEVEX APX_F 62543C1CAD11 shrd r8d, dword ptr [r9], r10d, cl +XDIS 632d: SHIFT APXEVEX APX_F 6254BC1CAD11 shrd r8, qword ptr [r9], r10, cl +XDIS 6333: SHIFT APXEVEX APX_F 62543D18ADD1 shrd r8w, r9w, r10w, cl +XDIS 6339: SHIFT APXEVEX APX_F 6254BD18ADD1 shrd r8, r9, r10, cl +XDIS 633f: SHIFT APXEVEX APX_F 62543D18AD11 shrd r8w, word ptr [r9], r10w, cl +XDIS 6345: SHIFT APXEVEX APX_F 6254BD18AD11 shrd r8, qword ptr [r9], r10, cl +XDIS 634b: SHIFT APXEVEX APX_F 62543D1CADD1 shrd r8w, r9w, r10w, cl +XDIS 6351: SHIFT APXEVEX APX_F 6254BD1CADD1 shrd r8, r9, r10, cl +XDIS 6357: SHIFT APXEVEX APX_F 62543D1CAD11 shrd r8w, word ptr [r9], r10w, cl +XDIS 635d: SHIFT APXEVEX APX_F 6254BD1CAD11 shrd r8, qword ptr [r9], r10, cl +XDIS 6363: BMI2 APXEVEX APX_F 62522F08F7C1 shrx r8d, r9d, r10d +XDIS 6369: BMI2 APXEVEX APX_F 62522F08F701 shrx r8d, dword ptr [r9], r10d +XDIS 636f: BMI2 APXEVEX APX_F 6252AF08F7C1 shrx r8, r9, r10 +XDIS 6375: BMI2 APXEVEX APX_F 6252AF08F701 shrx r8, qword ptr [r9], r10 +XDIS 637b: BINARY APXEVEX APX_F 62547C0828C8 sub r8b, r9b +XDIS 6381: BINARY APXEVEX APX_F 62547C082808 sub byte ptr [r8], r9b +XDIS 6387: BINARY APXEVEX APX_F 62547C0C28C8 sub r8b, r9b +XDIS 638d: BINARY APXEVEX APX_F 62547C0C2808 sub byte ptr [r8], r9b +XDIS 6393: BINARY APXEVEX APX_F 62D43D1883E902 sub r8w, r9w, 0x2 +XDIS 639a: BINARY APXEVEX APX_F 62D4BD1883E902 sub r8, r9, 0x2 +XDIS 63a1: BINARY APXEVEX APX_F 62D43D18832902 sub r8w, word ptr [r9], 0x2 +XDIS 63a8: BINARY APXEVEX APX_F 62D4BD18832902 sub r8, qword ptr [r9], 0x2 +XDIS 63af: BINARY APXEVEX APX_F 62D43D1C83E902 sub r8w, r9w, 0x2 +XDIS 63b6: BINARY APXEVEX APX_F 62D4BD1C83E902 sub r8, r9, 0x2 +XDIS 63bd: BINARY APXEVEX APX_F 62D43D1C832902 sub r8w, word ptr [r9], 0x2 +XDIS 63c4: BINARY APXEVEX APX_F 62D4BD1C832902 sub r8, qword ptr [r9], 0x2 +XDIS 63cb: BINARY APXEVEX APX_F 62543C1828D1 sub r8b, r9b, r10b +XDIS 63d1: BINARY APXEVEX APX_F 62543C182811 sub r8b, byte ptr [r9], r10b +XDIS 63d7: BINARY APXEVEX APX_F 62543C1C28D1 sub r8b, r9b, r10b +XDIS 63dd: BINARY APXEVEX APX_F 62543C1C2811 sub r8b, byte ptr [r9], r10b +XDIS 63e3: BINARY APXEVEX APX_F 62547C0829C8 sub r8d, r9d +XDIS 63e9: BINARY APXEVEX APX_F 6254FC0829C8 sub r8, r9 +XDIS 63ef: BINARY APXEVEX APX_F 62547C082908 sub dword ptr [r8], r9d +XDIS 63f5: BINARY APXEVEX APX_F 6254FC082908 sub qword ptr [r8], r9 +XDIS 63fb: BINARY APXEVEX APX_F 62547C0C29C8 sub r8d, r9d +XDIS 6401: BINARY APXEVEX APX_F 6254FC0C29C8 sub r8, r9 +XDIS 6407: BINARY APXEVEX APX_F 62547C0C2908 sub dword ptr [r8], r9d +XDIS 640d: BINARY APXEVEX APX_F 6254FC0C2908 sub qword ptr [r8], r9 +XDIS 6413: BINARY APXEVEX APX_F 62547D0829C8 sub r8w, r9w +XDIS 6419: BINARY APXEVEX APX_F 6254FD0829C8 sub r8, r9 +XDIS 641f: BINARY APXEVEX APX_F 62547D082908 sub word ptr [r8], r9w +XDIS 6425: BINARY APXEVEX APX_F 6254FD082908 sub qword ptr [r8], r9 +XDIS 642b: BINARY APXEVEX APX_F 62547D0C29C8 sub r8w, r9w +XDIS 6431: BINARY APXEVEX APX_F 6254FD0C29C8 sub r8, r9 +XDIS 6437: BINARY APXEVEX APX_F 62547D0C2908 sub word ptr [r8], r9w +XDIS 643d: BINARY APXEVEX APX_F 6254FD0C2908 sub qword ptr [r8], r9 +XDIS 6443: BINARY APXEVEX APX_F 62543C1829D1 sub r8d, r9d, r10d +XDIS 6449: BINARY APXEVEX APX_F 6254BC1829D1 sub r8, r9, r10 +XDIS 644f: BINARY APXEVEX APX_F 62543C182911 sub r8d, dword ptr [r9], r10d +XDIS 6455: BINARY APXEVEX APX_F 6254BC182911 sub r8, qword ptr [r9], r10 +XDIS 645b: BINARY APXEVEX APX_F 62543C1C29D1 sub r8d, r9d, r10d +XDIS 6461: BINARY APXEVEX APX_F 6254BC1C29D1 sub r8, r9, r10 +XDIS 6467: BINARY APXEVEX APX_F 62543C1C2911 sub r8d, dword ptr [r9], r10d +XDIS 646d: BINARY APXEVEX APX_F 6254BC1C2911 sub r8, qword ptr [r9], r10 +XDIS 6473: BINARY APXEVEX APX_F 62543D1829D1 sub r8w, r9w, r10w +XDIS 6479: BINARY APXEVEX APX_F 6254BD1829D1 sub r8, r9, r10 +XDIS 647f: BINARY APXEVEX APX_F 62543D182911 sub r8w, word ptr [r9], r10w +XDIS 6485: BINARY APXEVEX APX_F 6254BD182911 sub r8, qword ptr [r9], r10 +XDIS 648b: BINARY APXEVEX APX_F 62543D1C29D1 sub r8w, r9w, r10w +XDIS 6491: BINARY APXEVEX APX_F 6254BD1C29D1 sub r8, r9, r10 +XDIS 6497: BINARY APXEVEX APX_F 62543D1C2911 sub r8w, word ptr [r9], r10w +XDIS 649d: BINARY APXEVEX APX_F 6254BD1C2911 sub r8, qword ptr [r9], r10 +XDIS 64a3: BINARY APXEVEX APX_F 62547C082AC8 sub r9b, r8b +XDIS 64a9: BINARY APXEVEX APX_F 62547C082A01 sub r8b, byte ptr [r9] +XDIS 64af: BINARY APXEVEX APX_F 62547C0C2AC8 sub r9b, r8b +XDIS 64b5: BINARY APXEVEX APX_F 62547C0C2A01 sub r8b, byte ptr [r9] +XDIS 64bb: BINARY APXEVEX APX_F 62543C182AD1 sub r8b, r10b, r9b +XDIS 64c1: BINARY APXEVEX APX_F 62543C182A0A sub r8b, r9b, byte ptr [r10] +XDIS 64c7: BINARY APXEVEX APX_F 62543C1C2AD1 sub r8b, r10b, r9b +XDIS 64cd: BINARY APXEVEX APX_F 62543C1C2A0A sub r8b, r9b, byte ptr [r10] +XDIS 64d3: BINARY APXEVEX APX_F 62547C082BC8 sub r9d, r8d +XDIS 64d9: BINARY APXEVEX APX_F 6254FC082BC8 sub r9, r8 +XDIS 64df: BINARY APXEVEX APX_F 62547C082B01 sub r8d, dword ptr [r9] +XDIS 64e5: BINARY APXEVEX APX_F 6254FC082B01 sub r8, qword ptr [r9] +XDIS 64eb: BINARY APXEVEX APX_F 62547C0C2BC8 sub r9d, r8d +XDIS 64f1: BINARY APXEVEX APX_F 6254FC0C2BC8 sub r9, r8 +XDIS 64f7: BINARY APXEVEX APX_F 62547C0C2B01 sub r8d, dword ptr [r9] +XDIS 64fd: BINARY APXEVEX APX_F 6254FC0C2B01 sub r8, qword ptr [r9] +XDIS 6503: BINARY APXEVEX APX_F 62547D082BC8 sub r9w, r8w +XDIS 6509: BINARY APXEVEX APX_F 6254FD082BC8 sub r9, r8 +XDIS 650f: BINARY APXEVEX APX_F 62547D082B01 sub r8w, word ptr [r9] +XDIS 6515: BINARY APXEVEX APX_F 6254FD082B01 sub r8, qword ptr [r9] +XDIS 651b: BINARY APXEVEX APX_F 62547D0C2BC8 sub r9w, r8w +XDIS 6521: BINARY APXEVEX APX_F 6254FD0C2BC8 sub r9, r8 +XDIS 6527: BINARY APXEVEX APX_F 62547D0C2B01 sub r8w, word ptr [r9] +XDIS 652d: BINARY APXEVEX APX_F 6254FD0C2B01 sub r8, qword ptr [r9] +XDIS 6533: BINARY APXEVEX APX_F 62D43C1880E902 sub r8b, r9b, 0x2 +XDIS 653a: BINARY APXEVEX APX_F 62D43C18802902 sub r8b, byte ptr [r9], 0x2 +XDIS 6541: BINARY APXEVEX APX_F 62D43C1C80E902 sub r8b, r9b, 0x2 +XDIS 6548: BINARY APXEVEX APX_F 62D43C1C802902 sub r8b, byte ptr [r9], 0x2 +XDIS 654f: BINARY APXEVEX APX_F 62543C182BD1 sub r8d, r10d, r9d +XDIS 6555: BINARY APXEVEX APX_F 6254BC182BD1 sub r8, r10, r9 +XDIS 655b: BINARY APXEVEX APX_F 62543C182B0A sub r8d, r9d, dword ptr [r10] +XDIS 6561: BINARY APXEVEX APX_F 6254BC182B0A sub r8, r9, qword ptr [r10] +XDIS 6567: BINARY APXEVEX APX_F 62543C1C2BD1 sub r8d, r10d, r9d +XDIS 656d: BINARY APXEVEX APX_F 6254BC1C2BD1 sub r8, r10, r9 +XDIS 6573: BINARY APXEVEX APX_F 62543C1C2B0A sub r8d, r9d, dword ptr [r10] +XDIS 6579: BINARY APXEVEX APX_F 6254BC1C2B0A sub r8, r9, qword ptr [r10] +XDIS 657f: BINARY APXEVEX APX_F 62543D182BD1 sub r8w, r10w, r9w +XDIS 6585: BINARY APXEVEX APX_F 6254BD182BD1 sub r8, r10, r9 +XDIS 658b: BINARY APXEVEX APX_F 62543D182B0A sub r8w, r9w, word ptr [r10] +XDIS 6591: BINARY APXEVEX APX_F 6254BD182B0A sub r8, r9, qword ptr [r10] +XDIS 6597: BINARY APXEVEX APX_F 62543D1C2BD1 sub r8w, r10w, r9w +XDIS 659d: BINARY APXEVEX APX_F 6254BD1C2BD1 sub r8, r10, r9 +XDIS 65a3: BINARY APXEVEX APX_F 62543D1C2B0A sub r8w, r9w, word ptr [r10] +XDIS 65a9: BINARY APXEVEX APX_F 6254BD1C2B0A sub r8, r9, qword ptr [r10] +XDIS 65af: BINARY APXEVEX APX_F 62D47C0880E802 sub r8b, 0x2 +XDIS 65b6: BINARY APXEVEX APX_F 62D47C08802802 sub byte ptr [r8], 0x2 +XDIS 65bd: BINARY APXEVEX APX_F 62D47C0C80E802 sub r8b, 0x2 +XDIS 65c4: BINARY APXEVEX APX_F 62D47C0C802802 sub byte ptr [r8], 0x2 +XDIS 65cb: BINARY APXEVEX APX_F 62D47C0881E802000000 sub r8d, 0x2 +XDIS 65d5: BINARY APXEVEX APX_F 62D4FC0881E802000000 sub r8, 0x2 +XDIS 65df: BINARY APXEVEX APX_F 62D47C08812802000000 sub dword ptr [r8], 0x2 +XDIS 65e9: BINARY APXEVEX APX_F 62D4FC08812802000000 sub qword ptr [r8], 0x2 +XDIS 65f3: BINARY APXEVEX APX_F 62D47C0C81E802000000 sub r8d, 0x2 +XDIS 65fd: BINARY APXEVEX APX_F 62D4FC0C81E802000000 sub r8, 0x2 +XDIS 6607: BINARY APXEVEX APX_F 62D47C0C812802000000 sub dword ptr [r8], 0x2 +XDIS 6611: BINARY APXEVEX APX_F 62D4FC0C812802000000 sub qword ptr [r8], 0x2 +XDIS 661b: BINARY APXEVEX APX_F 62D47D0881E80200 sub r8w, 0x2 +XDIS 6623: BINARY APXEVEX APX_F 62D4FD0881E802000000 sub r8, 0x2 +XDIS 662d: BINARY APXEVEX APX_F 62D47D0881280200 sub word ptr [r8], 0x2 +XDIS 6635: BINARY APXEVEX APX_F 62D4FD08812802000000 sub qword ptr [r8], 0x2 +XDIS 663f: BINARY APXEVEX APX_F 62D47D0C81E80200 sub r8w, 0x2 +XDIS 6647: BINARY APXEVEX APX_F 62D4FD0C81E802000000 sub r8, 0x2 +XDIS 6651: BINARY APXEVEX APX_F 62D47D0C81280200 sub word ptr [r8], 0x2 +XDIS 6659: BINARY APXEVEX APX_F 62D4FD0C812802000000 sub qword ptr [r8], 0x2 +XDIS 6663: BINARY APXEVEX APX_F 62D43C1881E902000000 sub r8d, r9d, 0x2 +XDIS 666d: BINARY APXEVEX APX_F 62D4BC1881E902000000 sub r8, r9, 0x2 +XDIS 6677: BINARY APXEVEX APX_F 62D43C18812902000000 sub r8d, dword ptr [r9], 0x2 +XDIS 6681: BINARY APXEVEX APX_F 62D4BC18812902000000 sub r8, qword ptr [r9], 0x2 +XDIS 668b: BINARY APXEVEX APX_F 62D43C1C81E902000000 sub r8d, r9d, 0x2 +XDIS 6695: BINARY APXEVEX APX_F 62D4BC1C81E902000000 sub r8, r9, 0x2 +XDIS 669f: BINARY APXEVEX APX_F 62D43C1C812902000000 sub r8d, dword ptr [r9], 0x2 +XDIS 66a9: BINARY APXEVEX APX_F 62D4BC1C812902000000 sub r8, qword ptr [r9], 0x2 +XDIS 66b3: BINARY APXEVEX APX_F 62D43D1881E90200 sub r8w, r9w, 0x2 +XDIS 66bb: BINARY APXEVEX APX_F 62D4BD1881E902000000 sub r8, r9, 0x2 +XDIS 66c5: BINARY APXEVEX APX_F 62D43D1881290200 sub r8w, word ptr [r9], 0x2 +XDIS 66cd: BINARY APXEVEX APX_F 62D4BD18812902000000 sub r8, qword ptr [r9], 0x2 +XDIS 66d7: BINARY APXEVEX APX_F 62D43D1C81E90200 sub r8w, r9w, 0x2 +XDIS 66df: BINARY APXEVEX APX_F 62D4BD1C81E902000000 sub r8, r9, 0x2 +XDIS 66e9: BINARY APXEVEX APX_F 62D43D1C81290200 sub r8w, word ptr [r9], 0x2 +XDIS 66f1: BINARY APXEVEX APX_F 62D4BD1C812902000000 sub r8, qword ptr [r9], 0x2 +XDIS 66fb: BINARY APXEVEX APX_F 62D47C0883E802 sub r8d, 0x2 +XDIS 6702: BINARY APXEVEX APX_F 62D4FC0883E802 sub r8, 0x2 +XDIS 6709: BINARY APXEVEX APX_F 62D47C08832802 sub dword ptr [r8], 0x2 +XDIS 6710: BINARY APXEVEX APX_F 62D4FC08832802 sub qword ptr [r8], 0x2 +XDIS 6717: BINARY APXEVEX APX_F 62D47C0C83E802 sub r8d, 0x2 +XDIS 671e: BINARY APXEVEX APX_F 62D4FC0C83E802 sub r8, 0x2 +XDIS 6725: BINARY APXEVEX APX_F 62D47C0C832802 sub dword ptr [r8], 0x2 +XDIS 672c: BINARY APXEVEX APX_F 62D4FC0C832802 sub qword ptr [r8], 0x2 +XDIS 6733: BINARY APXEVEX APX_F 62D47D0883E802 sub r8w, 0x2 +XDIS 673a: BINARY APXEVEX APX_F 62D4FD0883E802 sub r8, 0x2 +XDIS 6741: BINARY APXEVEX APX_F 62D47D08832802 sub word ptr [r8], 0x2 +XDIS 6748: BINARY APXEVEX APX_F 62D4FD08832802 sub qword ptr [r8], 0x2 +XDIS 674f: BINARY APXEVEX APX_F 62D47D0C83E802 sub r8w, 0x2 +XDIS 6756: BINARY APXEVEX APX_F 62D4FD0C83E802 sub r8, 0x2 +XDIS 675d: BINARY APXEVEX APX_F 62D47D0C832802 sub word ptr [r8], 0x2 +XDIS 6764: BINARY APXEVEX APX_F 62D4FD0C832802 sub qword ptr [r8], 0x2 +XDIS 676b: BINARY APXEVEX APX_F 62D43C1883E902 sub r8d, r9d, 0x2 +XDIS 6772: BINARY APXEVEX APX_F 62D4BC1883E902 sub r8, r9, 0x2 +XDIS 6779: BINARY APXEVEX APX_F 62D43C18832902 sub r8d, dword ptr [r9], 0x2 +XDIS 6780: BINARY APXEVEX APX_F 62D4BC18832902 sub r8, qword ptr [r9], 0x2 +XDIS 6787: BINARY APXEVEX APX_F 62D43C1C83E902 sub r8d, r9d, 0x2 +XDIS 678e: BINARY APXEVEX APX_F 62D4BC1C83E902 sub r8, r9, 0x2 +XDIS 6795: BINARY APXEVEX APX_F 62D43C1C832902 sub r8d, dword ptr [r9], 0x2 +XDIS 679c: BINARY APXEVEX APX_F 62D4BC1C832902 sub r8, qword ptr [r9], 0x2 +XDIS 67a3: BMI1 APXEVEX APX_F 62547C08F4C1 tzcnt r8d, r9d +XDIS 67a9: BMI1 APXEVEX APX_F 6254FC08F4C1 tzcnt r8, r9 +XDIS 67af: BMI1 APXEVEX APX_F 62547C08F401 tzcnt r8d, dword ptr [r9] +XDIS 67b5: BMI1 APXEVEX APX_F 6254FC08F401 tzcnt r8, qword ptr [r9] +XDIS 67bb: BMI1 APXEVEX APX_F 62547C0CF4C1 tzcnt r8d, r9d +XDIS 67c1: BMI1 APXEVEX APX_F 6254FC0CF4C1 tzcnt r8, r9 +XDIS 67c7: BMI1 APXEVEX APX_F 62547C0CF401 tzcnt r8d, dword ptr [r9] +XDIS 67cd: BMI1 APXEVEX APX_F 6254FC0CF401 tzcnt r8, qword ptr [r9] +XDIS 67d3: BMI1 APXEVEX APX_F 62547D08F4C1 tzcnt r8w, r9w +XDIS 67d9: BMI1 APXEVEX APX_F 6254FD08F4C1 tzcnt r8, r9 +XDIS 67df: BMI1 APXEVEX APX_F 62547D08F401 tzcnt r8w, word ptr [r9] +XDIS 67e5: BMI1 APXEVEX APX_F 6254FD08F401 tzcnt r8, qword ptr [r9] +XDIS 67eb: BMI1 APXEVEX APX_F 62547D0CF4C1 tzcnt r8w, r9w +XDIS 67f1: BMI1 APXEVEX APX_F 6254FD0CF4C1 tzcnt r8, r9 +XDIS 67f7: BMI1 APXEVEX APX_F 62547D0CF401 tzcnt r8w, word ptr [r9] +XDIS 67fd: BMI1 APXEVEX APX_F 6254FD0CF401 tzcnt r8, qword ptr [r9] +XDIS 6803: CET APXEVEX APX_F 62547C086608 wrssd dword ptr [r8], r9d +XDIS 6809: CET APXEVEX APX_F 6254FC086608 wrssq qword ptr [r8], r9 +XDIS 680f: CET APXEVEX APX_F 62547D086508 wrussd dword ptr [r8], r9d +XDIS 6815: CET APXEVEX APX_F 6254FD086508 wrussq qword ptr [r8], r9 +XDIS 681b: LOGICAL APXEVEX APX_F 62547C0830C8 xor r8b, r9b +XDIS 6821: LOGICAL APXEVEX APX_F 62547C083008 xor byte ptr [r8], r9b +XDIS 6827: LOGICAL APXEVEX APX_F 62547C0C30C8 xor r8b, r9b +XDIS 682d: LOGICAL APXEVEX APX_F 62547C0C3008 xor byte ptr [r8], r9b +XDIS 6833: LOGICAL APXEVEX APX_F 62D43D1883F102 xor r8w, r9w, 0x2 +XDIS 683a: LOGICAL APXEVEX APX_F 62D4BD1883F102 xor r8, r9, 0x2 +XDIS 6841: LOGICAL APXEVEX APX_F 62D43D18833102 xor r8w, word ptr [r9], 0x2 +XDIS 6848: LOGICAL APXEVEX APX_F 62D4BD18833102 xor r8, qword ptr [r9], 0x2 +XDIS 684f: LOGICAL APXEVEX APX_F 62D43D1C83F102 xor r8w, r9w, 0x2 +XDIS 6856: LOGICAL APXEVEX APX_F 62D4BD1C83F102 xor r8, r9, 0x2 +XDIS 685d: LOGICAL APXEVEX APX_F 62D43D1C833102 xor r8w, word ptr [r9], 0x2 +XDIS 6864: LOGICAL APXEVEX APX_F 62D4BD1C833102 xor r8, qword ptr [r9], 0x2 +XDIS 686b: LOGICAL APXEVEX APX_F 62543C1830D1 xor r8b, r9b, r10b +XDIS 6871: LOGICAL APXEVEX APX_F 62543C183011 xor r8b, byte ptr [r9], r10b +XDIS 6877: LOGICAL APXEVEX APX_F 62543C1C30D1 xor r8b, r9b, r10b +XDIS 687d: LOGICAL APXEVEX APX_F 62543C1C3011 xor r8b, byte ptr [r9], r10b +XDIS 6883: LOGICAL APXEVEX APX_F 62547C0831C8 xor r8d, r9d +XDIS 6889: LOGICAL APXEVEX APX_F 6254FC0831C8 xor r8, r9 +XDIS 688f: LOGICAL APXEVEX APX_F 62547C083108 xor dword ptr [r8], r9d +XDIS 6895: LOGICAL APXEVEX APX_F 6254FC083108 xor qword ptr [r8], r9 +XDIS 689b: LOGICAL APXEVEX APX_F 62547C0C31C8 xor r8d, r9d +XDIS 68a1: LOGICAL APXEVEX APX_F 6254FC0C31C8 xor r8, r9 +XDIS 68a7: LOGICAL APXEVEX APX_F 62547C0C3108 xor dword ptr [r8], r9d +XDIS 68ad: LOGICAL APXEVEX APX_F 6254FC0C3108 xor qword ptr [r8], r9 +XDIS 68b3: LOGICAL APXEVEX APX_F 62547D0831C8 xor r8w, r9w +XDIS 68b9: LOGICAL APXEVEX APX_F 6254FD0831C8 xor r8, r9 +XDIS 68bf: LOGICAL APXEVEX APX_F 62547D083108 xor word ptr [r8], r9w +XDIS 68c5: LOGICAL APXEVEX APX_F 6254FD083108 xor qword ptr [r8], r9 +XDIS 68cb: LOGICAL APXEVEX APX_F 62547D0C31C8 xor r8w, r9w +XDIS 68d1: LOGICAL APXEVEX APX_F 6254FD0C31C8 xor r8, r9 +XDIS 68d7: LOGICAL APXEVEX APX_F 62547D0C3108 xor word ptr [r8], r9w +XDIS 68dd: LOGICAL APXEVEX APX_F 6254FD0C3108 xor qword ptr [r8], r9 +XDIS 68e3: LOGICAL APXEVEX APX_F 62543C1831D1 xor r8d, r9d, r10d +XDIS 68e9: LOGICAL APXEVEX APX_F 6254BC1831D1 xor r8, r9, r10 +XDIS 68ef: LOGICAL APXEVEX APX_F 62543C183111 xor r8d, dword ptr [r9], r10d +XDIS 68f5: LOGICAL APXEVEX APX_F 6254BC183111 xor r8, qword ptr [r9], r10 +XDIS 68fb: LOGICAL APXEVEX APX_F 62543C1C31D1 xor r8d, r9d, r10d +XDIS 6901: LOGICAL APXEVEX APX_F 6254BC1C31D1 xor r8, r9, r10 +XDIS 6907: LOGICAL APXEVEX APX_F 62543C1C3111 xor r8d, dword ptr [r9], r10d +XDIS 690d: LOGICAL APXEVEX APX_F 6254BC1C3111 xor r8, qword ptr [r9], r10 +XDIS 6913: LOGICAL APXEVEX APX_F 62543D1831D1 xor r8w, r9w, r10w +XDIS 6919: LOGICAL APXEVEX APX_F 6254BD1831D1 xor r8, r9, r10 +XDIS 691f: LOGICAL APXEVEX APX_F 62543D183111 xor r8w, word ptr [r9], r10w +XDIS 6925: LOGICAL APXEVEX APX_F 6254BD183111 xor r8, qword ptr [r9], r10 +XDIS 692b: LOGICAL APXEVEX APX_F 62543D1C31D1 xor r8w, r9w, r10w +XDIS 6931: LOGICAL APXEVEX APX_F 6254BD1C31D1 xor r8, r9, r10 +XDIS 6937: LOGICAL APXEVEX APX_F 62543D1C3111 xor r8w, word ptr [r9], r10w +XDIS 693d: LOGICAL APXEVEX APX_F 6254BD1C3111 xor r8, qword ptr [r9], r10 +XDIS 6943: LOGICAL APXEVEX APX_F 62547C0832C8 xor r9b, r8b +XDIS 6949: LOGICAL APXEVEX APX_F 62547C083201 xor r8b, byte ptr [r9] +XDIS 694f: LOGICAL APXEVEX APX_F 62547C0C32C8 xor r9b, r8b +XDIS 6955: LOGICAL APXEVEX APX_F 62547C0C3201 xor r8b, byte ptr [r9] +XDIS 695b: LOGICAL APXEVEX APX_F 62543C1832D1 xor r8b, r10b, r9b +XDIS 6961: LOGICAL APXEVEX APX_F 62543C18320A xor r8b, r9b, byte ptr [r10] +XDIS 6967: LOGICAL APXEVEX APX_F 62543C1C32D1 xor r8b, r10b, r9b +XDIS 696d: LOGICAL APXEVEX APX_F 62543C1C320A xor r8b, r9b, byte ptr [r10] +XDIS 6973: LOGICAL APXEVEX APX_F 62547C0833C8 xor r9d, r8d +XDIS 6979: LOGICAL APXEVEX APX_F 6254FC0833C8 xor r9, r8 +XDIS 697f: LOGICAL APXEVEX APX_F 62547C083301 xor r8d, dword ptr [r9] +XDIS 6985: LOGICAL APXEVEX APX_F 6254FC083301 xor r8, qword ptr [r9] +XDIS 698b: LOGICAL APXEVEX APX_F 62547C0C33C8 xor r9d, r8d +XDIS 6991: LOGICAL APXEVEX APX_F 6254FC0C33C8 xor r9, r8 +XDIS 6997: LOGICAL APXEVEX APX_F 62547C0C3301 xor r8d, dword ptr [r9] +XDIS 699d: LOGICAL APXEVEX APX_F 6254FC0C3301 xor r8, qword ptr [r9] +XDIS 69a3: LOGICAL APXEVEX APX_F 62547D0833C8 xor r9w, r8w +XDIS 69a9: LOGICAL APXEVEX APX_F 6254FD0833C8 xor r9, r8 +XDIS 69af: LOGICAL APXEVEX APX_F 62547D083301 xor r8w, word ptr [r9] +XDIS 69b5: LOGICAL APXEVEX APX_F 6254FD083301 xor r8, qword ptr [r9] +XDIS 69bb: LOGICAL APXEVEX APX_F 62547D0C33C8 xor r9w, r8w +XDIS 69c1: LOGICAL APXEVEX APX_F 6254FD0C33C8 xor r9, r8 +XDIS 69c7: LOGICAL APXEVEX APX_F 62547D0C3301 xor r8w, word ptr [r9] +XDIS 69cd: LOGICAL APXEVEX APX_F 6254FD0C3301 xor r8, qword ptr [r9] +XDIS 69d3: LOGICAL APXEVEX APX_F 62D43C1880F102 xor r8b, r9b, 0x2 +XDIS 69da: LOGICAL APXEVEX APX_F 62D43C18803102 xor r8b, byte ptr [r9], 0x2 +XDIS 69e1: LOGICAL APXEVEX APX_F 62D43C1C80F102 xor r8b, r9b, 0x2 +XDIS 69e8: LOGICAL APXEVEX APX_F 62D43C1C803102 xor r8b, byte ptr [r9], 0x2 +XDIS 69ef: LOGICAL APXEVEX APX_F 62543C1833D1 xor r8d, r10d, r9d +XDIS 69f5: LOGICAL APXEVEX APX_F 6254BC1833D1 xor r8, r10, r9 +XDIS 69fb: LOGICAL APXEVEX APX_F 62543C18330A xor r8d, r9d, dword ptr [r10] +XDIS 6a01: LOGICAL APXEVEX APX_F 6254BC18330A xor r8, r9, qword ptr [r10] +XDIS 6a07: LOGICAL APXEVEX APX_F 62543C1C33D1 xor r8d, r10d, r9d +XDIS 6a0d: LOGICAL APXEVEX APX_F 6254BC1C33D1 xor r8, r10, r9 +XDIS 6a13: LOGICAL APXEVEX APX_F 62543C1C330A xor r8d, r9d, dword ptr [r10] +XDIS 6a19: LOGICAL APXEVEX APX_F 6254BC1C330A xor r8, r9, qword ptr [r10] +XDIS 6a1f: LOGICAL APXEVEX APX_F 62543D1833D1 xor r8w, r10w, r9w +XDIS 6a25: LOGICAL APXEVEX APX_F 6254BD1833D1 xor r8, r10, r9 +XDIS 6a2b: LOGICAL APXEVEX APX_F 62543D18330A xor r8w, r9w, word ptr [r10] +XDIS 6a31: LOGICAL APXEVEX APX_F 6254BD18330A xor r8, r9, qword ptr [r10] +XDIS 6a37: LOGICAL APXEVEX APX_F 62543D1C33D1 xor r8w, r10w, r9w +XDIS 6a3d: LOGICAL APXEVEX APX_F 6254BD1C33D1 xor r8, r10, r9 +XDIS 6a43: LOGICAL APXEVEX APX_F 62543D1C330A xor r8w, r9w, word ptr [r10] +XDIS 6a49: LOGICAL APXEVEX APX_F 6254BD1C330A xor r8, r9, qword ptr [r10] +XDIS 6a4f: LOGICAL APXEVEX APX_F 62D47C0880F002 xor r8b, 0x2 +XDIS 6a56: LOGICAL APXEVEX APX_F 62D47C08803002 xor byte ptr [r8], 0x2 +XDIS 6a5d: LOGICAL APXEVEX APX_F 62D47C0C80F002 xor r8b, 0x2 +XDIS 6a64: LOGICAL APXEVEX APX_F 62D47C0C803002 xor byte ptr [r8], 0x2 +XDIS 6a6b: LOGICAL APXEVEX APX_F 62D47C0881F002000000 xor r8d, 0x2 +XDIS 6a75: LOGICAL APXEVEX APX_F 62D4FC0881F002000000 xor r8, 0x2 +XDIS 6a7f: LOGICAL APXEVEX APX_F 62D47C08813002000000 xor dword ptr [r8], 0x2 +XDIS 6a89: LOGICAL APXEVEX APX_F 62D4FC08813002000000 xor qword ptr [r8], 0x2 +XDIS 6a93: LOGICAL APXEVEX APX_F 62D47C0C81F002000000 xor r8d, 0x2 +XDIS 6a9d: LOGICAL APXEVEX APX_F 62D4FC0C81F002000000 xor r8, 0x2 +XDIS 6aa7: LOGICAL APXEVEX APX_F 62D47C0C813002000000 xor dword ptr [r8], 0x2 +XDIS 6ab1: LOGICAL APXEVEX APX_F 62D4FC0C813002000000 xor qword ptr [r8], 0x2 +XDIS 6abb: LOGICAL APXEVEX APX_F 62D47D0881F00200 xor r8w, 0x2 +XDIS 6ac3: LOGICAL APXEVEX APX_F 62D4FD0881F002000000 xor r8, 0x2 +XDIS 6acd: LOGICAL APXEVEX APX_F 62D47D0881300200 xor word ptr [r8], 0x2 +XDIS 6ad5: LOGICAL APXEVEX APX_F 62D4FD08813002000000 xor qword ptr [r8], 0x2 +XDIS 6adf: LOGICAL APXEVEX APX_F 62D47D0C81F00200 xor r8w, 0x2 +XDIS 6ae7: LOGICAL APXEVEX APX_F 62D4FD0C81F002000000 xor r8, 0x2 +XDIS 6af1: LOGICAL APXEVEX APX_F 62D47D0C81300200 xor word ptr [r8], 0x2 +XDIS 6af9: LOGICAL APXEVEX APX_F 62D4FD0C813002000000 xor qword ptr [r8], 0x2 +XDIS 6b03: LOGICAL APXEVEX APX_F 62D43C1881F102000000 xor r8d, r9d, 0x2 +XDIS 6b0d: LOGICAL APXEVEX APX_F 62D4BC1881F102000000 xor r8, r9, 0x2 +XDIS 6b17: LOGICAL APXEVEX APX_F 62D43C18813102000000 xor r8d, dword ptr [r9], 0x2 +XDIS 6b21: LOGICAL APXEVEX APX_F 62D4BC18813102000000 xor r8, qword ptr [r9], 0x2 +XDIS 6b2b: LOGICAL APXEVEX APX_F 62D43C1C81F102000000 xor r8d, r9d, 0x2 +XDIS 6b35: LOGICAL APXEVEX APX_F 62D4BC1C81F102000000 xor r8, r9, 0x2 +XDIS 6b3f: LOGICAL APXEVEX APX_F 62D43C1C813102000000 xor r8d, dword ptr [r9], 0x2 +XDIS 6b49: LOGICAL APXEVEX APX_F 62D4BC1C813102000000 xor r8, qword ptr [r9], 0x2 +XDIS 6b53: LOGICAL APXEVEX APX_F 62D43D1881F10200 xor r8w, r9w, 0x2 +XDIS 6b5b: LOGICAL APXEVEX APX_F 62D4BD1881F102000000 xor r8, r9, 0x2 +XDIS 6b65: LOGICAL APXEVEX APX_F 62D43D1881310200 xor r8w, word ptr [r9], 0x2 +XDIS 6b6d: LOGICAL APXEVEX APX_F 62D4BD18813102000000 xor r8, qword ptr [r9], 0x2 +XDIS 6b77: LOGICAL APXEVEX APX_F 62D43D1C81F10200 xor r8w, r9w, 0x2 +XDIS 6b7f: LOGICAL APXEVEX APX_F 62D4BD1C81F102000000 xor r8, r9, 0x2 +XDIS 6b89: LOGICAL APXEVEX APX_F 62D43D1C81310200 xor r8w, word ptr [r9], 0x2 +XDIS 6b91: LOGICAL APXEVEX APX_F 62D4BD1C813102000000 xor r8, qword ptr [r9], 0x2 +XDIS 6b9b: LOGICAL APXEVEX APX_F 62D47C0883F002 xor r8d, 0x2 +XDIS 6ba2: LOGICAL APXEVEX APX_F 62D4FC0883F002 xor r8, 0x2 +XDIS 6ba9: LOGICAL APXEVEX APX_F 62D47C08833002 xor dword ptr [r8], 0x2 +XDIS 6bb0: LOGICAL APXEVEX APX_F 62D4FC08833002 xor qword ptr [r8], 0x2 +XDIS 6bb7: LOGICAL APXEVEX APX_F 62D47C0C83F002 xor r8d, 0x2 +XDIS 6bbe: LOGICAL APXEVEX APX_F 62D4FC0C83F002 xor r8, 0x2 +XDIS 6bc5: LOGICAL APXEVEX APX_F 62D47C0C833002 xor dword ptr [r8], 0x2 +XDIS 6bcc: LOGICAL APXEVEX APX_F 62D4FC0C833002 xor qword ptr [r8], 0x2 +XDIS 6bd3: LOGICAL APXEVEX APX_F 62D47D0883F002 xor r8w, 0x2 +XDIS 6bda: LOGICAL APXEVEX APX_F 62D4FD0883F002 xor r8, 0x2 +XDIS 6be1: LOGICAL APXEVEX APX_F 62D47D08833002 xor word ptr [r8], 0x2 +XDIS 6be8: LOGICAL APXEVEX APX_F 62D4FD08833002 xor qword ptr [r8], 0x2 +XDIS 6bef: LOGICAL APXEVEX APX_F 62D47D0C83F002 xor r8w, 0x2 +XDIS 6bf6: LOGICAL APXEVEX APX_F 62D4FD0C83F002 xor r8, 0x2 +XDIS 6bfd: LOGICAL APXEVEX APX_F 62D47D0C833002 xor word ptr [r8], 0x2 +XDIS 6c04: LOGICAL APXEVEX APX_F 62D4FD0C833002 xor qword ptr [r8], 0x2 +XDIS 6c0b: LOGICAL APXEVEX APX_F 62D43C1883F102 xor r8d, r9d, 0x2 +XDIS 6c12: LOGICAL APXEVEX APX_F 62D4BC1883F102 xor r8, r9, 0x2 +XDIS 6c19: LOGICAL APXEVEX APX_F 62D43C18833102 xor r8d, dword ptr [r9], 0x2 +XDIS 6c20: LOGICAL APXEVEX APX_F 62D4BC18833102 xor r8, qword ptr [r9], 0x2 +XDIS 6c27: LOGICAL APXEVEX APX_F 62D43C1C83F102 xor r8d, r9d, 0x2 +XDIS 6c2e: LOGICAL APXEVEX APX_F 62D4BC1C83F102 xor r8, r9, 0x2 +XDIS 6c35: LOGICAL APXEVEX APX_F 62D43C1C833102 xor r8d, dword ptr [r9], 0x2 +XDIS 6c3c: LOGICAL APXEVEX APX_F 62D4BC1C833102 xor r8, qword ptr [r9], 0x2 +XDIS 6c43: AMX_TILE AMX_TILE APX_F_AMX 62D27C084900 ldtilecfg zmmword ptr [r8] +XDIS 6c49: AMX_TILE AMX_TILE APX_F_AMX 62D27D084900 sttilecfg zmmword ptr [r8] +XDIS 6c4f: AMX_TILE AMX_TILE APX_F_AMX 62D27F084B3C01 tileloadd tmm7, ptr [r9+rax*1] +XDIS 6c56: AMX_TILE AMX_TILE APX_F_AMX 62D27D084B3C01 tileloaddt1 tmm7, ptr [r9+rax*1] +XDIS 6c5d: AMX_TILE AMX_TILE APX_F_AMX 62D27E084B3C00 tilestored ptr [r8+rax*1], tmm7 +XDIS 6c64: POP APX_F APX_F D50858 popp rax +XDIS 6c67: PUSH APX_F APX_F D50850 pushp rax +XDIS 6c6a: UNCOND_BR APX_F APX_F D500A10123456789012345 jmpabs 0x4523018967452301 +# end of text section. +# Errors: 0 +#XED3 DECODE STATS +#Total DECODE cycles: 14589244 +#Total instructions DECODE: 4081 +#Total tail DECODE cycles: 15082352 +#Total tail instructions DECODE: 4131 +#Total cycles/instruction DECODE: 3574.92 +#Total tail cycles/instruction DECODE: 3651.02 diff --git a/tests/tests-apx/test-00030/cmd b/tests/tests-apx/test-00030/cmd new file mode 100644 index 00000000..6dcdc417 --- /dev/null +++ b/tests/tests-apx/test-00030/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62D4 FC 0881EC33C00003 diff --git a/tests/tests-apx/test-00030/codes b/tests/tests-apx/test-00030/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00030/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00030/retcode.reference b/tests/tests-apx/test-00030/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00030/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00030/stderr.reference b/tests/tests-apx/test-00030/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00030/stdout.reference b/tests/tests-apx/test-00030/stdout.reference new file mode 100644 index 00000000..a973c825 --- /dev/null +++ b/tests/tests-apx/test-00030/stdout.reference @@ -0,0 +1,8 @@ +62D4FC0881EC33C00003 +ICLASS: SUB +CATEGORY: BINARY +EXTENSION: APXEVEX +IFORM: SUB_GPRv_IMMz_APX +ISA_SET: APX_F +ATTRIBUTES: SCALABLE +SHORT: sub r12, 0x300c033 diff --git a/tests/tests-apx/test-00031/cmd b/tests/tests-apx/test-00031/cmd new file mode 100644 index 00000000..1bef1318 --- /dev/null +++ b/tests/tests-apx/test-00031/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62D4 FD 0881EC33C00003 diff --git a/tests/tests-apx/test-00031/codes b/tests/tests-apx/test-00031/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00031/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00031/retcode.reference b/tests/tests-apx/test-00031/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00031/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00031/stderr.reference b/tests/tests-apx/test-00031/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00031/stdout.reference b/tests/tests-apx/test-00031/stdout.reference new file mode 100644 index 00000000..7a193314 --- /dev/null +++ b/tests/tests-apx/test-00031/stdout.reference @@ -0,0 +1,8 @@ +62D4FD0881EC33C00003 +ICLASS: SUB +CATEGORY: BINARY +EXTENSION: APXEVEX +IFORM: SUB_GPRv_IMMz_APX +ISA_SET: APX_F +ATTRIBUTES: SCALABLE +SHORT: sub r12, 0x300c033 diff --git a/tests/tests-apx/test-00032/cmd b/tests/tests-apx/test-00032/cmd new file mode 100644 index 00000000..bc8ec4c1 --- /dev/null +++ b/tests/tests-apx/test-00032/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62D4 7C 0881EC33C00003 diff --git a/tests/tests-apx/test-00032/codes b/tests/tests-apx/test-00032/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00032/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00032/retcode.reference b/tests/tests-apx/test-00032/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00032/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00032/stderr.reference b/tests/tests-apx/test-00032/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00032/stdout.reference b/tests/tests-apx/test-00032/stdout.reference new file mode 100644 index 00000000..b79af7cd --- /dev/null +++ b/tests/tests-apx/test-00032/stdout.reference @@ -0,0 +1,8 @@ +62D47C0881EC33C00003 +ICLASS: SUB +CATEGORY: BINARY +EXTENSION: APXEVEX +IFORM: SUB_GPRv_IMMz_APX +ISA_SET: APX_F +ATTRIBUTES: SCALABLE +SHORT: sub r12d, 0x300c033 diff --git a/tests/tests-apx/test-00033/cmd b/tests/tests-apx/test-00033/cmd new file mode 100644 index 00000000..9f5c8320 --- /dev/null +++ b/tests/tests-apx/test-00033/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 62D4 7D 0881EC33C0 diff --git a/tests/tests-apx/test-00033/codes b/tests/tests-apx/test-00033/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00033/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00033/retcode.reference b/tests/tests-apx/test-00033/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00033/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00033/stderr.reference b/tests/tests-apx/test-00033/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00033/stdout.reference b/tests/tests-apx/test-00033/stdout.reference new file mode 100644 index 00000000..d2faa3bc --- /dev/null +++ b/tests/tests-apx/test-00033/stdout.reference @@ -0,0 +1,8 @@ +62D47D0881EC33C0 +ICLASS: SUB +CATEGORY: BINARY +EXTENSION: APXEVEX +IFORM: SUB_GPRv_IMMz_APX +ISA_SET: APX_F +ATTRIBUTES: SCALABLE +SHORT: sub r12w, 0xc033 diff --git a/tests/tests-apx/test-00034/cmd b/tests/tests-apx/test-00034/cmd new file mode 100644 index 00000000..b30e9786 --- /dev/null +++ b/tests/tests-apx/test-00034/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -set NO_APX 1 -d 62F2E408F2C2 diff --git a/tests/tests-apx/test-00034/codes b/tests/tests-apx/test-00034/codes new file mode 100644 index 00000000..205f2c13 --- /dev/null +++ b/tests/tests-apx/test-00034/codes @@ -0,0 +1 @@ +DEC diff --git a/tests/tests-apx/test-00034/retcode.reference b/tests/tests-apx/test-00034/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00034/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00034/stderr.reference b/tests/tests-apx/test-00034/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00034/stdout.reference b/tests/tests-apx/test-00034/stdout.reference new file mode 100644 index 00000000..20ddcbdd --- /dev/null +++ b/tests/tests-apx/test-00034/stdout.reference @@ -0,0 +1,2 @@ +62F2E408F2C2 +ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 6 PC: 0x0: [62F2E408F2C2] diff --git a/tests/tests-apx/test-00035/cmd b/tests/tests-apx/test-00035/cmd new file mode 100644 index 00000000..2f78b58a --- /dev/null +++ b/tests/tests-apx/test-00035/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 67 D500 A10123456789012345 diff --git a/tests/tests-apx/test-00035/codes b/tests/tests-apx/test-00035/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00035/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00035/retcode.reference b/tests/tests-apx/test-00035/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00035/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00035/stderr.reference b/tests/tests-apx/test-00035/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00035/stdout.reference b/tests/tests-apx/test-00035/stdout.reference new file mode 100644 index 00000000..0e2c0b3e --- /dev/null +++ b/tests/tests-apx/test-00035/stdout.reference @@ -0,0 +1,2 @@ +67D500A10123456789012345 +ERROR: GENERAL_ERROR Could not decode at offset: 0x0 len: 12 PC: 0x0: [67D500A10123456789012345] diff --git a/tests/tests-apx/test-00036/cmd b/tests/tests-apx/test-00036/cmd new file mode 100644 index 00000000..28844966 --- /dev/null +++ b/tests/tests-apx/test-00036/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 D500 A10123456789012345 diff --git a/tests/tests-apx/test-00036/codes b/tests/tests-apx/test-00036/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00036/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00036/retcode.reference b/tests/tests-apx/test-00036/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00036/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00036/stderr.reference b/tests/tests-apx/test-00036/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00036/stdout.reference b/tests/tests-apx/test-00036/stdout.reference new file mode 100644 index 00000000..044bfdae --- /dev/null +++ b/tests/tests-apx/test-00036/stdout.reference @@ -0,0 +1,26 @@ +Attempting to decode: d5 00 a1 01 23 45 67 89 01 23 45 +iclass JMPABS category UNCOND_BR ISA-extension APX_F ISA-set APX_F +instruction-length 11 +operand-width 32 +effective-operand-width 32 +effective-address-width 64 +stack-address-width 64 +iform-enum-name JMPABS_ABSBRu64_APX +iform-enum-name-dispatch (zero based) 0 +iclass-max-iform-dispatch 1 +Nominal opcode position 2 +Nominal opcode 0xa1 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 ABSBR BRANCH_DISPLACEMENT_BYTES=8 0x4523018967452301 EXPLICIT R U64 64 8 1 64 UINT INVALID +Memory Operands + MemopBytes = 0 +ATTRIBUTES: +REX2 PREFIX +EXCEPTION TYPE: APX_LEGACY_JMPABS +[APX] +ISA SET: [APX_F] +0 CPUID GROUP NAME: [APX_F] + 0 CPUID RECORD NAME: [APX_F] + {Leaf 0x00000007, subleaf 0x00000001, EDX[21:21]} = 1 diff --git a/tests/tests-apx/test-00037/cmd b/tests/tests-apx/test-00037/cmd new file mode 100644 index 00000000..df9d5697 --- /dev/null +++ b/tests/tests-apx/test-00037/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d A10123456789012345 diff --git a/tests/tests-apx/test-00037/codes b/tests/tests-apx/test-00037/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00037/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00037/retcode.reference b/tests/tests-apx/test-00037/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00037/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00037/stderr.reference b/tests/tests-apx/test-00037/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00037/stdout.reference b/tests/tests-apx/test-00037/stdout.reference new file mode 100644 index 00000000..678a942a --- /dev/null +++ b/tests/tests-apx/test-00037/stdout.reference @@ -0,0 +1,8 @@ +A10123456789012345 +ICLASS: MOV +CATEGORY: DATAXFER +EXTENSION: BASE +IFORM: MOV_OrAX_MEMv +ISA_SET: I86 +ATTRIBUTES: FIXED_BASE0 SCALABLE +SHORT: mov eax, dword ptr [0x4523018967452301] diff --git a/tests/tests-apx/test-00038/cmd b/tests/tests-apx/test-00038/cmd new file mode 100644 index 00000000..c44692f5 --- /dev/null +++ b/tests/tests-apx/test-00038/cmd @@ -0,0 +1 @@ + BUILDDIR/xed -64 -d 67 A101234567 diff --git a/tests/tests-apx/test-00038/codes b/tests/tests-apx/test-00038/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00038/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00038/retcode.reference b/tests/tests-apx/test-00038/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00038/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00038/stderr.reference b/tests/tests-apx/test-00038/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00038/stdout.reference b/tests/tests-apx/test-00038/stdout.reference new file mode 100644 index 00000000..8e1d09eb --- /dev/null +++ b/tests/tests-apx/test-00038/stdout.reference @@ -0,0 +1,8 @@ +67A101234567 +ICLASS: MOV +CATEGORY: DATAXFER +EXTENSION: BASE +IFORM: MOV_OrAX_MEMv +ISA_SET: I86 +ATTRIBUTES: FIXED_BASE0 SCALABLE +SHORT: mov eax, dword ptr [0x67452301] diff --git a/tests/tests-apx/test-00039/cmd b/tests/tests-apx/test-00039/cmd new file mode 100644 index 00000000..f70a1b44 --- /dev/null +++ b/tests/tests-apx/test-00039/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 -chip FUTURE 62D2FC00F3D9 diff --git a/tests/tests-apx/test-00039/codes b/tests/tests-apx/test-00039/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00039/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00039/retcode.reference b/tests/tests-apx/test-00039/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00039/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00039/stderr.reference b/tests/tests-apx/test-00039/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00039/stdout.reference b/tests/tests-apx/test-00039/stdout.reference new file mode 100644 index 00000000..f749bf5e --- /dev/null +++ b/tests/tests-apx/test-00039/stdout.reference @@ -0,0 +1,33 @@ +Setting chip to FUTURE +Attempting to decode: 62 d2 fc 00 f3 d9 +iclass BLSI category BMI1 ISA-extension APXEVEX ISA-set APX_F +instruction-length 6 +operand-width 64 +effective-operand-width 64 +effective-address-width 64 +stack-address-width 64 +iform-enum-name BLSI_GPR64i64_GPR64i64_APX +iform-enum-name-dispatch (zero based) 2 +iclass-max-iform-dispatch 8 +Nominal opcode position 4 +Nominal opcode 0xf3 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=R16 EXPLICIT W Q 64 8 1 64 INT GPR +1 REG1 REG1=R9 EXPLICIT R Q 64 8 1 64 INT GPR +2 REG2 REG2=RFLAGS SUPPRESSED W Y 64 8 1 64 INT FLAGS +Memory Operands + MemopBytes = 0 +FLAGS: + must-write-rflags of-0 sf-mod zf-mod af-u pf-u cf-0 + read: mask=0x0 + written: of sf zf af pf cf mask=0x8d5 + undefined: af pf mask=0x14 +ATTRIBUTES: +EXCEPTION TYPE: APX_EVEX_BMI +[APX] Uses-EGPR +ISA SET: [APX_F] +0 CPUID GROUP NAME: [APX_F] + 0 CPUID RECORD NAME: [APX_F] + {Leaf 0x00000007, subleaf 0x00000001, EDX[21:21]} = 1 diff --git a/tests/tests-apx/test-00040/cmd b/tests/tests-apx/test-00040/cmd new file mode 100644 index 00000000..0b35010e --- /dev/null +++ b/tests/tests-apx/test-00040/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 -chip FUTURE 66d580124C8300 diff --git a/tests/tests-apx/test-00040/codes b/tests/tests-apx/test-00040/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00040/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00040/retcode.reference b/tests/tests-apx/test-00040/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00040/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00040/stderr.reference b/tests/tests-apx/test-00040/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00040/stdout.reference b/tests/tests-apx/test-00040/stdout.reference new file mode 100644 index 00000000..165e59bd --- /dev/null +++ b/tests/tests-apx/test-00040/stdout.reference @@ -0,0 +1,33 @@ +Setting chip to FUTURE +Attempting to decode: 66 d5 80 12 4c 83 00 +iclass MOVLPD category DATAXFER ISA-extension SSE2 ISA-set SSE2 +instruction-length 7 +operand-width 32 +effective-operand-width 32 +effective-address-width 64 +stack-address-width 64 +iform-enum-name MOVLPD_XMMsd_MEMq +iform-enum-name-dispatch (zero based) 1 +iclass-max-iform-dispatch 2 +Nominal opcode position 3 +Nominal opcode 0x12 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=XMM1 EXPLICIT RW SD 64 8 1 64 DOUBLE XMM +1 MEM0 (see below) EXPLICIT R Q 64 8 1 64 INT INVALID +Memory Operands + 0 read BASE= RBX/GPR INDEX= RAX/GPR SCALE= 4 DISPLACEMENT_BYTES= 1 0x0000000000000000 base10=0 ASZ0=64 + MemopBytes = 8 +ATTRIBUTES: +MANDATORY 66 PREFIX +REX2 PREFIX +EXCEPTION TYPE: SSE_TYPE_5 +[APX] +SSE +Vector length: 128 +Number of legacy prefixes: 1 +ISA SET: [SSE2] +0 CPUID GROUP NAME: [SSE2] + 0 CPUID RECORD NAME: [SSE2] + {Leaf 0x00000001, subleaf 0x00000000, EDX[26:26]} = 1 diff --git a/tests/tests-apx/test-00041/cmd b/tests/tests-apx/test-00041/cmd new file mode 100644 index 00000000..8ed858e7 --- /dev/null +++ b/tests/tests-apx/test-00041/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 -chip ICE_LAKE 62B9E10A580C38 diff --git a/tests/tests-apx/test-00041/codes b/tests/tests-apx/test-00041/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00041/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00041/retcode.reference b/tests/tests-apx/test-00041/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00041/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00041/stderr.reference b/tests/tests-apx/test-00041/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00041/stdout.reference b/tests/tests-apx/test-00041/stdout.reference new file mode 100644 index 00000000..06ff6918 --- /dev/null +++ b/tests/tests-apx/test-00041/stdout.reference @@ -0,0 +1,3 @@ +Setting chip to ICE_LAKE +Attempting to decode: 62 b9 e1 0a 58 0c 38 +The instruction was not valid for the specified chip. diff --git a/tests/tests-apx/test-00042/cmd b/tests/tests-apx/test-00042/cmd new file mode 100644 index 00000000..f34d3d9c --- /dev/null +++ b/tests/tests-apx/test-00042/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 -chip FUTURE 62B9E10A580C38 diff --git a/tests/tests-apx/test-00042/codes b/tests/tests-apx/test-00042/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00042/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00042/retcode.reference b/tests/tests-apx/test-00042/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00042/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00042/stderr.reference b/tests/tests-apx/test-00042/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00042/stdout.reference b/tests/tests-apx/test-00042/stdout.reference new file mode 100644 index 00000000..27478734 --- /dev/null +++ b/tests/tests-apx/test-00042/stdout.reference @@ -0,0 +1,45 @@ +Setting chip to FUTURE +Attempting to decode: 62 b9 e1 0a 58 0c 38 +iclass VADDPD category AVX512 ISA-extension AVX512EVEX ISA-set AVX512F_128 +instruction-length 7 +operand-width 64 +effective-operand-width 64 +effective-address-width 64 +stack-address-width 64 +iform-enum-name VADDPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 +iform-enum-name-dispatch (zero based) 2 +iclass-max-iform-dispatch 11 +Nominal opcode position 4 +Nominal opcode 0x58 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=XMM1 EXPLICIT RCW DQ 128 16 2 64 DOUBLE XMM +1 REG1 REG1=K2 EXPLICIT R MSKW 64 8 64 1 INT MASK +2 REG2 REG2=XMM3 EXPLICIT R DQ 128 16 2 64 DOUBLE XMM +3 MEM0 (see below) EXPLICIT R VV 128 16 2 64 DOUBLE INVALID +Memory Operands + 0 read BASE= R16/GPR INDEX= R31/GPR SCALE= 1 ASZ0=64 + MemopBytes = 16 +ATTRIBUTES: BROADCAST_ENABLED DISP8_FULL MASKOP_EVEX MEMORY_FAULT_SUPPRESSION MXCSR +66-OSZ PREFIX +MANDATORY 66 PREFIX +EXCEPTION TYPE: AVX512_E2 +[APX] Uses-EGPR +AVX512 +Vector length: 128 +AVX512 vector elements: 2 +WRITE-MASKING +ISA SET: [AVX512F_128] +0 CPUID GROUP NAME: [AVX512F_128_AVX10] + 0 CPUID RECORD NAME: [AVX10_ENABLED] + {Leaf 0x00000007, subleaf 0x00000001, EDX[19:19]} = 1 + 1 CPUID RECORD NAME: [AVX10_VER1] + {Leaf 0x00000024, subleaf 0x00000000, EBX[0:7]} = 1 + 2 CPUID RECORD NAME: [AVX10_128VL] + {Leaf 0x00000024, subleaf 0x00000000, EBX[16:16]} = 1 +1 CPUID GROUP NAME: [AVX512F_128] + 0 CPUID RECORD NAME: [AVX512F] + {Leaf 0x00000007, subleaf 0x00000000, EBX[16:16]} = 1 + 1 CPUID RECORD NAME: [AVX512VL] + {Leaf 0x00000007, subleaf 0x00000000, EBX[31:31]} = 1 diff --git a/tests/tests-apx/test-00043/cmd b/tests/tests-apx/test-00043/cmd new file mode 100644 index 00000000..a4d6f0bf --- /dev/null +++ b/tests/tests-apx/test-00043/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 6254F50239C8 diff --git a/tests/tests-apx/test-00043/codes b/tests/tests-apx/test-00043/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00043/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00043/retcode.reference b/tests/tests-apx/test-00043/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00043/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00043/stderr.reference b/tests/tests-apx/test-00043/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00043/stdout.reference b/tests/tests-apx/test-00043/stdout.reference new file mode 100644 index 00000000..42fd9991 --- /dev/null +++ b/tests/tests-apx/test-00043/stdout.reference @@ -0,0 +1,36 @@ +Attempting to decode: 62 54 f5 02 39 c8 +iclass CCMPB category APX ISA-extension APXEVEX ISA-set APX_F +instruction-length 6 +operand-width 64 +effective-operand-width 64 +effective-address-width 64 +stack-address-width 64 +iform-enum-name CCMPB_GPRv_GPRv_DFV_APX +iform-enum-name-dispatch (zero based) 3 +iclass-max-iform-dispatch 12 +Nominal opcode position 4 +Nominal opcode 0x39 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=R8 EXPLICIT R V 64 8 1 64 INT GPR +1 REG1 REG1=R9 EXPLICIT R V 64 8 1 64 INT GPR +2 REG2 REG2=DFV14 EXPLICIT R INVALID 4 1 1 4 INT PSEUDO +3 REG3 REG3=RFLAGS SUPPRESSED W Y 64 8 1 64 INT FLAGS +Memory Operands + MemopBytes = 0 +FLAGS: + must-write-rflags of-mod sf-mod zf-mod af-mod pf-mod cf-mod + read: mask=0x0 + written: of sf zf af pf cf mask=0x8d5 + undefined: mask=0x0 + default: of=1, sf=1, zf=1, cf=0 +ATTRIBUTES: SCALABLE +66-OSZ PREFIX +MANDATORY 66 PREFIX +EXCEPTION TYPE: APX_EVEX_CCMP +[APX] +ISA SET: [APX_F] +0 CPUID GROUP NAME: [APX_F] + 0 CPUID RECORD NAME: [APX_F] + {Leaf 0x00000007, subleaf 0x00000001, EDX[21:21]} = 1 diff --git a/tests/tests-apx/test-00044/cmd b/tests/tests-apx/test-00044/cmd new file mode 100644 index 00000000..732e61db --- /dev/null +++ b/tests/tests-apx/test-00044/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 62D4BC1883D001 diff --git a/tests/tests-apx/test-00044/codes b/tests/tests-apx/test-00044/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00044/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00044/retcode.reference b/tests/tests-apx/test-00044/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00044/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00044/stderr.reference b/tests/tests-apx/test-00044/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00044/stdout.reference b/tests/tests-apx/test-00044/stdout.reference new file mode 100644 index 00000000..2aab179d --- /dev/null +++ b/tests/tests-apx/test-00044/stdout.reference @@ -0,0 +1,33 @@ +Attempting to decode: 62 d4 bc 18 83 d0 01 +iclass ADC category BINARY ISA-extension APXEVEX ISA-set APX_F +instruction-length 7 +operand-width 64 +effective-operand-width 64 +effective-address-width 64 +stack-address-width 64 +iform-enum-name ADC_GPRv_GPRv_IMM8_APX +iform-enum-name-dispatch (zero based) 18 +iclass-max-iform-dispatch 42 +Nominal opcode position 4 +Nominal opcode 0x83 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=R8 EXPLICIT W V 64 8 1 64 INT GPR +1 REG1 REG1=R8 EXPLICIT R V 64 8 1 64 INT GPR +2 IMM0 0x1(8b) EXPLICIT R B 8 1 1 8 INT INVALID +3 REG2 REG2=RFLAGS SUPPRESSED RW Y 64 8 1 64 INT FLAGS +Memory Operands + MemopBytes = 0 +FLAGS: + reads-rflags of-mod sf-mod zf-mod af-mod pf-mod cf-tst cf-mod + read: cf mask=0x1 + written: of sf zf af pf cf mask=0x8d5 + undefined: mask=0x0 +ATTRIBUTES: APX_NDD SCALABLE +EXCEPTION TYPE: APX_EVEX_INT +[APX] New-Data-Destination Zero-Upper +ISA SET: [APX_F] +0 CPUID GROUP NAME: [APX_F] + 0 CPUID RECORD NAME: [APX_F] + {Leaf 0x00000007, subleaf 0x00000001, EDX[21:21]} = 1 diff --git a/tests/tests-apx/test-00045/cmd b/tests/tests-apx/test-00045/cmd new file mode 100644 index 00000000..c3fc95f3 --- /dev/null +++ b/tests/tests-apx/test-00045/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 6254FC0CF4C0 diff --git a/tests/tests-apx/test-00045/codes b/tests/tests-apx/test-00045/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00045/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00045/retcode.reference b/tests/tests-apx/test-00045/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-apx/test-00045/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-apx/test-00045/stderr.reference b/tests/tests-apx/test-00045/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00045/stdout.reference b/tests/tests-apx/test-00045/stdout.reference new file mode 100644 index 00000000..cc92b0fc --- /dev/null +++ b/tests/tests-apx/test-00045/stdout.reference @@ -0,0 +1,26 @@ +Attempting to decode: 62 54 fc 0c f4 c0 +iclass TZCNT category BMI1 ISA-extension APXEVEX ISA-set APX_F +instruction-length 6 +operand-width 64 +effective-operand-width 64 +effective-address-width 64 +stack-address-width 64 +iform-enum-name TZCNT_GPRv_GPRv_APX +iform-enum-name-dispatch (zero based) 1 +iclass-max-iform-dispatch 4 +Nominal opcode position 4 +Nominal opcode 0xf4 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=R8 EXPLICIT W V 64 8 1 64 INT GPR +1 REG1 REG1=R8 EXPLICIT R V 64 8 1 64 INT GPR +Memory Operands + MemopBytes = 0 +ATTRIBUTES: APX_NF SCALABLE +EXCEPTION TYPE: APX_EVEX_INT +[APX] No-Flags +ISA SET: [APX_F] +0 CPUID GROUP NAME: [APX_F] + 0 CPUID RECORD NAME: [APX_F] + {Leaf 0x00000007, subleaf 0x00000001, EDX[21:21]} = 1 diff --git a/tests/tests-apx/test-00046/cmd b/tests/tests-apx/test-00046/cmd new file mode 100644 index 00000000..84c9304a --- /dev/null +++ b/tests/tests-apx/test-00046/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 62D434188FC1 diff --git a/tests/tests-apx/test-00046/codes b/tests/tests-apx/test-00046/codes new file mode 100644 index 00000000..76e9e3bd --- /dev/null +++ b/tests/tests-apx/test-00046/codes @@ -0,0 +1 @@ +DEC APX diff --git a/tests/tests-apx/test-00046/retcode.reference b/tests/tests-apx/test-00046/retcode.reference new file mode 100644 index 00000000..d00491fd --- /dev/null +++ b/tests/tests-apx/test-00046/retcode.reference @@ -0,0 +1 @@ +1 diff --git a/tests/tests-apx/test-00046/stderr.reference b/tests/tests-apx/test-00046/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-apx/test-00046/stdout.reference b/tests/tests-apx/test-00046/stdout.reference new file mode 100644 index 00000000..0875a267 --- /dev/null +++ b/tests/tests-apx/test-00046/stdout.reference @@ -0,0 +1,2 @@ +Attempting to decode: 62 d4 34 18 8f c1 +Unhandled error code BAD_REG_MATCH diff --git a/tests/tests-avx512/test-00015/stdout.reference b/tests/tests-avx512/test-00015/stdout.reference index 7f5de374..9518c423 100644 --- a/tests/tests-avx512/test-00015/stdout.reference +++ b/tests/tests-avx512/test-00015/stdout.reference @@ -3,6 +3,6 @@ ICLASS: KMOVD CATEGORY: KMASK EXTENSION: AVX512VEX IFORM: KMOVD_GPR32u32_MASKmskw_AVX512 -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD ATTRIBUTES: KMASK SHORT: kmovd ebx, k0 diff --git a/tests/tests-avx512/test-00016/stdout.reference b/tests/tests-avx512/test-00016/stdout.reference index ae404659..4bd13c16 100644 --- a/tests/tests-avx512/test-00016/stdout.reference +++ b/tests/tests-avx512/test-00016/stdout.reference @@ -3,6 +3,6 @@ ICLASS: KMOVQ CATEGORY: KMASK EXTENSION: AVX512VEX IFORM: KMOVQ_GPR64u64_MASKmskw_AVX512 -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ ATTRIBUTES: KMASK SHORT: kmovq rbx, k0 diff --git a/tests/tests-avx512/test-00017/stdout.reference b/tests/tests-avx512/test-00017/stdout.reference index dc339ffe..e1d52f6f 100644 --- a/tests/tests-avx512/test-00017/stdout.reference +++ b/tests/tests-avx512/test-00017/stdout.reference @@ -3,6 +3,6 @@ ICLASS: KMOVD CATEGORY: KMASK EXTENSION: AVX512VEX IFORM: KMOVD_MASKmskw_GPR32u32_AVX512 -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD ATTRIBUTES: KMASK SHORT: kmovd k7, ebx diff --git a/tests/tests-avx512/test-00018/stdout.reference b/tests/tests-avx512/test-00018/stdout.reference index 1a18d2d5..f88ce926 100644 --- a/tests/tests-avx512/test-00018/stdout.reference +++ b/tests/tests-avx512/test-00018/stdout.reference @@ -3,6 +3,6 @@ ICLASS: KMOVQ CATEGORY: KMASK EXTENSION: AVX512VEX IFORM: KMOVQ_MASKmskw_GPR64u64_AVX512 -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPQ ATTRIBUTES: KMASK SHORT: kmovq k7, rbx diff --git a/tests/tests-avx512/test-00019/stdout.reference b/tests/tests-avx512/test-00019/stdout.reference index a7b28297..95e69301 100644 --- a/tests/tests-avx512/test-00019/stdout.reference +++ b/tests/tests-avx512/test-00019/stdout.reference @@ -3,6 +3,6 @@ ICLASS: KMOVD CATEGORY: KMASK EXTENSION: AVX512VEX IFORM: KMOVD_MASKmskw_GPR32u32_AVX512 -ISA_SET: AVX512BW_KOP +ISA_SET: AVX512BW_KOPD ATTRIBUTES: KMASK SHORT: kmovd k7, ebx diff --git a/tests/tests-avx512/test-00023/cmd b/tests/tests-avx512/test-00023/cmd new file mode 100644 index 00000000..77c5edfb --- /dev/null +++ b/tests/tests-avx512/test-00023/cmd @@ -0,0 +1 @@ + BUILDDIR/xed-ex1 -64 62F5742858C2 diff --git a/tests/tests-avx512/test-00023/codes b/tests/tests-avx512/test-00023/codes new file mode 100644 index 00000000..bc9293ef --- /dev/null +++ b/tests/tests-avx512/test-00023/codes @@ -0,0 +1 @@ +DEC AVX10 diff --git a/tests/tests-avx512/test-00023/retcode.reference b/tests/tests-avx512/test-00023/retcode.reference new file mode 100644 index 00000000..573541ac --- /dev/null +++ b/tests/tests-avx512/test-00023/retcode.reference @@ -0,0 +1 @@ +0 diff --git a/tests/tests-avx512/test-00023/stderr.reference b/tests/tests-avx512/test-00023/stderr.reference new file mode 100644 index 00000000..e69de29b diff --git a/tests/tests-avx512/test-00023/stdout.reference b/tests/tests-avx512/test-00023/stdout.reference new file mode 100644 index 00000000..cc591ba4 --- /dev/null +++ b/tests/tests-avx512/test-00023/stdout.reference @@ -0,0 +1,39 @@ +Attempting to decode: 62 f5 74 28 58 c2 +iclass VADDPH category FP16 ISA-extension AVX512EVEX ISA-set AVX512_FP16_256 +instruction-length 6 +operand-width 32 +effective-operand-width 32 +effective-address-width 64 +stack-address-width 64 +iform-enum-name VADDPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 +iform-enum-name-dispatch (zero based) 3 +iclass-max-iform-dispatch 6 +Nominal opcode position 4 +Nominal opcode 0x58 +Operands +# TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS +# ==== ======= === == === ==== ===== ===== ====== ======== ======== +0 REG0 REG0=YMM0 EXPLICIT W QQ 256 32 16 16 FLOAT16 YMM +1 REG1 REG1=K0 EXPLICIT R MSKW 64 8 64 1 INT MASK +2 REG2 REG2=YMM1 EXPLICIT R QQ 256 32 16 16 FLOAT16 YMM +3 REG3 REG3=YMM2 EXPLICIT R QQ 256 32 16 16 FLOAT16 YMM +Memory Operands + MemopBytes = 0 +ATTRIBUTES: MASKOP_EVEX MXCSR +EXCEPTION TYPE: AVX512_E2 +AVX512 +Vector length: 256 +AVX512 vector elements: 16 +ISA SET: [AVX512_FP16_256] +0 CPUID GROUP NAME: [AVX512_FP16_256_AVX10] + 0 CPUID RECORD NAME: [AVX10_ENABLED] + {Leaf 0x00000007, subleaf 0x00000001, EDX[19:19]} = 1 + 1 CPUID RECORD NAME: [AVX10_VER1] + {Leaf 0x00000024, subleaf 0x00000000, EBX[0:7]} = 1 + 2 CPUID RECORD NAME: [AVX10_256VL] + {Leaf 0x00000024, subleaf 0x00000000, EBX[17:17]} = 1 +1 CPUID GROUP NAME: [AVX512_FP16_256] + 0 CPUID RECORD NAME: [AVX512_FP16] + {Leaf 0x00000007, subleaf 0x00000000, EDX[23:23]} = 1 + 1 CPUID RECORD NAME: [AVX512VL] + {Leaf 0x00000007, subleaf 0x00000000, EBX[31:31]} = 1 diff --git a/tests/tests-base/test-00009/cmd b/tests/tests-base/test-00009/cmd index af3c8467..2f3dcfdc 100644 --- a/tests/tests-base/test-00009/cmd +++ b/tests/tests-base/test-00009/cmd @@ -1 +1 @@ - BUILDDIR/xed-ex3 JLE BRDISP:11223344 + BUILDDIR/xed-ex3 JLE RELBR:11223344 diff --git a/tests/tests-base/test-00149/stdout.reference b/tests/tests-base/test-00149/stdout.reference index 4363c4c2..21b61ddb 100644 --- a/tests/tests-base/test-00149/stdout.reference +++ b/tests/tests-base/test-00149/stdout.reference @@ -24,5 +24,6 @@ SSE Vector length: 128 Number of legacy prefixes: 1 ISA SET: [SSE3] -0 CPUID BIT NAME: [SSE3] - Leaf 0x00000001, subleaf 0x00000000, ECX[0] +0 CPUID GROUP NAME: [SSE3] + 0 CPUID RECORD NAME: [SSE3] + {Leaf 0x00000001, subleaf 0x00000000, ECX[0:0]} = 1 diff --git a/tests/tests-base/test-00150/stdout.reference b/tests/tests-base/test-00150/stdout.reference index 80ee75ca..e513a60a 100644 --- a/tests/tests-base/test-00150/stdout.reference +++ b/tests/tests-base/test-00150/stdout.reference @@ -22,5 +22,6 @@ EXCEPTION TYPE: SSE_TYPE_7 SSE Vector length: 128 ISA SET: [SSE] -0 CPUID BIT NAME: [SSE] - Leaf 0x00000001, subleaf 0x00000000, EDX[25] +0 CPUID GROUP NAME: [SSE] + 0 CPUID RECORD NAME: [SSE] + {Leaf 0x00000001, subleaf 0x00000000, EDX[25:25]} = 1 diff --git a/tests/tests-base/test-00166/stdout.reference b/tests/tests-base/test-00166/stdout.reference index a6436864..8a5e45e8 100644 --- a/tests/tests-base/test-00166/stdout.reference +++ b/tests/tests-base/test-00166/stdout.reference @@ -25,5 +25,6 @@ SSE Vector length: 128 Number of legacy prefixes: 1 ISA SET: [SSE4] -0 CPUID BIT NAME: [SSE4] - Leaf 0x00000001, subleaf 0x00000000, ECX[19] +0 CPUID GROUP NAME: [SSE4] + 0 CPUID RECORD NAME: [SSE4] + {Leaf 0x00000001, subleaf 0x00000000, ECX[19:19]} = 1 diff --git a/tests/tests-base/test-00179/stdout.reference b/tests/tests-base/test-00179/stdout.reference index fe7b00b6..9e5439b0 100644 --- a/tests/tests-base/test-00179/stdout.reference +++ b/tests/tests-base/test-00179/stdout.reference @@ -27,5 +27,6 @@ SSE SCALAR Number of legacy prefixes: 11 ISA SET: [SSE] -0 CPUID BIT NAME: [SSE] - Leaf 0x00000001, subleaf 0x00000000, EDX[25] +0 CPUID GROUP NAME: [SSE] + 0 CPUID RECORD NAME: [SSE] + {Leaf 0x00000001, subleaf 0x00000000, EDX[25:25]} = 1 diff --git a/tests/tests-base/test-00182/stdout.reference b/tests/tests-base/test-00182/stdout.reference index e53f9bc7..a05f3fd2 100644 --- a/tests/tests-base/test-00182/stdout.reference +++ b/tests/tests-base/test-00182/stdout.reference @@ -27,7 +27,8 @@ FLAGS: undefined: fc0 fc2 fc3 mask=0xd0000000 ATTRIBUTES: NOTSX ISA SET: [FCMOV] -0 CPUID BIT NAME: [CMOV] - Leaf 0x00000001, subleaf 0x00000000, EDX[15] -1 CPUID BIT NAME: [FPU] - Leaf 0x00000001, subleaf 0x00000000, EDX[0] +0 CPUID GROUP NAME: [FCMOV] + 0 CPUID RECORD NAME: [CMOV] + {Leaf 0x00000001, subleaf 0x00000000, EDX[15:15]} = 1 + 1 CPUID RECORD NAME: [FPU] + {Leaf 0x00000001, subleaf 0x00000000, EDX[0:0]} = 1 diff --git a/tests/tests-base/test-00183/stdout.reference b/tests/tests-base/test-00183/stdout.reference index 0a05b8f8..bbf19a56 100644 --- a/tests/tests-base/test-00183/stdout.reference +++ b/tests/tests-base/test-00183/stdout.reference @@ -27,7 +27,8 @@ FLAGS: undefined: fc0 fc2 fc3 mask=0xd0000000 ATTRIBUTES: NOTSX ISA SET: [FCMOV] -0 CPUID BIT NAME: [CMOV] - Leaf 0x00000001, subleaf 0x00000000, EDX[15] -1 CPUID BIT NAME: [FPU] - Leaf 0x00000001, subleaf 0x00000000, EDX[0] +0 CPUID GROUP NAME: [FCMOV] + 0 CPUID RECORD NAME: [CMOV] + {Leaf 0x00000001, subleaf 0x00000000, EDX[15:15]} = 1 + 1 CPUID RECORD NAME: [FPU] + {Leaf 0x00000001, subleaf 0x00000000, EDX[0:0]} = 1 diff --git a/tests/tests-base/test-00197/stdout.reference b/tests/tests-base/test-00197/stdout.reference index e756b0e3..326a086e 100644 --- a/tests/tests-base/test-00197/stdout.reference +++ b/tests/tests-base/test-00197/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00198/stdout.reference b/tests/tests-base/test-00198/stdout.reference index 498ccd0f..1be8fc3e 100644 --- a/tests/tests-base/test-00198/stdout.reference +++ b/tests/tests-base/test-00198/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00199/stdout.reference b/tests/tests-base/test-00199/stdout.reference index 37ef0669..7cd4d72b 100644 --- a/tests/tests-base/test-00199/stdout.reference +++ b/tests/tests-base/test-00199/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS @@ -26,7 +26,7 @@ FLAGS: written: mask=0x0 undefined: mask=0x0 READS ZF -ATTRIBUTES: UNDOCUMENTED +ATTRIBUTES: UNDOCUMENTED F3 PREFIX Number of legacy prefixes: 1 ISA SET: [I86] diff --git a/tests/tests-base/test-00200/stdout.reference b/tests/tests-base/test-00200/stdout.reference index 14d28904..ea03c933 100644 --- a/tests/tests-base/test-00200/stdout.reference +++ b/tests/tests-base/test-00200/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS @@ -26,7 +26,7 @@ FLAGS: written: mask=0x0 undefined: mask=0x0 READS ZF -ATTRIBUTES: UNDOCUMENTED +ATTRIBUTES: UNDOCUMENTED F3 PREFIX Number of legacy prefixes: 2 ISA SET: [I86] diff --git a/tests/tests-base/test-00201/stdout.reference b/tests/tests-base/test-00201/stdout.reference index 835e498f..391c55ea 100644 --- a/tests/tests-base/test-00201/stdout.reference +++ b/tests/tests-base/test-00201/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00202/stdout.reference b/tests/tests-base/test-00202/stdout.reference index 641e6381..e2e2084c 100644 --- a/tests/tests-base/test-00202/stdout.reference +++ b/tests/tests-base/test-00202/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00203/stdout.reference b/tests/tests-base/test-00203/stdout.reference index fd034d4e..9294267f 100644 --- a/tests/tests-base/test-00203/stdout.reference +++ b/tests/tests-base/test-00203/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS @@ -26,7 +26,7 @@ FLAGS: written: mask=0x0 undefined: mask=0x0 READS ZF -ATTRIBUTES: UNDOCUMENTED +ATTRIBUTES: UNDOCUMENTED F2 PREFIX Number of legacy prefixes: 1 ISA SET: [I86] diff --git a/tests/tests-base/test-00204/stdout.reference b/tests/tests-base/test-00204/stdout.reference index f8eca62b..10a73822 100644 --- a/tests/tests-base/test-00204/stdout.reference +++ b/tests/tests-base/test-00204/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00205/stdout.reference b/tests/tests-base/test-00205/stdout.reference index b31258e7..1907c5de 100644 --- a/tests/tests-base/test-00205/stdout.reference +++ b/tests/tests-base/test-00205/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00206/stdout.reference b/tests/tests-base/test-00206/stdout.reference index b57cc830..67e512ee 100644 --- a/tests/tests-base/test-00206/stdout.reference +++ b/tests/tests-base/test-00206/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS @@ -26,7 +26,7 @@ FLAGS: written: mask=0x0 undefined: mask=0x0 READS ZF -ATTRIBUTES: UNDOCUMENTED +ATTRIBUTES: UNDOCUMENTED F2 PREFIX Number of legacy prefixes: 2 ISA SET: [I86] diff --git a/tests/tests-base/test-00207/stdout.reference b/tests/tests-base/test-00207/stdout.reference index ee589f90..db201634 100644 --- a/tests/tests-base/test-00207/stdout.reference +++ b/tests/tests-base/test-00207/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00208/stdout.reference b/tests/tests-base/test-00208/stdout.reference index ac4217a6..da1b56dd 100644 --- a/tests/tests-base/test-00208/stdout.reference +++ b/tests/tests-base/test-00208/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00209/stdout.reference b/tests/tests-base/test-00209/stdout.reference index 006b2da2..649e52fa 100644 --- a/tests/tests-base/test-00209/stdout.reference +++ b/tests/tests-base/test-00209/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00210/stdout.reference b/tests/tests-base/test-00210/stdout.reference index 3237345c..556429d0 100644 --- a/tests/tests-base/test-00210/stdout.reference +++ b/tests/tests-base/test-00210/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00211/stdout.reference b/tests/tests-base/test-00211/stdout.reference index 8ce572fa..d325f58f 100644 --- a/tests/tests-base/test-00211/stdout.reference +++ b/tests/tests-base/test-00211/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe0 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00212/stdout.reference b/tests/tests-base/test-00212/stdout.reference index e75e5739..0b68835b 100644 --- a/tests/tests-base/test-00212/stdout.reference +++ b/tests/tests-base/test-00212/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00213/stdout.reference b/tests/tests-base/test-00213/stdout.reference index ae8a91b9..5baffc5f 100644 --- a/tests/tests-base/test-00213/stdout.reference +++ b/tests/tests-base/test-00213/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00214/stdout.reference b/tests/tests-base/test-00214/stdout.reference index de604832..c88f5c30 100644 --- a/tests/tests-base/test-00214/stdout.reference +++ b/tests/tests-base/test-00214/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00215/stdout.reference b/tests/tests-base/test-00215/stdout.reference index 992755fb..0c655771 100644 --- a/tests/tests-base/test-00215/stdout.reference +++ b/tests/tests-base/test-00215/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00216/stdout.reference b/tests/tests-base/test-00216/stdout.reference index 61d9f4a1..0803b451 100644 --- a/tests/tests-base/test-00216/stdout.reference +++ b/tests/tests-base/test-00216/stdout.reference @@ -14,7 +14,7 @@ Nominal opcode 0xe1 Operands # TYPE DETAILS VIS RW OC2 BITS BYTES NELEM ELEMSZ ELEMTYPE REGCLASS # ==== ======= === == === ==== ===== ===== ====== ======== ======== -0 RELBR BRANCH_DISPLACEMENT_BYTES= 1 ffffffaa EXPLICIT R B 8 1 1 8 INT INVALID +0 RELBR BRANCH_DISPLACEMENT_BYTES=1 0xaa EXPLICIT R B 8 1 1 8 INT INVALID 1 REG0 REG0=ECX SUPPRESSED RW ASZ 32 4 1 32 INT GPR 2 REG1 REG1=EIP SUPPRESSED RW Y 32 4 1 32 INT IP 3 REG2 REG2=EFLAGS SUPPRESSED R Y 32 4 1 32 INT FLAGS diff --git a/tests/tests-base/test-00253/stdout.reference b/tests/tests-base/test-00253/stdout.reference index 371eeef2..836387ee 100644 --- a/tests/tests-base/test-00253/stdout.reference +++ b/tests/tests-base/test-00253/stdout.reference @@ -21,5 +21,6 @@ Memory Operands ATTRIBUTES: NOTSX RING0 RING0 only ISA SET: [MONITOR] -0 CPUID BIT NAME: [MONITOR] - Leaf 0x00000001, subleaf 0x00000000, ECX[3] +0 CPUID GROUP NAME: [MONITOR] + 0 CPUID RECORD NAME: [MONITOR] + {Leaf 0x00000001, subleaf 0x00000000, ECX[3:3]} = 1 diff --git a/tests/tests-base/test-00254/stdout.reference b/tests/tests-base/test-00254/stdout.reference index 3b31b97c..52cedec3 100644 --- a/tests/tests-base/test-00254/stdout.reference +++ b/tests/tests-base/test-00254/stdout.reference @@ -20,5 +20,6 @@ Memory Operands ATTRIBUTES: NOTSX RING0 RING0 only ISA SET: [MONITOR] -0 CPUID BIT NAME: [MONITOR] - Leaf 0x00000001, subleaf 0x00000000, ECX[3] +0 CPUID GROUP NAME: [MONITOR] + 0 CPUID RECORD NAME: [MONITOR] + {Leaf 0x00000001, subleaf 0x00000000, ECX[3:3]} = 1 diff --git a/tests/tests-base/test-00255/stdout.reference b/tests/tests-base/test-00255/stdout.reference index b931d454..bd3719df 100644 --- a/tests/tests-base/test-00255/stdout.reference +++ b/tests/tests-base/test-00255/stdout.reference @@ -25,5 +25,6 @@ SSE Vector length: 128 Number of legacy prefixes: 1 ISA SET: [SSE4] -0 CPUID BIT NAME: [SSE4] - Leaf 0x00000001, subleaf 0x00000000, ECX[19] +0 CPUID GROUP NAME: [SSE4] + 0 CPUID RECORD NAME: [SSE4] + {Leaf 0x00000001, subleaf 0x00000000, ECX[19:19]} = 1 diff --git a/tests/tests-base/test-00256/stdout.reference b/tests/tests-base/test-00256/stdout.reference index e799a533..dcbe1da4 100644 --- a/tests/tests-base/test-00256/stdout.reference +++ b/tests/tests-base/test-00256/stdout.reference @@ -25,5 +25,6 @@ SSE Vector length: 128 Number of legacy prefixes: 1 ISA SET: [SSE4] -0 CPUID BIT NAME: [SSE4] - Leaf 0x00000001, subleaf 0x00000000, ECX[19] +0 CPUID GROUP NAME: [SSE4] + 0 CPUID RECORD NAME: [SSE4] + {Leaf 0x00000001, subleaf 0x00000000, ECX[19:19]} = 1 diff --git a/tests/tests-base/test-00265/stdout.reference b/tests/tests-base/test-00265/stdout.reference index 037abf54..dd9cd837 100644 --- a/tests/tests-base/test-00265/stdout.reference +++ b/tests/tests-base/test-00265/stdout.reference @@ -22,7 +22,8 @@ Memory Operands MemopBytes = 0 ATTRIBUTES: ISA SET: [XSAVE] -0 CPUID BIT NAME: [XSAVE] - Leaf 0x00000001, subleaf 0x00000000, ECX[26] -1 CPUID BIT NAME: [OSXSAVE] - Leaf 0x00000001, subleaf 0x00000000, ECX[27] +0 CPUID GROUP NAME: [XSAVE] + 0 CPUID RECORD NAME: [XSAVE] + {Leaf 0x00000001, subleaf 0x00000000, ECX[26:26]} = 1 + 1 CPUID RECORD NAME: [OSXSAVE] + {Leaf 0x00000001, subleaf 0x00000000, ECX[27:27]} = 1 diff --git a/tests/tests-base/test-00383/stdout.reference b/tests/tests-base/test-00383/stdout.reference index af1503b6..bf49c67b 100644 --- a/tests/tests-base/test-00383/stdout.reference +++ b/tests/tests-base/test-00383/stdout.reference @@ -28,5 +28,6 @@ FLAGS: READS ZF ATTRIBUTES: FIXED_BASE0 STACKPUSH0 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00386/stdout.reference b/tests/tests-base/test-00386/stdout.reference index dc92b609..c7631e8f 100644 --- a/tests/tests-base/test-00386/stdout.reference +++ b/tests/tests-base/test-00386/stdout.reference @@ -27,5 +27,6 @@ FLAGS: undefined: mask=0x0 ATTRIBUTES: FIXED_BASE0 NOTSX STACKPOP0 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00390/stdout.reference b/tests/tests-base/test-00390/stdout.reference index 729b9b13..7a87d7da 100644 --- a/tests/tests-base/test-00390/stdout.reference +++ b/tests/tests-base/test-00390/stdout.reference @@ -30,5 +30,6 @@ FLAGS: ATTRIBUTES: FIXED_BASE0 FIXED_BASE1 Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00394/stdout.reference b/tests/tests-base/test-00394/stdout.reference index baea99ea..5da17351 100644 --- a/tests/tests-base/test-00394/stdout.reference +++ b/tests/tests-base/test-00394/stdout.reference @@ -30,5 +30,6 @@ FLAGS: ATTRIBUTES: FIXED_BASE0 FIXED_BASE1 Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00398/stdout.reference b/tests/tests-base/test-00398/stdout.reference index 1a2c6f77..7929c0f1 100644 --- a/tests/tests-base/test-00398/stdout.reference +++ b/tests/tests-base/test-00398/stdout.reference @@ -28,5 +28,6 @@ FLAGS: ATTRIBUTES: FIXED_BASE0 Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00402/stdout.reference b/tests/tests-base/test-00402/stdout.reference index edd5eb23..55e880d3 100644 --- a/tests/tests-base/test-00402/stdout.reference +++ b/tests/tests-base/test-00402/stdout.reference @@ -28,5 +28,6 @@ FLAGS: ATTRIBUTES: FIXED_BASE0 Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00406/stdout.reference b/tests/tests-base/test-00406/stdout.reference index cf2753e4..4050b8de 100644 --- a/tests/tests-base/test-00406/stdout.reference +++ b/tests/tests-base/test-00406/stdout.reference @@ -28,5 +28,6 @@ FLAGS: ATTRIBUTES: FIXED_BASE0 Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00409/stdout.reference b/tests/tests-base/test-00409/stdout.reference index cbc5a131..5d4fff43 100644 --- a/tests/tests-base/test-00409/stdout.reference +++ b/tests/tests-base/test-00409/stdout.reference @@ -29,5 +29,6 @@ FLAGS: ATTRIBUTES: FIXED_BASE0 NOTSX SCALABLE STACKPOP0 Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00412/stdout.reference b/tests/tests-base/test-00412/stdout.reference index b7499857..bd71a16e 100644 --- a/tests/tests-base/test-00412/stdout.reference +++ b/tests/tests-base/test-00412/stdout.reference @@ -26,5 +26,6 @@ FLAGS: undefined: mask=0x0 ATTRIBUTES: NOTSX ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00413/stdout.reference b/tests/tests-base/test-00413/stdout.reference index 90ef19fd..8d3e59b8 100644 --- a/tests/tests-base/test-00413/stdout.reference +++ b/tests/tests-base/test-00413/stdout.reference @@ -28,5 +28,6 @@ ATTRIBUTES: NOTSX PROTECTED_MODE RING0 RING0 only Number of legacy prefixes: 1 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00426/stdout.reference b/tests/tests-base/test-00426/stdout.reference index b4a4c9af..893aaf93 100644 --- a/tests/tests-base/test-00426/stdout.reference +++ b/tests/tests-base/test-00426/stdout.reference @@ -33,5 +33,6 @@ REAL REP corresponding no-rep iclass: MOVSQ F3 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00430/stdout.reference b/tests/tests-base/test-00430/stdout.reference index f58eea42..8f6ebaa1 100644 --- a/tests/tests-base/test-00430/stdout.reference +++ b/tests/tests-base/test-00430/stdout.reference @@ -34,5 +34,6 @@ REAL REP corresponding no-rep iclass: CMPSQ F2 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00434/stdout.reference b/tests/tests-base/test-00434/stdout.reference index 02889094..bc022b9f 100644 --- a/tests/tests-base/test-00434/stdout.reference +++ b/tests/tests-base/test-00434/stdout.reference @@ -34,5 +34,6 @@ REAL REP corresponding no-rep iclass: CMPSQ F3 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00438/stdout.reference b/tests/tests-base/test-00438/stdout.reference index 03cbbd60..b12fe953 100644 --- a/tests/tests-base/test-00438/stdout.reference +++ b/tests/tests-base/test-00438/stdout.reference @@ -31,5 +31,6 @@ REAL REP corresponding no-rep iclass: STOSQ F3 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00442/stdout.reference b/tests/tests-base/test-00442/stdout.reference index bfc6a31c..72da7cfc 100644 --- a/tests/tests-base/test-00442/stdout.reference +++ b/tests/tests-base/test-00442/stdout.reference @@ -31,5 +31,6 @@ REAL REP corresponding no-rep iclass: LODSQ F3 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00446/stdout.reference b/tests/tests-base/test-00446/stdout.reference index a802698b..da6e7922 100644 --- a/tests/tests-base/test-00446/stdout.reference +++ b/tests/tests-base/test-00446/stdout.reference @@ -32,5 +32,6 @@ REAL REP corresponding no-rep iclass: SCASQ F3 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00450/stdout.reference b/tests/tests-base/test-00450/stdout.reference index 12dd8741..4d52bbe2 100644 --- a/tests/tests-base/test-00450/stdout.reference +++ b/tests/tests-base/test-00450/stdout.reference @@ -32,5 +32,6 @@ REAL REP corresponding no-rep iclass: SCASQ F2 PREFIX Number of legacy prefixes: 2 ISA SET: [LONGMODE] -0 CPUID BIT NAME: [INTEL64] - Leaf 0x80000001, subleaf 0x00000000, EDX[29] +0 CPUID GROUP NAME: [LONGMODE] + 0 CPUID RECORD NAME: [INTEL64] + {Leaf 0x80000001, subleaf 0x00000000, EDX[29:29]} = 1 diff --git a/tests/tests-base/test-00503/cmd b/tests/tests-base/test-00503/cmd index e888c8b2..4ffd167b 100644 --- a/tests/tests-base/test-00503/cmd +++ b/tests/tests-base/test-00503/cmd @@ -1 +1 @@ - BUILDDIR/xed -64 -e JRCXZ BRDISP:1E + BUILDDIR/xed -64 -e JRCXZ RELBR:1E diff --git a/tests/tests-base/test-00533/stdout.reference b/tests/tests-base/test-00533/stdout.reference index fe85a6f8..6f88a129 100644 --- a/tests/tests-base/test-00533/stdout.reference +++ b/tests/tests-base/test-00533/stdout.reference @@ -20,7 +20,8 @@ Memory Operands ATTRIBUTES: NOTSX EXCEPTION TYPE: MMX_MEM ISA SET: [SSSE3MMX] -0 CPUID BIT NAME: [SSSE3] - Leaf 0x00000001, subleaf 0x00000000, ECX[9] -1 CPUID BIT NAME: [MMX] - Leaf 0x00000001, subleaf 0x00000000, EDX[23] +0 CPUID GROUP NAME: [SSSE3MMX] + 0 CPUID RECORD NAME: [SSSE3] + {Leaf 0x00000001, subleaf 0x00000000, ECX[9:9]} = 1 + 1 CPUID RECORD NAME: [MMX] + {Leaf 0x00000001, subleaf 0x00000000, EDX[23:23]} = 1 diff --git a/tests/tests-base/test-00534/stdout.reference b/tests/tests-base/test-00534/stdout.reference index ce39c14e..21754ae4 100644 --- a/tests/tests-base/test-00534/stdout.reference +++ b/tests/tests-base/test-00534/stdout.reference @@ -21,7 +21,8 @@ Memory Operands ATTRIBUTES: NOTSX EXCEPTION TYPE: MMX_MEM ISA SET: [SSSE3MMX] -0 CPUID BIT NAME: [SSSE3] - Leaf 0x00000001, subleaf 0x00000000, ECX[9] -1 CPUID BIT NAME: [MMX] - Leaf 0x00000001, subleaf 0x00000000, EDX[23] +0 CPUID GROUP NAME: [SSSE3MMX] + 0 CPUID RECORD NAME: [SSSE3] + {Leaf 0x00000001, subleaf 0x00000000, ECX[9:9]} = 1 + 1 CPUID RECORD NAME: [MMX] + {Leaf 0x00000001, subleaf 0x00000000, EDX[23:23]} = 1 diff --git a/xed_mbuild.py b/xed_mbuild.py index 666df43e..bd53974f 100755 --- a/xed_mbuild.py +++ b/xed_mbuild.py @@ -1344,6 +1344,8 @@ def _configure_libxed_extensions(env): env.add_define('XED_MPX') if env['cet']: env.add_define('XED_CET') + if env['future']: + env.add_define('XED_APX') #SHA on GLM & CNL, support by default env.add_define('XED_SUPPORTS_SHA') if env['icl']: @@ -1550,6 +1552,7 @@ def _add_normal_ext(tenv,x , y='files.cfg'): if env['future']: _add_normal_ext(env,'future') _add_normal_ext(env,'tdx') + _add_normal_ext(env,'apx-f') env['extf'] = newstuff + env['extf'] @@ -2620,7 +2623,8 @@ def _run_canned_tests(env,osenv): wkit = env['wkit'] cmd = "%(python)s %(test_dir)s/run-cmd.py --build-dir {} ".format(wkit.bin) - dirs = ['tests-base', 'tests-avx512', 'tests-xop', 'tests-syntax', 'tests-amx', 'tests-prefetch'] + dirs = ['tests-base', 'tests-avx512', 'tests-xop', 'tests-syntax', 'tests-amx', 'tests-prefetch', + 'tests-apx'] if env['cet']: dirs.append('tests-cet') for d in dirs: @@ -2645,6 +2649,7 @@ def _run_canned_tests(env,osenv): codes.append('AMX') if env['gnr']: codes.append('IPREFETCH') # ICACHE PREFETCH + codes.append('AVX10') if env['knm'] or env['knl']: codes.append('AVX512PF') if env['hsw']: @@ -2655,6 +2660,8 @@ def _run_canned_tests(env,osenv): codes.append('VIA') if env['amd_enabled']: codes.append('AMD') + if env['future']: + codes.append('APX') for c in codes: cmd += ' -c ' + c @@ -2770,7 +2777,7 @@ def verify_args(env): env['gnr'] = False if not env['arl']: env['lnl'] = False - if not env['gnr']: + if not env['gnr'] or not env['lnl']: env['future'] = False if env['use_elf_dwarf_precompiled']: