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Commits on Apr 14, 2007

• Know about more PCI device classes.

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  ths

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• Fix incorrect pointers casts.

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  j_mayer

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• Fix miscellaneous display warnings for PowerPC & alpha targets

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• Add TARGET_FMT_plx to properly display target_phys_addr_t variables.

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Commits on Apr 13, 2007

• Nicer Log formatting.

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  ths

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• Another fix for CP0 Cause register handling.

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  ths

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• Fix Sparc32 device save methods

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  blueswir1

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• Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops

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• Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)

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Commits on Apr 12, 2007

• Add PowerPC 405 input pins (IRQ, resets, ...) model.

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  j_mayer

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• Embedded PowerPC Device Control Registers infrastructure.

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Commits on Apr 11, 2007

• Fix bad variable name.

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  ths

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• Make SYNCI_Step and CCRes CPU-specific.

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  ths

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• Throw RI for invalid MFMC0-class instructions. Introduce optional

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  ths

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• Code formatting fix.

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• More Context/Xcontext fixes. Ifdef some 64bit-only ops, they may

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Commits on Apr 9, 2007

• Implement embedded IRQ controller for PowerPC 6xx/740 & 750.

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• Fix monitor disasm output for Sparc64 target

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  blueswir1

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• Fix CP0_IntCtl handling.

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  ths

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• Proper handling of reserved bits in the context register.

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• Mark watchpoint features as unimplemented.

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  ths

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• Catch unaligned sc/scd.

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  ths

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• Fix exception handling cornercase for rdhwr.

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  ths

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• Remove bogus mtc0 handling.

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• ARM IRQ fix.

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  pbrook

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Commits on Apr 8, 2007

• Fix generated code disasm output on Sparc64 host

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  blueswir1

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• Sparc32/64 CPU selection for user emulator

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Commits on Apr 7, 2007

• Fix TCX base on SS10

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  blueswir1

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• Unify IRQ handling.

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  pbrook

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• PowerPC 64 fixes

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  j_mayer

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• cpu_get_phys_page_debug should return target_phys_addr_t

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  j_mayer

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• Remove dead code.

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  pbrook

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• Remove dead code.

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• Implement prefx.

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  ths

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• Set proper BadVAddress value for unaligned instruction fetch.

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