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master.c
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master.c
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// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2018 Cadence Design Systems Inc.
*
* Author: Boris Brezillon <[email protected]>
*/
#include <linux/atomic.h>
#include <linux/bug.h>
#include <linux/device.h>
#include <linux/err.h>
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include "internals.h"
static DEFINE_IDR(i3c_bus_idr);
static DEFINE_MUTEX(i3c_core_lock);
/**
* i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
* @bus: I3C bus to take the lock on
*
* This function takes the bus lock so that no other operations can occur on
* the bus. This is needed for all kind of bus maintenance operation, like
* - enabling/disabling slave events
* - re-triggering DAA
* - changing the dynamic address of a device
* - relinquishing mastership
* - ...
*
* The reason for this kind of locking is that we don't want drivers and core
* logic to rely on I3C device information that could be changed behind their
* back.
*/
static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
{
down_write(&bus->lock);
}
/**
* i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
* operation
* @bus: I3C bus to release the lock on
*
* Should be called when the bus maintenance operation is done. See
* i3c_bus_maintenance_lock() for more details on what these maintenance
* operations are.
*/
static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
{
up_write(&bus->lock);
}
/**
* i3c_bus_normaluse_lock - Lock the bus for a normal operation
* @bus: I3C bus to take the lock on
*
* This function takes the bus lock for any operation that is not a maintenance
* operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
* maintenance operations). Basically all communications with I3C devices are
* normal operations (HDR, SDR transfers or CCC commands that do not change bus
* state or I3C dynamic address).
*
* Note that this lock is not guaranteeing serialization of normal operations.
* In other words, transfer requests passed to the I3C master can be submitted
* in parallel and I3C master drivers have to use their own locking to make
* sure two different communications are not inter-mixed, or access to the
* output/input queue is not done while the engine is busy.
*/
void i3c_bus_normaluse_lock(struct i3c_bus *bus)
{
down_read(&bus->lock);
}
/**
* i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
* @bus: I3C bus to release the lock on
*
* Should be called when a normal operation is done. See
* i3c_bus_normaluse_lock() for more details on what these normal operations
* are.
*/
void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
{
up_read(&bus->lock);
}
static struct i3c_master_controller *
i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
{
return container_of(i3cbus, struct i3c_master_controller, bus);
}
static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
{
return container_of(dev, struct i3c_master_controller, dev);
}
static const struct device_type i3c_device_type;
static struct i3c_bus *dev_to_i3cbus(struct device *dev)
{
struct i3c_master_controller *master;
if (dev->type == &i3c_device_type)
return dev_to_i3cdev(dev)->bus;
master = dev_to_i3cmaster(dev);
return &master->bus;
}
static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
{
struct i3c_master_controller *master;
if (dev->type == &i3c_device_type)
return dev_to_i3cdev(dev)->desc;
master = dev_to_i3cmaster(dev);
return master->this;
}
static ssize_t bcr_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *bus = dev_to_i3cbus(dev);
struct i3c_dev_desc *desc;
ssize_t ret;
i3c_bus_normaluse_lock(bus);
desc = dev_to_i3cdesc(dev);
ret = sprintf(buf, "%x\n", desc->info.bcr);
i3c_bus_normaluse_unlock(bus);
return ret;
}
static DEVICE_ATTR_RO(bcr);
static ssize_t dcr_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *bus = dev_to_i3cbus(dev);
struct i3c_dev_desc *desc;
ssize_t ret;
i3c_bus_normaluse_lock(bus);
desc = dev_to_i3cdesc(dev);
ret = sprintf(buf, "%x\n", desc->info.dcr);
i3c_bus_normaluse_unlock(bus);
return ret;
}
static DEVICE_ATTR_RO(dcr);
static ssize_t pid_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *bus = dev_to_i3cbus(dev);
struct i3c_dev_desc *desc;
ssize_t ret;
i3c_bus_normaluse_lock(bus);
desc = dev_to_i3cdesc(dev);
ret = sprintf(buf, "%llx\n", desc->info.pid);
i3c_bus_normaluse_unlock(bus);
return ret;
}
static DEVICE_ATTR_RO(pid);
static ssize_t dynamic_address_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *bus = dev_to_i3cbus(dev);
struct i3c_dev_desc *desc;
ssize_t ret;
i3c_bus_normaluse_lock(bus);
desc = dev_to_i3cdesc(dev);
ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
i3c_bus_normaluse_unlock(bus);
return ret;
}
static DEVICE_ATTR_RO(dynamic_address);
static const char * const hdrcap_strings[] = {
"hdr-ddr", "hdr-tsp", "hdr-tsl",
};
static ssize_t hdrcap_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *bus = dev_to_i3cbus(dev);
struct i3c_dev_desc *desc;
ssize_t offset = 0, ret;
unsigned long caps;
int mode;
i3c_bus_normaluse_lock(bus);
desc = dev_to_i3cdesc(dev);
caps = desc->info.hdr_cap;
for_each_set_bit(mode, &caps, 8) {
if (mode >= ARRAY_SIZE(hdrcap_strings))
break;
if (!hdrcap_strings[mode])
continue;
ret = sprintf(buf + offset, offset ? " %s" : "%s",
hdrcap_strings[mode]);
if (ret < 0)
goto out;
offset += ret;
}
ret = sprintf(buf + offset, "\n");
if (ret < 0)
goto out;
ret = offset + ret;
out:
i3c_bus_normaluse_unlock(bus);
return ret;
}
static DEVICE_ATTR_RO(hdrcap);
static ssize_t modalias_show(struct device *dev,
struct device_attribute *da, char *buf)
{
struct i3c_device *i3c = dev_to_i3cdev(dev);
struct i3c_device_info devinfo;
u16 manuf, part, ext;
i3c_device_get_info(i3c, &devinfo);
manuf = I3C_PID_MANUF_ID(devinfo.pid);
part = I3C_PID_PART_ID(devinfo.pid);
ext = I3C_PID_EXTRA_INFO(devinfo.pid);
if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
manuf);
return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
devinfo.dcr, manuf, part, ext);
}
static DEVICE_ATTR_RO(modalias);
static struct attribute *i3c_device_attrs[] = {
&dev_attr_bcr.attr,
&dev_attr_dcr.attr,
&dev_attr_pid.attr,
&dev_attr_dynamic_address.attr,
&dev_attr_hdrcap.attr,
&dev_attr_modalias.attr,
NULL,
};
ATTRIBUTE_GROUPS(i3c_device);
static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
{
struct i3c_device *i3cdev = dev_to_i3cdev(dev);
struct i3c_device_info devinfo;
u16 manuf, part, ext;
i3c_device_get_info(i3cdev, &devinfo);
manuf = I3C_PID_MANUF_ID(devinfo.pid);
part = I3C_PID_PART_ID(devinfo.pid);
ext = I3C_PID_EXTRA_INFO(devinfo.pid);
if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
devinfo.dcr, manuf);
return add_uevent_var(env,
"MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
devinfo.dcr, manuf, part, ext);
}
static const struct device_type i3c_device_type = {
.groups = i3c_device_groups,
.uevent = i3c_device_uevent,
};
static int i3c_device_match(struct device *dev, struct device_driver *drv)
{
struct i3c_device *i3cdev;
struct i3c_driver *i3cdrv;
if (dev->type != &i3c_device_type)
return 0;
i3cdev = dev_to_i3cdev(dev);
i3cdrv = drv_to_i3cdrv(drv);
if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
return 1;
return 0;
}
static int i3c_device_probe(struct device *dev)
{
struct i3c_device *i3cdev = dev_to_i3cdev(dev);
struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
return driver->probe(i3cdev);
}
static int i3c_device_remove(struct device *dev)
{
struct i3c_device *i3cdev = dev_to_i3cdev(dev);
struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
if (driver->remove)
driver->remove(i3cdev);
i3c_device_free_ibi(i3cdev);
return 0;
}
struct bus_type i3c_bus_type = {
.name = "i3c",
.match = i3c_device_match,
.probe = i3c_device_probe,
.remove = i3c_device_remove,
};
static enum i3c_addr_slot_status
i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
{
int status, bitpos = addr * 2;
if (addr > I2C_MAX_ADDR)
return I3C_ADDR_SLOT_RSVD;
status = bus->addrslots[bitpos / BITS_PER_LONG];
status >>= bitpos % BITS_PER_LONG;
return status & I3C_ADDR_SLOT_STATUS_MASK;
}
static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
enum i3c_addr_slot_status status)
{
int bitpos = addr * 2;
unsigned long *ptr;
if (addr > I2C_MAX_ADDR)
return;
ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
*ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
(bitpos % BITS_PER_LONG));
*ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
}
static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
{
enum i3c_addr_slot_status status;
status = i3c_bus_get_addr_slot_status(bus, addr);
return status == I3C_ADDR_SLOT_FREE;
}
static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
{
enum i3c_addr_slot_status status;
u8 addr;
for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
status = i3c_bus_get_addr_slot_status(bus, addr);
if (status == I3C_ADDR_SLOT_FREE)
return addr;
}
return -ENOMEM;
}
static void i3c_bus_init_addrslots(struct i3c_bus *bus)
{
int i;
/* Addresses 0 to 7 are reserved. */
for (i = 0; i < 8; i++)
i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
/*
* Reserve broadcast address and all addresses that might collide
* with the broadcast address when facing a single bit error.
*/
i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
I3C_ADDR_SLOT_RSVD);
for (i = 0; i < 7; i++)
i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
I3C_ADDR_SLOT_RSVD);
}
static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
{
mutex_lock(&i3c_core_lock);
idr_remove(&i3c_bus_idr, i3cbus->id);
mutex_unlock(&i3c_core_lock);
}
static int i3c_bus_init(struct i3c_bus *i3cbus)
{
int ret;
init_rwsem(&i3cbus->lock);
INIT_LIST_HEAD(&i3cbus->devs.i2c);
INIT_LIST_HEAD(&i3cbus->devs.i3c);
i3c_bus_init_addrslots(i3cbus);
i3cbus->mode = I3C_BUS_MODE_PURE;
mutex_lock(&i3c_core_lock);
ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
mutex_unlock(&i3c_core_lock);
if (ret < 0)
return ret;
i3cbus->id = ret;
return 0;
}
static const char * const i3c_bus_mode_strings[] = {
[I3C_BUS_MODE_PURE] = "pure",
[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
};
static ssize_t mode_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
ssize_t ret;
i3c_bus_normaluse_lock(i3cbus);
if (i3cbus->mode < 0 ||
i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
!i3c_bus_mode_strings[i3cbus->mode])
ret = sprintf(buf, "unknown\n");
else
ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
i3c_bus_normaluse_unlock(i3cbus);
return ret;
}
static DEVICE_ATTR_RO(mode);
static ssize_t current_master_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
ssize_t ret;
i3c_bus_normaluse_lock(i3cbus);
ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
i3cbus->cur_master->info.pid);
i3c_bus_normaluse_unlock(i3cbus);
return ret;
}
static DEVICE_ATTR_RO(current_master);
static ssize_t i3c_scl_frequency_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
ssize_t ret;
i3c_bus_normaluse_lock(i3cbus);
ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
i3c_bus_normaluse_unlock(i3cbus);
return ret;
}
static DEVICE_ATTR_RO(i3c_scl_frequency);
static ssize_t i2c_scl_frequency_show(struct device *dev,
struct device_attribute *da,
char *buf)
{
struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
ssize_t ret;
i3c_bus_normaluse_lock(i3cbus);
ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
i3c_bus_normaluse_unlock(i3cbus);
return ret;
}
static DEVICE_ATTR_RO(i2c_scl_frequency);
static struct attribute *i3c_masterdev_attrs[] = {
&dev_attr_mode.attr,
&dev_attr_current_master.attr,
&dev_attr_i3c_scl_frequency.attr,
&dev_attr_i2c_scl_frequency.attr,
&dev_attr_bcr.attr,
&dev_attr_dcr.attr,
&dev_attr_pid.attr,
&dev_attr_dynamic_address.attr,
&dev_attr_hdrcap.attr,
NULL,
};
ATTRIBUTE_GROUPS(i3c_masterdev);
static void i3c_masterdev_release(struct device *dev)
{
struct i3c_master_controller *master = dev_to_i3cmaster(dev);
struct i3c_bus *bus = dev_to_i3cbus(dev);
if (master->wq)
destroy_workqueue(master->wq);
WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
i3c_bus_cleanup(bus);
of_node_put(dev->of_node);
}
static const struct device_type i3c_masterdev_type = {
.groups = i3c_masterdev_groups,
};
static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
unsigned long max_i2c_scl_rate)
{
struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
i3cbus->mode = mode;
switch (i3cbus->mode) {
case I3C_BUS_MODE_PURE:
if (!i3cbus->scl_rate.i3c)
i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
break;
case I3C_BUS_MODE_MIXED_FAST:
case I3C_BUS_MODE_MIXED_LIMITED:
if (!i3cbus->scl_rate.i3c)
i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
if (!i3cbus->scl_rate.i2c)
i3cbus->scl_rate.i2c = max_i2c_scl_rate;
break;
case I3C_BUS_MODE_MIXED_SLOW:
if (!i3cbus->scl_rate.i2c)
i3cbus->scl_rate.i2c = max_i2c_scl_rate;
if (!i3cbus->scl_rate.i3c ||
i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
break;
default:
return -EINVAL;
}
dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
/*
* I3C/I2C frequency may have been overridden, check that user-provided
* values are not exceeding max possible frequency.
*/
if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
return -EINVAL;
return 0;
}
static struct i3c_master_controller *
i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
{
return container_of(adap, struct i3c_master_controller, i2c);
}
static struct i2c_adapter *
i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
{
return &master->i2c;
}
static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
{
kfree(dev);
}
static struct i2c_dev_desc *
i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
const struct i2c_dev_boardinfo *boardinfo)
{
struct i2c_dev_desc *dev;
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev)
return ERR_PTR(-ENOMEM);
dev->common.master = master;
dev->boardinfo = boardinfo;
dev->addr = boardinfo->base.addr;
dev->lvr = boardinfo->lvr;
return dev;
}
static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
u16 payloadlen)
{
dest->addr = addr;
dest->payload.len = payloadlen;
if (payloadlen)
dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
else
dest->payload.data = NULL;
return dest->payload.data;
}
static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
{
kfree(dest->payload.data);
}
static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
struct i3c_ccc_cmd_dest *dests,
unsigned int ndests)
{
cmd->rnw = rnw ? 1 : 0;
cmd->id = id;
cmd->dests = dests;
cmd->ndests = ndests;
cmd->err = I3C_ERROR_UNKNOWN;
}
static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
struct i3c_ccc_cmd *cmd)
{
int ret;
if (!cmd || !master)
return -EINVAL;
if (WARN_ON(master->init_done &&
!rwsem_is_locked(&master->bus.lock)))
return -EINVAL;
if (!master->ops->send_ccc_cmd)
return -ENOTSUPP;
if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
return -EINVAL;
if (master->ops->supports_ccc_cmd &&
!master->ops->supports_ccc_cmd(master, cmd))
return -ENOTSUPP;
ret = master->ops->send_ccc_cmd(master, cmd);
if (ret) {
if (cmd->err != I3C_ERROR_UNKNOWN)
return cmd->err;
return ret;
}
return 0;
}
static struct i2c_dev_desc *
i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
u16 addr)
{
struct i2c_dev_desc *dev;
i3c_bus_for_each_i2cdev(&master->bus, dev) {
if (dev->boardinfo->base.addr == addr)
return dev;
}
return NULL;
}
/**
* i3c_master_get_free_addr() - get a free address on the bus
* @master: I3C master object
* @start_addr: where to start searching
*
* This function must be called with the bus lock held in write mode.
*
* Return: the first free address starting at @start_addr (included) or -ENOMEM
* if there's no more address available.
*/
int i3c_master_get_free_addr(struct i3c_master_controller *master,
u8 start_addr)
{
return i3c_bus_get_free_addr(&master->bus, start_addr);
}
EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
static void i3c_device_release(struct device *dev)
{
struct i3c_device *i3cdev = dev_to_i3cdev(dev);
WARN_ON(i3cdev->desc);
of_node_put(i3cdev->dev.of_node);
kfree(i3cdev);
}
static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
{
kfree(dev);
}
static struct i3c_dev_desc *
i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
const struct i3c_device_info *info)
{
struct i3c_dev_desc *dev;
dev = kzalloc(sizeof(*dev), GFP_KERNEL);
if (!dev)
return ERR_PTR(-ENOMEM);
dev->common.master = master;
dev->info = *info;
mutex_init(&dev->ibi_lock);
return dev;
}
static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
u8 addr)
{
enum i3c_addr_slot_status addrstat;
struct i3c_ccc_cmd_dest dest;
struct i3c_ccc_cmd cmd;
int ret;
if (!master)
return -EINVAL;
addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
return -EINVAL;
i3c_ccc_cmd_dest_init(&dest, addr, 0);
i3c_ccc_cmd_init(&cmd, false,
I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
&dest, 1);
ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
i3c_ccc_cmd_dest_cleanup(&dest);
return ret;
}
/**
* i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
* procedure
* @master: master used to send frames on the bus
*
* Send a ENTDAA CCC command to start a DAA procedure.
*
* Note that this function only sends the ENTDAA CCC command, all the logic
* behind dynamic address assignment has to be handled in the I3C master
* driver.
*
* This function must be called with the bus lock held in write mode.
*
* Return: 0 in case of success, a positive I3C error code if the error is
* one of the official Mx error codes, and a negative error code otherwise.
*/
int i3c_master_entdaa_locked(struct i3c_master_controller *master)
{
struct i3c_ccc_cmd_dest dest;
struct i3c_ccc_cmd cmd;
int ret;
i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
i3c_ccc_cmd_dest_cleanup(&dest);
return ret;
}
EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
u8 addr, bool enable, u8 evts)
{
struct i3c_ccc_events *events;
struct i3c_ccc_cmd_dest dest;
struct i3c_ccc_cmd cmd;
int ret;
events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
if (!events)
return -ENOMEM;
events->events = evts;
i3c_ccc_cmd_init(&cmd, false,
enable ?
I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
&dest, 1);
ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
i3c_ccc_cmd_dest_cleanup(&dest);
return ret;
}
/**
* i3c_master_disec_locked() - send a DISEC CCC command
* @master: master used to send frames on the bus
* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
* @evts: events to disable
*
* Send a DISEC CCC command to disable some or all events coming from a
* specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
*
* This function must be called with the bus lock held in write mode.
*
* Return: 0 in case of success, a positive I3C error code if the error is
* one of the official Mx error codes, and a negative error code otherwise.
*/
int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
u8 evts)
{
return i3c_master_enec_disec_locked(master, addr, false, evts);
}
EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
/**
* i3c_master_enec_locked() - send an ENEC CCC command
* @master: master used to send frames on the bus
* @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
* @evts: events to disable
*
* Sends an ENEC CCC command to enable some or all events coming from a
* specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
*
* This function must be called with the bus lock held in write mode.
*
* Return: 0 in case of success, a positive I3C error code if the error is
* one of the official Mx error codes, and a negative error code otherwise.
*/
int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
u8 evts)
{
return i3c_master_enec_disec_locked(master, addr, true, evts);
}
EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
/**
* i3c_master_defslvs_locked() - send a DEFSLVS CCC command
* @master: master used to send frames on the bus
*
* Send a DEFSLVS CCC command containing all the devices known to the @master.
* This is useful when you have secondary masters on the bus to propagate
* device information.
*
* This should be called after all I3C devices have been discovered (in other
* words, after the DAA procedure has finished) and instantiated in
* &i3c_master_controller_ops->bus_init().
* It should also be called if a master ACKed an Hot-Join request and assigned
* a dynamic address to the device joining the bus.
*
* This function must be called with the bus lock held in write mode.
*
* Return: 0 in case of success, a positive I3C error code if the error is
* one of the official Mx error codes, and a negative error code otherwise.
*/
int i3c_master_defslvs_locked(struct i3c_master_controller *master)
{
struct i3c_ccc_defslvs *defslvs;
struct i3c_ccc_dev_desc *desc;
struct i3c_ccc_cmd_dest dest;
struct i3c_dev_desc *i3cdev;
struct i2c_dev_desc *i2cdev;
struct i3c_ccc_cmd cmd;
struct i3c_bus *bus;
bool send = false;
int ndevs = 0, ret;
if (!master)
return -EINVAL;
bus = i3c_master_get_bus(master);
i3c_bus_for_each_i3cdev(bus, i3cdev) {
ndevs++;
if (i3cdev == master->this)
continue;
if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
I3C_BCR_I3C_MASTER)
send = true;
}
/* No other master on the bus, skip DEFSLVS. */
if (!send)
return 0;
i3c_bus_for_each_i2cdev(bus, i2cdev)
ndevs++;
defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
struct_size(defslvs, slaves,
ndevs - 1));
if (!defslvs)
return -ENOMEM;
defslvs->count = ndevs;
defslvs->master.bcr = master->this->info.bcr;
defslvs->master.dcr = master->this->info.dcr;
defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
desc = defslvs->slaves;
i3c_bus_for_each_i2cdev(bus, i2cdev) {
desc->lvr = i2cdev->lvr;
desc->static_addr = i2cdev->addr << 1;
desc++;
}
i3c_bus_for_each_i3cdev(bus, i3cdev) {
/* Skip the I3C dev representing this master. */
if (i3cdev == master->this)
continue;
desc->bcr = i3cdev->info.bcr;
desc->dcr = i3cdev->info.dcr;
desc->dyn_addr = i3cdev->info.dyn_addr << 1;
desc->static_addr = i3cdev->info.static_addr << 1;
desc++;
}
i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
i3c_ccc_cmd_dest_cleanup(&dest);
return ret;
}
EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
static int i3c_master_setda_locked(struct i3c_master_controller *master,
u8 oldaddr, u8 newaddr, bool setdasa)
{
struct i3c_ccc_cmd_dest dest;
struct i3c_ccc_setda *setda;
struct i3c_ccc_cmd cmd;
int ret;
if (!oldaddr || !newaddr)
return -EINVAL;
setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
if (!setda)
return -ENOMEM;
setda->addr = newaddr << 1;
i3c_ccc_cmd_init(&cmd, false,
setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
&dest, 1);
ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
i3c_ccc_cmd_dest_cleanup(&dest);
return ret;
}
static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
u8 static_addr, u8 dyn_addr)
{
return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
}
static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
u8 oldaddr, u8 newaddr)