From 6d0068ad15e4f771b35d76adc4e6747649ac4961 Mon Sep 17 00:00:00 2001 From: Jiaxun Yang Date: Tue, 28 Jul 2020 23:36:56 +0800 Subject: [PATCH] MIPS: Loongson64: Process ISA Node in DeviceTree Previously, we're hardcoding reserved ISA I/O Space in, now we're processing it I/O via DeviceTree directly. The ranges property if ISA node is used to determine the size and address of reserved I/O space. Signed-off-by: Jiaxun Yang Signed-off-by: Thomas Bogendoerfer --- arch/mips/loongson64/init.c | 87 ++++++++++++++++++++++++++----------- 1 file changed, 62 insertions(+), 25 deletions(-) diff --git a/arch/mips/loongson64/init.c b/arch/mips/loongson64/init.c index 59ddadace83f37..8ba22c30f3126c 100644 --- a/arch/mips/loongson64/init.c +++ b/arch/mips/loongson64/init.c @@ -7,6 +7,8 @@ #include #include #include +#include +#include #include #include #include @@ -63,41 +65,76 @@ void __init prom_free_prom_memory(void) { } -static __init void reserve_pio_range(void) +static int __init add_legacy_isa_io(struct fwnode_handle *fwnode, resource_size_t hw_start, + resource_size_t size) { + int ret = 0; struct logic_pio_hwaddr *range; + unsigned long vaddr; range = kzalloc(sizeof(*range), GFP_ATOMIC); if (!range) - return; + return -ENOMEM; - range->fwnode = &of_root->fwnode; - range->size = MMIO_LOWER_RESERVED; - range->hw_start = LOONGSON_PCIIO_BASE; + range->fwnode = fwnode; + range->size = size; + range->hw_start = hw_start; range->flags = LOGIC_PIO_CPU_MMIO; - if (logic_pio_register_range(range)) { - pr_err("Failed to reserve PIO range for legacy ISA\n"); - goto free_range; + ret = logic_pio_register_range(range); + if (ret) { + kfree(range); + return ret; + } + + /* Legacy ISA must placed at the start of PCI_IOBASE */ + if (range->io_start != 0) { + logic_pio_unregister_range(range); + kfree(range); + return -EINVAL; } - if (WARN(range->io_start != 0, - "Reserved PIO range does not start from 0\n")) - goto unregister; - - /* - * i8259 would access I/O space, so mapping must be done here. - * Please remove it when all drivers can be managed by logic_pio. - */ - ioremap_page_range(PCI_IOBASE, PCI_IOBASE + MMIO_LOWER_RESERVED, - LOONGSON_PCIIO_BASE, - pgprot_device(PAGE_KERNEL)); - - return; -unregister: - logic_pio_unregister_range(range); -free_range: - kfree(range); + vaddr = PCI_IOBASE + range->io_start; + + ioremap_page_range(vaddr, vaddr + size, hw_start, pgprot_device(PAGE_KERNEL)); + + return 0; +} + +static __init void reserve_pio_range(void) +{ + struct device_node *np; + + for_each_node_by_name(np, "isa") { + struct of_range range; + struct of_range_parser parser; + + pr_info("ISA Bridge: %pOF\n", np); + + if (of_range_parser_init(&parser, np)) { + pr_info("Failed to parse resources.\n"); + break; + } + + for_each_of_range(&parser, &range) { + switch (range.flags & IORESOURCE_TYPE_BITS) { + case IORESOURCE_IO: + pr_info(" IO 0x%016llx..0x%016llx -> 0x%016llx\n", + range.cpu_addr, + range.cpu_addr + range.size - 1, + range.bus_addr); + if (add_legacy_isa_io(&np->fwnode, range.cpu_addr, range.size)) + pr_warn("Failed to reserve legacy IO in Logic PIO\n"); + break; + case IORESOURCE_MEM: + pr_info(" MEM 0x%016llx..0x%016llx -> 0x%016llx\n", + range.cpu_addr, + range.cpu_addr + range.size - 1, + range.bus_addr); + break; + } + } + } } void __init arch_init_irq(void)