From 52af4eb75cefbd9fc4521039c9497712d490171f Mon Sep 17 00:00:00 2001 From: TascoDLX Date: Mon, 22 Mar 2021 01:29:56 -0400 Subject: [PATCH] [Mega-CD] fix wordram dual bank access --- higan/md/mcd/bus-external.cpp | 12 +++++++++-- higan/md/mcd/bus.cpp | 38 ++++++++++++++++++++++++++--------- higan/md/mcd/cdc-transfer.cpp | 5 ++++- 3 files changed, 43 insertions(+), 12 deletions(-) diff --git a/higan/md/mcd/bus-external.cpp b/higan/md/mcd/bus-external.cpp index c34cb8742..ddbd5418e 100644 --- a/higan/md/mcd/bus-external.cpp +++ b/higan/md/mcd/bus-external.cpp @@ -15,7 +15,11 @@ auto MCD::external_read(uint1 upper, uint1 lower, uint22 address, uint16 data) - //if(io.wramSwitch == 1) return data; address = (uint18)address; } else { - address = (uint17)address << 1 | io.wramSelect == 0; + // TODO: bitmapped mode when reading $220000 thru $23ffff in 1M mode + if(io.wramSelect == 0) + address = (uint17)address + 0x020000; + else + address = (uint17)address; } if(!vdp.active()) return wram[address >> 1]; @@ -45,7 +49,11 @@ auto MCD::external_write(uint1 upper, uint1 lower, uint22 address, uint16 data) //if(io.wramSwitch == 1) return; address = (uint18)address; } else { - address = (uint17)address << 1 | io.wramSelect == 0; + // TODO: bitmapped mode when writing $220000 thru $23ffff in 1M mode + if(io.wramSelect == 0) + address = (uint17)address + 0x020000; + else + address = (uint17)address; } if(upper) wram[address >> 1].byte(1) = data.byte(1); if(lower) wram[address >> 1].byte(0) = data.byte(0); diff --git a/higan/md/mcd/bus.cpp b/higan/md/mcd/bus.cpp index f0d01cb7a..3db32b0c3 100644 --- a/higan/md/mcd/bus.cpp +++ b/higan/md/mcd/bus.cpp @@ -5,14 +5,24 @@ auto MCD::read(uint1 upper, uint1 lower, uint24 address, uint16 data) -> uint16 return pram[address >> 1]; } - if(address >= 0x080000 && address <= 0x0dffff) { + if(address >= 0x080000 && address <= 0x0bffff) { if(io.wramMode == 0) { //if(io.wramSwitch == 0) return data; address = (uint18)address; - } else { - address = (uint17)address << 1 | io.wramSelect == 1; + return wram[address >> 1]; } - return wram[address >> 1]; + return data; + } + + if(address >= 0x0c0000 && address <= 0x0dffff) { + if(io.wramMode == 1) { + if(io.wramSelect == 0) + address = (uint17)address; + else + address = (uint17)address + 0x020000; + return wram[address >> 1]; + } + return data; } if(address >= 0x0e0000 && address <= 0x0effff) { @@ -41,15 +51,25 @@ auto MCD::write(uint1 upper, uint1 lower, uint24 address, uint16 data) -> void { return; } - if(address >= 0x080000 && address <= 0x0dffff) { + if(address >= 0x080000 && address <= 0x0bffff) { if(io.wramMode == 0) { //if(io.wramSwitch == 0) return; address = (uint18)address; - } else { - address = (uint17)address << 1 | io.wramSelect == 1; + if(upper) wram[address >> 1].byte(1) = data.byte(1); + if(lower) wram[address >> 1].byte(0) = data.byte(0); + } + return; + } + + if(address >= 0x0c0000 && address <= 0x0dffff) { + if(io.wramMode == 1) { + if(io.wramSelect == 0) + address = (uint17)address; + else + address = (uint17)address + 0x020000; + if(upper) wram[address >> 1].byte(1) = data.byte(1); + if(lower) wram[address >> 1].byte(0) = data.byte(0); } - if(upper) wram[address >> 1].byte(1) = data.byte(1); - if(lower) wram[address >> 1].byte(0) = data.byte(0); return; } diff --git a/higan/md/mcd/cdc-transfer.cpp b/higan/md/mcd/cdc-transfer.cpp index 7ec6d45dc..345bcebee 100644 --- a/higan/md/mcd/cdc-transfer.cpp +++ b/higan/md/mcd/cdc-transfer.cpp @@ -15,7 +15,10 @@ auto MCD::CDC::Transfer::dma() -> void { break; case 7: //WRAM - mcd.write(1, 1, 0x080000 | (uint18)address & ~1, data); + if(mcd.io.wramMode == 0) + mcd.write(1, 1, 0x080000 | (uint18)address & ~1, data); + else + mcd.write(1, 1, 0x0C0000 | (uint17)address & ~1, data); break; }