Skip to content
View lebedys's full-sized avatar
10 followers · 31 following

Achievements

Achievement: StarstruckAchievement: Pull SharkAchievement: Arctic Code Vault Contributor

Achievements

Achievement: StarstruckAchievement: Pull SharkAchievement: Arctic Code Vault Contributor

Block or report lebedys

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Stars

5 stars written in Verilog
Clear filter

olofk / serv

SERV - The SErial RISC-V CPU

Verilog 1,462 193 Updated Dec 18, 2024

Arlet / verilog-6502

A Verilog HDL model of the MOS 6502 CPU

Verilog 335 93 Updated Apr 8, 2023

chipsalliance / VeeRwolf

FuseSoC-based SoC for VeeR EH1 and EL2

Verilog 296 68 Updated Dec 11, 2024

TeamVoss / VossII

The source code to the Voss II Hardware Verification Suite

Verilog 53 13 Updated Sep 18, 2024

Arlet / verilog-65C02-fsm

Verilog 32 11 Updated Jul 9, 2022