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Commits on May 16, 2022

• kselftest/arm64: Explicitly build no BTI tests with BTI disabled

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• spi: spi-mem: Convert Aspeed SMC driver to spi-mem

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Commits on May 15, 2022

• selftests/arm64: Use switch statements in mte_common_util.c

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• selftests/arm64: Remove casts to/from void in check_tags_inclusion

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• selftests/arm64: Check failures to set tags in check_tags_inclusion

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• selftests/arm64: Allow zero tags in mte_switch_mode()

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• selftests/arm64: Log errors in verify_mte_pointer_validity()

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Commits on May 13, 2022

• ARM: configs: Enable ASoC AC'97 glue

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Commits on May 12, 2022

• ASoC: SOF: Add IPC4 FW loader support

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• ASOC: Fix the error handling code of the probe

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Commits on May 11, 2022

• spi: stm32-qspi: flags management fixes

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• ASoC: Intel: boards: Chromebook configuration updates

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Commits on May 10, 2022

• Clean up usage of the endianness flag

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Commits on May 9, 2022

• ASoC: SOF: sof-client: Update for different IPC versions

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• ASoC: sam9g20_wm8731: Use dev_err_probe() for snd_soc_register_card()

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• Add missing dt-binding properties for audio components on mt8192-asurada

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• ARM: configs: Enable audio on BeagleBone Black in multi_v7_defconfig

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Commits on May 6, 2022

• arm64/sme: More sensibly define the size for the ZA register set

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• ARM: configs: at91: Enable options required for systemd

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Commits on May 5, 2022

• regmap: Custom bulk operations for regmaps

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• ASoC: SOF: IPC4: Introduce message handling functionality

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• ARM: dts: imx6qdl-udoo: Disable USB host to work around boot issues

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Commits on May 4, 2022

• regulator: dt-bindings: qcom,rpmh: minor cleanups and extend supplies

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• arm64/sysreg: Generate definitions for SCTLR_EL1

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• ASoC: Pull in fixes

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• arm64/sysreg: Generate definitions for TTBRn_EL1

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• arm64/sysreg: Generate definitions for ID_AA64ISAR0_EL1

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• arm64/sysreg: Enable automatic generation of system register definitions

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• arm64/sysreg: Standardise ID_AA64ISAR0_EL1 macro names

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• arm64: Update name of ID_AA64ISAR0_EL1_ATOMIC to reflect ARM

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• arm64/sysreg: Define bits for previously RES1 fields in SCTLR_EL1

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• arm64/sysreg: Rename SCTLR_EL1_NTWE/TWI to SCTLR_EL1_nTWE/TWI

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• arm64/mte: Make TCF field values and naming more standard

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• arm64/mte: Make TCF0 naming and field values more standard

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• arm64/sysreg: Introduce helpers for access to sysreg fields

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