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4 stars written in Tcl
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Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro

Tcl 906 205 Updated Jan 17, 2025

Example LED blinking project for your FPGA dev board of choice

Tcl 171 73 Updated Feb 22, 2025

RISC-V Integration for PYNQ

Tcl 168 55 Updated Jul 12, 2019

Scripts to automate the process of building an image for the Xilinx PYNQ project. This repository is deprecated as its functionality is now part of the man PYNQ repo.

Tcl 20 2 Updated Feb 21, 2017