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Commits on Jun 30, 2024

• Update README.md

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Commits on Apr 28, 2022

• Merge pull request #12 from m47812/feature/VHDL

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• Changed release version

  m47812

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• HDL Language sanity check

  m47812

  committed
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• Documentation update

  m47812

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• Update README.md

  m47812

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  8336fcf

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• Added documentation comments

  m47812

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Commits on Apr 26, 2022

• Small fix in parameter declaration

  m47812

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• Testbench Backend

  m47812

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• VHDL Templates + Copy Constructors

  m47812

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• Header and component generatio + Testing

  m47812

  committed
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• generateWireDeclaration function

  m47812

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• Generate Instantiation

  m47812

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• Added name detection

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Commits on Apr 25, 2022

• Version Update

  m47812

  committed
  37ec172

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• Init from HDL

  m47812

  committed
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Commits on Apr 20, 2022

• Implemented output line formating

  m47812

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• Verified separate Elements

  m47812

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• Merge branch 'main' into feature/VHDL

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Commits on Apr 15, 2022

• Update issue templates

  m47812

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• Versions updated

  m47812

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• Update to read me

  m47812

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• Documentation addition for testbench feature

  m47812

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• To many files error catching

  m47812

  committed
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• Safety feature to not overwirte existing files

  m47812

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• Documentation update

  m47812

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• Fixed #11

  m47812

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• Delete codeql.yml

  m47812

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• Merge branch 'feature/testbench'

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• Console App remake P2

  m47812

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• Redesign of Console P1 (new classes)

  m47812

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• GUI Implementation of Testbench creation

  m47812

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  91ada04

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• Completed Testbench feature in backend

  m47812

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  b2ec234

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• Port Direction handlin & Header generation

  m47812

  committed
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• Implemented copy constructors

  m47812

  committed
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