mul works, div simulated

mangpo · Nov 28, 2016 · 9176c2f · 9176c2f
1 parent 8bb8fd9
commit 9176c2f
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Showing 6 changed files with 70 additions and 18 deletions.
diff --git a/llvm/llvm-machine.rkt b/llvm/llvm-machine.rkt
@@ -47,7 +47,7 @@
 
     (define-instruction-class
      'rrr-commute
-     '(and or xor add)
+     '(and or xor add mul)
      #:args '(var var var)
      #:ins '(1 2)
      #:outs '(0)
@@ -56,14 +56,14 @@
 
     (define-instruction-class
      'rrr
-     '(sub shl lshr ashr)
+     '(sub shl lshr ashr udiv sdiv urem srem)
      #:args '(var var var)
      #:ins '(1 2)
      #:outs '(0))
 
     (define-instruction-class
      'rri
-     '(and# or# xor# add# sub#)
+     '(and# or# xor# add# sub# mul# udiv# sdiv# urem# srem#)
      #:args '(var var const)
      ;; Input arguments that related to program state + additional input related to program state
      ;; Exclude the 3rd argument because it is not related to program state.
@@ -79,14 +79,14 @@
 
     (define-instruction-class
      'rir
-     '(_sub _shl _lshr _ashr)
+     '(_sub _shl _lshr _ashr _udiv _sdiv _urem _srem)
      #:args '(var const var)
      #:ins '(2)
      #:outs '(0))
 
     (define-instruction-class
      'rir
-     '(_sub _shl _lshr _ashr)
+     '(_sub _shl _lshr _ashr _udiv _sdiv _urem _srem)
      #:args '(var const var)
      #:ins '(2)
      #:outs '(0))

diff --git a/llvm/llvm-simulator-racket.rkt b/llvm/llvm-simulator-racket.rkt
@@ -1,4 +1,4 @@
-#lang racket
+#lang s-exp racket
 
 (require "../simulator-racket.rkt" "../ops-racket.rkt" "../inst.rkt")
 (provide llvm-simulator-racket%)
@@ -24,10 +24,19 @@
 
     (define bvadd  (bvop +))
     (define bvsub  (bvop -))
+    (define bvmul  (bvop *))
     (define bvshl  (bvop shl))
     (define bvshr  (bvop >>))
     (define bvushr (bvop ushr))
 
+    (define bvsdiv (bvop quotient))
+    (define (bvudiv n d)
+      (if (< d 0)
+          (if (< n d) 1 0)
+          (let* ([q (shl (quotient (ushr n 2) d) 2)]
+                 [r (- n (* q d))])
+            (finitize-bit (if (or (> r d) (< r 0)) q (add1 q))))))
+
     (define (clz x)
       (let ([mask (shl 1 (sub1 bit))]
             [count 0]
@@ -46,7 +55,7 @@
     (define (interpret program state [ref #f])
       (define out (vector-copy (vector-ref state 0)))
       (define mem (vector-ref state 1))
-      (set! mem (and mem (send mem clone (and ref (vector-ref ref 1)))))
+      (set! mem (and mem (send* mem clone (and ref (vector-ref ref 1)))))
 
       (define (interpret-step step)
         (define op (inst-op step))
@@ -86,12 +95,12 @@
         (define (load)
           (define d (vector-ref args 0))
           (define a (vector-ref args 1))
-          (vector-set! out d (send mem load (vector-ref out a))))
+          (vector-set! out d (send* mem load (vector-ref out a))))
 
         (define (store)
           (define val (vector-ref args 0))
           (define addr (vector-ref args 1))
-          (send mem store (vector-ref out addr) (vector-ref out val))) 
+          (send* mem store (vector-ref out addr) (vector-ref out val))) 
 
         (define-syntax inst-eq
           (syntax-rules ()
@@ -103,6 +112,10 @@
          [(inst-eq `nop) (void)]
          [(inst-eq `add) (rrr bvadd)]
          [(inst-eq `sub) (rrr bvsub)]
+
+         [(inst-eq `mul) (rrr bvmul)]
+         [(inst-eq `sdiv) (rrr bvsdiv)]
+         [(inst-eq `udiv) (rrr bvudiv)]
 
          [(inst-eq `and) (rrr bitwise-and)]
          [(inst-eq `or)  (rrr bitwise-ior)]
@@ -116,6 +129,9 @@
          [(inst-eq `add#) (rri bvadd)]
          [(inst-eq `sub#) (rri bvsub)]
 
+         [(inst-eq `mul#) (rri bvmul)]
+
+
          [(inst-eq `and#) (rri bitwise-and)]
          [(inst-eq `or#)  (rri bitwise-ior)]
          [(inst-eq `xor#) (rri bitwise-xor)]
@@ -125,8 +141,9 @@
          [(inst-eq `shl#)  (rri bvshl)]
 
          ;; rir
-         ;; [(inst-eq `_add) (rir bvadd)]
+         [(inst-eq `_add) (rir bvadd)]
          [(inst-eq `_sub) (rir bvsub)]
+         [(inst-eq `_mul) (rir bvmul)]
 
          ;; [(inst-eq `_and) (rir bitwise-and)]
          ;; [(inst-eq `_or)  (rir bitwise-ior)]
@@ -149,10 +166,10 @@
       (vector out mem)
       )
 
-    (define (performance-cost code)
+    (define (performance-cost program)
       (define cost 0)
-      (for ([x code])
-	   (unless (= (inst-op x) nop-id) (set! cost (add1 cost))))
+      (for ([x program])
+     (unless (= (inst-op x) nop-id) (set! cost (add1 cost))))
       cost)
 
     ))
diff --git a/llvm/llvm-simulator-rosette.rkt b/llvm/llvm-simulator-rosette.rkt
@@ -24,10 +24,19 @@
 
     (define bvadd  (bvop +))
     (define bvsub  (bvop -))
+    (define bvmul  (bvop *))
     (define bvshl  (bvop shl))
     (define bvshr  (bvop >>))
     (define bvushr (bvop ushr))
 
+    (define bvsdiv (bvop quotient))
+    (define (bvudiv n d)
+      (if (< d 0)
+          (if (< n d) 1 0)
+          (let* ([q (shl (quotient (ushr n 2) d) 2)]
+                 [r (- n (* q d))])
+            (finitize-bit (if (or (> r d) (< r 0)) q (add1 q))))))
+
     (define (clz x)
       (let ([mask (shl 1 (sub1 bit))]
             [count 0]
@@ -103,6 +112,10 @@
          [(inst-eq `nop) (void)]
          [(inst-eq `add) (rrr bvadd)]
          [(inst-eq `sub) (rrr bvsub)]
+
+         [(inst-eq `mul) (rrr bvmul)]
+         [(inst-eq `sdiv) (rrr bvsdiv)]
+         [(inst-eq `udiv) (rrr bvudiv)]
 
          [(inst-eq `and) (rrr bitwise-and)]
          [(inst-eq `or)  (rrr bitwise-ior)]
@@ -116,6 +129,9 @@
          [(inst-eq `add#) (rri bvadd)]
          [(inst-eq `sub#) (rri bvsub)]
 
+         [(inst-eq `mul#) (rri bvmul)]
+
+
          [(inst-eq `and#) (rri bitwise-and)]
          [(inst-eq `or#)  (rri bitwise-ior)]
          [(inst-eq `xor#) (rri bitwise-xor)]
@@ -125,8 +141,9 @@
          [(inst-eq `shl#)  (rri bvshl)]
 
          ;; rir
-         ;; [(inst-eq `_add) (rir bvadd)]
+         [(inst-eq `_add) (rir bvadd)]
          [(inst-eq `_sub) (rir bvsub)]
+         [(inst-eq `_mul) (rir bvmul)]
 
          ;; [(inst-eq `_and) (rir bitwise-and)]
          ;; [(inst-eq `_or)  (rir bitwise-ior)]

diff --git a/llvm/optimize.rkt b/llvm/optimize.rkt
diff --git a/llvm/test-search.rkt b/llvm/test-search.rkt
@@ -26,7 +26,7 @@
 "))
 
 
-(define code
+#(define code
 (send parser ir-from-string "
 %1 = lshr i32 %in, 3
 %out = shl nuw i32 %1, 3
@@ -76,12 +76,30 @@ store i32 %1, i32* %2
   %out = add nsw i32 %11, 1
 "))
 
+(define code
+(send parser ir-from-string "
+%in = add i32 %in, %1
+%in = add i32 %in, %1
+%out = add i32 %in, %1
+"))
+;? ?
+
+#;(define code
+(send parser ir-from-string "
+%2 = add i32 %in, %in
+%2 = add i32 %2, %2
+%2 = sub i32 %2, %in
+%2 = sub i32 %2, %in
+%2 = sub i32 %2, %in
+%out = sub i32 %2, %in
+"))
+
 ;; Define search space of candidate programs.
 ;; # of ?'s = # of instructions in a candidate program.
 ;; ? represents one instruction.
 (define sketch
 (send parser ir-from-string "
-?
+? ?
 "))
 
 
@@ -107,7 +125,7 @@ store i32 %1, i32* %2
       encoded-prefix encoded-postfix
       constraint ;; live-out
       #f ;; upperbound cost, #f = no upperbound
-      3600 ;; time limit in seconds
+      60 ;; time limit in seconds
       )
 
 ;; Step 3: create stochastic search

diff --git a/llvm/test-simulator.rkt b/llvm/test-simulator.rkt
@@ -18,7 +18,7 @@
 (define code
 (send parser ir-from-string "
 %1 = load i32, i32* %2
-%1 = add i32 %1, 1
+%1 = udiv i32 %1, 2
 store i32 %1, i32* %2
 "))