-
Notifications
You must be signed in to change notification settings - Fork 124
/
Copy pathpinctrl-tegra114.c
2768 lines (2459 loc) · 80.1 KB
/
pinctrl-tegra114.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/*
* Pinctrl data and driver for the NVIDIA Tegra114 pinmux
*
* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
*
* Author: Pritesh Raithatha <[email protected]>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
* version 2, as published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
* more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include "pinctrl-tegra.h"
/*
* Most pins affected by the pinmux can also be GPIOs. Define these first.
* These must match how the GPIO driver names/numbers its pins.
*/
#define _GPIO(offset) (offset)
#define TEGRA_PIN_CLK_32K_OUT_PA0 _GPIO(0)
#define TEGRA_PIN_UART3_CTS_N_PA1 _GPIO(1)
#define TEGRA_PIN_DAP2_FS_PA2 _GPIO(2)
#define TEGRA_PIN_DAP2_SCLK_PA3 _GPIO(3)
#define TEGRA_PIN_DAP2_DIN_PA4 _GPIO(4)
#define TEGRA_PIN_DAP2_DOUT_PA5 _GPIO(5)
#define TEGRA_PIN_SDMMC3_CLK_PA6 _GPIO(6)
#define TEGRA_PIN_SDMMC3_CMD_PA7 _GPIO(7)
#define TEGRA_PIN_GMI_A17_PB0 _GPIO(8)
#define TEGRA_PIN_GMI_A18_PB1 _GPIO(9)
#define TEGRA_PIN_SDMMC3_DAT3_PB4 _GPIO(12)
#define TEGRA_PIN_SDMMC3_DAT2_PB5 _GPIO(13)
#define TEGRA_PIN_SDMMC3_DAT1_PB6 _GPIO(14)
#define TEGRA_PIN_SDMMC3_DAT0_PB7 _GPIO(15)
#define TEGRA_PIN_UART3_RTS_N_PC0 _GPIO(16)
#define TEGRA_PIN_UART2_TXD_PC2 _GPIO(18)
#define TEGRA_PIN_UART2_RXD_PC3 _GPIO(19)
#define TEGRA_PIN_GEN1_I2C_SCL_PC4 _GPIO(20)
#define TEGRA_PIN_GEN1_I2C_SDA_PC5 _GPIO(21)
#define TEGRA_PIN_GMI_WP_N_PC7 _GPIO(23)
#define TEGRA_PIN_GMI_AD0_PG0 _GPIO(48)
#define TEGRA_PIN_GMI_AD1_PG1 _GPIO(49)
#define TEGRA_PIN_GMI_AD2_PG2 _GPIO(50)
#define TEGRA_PIN_GMI_AD3_PG3 _GPIO(51)
#define TEGRA_PIN_GMI_AD4_PG4 _GPIO(52)
#define TEGRA_PIN_GMI_AD5_PG5 _GPIO(53)
#define TEGRA_PIN_GMI_AD6_PG6 _GPIO(54)
#define TEGRA_PIN_GMI_AD7_PG7 _GPIO(55)
#define TEGRA_PIN_GMI_AD8_PH0 _GPIO(56)
#define TEGRA_PIN_GMI_AD9_PH1 _GPIO(57)
#define TEGRA_PIN_GMI_AD10_PH2 _GPIO(58)
#define TEGRA_PIN_GMI_AD11_PH3 _GPIO(59)
#define TEGRA_PIN_GMI_AD12_PH4 _GPIO(60)
#define TEGRA_PIN_GMI_AD13_PH5 _GPIO(61)
#define TEGRA_PIN_GMI_AD14_PH6 _GPIO(62)
#define TEGRA_PIN_GMI_AD15_PH7 _GPIO(63)
#define TEGRA_PIN_GMI_WR_N_PI0 _GPIO(64)
#define TEGRA_PIN_GMI_OE_N_PI1 _GPIO(65)
#define TEGRA_PIN_GMI_CS6_N_PI3 _GPIO(67)
#define TEGRA_PIN_GMI_RST_N_PI4 _GPIO(68)
#define TEGRA_PIN_GMI_IORDY_PI5 _GPIO(69)
#define TEGRA_PIN_GMI_CS7_N_PI6 _GPIO(70)
#define TEGRA_PIN_GMI_WAIT_PI7 _GPIO(71)
#define TEGRA_PIN_GMI_CS0_N_PJ0 _GPIO(72)
#define TEGRA_PIN_GMI_CS1_N_PJ2 _GPIO(74)
#define TEGRA_PIN_GMI_DQS_P_PJ3 _GPIO(75)
#define TEGRA_PIN_UART2_CTS_N_PJ5 _GPIO(77)
#define TEGRA_PIN_UART2_RTS_N_PJ6 _GPIO(78)
#define TEGRA_PIN_GMI_A16_PJ7 _GPIO(79)
#define TEGRA_PIN_GMI_ADV_N_PK0 _GPIO(80)
#define TEGRA_PIN_GMI_CLK_PK1 _GPIO(81)
#define TEGRA_PIN_GMI_CS4_N_PK2 _GPIO(82)
#define TEGRA_PIN_GMI_CS2_N_PK3 _GPIO(83)
#define TEGRA_PIN_GMI_CS3_N_PK4 _GPIO(84)
#define TEGRA_PIN_SPDIF_OUT_PK5 _GPIO(85)
#define TEGRA_PIN_SPDIF_IN_PK6 _GPIO(86)
#define TEGRA_PIN_GMI_A19_PK7 _GPIO(87)
#define TEGRA_PIN_DAP1_FS_PN0 _GPIO(104)
#define TEGRA_PIN_DAP1_DIN_PN1 _GPIO(105)
#define TEGRA_PIN_DAP1_DOUT_PN2 _GPIO(106)
#define TEGRA_PIN_DAP1_SCLK_PN3 _GPIO(107)
#define TEGRA_PIN_USB_VBUS_EN0_PN4 _GPIO(108)
#define TEGRA_PIN_USB_VBUS_EN1_PN5 _GPIO(109)
#define TEGRA_PIN_HDMI_INT_PN7 _GPIO(111)
#define TEGRA_PIN_ULPI_DATA7_PO0 _GPIO(112)
#define TEGRA_PIN_ULPI_DATA0_PO1 _GPIO(113)
#define TEGRA_PIN_ULPI_DATA1_PO2 _GPIO(114)
#define TEGRA_PIN_ULPI_DATA2_PO3 _GPIO(115)
#define TEGRA_PIN_ULPI_DATA3_PO4 _GPIO(116)
#define TEGRA_PIN_ULPI_DATA4_PO5 _GPIO(117)
#define TEGRA_PIN_ULPI_DATA5_PO6 _GPIO(118)
#define TEGRA_PIN_ULPI_DATA6_PO7 _GPIO(119)
#define TEGRA_PIN_DAP3_FS_PP0 _GPIO(120)
#define TEGRA_PIN_DAP3_DIN_PP1 _GPIO(121)
#define TEGRA_PIN_DAP3_DOUT_PP2 _GPIO(122)
#define TEGRA_PIN_DAP3_SCLK_PP3 _GPIO(123)
#define TEGRA_PIN_DAP4_FS_PP4 _GPIO(124)
#define TEGRA_PIN_DAP4_DIN_PP5 _GPIO(125)
#define TEGRA_PIN_DAP4_DOUT_PP6 _GPIO(126)
#define TEGRA_PIN_DAP4_SCLK_PP7 _GPIO(127)
#define TEGRA_PIN_KB_COL0_PQ0 _GPIO(128)
#define TEGRA_PIN_KB_COL1_PQ1 _GPIO(129)
#define TEGRA_PIN_KB_COL2_PQ2 _GPIO(130)
#define TEGRA_PIN_KB_COL3_PQ3 _GPIO(131)
#define TEGRA_PIN_KB_COL4_PQ4 _GPIO(132)
#define TEGRA_PIN_KB_COL5_PQ5 _GPIO(133)
#define TEGRA_PIN_KB_COL6_PQ6 _GPIO(134)
#define TEGRA_PIN_KB_COL7_PQ7 _GPIO(135)
#define TEGRA_PIN_KB_ROW0_PR0 _GPIO(136)
#define TEGRA_PIN_KB_ROW1_PR1 _GPIO(137)
#define TEGRA_PIN_KB_ROW2_PR2 _GPIO(138)
#define TEGRA_PIN_KB_ROW3_PR3 _GPIO(139)
#define TEGRA_PIN_KB_ROW4_PR4 _GPIO(140)
#define TEGRA_PIN_KB_ROW5_PR5 _GPIO(141)
#define TEGRA_PIN_KB_ROW6_PR6 _GPIO(142)
#define TEGRA_PIN_KB_ROW7_PR7 _GPIO(143)
#define TEGRA_PIN_KB_ROW8_PS0 _GPIO(144)
#define TEGRA_PIN_KB_ROW9_PS1 _GPIO(145)
#define TEGRA_PIN_KB_ROW10_PS2 _GPIO(146)
#define TEGRA_PIN_GEN2_I2C_SCL_PT5 _GPIO(157)
#define TEGRA_PIN_GEN2_I2C_SDA_PT6 _GPIO(158)
#define TEGRA_PIN_SDMMC4_CMD_PT7 _GPIO(159)
#define TEGRA_PIN_PU0 _GPIO(160)
#define TEGRA_PIN_PU1 _GPIO(161)
#define TEGRA_PIN_PU2 _GPIO(162)
#define TEGRA_PIN_PU3 _GPIO(163)
#define TEGRA_PIN_PU4 _GPIO(164)
#define TEGRA_PIN_PU5 _GPIO(165)
#define TEGRA_PIN_PU6 _GPIO(166)
#define TEGRA_PIN_PV0 _GPIO(168)
#define TEGRA_PIN_PV1 _GPIO(169)
#define TEGRA_PIN_SDMMC3_CD_N_PV2 _GPIO(170)
#define TEGRA_PIN_SDMMC1_WP_N_PV3 _GPIO(171)
#define TEGRA_PIN_DDC_SCL_PV4 _GPIO(172)
#define TEGRA_PIN_DDC_SDA_PV5 _GPIO(173)
#define TEGRA_PIN_GPIO_W2_AUD_PW2 _GPIO(178)
#define TEGRA_PIN_GPIO_W3_AUD_PW3 _GPIO(179)
#define TEGRA_PIN_CLK1_OUT_PW4 _GPIO(180)
#define TEGRA_PIN_CLK2_OUT_PW5 _GPIO(181)
#define TEGRA_PIN_UART3_TXD_PW6 _GPIO(182)
#define TEGRA_PIN_UART3_RXD_PW7 _GPIO(183)
#define TEGRA_PIN_DVFS_PWM_PX0 _GPIO(184)
#define TEGRA_PIN_GPIO_X1_AUD_PX1 _GPIO(185)
#define TEGRA_PIN_DVFS_CLK_PX2 _GPIO(186)
#define TEGRA_PIN_GPIO_X3_AUD_PX3 _GPIO(187)
#define TEGRA_PIN_GPIO_X4_AUD_PX4 _GPIO(188)
#define TEGRA_PIN_GPIO_X5_AUD_PX5 _GPIO(189)
#define TEGRA_PIN_GPIO_X6_AUD_PX6 _GPIO(190)
#define TEGRA_PIN_GPIO_X7_AUD_PX7 _GPIO(191)
#define TEGRA_PIN_ULPI_CLK_PY0 _GPIO(192)
#define TEGRA_PIN_ULPI_DIR_PY1 _GPIO(193)
#define TEGRA_PIN_ULPI_NXT_PY2 _GPIO(194)
#define TEGRA_PIN_ULPI_STP_PY3 _GPIO(195)
#define TEGRA_PIN_SDMMC1_DAT3_PY4 _GPIO(196)
#define TEGRA_PIN_SDMMC1_DAT2_PY5 _GPIO(197)
#define TEGRA_PIN_SDMMC1_DAT1_PY6 _GPIO(198)
#define TEGRA_PIN_SDMMC1_DAT0_PY7 _GPIO(199)
#define TEGRA_PIN_SDMMC1_CLK_PZ0 _GPIO(200)
#define TEGRA_PIN_SDMMC1_CMD_PZ1 _GPIO(201)
#define TEGRA_PIN_SYS_CLK_REQ_PZ5 _GPIO(205)
#define TEGRA_PIN_PWR_I2C_SCL_PZ6 _GPIO(206)
#define TEGRA_PIN_PWR_I2C_SDA_PZ7 _GPIO(207)
#define TEGRA_PIN_SDMMC4_DAT0_PAA0 _GPIO(208)
#define TEGRA_PIN_SDMMC4_DAT1_PAA1 _GPIO(209)
#define TEGRA_PIN_SDMMC4_DAT2_PAA2 _GPIO(210)
#define TEGRA_PIN_SDMMC4_DAT3_PAA3 _GPIO(211)
#define TEGRA_PIN_SDMMC4_DAT4_PAA4 _GPIO(212)
#define TEGRA_PIN_SDMMC4_DAT5_PAA5 _GPIO(213)
#define TEGRA_PIN_SDMMC4_DAT6_PAA6 _GPIO(214)
#define TEGRA_PIN_SDMMC4_DAT7_PAA7 _GPIO(215)
#define TEGRA_PIN_PBB0 _GPIO(216)
#define TEGRA_PIN_CAM_I2C_SCL_PBB1 _GPIO(217)
#define TEGRA_PIN_CAM_I2C_SDA_PBB2 _GPIO(218)
#define TEGRA_PIN_PBB3 _GPIO(219)
#define TEGRA_PIN_PBB4 _GPIO(220)
#define TEGRA_PIN_PBB5 _GPIO(221)
#define TEGRA_PIN_PBB6 _GPIO(222)
#define TEGRA_PIN_PBB7 _GPIO(223)
#define TEGRA_PIN_CAM_MCLK_PCC0 _GPIO(224)
#define TEGRA_PIN_PCC1 _GPIO(225)
#define TEGRA_PIN_PCC2 _GPIO(226)
#define TEGRA_PIN_SDMMC4_CLK_PCC4 _GPIO(228)
#define TEGRA_PIN_CLK2_REQ_PCC5 _GPIO(229)
#define TEGRA_PIN_CLK3_OUT_PEE0 _GPIO(240)
#define TEGRA_PIN_CLK3_REQ_PEE1 _GPIO(241)
#define TEGRA_PIN_CLK1_REQ_PEE2 _GPIO(242)
#define TEGRA_PIN_HDMI_CEC_PEE3 _GPIO(243)
#define TEGRA_PIN_SDMMC3_CLK_LB_OUT_PEE4 _GPIO(244)
#define TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5 _GPIO(245)
/* All non-GPIO pins follow */
#define NUM_GPIOS (TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5 + 1)
#define _PIN(offset) (NUM_GPIOS + (offset))
/* Non-GPIO pins */
#define TEGRA_PIN_CORE_PWR_REQ _PIN(0)
#define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
#define TEGRA_PIN_PWR_INT_N _PIN(2)
#define TEGRA_PIN_RESET_OUT_N _PIN(3)
#define TEGRA_PIN_OWR _PIN(4)
static const struct pinctrl_pin_desc tegra114_pins[] = {
PINCTRL_PIN(TEGRA_PIN_CLK_32K_OUT_PA0, "CLK_32K_OUT PA0"),
PINCTRL_PIN(TEGRA_PIN_UART3_CTS_N_PA1, "UART3_CTS_N PA1"),
PINCTRL_PIN(TEGRA_PIN_DAP2_FS_PA2, "DAP2_FS PA2"),
PINCTRL_PIN(TEGRA_PIN_DAP2_SCLK_PA3, "DAP2_SCLK PA3"),
PINCTRL_PIN(TEGRA_PIN_DAP2_DIN_PA4, "DAP2_DIN PA4"),
PINCTRL_PIN(TEGRA_PIN_DAP2_DOUT_PA5, "DAP2_DOUT PA5"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_PA6, "SDMMC3_CLK PA6"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_CMD_PA7, "SDMMC3_CMD PA7"),
PINCTRL_PIN(TEGRA_PIN_GMI_A17_PB0, "GMI_A17 PB0"),
PINCTRL_PIN(TEGRA_PIN_GMI_A18_PB1, "GMI_A18 PB1"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT3_PB4, "SDMMC3_DAT3 PB4"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT2_PB5, "SDMMC3_DAT2 PB5"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT1_PB6, "SDMMC3_DAT1 PB6"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_DAT0_PB7, "SDMMC3_DAT0 PB7"),
PINCTRL_PIN(TEGRA_PIN_UART3_RTS_N_PC0, "UART3_RTS_N PC0"),
PINCTRL_PIN(TEGRA_PIN_UART2_TXD_PC2, "UART2_TXD PC2"),
PINCTRL_PIN(TEGRA_PIN_UART2_RXD_PC3, "UART2_RXD PC3"),
PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SCL_PC4, "GEN1_I2C_SCL PC4"),
PINCTRL_PIN(TEGRA_PIN_GEN1_I2C_SDA_PC5, "GEN1_I2C_SDA PC5"),
PINCTRL_PIN(TEGRA_PIN_GMI_WP_N_PC7, "GMI_WP_N PC7"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD0_PG0, "GMI_AD0 PG0"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD1_PG1, "GMI_AD1 PG1"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD2_PG2, "GMI_AD2 PG2"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD3_PG3, "GMI_AD3 PG3"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD4_PG4, "GMI_AD4 PG4"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD5_PG5, "GMI_AD5 PG5"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD6_PG6, "GMI_AD6 PG6"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD7_PG7, "GMI_AD7 PG7"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD8_PH0, "GMI_AD8 PH0"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD9_PH1, "GMI_AD9 PH1"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD10_PH2, "GMI_AD10 PH2"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD11_PH3, "GMI_AD11 PH3"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD12_PH4, "GMI_AD12 PH4"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD13_PH5, "GMI_AD13 PH5"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD14_PH6, "GMI_AD14 PH6"),
PINCTRL_PIN(TEGRA_PIN_GMI_AD15_PH7, "GMI_AD15 PH7"),
PINCTRL_PIN(TEGRA_PIN_GMI_WR_N_PI0, "GMI_WR_N PI0"),
PINCTRL_PIN(TEGRA_PIN_GMI_OE_N_PI1, "GMI_OE_N PI1"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS6_N_PI3, "GMI_CS6_N PI3"),
PINCTRL_PIN(TEGRA_PIN_GMI_RST_N_PI4, "GMI_RST_N PI4"),
PINCTRL_PIN(TEGRA_PIN_GMI_IORDY_PI5, "GMI_IORDY PI5"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS7_N_PI6, "GMI_CS7_N PI6"),
PINCTRL_PIN(TEGRA_PIN_GMI_WAIT_PI7, "GMI_WAIT PI7"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS0_N_PJ0, "GMI_CS0_N PJ0"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS1_N_PJ2, "GMI_CS1_N PJ2"),
PINCTRL_PIN(TEGRA_PIN_GMI_DQS_P_PJ3, "GMI_DQS_P PJ3"),
PINCTRL_PIN(TEGRA_PIN_UART2_CTS_N_PJ5, "UART2_CTS_N PJ5"),
PINCTRL_PIN(TEGRA_PIN_UART2_RTS_N_PJ6, "UART2_RTS_N PJ6"),
PINCTRL_PIN(TEGRA_PIN_GMI_A16_PJ7, "GMI_A16 PJ7"),
PINCTRL_PIN(TEGRA_PIN_GMI_ADV_N_PK0, "GMI_ADV_N PK0"),
PINCTRL_PIN(TEGRA_PIN_GMI_CLK_PK1, "GMI_CLK PK1"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS4_N_PK2, "GMI_CS4_N PK2"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS2_N_PK3, "GMI_CS2_N PK3"),
PINCTRL_PIN(TEGRA_PIN_GMI_CS3_N_PK4, "GMI_CS3_N PK4"),
PINCTRL_PIN(TEGRA_PIN_SPDIF_OUT_PK5, "SPDIF_OUT PK5"),
PINCTRL_PIN(TEGRA_PIN_SPDIF_IN_PK6, "SPDIF_IN PK6"),
PINCTRL_PIN(TEGRA_PIN_GMI_A19_PK7, "GMI_A19 PK7"),
PINCTRL_PIN(TEGRA_PIN_DAP1_FS_PN0, "DAP1_FS PN0"),
PINCTRL_PIN(TEGRA_PIN_DAP1_DIN_PN1, "DAP1_DIN PN1"),
PINCTRL_PIN(TEGRA_PIN_DAP1_DOUT_PN2, "DAP1_DOUT PN2"),
PINCTRL_PIN(TEGRA_PIN_DAP1_SCLK_PN3, "DAP1_SCLK PN3"),
PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN0_PN4, "USB_VBUS_EN0 PN4"),
PINCTRL_PIN(TEGRA_PIN_USB_VBUS_EN1_PN5, "USB_VBUS_EN1 PN5"),
PINCTRL_PIN(TEGRA_PIN_HDMI_INT_PN7, "HDMI_INT PN7"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA7_PO0, "ULPI_DATA7 PO0"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA0_PO1, "ULPI_DATA0 PO1"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA1_PO2, "ULPI_DATA1 PO2"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA2_PO3, "ULPI_DATA2 PO3"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA3_PO4, "ULPI_DATA3 PO4"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA4_PO5, "ULPI_DATA4 PO5"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA5_PO6, "ULPI_DATA5 PO6"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DATA6_PO7, "ULPI_DATA6 PO7"),
PINCTRL_PIN(TEGRA_PIN_DAP3_FS_PP0, "DAP3_FS PP0"),
PINCTRL_PIN(TEGRA_PIN_DAP3_DIN_PP1, "DAP3_DIN PP1"),
PINCTRL_PIN(TEGRA_PIN_DAP3_DOUT_PP2, "DAP3_DOUT PP2"),
PINCTRL_PIN(TEGRA_PIN_DAP3_SCLK_PP3, "DAP3_SCLK PP3"),
PINCTRL_PIN(TEGRA_PIN_DAP4_FS_PP4, "DAP4_FS PP4"),
PINCTRL_PIN(TEGRA_PIN_DAP4_DIN_PP5, "DAP4_DIN PP5"),
PINCTRL_PIN(TEGRA_PIN_DAP4_DOUT_PP6, "DAP4_DOUT PP6"),
PINCTRL_PIN(TEGRA_PIN_DAP4_SCLK_PP7, "DAP4_SCLK PP7"),
PINCTRL_PIN(TEGRA_PIN_KB_COL0_PQ0, "KB_COL0 PQ0"),
PINCTRL_PIN(TEGRA_PIN_KB_COL1_PQ1, "KB_COL1 PQ1"),
PINCTRL_PIN(TEGRA_PIN_KB_COL2_PQ2, "KB_COL2 PQ2"),
PINCTRL_PIN(TEGRA_PIN_KB_COL3_PQ3, "KB_COL3 PQ3"),
PINCTRL_PIN(TEGRA_PIN_KB_COL4_PQ4, "KB_COL4 PQ4"),
PINCTRL_PIN(TEGRA_PIN_KB_COL5_PQ5, "KB_COL5 PQ5"),
PINCTRL_PIN(TEGRA_PIN_KB_COL6_PQ6, "KB_COL6 PQ6"),
PINCTRL_PIN(TEGRA_PIN_KB_COL7_PQ7, "KB_COL7 PQ7"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW0_PR0, "KB_ROW0 PR0"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW1_PR1, "KB_ROW1 PR1"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW2_PR2, "KB_ROW2 PR2"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW3_PR3, "KB_ROW3 PR3"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW4_PR4, "KB_ROW4 PR4"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW5_PR5, "KB_ROW5 PR5"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW6_PR6, "KB_ROW6 PR6"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW7_PR7, "KB_ROW7 PR7"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW8_PS0, "KB_ROW8 PS0"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW9_PS1, "KB_ROW9 PS1"),
PINCTRL_PIN(TEGRA_PIN_KB_ROW10_PS2, "KB_ROW10 PS2"),
PINCTRL_PIN(TEGRA_PIN_GEN2_I2C_SCL_PT5, "GEN2_I2C_SCL PT5"),
PINCTRL_PIN(TEGRA_PIN_GEN2_I2C_SDA_PT6, "GEN2_I2C_SDA PT6"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_CMD_PT7, "SDMMC4_CMD PT7"),
PINCTRL_PIN(TEGRA_PIN_PU0, "PU0"),
PINCTRL_PIN(TEGRA_PIN_PU1, "PU1"),
PINCTRL_PIN(TEGRA_PIN_PU2, "PU2"),
PINCTRL_PIN(TEGRA_PIN_PU3, "PU3"),
PINCTRL_PIN(TEGRA_PIN_PU4, "PU4"),
PINCTRL_PIN(TEGRA_PIN_PU5, "PU5"),
PINCTRL_PIN(TEGRA_PIN_PU6, "PU6"),
PINCTRL_PIN(TEGRA_PIN_PV0, "PV0"),
PINCTRL_PIN(TEGRA_PIN_PV1, "PV1"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_CD_N_PV2, "SDMMC3_CD_N PV2"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_WP_N_PV3, "SDMMC1_WP_N PV3"),
PINCTRL_PIN(TEGRA_PIN_DDC_SCL_PV4, "DDC_SCL PV4"),
PINCTRL_PIN(TEGRA_PIN_DDC_SDA_PV5, "DDC_SDA PV5"),
PINCTRL_PIN(TEGRA_PIN_GPIO_W2_AUD_PW2, "GPIO_W2_AUD PW2"),
PINCTRL_PIN(TEGRA_PIN_GPIO_W3_AUD_PW3, "GPIO_W3_AUD PW3"),
PINCTRL_PIN(TEGRA_PIN_CLK1_OUT_PW4, "CLK1_OUT PW4"),
PINCTRL_PIN(TEGRA_PIN_CLK2_OUT_PW5, "CLK2_OUT PW5"),
PINCTRL_PIN(TEGRA_PIN_UART3_TXD_PW6, "UART3_TXD PW6"),
PINCTRL_PIN(TEGRA_PIN_UART3_RXD_PW7, "UART3_RXD PW7"),
PINCTRL_PIN(TEGRA_PIN_DVFS_PWM_PX0, "DVFS_PWM PX0"),
PINCTRL_PIN(TEGRA_PIN_GPIO_X1_AUD_PX1, "GPIO_X1_AUD PX1"),
PINCTRL_PIN(TEGRA_PIN_DVFS_CLK_PX2, "DVFS_CLK PX2"),
PINCTRL_PIN(TEGRA_PIN_GPIO_X3_AUD_PX3, "GPIO_X3_AUD PX3"),
PINCTRL_PIN(TEGRA_PIN_GPIO_X4_AUD_PX4, "GPIO_X4_AUD PX4"),
PINCTRL_PIN(TEGRA_PIN_GPIO_X5_AUD_PX5, "GPIO_X5_AUD PX5"),
PINCTRL_PIN(TEGRA_PIN_GPIO_X6_AUD_PX6, "GPIO_X6_AUD PX6"),
PINCTRL_PIN(TEGRA_PIN_GPIO_X7_AUD_PX7, "GPIO_X7_AUD PX7"),
PINCTRL_PIN(TEGRA_PIN_ULPI_CLK_PY0, "ULPI_CLK PY0"),
PINCTRL_PIN(TEGRA_PIN_ULPI_DIR_PY1, "ULPI_DIR PY1"),
PINCTRL_PIN(TEGRA_PIN_ULPI_NXT_PY2, "ULPI_NXT PY2"),
PINCTRL_PIN(TEGRA_PIN_ULPI_STP_PY3, "ULPI_STP PY3"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT3_PY4, "SDMMC1_DAT3 PY4"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT2_PY5, "SDMMC1_DAT2 PY5"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT1_PY6, "SDMMC1_DAT1 PY6"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_DAT0_PY7, "SDMMC1_DAT0 PY7"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_CLK_PZ0, "SDMMC1_CLK PZ0"),
PINCTRL_PIN(TEGRA_PIN_SDMMC1_CMD_PZ1, "SDMMC1_CMD PZ1"),
PINCTRL_PIN(TEGRA_PIN_SYS_CLK_REQ_PZ5, "SYS_CLK_REQ PZ5"),
PINCTRL_PIN(TEGRA_PIN_PWR_I2C_SCL_PZ6, "PWR_I2C_SCL PZ6"),
PINCTRL_PIN(TEGRA_PIN_PWR_I2C_SDA_PZ7, "PWR_I2C_SDA PZ7"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT0_PAA0, "SDMMC4_DAT0 PAA0"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT1_PAA1, "SDMMC4_DAT1 PAA1"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT2_PAA2, "SDMMC4_DAT2 PAA2"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT3_PAA3, "SDMMC4_DAT3 PAA3"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT4_PAA4, "SDMMC4_DAT4 PAA4"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT5_PAA5, "SDMMC4_DAT5 PAA5"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT6_PAA6, "SDMMC4_DAT6 PAA6"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_DAT7_PAA7, "SDMMC4_DAT7 PAA7"),
PINCTRL_PIN(TEGRA_PIN_PBB0, "PBB0"),
PINCTRL_PIN(TEGRA_PIN_CAM_I2C_SCL_PBB1, "CAM_I2C_SCL PBB1"),
PINCTRL_PIN(TEGRA_PIN_CAM_I2C_SDA_PBB2, "CAM_I2C_SDA PBB2"),
PINCTRL_PIN(TEGRA_PIN_PBB3, "PBB3"),
PINCTRL_PIN(TEGRA_PIN_PBB4, "PBB4"),
PINCTRL_PIN(TEGRA_PIN_PBB5, "PBB5"),
PINCTRL_PIN(TEGRA_PIN_PBB6, "PBB6"),
PINCTRL_PIN(TEGRA_PIN_PBB7, "PBB7"),
PINCTRL_PIN(TEGRA_PIN_CAM_MCLK_PCC0, "CAM_MCLK PCC0"),
PINCTRL_PIN(TEGRA_PIN_PCC1, "PCC1"),
PINCTRL_PIN(TEGRA_PIN_PCC2, "PCC2"),
PINCTRL_PIN(TEGRA_PIN_SDMMC4_CLK_PCC4, "SDMMC4_CLK PCC4"),
PINCTRL_PIN(TEGRA_PIN_CLK2_REQ_PCC5, "CLK2_REQ PCC5"),
PINCTRL_PIN(TEGRA_PIN_CLK3_OUT_PEE0, "CLK3_OUT PEE0"),
PINCTRL_PIN(TEGRA_PIN_CLK3_REQ_PEE1, "CLK3_REQ PEE1"),
PINCTRL_PIN(TEGRA_PIN_CLK1_REQ_PEE2, "CLK1_REQ PEE2"),
PINCTRL_PIN(TEGRA_PIN_HDMI_CEC_PEE3, "HDMI_CEC PEE3"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_LB_OUT_PEE4, "SDMMC3_CLK_LB_OUT PEE4"),
PINCTRL_PIN(TEGRA_PIN_SDMMC3_CLK_LB_IN_PEE5, "SDMMC3_CLK_LB_IN PEE5"),
PINCTRL_PIN(TEGRA_PIN_CORE_PWR_REQ, "CORE_PWR_REQ"),
PINCTRL_PIN(TEGRA_PIN_CPU_PWR_REQ, "CPU_PWR_REQ"),
PINCTRL_PIN(TEGRA_PIN_OWR, "OWR"),
PINCTRL_PIN(TEGRA_PIN_PWR_INT_N, "PWR_INT_N"),
PINCTRL_PIN(TEGRA_PIN_RESET_OUT_N, "RESET_OUT_N"),
};
static const unsigned clk_32k_out_pa0_pins[] = {
TEGRA_PIN_CLK_32K_OUT_PA0,
};
static const unsigned uart3_cts_n_pa1_pins[] = {
TEGRA_PIN_UART3_CTS_N_PA1,
};
static const unsigned dap2_fs_pa2_pins[] = {
TEGRA_PIN_DAP2_FS_PA2,
};
static const unsigned dap2_sclk_pa3_pins[] = {
TEGRA_PIN_DAP2_SCLK_PA3,
};
static const unsigned dap2_din_pa4_pins[] = {
TEGRA_PIN_DAP2_DIN_PA4,
};
static const unsigned dap2_dout_pa5_pins[] = {
TEGRA_PIN_DAP2_DOUT_PA5,
};
static const unsigned sdmmc3_clk_pa6_pins[] = {
TEGRA_PIN_SDMMC3_CLK_PA6,
};
static const unsigned sdmmc3_cmd_pa7_pins[] = {
TEGRA_PIN_SDMMC3_CMD_PA7,
};
static const unsigned gmi_a17_pb0_pins[] = {
TEGRA_PIN_GMI_A17_PB0,
};
static const unsigned gmi_a18_pb1_pins[] = {
TEGRA_PIN_GMI_A18_PB1,
};
static const unsigned sdmmc3_dat3_pb4_pins[] = {
TEGRA_PIN_SDMMC3_DAT3_PB4,
};
static const unsigned sdmmc3_dat2_pb5_pins[] = {
TEGRA_PIN_SDMMC3_DAT2_PB5,
};
static const unsigned sdmmc3_dat1_pb6_pins[] = {
TEGRA_PIN_SDMMC3_DAT1_PB6,
};
static const unsigned sdmmc3_dat0_pb7_pins[] = {
TEGRA_PIN_SDMMC3_DAT0_PB7,
};
static const unsigned uart3_rts_n_pc0_pins[] = {
TEGRA_PIN_UART3_RTS_N_PC0,
};
static const unsigned uart2_txd_pc2_pins[] = {
TEGRA_PIN_UART2_TXD_PC2,
};
static const unsigned uart2_rxd_pc3_pins[] = {
TEGRA_PIN_UART2_RXD_PC3,
};
static const unsigned gen1_i2c_scl_pc4_pins[] = {
TEGRA_PIN_GEN1_I2C_SCL_PC4,
};
static const unsigned gen1_i2c_sda_pc5_pins[] = {
TEGRA_PIN_GEN1_I2C_SDA_PC5,
};
static const unsigned gmi_wp_n_pc7_pins[] = {
TEGRA_PIN_GMI_WP_N_PC7,
};
static const unsigned gmi_ad0_pg0_pins[] = {
TEGRA_PIN_GMI_AD0_PG0,
};
static const unsigned gmi_ad1_pg1_pins[] = {
TEGRA_PIN_GMI_AD1_PG1,
};
static const unsigned gmi_ad2_pg2_pins[] = {
TEGRA_PIN_GMI_AD2_PG2,
};
static const unsigned gmi_ad3_pg3_pins[] = {
TEGRA_PIN_GMI_AD3_PG3,
};
static const unsigned gmi_ad4_pg4_pins[] = {
TEGRA_PIN_GMI_AD4_PG4,
};
static const unsigned gmi_ad5_pg5_pins[] = {
TEGRA_PIN_GMI_AD5_PG5,
};
static const unsigned gmi_ad6_pg6_pins[] = {
TEGRA_PIN_GMI_AD6_PG6,
};
static const unsigned gmi_ad7_pg7_pins[] = {
TEGRA_PIN_GMI_AD7_PG7,
};
static const unsigned gmi_ad8_ph0_pins[] = {
TEGRA_PIN_GMI_AD8_PH0,
};
static const unsigned gmi_ad9_ph1_pins[] = {
TEGRA_PIN_GMI_AD9_PH1,
};
static const unsigned gmi_ad10_ph2_pins[] = {
TEGRA_PIN_GMI_AD10_PH2,
};
static const unsigned gmi_ad11_ph3_pins[] = {
TEGRA_PIN_GMI_AD11_PH3,
};
static const unsigned gmi_ad12_ph4_pins[] = {
TEGRA_PIN_GMI_AD12_PH4,
};
static const unsigned gmi_ad13_ph5_pins[] = {
TEGRA_PIN_GMI_AD13_PH5,
};
static const unsigned gmi_ad14_ph6_pins[] = {
TEGRA_PIN_GMI_AD14_PH6,
};
static const unsigned gmi_ad15_ph7_pins[] = {
TEGRA_PIN_GMI_AD15_PH7,
};
static const unsigned gmi_wr_n_pi0_pins[] = {
TEGRA_PIN_GMI_WR_N_PI0,
};
static const unsigned gmi_oe_n_pi1_pins[] = {
TEGRA_PIN_GMI_OE_N_PI1,
};
static const unsigned gmi_cs6_n_pi3_pins[] = {
TEGRA_PIN_GMI_CS6_N_PI3,
};
static const unsigned gmi_rst_n_pi4_pins[] = {
TEGRA_PIN_GMI_RST_N_PI4,
};
static const unsigned gmi_iordy_pi5_pins[] = {
TEGRA_PIN_GMI_IORDY_PI5,
};
static const unsigned gmi_cs7_n_pi6_pins[] = {
TEGRA_PIN_GMI_CS7_N_PI6,
};
static const unsigned gmi_wait_pi7_pins[] = {
TEGRA_PIN_GMI_WAIT_PI7,
};
static const unsigned gmi_cs0_n_pj0_pins[] = {
TEGRA_PIN_GMI_CS0_N_PJ0,
};
static const unsigned gmi_cs1_n_pj2_pins[] = {
TEGRA_PIN_GMI_CS1_N_PJ2,
};
static const unsigned gmi_dqs_p_pj3_pins[] = {
TEGRA_PIN_GMI_DQS_P_PJ3,
};
static const unsigned uart2_cts_n_pj5_pins[] = {
TEGRA_PIN_UART2_CTS_N_PJ5,
};
static const unsigned uart2_rts_n_pj6_pins[] = {
TEGRA_PIN_UART2_RTS_N_PJ6,
};
static const unsigned gmi_a16_pj7_pins[] = {
TEGRA_PIN_GMI_A16_PJ7,
};
static const unsigned gmi_adv_n_pk0_pins[] = {
TEGRA_PIN_GMI_ADV_N_PK0,
};
static const unsigned gmi_clk_pk1_pins[] = {
TEGRA_PIN_GMI_CLK_PK1,
};
static const unsigned gmi_cs4_n_pk2_pins[] = {
TEGRA_PIN_GMI_CS4_N_PK2,
};
static const unsigned gmi_cs2_n_pk3_pins[] = {
TEGRA_PIN_GMI_CS2_N_PK3,
};
static const unsigned gmi_cs3_n_pk4_pins[] = {
TEGRA_PIN_GMI_CS3_N_PK4,
};
static const unsigned spdif_out_pk5_pins[] = {
TEGRA_PIN_SPDIF_OUT_PK5,
};
static const unsigned spdif_in_pk6_pins[] = {
TEGRA_PIN_SPDIF_IN_PK6,
};
static const unsigned gmi_a19_pk7_pins[] = {
TEGRA_PIN_GMI_A19_PK7,
};
static const unsigned dap1_fs_pn0_pins[] = {
TEGRA_PIN_DAP1_FS_PN0,
};
static const unsigned dap1_din_pn1_pins[] = {
TEGRA_PIN_DAP1_DIN_PN1,
};
static const unsigned dap1_dout_pn2_pins[] = {
TEGRA_PIN_DAP1_DOUT_PN2,
};
static const unsigned dap1_sclk_pn3_pins[] = {
TEGRA_PIN_DAP1_SCLK_PN3,
};
static const unsigned usb_vbus_en0_pn4_pins[] = {
TEGRA_PIN_USB_VBUS_EN0_PN4,
};
static const unsigned usb_vbus_en1_pn5_pins[] = {
TEGRA_PIN_USB_VBUS_EN1_PN5,
};
static const unsigned hdmi_int_pn7_pins[] = {
TEGRA_PIN_HDMI_INT_PN7,
};
static const unsigned ulpi_data7_po0_pins[] = {
TEGRA_PIN_ULPI_DATA7_PO0,
};
static const unsigned ulpi_data0_po1_pins[] = {
TEGRA_PIN_ULPI_DATA0_PO1,
};
static const unsigned ulpi_data1_po2_pins[] = {
TEGRA_PIN_ULPI_DATA1_PO2,
};
static const unsigned ulpi_data2_po3_pins[] = {
TEGRA_PIN_ULPI_DATA2_PO3,
};
static const unsigned ulpi_data3_po4_pins[] = {
TEGRA_PIN_ULPI_DATA3_PO4,
};
static const unsigned ulpi_data4_po5_pins[] = {
TEGRA_PIN_ULPI_DATA4_PO5,
};
static const unsigned ulpi_data5_po6_pins[] = {
TEGRA_PIN_ULPI_DATA5_PO6,
};
static const unsigned ulpi_data6_po7_pins[] = {
TEGRA_PIN_ULPI_DATA6_PO7,
};
static const unsigned dap3_fs_pp0_pins[] = {
TEGRA_PIN_DAP3_FS_PP0,
};
static const unsigned dap3_din_pp1_pins[] = {
TEGRA_PIN_DAP3_DIN_PP1,
};
static const unsigned dap3_dout_pp2_pins[] = {
TEGRA_PIN_DAP3_DOUT_PP2,
};
static const unsigned dap3_sclk_pp3_pins[] = {
TEGRA_PIN_DAP3_SCLK_PP3,
};
static const unsigned dap4_fs_pp4_pins[] = {
TEGRA_PIN_DAP4_FS_PP4,
};
static const unsigned dap4_din_pp5_pins[] = {
TEGRA_PIN_DAP4_DIN_PP5,
};
static const unsigned dap4_dout_pp6_pins[] = {
TEGRA_PIN_DAP4_DOUT_PP6,
};
static const unsigned dap4_sclk_pp7_pins[] = {
TEGRA_PIN_DAP4_SCLK_PP7,
};
static const unsigned kb_col0_pq0_pins[] = {
TEGRA_PIN_KB_COL0_PQ0,
};
static const unsigned kb_col1_pq1_pins[] = {
TEGRA_PIN_KB_COL1_PQ1,
};
static const unsigned kb_col2_pq2_pins[] = {
TEGRA_PIN_KB_COL2_PQ2,
};
static const unsigned kb_col3_pq3_pins[] = {
TEGRA_PIN_KB_COL3_PQ3,
};
static const unsigned kb_col4_pq4_pins[] = {
TEGRA_PIN_KB_COL4_PQ4,
};
static const unsigned kb_col5_pq5_pins[] = {
TEGRA_PIN_KB_COL5_PQ5,
};
static const unsigned kb_col6_pq6_pins[] = {
TEGRA_PIN_KB_COL6_PQ6,
};
static const unsigned kb_col7_pq7_pins[] = {
TEGRA_PIN_KB_COL7_PQ7,
};
static const unsigned kb_row0_pr0_pins[] = {
TEGRA_PIN_KB_ROW0_PR0,
};
static const unsigned kb_row1_pr1_pins[] = {
TEGRA_PIN_KB_ROW1_PR1,
};
static const unsigned kb_row2_pr2_pins[] = {
TEGRA_PIN_KB_ROW2_PR2,
};
static const unsigned kb_row3_pr3_pins[] = {
TEGRA_PIN_KB_ROW3_PR3,
};
static const unsigned kb_row4_pr4_pins[] = {
TEGRA_PIN_KB_ROW4_PR4,
};
static const unsigned kb_row5_pr5_pins[] = {
TEGRA_PIN_KB_ROW5_PR5,
};
static const unsigned kb_row6_pr6_pins[] = {
TEGRA_PIN_KB_ROW6_PR6,
};
static const unsigned kb_row7_pr7_pins[] = {
TEGRA_PIN_KB_ROW7_PR7,
};
static const unsigned kb_row8_ps0_pins[] = {
TEGRA_PIN_KB_ROW8_PS0,
};
static const unsigned kb_row9_ps1_pins[] = {
TEGRA_PIN_KB_ROW9_PS1,
};
static const unsigned kb_row10_ps2_pins[] = {
TEGRA_PIN_KB_ROW10_PS2,
};
static const unsigned gen2_i2c_scl_pt5_pins[] = {
TEGRA_PIN_GEN2_I2C_SCL_PT5,
};
static const unsigned gen2_i2c_sda_pt6_pins[] = {
TEGRA_PIN_GEN2_I2C_SDA_PT6,
};
static const unsigned sdmmc4_cmd_pt7_pins[] = {
TEGRA_PIN_SDMMC4_CMD_PT7,
};
static const unsigned pu0_pins[] = {
TEGRA_PIN_PU0,
};
static const unsigned pu1_pins[] = {
TEGRA_PIN_PU1,
};
static const unsigned pu2_pins[] = {
TEGRA_PIN_PU2,
};
static const unsigned pu3_pins[] = {
TEGRA_PIN_PU3,
};
static const unsigned pu4_pins[] = {
TEGRA_PIN_PU4,
};
static const unsigned pu5_pins[] = {
TEGRA_PIN_PU5,
};
static const unsigned pu6_pins[] = {
TEGRA_PIN_PU6,
};
static const unsigned pv0_pins[] = {
TEGRA_PIN_PV0,
};
static const unsigned pv1_pins[] = {
TEGRA_PIN_PV1,
};
static const unsigned sdmmc3_cd_n_pv2_pins[] = {
TEGRA_PIN_SDMMC3_CD_N_PV2,
};
static const unsigned sdmmc1_wp_n_pv3_pins[] = {
TEGRA_PIN_SDMMC1_WP_N_PV3,
};
static const unsigned ddc_scl_pv4_pins[] = {
TEGRA_PIN_DDC_SCL_PV4,
};
static const unsigned ddc_sda_pv5_pins[] = {
TEGRA_PIN_DDC_SDA_PV5,
};
static const unsigned gpio_w2_aud_pw2_pins[] = {
TEGRA_PIN_GPIO_W2_AUD_PW2,
};
static const unsigned gpio_w3_aud_pw3_pins[] = {
TEGRA_PIN_GPIO_W3_AUD_PW3,
};
static const unsigned clk1_out_pw4_pins[] = {
TEGRA_PIN_CLK1_OUT_PW4,
};
static const unsigned clk2_out_pw5_pins[] = {
TEGRA_PIN_CLK2_OUT_PW5,
};
static const unsigned uart3_txd_pw6_pins[] = {
TEGRA_PIN_UART3_TXD_PW6,
};
static const unsigned uart3_rxd_pw7_pins[] = {
TEGRA_PIN_UART3_RXD_PW7,
};
static const unsigned dvfs_pwm_px0_pins[] = {
TEGRA_PIN_DVFS_PWM_PX0,
};
static const unsigned gpio_x1_aud_px1_pins[] = {
TEGRA_PIN_GPIO_X1_AUD_PX1,
};
static const unsigned dvfs_clk_px2_pins[] = {
TEGRA_PIN_DVFS_CLK_PX2,
};
static const unsigned gpio_x3_aud_px3_pins[] = {
TEGRA_PIN_GPIO_X3_AUD_PX3,
};
static const unsigned gpio_x4_aud_px4_pins[] = {
TEGRA_PIN_GPIO_X4_AUD_PX4,
};
static const unsigned gpio_x5_aud_px5_pins[] = {
TEGRA_PIN_GPIO_X5_AUD_PX5,
};
static const unsigned gpio_x6_aud_px6_pins[] = {
TEGRA_PIN_GPIO_X6_AUD_PX6,
};
static const unsigned gpio_x7_aud_px7_pins[] = {
TEGRA_PIN_GPIO_X7_AUD_PX7,
};
static const unsigned ulpi_clk_py0_pins[] = {
TEGRA_PIN_ULPI_CLK_PY0,
};
static const unsigned ulpi_dir_py1_pins[] = {
TEGRA_PIN_ULPI_DIR_PY1,
};
static const unsigned ulpi_nxt_py2_pins[] = {
TEGRA_PIN_ULPI_NXT_PY2,
};
static const unsigned ulpi_stp_py3_pins[] = {
TEGRA_PIN_ULPI_STP_PY3,
};
static const unsigned sdmmc1_dat3_py4_pins[] = {
TEGRA_PIN_SDMMC1_DAT3_PY4,
};
static const unsigned sdmmc1_dat2_py5_pins[] = {
TEGRA_PIN_SDMMC1_DAT2_PY5,
};
static const unsigned sdmmc1_dat1_py6_pins[] = {
TEGRA_PIN_SDMMC1_DAT1_PY6,
};
static const unsigned sdmmc1_dat0_py7_pins[] = {
TEGRA_PIN_SDMMC1_DAT0_PY7,
};
static const unsigned sdmmc1_clk_pz0_pins[] = {
TEGRA_PIN_SDMMC1_CLK_PZ0,
};
static const unsigned sdmmc1_cmd_pz1_pins[] = {
TEGRA_PIN_SDMMC1_CMD_PZ1,
};
static const unsigned sys_clk_req_pz5_pins[] = {
TEGRA_PIN_SYS_CLK_REQ_PZ5,
};
static const unsigned pwr_i2c_scl_pz6_pins[] = {
TEGRA_PIN_PWR_I2C_SCL_PZ6,
};
static const unsigned pwr_i2c_sda_pz7_pins[] = {
TEGRA_PIN_PWR_I2C_SDA_PZ7,
};
static const unsigned sdmmc4_dat0_paa0_pins[] = {
TEGRA_PIN_SDMMC4_DAT0_PAA0,
};
static const unsigned sdmmc4_dat1_paa1_pins[] = {
TEGRA_PIN_SDMMC4_DAT1_PAA1,
};
static const unsigned sdmmc4_dat2_paa2_pins[] = {
TEGRA_PIN_SDMMC4_DAT2_PAA2,
};
static const unsigned sdmmc4_dat3_paa3_pins[] = {
TEGRA_PIN_SDMMC4_DAT3_PAA3,
};
static const unsigned sdmmc4_dat4_paa4_pins[] = {
TEGRA_PIN_SDMMC4_DAT4_PAA4,
};
static const unsigned sdmmc4_dat5_paa5_pins[] = {
TEGRA_PIN_SDMMC4_DAT5_PAA5,
};
static const unsigned sdmmc4_dat6_paa6_pins[] = {
TEGRA_PIN_SDMMC4_DAT6_PAA6,
};
static const unsigned sdmmc4_dat7_paa7_pins[] = {
TEGRA_PIN_SDMMC4_DAT7_PAA7,
};
static const unsigned pbb0_pins[] = {
TEGRA_PIN_PBB0,
};
static const unsigned cam_i2c_scl_pbb1_pins[] = {
TEGRA_PIN_CAM_I2C_SCL_PBB1,
};