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ibex_core.core
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CAPI=2:
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:ibex:ibex_core:0.1"
description: "Ibex, a small RV32 CPU core"
filesets:
files_rtl:
depend:
- lowrisc:prim:assert
- lowrisc:prim:clock_gating
- lowrisc:prim:lfsr
- lowrisc:ibex:ibex_pkg
- lowrisc:ibex:ibex_icache
files:
- rtl/ibex_alu.sv
- rtl/ibex_compressed_decoder.sv
- rtl/ibex_controller.sv
- rtl/ibex_cs_registers.sv
- rtl/ibex_counter.sv
- rtl/ibex_decoder.sv
- rtl/ibex_ex_block.sv
- rtl/ibex_fetch_fifo.sv
- rtl/ibex_id_stage.sv
- rtl/ibex_if_stage.sv
- rtl/ibex_load_store_unit.sv
- rtl/ibex_multdiv_fast.sv
- rtl/ibex_multdiv_slow.sv
- rtl/ibex_prefetch_buffer.sv
- rtl/ibex_pmp.sv
- rtl/ibex_wb_stage.sv
- rtl/ibex_dummy_instr.sv
# XXX: Figure out the best way to switch these two implementations
# dynamically on the target.
# - rtl/ibex_register_file_latch.sv # ASIC
# - rtl/ibex_register_file_fpga.sv # FPGA
- rtl/ibex_register_file_ff.sv # generic FF-based
- rtl/ibex_core.sv
file_type: systemVerilogSource
files_lint_verilator:
files:
- lint/verilator_waiver.vlt: {file_type: vlt}
files_lint_verible:
files:
- lint/verible_waiver.vbw: {file_type: veribleLintWaiver}
files_check_tool_requirements:
depend:
- lowrisc:tool:check_tool_requirements
parameters:
RVFI:
datatype: bool
paramtype: vlogdefine
SYNTHESIS:
datatype: bool
paramtype: vlogdefine
RV32E:
datatype: int
default: 0
paramtype: vlogparam
RV32M:
datatype: int
default: 1
paramtype: vlogparam
RV32B:
datatype: str
default: ibex_pkg::RV32BNone
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See ibex_pkg.sv (EXPERIMENTAL)"
MultiplierImplementation:
datatype: str
paramtype: vlogparam
description: "Multiplier implementation. Valid values: fast, slow, single-cycle"
default: "fast"
ICache:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable instruction cache"
ICacheECC:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable ECC protection in instruction cache"
BranchTargetALU:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables separate branch target ALU (increasing branch performance EXPERIMENTAL) [0/1]"
WritebackStage:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables third pipeline stage (EXPERIMENTAL) [0/1]"
SecureIbex:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables security hardening features (EXPERIMENTAL) [0/1]"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 4
paramtype: vlogparam
description: "Number of PMP regions"
targets:
default: &default_target
filesets:
- tool_verilator ? (files_lint_verilator)
- tool_veriblelint ? (files_lint_verible)
- files_rtl
- files_check_tool_requirements
toplevel: ibex_core
lint:
<<: *default_target
parameters:
- SYNTHESIS=true
- RVFI=true
default_tool: verilator
tools:
verilator:
mode: lint-only
verilator_options:
- "-Wall"
# RAM primitives wider than 64bit (required for ECC) fail to build in
# Verilator without increasing the unroll count (see Verilator#1266)
- "--unroll-count 72"
format:
filesets:
- files_rtl
parameters:
- SYNTHESIS=true
- RVFI=true
default_tool: veribleformat
toplevel: ibex_core
tools:
veribleformat:
verible_format_args:
- "--inplace"