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1 | 1 | /*
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2 |
| - * Register definitions for the Atmel AC97C controller |
| 2 | + * Register definitions for Atmel AC97C |
3 | 3 | *
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4 | 4 | * Copyright (C) 2005-2009 Atmel Corporation
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5 | 5 | *
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17 | 17 | #define AC97C_CATHR 0x24
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18 | 18 | #define AC97C_CASR 0x28
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19 | 19 | #define AC97C_CAMR 0x2c
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20 |
| -#define AC97C_CBRHR 0x30 |
21 |
| -#define AC97C_CBTHR 0x34 |
22 |
| -#define AC97C_CBSR 0x38 |
23 |
| -#define AC97C_CBMR 0x3c |
24 | 20 | #define AC97C_CORHR 0x40
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25 | 21 | #define AC97C_COTHR 0x44
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26 | 22 | #define AC97C_COSR 0x48
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46 | 42 | #define AC97C_MR_VRA (1 << 2)
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47 | 43 |
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48 | 44 | #define AC97C_CSR_TXRDY (1 << 0)
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| 45 | +#define AC97C_CSR_TXEMPTY (1 << 1) |
49 | 46 | #define AC97C_CSR_UNRUN (1 << 2)
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50 | 47 | #define AC97C_CSR_RXRDY (1 << 4)
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| 48 | +#define AC97C_CSR_OVRUN (1 << 5) |
51 | 49 | #define AC97C_CSR_ENDTX (1 << 10)
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52 | 50 | #define AC97C_CSR_ENDRX (1 << 14)
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53 | 51 |
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61 | 59 | #define AC97C_CMR_DMAEN (1 << 22)
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62 | 60 |
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63 | 61 | #define AC97C_SR_CAEVT (1 << 3)
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| 62 | +#define AC97C_SR_COEVT (1 << 2) |
| 63 | +#define AC97C_SR_WKUP (1 << 1) |
| 64 | +#define AC97C_SR_SOF (1 << 0) |
64 | 65 |
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| 66 | +#define AC97C_CH_MASK(slot) \ |
| 67 | + (0x7 << (3 * (AC97_SLOT_##slot - 3))) |
65 | 68 | #define AC97C_CH_ASSIGN(slot, channel) \
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66 | 69 | (AC97C_CHANNEL_##channel << (3 * (AC97_SLOT_##slot - 3)))
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67 | 70 | #define AC97C_CHANNEL_NONE 0x0
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68 | 71 | #define AC97C_CHANNEL_A 0x1
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69 |
| -#define AC97C_CHANNEL_B 0x2 |
70 | 72 |
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71 | 73 | #endif /* __SOUND_ATMEL_AC97C_H */
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