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trace.gtkw
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[*]
[*] GTKWave Analyzer v3.3.107 (w)1999-2020 BSI
[*] Wed Oct 21 17:13:34 2020
[*]
[dumpfile] "(null)"
[savefile] "/home/claire/Work/riscv-formal/cores/nerv/trace.gtkw"
[timestart] 0
[size] 1259 841
[pos] 2135 225
*-5.139064 105 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] rvfi_testbench.
[treeopen] rvfi_testbench.checker_inst.
[treeopen] rvfi_testbench.wrapper.
[sst_width] 240
[signals_width] 287
[sst_expanded] 1
[sst_vpaned_height] 235
@24
smt_step
@200
-
-Core
@28
rvfi_testbench.wrapper.uut.clock
rvfi_testbench.wrapper.uut.reset
rvfi_testbench.wrapper.uut.stall
rvfi_testbench.wrapper.uut.trap
@200
-
@23
rvfi_testbench.wrapper.uut.pc[31:0]
@22
rvfi_testbench.wrapper.uut.insn[31:0]
@c00200
-insn_decoded
@22
rvfi_testbench.wrapper.uut.insn_funct7[6:0]
rvfi_testbench.wrapper.uut.insn_rs2[4:0]
rvfi_testbench.wrapper.uut.insn_rs1[4:0]
@28
rvfi_testbench.wrapper.uut.insn_funct3[2:0]
@22
rvfi_testbench.wrapper.uut.insn_rd[4:0]
rvfi_testbench.wrapper.uut.insn_opcode[6:0]
@200
-
@22
rvfi_testbench.wrapper.uut.imm_b_sext[31:0]
rvfi_testbench.wrapper.uut.imm_i_sext[31:0]
rvfi_testbench.wrapper.uut.imm_j_sext[31:0]
rvfi_testbench.wrapper.uut.imm_s_sext[31:0]
@1401200
-insn_decoded
@200
-
-Checker
@24
rvfi_testbench.checker_inst.rvfi_order[63:0]
@28
rvfi_testbench.checker_inst.rvfi_valid
@29
rvfi_testbench.checker_inst.spec_valid
@28
rvfi_testbench.checker_inst.rvfi_trap
@22
rvfi_testbench.checker_inst.rvfi_insn[31:0]
rvfi_testbench.wrapper.uut.rvfi_pc_rdata[31:0]
@c00200
-spec
@28
rvfi_testbench.checker_inst.spec_valid
rvfi_testbench.checker_inst.spec_trap
@200
-
@22
rvfi_testbench.checker_inst.spec_rs1_addr[4:0]
rvfi_testbench.checker_inst.spec_rs2_addr[4:0]
rvfi_testbench.checker_inst.spec_rd_addr[4:0]
rvfi_testbench.checker_inst.spec_rd_wdata[31:0]
rvfi_testbench.checker_inst.spec_pc_wdata[31:0]
@200
-
@22
rvfi_testbench.checker_inst.spec_mem_addr[31:0]
rvfi_testbench.checker_inst.spec_mem_wdata[31:0]
rvfi_testbench.checker_inst.spec_mem_rmask[3:0]
rvfi_testbench.checker_inst.spec_mem_wmask[3:0]
@1401200
-spec
@c00200
-rvfi
@24
rvfi_testbench.checker_inst.rvfi_order[63:0]
@28
rvfi_testbench.checker_inst.rvfi_valid
rvfi_testbench.checker_inst.rvfi_trap
rvfi_testbench.checker_inst.rvfi_halt
rvfi_testbench.checker_inst.rvfi_intr
rvfi_testbench.checker_inst.rvfi_ixl[1:0]
rvfi_testbench.checker_inst.rvfi_mode[1:0]
@22
rvfi_testbench.checker_inst.rvfi_insn[31:0]
@200
-
@22
rvfi_testbench.checker_inst.rvfi_pc_rdata[31:0]
rvfi_testbench.checker_inst.rvfi_pc_wdata[31:0]
@200
-
@22
rvfi_testbench.checker_inst.rvfi_rs1_addr[4:0]
rvfi_testbench.checker_inst.rvfi_rs2_addr[4:0]
rvfi_testbench.checker_inst.rvfi_rd_addr[4:0]
@200
-
@22
rvfi_testbench.checker_inst.rvfi_rs1_rdata[31:0]
rvfi_testbench.checker_inst.rvfi_rs2_rdata[31:0]
rvfi_testbench.checker_inst.rvfi_rd_wdata[31:0]
@200
-
@22
rvfi_testbench.checker_inst.rvfi_mem_addr[31:0]
rvfi_testbench.checker_inst.rvfi_mem_rdata[31:0]
rvfi_testbench.checker_inst.rvfi_mem_rmask[3:0]
rvfi_testbench.checker_inst.rvfi_mem_wdata[31:0]
rvfi_testbench.checker_inst.rvfi_mem_wmask[3:0]
@1401200
-rvfi
[pattern_trace] 1
[pattern_trace] 0