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opcodes-rv32b
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opcodes-rv32b
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# format of a line in this file:
# <instruction name> <args> <opcode>
#
# <opcode> is given by specifying one or more range/value pairs:
# hi..lo=value or bit=value or arg=value (e.g. 6..2=0x45 10=1 rd=0)
#
# <args> is one of rd, rs1, rs2, rs3, imm20, imm12, imm12lo, imm12hi,
# shamtw, shamt, rm
#
# Example:
# add rd rs1 rs2 31..25=0 14..12=0 6..2=0x0C 1..0=3
# RV32B
slo rd rs1 rs2 31..25=0x010 14..12=1 6..2=0x0C 1..0=3
sro rd rs1 rs2 31..25=0x10 14..12=5 6..2=0x0C 1..0=3
orn rd rs1 rs2 31..25=0x020 14..12=6 6..2=0x0C 1..0=3
pack rd rs1 rs2 31..25=0x022 14..12=0 6..2=0x0C 1..0=3
xnor rd rs1 rs2 31..25=0x020 14..12=4 6..2=0x0C 1..0=3
sbext rd rs1 rs2 31..25=0x024 14..12=5 6..2=0x0C 1..0=3
bfp rd rs1 rs2 31..25=0x004 14..12=7 6..2=0x0C 1..0=3
grev rd rs1 rs2 31..25=0x034 14..12=5 6..2=0x0C 1..0=3
pcnt rd rs1 31..20=0x602 14..12=1 6..2=0x04 1..0=3
clz rd rs1 31..20=0x600 14..12=1 6..2=0x04 1..0=3
ctz rd rs1 31..20=0x601 14..12=1 6..2=0x04 1..0=3
rol rd rs1 rs2 31..25=0x030 14..12=1 6..2=0x0C 1..0=3
ror rd rs1 rs2 31..25=0x030 14..12=5 6..2=0x0C 1..0=3
clmul rd rs1 rs2 31..25=0x005 14..12=1 6..2=0x0C 1..0=3
gorc rd rs1 rs2 31..25=0x014 14..12=5 6..2=0x0C 1..0=3
gorci rd rs1 shamt 31..27=0x05 14..12=5 6..2=0x04 1..0=3
unshfl rd rs1 rs2 31..25=0x04 14..12=5 6..2=0x0c 1..0=3