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Ana Pazos
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[RISCV] Pass MCSubtargetInfo to print methods.
Summary: This change allows checking for ISA extensions in print methods. Reviewers: asb, niosHD Reviewed By: asb, niosHD Subscribers: llvm-commits, niosHD, asb, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal Differential Revision: https://reviews.llvm.org/D41503 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@322345 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent 478b380 commit c74d471

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4 files changed

+140
-9
lines changed

4 files changed

+140
-9
lines changed

‎lib/Target/RISCV/InstPrinter/RISCVInstPrinter.cpp

+6-2
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,7 @@
1717
#include "llvm/MC/MCExpr.h"
1818
#include "llvm/MC/MCInst.h"
1919
#include "llvm/MC/MCRegisterInfo.h"
20+
#include "llvm/MC/MCSubtargetInfo.h"
2021
#include "llvm/MC/MCSymbol.h"
2122
#include "llvm/Support/CommandLine.h"
2223
#include "llvm/Support/ErrorHandling.h"
@@ -37,8 +38,8 @@ NoAliases("riscv-no-aliases",
3738

3839
void RISCVInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
3940
StringRef Annot, const MCSubtargetInfo &STI) {
40-
if (NoAliases || !printAliasInstr(MI, O))
41-
printInstruction(MI, O);
41+
if (NoAliases || !printAliasInstr(MI, STI, O))
42+
printInstruction(MI, STI, O);
4243
printAnnotation(O, Annot);
4344
}
4445

@@ -47,6 +48,7 @@ void RISCVInstPrinter::printRegName(raw_ostream &O, unsigned RegNo) const {
4748
}
4849

4950
void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
51+
const MCSubtargetInfo &STI,
5052
raw_ostream &O, const char *Modifier) {
5153
assert((Modifier == 0 || Modifier[0] == 0) && "No modifiers supported");
5254
const MCOperand &MO = MI->getOperand(OpNo);
@@ -66,6 +68,7 @@ void RISCVInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
6668
}
6769

6870
void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
71+
const MCSubtargetInfo &STI,
6972
raw_ostream &O) {
7073
unsigned FenceArg = MI->getOperand(OpNo).getImm();
7174
if ((FenceArg & RISCVFenceField::I) != 0)
@@ -79,6 +82,7 @@ void RISCVInstPrinter::printFenceArg(const MCInst *MI, unsigned OpNo,
7982
}
8083

8184
void RISCVInstPrinter::printFRMArg(const MCInst *MI, unsigned OpNo,
85+
const MCSubtargetInfo &STI,
8286
raw_ostream &O) {
8387
auto FRMArg =
8488
static_cast<RISCVFPRndMode::RoundingMode>(MI->getOperand(OpNo).getImm());

‎lib/Target/RISCV/InstPrinter/RISCVInstPrinter.h

+12-7
Original file line numberDiff line numberDiff line change
@@ -30,16 +30,21 @@ class RISCVInstPrinter : public MCInstPrinter {
3030
const MCSubtargetInfo &STI) override;
3131
void printRegName(raw_ostream &O, unsigned RegNo) const override;
3232

33-
void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O,
34-
const char *Modifier = nullptr);
35-
void printFenceArg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
36-
void printFRMArg(const MCInst *MI, unsigned OpNo, raw_ostream &O);
33+
void printOperand(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
34+
raw_ostream &O, const char *Modifier = nullptr);
35+
void printFenceArg(const MCInst *MI, unsigned OpNo,
36+
const MCSubtargetInfo &STI, raw_ostream &O);
37+
void printFRMArg(const MCInst *MI, unsigned OpNo, const MCSubtargetInfo &STI,
38+
raw_ostream &O);
3739

3840
// Autogenerated by tblgen.
39-
void printInstruction(const MCInst *MI, raw_ostream &O);
40-
bool printAliasInstr(const MCInst *MI, raw_ostream &O);
41+
void printInstruction(const MCInst *MI, const MCSubtargetInfo &STI,
42+
raw_ostream &O);
43+
bool printAliasInstr(const MCInst *MI, const MCSubtargetInfo &STI,
44+
raw_ostream &O);
4145
void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
42-
unsigned PrintMethodIdx, raw_ostream &O);
46+
unsigned PrintMethodIdx,
47+
const MCSubtargetInfo &STI, raw_ostream &O);
4348
static const char *getRegisterName(unsigned RegNo,
4449
unsigned AltIdx = RISCV::ABIRegAltName);
4550
};

‎lib/Target/RISCV/RISCV.td

+5
Original file line numberDiff line numberDiff line change
@@ -84,7 +84,12 @@ def RISCVAsmParser : AsmParser {
8484
let AllowDuplicateRegisterNames = 1;
8585
}
8686

87+
def RISCVAsmWriter : AsmWriter {
88+
int PassSubtarget = 1;
89+
}
90+
8791
def RISCV : Target {
8892
let InstructionSet = RISCVInstrInfo;
8993
let AssemblyParsers = [RISCVAsmParser];
94+
let AssemblyWriters = [RISCVAsmWriter];
9095
}

‎test/MC/RISCV/csr-aliases.s

+117
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,117 @@
1+
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
2+
# RUN: | llvm-objdump -d -mattr=+f -riscv-no-aliases - \
3+
# RUN: | FileCheck -check-prefix=CHECK-INST %s
4+
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
5+
# RUN: | llvm-objdump -d -mattr=+f - \
6+
# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
7+
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
8+
# RUN: | llvm-objdump -d -mattr=+f - \
9+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
10+
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-f < %s \
11+
# RUN: | llvm-objdump -d -mattr=+f - \
12+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
13+
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=-f < %s \
14+
# RUN: | llvm-objdump -d -mattr=-f - \
15+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
16+
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+f < %s \
17+
# RUN: | llvm-objdump -d -mattr=-f - \
18+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
19+
20+
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
21+
# RUN: | llvm-objdump -d -mattr=+f -riscv-no-aliases - \
22+
# RUN: | FileCheck -check-prefix=CHECK-INST %s
23+
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
24+
# RUN: | llvm-objdump -d -mattr=+f - \
25+
# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s
26+
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
27+
# RUN: | llvm-objdump -d -mattr=+f - \
28+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
29+
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-f < %s \
30+
# RUN: | llvm-objdump -d -mattr=+f - \
31+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F %s
32+
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=-f < %s \
33+
# RUN: | llvm-objdump -d -mattr=-f - \
34+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
35+
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+f < %s \
36+
# RUN: | llvm-objdump -d -mattr=-f - \
37+
# RUN: | FileCheck -check-prefix=CHECK-EXT-F-OFF %s
38+
39+
40+
# CHECK-INST: csrrs t0, 3, zero
41+
# CHECK-ALIAS: frcsr t0
42+
# CHECK-EXT-F: frcsr t0
43+
# CHECK-EXT-F-OFF: csrr t0, 3
44+
csrrs t0, 3, zero
45+
46+
# CHECK-INST: csrrw t1, 3, t2
47+
# CHECK-ALIAS: fscsr t1, t2
48+
# CHECK-EXT-F-ON: fscsr t1, t2
49+
# CHECK-EXT-F-OFF: csrrw t1, 3, t2
50+
csrrw t1, 3, t2
51+
52+
# CHECK-INST: csrrw zero, 3, t2
53+
# CHECK-ALIAS: fscsr t2
54+
# CHECK-EXT-F-ON: fscsr t2
55+
# CHECK-EXT-F-OFF: csrw 3, t2
56+
csrrw zero, 3, t2
57+
58+
# CHECK-INST: csrrw zero, 3, t2
59+
# CHECK-ALIAS: fscsr t2
60+
# CHECK-EXT-F-ON: fscsr t2
61+
# CHECK-EXT-F-OFF: csrw 3, t2
62+
csrrw zero, 3, t2
63+
64+
# CHECK-INST: csrrw t0, 2, zero
65+
# CHECK-ALIAS: fsrm t0, zero
66+
# CHECK-EXT-F-ON: fsrm t0, zero
67+
# CHECK-EXT-F-OFF: csrrw t0, 2, zero
68+
csrrw t0, 2, zero
69+
70+
# CHECK-INST: csrrw t0, 2, t1
71+
# CHECK-ALIAS: fsrm t0, t1
72+
# CHECK-EXT-F-ON: fsrm t0, t1
73+
# CHECK-EXT-F-OFF: csrrw t0, 2, t1
74+
csrrw t0, 2, t1
75+
76+
# CHECK-INST: csrrwi t0, 2, 31
77+
# CHECK-ALIAS: fsrmi t0, 31
78+
# CHECK-EXT-F-ON: fsrmi t0, 31
79+
# CHECK-EXT-F-OFF: csrrwi t0, 2, 31
80+
csrrwi t0, 2, 31
81+
82+
# CHECK-INST: csrrwi zero, 2, 31
83+
# CHECK-ALIAS: fsrmi 31
84+
# CHECK-EXT-F-ON: fsrmi 31
85+
# CHECK-EXT-F-OFF: csrwi 2, 31
86+
csrrwi zero, 2, 31
87+
88+
# CHECK-INST: csrrs t0, 1, zero
89+
# CHECK-ALIAS: frflags t0
90+
# CHECK-EXT-F-ON: frflags t0
91+
# CHECK-EXT-F-OFF: csrr t0, 1
92+
csrrs t0, 1, zero
93+
94+
# CHECK-INST: csrrw t0, 1, t2
95+
# CHECK-ALIAS: fsflags t0, t2
96+
# CHECK-EXT-F-ON: fsflags t0, t2
97+
# CHECK-EXT-F-OFF: csrrw t0, 1, t2
98+
csrrw t0, 1, t2
99+
100+
# CHECK-INST: csrrw zero, 1, t2
101+
# CHECK-ALIAS: fsflags t2
102+
# CHECK-EXT-F-ON: fsflags t2
103+
# CHECK-EXT-F-OFF: csrw 1, t2
104+
csrrw zero, 1, t2
105+
106+
# CHECK-INST: csrrwi t0, 1, 31
107+
# CHECK-ALIAS: fsflagsi t0, 31
108+
# CHECK-EXT-F: fsflagsi t0, 31
109+
# CHECK-EXT-F-OFF: csrrwi t0, 1, 31
110+
csrrwi t0, 1, 31
111+
112+
# CHECK-INST: csrrwi zero, 1, 31
113+
# CHECK-ALIAS: fsflagsi 31
114+
# CHECK-EXT-F: fsflagsi 31
115+
# CHECK-EXT-F-OFF: csrwi 1, 31
116+
csrrwi zero, 1, 31
117+

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