diff --git a/docs/AMDGPUUsage.rst b/docs/AMDGPUUsage.rst index 35611bc6fcd1..7a4e8e3a6f4b 100644 --- a/docs/AMDGPUUsage.rst +++ b/docs/AMDGPUUsage.rst @@ -1208,7 +1208,7 @@ non-AMD key names should be prefixed by "*vendor-name*.". registers used by each work-item for GFX6-GFX9 - "MaxFlatWorkgroupSize" integer Maximum flat + "MaxFlatWorkGroupSize" integer Maximum flat work-group size supported by the kernel in work-items. @@ -1451,7 +1451,7 @@ CP microcode requires the Kernel descritor to be allocated on 64 byte alignment. then additional space must be added to this value for the call stack. - 95:64 4 bytes MaxFlatWorkgroupSize Maximum flat work-group + 95:64 4 bytes MaxFlatWorkGroupSize Maximum flat work-group size supported by the kernel in work-items. 96 1 bit IsDynamicCallStack Indicates if the generated diff --git a/include/llvm/Support/AMDGPUKernelDescriptor.h b/include/llvm/Support/AMDGPUKernelDescriptor.h index 6f404498446f..ce2c0c1c959e 100644 --- a/include/llvm/Support/AMDGPUKernelDescriptor.h +++ b/include/llvm/Support/AMDGPUKernelDescriptor.h @@ -109,7 +109,7 @@ enum ComputePgmRsrc2 { struct KernelDescriptor final { uint32_t GroupSegmentFixedSize; uint32_t PrivateSegmentFixedSize; - uint32_t MaxFlatWorkgroupSize; + uint32_t MaxFlatWorkGroupSize; uint64_t IsDynamicCallStack : 1; uint64_t IsXNACKEnabled : 1; uint64_t Reserved0 : 30; diff --git a/include/llvm/Support/AMDGPUMetadata.h b/include/llvm/Support/AMDGPUMetadata.h index 448e6e78e1d2..0e26a4a90838 100644 --- a/include/llvm/Support/AMDGPUMetadata.h +++ b/include/llvm/Support/AMDGPUMetadata.h @@ -238,8 +238,8 @@ constexpr char WavefrontSize[] = "WavefrontSize"; constexpr char NumSGPRs[] = "NumSGPRs"; /// \brief Key for Kernel::CodeProps::Metadata::mNumVGPRs. constexpr char NumVGPRs[] = "NumVGPRs"; -/// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkgroupSize. -constexpr char MaxFlatWorkgroupSize[] = "MaxFlatWorkgroupSize"; +/// \brief Key for Kernel::CodeProps::Metadata::mMaxFlatWorkGroupSize. +constexpr char MaxFlatWorkGroupSize[] = "MaxFlatWorkGroupSize"; /// \brief Key for Kernel::CodeProps::Metadata::mIsDynamicCallStack. constexpr char IsDynamicCallStack[] = "IsDynamicCallStack"; /// \brief Key for Kernel::CodeProps::Metadata::mIsXNACKEnabled. @@ -268,7 +268,7 @@ struct Metadata final { /// \brief Total number of VGPRs used by a workitem. Optional. uint16_t mNumVGPRs = 0; /// \brief Maximum flat work-group size supported by the kernel. Optional. - uint32_t mMaxFlatWorkgroupSize = 0; + uint32_t mMaxFlatWorkGroupSize = 0; /// \brief True if the generated machine code is using a dynamically sized /// call stack. Optional. bool mIsDynamicCallStack = false; diff --git a/lib/Support/AMDGPUMetadata.cpp b/lib/Support/AMDGPUMetadata.cpp index 8a58f91b37a0..ec2714cfc1c5 100644 --- a/lib/Support/AMDGPUMetadata.cpp +++ b/lib/Support/AMDGPUMetadata.cpp @@ -142,8 +142,8 @@ struct MappingTraits { MD.mNumSGPRs, uint16_t(0)); YIO.mapOptional(Kernel::CodeProps::Key::NumVGPRs, MD.mNumVGPRs, uint16_t(0)); - YIO.mapOptional(Kernel::CodeProps::Key::MaxFlatWorkgroupSize, - MD.mMaxFlatWorkgroupSize, uint32_t(0)); + YIO.mapOptional(Kernel::CodeProps::Key::MaxFlatWorkGroupSize, + MD.mMaxFlatWorkGroupSize, uint32_t(0)); YIO.mapOptional(Kernel::CodeProps::Key::IsDynamicCallStack, MD.mIsDynamicCallStack, false); YIO.mapOptional(Kernel::CodeProps::Key::IsXNACKEnabled, diff --git a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp index 52ac53260b00..5a1d1a55795b 100644 --- a/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp +++ b/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp @@ -1179,7 +1179,7 @@ AMDGPU::HSAMD::Kernel::CodeProps::Metadata AMDGPUAsmPrinter::getHSACodeProps( HSACodeProps.mWavefrontSize = STM.getWavefrontSize(); HSACodeProps.mNumSGPRs = CurrentProgramInfo.NumSGPR; HSACodeProps.mNumVGPRs = CurrentProgramInfo.NumVGPR; - HSACodeProps.mMaxFlatWorkgroupSize = MFI.getMaxFlatWorkGroupSize(); + HSACodeProps.mMaxFlatWorkGroupSize = MFI.getMaxFlatWorkGroupSize(); HSACodeProps.mIsDynamicCallStack = ProgramInfo.DynamicCallStack; HSACodeProps.mIsXNACKEnabled = STM.isXNACKEnabled(); diff --git a/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll b/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll index 3e2a5d2e4cc5..7fe5604c3ec7 100644 --- a/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll +++ b/test/CodeGen/AMDGPU/attr-amdgpu-flat-work-group-size.ll @@ -133,10 +133,10 @@ attributes #3 = {"amdgpu-flat-work-group-size"="1024,2048"} ; HSAMD: Version: [ 1, 0 ] ; HSAMD: Kernels: ; HSAMD: - Name: min_64_max_64 -; HSAMD: MaxFlatWorkgroupSize: 64 +; HSAMD: MaxFlatWorkGroupSize: 64 ; HSAMD: - Name: min_64_max_128 -; HSAMD: MaxFlatWorkgroupSize: 128 +; HSAMD: MaxFlatWorkGroupSize: 128 ; HSAMD: - Name: min_128_max_128 -; HSAMD: MaxFlatWorkgroupSize: 128 +; HSAMD: MaxFlatWorkGroupSize: 128 ; HSAMD: - Name: min_1024_max_2048 -; HSAMD: MaxFlatWorkgroupSize: 2048 +; HSAMD: MaxFlatWorkGroupSize: 2048 diff --git a/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll b/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll index 177dbd78a5f5..2d02b46e479d 100644 --- a/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll +++ b/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll @@ -20,7 +20,7 @@ ; GFX700: NumVGPRs: 4 ; GFX800: NumVGPRs: 6 ; GFX900: NumVGPRs: 6 -; CHECK: MaxFlatWorkgroupSize: 256 +; CHECK: MaxFlatWorkGroupSize: 256 define amdgpu_kernel void @test( half addrspace(1)* %r, half addrspace(1)* %a, diff --git a/test/MC/AMDGPU/hsa-metadata-kernel-code-props.s b/test/MC/AMDGPU/hsa-metadata-kernel-code-props.s index d56fcfcf064e..54c4b4a01e2f 100644 --- a/test/MC/AMDGPU/hsa-metadata-kernel-code-props.s +++ b/test/MC/AMDGPU/hsa-metadata-kernel-code-props.s @@ -13,7 +13,7 @@ // CHECK: PrivateSegmentFixedSize: 16 // CHECK: KernargSegmentAlign: 16 // CHECK: WavefrontSize: 64 -// CHECK: MaxFlatWorkgroupSize: 256 +// CHECK: MaxFlatWorkGroupSize: 256 .amd_amdgpu_hsa_metadata Version: [ 1, 0 ] Printf: [ '1:1:4:%d\n', '2:1:8:%g\n' ] @@ -26,5 +26,5 @@ PrivateSegmentFixedSize: 16 KernargSegmentAlign: 16 WavefrontSize: 64 - MaxFlatWorkgroupSize: 256 + MaxFlatWorkGroupSize: 256 .end_amd_amdgpu_hsa_metadata