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Commits on Jul 2, 2016

• New Kaleidoscope chapter: Creating object files

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  Wilfred

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• [PM] Fix a small typo from when I ported JumpThreading

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  chisophugis

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• [X86][AVX512] Autoupgrade the MOVDDUP/MOVSLDUP/MOVSHDUP intrinsics

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  RKSimon

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• [DIBuilder] Remove dead code. NFC.

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• [Hexagon] Create global std::map lazily.

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• [X86][AVX512] Add support for lowering shuffles to MOVDDUP/MOVSLDUP/MOVSHDUP

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• [X86][AVX512] Add test cases that should lower to MOVSLDUP/MOVSHDUP

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  RKSimon

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• [X86][AVX512] Add fast-isel shuffle tests

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  RKSimon

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• Use arrays or initializer lists to feed ArrayRefs instead of SmallVector where possible.

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  d0k

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• [esan|cfrag] Add counters for struct array accesses

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  zhaoqin

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• [SystemZ] Move misplaced SystemZ::TDC to non-memory opcode range.

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  mwkmwkmwk

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• Add RenderScript ArchType

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  pirama-arumuga-nainar

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• [PM] Port ConstantHoisting to the new Pass Manager

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  mkuperst

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• [codeview] Set the Nested and Scoped ClassOptions based on the scope chain

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Commits on Jul 1, 2016

• LoadStoreVectorizer: Fix warning about extra semicolon

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  arsenm

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• TII: Fix inlineasm size counting comments as insts

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• PeepholeOptimizer: Relax assert

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• [CodeView] Include the offset of nested members

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  majnemer

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• [CodeView] Pretty print anonymous scopes

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  majnemer

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• AMDGPU: Add feature for unaligned access

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  arsenm

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• AMDGPU: Expand unaligned accesses early

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• [msan] Fix __msan_maybe_ for non-standard type sizes.

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  eugenis

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• AMDGPU: Improve load/store of illegal types.

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  arsenm

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• [codeview] Don't record UDTs for anonymous structs

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  rnk

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• IR: Set TargetPrefix for some X86 and AArch64 intrinsics where it was missing

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  bogner

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• Address two correctness issues in LoadStoreVectorizer

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  alinas

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• [Hexagon] Revert r274381: that was actually wrong

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  Krzysztof Parzyszek

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• [Hexagon] Use MachineOperand::readsReg instead of isUse

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• [pdb] Check the display name for <unnamed-tag>, not the linkage name

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  rnk

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• [codeview] Assert that our CV type records are valid

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  rnk

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• AMDGPU/SI: Enable testing several variants for si scheduler

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  arsenm

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• Specify mtriple for the frame-order.ll test.

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  danielcdh

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• Revert r274347 "[ARM] Refactor Thumb2 mul instruction descs"

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  zmodem

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• Make extract_symbols.py be compatible with Python 3

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  john-brawn-arm

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• CodeGen: Use MachineInstr& in RegisterCoalescer, NFC

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