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Day 2: Memory Systems: Manu Awasthi and Vivek Seshadri

DRAM architecture, related performance issues and optimizations: Vivek Seshadri

  • Memory is the critical bottleneck/ central point to the idea of Von Neumann architectures
  • SSD is not a technology rather than implementation. Flash is the underlying technology. Similarly, DRAM (tech), HBM (implementation)
  • We are striving to get to a memory that takes the best of all worlds. Cost is driven by density

Cost vs Latency of memories

  • DRAM ecosystem is unique. Memory controller is made by companies like Intel, but Memory manufacturing happens by someone else

DRAM is not random access after all

  • Memory controller handles FR-FCFS or other scheduling queues

Lab on DRAM: Day 2

Tasks and Progress