- Revision numbers following the ArchC release
- Instructions with cycles annotations
- Two new .ac files to use with MPSoCBench (block and nonblock)
- arm_isa.cpp using the reserved work DATA_PORT to data request. See the commit message.
- Interrupt handler support. It is inactive in standalone simulator.
- Revision numbers following the ArchC release
- Added id register for core identification
- Special case in LSM/STM was handled. Now, it's possible use Rn in Rlist, e.g., 'push {sp, ...}'
- Fixed the number of register in 16
- Bugfix in BX, RSC and SBC instructions
- ArchC 2.2 compliant
- Model passed selected Mediabench and Mibench applications
- ArchC 2.1 compliant
- Support for automatic generation of binary tools
- Support for dynamic linker and loader when reading ELF files
- Support for GDB
- Support for compiled simulator and interpreted simulator