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Pull requests: riscv-non-isa/tg-nexus-trace
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Minor fix of NexRv argument count check for decoding case
#1
by ArtemVolohatiy
was merged Jun 16, 2020
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updated Jun 16, 2020
Build a PDF using the RISC-V style (#7)
#8
by jjscheel
was merged Feb 24, 2022
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updated Feb 24, 2022
First pass Filtering register map
#10
by IainCRobertson
was merged Oct 4, 2022
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updated Oct 4, 2022
Update GH Actions to eliminate Warnings
#12
by jjscheel
was merged Nov 16, 2022
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updated Nov 16, 2022
Adding index for the register-map to allow for xref from trace spec.
#44
by wmat
was merged Jan 17, 2024
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updated Jan 17, 2024
Corrections in support of Issue 35
#41
by IainCRobertson
was closed Mar 7, 2024
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updated Mar 7, 2024
Update RISC-V-Trace-Control-Interface.adoc
#2
by RobertChyla
was closed Oct 4, 2022
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updated May 22, 2024
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