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151 results for source starred repositories
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Shichao's Notes

HTML 1,167 292 Updated Feb 5, 2024

Python interface to PCIE

C++ 38 8 Updated Apr 30, 2018

An interactive playground for Scala

Scala 434 105 Updated Jan 17, 2025

Scalable Network Stack for FPGAs (TCP/IP, RoCEv2)

C++ 777 275 Updated Nov 17, 2024

Recipe for FPGA cooking

Verilog 288 65 Updated Sep 29, 2024
JavaScript 47 30 Updated Apr 4, 2022

SLAC Python Based Hardware Abstraction & Data Acquisition System

C++ 43 17 Updated Jan 15, 2025

A huge VHDL library for FPGA development

VHDL 365 62 Updated Jan 16, 2025

Python Display Manager

Python 118 77 Updated Jan 16, 2025

XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.

C 18 3 Updated Jul 10, 2020

Xilinx Virtual Cable server for FT2232H (targeted for ARM SBCs)

C 18 5 Updated Mar 7, 2022

ESP8266 Xilinx Virtual Cable - wifi JTAG

C++ 39 10 Updated Apr 21, 2021

public domain tools for FPGAs

C 326 63 Updated Feb 7, 2017

USB SMBus Interface

C 148 44 Updated Apr 10, 2021

Programs a Spartan 6 FPGA over JTAG using an FTDI USB chip.

C 15 4 Updated Jul 27, 2019

Simple command line utility for converting .doc & .xls files to any supported format such as Text, RTF, CSV or PDF

Pascal 459 54 Updated Dec 10, 2024

Verilog AXI components for FPGA implementation

Verilog 1,583 466 Updated Dec 7, 2023

Reference HDL code for the MATRIX Creator's Spartan 6 FPGA

Verilog 27 16 Updated Jan 15, 2020

Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1

Python 1,049 344 Updated Nov 28, 2018

Driver and libraries for FPGA PCIe firmware used by PERG team and available on OHWR.

C 27 17 Updated Nov 7, 2016

This is a TCL script that will take in Verilog and VHDL files and generate an instantiation template appropriately for the user to use in their design.

Tcl 10 2 Updated Dec 19, 2012

Veriloggen: A Mixed-Paradigm Hardware Construction Framework

Python 310 58 Updated Aug 10, 2024

IP-core package generator for AXI4/Avalon

Python 22 7 Updated Nov 25, 2018
Python 40 6 Updated May 26, 2018

VUnit is a unit testing framework for VHDL/SystemVerilog

VHDL 756 268 Updated Jan 13, 2025

Parallel Programming for FPGAs -- An open-source high-level synthesis book

TeX 808 150 Updated Jan 13, 2025

Linux kernel variant from Analog Devices; see README.md for details

C 469 853 Updated Jan 17, 2025

JESD204 Eye Scan Visualization Utility

C 12 9 Updated Oct 23, 2024
Tcl 26 14 Updated Mar 21, 2018

ESP8266 as wireless JTAG Programmer

C++ 161 29 Updated Jun 2, 2018
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