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r8a66597-udc.c
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/*
* R8A66597 UDC (USB gadget)
*
* Copyright (C) 2006-2009 Renesas Solutions Corp.
*
* Author : Yoshihiro Shimoda <[email protected]>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <linux/dma-mapping.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include "r8a66597-udc.h"
#define DRIVER_VERSION "2011-09-26"
static const char udc_name[] = "r8a66597_udc";
static const char *r8a66597_ep_name[] = {
"ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7",
"ep8", "ep9",
};
static void init_controller(struct r8a66597 *r8a66597);
static void disable_controller(struct r8a66597 *r8a66597);
static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req);
static void irq_packet_write(struct r8a66597_ep *ep,
struct r8a66597_request *req);
static int r8a66597_queue(struct usb_ep *_ep, struct usb_request *_req,
gfp_t gfp_flags);
static void transfer_complete(struct r8a66597_ep *ep,
struct r8a66597_request *req, int status);
/*-------------------------------------------------------------------------*/
static inline u16 get_usb_speed(struct r8a66597 *r8a66597)
{
return r8a66597_read(r8a66597, DVSTCTR0) & RHST;
}
static void enable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
unsigned long reg)
{
u16 tmp;
tmp = r8a66597_read(r8a66597, INTENB0);
r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
INTENB0);
r8a66597_bset(r8a66597, (1 << pipenum), reg);
r8a66597_write(r8a66597, tmp, INTENB0);
}
static void disable_pipe_irq(struct r8a66597 *r8a66597, u16 pipenum,
unsigned long reg)
{
u16 tmp;
tmp = r8a66597_read(r8a66597, INTENB0);
r8a66597_bclr(r8a66597, BEMPE | NRDYE | BRDYE,
INTENB0);
r8a66597_bclr(r8a66597, (1 << pipenum), reg);
r8a66597_write(r8a66597, tmp, INTENB0);
}
static void r8a66597_usb_connect(struct r8a66597 *r8a66597)
{
r8a66597_bset(r8a66597, CTRE, INTENB0);
r8a66597_bset(r8a66597, BEMPE | BRDYE, INTENB0);
r8a66597_bset(r8a66597, DPRPU, SYSCFG0);
}
static void r8a66597_usb_disconnect(struct r8a66597 *r8a66597)
__releases(r8a66597->lock)
__acquires(r8a66597->lock)
{
r8a66597_bclr(r8a66597, CTRE, INTENB0);
r8a66597_bclr(r8a66597, BEMPE | BRDYE, INTENB0);
r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
r8a66597->gadget.speed = USB_SPEED_UNKNOWN;
spin_unlock(&r8a66597->lock);
r8a66597->driver->disconnect(&r8a66597->gadget);
spin_lock(&r8a66597->lock);
disable_controller(r8a66597);
init_controller(r8a66597);
r8a66597_bset(r8a66597, VBSE, INTENB0);
INIT_LIST_HEAD(&r8a66597->ep[0].queue);
}
static inline u16 control_reg_get_pid(struct r8a66597 *r8a66597, u16 pipenum)
{
u16 pid = 0;
unsigned long offset;
if (pipenum == 0) {
pid = r8a66597_read(r8a66597, DCPCTR) & PID;
} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
offset = get_pipectr_addr(pipenum);
pid = r8a66597_read(r8a66597, offset) & PID;
} else {
dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
pipenum);
}
return pid;
}
static inline void control_reg_set_pid(struct r8a66597 *r8a66597, u16 pipenum,
u16 pid)
{
unsigned long offset;
if (pipenum == 0) {
r8a66597_mdfy(r8a66597, pid, PID, DCPCTR);
} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
offset = get_pipectr_addr(pipenum);
r8a66597_mdfy(r8a66597, pid, PID, offset);
} else {
dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
pipenum);
}
}
static inline void pipe_start(struct r8a66597 *r8a66597, u16 pipenum)
{
control_reg_set_pid(r8a66597, pipenum, PID_BUF);
}
static inline void pipe_stop(struct r8a66597 *r8a66597, u16 pipenum)
{
control_reg_set_pid(r8a66597, pipenum, PID_NAK);
}
static inline void pipe_stall(struct r8a66597 *r8a66597, u16 pipenum)
{
control_reg_set_pid(r8a66597, pipenum, PID_STALL);
}
static inline u16 control_reg_get(struct r8a66597 *r8a66597, u16 pipenum)
{
u16 ret = 0;
unsigned long offset;
if (pipenum == 0) {
ret = r8a66597_read(r8a66597, DCPCTR);
} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
offset = get_pipectr_addr(pipenum);
ret = r8a66597_read(r8a66597, offset);
} else {
dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
pipenum);
}
return ret;
}
static inline void control_reg_sqclr(struct r8a66597 *r8a66597, u16 pipenum)
{
unsigned long offset;
pipe_stop(r8a66597, pipenum);
if (pipenum == 0) {
r8a66597_bset(r8a66597, SQCLR, DCPCTR);
} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
offset = get_pipectr_addr(pipenum);
r8a66597_bset(r8a66597, SQCLR, offset);
} else {
dev_err(r8a66597_to_dev(r8a66597), "unexpect pipe num (%d)\n",
pipenum);
}
}
static void control_reg_sqset(struct r8a66597 *r8a66597, u16 pipenum)
{
unsigned long offset;
pipe_stop(r8a66597, pipenum);
if (pipenum == 0) {
r8a66597_bset(r8a66597, SQSET, DCPCTR);
} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
offset = get_pipectr_addr(pipenum);
r8a66597_bset(r8a66597, SQSET, offset);
} else {
dev_err(r8a66597_to_dev(r8a66597),
"unexpect pipe num(%d)\n", pipenum);
}
}
static u16 control_reg_sqmon(struct r8a66597 *r8a66597, u16 pipenum)
{
unsigned long offset;
if (pipenum == 0) {
return r8a66597_read(r8a66597, DCPCTR) & SQMON;
} else if (pipenum < R8A66597_MAX_NUM_PIPE) {
offset = get_pipectr_addr(pipenum);
return r8a66597_read(r8a66597, offset) & SQMON;
} else {
dev_err(r8a66597_to_dev(r8a66597),
"unexpect pipe num(%d)\n", pipenum);
}
return 0;
}
static u16 save_usb_toggle(struct r8a66597 *r8a66597, u16 pipenum)
{
return control_reg_sqmon(r8a66597, pipenum);
}
static void restore_usb_toggle(struct r8a66597 *r8a66597, u16 pipenum,
u16 toggle)
{
if (toggle)
control_reg_sqset(r8a66597, pipenum);
else
control_reg_sqclr(r8a66597, pipenum);
}
static inline int get_buffer_size(struct r8a66597 *r8a66597, u16 pipenum)
{
u16 tmp;
int size;
if (pipenum == 0) {
tmp = r8a66597_read(r8a66597, DCPCFG);
if ((tmp & R8A66597_CNTMD) != 0)
size = 256;
else {
tmp = r8a66597_read(r8a66597, DCPMAXP);
size = tmp & MAXP;
}
} else {
r8a66597_write(r8a66597, pipenum, PIPESEL);
tmp = r8a66597_read(r8a66597, PIPECFG);
if ((tmp & R8A66597_CNTMD) != 0) {
tmp = r8a66597_read(r8a66597, PIPEBUF);
size = ((tmp >> 10) + 1) * 64;
} else {
tmp = r8a66597_read(r8a66597, PIPEMAXP);
size = tmp & MXPS;
}
}
return size;
}
static inline unsigned short mbw_value(struct r8a66597 *r8a66597)
{
if (r8a66597->pdata->on_chip)
return MBW_32;
else
return MBW_16;
}
static void r8a66597_change_curpipe(struct r8a66597 *r8a66597, u16 pipenum,
u16 isel, u16 fifosel)
{
u16 tmp, mask, loop;
int i = 0;
if (!pipenum) {
mask = ISEL | CURPIPE;
loop = isel;
} else {
mask = CURPIPE;
loop = pipenum;
}
r8a66597_mdfy(r8a66597, loop, mask, fifosel);
do {
tmp = r8a66597_read(r8a66597, fifosel);
if (i++ > 1000000) {
dev_err(r8a66597_to_dev(r8a66597),
"r8a66597: register%x, loop %x "
"is timeout\n", fifosel, loop);
break;
}
ndelay(1);
} while ((tmp & mask) != loop);
}
static inline void pipe_change(struct r8a66597 *r8a66597, u16 pipenum)
{
struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
if (ep->use_dma)
r8a66597_bclr(r8a66597, DREQE, ep->fifosel);
r8a66597_mdfy(r8a66597, pipenum, CURPIPE, ep->fifosel);
ndelay(450);
if (r8a66597_is_sudmac(r8a66597) && ep->use_dma)
r8a66597_bclr(r8a66597, mbw_value(r8a66597), ep->fifosel);
else
r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
if (ep->use_dma)
r8a66597_bset(r8a66597, DREQE, ep->fifosel);
}
static int pipe_buffer_setting(struct r8a66597 *r8a66597,
struct r8a66597_pipe_info *info)
{
u16 bufnum = 0, buf_bsize = 0;
u16 pipecfg = 0;
if (info->pipe == 0)
return -EINVAL;
r8a66597_write(r8a66597, info->pipe, PIPESEL);
if (info->dir_in)
pipecfg |= R8A66597_DIR;
pipecfg |= info->type;
pipecfg |= info->epnum;
switch (info->type) {
case R8A66597_INT:
bufnum = 4 + (info->pipe - R8A66597_BASE_PIPENUM_INT);
buf_bsize = 0;
break;
case R8A66597_BULK:
/* isochronous pipes may be used as bulk pipes */
if (info->pipe >= R8A66597_BASE_PIPENUM_BULK)
bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK;
else
bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC;
bufnum = R8A66597_BASE_BUFNUM + (bufnum * 16);
buf_bsize = 7;
pipecfg |= R8A66597_DBLB;
if (!info->dir_in)
pipecfg |= R8A66597_SHTNAK;
break;
case R8A66597_ISO:
bufnum = R8A66597_BASE_BUFNUM +
(info->pipe - R8A66597_BASE_PIPENUM_ISOC) * 16;
buf_bsize = 7;
break;
}
if (buf_bsize && ((bufnum + 16) >= R8A66597_MAX_BUFNUM)) {
pr_err("r8a66597 pipe memory is insufficient\n");
return -ENOMEM;
}
r8a66597_write(r8a66597, pipecfg, PIPECFG);
r8a66597_write(r8a66597, (buf_bsize << 10) | (bufnum), PIPEBUF);
r8a66597_write(r8a66597, info->maxpacket, PIPEMAXP);
if (info->interval)
info->interval--;
r8a66597_write(r8a66597, info->interval, PIPEPERI);
return 0;
}
static void pipe_buffer_release(struct r8a66597 *r8a66597,
struct r8a66597_pipe_info *info)
{
if (info->pipe == 0)
return;
if (is_bulk_pipe(info->pipe)) {
r8a66597->bulk--;
} else if (is_interrupt_pipe(info->pipe)) {
r8a66597->interrupt--;
} else if (is_isoc_pipe(info->pipe)) {
r8a66597->isochronous--;
if (info->type == R8A66597_BULK)
r8a66597->bulk--;
} else {
dev_err(r8a66597_to_dev(r8a66597),
"ep_release: unexpect pipenum (%d)\n", info->pipe);
}
}
static void pipe_initialize(struct r8a66597_ep *ep)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
r8a66597_mdfy(r8a66597, 0, CURPIPE, ep->fifosel);
r8a66597_write(r8a66597, ACLRM, ep->pipectr);
r8a66597_write(r8a66597, 0, ep->pipectr);
r8a66597_write(r8a66597, SQCLR, ep->pipectr);
if (ep->use_dma) {
r8a66597_mdfy(r8a66597, ep->pipenum, CURPIPE, ep->fifosel);
ndelay(450);
r8a66597_bset(r8a66597, mbw_value(r8a66597), ep->fifosel);
}
}
static void r8a66597_ep_setting(struct r8a66597 *r8a66597,
struct r8a66597_ep *ep,
const struct usb_endpoint_descriptor *desc,
u16 pipenum, int dma)
{
ep->use_dma = 0;
ep->fifoaddr = CFIFO;
ep->fifosel = CFIFOSEL;
ep->fifoctr = CFIFOCTR;
ep->pipectr = get_pipectr_addr(pipenum);
if (is_bulk_pipe(pipenum) || is_isoc_pipe(pipenum)) {
ep->pipetre = get_pipetre_addr(pipenum);
ep->pipetrn = get_pipetrn_addr(pipenum);
} else {
ep->pipetre = 0;
ep->pipetrn = 0;
}
ep->pipenum = pipenum;
ep->ep.maxpacket = usb_endpoint_maxp(desc);
r8a66597->pipenum2ep[pipenum] = ep;
r8a66597->epaddr2ep[desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK]
= ep;
INIT_LIST_HEAD(&ep->queue);
}
static void r8a66597_ep_release(struct r8a66597_ep *ep)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
u16 pipenum = ep->pipenum;
if (pipenum == 0)
return;
if (ep->use_dma)
r8a66597->num_dma--;
ep->pipenum = 0;
ep->busy = 0;
ep->use_dma = 0;
}
static int alloc_pipe_config(struct r8a66597_ep *ep,
const struct usb_endpoint_descriptor *desc)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
struct r8a66597_pipe_info info;
int dma = 0;
unsigned char *counter;
int ret;
ep->desc = desc;
if (ep->pipenum) /* already allocated pipe */
return 0;
switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) {
case USB_ENDPOINT_XFER_BULK:
if (r8a66597->bulk >= R8A66597_MAX_NUM_BULK) {
if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
dev_err(r8a66597_to_dev(r8a66597),
"bulk pipe is insufficient\n");
return -ENODEV;
} else {
info.pipe = R8A66597_BASE_PIPENUM_ISOC
+ r8a66597->isochronous;
counter = &r8a66597->isochronous;
}
} else {
info.pipe = R8A66597_BASE_PIPENUM_BULK + r8a66597->bulk;
counter = &r8a66597->bulk;
}
info.type = R8A66597_BULK;
dma = 1;
break;
case USB_ENDPOINT_XFER_INT:
if (r8a66597->interrupt >= R8A66597_MAX_NUM_INT) {
dev_err(r8a66597_to_dev(r8a66597),
"interrupt pipe is insufficient\n");
return -ENODEV;
}
info.pipe = R8A66597_BASE_PIPENUM_INT + r8a66597->interrupt;
info.type = R8A66597_INT;
counter = &r8a66597->interrupt;
break;
case USB_ENDPOINT_XFER_ISOC:
if (r8a66597->isochronous >= R8A66597_MAX_NUM_ISOC) {
dev_err(r8a66597_to_dev(r8a66597),
"isochronous pipe is insufficient\n");
return -ENODEV;
}
info.pipe = R8A66597_BASE_PIPENUM_ISOC + r8a66597->isochronous;
info.type = R8A66597_ISO;
counter = &r8a66597->isochronous;
break;
default:
dev_err(r8a66597_to_dev(r8a66597), "unexpect xfer type\n");
return -EINVAL;
}
ep->type = info.type;
info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
info.maxpacket = usb_endpoint_maxp(desc);
info.interval = desc->bInterval;
if (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK)
info.dir_in = 1;
else
info.dir_in = 0;
ret = pipe_buffer_setting(r8a66597, &info);
if (ret < 0) {
dev_err(r8a66597_to_dev(r8a66597),
"pipe_buffer_setting fail\n");
return ret;
}
(*counter)++;
if ((counter == &r8a66597->isochronous) && info.type == R8A66597_BULK)
r8a66597->bulk++;
r8a66597_ep_setting(r8a66597, ep, desc, info.pipe, dma);
pipe_initialize(ep);
return 0;
}
static int free_pipe_config(struct r8a66597_ep *ep)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
struct r8a66597_pipe_info info;
info.pipe = ep->pipenum;
info.type = ep->type;
pipe_buffer_release(r8a66597, &info);
r8a66597_ep_release(ep);
return 0;
}
/*-------------------------------------------------------------------------*/
static void pipe_irq_enable(struct r8a66597 *r8a66597, u16 pipenum)
{
enable_irq_ready(r8a66597, pipenum);
enable_irq_nrdy(r8a66597, pipenum);
}
static void pipe_irq_disable(struct r8a66597 *r8a66597, u16 pipenum)
{
disable_irq_ready(r8a66597, pipenum);
disable_irq_nrdy(r8a66597, pipenum);
}
/* if complete is true, gadget driver complete function is not call */
static void control_end(struct r8a66597 *r8a66597, unsigned ccpl)
{
r8a66597->ep[0].internal_ccpl = ccpl;
pipe_start(r8a66597, 0);
r8a66597_bset(r8a66597, CCPL, DCPCTR);
}
static void start_ep0_write(struct r8a66597_ep *ep,
struct r8a66597_request *req)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
pipe_change(r8a66597, ep->pipenum);
r8a66597_mdfy(r8a66597, ISEL, (ISEL | CURPIPE), CFIFOSEL);
r8a66597_write(r8a66597, BCLR, ep->fifoctr);
if (req->req.length == 0) {
r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
pipe_start(r8a66597, 0);
transfer_complete(ep, req, 0);
} else {
r8a66597_write(r8a66597, ~BEMP0, BEMPSTS);
irq_ep0_write(ep, req);
}
}
static void disable_fifosel(struct r8a66597 *r8a66597, u16 pipenum,
u16 fifosel)
{
u16 tmp;
tmp = r8a66597_read(r8a66597, fifosel) & CURPIPE;
if (tmp == pipenum)
r8a66597_change_curpipe(r8a66597, 0, 0, fifosel);
}
static void change_bfre_mode(struct r8a66597 *r8a66597, u16 pipenum,
int enable)
{
struct r8a66597_ep *ep = r8a66597->pipenum2ep[pipenum];
u16 tmp, toggle;
/* check current BFRE bit */
r8a66597_write(r8a66597, pipenum, PIPESEL);
tmp = r8a66597_read(r8a66597, PIPECFG) & R8A66597_BFRE;
if ((enable && tmp) || (!enable && !tmp))
return;
/* change BFRE bit */
pipe_stop(r8a66597, pipenum);
disable_fifosel(r8a66597, pipenum, CFIFOSEL);
disable_fifosel(r8a66597, pipenum, D0FIFOSEL);
disable_fifosel(r8a66597, pipenum, D1FIFOSEL);
toggle = save_usb_toggle(r8a66597, pipenum);
r8a66597_write(r8a66597, pipenum, PIPESEL);
if (enable)
r8a66597_bset(r8a66597, R8A66597_BFRE, PIPECFG);
else
r8a66597_bclr(r8a66597, R8A66597_BFRE, PIPECFG);
/* initialize for internal BFRE flag */
r8a66597_bset(r8a66597, ACLRM, ep->pipectr);
r8a66597_bclr(r8a66597, ACLRM, ep->pipectr);
restore_usb_toggle(r8a66597, pipenum, toggle);
}
static int sudmac_alloc_channel(struct r8a66597 *r8a66597,
struct r8a66597_ep *ep,
struct r8a66597_request *req)
{
struct r8a66597_dma *dma;
if (!r8a66597_is_sudmac(r8a66597))
return -ENODEV;
/* Check transfer type */
if (!is_bulk_pipe(ep->pipenum))
return -EIO;
if (r8a66597->dma.used)
return -EBUSY;
/* set SUDMAC parameters */
dma = &r8a66597->dma;
dma->used = 1;
if (ep->desc->bEndpointAddress & USB_DIR_IN) {
dma->dir = 1;
} else {
dma->dir = 0;
change_bfre_mode(r8a66597, ep->pipenum, 1);
}
/* set r8a66597_ep paramters */
ep->use_dma = 1;
ep->dma = dma;
ep->fifoaddr = D0FIFO;
ep->fifosel = D0FIFOSEL;
ep->fifoctr = D0FIFOCTR;
/* dma mapping */
req->req.dma = dma_map_single(r8a66597_to_dev(ep->r8a66597),
req->req.buf, req->req.length,
dma->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
return 0;
}
static void sudmac_free_channel(struct r8a66597 *r8a66597,
struct r8a66597_ep *ep,
struct r8a66597_request *req)
{
if (!r8a66597_is_sudmac(r8a66597))
return;
dma_unmap_single(r8a66597_to_dev(ep->r8a66597),
req->req.dma, req->req.length,
ep->dma->dir ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
r8a66597_bclr(r8a66597, DREQE, ep->fifosel);
r8a66597_change_curpipe(r8a66597, 0, 0, ep->fifosel);
ep->dma->used = 0;
ep->use_dma = 0;
ep->fifoaddr = CFIFO;
ep->fifosel = CFIFOSEL;
ep->fifoctr = CFIFOCTR;
}
static void sudmac_start(struct r8a66597 *r8a66597, struct r8a66597_ep *ep,
struct r8a66597_request *req)
{
BUG_ON(req->req.length == 0);
r8a66597_sudmac_write(r8a66597, LBA_WAIT, CH0CFG);
r8a66597_sudmac_write(r8a66597, req->req.dma, CH0BA);
r8a66597_sudmac_write(r8a66597, req->req.length, CH0BBC);
r8a66597_sudmac_write(r8a66597, CH0ENDE, DINTCTRL);
r8a66597_sudmac_write(r8a66597, DEN, CH0DEN);
}
static void start_packet_write(struct r8a66597_ep *ep,
struct r8a66597_request *req)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
u16 tmp;
pipe_change(r8a66597, ep->pipenum);
disable_irq_empty(r8a66597, ep->pipenum);
pipe_start(r8a66597, ep->pipenum);
if (req->req.length == 0) {
transfer_complete(ep, req, 0);
} else {
r8a66597_write(r8a66597, ~(1 << ep->pipenum), BRDYSTS);
if (sudmac_alloc_channel(r8a66597, ep, req) < 0) {
/* PIO mode */
pipe_change(r8a66597, ep->pipenum);
disable_irq_empty(r8a66597, ep->pipenum);
pipe_start(r8a66597, ep->pipenum);
tmp = r8a66597_read(r8a66597, ep->fifoctr);
if (unlikely((tmp & FRDY) == 0))
pipe_irq_enable(r8a66597, ep->pipenum);
else
irq_packet_write(ep, req);
} else {
/* DMA mode */
pipe_change(r8a66597, ep->pipenum);
disable_irq_nrdy(r8a66597, ep->pipenum);
pipe_start(r8a66597, ep->pipenum);
enable_irq_nrdy(r8a66597, ep->pipenum);
sudmac_start(r8a66597, ep, req);
}
}
}
static void start_packet_read(struct r8a66597_ep *ep,
struct r8a66597_request *req)
{
struct r8a66597 *r8a66597 = ep->r8a66597;
u16 pipenum = ep->pipenum;
if (ep->pipenum == 0) {
r8a66597_mdfy(r8a66597, 0, (ISEL | CURPIPE), CFIFOSEL);
r8a66597_write(r8a66597, BCLR, ep->fifoctr);
pipe_start(r8a66597, pipenum);
pipe_irq_enable(r8a66597, pipenum);
} else {
pipe_stop(r8a66597, pipenum);
if (ep->pipetre) {
enable_irq_nrdy(r8a66597, pipenum);
r8a66597_write(r8a66597, TRCLR, ep->pipetre);
r8a66597_write(r8a66597,
DIV_ROUND_UP(req->req.length, ep->ep.maxpacket),
ep->pipetrn);
r8a66597_bset(r8a66597, TRENB, ep->pipetre);
}
if (sudmac_alloc_channel(r8a66597, ep, req) < 0) {
/* PIO mode */
change_bfre_mode(r8a66597, ep->pipenum, 0);
pipe_start(r8a66597, pipenum); /* trigger once */
pipe_irq_enable(r8a66597, pipenum);
} else {
pipe_change(r8a66597, pipenum);
sudmac_start(r8a66597, ep, req);
pipe_start(r8a66597, pipenum); /* trigger once */
}
}
}
static void start_packet(struct r8a66597_ep *ep, struct r8a66597_request *req)
{
if (ep->desc->bEndpointAddress & USB_DIR_IN)
start_packet_write(ep, req);
else
start_packet_read(ep, req);
}
static void start_ep0(struct r8a66597_ep *ep, struct r8a66597_request *req)
{
u16 ctsq;
ctsq = r8a66597_read(ep->r8a66597, INTSTS0) & CTSQ;
switch (ctsq) {
case CS_RDDS:
start_ep0_write(ep, req);
break;
case CS_WRDS:
start_packet_read(ep, req);
break;
case CS_WRND:
control_end(ep->r8a66597, 0);
break;
default:
dev_err(r8a66597_to_dev(ep->r8a66597),
"start_ep0: unexpect ctsq(%x)\n", ctsq);
break;
}
}
static void init_controller(struct r8a66597 *r8a66597)
{
u16 vif = r8a66597->pdata->vif ? LDRV : 0;
u16 irq_sense = r8a66597->irq_sense_low ? INTL : 0;
u16 endian = r8a66597->pdata->endian ? BIGEND : 0;
if (r8a66597->pdata->on_chip) {
if (r8a66597->pdata->buswait)
r8a66597_write(r8a66597, r8a66597->pdata->buswait,
SYSCFG1);
else
r8a66597_write(r8a66597, 0x0f, SYSCFG1);
r8a66597_bset(r8a66597, HSE, SYSCFG0);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
r8a66597_bset(r8a66597, USBE, SYSCFG0);
r8a66597_bset(r8a66597, SCKE, SYSCFG0);
r8a66597_bset(r8a66597, irq_sense, INTENB1);
r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
DMA0CFG);
} else {
r8a66597_bset(r8a66597, vif | endian, PINCFG);
r8a66597_bset(r8a66597, HSE, SYSCFG0); /* High spd */
r8a66597_mdfy(r8a66597, get_xtal_from_pdata(r8a66597->pdata),
XTAL, SYSCFG0);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
r8a66597_bclr(r8a66597, DPRPU, SYSCFG0);
r8a66597_bset(r8a66597, USBE, SYSCFG0);
r8a66597_bset(r8a66597, XCKE, SYSCFG0);
msleep(3);
r8a66597_bset(r8a66597, PLLC, SYSCFG0);
msleep(1);
r8a66597_bset(r8a66597, SCKE, SYSCFG0);
r8a66597_bset(r8a66597, irq_sense, INTENB1);
r8a66597_write(r8a66597, BURST | CPU_ADR_RD_WR,
DMA0CFG);
}
}
static void disable_controller(struct r8a66597 *r8a66597)
{
if (r8a66597->pdata->on_chip) {
r8a66597_bset(r8a66597, SCKE, SYSCFG0);
r8a66597_bclr(r8a66597, UTST, TESTMODE);
/* disable interrupts */
r8a66597_write(r8a66597, 0, INTENB0);
r8a66597_write(r8a66597, 0, INTENB1);
r8a66597_write(r8a66597, 0, BRDYENB);
r8a66597_write(r8a66597, 0, BEMPENB);
r8a66597_write(r8a66597, 0, NRDYENB);
/* clear status */
r8a66597_write(r8a66597, 0, BRDYSTS);
r8a66597_write(r8a66597, 0, NRDYSTS);
r8a66597_write(r8a66597, 0, BEMPSTS);
r8a66597_bclr(r8a66597, USBE, SYSCFG0);
r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
} else {
r8a66597_bclr(r8a66597, UTST, TESTMODE);
r8a66597_bclr(r8a66597, SCKE, SYSCFG0);
udelay(1);
r8a66597_bclr(r8a66597, PLLC, SYSCFG0);
udelay(1);
udelay(1);
r8a66597_bclr(r8a66597, XCKE, SYSCFG0);
}
}
static void r8a66597_start_xclock(struct r8a66597 *r8a66597)
{
u16 tmp;
if (!r8a66597->pdata->on_chip) {
tmp = r8a66597_read(r8a66597, SYSCFG0);
if (!(tmp & XCKE))
r8a66597_bset(r8a66597, XCKE, SYSCFG0);
}
}
static struct r8a66597_request *get_request_from_ep(struct r8a66597_ep *ep)
{
return list_entry(ep->queue.next, struct r8a66597_request, queue);
}
/*-------------------------------------------------------------------------*/
static void transfer_complete(struct r8a66597_ep *ep,
struct r8a66597_request *req, int status)
__releases(r8a66597->lock)
__acquires(r8a66597->lock)
{
int restart = 0;
if (unlikely(ep->pipenum == 0)) {
if (ep->internal_ccpl) {
ep->internal_ccpl = 0;
return;
}
}
list_del_init(&req->queue);
if (ep->r8a66597->gadget.speed == USB_SPEED_UNKNOWN)
req->req.status = -ESHUTDOWN;
else
req->req.status = status;
if (!list_empty(&ep->queue))
restart = 1;
if (ep->use_dma)
sudmac_free_channel(ep->r8a66597, ep, req);
spin_unlock(&ep->r8a66597->lock);
req->req.complete(&ep->ep, &req->req);
spin_lock(&ep->r8a66597->lock);
if (restart) {
req = get_request_from_ep(ep);
if (ep->desc)
start_packet(ep, req);
}
}
static void irq_ep0_write(struct r8a66597_ep *ep, struct r8a66597_request *req)
{
int i;
u16 tmp;
unsigned bufsize;
size_t size;
void *buf;
u16 pipenum = ep->pipenum;
struct r8a66597 *r8a66597 = ep->r8a66597;
pipe_change(r8a66597, pipenum);
r8a66597_bset(r8a66597, ISEL, ep->fifosel);
i = 0;
do {
tmp = r8a66597_read(r8a66597, ep->fifoctr);
if (i++ > 100000) {
dev_err(r8a66597_to_dev(r8a66597),
"pipe0 is busy. maybe cpu i/o bus "
"conflict. please power off this controller.");
return;
}
ndelay(1);
} while ((tmp & FRDY) == 0);
/* prepare parameters */
bufsize = get_buffer_size(r8a66597, pipenum);
buf = req->req.buf + req->req.actual;
size = min(bufsize, req->req.length - req->req.actual);
/* write fifo */
if (req->req.buf) {
if (size > 0)
r8a66597_write_fifo(r8a66597, ep, buf, size);
if ((size == 0) || ((size % ep->ep.maxpacket) != 0))
r8a66597_bset(r8a66597, BVAL, ep->fifoctr);
}
/* update parameters */
req->req.actual += size;
/* check transfer finish */
if ((!req->req.zero && (req->req.actual == req->req.length))
|| (size % ep->ep.maxpacket)
|| (size == 0)) {
disable_irq_ready(r8a66597, pipenum);
disable_irq_empty(r8a66597, pipenum);
} else {
disable_irq_ready(r8a66597, pipenum);
enable_irq_empty(r8a66597, pipenum);
}
pipe_start(r8a66597, pipenum);
}
static void irq_packet_write(struct r8a66597_ep *ep,
struct r8a66597_request *req)
{