opensouce RISC-V cpu core implemented in Verilog from scratch in one night!

Open source FPGA-based NIC and platform for in-network compute

Verilog PCI express components

🌱 Open source ecosystem for open FPGA boards

Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation

This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Networks on FPGAs

Small (Q)SPI flash memory programmer in Verilog

A 2D convolution hardware implementation written in Verilog

A PicoRV32 SoC for the TinyFPGA BX with peripherals designed for building games

A port of picorv32 to Lichee Tang