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gpuowl.cl
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gpuowl.cl
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// Copyright Mihai Preda and George Woltman.
/* List of user-serviceable -use flags and their effects
NO_ASM : request to not use any inline __asm()
NO_OMOD: do not use GCN output modifiers in __asm()
OUT_WG,OUT_SIZEX,OUT_SPACING <AMD default is 256,32,4> <nVidia default is 256,4,1 but needs testing>
IN_WG,IN_SIZEX,IN_SPACING <AMD default is 256,32,1> <nVidia default is 256,4,1 but needs testing>
UNROLL_WIDTH <nVidia default>
NO_UNROLL_WIDTH <AMD default>
OLD_FFT8 <default>
NEWEST_FFT8
NEW_FFT8
OLD_FFT5
NEW_FFT5 <default>
NEWEST_FFT5
CARRY32 <AMD default for PRP when appropriate>
CARRY64 <nVidia default>, <AMD default for PM1 when appropriate>
TRIG_COMPUTE=<n> (default 2), can be used to balance between compute and memory for trigonometrics. TRIG_COMPUTE=0 does more memory access, TRIG_COMPUTE=2 does more compute,
and TRIG_COMPUTE=1 is in between.
DEBUG enable asserts. Slow, but allows to verify that all asserts hold.
STATS enable stats about roundoff distribution and carry magnitude
---- P-1 below ----
NO_P2_FUSED_TAIL // Do not use the big kernel tailFusedMulDelta
*/
/* List of *derived* binary macros. These are normally not defined through -use flags, but derived.
AMDGPU : set on AMD GPUs
HAS_ASM : set if we believe __asm() can be used
*/
/* List of code-specific macros. These are set by the C++ host code or derived
EXP the exponent
WIDTH
SMALL_HEIGHT
MIDDLE
-- Derived from above:
BIG_HEIGHT = SMALL_HEIGHT * MIDDLE
ND number of dwords
NWORDS number of words
NW
NH
G_W "group width"
G_H "group height"
*/
#if !defined(TRIG_COMPUTE)
#define TRIG_COMPUTE 2
#endif
#define STR(x) XSTR(x)
#define XSTR(x) #x
#define OVERLOAD __attribute__((overloadable))
#pragma OPENCL FP_CONTRACT ON
#ifdef cl_khr_fp64
#pragma OPENCL EXTENSION cl_khr_fp64 : enable
#endif
// 64-bit atomics used in kernel sum64
#pragma OPENCL EXTENSION cl_khr_int64_base_atomics : enable
//#pragma OPENCL EXTENSION cl_khr_int64_extended_atomics : enable
#if DEBUG
#define assert(condition) if (!(condition)) { printf("assert(%s) failed at line %d\n", STR(condition), __LINE__ - 1); }
// __builtin_trap();
#else
#define assert(condition)
//__builtin_assume(condition)
#endif // DEBUG
#if AMDGPU
// On AMDGPU the default is HAS_ASM
#if !NO_ASM
#define HAS_ASM 1
#endif
#endif // AMDGPU
#if !HAS_ASM
// disable everything that depends on ASM
#define NO_OMOD 1
#endif
#if CARRY32 && CARRY64
#error Conflict: both CARRY32 and CARRY64 requested
#endif
#if !CARRY32 && !CARRY64
#if AMDGPU
#define CARRY32 1
#endif
#endif
// The ROCm optimizer does a very, very poor job of keeping register usage to a minimum. This negatively impacts occupancy
// which can make a big performance difference. To counteract this, we can prevent some loops from being unrolled.
// For AMD GPUs we do not unroll fft_WIDTH loops. For nVidia GPUs, we unroll everything.
#if !UNROLL_WIDTH && !NO_UNROLL_WIDTH && !AMDGPU
#define UNROLL_WIDTH 1
#endif
// Expected defines: EXP the exponent.
// WIDTH, SMALL_HEIGHT, MIDDLE.
#define BIG_HEIGHT (SMALL_HEIGHT * MIDDLE)
#define ND (WIDTH * BIG_HEIGHT)
#define NWORDS (ND * 2u)
#if WIDTH == 1024 || WIDTH == 256
#define NW 4
#else
#define NW 8
#endif
#if SMALL_HEIGHT == 1024 || SMALL_HEIGHT == 256
#define NH 4
#else
#define NH 8
#endif
#define G_W (WIDTH / NW)
#define G_H (SMALL_HEIGHT / NH)
// 5M timings for MiddleOut & carryFused, ROCm 2.10, RadeonVII, sclk4, mem 1200
// OUT_WG=256, OUT_SIZEX=4, OUT_SPACING=1 (old WorkingOut4) : 154 + 252 = 406 (but may be best on nVidia)
// OUT_WG=256, OUT_SIZEX=8, OUT_SPACING=1 (old WorkingOut3): 124 + 260 = 384
// OUT_WG=256, OUT_SIZEX=32, OUT_SPACING=1 (old WorkingOut5): 105 + 281 = 386
// OUT_WG=256, OUT_SIZEX=8, OUT_SPACING=2: 122 + 249 = 371
// OUT_WG=256, OUT_SIZEX=32, OUT_SPACING=4: 108 + 257 = 365 <- best
#if !OUT_WG
#define OUT_WG 256
#endif
#if !OUT_SIZEX
#if AMDGPU
#define OUT_SIZEX 32
#else // AMDGPU
#if G_W >= 64
#define OUT_SIZEX 4
#else
#define OUT_SIZEX 32
#endif
#endif
#endif
#if !OUT_SPACING
#if AMDGPU
#define OUT_SPACING 4
#else
#define OUT_SPACING 1
#endif
#endif
// 5M timings for MiddleIn & tailFused, ROCm 2.10, RadeonVII, sclk4, mem 1200
// IN_WG=256, IN_SIZEX=4, IN_SPACING=1 (old WorkingIn4) : 177 + 164 (but may be best on nVidia)
// IN_WG=256, IN_SIZEX=8, IN_SPACING=1 (old WorkingIn3): 129 + 166 = 295
// IN_WG=256, IN_SIZEX=32, IN_SPACING=1 (old WorkingIn5): 107 + 171 = 278 <- best
// IN_WG=256, IN_SIZEX=8, IN_SPACING=2: 139 + 166 = 305
// IN_WG=256, IN_SIZEX=32, IN_SPACING=4: 121 + 161 = 282
#if !IN_WG
#define IN_WG 256
#endif
#if !IN_SIZEX
#if AMDGPU
#define IN_SIZEX 32
#else // !AMDGPU
#if G_W >= 64
#define IN_SIZEX 4
#else
#define IN_SIZEX 32
#endif
#endif
#endif
#if !IN_SPACING
#if AMDGPU
#define IN_SPACING 1
#else
#define IN_SPACING 1
#endif
#endif
#if UNROLL_WIDTH
#define UNROLL_WIDTH_CONTROL
#else
#define UNROLL_WIDTH_CONTROL __attribute__((opencl_unroll_hint(1)))
#endif
#if HAS_ASM && !NO_OMOD && !NO_SETMODE
// turn IEEE mode and denormals off so that mul:2 and div:2 work
#define ENABLE_MUL2() { \
__asm volatile ("s_setreg_imm32_b32 hwreg(HW_REG_MODE, 9, 1), 0");\
__asm volatile ("s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 4), 7");\
}
#else
#define ENABLE_MUL2()
#endif
typedef int i32;
typedef uint u32;
typedef long i64;
typedef ulong u64;
typedef i32 Word;
typedef int2 Word2;
typedef i64 CarryABM;
#if SP
typedef float3 T;
typedef float6 TT;
#define RE(a) (a.s012)
#define IM(a) (a.s345)
#else
typedef double T;
typedef double2 TT;
#define RE(a) (a.x)
#define IM(a) (a.y)
#endif
TT U2(T a, T b) { return (TT) (a, b); }
#if SP
// See Fast-Two-Sum and Two-Sum in
// "Extended-Precision Floating-Point Numbers for GPU Computation" by Andrew Thall
// 3 ADD. Requires |a| >= |b|
OVERLOAD float2 quickTwoSum(float a, float b) {
float s = a + b;
return (float2) (s, b - (s - a));
}
OVERLOAD float quickTwoSum(float a, float b, float* e) {
float s = a + b;
*e = b - (s - a);
return s;
}
OVERLOAD float quickTwoSum(float a, float* b) {
float s = a + *b;
*b -= (s - a);
return s;
}
// 6 ADD
OVERLOAD float2 twoSum(float a, float b) {
#if 0
if (fabs(b) > fabs(a)) { float t = a; a = b; b = t; }
return quickTwoSum(a, b);
#elif 0
return (fabs(a) >= fabs(b)) ? quickTwoSum(a, b) : quickTwoSum(b, a);
#else
// No branch but twice the ADDs.
float s = a + b;
float b1 = s - a;
float a1 = s - b1;
float e = (b - b1) + (a - a1);
return (float2) (s, e);
#endif
// Eqivalent (?)
// float2 s1 = fastSum(a, b);
// float2 s2 = fastSum(b, a);
// return (float2) (s1.x, s1.y + s2.y);
}
OVERLOAD float twoSum(float a, float b, float* e) {
float s = a + b;
float b1 = s - a;
float a1 = s - b1;
*e = (b - b1) + (a - a1);
return s;
}
// 16 ADD.
float3 renormalize(float a, float b, float c, float d) {
c = quickTwoSum(c, &d);
b = quickTwoSum(b, &c);
a = quickTwoSum(a, &b);
c = quickTwoSum(c, &d);
b = quickTwoSum(b, &c);
return (float3) (a, b, c + d);
}
// 54 ADD.
OVERLOAD float3 sum(float3 u, float3 v) {
float a, b, c, d, e, f;
a = twoSum(u.x, v.x, &e);
b = twoSum(u.y, v.y, &f);
b = twoSum(b, e, &e);
c = twoSum(u.z, v.z, &d);
c = twoSum(c, f, &f);
c = twoSum(c, e, &e);
return renormalize(a, b, c, d + (f + e));
}
/*
// 21 ADD. See https://web.mit.edu/tabbott/Public/quaddouble-debian/qd-2.3.4-old/docs/qd.pdf , Figure 10.
OVERLOAD float3 sum(float3 a, float3 b) {
float2 c0 = twoSum(a.x, b.x);
float2 t1 = twoSum(a.y, b.y);
float2 c1 = twoSum(t1.x, c0.y);
return (float3) (c0.x, c1.x, a.z + b.z + t1.y + c1.y);
}
*/
// 2 MUL
OVERLOAD float2 twoMul(float a, float b) {
float c = a * b;
float d = fma(a, b, -c);
return (float2) (c, d);
}
// 15 ADD + 9 MUL
OVERLOAD float3 mul(float3 a, float3 b) {
float2 c = twoMul(a.x, b.x);
float2 d0 = twoMul(a.x, b.y);
float2 d1 = twoMul(a.y, b.x);
float2 e0 = twoSum(d0.x, d1.x);
float2 e1 = twoSum(e0.x, c.y);
float f = fma(a.x, b.z, d0.y + d1.y);
f = fma(a.y, b.y, f + e0.y);
f = fma(a.z, b.x, f + e1.y);
#if 0
// e0 = sum(c.y, d0.x);
// e1 = sum(e0.x, d1.x);
f = fma(a.z, b.x, fma(a.y, b.y, fma(a.x, b.z, d0.y))) + d1.y + e0.y + e1.y;
#endif
return (float3) (c.x, e1.x, f);
}
// 15 ADD + 8 MUL
OVERLOAD float3 mul(float3 a, float2 b) {
float2 c = twoMul(a.x, b.x);
float2 d0 = twoMul(a.x, b.y);
float2 d1 = twoMul(a.y, b.x);
float2 e0 = twoSum(d0.x, d1.x);
float2 e1 = twoSum(e0.x, c.y);
f = fma(a.y, b.y, d0.y + d1.y + e0.y);
f = fma(a.z, b.x, f + e1.y);
return (float3) (c.x, e1.x, f);
}
// 9 ADD + 6 MUL
OVERLOAD float3 sq(float3 a) {
float2 c = twoMul(a.x, a.x);
float2 d = twoMul(a.x, a.y);
float2 e = twoSum(2 * d.x, c.y);
float f = fma(a.y, a.y, 2 * fma(a.x, a.z, d.y)) + e.y;
return (float3) (c.x, e.x, f);
}
// TODO: merge the ADD into the MUL
OVERLOAD float3 mad1(float3 a, float3 b, float3 c) { return sum(mul(a, b), c); }
#else
// ---- DP ----
OVERLOAD double sum(double a, double b) { return a + b; }
// double sub(double a, double b) { return a - b; }
OVERLOAD double mad1(double x, double y, double z) { return x * y + z; }
// fma(x, y, z); }
OVERLOAD double mul(double x, double y) { return x * y; }
#endif
T add1_m2(T x, T y) {
#if !NO_OMOD && !SP
T tmp;
__asm volatile("v_add_f64 %0, %1, %2 mul:2" : "=v" (tmp) : "v" (x), "v" (y));
return tmp;
#else
return 2 * sum(x, y);
#endif
}
T sub1_m2(T x, T y) {
#if !NO_OMOD && !SP
T tmp;
__asm volatile("v_add_f64 %0, %1, -%2 mul:2" : "=v" (tmp) : "v" (x), "v" (y));
return tmp;
#else
return 2 * sum(x, -y);
#endif
}
// x * y * 2
T mul1_m2(T x, T y) {
#if !NO_OMOD && !SP
T tmp;
__asm volatile("v_mul_f64 %0, %1, %2 mul:2" : "=v" (tmp) : "v" (x), "v" (y));
return tmp;
#else
return 2 * mul(x, y);
#endif
}
OVERLOAD T fancyMul(T x, const T y) {
#if SP
// for SP we skip the "+1" trick.
return mul(x, y);
#else
// x * (y + 1);
return fma(x, y, x);
#endif
}
OVERLOAD TT fancyMul(TT x, const TT y) {
return U2(fancyMul(RE(x), RE(y)), fancyMul(IM(x), IM(y)));
}
T mad1_m2(T a, T b, T c) {
#if !NO_OMOD && !SP
double out;
__asm volatile("v_fma_f64 %0, %1, %2, %3 mul:2" : "=v" (out) : "v" (a), "v" (b), "v" (c));
return out;
#else
return 2 * mad1(a, b, c);
#endif
}
T mad1_m4(T a, T b, T c) {
#if !NO_OMOD && !SP
double out;
__asm volatile("v_fma_f64 %0, %1, %2, %3 mul:4" : "=v" (out) : "v" (a), "v" (b), "v" (c));
return out;
#else
return 4 * mad1(a, b, c);
#endif
}
#if SP
// complex square
OVERLOAD TT sq(TT a) { return U2(sum(sq(RE(a)), -sq(IM(a))), 2 * mul(RE(a), IM(a))); }
// complex mul
OVERLOAD TT mul(TT a, TT b) { return U2(mad1(RE(a), RE(b), -mul(IM(a), IM(b))), mad1(RE(a), IM(b), mul(IM(a), RE(b)))); }
#else
// complex square
OVERLOAD TT sq(TT a) { return U2(mad1(RE(a), RE(a), - IM(a) * IM(a)), mul1_m2(RE(a), IM(a))); }
// complex mul
OVERLOAD TT mul(TT a, TT b) { return U2(mad1(RE(a), RE(b), - IM(a) * IM(b)), mad1(RE(a), IM(b), IM(a) * RE(b))); }
#endif
bool test(u32 bits, u32 pos) { return (bits >> pos) & 1; }
#define STEP (NWORDS - (EXP % NWORDS))
// bool isBigWord(u32 extra) { return extra < NWORDS - STEP; }
// u32 reduce(u32 extra) { return extra < NWORDS ? extra : (extra - NWORDS); }
u32 bitlen(bool b) { return EXP / NWORDS + b; }
// complex add * 2
TT add_m2(TT a, TT b) { return U2(add1_m2(RE(a), RE(b)), add1_m2(IM(a), IM(b))); }
// complex mul * 2
TT mul_m2(TT a, TT b) { return U2(mad1_m2(RE(a), RE(b), -mul(IM(a), IM(b))), mad1_m2(RE(a), IM(b), mul(IM(a), RE(b)))); }
// complex mul * 4
TT mul_m4(TT a, TT b) { return U2(mad1_m4(RE(a), RE(b), -mul(IM(a), IM(b))), mad1_m4(RE(a), IM(b), mul(IM(a), RE(b)))); }
// complex fma
TT mad_m1(TT a, TT b, TT c) { return U2(mad1(RE(a), RE(b), mad1(IM(a), -IM(b), RE(c))), mad1(RE(a), IM(b), mad1(IM(a), RE(b), IM(c)))); }
// complex fma * 2
TT mad_m2(TT a, TT b, TT c) { return U2(mad1_m2(RE(a), RE(b), mad1(IM(a), -IM(b), RE(c))), mad1_m2(RE(a), IM(b), mad1(IM(a), RE(b), IM(c)))); }
TT mul_t4(TT a) { return U2(IM(a), -RE(a)); } // mul(a, U2( 0, -1)); }
#if SP
#define SP_SQRT1_2 (float3) (0.707106769,1.21016175e-08,-3.81403372e-16)
TT mul_t8(TT a) {
return U2(mul(sum(IM(a), RE(a)), SP_SQRT1_2),
mul(sum(IM(a), -RE(a)), SP_SQRT1_2));
}
TT mul_3t8(TT a) {
return U2(mul(sum(IM(a), -RE(a)), SP_SQRT1_2),
mul(sum(IM(a), RE(a)), -SP_SQRT1_2));
}
#else
TT mul_t8(TT a) { return U2(IM(a) + RE(a), IM(a) - RE(a)) * M_SQRT1_2; } // mul(a, U2( 1, -1)) * (T)(M_SQRT1_2); }
TT mul_3t8(TT a) { return U2(RE(a) - IM(a), RE(a) + IM(a)) * - M_SQRT1_2; } // mul(a, U2(-1, -1)) * (T)(M_SQRT1_2); }
#endif
TT swap(TT a) { return U2(IM(a), RE(a)); }
TT conjugate(TT a) { return U2(RE(a), -IM(a)); }
void bar() { barrier(0); }
#if SP
#error TODO
float2 fromWord(Word u) {
float a = u;
return (float2) (a, u - a);
}
TT weight(Word2 a, TT w) {
return U2(mul(RE(w), fromWord(RE(a))),
mul(IM(w), fromWord(IM(a))));
}
#else
TT weight(Word2 a, TT w) { return U2(RE(a), IM(a)) * w; }
#endif
u32 bfi(u32 u, u32 mask, u32 bits) {
#if HAS_ASM
u32 out;
__asm("v_bfi_b32 %0, %1, %2, %3" : "=v"(out) : "v"(mask), "v"(u), "v"(bits));
return out;
#else
// return (u & mask) | (bits & ~mask);
return (u & mask) | bits;
#endif
}
#if SP
float3 optionalDouble(float3 iw) { return (iw.x < 1.0f) ? 2 * iw : iw; }
float3 optionalHalve(float3 w) { return (w.x >= 4) ? 0.5f * w : w; }
#else
T optionalDouble(T iw) {
// In a straightforward implementation, inverse weights are between 0.5 and 1.0. We use inverse weights between 1.0 and 2.0
// because it allows us to implement this routine with a single OR instruction on the exponent. The original implementation
// where this routine took as input values from 0.25 to 1.0 required both an AND and an OR instruction on the exponent.
// return iw <= 1.0 ? iw * 2 : iw;
assert(iw > 0.5 && iw < 2);
uint2 u = as_uint2(iw);
u.y |= 0x00100000;
// u.y = bfi(u.y, 0xffefffff, 0x00100000);
return as_double(u);
}
T optionalHalve(T w) { // return w >= 4 ? w / 2 : w;
// In a straightforward implementation, weights are between 1.0 and 2.0. We use weights between 2.0 and 4.0 because
// it allows us to implement this routine with a single AND instruction on the exponent. The original implementation
// where this routine took as input values from 1.0 to 4.0 required both an AND and an OR instruction on the exponent.
assert(w >= 2 && w < 8);
uint2 u = as_uint2(w);
// u.y &= 0xFFEFFFFF;
u.y = bfi(u.y, 0xffefffff, 0);
return as_double(u);
}
#endif
#if HAS_ASM
i32 lowBits(i32 u, u32 bits) { i32 tmp; __asm("v_bfe_i32 %0, %1, 0, %2" : "=v" (tmp) : "v" (u), "v" (bits)); return tmp; }
u32 ulowBits(u32 u, u32 bits) { u32 tmp; __asm("v_bfe_u32 %0, %1, 0, %2" : "=v" (tmp) : "v" (u), "v" (bits)); return tmp; }
i32 xtract32(i64 x, u32 bits) { i32 tmp; __asm("v_alignbit_b32 %0, %1, %2, %3" : "=v"(tmp) : "v"(as_int2(x).y), "v"(as_int2(x).x), "v"(bits)); return tmp; }
#else
i32 lowBits(i32 u, u32 bits) { return ((u << (32 - bits)) >> (32 - bits)); }
u32 ulowBits(u32 u, u32 bits) { return ((u << (32 - bits)) >> (32 - bits)); }
i32 xtract32(i64 x, u32 bits) { return ((i32) (x >> bits)); }
#endif
// We support two sizes of carry in carryFused. A 32-bit carry halves the amount of memory used by CarryShuttle,
// but has some risks. As FFT sizes increase and/or exponents approach the limit of an FFT size, there is a chance
// that the carry will not fit in 32-bits -- corrupting results. That said, I did test 2000 iterations of an exponent
// just over 1 billion. Max(abs(carry)) was 0x637225E9 which is OK (0x80000000 or more is fatal). P-1 testing is more
// problematic as the mul-by-3 triples the carry too.
// Rounding constant: 3 * 2^51, See https://stackoverflow.com/questions/17035464
#define RNDVAL (3.0 * (1l << 51))
// Top 32-bits of RNDVAL
#define TOPVAL (0x43380000)
// Check for round off errors above a threshold (default is 0.43)
void ROUNDOFF_CHECK(double x) {
#if DEBUG
#ifndef ROUNDOFF_LIMIT
#define ROUNDOFF_LIMIT 0.43
#endif
float error = fabs(x - rint(x));
if (error > ROUNDOFF_LIMIT) printf("Roundoff: %g %30.2f\n", error, x);
#endif
}
// Check for 32-bit carry nearing the limit (default is 0x7C000000)
void CARRY32_CHECK(i32 x) {
#if DEBUG
#ifndef CARRY32_LIMIT
#define CARRY32_LIMIT 0x7C000000
#endif
if (abs(x) > CARRY32_LIMIT) { printf("Carry32: %X\n", abs(x)); }
#endif
}
float OVERLOAD roundoff(double u, double w) {
double x = u * w;
// The FMA below increases the number of significant bits in the roundoff error
double err = fma(u, w, -rint(x));
return fabs((float) err);
}
float OVERLOAD roundoff(double2 u, double2 w) { return max(roundoff(u.x, w.x), roundoff(u.y, w.y)); }
// For CARRY32 we don't mind pollution of this value with the double exponent bits
i64 OVERLOAD doubleToLong(double x, i32 inCarry) {
ROUNDOFF_CHECK(x);
return as_long(x + as_double((int2) (inCarry, TOPVAL - (inCarry < 0))));
}
i64 OVERLOAD doubleToLong(double x, i64 inCarry) {
ROUNDOFF_CHECK(x);
int2 tmp = as_int2(inCarry);
tmp.y += TOPVAL;
double d = x + as_double(tmp);
// Extend the sign from the lower 51-bits.
// The first 51 bits (0 to 50) are clean. Bit 51 is affected by RNDVAL. Bit 52 of RNDVAL is not stored.
// Note: if needed, we can extend the range to 52 bits instead of 51 by taking the sign from the negation
// of bit 51 (i.e. bit 51==1 means positive, bit 51==0 means negative).
int2 data = as_int2(d);
data.y = lowBits(data.y, 51 - 32);
return as_long(data);
}
const bool MUST_BE_EXACT = 0;
const bool CAN_BE_INEXACT = 1;
Word OVERLOAD carryStep(i64 x, i64 *outCarry, bool isBigWord, bool exactness) {
u32 nBits = bitlen(isBigWord);
Word w = (exactness == MUST_BE_EXACT) ? lowBits(x, nBits) : ulowBits(x, nBits);
if (exactness == MUST_BE_EXACT) x -= w;
*outCarry = x >> nBits;
return w;
}
Word OVERLOAD carryStep(i64 x, i32 *outCarry, bool isBigWord, bool exactness) {
u32 nBits = bitlen(isBigWord);
Word w = (exactness == MUST_BE_EXACT) ? lowBits(x, nBits) : ulowBits(x, nBits);
// If nBits could 20 or more we must be careful. doubleToLong generated x as 13 bits of trash and 51-bit signed value.
// If we right shift 20 bits we will shift some of the trash into outCarry. First we must remove the trash bits.
#if EXP / NWORDS >= 19
*outCarry = as_int2(x << 13).y >> (nBits - 19);
#else
*outCarry = xtract32(x, nBits);
#endif
if (exactness == MUST_BE_EXACT) *outCarry += (w < 0);
CARRY32_CHECK(*outCarry);
return w;
}
Word OVERLOAD carryStep(i32 x, i32 *outCarry, bool isBigWord, bool exactness) {
u32 nBits = bitlen(isBigWord);
Word w = lowBits(x, nBits); // I believe this version is only called with MUST_BE_EXACT
*outCarry = (x - w) >> nBits;
CARRY32_CHECK(*outCarry);
return w;
}
#if CARRY32
typedef i32 CFcarry;
#else
typedef i64 CFcarry;
#endif
typedef i64 CFMcarry;
u32 bound(i64 carry) { return min(abs(carry), 0xfffffffful); }
typedef TT T2;
//{{ carries
Word2 OVERLOAD carryPair(T2 u, iCARRY *outCarry, bool b1, bool b2, iCARRY inCarry, u32* carryMax, bool exactness) {
iCARRY midCarry;
Word a = carryStep(doubleToLong(u.x, (iCARRY) 0) + inCarry, &midCarry, b1, exactness);
Word b = carryStep(doubleToLong(u.y, (iCARRY) 0) + midCarry, outCarry, b2, MUST_BE_EXACT);
#if STATS
*carryMax = max(*carryMax, max(bound(midCarry), bound(*outCarry)));
#endif
return (Word2) (a, b);
}
Word2 OVERLOAD carryFinal(Word2 u, iCARRY inCarry, bool b1) {
i32 tmpCarry;
u.x = carryStep(u.x + inCarry, &tmpCarry, b1, MUST_BE_EXACT);
u.y += tmpCarry;
return u;
}
//}}
//== carries CARRY=32
//== carries CARRY=64
Word2 OVERLOAD carryPairMul(T2 u, i64 *outCarry, bool b1, bool b2, i64 inCarry, u32* carryMax, bool exactness) {
i64 midCarry;
Word a = carryStep(3 * doubleToLong(u.x, (i64) 0) + inCarry, &midCarry, b1, exactness);
Word b = carryStep(3 * doubleToLong(u.y, (i64) 0) + midCarry, outCarry, b2, MUST_BE_EXACT);
#if STATS
*carryMax = max(*carryMax, max(bound(midCarry), bound(*outCarry)));
#endif
return (Word2) (a, b);
}
// Carry propagation from word and carry.
Word2 carryWord(Word2 a, CarryABM* carry, bool b1, bool b2) {
a.x = carryStep(a.x + *carry, carry, b1, MUST_BE_EXACT);
a.y = carryStep(a.y + *carry, carry, b2, MUST_BE_EXACT);
return a;
}
// Propagate carry this many pairs of words.
#define CARRY_LEN 8
T2 addsub(T2 a) { return U2(RE(a) + IM(a), RE(a) - IM(a)); }
T2 addsub_m2(T2 a) { return U2(add1_m2(RE(a), IM(a)), sub1_m2(RE(a), IM(a))); }
// computes 2*(a.x*b.x+a.y*b.y) + i*2*(a.x*b.y+a.y*b.x)
T2 foo2(T2 a, T2 b) {
a = addsub(a);
b = addsub(b);
return addsub(U2(RE(a) * RE(b), IM(a) * IM(b)));
}
T2 foo2_m2(T2 a, T2 b) {
a = addsub(a);
b = addsub(b);
return addsub_m2(U2(RE(a) * RE(b), IM(a) * IM(b)));
}
// computes 2*[x^2+y^2 + i*(2*x*y)]. Needs a name.
T2 foo(T2 a) { return foo2(a, a); }
T2 foo_m2(T2 a) { return foo2_m2(a, a); }
// Same as X2(a, b), b = mul_t4(b)
#define X2_mul_t4(a, b) { T2 t = a; a = t + b; t.x = RE(b) - t.x; RE(b) = t.y - IM(b); IM(b) = t.x; }
#define X2(a, b) { T2 t = a; a = t + b; b = t - b; }
// Same as X2(a, conjugate(b))
#define X2conjb(a, b) { T2 t = a; RE(a) = RE(a) + RE(b); IM(a) = IM(a) - IM(b); RE(b) = t.x - RE(b); IM(b) = t.y + IM(b); }
// Same as X2(a, b), a = conjugate(a)
#define X2conja(a, b) { T2 t = a; RE(a) = RE(a) + RE(b); IM(a) = -IM(a) - IM(b); b = t - b; }
#define SWAP(a, b) { T2 t = a; a = b; b = t; }
T2 fmaT2(T a, T2 b, T2 c) { return a * b + c; }
// Partial complex multiplies: the mul by sin is delayed so that it can be later propagated to an FMA instruction
// complex mul by cos-i*sin given cos/sin, sin
T2 partial_cmul(T2 a, T c_over_s) { return U2(mad1(RE(a), c_over_s, IM(a)), mad1(IM(a), c_over_s, -RE(a))); }
// complex mul by cos+i*sin given cos/sin, sin
T2 partial_cmul_conjugate(T2 a, T c_over_s) { return U2(mad1(RE(a), c_over_s, -IM(a)), mad1(IM(a), c_over_s, RE(a))); }
// a = c + sin * d; b = c - sin * d;
#define fma_addsub(a, b, sin, c, d) { d = sin * d; T2 t = c + d; b = c - d; a = t; }
// Like fma_addsub but muls result by -i.
#define fma_addsub_mul_t4(a, b, sin, c, d) { fma_addsub (a, b, sin, c, d); b = mul_t4 (b); }
// a * conjugate(b)
// saves one negation
T2 mul_by_conjugate(T2 a, T2 b) { return U2(RE(a) * RE(b) + IM(a) * IM(b), IM(a) * RE(b) - RE(a) * IM(b)); }
// Combined complex mul and mul by conjugate. Saves 4 multiplies compared to two complex mul calls.
void mul_and_mul_by_conjugate(T2 *res1, T2 *res2, T2 a, T2 b) {
T axbx = RE(a) * RE(b); T axby = RE(a) * IM(b); T aybx = IM(a) * RE(b); T ayby = IM(a) * IM(b);
res1->x = axbx - ayby; res1->y = axby + aybx; // Complex mul
res2->x = axbx + ayby; res2->y = aybx - axby; // Complex mul by conjugate
}
void fft4Core(T2 *u) {
X2(u[0], u[2]);
X2_mul_t4(u[1], u[3]);
X2(u[0], u[1]);
X2(u[2], u[3]);
}
void fft4(T2 *u) {
X2(u[0], u[2]);
X2_mul_t4(u[1], u[3]);
T2 t = u[2];
u[2] = u[0] - u[1];
u[0] = u[0] + u[1];
u[1] = t + u[3];
u[3] = t - u[3];
}
#if !OLD_FFT8 && !NEWEST_FFT8 && !NEW_FFT8
#define OLD_FFT8 1
#endif
// In rocm 2.2 this is 53 f64 ops in testKernel -- one over optimal. However, for me it is slower
// than OLD_FFT8 when it used in "real" kernels.
#if NEWEST_FFT8
// Attempt to get more FMA by delaying mul by SQRT1_2
T2 mul_t8_delayed(T2 a) { return U2(IM(a) + RE(a), IM(a) - RE(a)); }
#define X2_mul_3t8_delayed(a, b) { T2 t = a; a = t + b; t = b - t; RE(b) = t.x - t.y; IM(b) = t.x + t.y; }
// Like X2 but second arg needs a multiplication by SQRT1_2
#define X2_apply_SQRT1_2(a, b) { T2 t = a; \
RE(a) = fma(RE(b), M_SQRT1_2, t.x); IM(a) = fma(IM(b), M_SQRT1_2, t.y); \
RE(b) = fma(RE(b), -M_SQRT1_2, t.x); IM(b) = fma(IM(b), -M_SQRT1_2, t.y); }
void fft4Core_delayed(T2 *u) { // Same as fft4Core except u[1] and u[3] need to be multiplied by SQRT1_2
X2(u[0], u[2]);
X2_mul_t4(u[1], u[3]); // Still need to apply SQRT1_2
X2_apply_SQRT1_2(u[0], u[1]);
X2_apply_SQRT1_2(u[2], u[3]);
}
void fft8Core(T2 *u) {
X2(u[0], u[4]);
X2(u[1], u[5]);
X2_mul_t4(u[2], u[6]);
X2_mul_3t8_delayed(u[3], u[7]); // u[7] needs mul by SQRT1_2
u[5] = mul_t8_delayed(u[5]); // u[5] needs mul by SQRT1_2
fft4Core(u);
fft4Core_delayed(u + 4);
}
// In rocm 2.2 this is 57 f64 ops in testKernel -- an ugly five over optimal.
#elif NEW_FFT8
// Same as X2(a, b), b = mul_3t8(b)
//#define X2_mul_3t8(a, b) { T2 t=a; a = t+b; t = b-t; t.y *= M_SQRT1_2; b.x = t.x * M_SQRT1_2 - t.y; b.y = t.x * M_SQRT1_2 + t.y; }
#define X2_mul_3t8(a, b) { T2 t=a; a = t+b; t = b-t; RE(b) = (t.x - t.y) * M_SQRT1_2; IM(b) = (t.x + t.y) * M_SQRT1_2; }
void fft8Core(T2 *u) {
X2(u[0], u[4]);
X2(u[1], u[5]);
X2_mul_t4(u[2], u[6]);
X2_mul_3t8(u[3], u[7]);
u[5] = mul_t8(u[5]);
fft4Core(u);
fft4Core(u + 4);
}
// In rocm 2.2 this is 54 f64 ops in testKernel -- two over optimal.
#elif OLD_FFT8
void fft8Core(T2 *u) {
X2(u[0], u[4]);
X2(u[1], u[5]); u[5] = mul_t8(u[5]);
X2(u[2], u[6]); u[6] = mul_t4(u[6]);
X2(u[3], u[7]); u[7] = mul_3t8(u[7]);
fft4Core(u);
fft4Core(u + 4);
}
#endif
void fft8(T2 *u) {
fft8Core(u);
// revbin [0, 4, 2, 6, 1, 5, 3, 7] undo
SWAP(u[1], u[4]);
SWAP(u[3], u[6]);
}
// FFT routines to implement the middle step
void fft3by(T2 *u, u32 incr) {
const double COS1 = -0.5; // cos(tau/3), -0.5
const double SIN1 = 0.86602540378443864676372317075294; // sin(tau/3), sqrt(3)/2, 0.86602540378443864676372317075294
X2_mul_t4(u[1*incr], u[2*incr]); // (r2+r3 i2+i3), (i2-i3 -(r2-r3))
T2 tmp23 = u[0*incr] + COS1 * u[1*incr];
u[0*incr] = u[0*incr] + u[1*incr];
fma_addsub(u[1*incr], u[2*incr], SIN1, tmp23, u[2*incr]);
}
void fft3(T2 *u) {
fft3by(u, 1);
}
#if !NEWEST_FFT5 && !NEW_FFT5 && !OLD_FFT5
#define NEW_FFT5 1
#endif
// Adapted from: Nussbaumer, "Fast Fourier Transform and Convolution Algorithms", 5.5.4 "5-Point DFT".
// Using rocm 2.9, testKernel shows this macro generates 38 f64 (8 FMA) ops, 26 vgprs.
#if OLD_FFT5
void fft5(T2 *u) {
const double SIN1 = 0x1.e6f0e134454ffp-1; // sin(tau/5), 0.95105651629515353118
const double SIN2 = 0x1.89f188bdcd7afp+0; // sin(tau/5) + sin(2*tau/5), 1.53884176858762677931
const double SIN3 = 0x1.73fd61d9df543p-2; // sin(tau/5) - sin(2*tau/5), 0.36327126400268044959
const double COS1 = 0x1.1e3779b97f4a8p-1; // (cos(tau/5) - cos(2*tau/5))/2, 0.55901699437494745126
X2(u[2], u[3]);
X2(u[1], u[4]);
X2(u[1], u[2]);
T2 tmp = u[0];
u[0] += u[1];
u[1] = u[1] * (-0.25) + tmp;
u[2] *= COS1;
tmp = (u[4] - u[3]) * SIN1;
tmp = U2(tmp.y, -tmp.x);
u[3] = U2(u[3].y, -u[3].x) * SIN2 + tmp;
u[4] = U2(-u[4].y, u[4].x) * SIN3 + tmp;
SWAP(u[3], u[4]);
X2(u[1], u[2]);
X2(u[1], u[4]);
X2(u[2], u[3]);
}
// Using rocm 2.9, testKernel shows this macro generates an ideal 44 f64 ops (12 FMA) or 32 f64 ops (20 FMA), 30 vgprs.
#elif NEW_FFT5
// Above uses fewer FMAs. Above may be faster if FMA latency cannot be masked.
// Nussbaumer's ideas can be used to reduce FMAs -- see NEWEST_FFT5 implementation below.
// See prime95's gwnum/zr5.mac file for more detailed explanation of the formulas below
// R1= r1 +(r2+r5) +(r3+r4)
// R2= r1 +.309(r2+r5) -.809(r3+r4) +.951(i2-i5) +.588(i3-i4)
// R5= r1 +.309(r2+r5) -.809(r3+r4) -.951(i2-i5) -.588(i3-i4)
// R3= r1 -.809(r2+r5) +.309(r3+r4) +.588(i2-i5) -.951(i3-i4)
// R4= r1 -.809(r2+r5) +.309(r3+r4) -.588(i2-i5) +.951(i3-i4)
// I1= i1 +(i2+i5) +(i3+i4)
// I2= i1 +.309(i2+i5) -.809(i3+i4) -.951(r2-r5) -.588(r3-r4)
// I5= i1 +.309(i2+i5) -.809(i3+i4) +.951(r2-r5) +.588(r3-r4)
// I3= i1 -.809(i2+i5) +.309(i3+i4) -.588(r2-r5) +.951(r3-r4)
// I4= i1 -.809(i2+i5) +.309(i3+i4) +.588(r2-r5) -.951(r3-r4)
void fft5(T2 *u) {
const double SIN1 = 0x1.e6f0e134454ffp-1; // sin(tau/5), 0.95105651629515353118
const double SIN2_SIN1 = 0.618033988749894848; // sin(2*tau/5) / sin(tau/5) = .588/.951, 0.618033988749894848
const double COS1 = 0.309016994374947424; // cos(tau/5), 0.309016994374947424
const double COS2 = 0.809016994374947424; // -cos(2*tau/5), 0.809016994374947424
X2_mul_t4(u[1], u[4]); // (r2+ i2+), (i2- -r2-)
X2_mul_t4(u[2], u[3]); // (r3+ i3+), (i3- -r3-)
T2 tmp25a = fmaT2(COS1, u[1], u[0]);
T2 tmp34a = fmaT2(-COS2, u[1], u[0]);